diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-06-06 21:24:14 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-06-23 01:59:44 -0400 |
commit | 180cc30637b47dafa26e3202a41964b5ebdab365 (patch) | |
tree | c6c6831aab07a9abd78c6ec5ce3c5551b462f252 /drivers/gpu/drm/nouveau/nv50_crtc.c | |
parent | 07533ea549e725360209f958bb916085f18ff5b9 (diff) |
drm/nouveau: convert bo.mem.start usage to bo.offset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_crtc.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_crtc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c index ebabacf38da9..115b780247ee 100644 --- a/drivers/gpu/drm/nouveau/nv50_crtc.c +++ b/drivers/gpu/drm/nouveau/nv50_crtc.c | |||
@@ -104,7 +104,7 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked) | |||
104 | OUT_RING(evo, nv_crtc->lut.depth == 8 ? | 104 | OUT_RING(evo, nv_crtc->lut.depth == 8 ? |
105 | NV50_EVO_CRTC_CLUT_MODE_OFF : | 105 | NV50_EVO_CRTC_CLUT_MODE_OFF : |
106 | NV50_EVO_CRTC_CLUT_MODE_ON); | 106 | NV50_EVO_CRTC_CLUT_MODE_ON); |
107 | OUT_RING(evo, (nv_crtc->lut.nvbo->bo.mem.start << PAGE_SHIFT) >> 8); | 107 | OUT_RING(evo, nv_crtc->lut.nvbo->bo.offset >> 8); |
108 | if (dev_priv->chipset != 0x50) { | 108 | if (dev_priv->chipset != 0x50) { |
109 | BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1); | 109 | BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1); |
110 | OUT_RING(evo, NvEvoVRAM); | 110 | OUT_RING(evo, NvEvoVRAM); |
@@ -372,7 +372,7 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |||
372 | 372 | ||
373 | nouveau_bo_unmap(cursor); | 373 | nouveau_bo_unmap(cursor); |
374 | 374 | ||
375 | nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.mem.start << PAGE_SHIFT); | 375 | nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset); |
376 | nv_crtc->cursor.show(nv_crtc, true); | 376 | nv_crtc->cursor.show(nv_crtc, true); |
377 | 377 | ||
378 | out: | 378 | out: |
@@ -546,7 +546,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
546 | } | 546 | } |
547 | } | 547 | } |
548 | 548 | ||
549 | nv_crtc->fb.offset = fb->nvbo->bo.mem.start << PAGE_SHIFT; | 549 | nv_crtc->fb.offset = fb->nvbo->bo.offset; |
550 | nv_crtc->fb.tile_flags = nouveau_bo_tile_layout(fb->nvbo); | 550 | nv_crtc->fb.tile_flags = nouveau_bo_tile_layout(fb->nvbo); |
551 | nv_crtc->fb.cpp = drm_fb->bits_per_pixel / 8; | 551 | nv_crtc->fb.cpp = drm_fb->bits_per_pixel / 8; |
552 | if (!nv_crtc->fb.blanked && dev_priv->chipset != 0x50) { | 552 | if (!nv_crtc->fb.blanked && dev_priv->chipset != 0x50) { |