drm/nouveau: convert bo.mem.start usage to bo.offset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

8 files changed, 10 insertions, 12 deletions

diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 46c0914991dc..ae1f0e46e481 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -433,7 +433,6 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
                                      TTM_MEMTYPE_FLAG_CMA;
                         man->available_caching = TTM_PL_MASK_CACHING;
                         man->default_caching = TTM_PL_FLAG_CACHED;
-                        man->gpu_offset = dev_priv->gart_info.aper_base;
                         break;
                 default:
                         NV_ERROR(dev, "Unknown GART type: %d\n",
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index d199097b8918..d0e458336c75 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -54,7 +54,7 @@ nouveau_channel_pushbuf_init(struct nouveau_channel *chan)
          * buffer resides, userspace can submit its own push buffers from
          * anywhere within the same memtype.
          */
-        chan->pushbuf_base = chan->pushbuf_bo->bo.mem.start << PAGE_SHIFT;
+        chan->pushbuf_base = chan->pushbuf_bo->bo.offset;
         if (dev_priv->card_type >= NV_50) {
                 if (dev_priv->card_type < NV_C0) {
                         ret = nouveau_gpuobj_dma_new(chan,
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 4e481c39f5a4..8256370e5938 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -358,7 +358,7 @@ nouveau_pci_resume(struct pci_dev *pdev)
 
         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-                u32 offset = nv_crtc->cursor.nvbo->bo.mem.start << PAGE_SHIFT;
+                u32 offset = nv_crtc->cursor.nvbo->bo.offset;
 
                 nv_crtc->cursor.set_offset(nv_crtc, offset);
                 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
diff --git a/drivers/gpu/drm/nouveau/nouveau_notifier.c b/drivers/gpu/drm/nouveau/nouveau_notifier.c
index 29190e845fd7..81b54e0bb822 100644
--- a/drivers/gpu/drm/nouveau/nouveau_notifier.c
+++ b/drivers/gpu/drm/nouveau/nouveau_notifier.c
@@ -122,7 +122,7 @@ nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
                         target = NV_MEM_TARGET_VRAM;
                 else
                         target = NV_MEM_TARGET_GART;
-                offset  = chan->notifier_bo->bo.mem.start << PAGE_SHIFT;
+                offset  = chan->notifier_bo->bo.offset;
         } else {
                 target = NV_MEM_TARGET_VM;
                 offset = chan->notifier_bo->vma.offset;
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index ab4be9ca43cc..37e6ca8990c6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -768,7 +768,7 @@ nouveau_gpuobj_channel_init(struct nouveau_channel *chan,
                         struct nouveau_gpuobj *sem = NULL;
                         struct nv50_display_crtc *dispc =
                                 &nv50_display(dev)->crtc[i];
-                        u64 offset = dispc->sem.bo->bo.mem.start << PAGE_SHIFT;
+                        u64 offset = dispc->sem.bo->bo.offset;
 
                         ret = nouveau_gpuobj_dma_new(chan, 0x3d, offset, 0xfff,
                                                      NV_MEM_ACCESS_RW,
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index ebabacf38da9..115b780247ee 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -104,7 +104,7 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)
                 OUT_RING(evo, nv_crtc->lut.depth == 8 ?
                                 NV50_EVO_CRTC_CLUT_MODE_OFF :
                                 NV50_EVO_CRTC_CLUT_MODE_ON);
-                OUT_RING(evo, (nv_crtc->lut.nvbo->bo.mem.start << PAGE_SHIFT) >> 8);
+                OUT_RING(evo, nv_crtc->lut.nvbo->bo.offset >> 8);
                 if (dev_priv->chipset != 0x50) {
                         BEGIN_RING(evo, 0, NV84_EVO_CRTC(index, CLUT_DMA), 1);
                         OUT_RING(evo, NvEvoVRAM);
@@ -372,7 +372,7 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
 
         nouveau_bo_unmap(cursor);
 
-        nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.mem.start << PAGE_SHIFT);
+        nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset);
         nv_crtc->cursor.show(nv_crtc, true);
 
 out:
@@ -546,7 +546,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
                 }
         }
 
-        nv_crtc->fb.offset = fb->nvbo->bo.mem.start << PAGE_SHIFT;
+        nv_crtc->fb.offset = fb->nvbo->bo.offset;
         nv_crtc->fb.tile_flags = nouveau_bo_tile_layout(fb->nvbo);
         nv_crtc->fb.cpp = drm_fb->bits_per_pixel / 8;
         if (!nv_crtc->fb.blanked && dev_priv->chipset != 0x50) {
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 08da478ba544..93857e6c662d 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -484,7 +484,7 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
         OUT_RING  (evo, 0x00000000);
         OUT_RING  (evo, 0x00000000);
         BEGIN_RING(evo, 0, 0x0800, 5);
-        OUT_RING  (evo, (nv_fb->nvbo->bo.mem.start << PAGE_SHIFT) >> 8);
+        OUT_RING  (evo, nv_fb->nvbo->bo.offset >> 8);
         OUT_RING  (evo, 0);
         OUT_RING  (evo, (fb->height << 16) | fb->width);
         OUT_RING  (evo, nv_fb->r_pitch);
diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c b/drivers/gpu/drm/nouveau/nv50_evo.c
index 18c61929c450..9bba97f15b04 100644
--- a/drivers/gpu/drm/nouveau/nv50_evo.c
+++ b/drivers/gpu/drm/nouveau/nv50_evo.c
@@ -154,7 +154,7 @@ nv50_evo_channel_init(struct nouveau_channel *evo)
 {
         struct drm_device *dev = evo->dev;
         int id = evo->id, ret, i;
-        u64 pushbuf = evo->pushbuf_bo->bo.mem.start << PAGE_SHIFT;
+        u64 pushbuf = evo->pushbuf_bo->bo.offset;
         u32 tmp;
 
         tmp = nv_rd32(dev, NV50_PDISPLAY_EVO_CTRL(id));
@@ -335,13 +335,12 @@ nv50_evo_create(struct drm_device *dev)
                 ret = nouveau_bo_new(dev, NULL, 4096, 0x1000, TTM_PL_FLAG_VRAM,
                                      0, 0x0000, &dispc->sem.bo);
                 if (!ret) {
-                        offset = dispc->sem.bo->bo.mem.start << PAGE_SHIFT;
-
                         ret = nouveau_bo_pin(dispc->sem.bo, TTM_PL_FLAG_VRAM);
                         if (!ret)
                                 ret = nouveau_bo_map(dispc->sem.bo);
                         if (ret)
                                 nouveau_bo_ref(NULL, &dispc->sem.bo);
+                        offset = dispc->sem.bo->bo.offset;
                 }
 
                 if (ret)