diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-30 13:36:49 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-30 13:36:49 -0400 |
commit | fced6dee29f6fb143fe16ea90331176ff77e6120 (patch) | |
tree | 5b6e57e7a757adc2a6518ce291a4d2914397b917 /drivers/gpu/drm/i915/intel_display.c | |
parent | bfed1074f213051e94648bfad0d0611a16d81366 (diff) | |
parent | be1f7c8d7e2bc8b8c76846aa6f276e8d2ef8975a (diff) |
Merge branch 'v3.16-next/cleanup-samsung' into v3.16-next/platform-exynos
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dae976f51d83..69bcc42a0e44 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -9654,11 +9654,22 @@ intel_pipe_config_compare(struct drm_device *dev, | |||
9654 | PIPE_CONF_CHECK_I(pipe_src_w); | 9654 | PIPE_CONF_CHECK_I(pipe_src_w); |
9655 | PIPE_CONF_CHECK_I(pipe_src_h); | 9655 | PIPE_CONF_CHECK_I(pipe_src_h); |
9656 | 9656 | ||
9657 | PIPE_CONF_CHECK_I(gmch_pfit.control); | 9657 | /* |
9658 | /* pfit ratios are autocomputed by the hw on gen4+ */ | 9658 | * FIXME: BIOS likes to set up a cloned config with lvds+external |
9659 | if (INTEL_INFO(dev)->gen < 4) | 9659 | * screen. Since we don't yet re-compute the pipe config when moving |
9660 | PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); | 9660 | * just the lvds port away to another pipe the sw tracking won't match. |
9661 | PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); | 9661 | * |
9662 | * Proper atomic modesets with recomputed global state will fix this. | ||
9663 | * Until then just don't check gmch state for inherited modes. | ||
9664 | */ | ||
9665 | if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) { | ||
9666 | PIPE_CONF_CHECK_I(gmch_pfit.control); | ||
9667 | /* pfit ratios are autocomputed by the hw on gen4+ */ | ||
9668 | if (INTEL_INFO(dev)->gen < 4) | ||
9669 | PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); | ||
9670 | PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); | ||
9671 | } | ||
9672 | |||
9662 | PIPE_CONF_CHECK_I(pch_pfit.enabled); | 9673 | PIPE_CONF_CHECK_I(pch_pfit.enabled); |
9663 | if (current_config->pch_pfit.enabled) { | 9674 | if (current_config->pch_pfit.enabled) { |
9664 | PIPE_CONF_CHECK_I(pch_pfit.pos); | 9675 | PIPE_CONF_CHECK_I(pch_pfit.pos); |
@@ -11616,6 +11627,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) | |||
11616 | base.head) { | 11627 | base.head) { |
11617 | memset(&crtc->config, 0, sizeof(crtc->config)); | 11628 | memset(&crtc->config, 0, sizeof(crtc->config)); |
11618 | 11629 | ||
11630 | crtc->config.quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE; | ||
11631 | |||
11619 | crtc->active = dev_priv->display.get_pipe_config(crtc, | 11632 | crtc->active = dev_priv->display.get_pipe_config(crtc, |
11620 | &crtc->config); | 11633 | &crtc->config); |
11621 | 11634 | ||