Merge branch 'v3.16-next/cleanup-samsung' into v3.16-next/platform-exynos

18 files changed, 222 insertions, 176 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0905cd915589..ec82f6bff122 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1308,6 +1308,7 @@ struct intel_vbt_data {
 
         struct {
                 u16 pwm_freq_hz;
+                bool present;
                 bool active_low_pwm;
         } backlight;
 
@@ -2431,20 +2432,18 @@ int i915_gem_context_open(struct drm_device *dev, struct drm_file *file);
 int i915_gem_context_enable(struct drm_i915_private *dev_priv);
 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
 int i915_switch_context(struct intel_ring_buffer *ring,
-                        struct drm_file *file, struct i915_hw_context *to);
+                        struct i915_hw_context *to);
 struct i915_hw_context *
 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
 void i915_gem_context_free(struct kref *ctx_ref);
 static inline void i915_gem_context_reference(struct i915_hw_context *ctx)
 {
-        if (ctx->obj && HAS_HW_CONTEXTS(ctx->obj->base.dev))
-                kref_get(&ctx->ref);
+        kref_get(&ctx->ref);
 }
 
 static inline void i915_gem_context_unreference(struct i915_hw_context *ctx)
 {
-        if (ctx->obj && HAS_HW_CONTEXTS(ctx->obj->base.dev))
-                kref_put(&ctx->ref, i915_gem_context_free);
+        kref_put(&ctx->ref, i915_gem_context_free);
 }
 
 static inline bool i915_gem_context_is_default(const struct i915_hw_context *c)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6370a761d137..2871ce75f438 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2790,7 +2790,7 @@ int i915_gpu_idle(struct drm_device *dev)
 
         /* Flush everything onto the inactive list. */
         for_each_ring(ring, dev_priv, i) {
-                ret = i915_switch_context(ring, NULL, ring->default_context);
+                ret = i915_switch_context(ring, ring->default_context);
                 if (ret)
                         return ret;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 6043062ffce7..d72db15afa02 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -96,9 +96,6 @@
 #define GEN6_CONTEXT_ALIGN (64<<10)
 #define GEN7_CONTEXT_ALIGN 4096
 
-static int do_switch(struct intel_ring_buffer *ring,
-                     struct i915_hw_context *to);
-
 static void do_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
 {
         struct drm_device *dev = ppgtt->base.dev;
@@ -185,13 +182,15 @@ void i915_gem_context_free(struct kref *ctx_ref)
                                                    typeof(*ctx), ref);
         struct i915_hw_ppgtt *ppgtt = NULL;
 
-        /* We refcount even the aliasing PPGTT to keep the code symmetric */
-        if (USES_PPGTT(ctx->obj->base.dev))
-                ppgtt = ctx_to_ppgtt(ctx);
+        if (ctx->obj) {
+                /* We refcount even the aliasing PPGTT to keep the code symmetric */
+                if (USES_PPGTT(ctx->obj->base.dev))
+                        ppgtt = ctx_to_ppgtt(ctx);
 
-        /* XXX: Free up the object before tearing down the address space, in
-         * case we're bound in the PPGTT */
-        drm_gem_object_unreference(&ctx->obj->base);
+                /* XXX: Free up the object before tearing down the address space, in
+                 * case we're bound in the PPGTT */
+                drm_gem_object_unreference(&ctx->obj->base);
+        }
 
         if (ppgtt)
                 kref_put(&ppgtt->ref, ppgtt_release);
@@ -232,32 +231,32 @@ __create_hw_context(struct drm_device *dev,
                 return ERR_PTR(-ENOMEM);
 
         kref_init(&ctx->ref);
-        ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
-        INIT_LIST_HEAD(&ctx->link);
-        if (ctx->obj == NULL) {
-                kfree(ctx);
-                DRM_DEBUG_DRIVER("Context object allocated failed\n");
-                return ERR_PTR(-ENOMEM);
-        }
+        list_add_tail(&ctx->link, &dev_priv->context_list);
 
-        if (INTEL_INFO(dev)->gen >= 7) {
-                ret = i915_gem_object_set_cache_level(ctx->obj,
-                                                      I915_CACHE_L3_LLC);
-                /* Failure shouldn't ever happen this early */
-                if (WARN_ON(ret))
+        if (dev_priv->hw_context_size) {
+                ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
+                if (ctx->obj == NULL) {
+                        ret = -ENOMEM;
                         goto err_out;
-        }
+                }
 
-        list_add_tail(&ctx->link, &dev_priv->context_list);
+                if (INTEL_INFO(dev)->gen >= 7) {
+                        ret = i915_gem_object_set_cache_level(ctx->obj,
+                                                              I915_CACHE_L3_LLC);
+                        /* Failure shouldn't ever happen this early */
+                        if (WARN_ON(ret))
+                                goto err_out;
+                }
+        }
 
         /* Default context will never have a file_priv */
-        if (file_priv == NULL)
-                return ctx;
-
-        ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID, 0,
-                        GFP_KERNEL);
-        if (ret < 0)
-                goto err_out;
+        if (file_priv != NULL) {
+                ret = idr_alloc(&file_priv->context_idr, ctx,
+                                DEFAULT_CONTEXT_ID, 0, GFP_KERNEL);
+                if (ret < 0)
+                        goto err_out;
+        } else
+                ret = DEFAULT_CONTEXT_ID;
 
         ctx->file_priv = file_priv;
         ctx->id = ret;
@@ -294,7 +293,7 @@ i915_gem_create_context(struct drm_device *dev,
         if (IS_ERR(ctx))
                 return ctx;
 
-        if (is_global_default_ctx) {
+        if (is_global_default_ctx && ctx->obj) {
                 /* We may need to do things with the shrinker which
                  * require us to immediately switch back to the default
                  * context. This can cause a problem as pinning the
@@ -342,7 +341,7 @@ i915_gem_create_context(struct drm_device *dev,
         return ctx;
 
 err_unpin:
-        if (is_global_default_ctx)
+        if (is_global_default_ctx && ctx->obj)
                 i915_gem_object_ggtt_unpin(ctx->obj);
 err_destroy:
         i915_gem_context_unreference(ctx);
@@ -352,32 +351,22 @@ err_destroy:
 void i915_gem_context_reset(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
-        struct intel_ring_buffer *ring;
         int i;
 
-        if (!HAS_HW_CONTEXTS(dev))
-                return;
-
         /* Prevent the hardware from restoring the last context (which hung) on
          * the next switch */
         for (i = 0; i < I915_NUM_RINGS; i++) {
-                struct i915_hw_context *dctx;
-                if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
-                        continue;
+                struct intel_ring_buffer *ring = &dev_priv->ring[i];
+                struct i915_hw_context *dctx = ring->default_context;
 
                 /* Do a fake switch to the default context */
-                ring = &dev_priv->ring[i];
-                dctx = ring->default_context;
-                if (WARN_ON(!dctx))
+                if (ring->last_context == dctx)
                         continue;
 
                 if (!ring->last_context)
                         continue;
 
-                if (ring->last_context == dctx)
-                        continue;
-
-                if (i == RCS) {
+                if (dctx->obj && i == RCS) {
                         WARN_ON(i915_gem_obj_ggtt_pin(dctx->obj,
                                                       get_context_alignment(dev), 0));
                         /* Fake a finish/inactive */
@@ -394,44 +383,35 @@ void i915_gem_context_reset(struct drm_device *dev)
 int i915_gem_context_init(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
-        struct intel_ring_buffer *ring;
+        struct i915_hw_context *ctx;
         int i;
 
-        if (!HAS_HW_CONTEXTS(dev))
-                return 0;
-
         /* Init should only be called once per module load. Eventually the
          * restriction on the context_disabled check can be loosened. */
         if (WARN_ON(dev_priv->ring[RCS].default_context))
                 return 0;
 
-        dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
-
-        if (dev_priv->hw_context_size > (1<<20)) {
-                DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
-                return -E2BIG;
+        if (HAS_HW_CONTEXTS(dev)) {
+                dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
+                if (dev_priv->hw_context_size > (1<<20)) {
+                        DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size %d\n",
+                                         dev_priv->hw_context_size);
+                        dev_priv->hw_context_size = 0;
+                }
         }
 
-        dev_priv->ring[RCS].default_context =
-                i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
-
-        if (IS_ERR_OR_NULL(dev_priv->ring[RCS].default_context)) {
-                DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %ld\n",
-                                 PTR_ERR(dev_priv->ring[RCS].default_context));
-                return PTR_ERR(dev_priv->ring[RCS].default_context);
+        ctx = i915_gem_create_context(dev, NULL, USES_PPGTT(dev));
+        if (IS_ERR(ctx)) {
+                DRM_ERROR("Failed to create default global context (error %ld)\n",
+                          PTR_ERR(ctx));
+                return PTR_ERR(ctx);
         }
 
-        for (i = RCS + 1; i < I915_NUM_RINGS; i++) {
-                if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
-                        continue;
-
-                ring = &dev_priv->ring[i];
+        /* NB: RCS will hold a ref for all rings */
+        for (i = 0; i < I915_NUM_RINGS; i++)
+                dev_priv->ring[i].default_context = ctx;
 
-                /* NB: RCS will hold a ref for all rings */
-                ring->default_context = dev_priv->ring[RCS].default_context;
-        }
-
-        DRM_DEBUG_DRIVER("HW context support initialized\n");
+        DRM_DEBUG_DRIVER("%s context support initialized\n", dev_priv->hw_context_size ? "HW" : "fake");
         return 0;
 }
 
@@ -441,33 +421,30 @@ void i915_gem_context_fini(struct drm_device *dev)
         struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
         int i;
 
-        if (!HAS_HW_CONTEXTS(dev))
-                return;
-
-        /* The only known way to stop the gpu from accessing the hw context is
-         * to reset it. Do this as the very last operation to avoid confusing
-         * other code, leading to spurious errors. */
-        intel_gpu_reset(dev);
-
-        /* When default context is created and switched to, base object refcount
-         * will be 2 (+1 from object creation and +1 from do_switch()).
-         * i915_gem_context_fini() will be called after gpu_idle() has switched
-         * to default context. So we need to unreference the base object once
-         * to offset the do_switch part, so that i915_gem_context_unreference()
-         * can then free the base object correctly. */
-        WARN_ON(!dev_priv->ring[RCS].last_context);
-        if (dev_priv->ring[RCS].last_context == dctx) {
-                /* Fake switch to NULL context */
-                WARN_ON(dctx->obj->active);
-                i915_gem_object_ggtt_unpin(dctx->obj);
-                i915_gem_context_unreference(dctx);
-                dev_priv->ring[RCS].last_context = NULL;
+        if (dctx->obj) {
+                /* The only known way to stop the gpu from accessing the hw context is
+                 * to reset it. Do this as the very last operation to avoid confusing
+                 * other code, leading to spurious errors. */
+                intel_gpu_reset(dev);
+
+                /* When default context is created and switched to, base object refcount
+                 * will be 2 (+1 from object creation and +1 from do_switch()).
+                 * i915_gem_context_fini() will be called after gpu_idle() has switched
+                 * to default context. So we need to unreference the base object once
+                 * to offset the do_switch part, so that i915_gem_context_unreference()
+                 * can then free the base object correctly. */
+                WARN_ON(!dev_priv->ring[RCS].last_context);
+                if (dev_priv->ring[RCS].last_context == dctx) {
+                        /* Fake switch to NULL context */
+                        WARN_ON(dctx->obj->active);
+                        i915_gem_object_ggtt_unpin(dctx->obj);
+                        i915_gem_context_unreference(dctx);
+                        dev_priv->ring[RCS].last_context = NULL;
+                }
         }
 
         for (i = 0; i < I915_NUM_RINGS; i++) {
                 struct intel_ring_buffer *ring = &dev_priv->ring[i];
-                if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
-                        continue;
 
                 if (ring->last_context)
                         i915_gem_context_unreference(ring->last_context);
@@ -478,7 +455,6 @@ void i915_gem_context_fini(struct drm_device *dev)
 
         i915_gem_object_ggtt_unpin(dctx->obj);
         i915_gem_context_unreference(dctx);
-        dev_priv->mm.aliasing_ppgtt = NULL;
 }
 
 int i915_gem_context_enable(struct drm_i915_private *dev_priv)
@@ -486,9 +462,6 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
         struct intel_ring_buffer *ring;
         int ret, i;
 
-        if (!HAS_HW_CONTEXTS(dev_priv->dev))
-                return 0;
-
         /* This is the only place the aliasing PPGTT gets enabled, which means
          * it has to happen before we bail on reset */
         if (dev_priv->mm.aliasing_ppgtt) {
@@ -503,7 +476,7 @@ int i915_gem_context_enable(struct drm_i915_private *dev_priv)
         BUG_ON(!dev_priv->ring[RCS].default_context);
 
         for_each_ring(ring, dev_priv, i) {
-                ret = do_switch(ring, ring->default_context);
+                ret = i915_switch_context(ring, ring->default_context);
                 if (ret)
                         return ret;
         }
@@ -526,19 +499,6 @@ static int context_idr_cleanup(int id, void *p, void *data)
 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
 {
         struct drm_i915_file_private *file_priv = file->driver_priv;
-        struct drm_i915_private *dev_priv = dev->dev_private;
-
-        if (!HAS_HW_CONTEXTS(dev)) {
-                /* Cheat for hang stats */
-                file_priv->private_default_ctx =
-                        kzalloc(sizeof(struct i915_hw_context), GFP_KERNEL);
-
-                if (file_priv->private_default_ctx == NULL)
-                        return -ENOMEM;
-
-                file_priv->private_default_ctx->vm = &dev_priv->gtt.base;
-                return 0;
-        }
 
         idr_init(&file_priv->context_idr);
 
@@ -559,14 +519,10 @@ void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
 {
         struct drm_i915_file_private *file_priv = file->driver_priv;
 
-        if (!HAS_HW_CONTEXTS(dev)) {
-                kfree(file_priv->private_default_ctx);
-                return;
-        }
-
         idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
-        i915_gem_context_unreference(file_priv->private_default_ctx);
         idr_destroy(&file_priv->context_idr);
+
+        i915_gem_context_unreference(file_priv->private_default_ctx);
 }
 
 struct i915_hw_context *
@@ -574,9 +530,6 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
 {
         struct i915_hw_context *ctx;
 
-        if (!HAS_HW_CONTEXTS(file_priv->dev_priv->dev))
-                return file_priv->private_default_ctx;
-
         ctx = (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
         if (!ctx)
                 return ERR_PTR(-ENOENT);
@@ -758,7 +711,6 @@ unpin_out:
 /**
  * i915_switch_context() - perform a GPU context switch.
  * @ring: ring for which we'll execute the context switch
- * @file_priv: file_priv associated with the context, may be NULL
  * @to: the context to switch to
  *
  * The context life cycle is simple. The context refcount is incremented and
@@ -767,24 +719,30 @@ unpin_out:
  * object while letting the normal object tracking destroy the backing BO.
  */
 int i915_switch_context(struct intel_ring_buffer *ring,
-                        struct drm_file *file,
                         struct i915_hw_context *to)
 {
         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 
         WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
-        BUG_ON(file && to == NULL);
-
-        /* We have the fake context */
-        if (!HAS_HW_CONTEXTS(ring->dev)) {
-                ring->last_context = to;
+        if (to->obj == NULL) { /* We have the fake context */
+                if (to != ring->last_context) {
+                        i915_gem_context_reference(to);
+                        if (ring->last_context)
+                                i915_gem_context_unreference(ring->last_context);
+                        ring->last_context = to;
+                }
                 return 0;
         }
 
         return do_switch(ring, to);
 }
 
+static bool hw_context_enabled(struct drm_device *dev)
+{
+        return to_i915(dev)->hw_context_size;
+}
+
 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
                                   struct drm_file *file)
 {
@@ -793,7 +751,7 @@ int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
         struct i915_hw_context *ctx;
         int ret;
 
-        if (!HAS_HW_CONTEXTS(dev))
+        if (!hw_context_enabled(dev))
                 return -ENODEV;
 
         ret = i915_mutex_lock_interruptible(dev);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 7447160155a3..2c9d9cbaf653 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1221,7 +1221,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
         if (ret)
                 goto err;
 
-        ret = i915_switch_context(ring, file, ctx);
+        ret = i915_switch_context(ring, ctx);
         if (ret)
                 goto err;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ab5e93c30aa2..62a5c3627b90 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -50,7 +50,7 @@ bool intel_enable_ppgtt(struct drm_device *dev, bool full)
 
         /* Full ppgtt disabled by default for now due to issues. */
         if (full)
-                return false; /* HAS_PPGTT(dev) */
+                return HAS_PPGTT(dev) && (i915.enable_ppgtt == 2);
         else
                 return HAS_ALIASING_PPGTT(dev);
 }
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7753249b3a95..f98ba4e6e70b 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1362,10 +1362,20 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
         spin_lock(&dev_priv->irq_lock);
         for (i = 1; i < HPD_NUM_PINS; i++) {
 
-                WARN_ONCE(hpd[i] & hotplug_trigger &&
-                          dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED,
-                          "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n",
-                          hotplug_trigger, i, hpd[i]);
+                if (hpd[i] & hotplug_trigger &&
+                    dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED) {
+                        /*
+                         * On GMCH platforms the interrupt mask bits only
+                         * prevent irq generation, not the setting of the
+                         * hotplug bits itself. So only WARN about unexpected
+                         * interrupts on saner platforms.
+                         */
+                        WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev),
+                                  "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n",
+                                  hotplug_trigger, i, hpd[i]);
+
+                        continue;
+                }
 
                 if (!(hpd[i] & hotplug_trigger) ||
                     dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9f5b18d9d885..c77af69c2d8f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -827,6 +827,7 @@ enum punit_power_well {
 # define MI_FLUSH_ENABLE                                (1 << 12)
 # define ASYNC_FLIP_PERF_DISABLE                        (1 << 14)
 # define MODE_IDLE                                      (1 << 9)
+# define STOP_RING                                      (1 << 8)
 
 #define GEN6_GT_MODE    0x20d0
 #define GEN7_GT_MODE    0x7008
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4867f4cc0938..fa486c5fbb02 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -287,6 +287,9 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
         const struct bdb_lfp_backlight_data *backlight_data;
         const struct bdb_lfp_backlight_data_entry *entry;
 
+        /* Err to enabling backlight if no backlight block. */
+        dev_priv->vbt.backlight.present = true;
+
         backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
         if (!backlight_data)
                 return;
@@ -299,6 +302,13 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
 
         entry = &backlight_data->data[panel_type];
 
+        dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
+        if (!dev_priv->vbt.backlight.present) {
+                DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
+                              entry->type);
+                return;
+        }
+
         dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
         dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
         DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 83b7629e4367..f27f7b282465 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -374,6 +374,9 @@ struct bdb_lvds_lfp_data {
         struct bdb_lvds_lfp_data_entry data[16];
 } __packed;
 
+#define BDB_BACKLIGHT_TYPE_NONE 0
+#define BDB_BACKLIGHT_TYPE_PWM  2
+
 struct bdb_lfp_backlight_data_entry {
         u8 type:2;
         u8 active_low_pwm:1;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index dae976f51d83..69bcc42a0e44 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9654,11 +9654,22 @@ intel_pipe_config_compare(struct drm_device *dev,
         PIPE_CONF_CHECK_I(pipe_src_w);
         PIPE_CONF_CHECK_I(pipe_src_h);
 
-        PIPE_CONF_CHECK_I(gmch_pfit.control);
-        /* pfit ratios are autocomputed by the hw on gen4+ */
-        if (INTEL_INFO(dev)->gen < 4)
-                PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
-        PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
+        /*
+         * FIXME: BIOS likes to set up a cloned config with lvds+external
+         * screen. Since we don't yet re-compute the pipe config when moving
+         * just the lvds port away to another pipe the sw tracking won't match.
+         *
+         * Proper atomic modesets with recomputed global state will fix this.
+         * Until then just don't check gmch state for inherited modes.
+         */
+        if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) {
+                PIPE_CONF_CHECK_I(gmch_pfit.control);
+                /* pfit ratios are autocomputed by the hw on gen4+ */
+                if (INTEL_INFO(dev)->gen < 4)
+                        PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
+                PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
+        }
+
         PIPE_CONF_CHECK_I(pch_pfit.enabled);
         if (current_config->pch_pfit.enabled) {
                 PIPE_CONF_CHECK_I(pch_pfit.pos);
@@ -11616,6 +11627,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
                             base.head) {
                 memset(&crtc->config, 0, sizeof(crtc->config));
 
+                crtc->config.quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;
+
                 crtc->active = dev_priv->display.get_pipe_config(crtc,
                                                                  &crtc->config);
 
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index a0dad1a2f819..dfa85289f28f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -575,7 +575,8 @@ out:
         return ret;
 }
 
-#define HEADER_SIZE     4
+#define BARE_ADDRESS_SIZE       3
+#define HEADER_SIZE             (BARE_ADDRESS_SIZE + 1)
 static ssize_t
 intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
@@ -592,7 +593,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
         switch (msg->request & ~DP_AUX_I2C_MOT) {
         case DP_AUX_NATIVE_WRITE:
         case DP_AUX_I2C_WRITE:
-                txsize = HEADER_SIZE + msg->size;
+                txsize = msg->size ? HEADER_SIZE + msg->size : BARE_ADDRESS_SIZE;
                 rxsize = 1;
 
                 if (WARN_ON(txsize > 20))
@@ -611,7 +612,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 
         case DP_AUX_NATIVE_READ:
         case DP_AUX_I2C_READ:
-                txsize = HEADER_SIZE;
+                txsize = msg->size ? HEADER_SIZE : BARE_ADDRESS_SIZE;
                 rxsize = msg->size + 1;
 
                 if (WARN_ON(rxsize > 20))
@@ -3618,7 +3619,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 {
         struct drm_connector *connector = &intel_connector->base;
         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-        struct drm_device *dev = intel_dig_port->base.base.dev;
+        struct intel_encoder *intel_encoder = &intel_dig_port->base;
+        struct drm_device *dev = intel_encoder->base.dev;
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct drm_display_mode *fixed_mode = NULL;
         bool has_dpcd;
@@ -3628,6 +3630,14 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
         if (!is_edp(intel_dp))
                 return true;
 
+        /* The VDD bit needs a power domain reference, so if the bit is already
+         * enabled when we boot, grab this reference. */
+        if (edp_have_panel_vdd(intel_dp)) {
+                enum intel_display_power_domain power_domain;
+                power_domain = intel_display_port_power_domain(intel_encoder);
+                intel_display_power_get(dev_priv, power_domain);
+        }
+
         /* Cache DPCD and EDID for edp. */
         intel_edp_panel_vdd_on(intel_dp);
         has_dpcd = intel_dp_get_dpcd(intel_dp);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0542de982260..328b1a70264b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -236,7 +236,8 @@ struct intel_crtc_config {
          * tracked with quirk flags so that fastboot and state checker can act
          * accordingly.
          */
-#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
+#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS       (1<<0) /* unreliable sync mode.flags */
+#define PIPE_CONFIG_QUIRK_INHERITED_MODE        (1<<1) /* mode inherited from firmware */
         unsigned long quirks;
 
         /* User requested mode, only valid as a starting point to
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index b4d44e62f0c7..fce4a0d93c0b 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -132,6 +132,16 @@ static int intelfb_create(struct drm_fb_helper *helper,
 
         mutex_lock(&dev->struct_mutex);
 
+        if (intel_fb &&
+            (sizes->fb_width > intel_fb->base.width ||
+             sizes->fb_height > intel_fb->base.height)) {
+                DRM_DEBUG_KMS("BIOS fb too small (%dx%d), we require (%dx%d),"
+                              " releasing it\n",
+                              intel_fb->base.width, intel_fb->base.height,
+                              sizes->fb_width, sizes->fb_height);
+                drm_framebuffer_unreference(&intel_fb->base);
+                intel_fb = ifbdev->fb = NULL;
+        }
         if (!intel_fb || WARN_ON(!intel_fb->obj)) {
                 DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n");
                 ret = intelfb_alloc(helper, sizes);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index b0413e190625..157267aa3561 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -821,11 +821,11 @@ static void intel_disable_hdmi(struct intel_encoder *encoder)
         }
 }
 
-static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
+static int hdmi_portclock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit)
 {
         struct drm_device *dev = intel_hdmi_to_dev(hdmi);
 
-        if (!hdmi->has_hdmi_sink || IS_G4X(dev))
+        if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev))
                 return 165000;
         else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8)
                 return 300000;
@@ -837,7 +837,8 @@ static enum drm_mode_status
 intel_hdmi_mode_valid(struct drm_connector *connector,
                       struct drm_display_mode *mode)
 {
-        if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector)))
+        if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector),
+                                               true))
                 return MODE_CLOCK_HIGH;
         if (mode->clock < 20000)
                 return MODE_CLOCK_LOW;
@@ -879,7 +880,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
         struct drm_device *dev = encoder->base.dev;
         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
         int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2;
-        int portclock_limit = hdmi_portclock_limit(intel_hdmi);
+        int portclock_limit = hdmi_portclock_limit(intel_hdmi, false);
         int desired_bpp;
 
         if (intel_hdmi->color_range_auto) {
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index cb058408c70e..0eead16aeda7 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1065,6 +1065,11 @@ int intel_panel_setup_backlight(struct drm_connector *connector)
         unsigned long flags;
         int ret;
 
+        if (!dev_priv->vbt.backlight.present) {
+                DRM_DEBUG_KMS("native backlight control not available per VBT\n");
+                return 0;
+        }
+
         /* set level and max in panel struct */
         spin_lock_irqsave(&dev_priv->backlight_lock, flags);
         ret = dev_priv->display.setup_backlight(intel_connector);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5874716774a7..19e94c3edc19 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1545,6 +1545,16 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
 
         DRM_DEBUG_KMS("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
 
+        if (IS_I915GM(dev) && enabled) {
+                struct intel_framebuffer *fb;
+
+                fb = to_intel_framebuffer(enabled->primary->fb);
+
+                /* self-refresh seems busted with untiled */
+                if (fb->obj->tiling_mode == I915_TILING_NONE)
+                        enabled = NULL;
+        }
+
         /*
          * Overlay gets an aggressive default since video jitter is bad.
          */
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6bc68bdcf433..79fb4cc2137c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -437,32 +437,41 @@ static void ring_setup_phys_status_page(struct intel_ring_buffer *ring)
         I915_WRITE(HWS_PGA, addr);
 }
 
-static int init_ring_common(struct intel_ring_buffer *ring)
+static bool stop_ring(struct intel_ring_buffer *ring)
 {
-        struct drm_device *dev = ring->dev;
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        struct drm_i915_gem_object *obj = ring->obj;
-        int ret = 0;
-        u32 head;
+        struct drm_i915_private *dev_priv = to_i915(ring->dev);
 
-        gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+        if (!IS_GEN2(ring->dev)) {
+                I915_WRITE_MODE(ring, _MASKED_BIT_ENABLE(STOP_RING));
+                if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) {
+                        DRM_ERROR("%s :timed out trying to stop ring\n", ring->name);
+                        return false;
+                }
+        }
 
-        /* Stop the ring if it's running. */
         I915_WRITE_CTL(ring, 0);
         I915_WRITE_HEAD(ring, 0);
         ring->write_tail(ring, 0);
-        if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000))
-                DRM_ERROR("%s :timed out trying to stop ring\n", ring->name);
 
-        if (I915_NEED_GFX_HWS(dev))
-                intel_ring_setup_status_page(ring);
-        else
-                ring_setup_phys_status_page(ring);
+        if (!IS_GEN2(ring->dev)) {
+                (void)I915_READ_CTL(ring);
+                I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
+        }
 
-        head = I915_READ_HEAD(ring) & HEAD_ADDR;
+        return (I915_READ_HEAD(ring) & HEAD_ADDR) == 0;
+}
 
-        /* G45 ring initialization fails to reset head to zero */
-        if (head != 0) {
+static int init_ring_common(struct intel_ring_buffer *ring)
+{
+        struct drm_device *dev = ring->dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct drm_i915_gem_object *obj = ring->obj;
+        int ret = 0;
+
+        gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
+
+        if (!stop_ring(ring)) {
+                /* G45 ring initialization often fails to reset head to zero */
                 DRM_DEBUG_KMS("%s head not reset to zero "
                               "ctl %08x head %08x tail %08x start %08x\n",
                               ring->name,
@@ -471,9 +480,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
                               I915_READ_TAIL(ring),
                               I915_READ_START(ring));
 
-                I915_WRITE_HEAD(ring, 0);
-
-                if (I915_READ_HEAD(ring) & HEAD_ADDR) {
+                if (!stop_ring(ring)) {
                         DRM_ERROR("failed to set %s head to zero "
                                   "ctl %08x head %08x tail %08x start %08x\n",
                                   ring->name,
@@ -481,9 +488,16 @@ static int init_ring_common(struct intel_ring_buffer *ring)
                                   I915_READ_HEAD(ring),
                                   I915_READ_TAIL(ring),
                                   I915_READ_START(ring));
+                        ret = -EIO;
+                        goto out;
                 }
         }
 
+        if (I915_NEED_GFX_HWS(dev))
+                intel_ring_setup_status_page(ring);
+        else
+                ring_setup_phys_status_page(ring);
+
         /* Initialize the ring. This must happen _after_ we've cleared the ring
          * registers with the above sequence (the readback of the HEAD registers
          * also enforces ordering), otherwise the hw might lose the new ring
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 270a6a973438..2b91c4b4d34b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -34,6 +34,7 @@ struct  intel_hw_status_page {
 #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
 
 #define I915_READ_MODE(ring) I915_READ(RING_MI_MODE((ring)->mmio_base))
+#define I915_WRITE_MODE(ring, val) I915_WRITE(RING_MI_MODE((ring)->mmio_base), val)
 
 enum intel_ring_hangcheck_action {
         HANGCHECK_IDLE = 0,