diff options
author | Damien Lespiau <damien.lespiau@intel.com> | 2012-10-19 12:55:41 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-19 14:30:51 -0400 |
commit | 231e54f6391ccc7a3377df5bbaff3800822def1d (patch) | |
tree | b9af38073ae8baca34f07ad836433ea57c989efa /drivers/gpu/drm/i915/i915_reg.h | |
parent | 36ec8f877481449bdfa072e6adf2060869e2b970 (diff) |
drm/i915: Consolidate ILK_DSPCLK_GATE and PCH_DSPCLK_GATE
Register 0x42020 was defined twice under the names PCH_DSPCLK_GATE_D and
ILK_DSPCLK_GATE. This patch consolidate the 2 sets of defines in one.
The transforms done are:
PCH_DSPCLK_GATE_D -> ILK_DSPCLK_GATE_D
ILK_DSPCLK_GATE -> ILK_DSPCLK_GATE_D
DPARBUNIT_CLOCK_GATE_DISABLE -> ILK_DPARBUNIT_CLOCK_GATE_DISABLE
ILK_DPARB_CLK_GATE -> ILK_DPARBUNIT_CLOCK_GATE_DISABLE
DPFDUNIT_CLOCK_GATE_DISABLE -> ILK_DPFDUNIT_CLOCK_GATE_DISABLE
ILK_DPFD_CLK_GATE -> ILK_DPFDUNIT_CLOCK_GATE_DISABLE
ILK_CLK_FBC -> ILK_DPFDUNIT_CLOCK_GATE_DISABLE
DPFCRUNIT_CLOCK_GATE_DISABLE -> ILK_DPFCRUNIT_CLOCK_GATE_DISABLE
ILK_DPFC_DIS1 -> ILK_DPFCRUNIT_CLOCK_GATE_DISABLE
DPFCUNIT_CLOCK_GATE_DISABLE -> ILK_DPFCUNIT_CLOCK_GATE_DISABLE
ILK_DPFC_DIS2 -> ILK_DPFCUNIT_CLOCK_GATE_DISABLE
We have a VHRUNIT_CLOCK_GATE_DISABLE define for the pre-ILK DSPCLK_GATE_D.
Even if the same bit is used in ILK_DSPCLK_GATE_D, other bits in the
register change, so I went with re-defining it, well more precisely rename
IVB_VRHUNIT_CLK_GATE, which is not specific to IVB+. So:
IVB_VRHUNIT_CLK_GATE -> ILK_VHRUNIT_CLOCK_GATE_DISABLE
VHRUNIT_CLOCK_GATE_DISABLE -> ILK_VHRUNIT_CLOCK_GATE_DISABLE (ILK+ code)
This commit is only a renaming commit, further commits will clean up the
logic.
v2: Rename bit 5 and 7 to _ENABLE as setting them to 1 enables clock
gating on their respective units, contrary to all of the other bits
(Paulo Zanoni)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 22 |
1 files changed, 7 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c31ee5bd1a56..08c51ab43c50 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -3248,12 +3248,6 @@ | |||
3248 | #define DISPLAY_PORT_PLL_BIOS_1 0x46010 | 3248 | #define DISPLAY_PORT_PLL_BIOS_1 0x46010 |
3249 | #define DISPLAY_PORT_PLL_BIOS_2 0x46014 | 3249 | #define DISPLAY_PORT_PLL_BIOS_2 0x46014 |
3250 | 3250 | ||
3251 | #define PCH_DSPCLK_GATE_D 0x42020 | ||
3252 | # define DPFCUNIT_CLOCK_GATE_DISABLE (1 << 9) | ||
3253 | # define DPFCRUNIT_CLOCK_GATE_DISABLE (1 << 8) | ||
3254 | # define DPFDUNIT_CLOCK_GATE_DISABLE (1 << 7) | ||
3255 | # define DPARBUNIT_CLOCK_GATE_DISABLE (1 << 5) | ||
3256 | |||
3257 | #define PCH_3DCGDIS0 0x46020 | 3251 | #define PCH_3DCGDIS0 0x46020 |
3258 | # define MARIUNIT_CLOCK_GATE_DISABLE (1 << 18) | 3252 | # define MARIUNIT_CLOCK_GATE_DISABLE (1 << 18) |
3259 | # define SVSMUNIT_CLOCK_GATE_DISABLE (1 << 1) | 3253 | # define SVSMUNIT_CLOCK_GATE_DISABLE (1 << 1) |
@@ -3425,15 +3419,13 @@ | |||
3425 | #define ILK_HDCP_DISABLE (1<<25) | 3419 | #define ILK_HDCP_DISABLE (1<<25) |
3426 | #define ILK_eDP_A_DISABLE (1<<24) | 3420 | #define ILK_eDP_A_DISABLE (1<<24) |
3427 | #define ILK_DESKTOP (1<<23) | 3421 | #define ILK_DESKTOP (1<<23) |
3428 | #define ILK_DSPCLK_GATE 0x42020 | 3422 | |
3429 | #define IVB_VRHUNIT_CLK_GATE (1<<28) | 3423 | #define ILK_DSPCLK_GATE_D 0x42020 |
3430 | #define ILK_DPARB_CLK_GATE (1<<5) | 3424 | #define ILK_VRHUNIT_CLOCK_GATE_DISABLE (1 << 28) |
3431 | #define ILK_DPFD_CLK_GATE (1<<7) | 3425 | #define ILK_DPFCUNIT_CLOCK_GATE_DISABLE (1 << 9) |
3432 | 3426 | #define ILK_DPFCRUNIT_CLOCK_GATE_DISABLE (1 << 8) | |
3433 | /* According to spec this bit 7/8/9 of 0x42020 should be set to enable FBC */ | 3427 | #define ILK_DPFDUNIT_CLOCK_GATE_ENABLE (1 << 7) |
3434 | #define ILK_CLK_FBC (1<<7) | 3428 | #define ILK_DPARBUNIT_CLOCK_GATE_ENABLE (1 << 5) |
3435 | #define ILK_DPFC_DIS1 (1<<8) | ||
3436 | #define ILK_DPFC_DIS2 (1<<9) | ||
3437 | 3429 | ||
3438 | #define IVB_CHICKEN3 0x4200c | 3430 | #define IVB_CHICKEN3 0x4200c |
3439 | # define CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE (1 << 5) | 3431 | # define CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE (1 << 5) |