aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_irq.c
diff options
context:
space:
mode:
authorJesse Barnes <jbarnes@virtuousgeek.org>2008-07-29 14:54:06 -0400
committerDave Airlie <airlied@linux.ie>2008-10-17 17:10:10 -0400
commit585fb111348f7cdc30c6a1b903987612ddeafb23 (patch)
tree7998ada4b4cb1c251d808f5cba30b3b4174e70cf /drivers/gpu/drm/i915/i915_irq.c
parent962d4fd7273e144ae003ddb90138ae4b80567c70 (diff)
i915: Use more consistent names for regs, and store them in a separate file.
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c73
1 files changed, 36 insertions, 37 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index df036118b8b1..4a2de7897344 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -31,10 +31,6 @@
31#include "i915_drm.h" 31#include "i915_drm.h"
32#include "i915_drv.h" 32#include "i915_drv.h"
33 33
34#define USER_INT_FLAG (1<<1)
35#define VSYNC_PIPEB_FLAG (1<<5)
36#define VSYNC_PIPEA_FLAG (1<<7)
37
38#define MAX_NOPID ((u32)~0) 34#define MAX_NOPID ((u32)~0)
39 35
40/** 36/**
@@ -236,40 +232,43 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
236 u16 temp; 232 u16 temp;
237 u32 pipea_stats, pipeb_stats; 233 u32 pipea_stats, pipeb_stats;
238 234
239 pipea_stats = I915_READ(I915REG_PIPEASTAT); 235 pipea_stats = I915_READ(PIPEASTAT);
240 pipeb_stats = I915_READ(I915REG_PIPEBSTAT); 236 pipeb_stats = I915_READ(PIPEBSTAT);
241 237
242 temp = I915_READ16(I915REG_INT_IDENTITY_R); 238 temp = I915_READ16(IIR);
243 239
244 temp &= (USER_INT_FLAG | VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG); 240 temp &= (I915_USER_INTERRUPT |
241 I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
242 I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT);
245 243
246 DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp); 244 DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp);
247 245
248 if (temp == 0) 246 if (temp == 0)
249 return IRQ_NONE; 247 return IRQ_NONE;
250 248
251 I915_WRITE16(I915REG_INT_IDENTITY_R, temp); 249 I915_WRITE16(IIR, temp);
252 (void) I915_READ16(I915REG_INT_IDENTITY_R); 250 (void) I915_READ16(IIR);
253 DRM_READMEMORYBARRIER(); 251 DRM_READMEMORYBARRIER();
254 252
255 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); 253 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
256 254
257 if (temp & USER_INT_FLAG) 255 if (temp & I915_USER_INTERRUPT)
258 DRM_WAKEUP(&dev_priv->irq_queue); 256 DRM_WAKEUP(&dev_priv->irq_queue);
259 257
260 if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) { 258 if (temp & (I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
259 I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)) {
261 int vblank_pipe = dev_priv->vblank_pipe; 260 int vblank_pipe = dev_priv->vblank_pipe;
262 261
263 if ((vblank_pipe & 262 if ((vblank_pipe &
264 (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) 263 (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B))
265 == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) { 264 == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) {
266 if (temp & VSYNC_PIPEA_FLAG) 265 if (temp & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT)
267 atomic_inc(&dev->vbl_received); 266 atomic_inc(&dev->vbl_received);
268 if (temp & VSYNC_PIPEB_FLAG) 267 if (temp & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)
269 atomic_inc(&dev->vbl_received2); 268 atomic_inc(&dev->vbl_received2);
270 } else if (((temp & VSYNC_PIPEA_FLAG) && 269 } else if (((temp & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) &&
271 (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) || 270 (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) ||
272 ((temp & VSYNC_PIPEB_FLAG) && 271 ((temp & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) &&
273 (vblank_pipe & DRM_I915_VBLANK_PIPE_B))) 272 (vblank_pipe & DRM_I915_VBLANK_PIPE_B)))
274 atomic_inc(&dev->vbl_received); 273 atomic_inc(&dev->vbl_received);
275 274
@@ -278,12 +277,12 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
278 277
279 if (dev_priv->swaps_pending > 0) 278 if (dev_priv->swaps_pending > 0)
280 drm_locked_tasklet(dev, i915_vblank_tasklet); 279 drm_locked_tasklet(dev, i915_vblank_tasklet);
281 I915_WRITE(I915REG_PIPEASTAT, 280 I915_WRITE(PIPEASTAT,
282 pipea_stats|I915_VBLANK_INTERRUPT_ENABLE| 281 pipea_stats|I915_VBLANK_INTERRUPT_ENABLE|
283 I915_VBLANK_CLEAR); 282 PIPE_VBLANK_INTERRUPT_STATUS);
284 I915_WRITE(I915REG_PIPEBSTAT, 283 I915_WRITE(PIPEBSTAT,
285 pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE| 284 pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE|
286 I915_VBLANK_CLEAR); 285 PIPE_VBLANK_INTERRUPT_STATUS);
287 } 286 }
288 287
289 return IRQ_HANDLED; 288 return IRQ_HANDLED;
@@ -304,12 +303,12 @@ static int i915_emit_irq(struct drm_device * dev)
304 dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1; 303 dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
305 304
306 BEGIN_LP_RING(6); 305 BEGIN_LP_RING(6);
307 OUT_RING(CMD_STORE_DWORD_IDX); 306 OUT_RING(MI_STORE_DWORD_INDEX);
308 OUT_RING(20); 307 OUT_RING(5 << MI_STORE_DWORD_INDEX_SHIFT);
309 OUT_RING(dev_priv->counter); 308 OUT_RING(dev_priv->counter);
310 OUT_RING(0); 309 OUT_RING(0);
311 OUT_RING(0); 310 OUT_RING(0);
312 OUT_RING(GFX_OP_USER_INTERRUPT); 311 OUT_RING(MI_USER_INTERRUPT);
313 ADVANCE_LP_RING(); 312 ADVANCE_LP_RING();
314 313
315 return dev_priv->counter; 314 return dev_priv->counter;
@@ -421,11 +420,11 @@ static void i915_enable_interrupt (struct drm_device *dev)
421 420
422 flag = 0; 421 flag = 0;
423 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A) 422 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)
424 flag |= VSYNC_PIPEA_FLAG; 423 flag |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
425 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) 424 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
426 flag |= VSYNC_PIPEB_FLAG; 425 flag |= I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
427 426
428 I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag); 427 I915_WRITE16(IER, I915_USER_INTERRUPT | flag);
429} 428}
430 429
431/* Set the vblank monitor pipe 430/* Set the vblank monitor pipe
@@ -465,11 +464,11 @@ int i915_vblank_pipe_get(struct drm_device *dev, void *data,
465 return -EINVAL; 464 return -EINVAL;
466 } 465 }
467 466
468 flag = I915_READ(I915REG_INT_ENABLE_R); 467 flag = I915_READ(IER);
469 pipe->pipe = 0; 468 pipe->pipe = 0;
470 if (flag & VSYNC_PIPEA_FLAG) 469 if (flag & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT)
471 pipe->pipe |= DRM_I915_VBLANK_PIPE_A; 470 pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
472 if (flag & VSYNC_PIPEB_FLAG) 471 if (flag & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT)
473 pipe->pipe |= DRM_I915_VBLANK_PIPE_B; 472 pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
474 473
475 return 0; 474 return 0;
@@ -587,9 +586,9 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
587{ 586{
588 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 587 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
589 588
590 I915_WRITE16(I915REG_HWSTAM, 0xfffe); 589 I915_WRITE16(HWSTAM, 0xfffe);
591 I915_WRITE16(I915REG_INT_MASK_R, 0x0); 590 I915_WRITE16(IMR, 0x0);
592 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); 591 I915_WRITE16(IER, 0x0);
593} 592}
594 593
595void i915_driver_irq_postinstall(struct drm_device * dev) 594void i915_driver_irq_postinstall(struct drm_device * dev)
@@ -614,10 +613,10 @@ void i915_driver_irq_uninstall(struct drm_device * dev)
614 if (!dev_priv) 613 if (!dev_priv)
615 return; 614 return;
616 615
617 I915_WRITE16(I915REG_HWSTAM, 0xffff); 616 I915_WRITE16(HWSTAM, 0xffff);
618 I915_WRITE16(I915REG_INT_MASK_R, 0xffff); 617 I915_WRITE16(IMR, 0xffff);
619 I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); 618 I915_WRITE16(IER, 0x0);
620 619
621 temp = I915_READ16(I915REG_INT_IDENTITY_R); 620 temp = I915_READ16(IIR);
622 I915_WRITE16(I915REG_INT_IDENTITY_R, temp); 621 I915_WRITE16(IIR, temp);
623} 622}