aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem.c
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2010-09-13 18:56:38 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-14 05:34:27 -0400
commit7213342db58adb7b8e399a00fc423951d7f75369 (patch)
treea302b3708792f34fed855fe6ce3301de7bea8c64 /drivers/gpu/drm/i915/i915_gem.c
parentb3b079dbef06c7f775178d561a4c8e47b7447139 (diff)
drm/i915: Consolidate flushing the display plane
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c42
1 files changed, 10 insertions, 32 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9391765af70d..328f8c9ee966 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2645,26 +2645,6 @@ i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj)
2645 old_write_domain); 2645 old_write_domain);
2646} 2646}
2647 2647
2648int
2649i915_gem_object_flush_write_domain(struct drm_gem_object *obj)
2650{
2651 int ret = 0;
2652
2653 switch (obj->write_domain) {
2654 case I915_GEM_DOMAIN_GTT:
2655 i915_gem_object_flush_gtt_write_domain(obj);
2656 break;
2657 case I915_GEM_DOMAIN_CPU:
2658 i915_gem_object_flush_cpu_write_domain(obj);
2659 break;
2660 default:
2661 ret = i915_gem_object_flush_gpu_write_domain(obj, true);
2662 break;
2663 }
2664
2665 return ret;
2666}
2667
2668/** 2648/**
2669 * Moves a single object to the GTT read, and possibly write domain. 2649 * Moves a single object to the GTT read, and possibly write domain.
2670 * 2650 *
@@ -2686,21 +2666,16 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
2686 if (ret != 0) 2666 if (ret != 0)
2687 return ret; 2667 return ret;
2688 2668
2689 old_write_domain = obj->write_domain; 2669 i915_gem_object_flush_cpu_write_domain(obj);
2690 old_read_domains = obj->read_domains;
2691 2670
2692 /* If we're writing through the GTT domain, then CPU and GPU caches
2693 * will need to be invalidated at next use.
2694 */
2695 if (write) { 2671 if (write) {
2696 ret = i915_gem_object_wait_rendering(obj); 2672 ret = i915_gem_object_wait_rendering(obj);
2697 if (ret) 2673 if (ret)
2698 return ret; 2674 return ret;
2699
2700 obj->read_domains &= I915_GEM_DOMAIN_GTT;
2701 } 2675 }
2702 2676
2703 i915_gem_object_flush_cpu_write_domain(obj); 2677 old_write_domain = obj->write_domain;
2678 old_read_domains = obj->read_domains;
2704 2679
2705 /* It should now be out of any other write domains, and we can update 2680 /* It should now be out of any other write domains, and we can update
2706 * the domain values for our changes. 2681 * the domain values for our changes.
@@ -2708,6 +2683,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
2708 BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0); 2683 BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
2709 obj->read_domains |= I915_GEM_DOMAIN_GTT; 2684 obj->read_domains |= I915_GEM_DOMAIN_GTT;
2710 if (write) { 2685 if (write) {
2686 obj->read_domains = I915_GEM_DOMAIN_GTT;
2711 obj->write_domain = I915_GEM_DOMAIN_GTT; 2687 obj->write_domain = I915_GEM_DOMAIN_GTT;
2712 obj_priv->dirty = 1; 2688 obj_priv->dirty = 1;
2713 } 2689 }
@@ -2773,6 +2749,12 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
2773 */ 2749 */
2774 i915_gem_object_set_to_full_cpu_read_domain(obj); 2750 i915_gem_object_set_to_full_cpu_read_domain(obj);
2775 2751
2752 if (write) {
2753 ret = i915_gem_object_wait_rendering(obj);
2754 if (ret)
2755 return ret;
2756 }
2757
2776 old_write_domain = obj->write_domain; 2758 old_write_domain = obj->write_domain;
2777 old_read_domains = obj->read_domains; 2759 old_read_domains = obj->read_domains;
2778 2760
@@ -2792,10 +2774,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
2792 * need to be invalidated at next use. 2774 * need to be invalidated at next use.
2793 */ 2775 */
2794 if (write) { 2776 if (write) {
2795 ret = i915_gem_object_wait_rendering(obj);
2796 if (ret)
2797 return ret;
2798
2799 obj->read_domains &= I915_GEM_DOMAIN_CPU; 2777 obj->read_domains &= I915_GEM_DOMAIN_CPU;
2800 obj->write_domain = I915_GEM_DOMAIN_CPU; 2778 obj->write_domain = I915_GEM_DOMAIN_CPU;
2801 } 2779 }