diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-09-12 07:02:26 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-12 07:02:26 -0400 |
| commit | ddd559b13f6d2fe3ad68c4b3f5235fd3c2eae4e3 (patch) | |
| tree | d827bca3fc825a0ac33efbcd493713be40fcc812 /drivers/edac | |
| parent | cf7a2b4fb6a9b86779930a0a123b0df41aa9208f (diff) | |
| parent | f17a1f06d2fa93f4825be572622eb02c4894db4e (diff) | |
Merge branch 'devel-stable' into devel
Conflicts:
MAINTAINERS
arch/arm/mm/fault.c
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 2 | ||||
| -rw-r--r-- | drivers/edac/x38_edac.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 858fe6037223..24964c1d0af9 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
| @@ -970,7 +970,7 @@ static void amd64_read_dct_base_mask(struct amd64_pvt *pvt) | |||
| 970 | } | 970 | } |
| 971 | 971 | ||
| 972 | for (cs = 0; cs < pvt->num_dcsm; cs++) { | 972 | for (cs = 0; cs < pvt->num_dcsm; cs++) { |
| 973 | reg = K8_DCSB0 + (cs * 4); | 973 | reg = K8_DCSM0 + (cs * 4); |
| 974 | err = pci_read_config_dword(pvt->dram_f2_ctl, reg, | 974 | err = pci_read_config_dword(pvt->dram_f2_ctl, reg, |
| 975 | &pvt->dcsm0[cs]); | 975 | &pvt->dcsm0[cs]); |
| 976 | if (unlikely(err)) | 976 | if (unlikely(err)) |
diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index 2406c2ce2844..d4ec60593176 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c | |||
| @@ -30,7 +30,7 @@ | |||
| 30 | /* Intel X38 register addresses - device 0 function 0 - DRAM Controller */ | 30 | /* Intel X38 register addresses - device 0 function 0 - DRAM Controller */ |
| 31 | 31 | ||
| 32 | #define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */ | 32 | #define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */ |
| 33 | #define X38_MCHBAR_HIGH 0x4b | 33 | #define X38_MCHBAR_HIGH 0x4c |
| 34 | #define X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */ | 34 | #define X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */ |
| 35 | #define X38_MMR_WINDOW_SIZE 16384 | 35 | #define X38_MMR_WINDOW_SIZE 16384 |
| 36 | 36 | ||