From 4afcd2dcc6d89da696fc9d469a909adafa9d3636 Mon Sep 17 00:00:00 2001 From: Wan Wei Date: Mon, 27 Jul 2009 14:34:15 +0200 Subject: amd64_edac: read the right F2 maskoffset reg Signed-off-by: Wan Wei Signed-off-by: Borislav Petkov --- drivers/edac/amd64_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/edac') diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 858fe6037223..24964c1d0af9 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -970,7 +970,7 @@ static void amd64_read_dct_base_mask(struct amd64_pvt *pvt) } for (cs = 0; cs < pvt->num_dcsm; cs++) { - reg = K8_DCSB0 + (cs * 4); + reg = K8_DCSM0 + (cs * 4); err = pci_read_config_dword(pvt->dram_f2_ctl, reg, &pvt->dcsm0[cs]); if (unlikely(err)) -- cgit v1.2.2 From 3d768213a6c34a27fac1804143da8cf18b8b175f Mon Sep 17 00:00:00 2001 From: Lu Zhihe Date: Wed, 29 Jul 2009 15:02:09 -0700 Subject: edac: x38 fix mchbar high register addr Intel X38 MCHBAR is a 64bits register, base from 0x48, so its higher base is 0x4C. Signed-off-by: Lu Zhihe Signed-off-by: Doug Thompson Cc: [2.6.30.x] Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/edac/x38_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/edac') diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index 2406c2ce2844..d4ec60593176 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c @@ -30,7 +30,7 @@ /* Intel X38 register addresses - device 0 function 0 - DRAM Controller */ #define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */ -#define X38_MCHBAR_HIGH 0x4b +#define X38_MCHBAR_HIGH 0x4c #define X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */ #define X38_MMR_WINDOW_SIZE 16384 -- cgit v1.2.2