diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2014-06-20 08:37:38 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-07-09 04:55:57 -0400 |
commit | 6b32fafee2bb5fcf0b3d3d04a9762d3a0212089e (patch) | |
tree | 150c5661c704174150299b62b82b10f704353934 /drivers/dma | |
parent | 7171511eaec5bf23fb06078f59784a3a0626b38f (diff) |
dmaengine: shdma: Add more register documentation
Also add a few definitions that were missing.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/dma')
-rw-r--r-- | drivers/dma/sh/shdmac.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c index 146d5df926db..1a6f6595c6c1 100644 --- a/drivers/dma/sh/shdmac.c +++ b/drivers/dma/sh/shdmac.c | |||
@@ -38,12 +38,12 @@ | |||
38 | #include "../dmaengine.h" | 38 | #include "../dmaengine.h" |
39 | #include "shdma.h" | 39 | #include "shdma.h" |
40 | 40 | ||
41 | /* DMA register */ | 41 | /* DMA registers */ |
42 | #define SAR 0x00 | 42 | #define SAR 0x00 /* Source Address Register */ |
43 | #define DAR 0x04 | 43 | #define DAR 0x04 /* Destination Address Register */ |
44 | #define TCR 0x08 | 44 | #define TCR 0x08 /* Transfer Count Register */ |
45 | #define CHCR 0x0C | 45 | #define CHCR 0x0C /* Channel Control Register */ |
46 | #define DMAOR 0x40 | 46 | #define DMAOR 0x40 /* DMA Operation Register */ |
47 | 47 | ||
48 | #define TEND 0x18 /* USB-DMAC */ | 48 | #define TEND 0x18 /* USB-DMAC */ |
49 | 49 | ||