diff options
author | Mike Turquette <mturquette@linaro.org> | 2014-03-19 00:34:45 -0400 |
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committer | Mike Turquette <mturquette@linaro.org> | 2014-03-19 00:34:45 -0400 |
commit | 06fa5ab32a1b246bf151edddf9aa5580d4021d92 (patch) | |
tree | bd54f7e93da03be4c5043eb8c616559895116b0e /drivers/clk | |
parent | e8e6b840c4b646ce5aaef27875a22251ebc4e0d6 (diff) | |
parent | e69a8543ec7730c46225c886f74f0ea57e4656c5 (diff) |
Merge tag 'clk-mvebu-3xx-3.15-2' of git://git.infradead.org/linux-mvebu into clk-next-mvebu
clock: mvebu new SoC changes for v3.15 (incremental pull #2)
- mvebu (Armada 375)
- fix ratio register offest
- mvebu (Armada 380)
- expand core divider clock driver to support 380 SoC (enables nand support)
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/mvebu/clk-corediv.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c index 4da60760be10..d1e5863d3375 100644 --- a/drivers/clk/mvebu/clk-corediv.c +++ b/drivers/clk/mvebu/clk-corediv.c | |||
@@ -204,6 +204,22 @@ static const struct clk_corediv_soc_desc armada370_corediv_soc = { | |||
204 | .ratio_offset = 0x8, | 204 | .ratio_offset = 0x8, |
205 | }; | 205 | }; |
206 | 206 | ||
207 | static const struct clk_corediv_soc_desc armada380_corediv_soc = { | ||
208 | .descs = mvebu_corediv_desc, | ||
209 | .ndescs = ARRAY_SIZE(mvebu_corediv_desc), | ||
210 | .ops = { | ||
211 | .enable = clk_corediv_enable, | ||
212 | .disable = clk_corediv_disable, | ||
213 | .is_enabled = clk_corediv_is_enabled, | ||
214 | .recalc_rate = clk_corediv_recalc_rate, | ||
215 | .round_rate = clk_corediv_round_rate, | ||
216 | .set_rate = clk_corediv_set_rate, | ||
217 | }, | ||
218 | .ratio_reload = BIT(8), | ||
219 | .enable_bit_offset = 16, | ||
220 | .ratio_offset = 0x4, | ||
221 | }; | ||
222 | |||
207 | static const struct clk_corediv_soc_desc armada375_corediv_soc = { | 223 | static const struct clk_corediv_soc_desc armada375_corediv_soc = { |
208 | .descs = mvebu_corediv_desc, | 224 | .descs = mvebu_corediv_desc, |
209 | .ndescs = ARRAY_SIZE(mvebu_corediv_desc), | 225 | .ndescs = ARRAY_SIZE(mvebu_corediv_desc), |
@@ -213,7 +229,7 @@ static const struct clk_corediv_soc_desc armada375_corediv_soc = { | |||
213 | .set_rate = clk_corediv_set_rate, | 229 | .set_rate = clk_corediv_set_rate, |
214 | }, | 230 | }, |
215 | .ratio_reload = BIT(8), | 231 | .ratio_reload = BIT(8), |
216 | .ratio_offset = 0x8, | 232 | .ratio_offset = 0x4, |
217 | }; | 233 | }; |
218 | 234 | ||
219 | static void __init | 235 | static void __init |
@@ -290,3 +306,10 @@ static void __init armada375_corediv_clk_init(struct device_node *node) | |||
290 | } | 306 | } |
291 | CLK_OF_DECLARE(armada375_corediv_clk, "marvell,armada-375-corediv-clock", | 307 | CLK_OF_DECLARE(armada375_corediv_clk, "marvell,armada-375-corediv-clock", |
292 | armada375_corediv_clk_init); | 308 | armada375_corediv_clk_init); |
309 | |||
310 | static void __init armada380_corediv_clk_init(struct device_node *node) | ||
311 | { | ||
312 | return mvebu_corediv_clk_init(node, &armada380_corediv_soc); | ||
313 | } | ||
314 | CLK_OF_DECLARE(armada380_corediv_clk, "marvell,armada-380-corediv-clock", | ||
315 | armada380_corediv_clk_init); | ||