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authorThomas Gleixner <tglx@linutronix.de>2014-03-12 11:01:07 -0400
committerThomas Gleixner <tglx@linutronix.de>2014-03-12 11:01:07 -0400
commitffb12cf002edbc5927079f51bebde428d601f723 (patch)
tree1f04d80df9db8883037d59c81f5836770eecfdc6 /arch
parent1a75b8e64571a85d5e648cfdf4c40e0d9923abc5 (diff)
parentc1bacbae8192dd2a9ebadd22d793b68054f6c6e5 (diff)
Merge branch 'irq/for-gpio' into irq/core
Merge the request/release callbacks which are in a separate branch for consumption by the gpio folks. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arc/mm/cache_arc700.c4
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/compressed/.gitignore1
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts11
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi3
-rw-r--r--arch/arm/boot/dts/bcm11351.dtsi2
-rw-r--r--arch/arm/boot/dts/dove.dtsi11
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts10
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi10
-rw-r--r--arch/arm/boot/dts/keystone-clocks.dtsi2
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dts8
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts2
-rw-r--r--arch/arm/boot/dts/omap3-igep0030.dts2
-rw-r--r--arch/arm/boot/dts/omap3-n9.dts2
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts4
-rw-r--r--arch/arm/boot/dts/omap3-n950.dts2
-rw-r--r--arch/arm/boot/dts/omap3-overo-storm-tobi.dts22
-rw-r--r--arch/arm/boot/dts/omap3-overo-tobi-common.dtsi (renamed from arch/arm/boot/dts/omap3-tobi.dts)3
-rw-r--r--arch/arm/boot/dts/omap3-overo-tobi.dts22
-rw-r--r--arch/arm/boot/dts/omap3-overo.dtsi3
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi2
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi2
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi2
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi12
-rw-r--r--arch/arm/boot/dts/tegra114.dtsi4
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi4
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu.dtsi2
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi4
-rw-r--r--arch/arm/boot/dts/testcases/tests-interrupts.dtsi58
-rw-r--r--arch/arm/boot/dts/testcases/tests-phandle.dtsi39
-rw-r--r--arch/arm/boot/dts/testcases/tests.dtsi2
-rw-r--r--arch/arm/boot/dts/versatile-pb.dts4
-rw-r--r--arch/arm/configs/tegra_defconfig3
-rw-r--r--arch/arm/include/asm/cacheflush.h1
-rw-r--r--arch/arm/include/asm/memory.h9
-rw-r--r--arch/arm/include/asm/pgtable-3level.h15
-rw-r--r--arch/arm/include/asm/spinlock.h15
-rw-r--r--arch/arm/kernel/head-common.S12
-rw-r--r--arch/arm/kernel/head.S2
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/kvm/arm.c3
-rw-r--r--arch/arm/kvm/interrupts.S11
-rw-r--r--arch/arm/mach-imx/Makefile2
-rw-r--r--arch/arm/mach-imx/common.h4
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c1
-rw-r--r--arch/arm/mach-omap2/Kconfig8
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c8
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c92
-rw-r--r--arch/arm/mach-omap2/gpmc.c4
-rw-r--r--arch/arm/mach-omap2/io.c9
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c20
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c9
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c21
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c4
-rw-r--r--arch/arm/mach-pxa/mioa701.c9
-rw-r--r--arch/arm/mach-sa1100/include/mach/collie.h2
-rw-r--r--arch/arm/mach-tegra/pm.c1
-rw-r--r--arch/arm/mach-tegra/tegra.c10
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/mm/dump.c3
-rw-r--r--arch/arm/mm/mm.h1
-rw-r--r--arch/arm/mm/mmu.c7
-rw-r--r--arch/arm/mm/proc-v6.S3
-rw-r--r--arch/arm/mm/proc-v7.S2
-rw-r--r--arch/arm64/include/asm/percpu.h8
-rw-r--r--arch/arm64/include/asm/pgtable.h10
-rw-r--r--arch/arm64/kernel/stacktrace.c6
-rw-r--r--arch/arm64/kvm/hyp.S27
-rw-r--r--arch/avr32/Makefile2
-rw-r--r--arch/avr32/boards/mimc200/fram.c1
-rw-r--r--arch/avr32/include/asm/Kbuild1
-rw-r--r--arch/avr32/include/asm/io.h2
-rw-r--r--arch/c6x/include/asm/cache.h1
-rw-r--r--arch/m68k/include/asm/Kbuild6
-rw-r--r--arch/m68k/include/asm/barrier.h8
-rw-r--r--arch/m68k/include/asm/unistd.h2
-rw-r--r--arch/m68k/include/uapi/asm/unistd.h2
-rw-r--r--arch/m68k/kernel/syscalltable.S2
-rw-r--r--arch/powerpc/include/asm/compat.h5
-rw-r--r--arch/powerpc/include/asm/eeh.h21
-rw-r--r--arch/powerpc/include/asm/hugetlb.h2
-rw-r--r--arch/powerpc/include/asm/opal.h4
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h26
-rw-r--r--arch/powerpc/include/asm/pgtable.h22
-rw-r--r--arch/powerpc/include/asm/ptrace.h16
-rw-r--r--arch/powerpc/include/asm/vdso.h6
-rw-r--r--arch/powerpc/kernel/crash_dump.c8
-rw-r--r--arch/powerpc/kernel/eeh.c32
-rw-r--r--arch/powerpc/kernel/ftrace.c1
-rw-r--r--arch/powerpc/kernel/misc_32.S5
-rw-r--r--arch/powerpc/kernel/process.c9
-rw-r--r--arch/powerpc/kernel/reloc_64.S1
-rw-r--r--arch/powerpc/kernel/signal_64.c4
-rw-r--r--arch/powerpc/kernel/vdso32/vdso32_wrapper.S2
-rw-r--r--arch/powerpc/kernel/vdso64/vdso64_wrapper.S2
-rw-r--r--arch/powerpc/mm/pgtable_64.c12
-rw-r--r--arch/powerpc/mm/subpage-prot.c2
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c128
-rw-r--r--arch/powerpc/platforms/powernv/eeh-powernv.c2
-rw-r--r--arch/powerpc/platforms/powernv/opal-xscom.c21
-rw-r--r--arch/powerpc/platforms/powernv/pci.c220
-rw-r--r--arch/powerpc/platforms/pseries/eeh_pseries.c2
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c22
-rw-r--r--arch/powerpc/platforms/pseries/pci.c22
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/pci/pci_dma.c8
-rw-r--r--arch/sh/include/cpu-sh2/cpu/cache.h2
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/cache.h4
-rw-r--r--arch/sh/include/cpu-sh3/cpu/cache.h2
-rw-r--r--arch/sh/include/cpu-sh4/cpu/cache.h2
-rw-r--r--arch/sh/kernel/cpu/init.c4
-rw-r--r--arch/sh/mm/cache-debugfs.c2
-rw-r--r--arch/sh/mm/cache-sh2.c4
-rw-r--r--arch/sh/mm/cache-sh2a.c6
-rw-r--r--arch/sh/mm/cache-sh4.c4
-rw-r--r--arch/sh/mm/cache-shx3.c4
-rw-r--r--arch/sh/mm/cache.c4
-rw-r--r--arch/sparc/Kconfig2
-rw-r--r--arch/sparc/mm/srmmu.c2
-rw-r--r--arch/x86/boot/compressed/aslr.c9
-rw-r--r--arch/x86/include/asm/efi.h1
-rw-r--r--arch/x86/include/asm/tsc.h2
-rw-r--r--arch/x86/kernel/cpu/perf_event.c11
-rw-r--r--arch/x86/kernel/cpu/perf_event.h1
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c11
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_uncore.c10
-rw-r--r--arch/x86/kernel/cpu/perf_event_p6.c48
-rw-r--r--arch/x86/kernel/head_32.S7
-rw-r--r--arch/x86/kernel/head_64.S6
-rw-r--r--arch/x86/kernel/machine_kexec_64.c2
-rw-r--r--arch/x86/kernel/pci-dma.c4
-rw-r--r--arch/x86/kernel/setup.c10
-rw-r--r--arch/x86/kernel/tsc.c7
-rw-r--r--arch/x86/kernel/tsc_msr.c30
-rw-r--r--arch/x86/kvm/mmu.c1
-rw-r--r--arch/x86/kvm/vmx.c2
-rw-r--r--arch/x86/kvm/x86.c2
-rw-r--r--arch/x86/mm/fault.c47
-rw-r--r--arch/x86/platform/efi/efi.c20
-rw-r--r--arch/xtensa/Kconfig3
-rw-r--r--arch/xtensa/boot/dts/xtfpga.dtsi12
-rw-r--r--arch/xtensa/include/asm/io.h2
-rw-r--r--arch/xtensa/include/asm/traps.h44
-rw-r--r--arch/xtensa/include/asm/vectors.h2
-rw-r--r--arch/xtensa/include/uapi/asm/unistd.h7
-rw-r--r--arch/xtensa/kernel/entry.S449
-rw-r--r--arch/xtensa/kernel/setup.c2
-rw-r--r--arch/xtensa/kernel/time.c1
-rw-r--r--arch/xtensa/kernel/vectors.S2
-rw-r--r--arch/xtensa/kernel/xtensa_ksyms.c2
-rw-r--r--arch/xtensa/mm/init.c13
-rw-r--r--arch/xtensa/mm/mmu.c2
-rw-r--r--arch/xtensa/platforms/xtfpga/setup.c7
-rw-r--r--arch/xtensa/variants/fsf/include/variant/tie.h9
156 files changed, 1205 insertions, 872 deletions
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 6b58c1de7577..400c663b21c2 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -282,7 +282,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
282#else 282#else
283 /* if V-P const for loop, PTAG can be written once outside loop */ 283 /* if V-P const for loop, PTAG can be written once outside loop */
284 if (full_page_op) 284 if (full_page_op)
285 write_aux_reg(ARC_REG_DC_PTAG, paddr); 285 write_aux_reg(aux_tag, paddr);
286#endif 286#endif
287 287
288 while (num_lines-- > 0) { 288 while (num_lines-- > 0) {
@@ -296,7 +296,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
296 write_aux_reg(aux_cmd, vaddr); 296 write_aux_reg(aux_cmd, vaddr);
297 vaddr += L1_CACHE_BYTES; 297 vaddr += L1_CACHE_BYTES;
298#else 298#else
299 write_aux_reg(aux, paddr); 299 write_aux_reg(aux_cmd, paddr);
300 paddr += L1_CACHE_BYTES; 300 paddr += L1_CACHE_BYTES;
301#endif 301#endif
302 } 302 }
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e25419817791..15949459611f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1578,6 +1578,7 @@ config BL_SWITCHER_DUMMY_IF
1578 1578
1579choice 1579choice
1580 prompt "Memory split" 1580 prompt "Memory split"
1581 depends on MMU
1581 default VMSPLIT_3G 1582 default VMSPLIT_3G
1582 help 1583 help
1583 Select the desired split between kernel and user memory. 1584 Select the desired split between kernel and user memory.
@@ -1595,6 +1596,7 @@ endchoice
1595 1596
1596config PAGE_OFFSET 1597config PAGE_OFFSET
1597 hex 1598 hex
1599 default PHYS_OFFSET if !MMU
1598 default 0x40000000 if VMSPLIT_1G 1600 default 0x40000000 if VMSPLIT_1G
1599 default 0x80000000 if VMSPLIT_2G 1601 default 0x80000000 if VMSPLIT_2G
1600 default 0xC0000000 1602 default 0xC0000000
@@ -1903,6 +1905,7 @@ config XEN
1903 depends on ARM && AEABI && OF 1905 depends on ARM && AEABI && OF
1904 depends on CPU_V7 && !CPU_V6 1906 depends on CPU_V7 && !CPU_V6
1905 depends on !GENERIC_ATOMIC64 1907 depends on !GENERIC_ATOMIC64
1908 depends on MMU
1906 select ARM_PSCI 1909 select ARM_PSCI
1907 select SWIOTLB_XEN 1910 select SWIOTLB_XEN
1908 select ARCH_DMA_ADDR_T_64BIT 1911 select ARCH_DMA_ADDR_T_64BIT
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index 47279aa96a6a..0714e0334e33 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,4 +1,5 @@
1ashldi3.S 1ashldi3.S
2bswapsdi2.S
2font.c 3font.c
3lib1funcs.S 4lib1funcs.S
4hyp-stub.S 5hyp-stub.S
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6d1e43d46187..032030361bef 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -209,7 +209,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
209 omap3-n900.dtb \ 209 omap3-n900.dtb \
210 omap3-n9.dtb \ 210 omap3-n9.dtb \
211 omap3-n950.dtb \ 211 omap3-n950.dtb \
212 omap3-tobi.dtb \ 212 omap3-overo-tobi.dtb \
213 omap3-overo-storm-tobi.dtb \
213 omap3-gta04.dtb \ 214 omap3-gta04.dtb \
214 omap3-igep0020.dtb \ 215 omap3-igep0020.dtb \
215 omap3-igep0030.dtb \ 216 omap3-igep0030.dtb \
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 4718ec4a4dbf..486880b74831 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -121,7 +121,7 @@
121 ti,model = "AM335x-EVMSK"; 121 ti,model = "AM335x-EVMSK";
122 ti,audio-codec = <&tlv320aic3106>; 122 ti,audio-codec = <&tlv320aic3106>;
123 ti,mcasp-controller = <&mcasp1>; 123 ti,mcasp-controller = <&mcasp1>;
124 ti,codec-clock-rate = <24576000>; 124 ti,codec-clock-rate = <24000000>;
125 ti,audio-routing = 125 ti,audio-routing =
126 "Headphone Jack", "HPLOUT", 126 "Headphone Jack", "HPLOUT",
127 "Headphone Jack", "HPROUT"; 127 "Headphone Jack", "HPROUT";
@@ -256,6 +256,12 @@
256 >; 256 >;
257 }; 257 };
258 258
259 mmc1_pins: pinmux_mmc1_pins {
260 pinctrl-single,pins = <
261 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
262 >;
263 };
264
259 mcasp1_pins: mcasp1_pins { 265 mcasp1_pins: mcasp1_pins {
260 pinctrl-single,pins = < 266 pinctrl-single,pins = <
261 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 267 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
@@ -456,6 +462,9 @@
456 status = "okay"; 462 status = "okay";
457 vmmc-supply = <&vmmc_reg>; 463 vmmc-supply = <&vmmc_reg>;
458 bus-width = <4>; 464 bus-width = <4>;
465 pinctrl-names = "default";
466 pinctrl-0 = <&mmc1_pins>;
467 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
459}; 468};
460 469
461&sham { 470&sham {
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 66609684d41b..9480cf891f8c 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -23,6 +23,7 @@
23 gpio0 = &gpio0; 23 gpio0 = &gpio0;
24 gpio1 = &gpio1; 24 gpio1 = &gpio1;
25 gpio2 = &gpio2; 25 gpio2 = &gpio2;
26 eth3 = &eth3;
26 }; 27 };
27 28
28 cpus { 29 cpus {
@@ -291,7 +292,7 @@
291 interrupts = <91>; 292 interrupts = <91>;
292 }; 293 };
293 294
294 ethernet@34000 { 295 eth3: ethernet@34000 {
295 compatible = "marvell,armada-370-neta"; 296 compatible = "marvell,armada-370-neta";
296 reg = <0x34000 0x4000>; 297 reg = <0x34000 0x4000>;
297 interrupts = <14>; 298 interrupts = <14>;
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index e491b82f8d67..792fde1b7f75 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -147,7 +147,7 @@
147 }; 147 };
148 148
149 pinctrl@35004800 { 149 pinctrl@35004800 {
150 compatible = "brcm,capri-pinctrl"; 150 compatible = "brcm,bcm11351-pinctrl";
151 reg = <0x35004800 0x430>; 151 reg = <0x35004800 0x430>;
152 }; 152 };
153 153
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 2b76524f4aa7..187fd46b7b5e 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -379,15 +379,6 @@
379 #clock-cells = <1>; 379 #clock-cells = <1>;
380 }; 380 };
381 381
382 pmu_intc: pmu-interrupt-ctrl@d0050 {
383 compatible = "marvell,dove-pmu-intc";
384 interrupt-controller;
385 #interrupt-cells = <1>;
386 reg = <0xd0050 0x8>;
387 interrupts = <33>;
388 marvell,#interrupts = <7>;
389 };
390
391 pinctrl: pin-ctrl@d0200 { 382 pinctrl: pin-ctrl@d0200 {
392 compatible = "marvell,dove-pinctrl"; 383 compatible = "marvell,dove-pinctrl";
393 reg = <0xd0200 0x10>; 384 reg = <0xd0200 0x10>;
@@ -610,8 +601,6 @@
610 rtc: real-time-clock@d8500 { 601 rtc: real-time-clock@d8500 {
611 compatible = "marvell,orion-rtc"; 602 compatible = "marvell,orion-rtc";
612 reg = <0xd8500 0x20>; 603 reg = <0xd8500 0x20>;
613 interrupt-parent = <&pmu_intc>;
614 interrupts = <5>;
615 }; 604 };
616 605
617 gpio2: gpio-ctrl@e8400 { 606 gpio2: gpio-ctrl@e8400 {
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index fd8fc7cd53f3..5bfae54fb780 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -52,12 +52,6 @@
52 }; 52 };
53 }; 53 };
54 54
55 codec: spdif-transmitter {
56 compatible = "linux,spdif-dit";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_hummingboard_spdif>;
59 };
60
61 sound-spdif { 55 sound-spdif {
62 compatible = "fsl,imx-audio-spdif"; 56 compatible = "fsl,imx-audio-spdif";
63 model = "imx-spdif"; 57 model = "imx-spdif";
@@ -111,7 +105,7 @@
111 }; 105 };
112 106
113 pinctrl_hummingboard_spdif: hummingboard-spdif { 107 pinctrl_hummingboard_spdif: hummingboard-spdif {
114 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>; 108 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
115 }; 109 };
116 110
117 pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus { 111 pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
@@ -142,6 +136,8 @@
142}; 136};
143 137
144&spdif { 138&spdif {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_hummingboard_spdif>;
145 status = "okay"; 141 status = "okay";
146}; 142};
147 143
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 64daa3b311f6..c2a24888a276 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -46,12 +46,6 @@
46 }; 46 };
47 }; 47 };
48 48
49 codec: spdif-transmitter {
50 compatible = "linux,spdif-dit";
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_cubox_i_spdif>;
53 };
54
55 sound-spdif { 49 sound-spdif {
56 compatible = "fsl,imx-audio-spdif"; 50 compatible = "fsl,imx-audio-spdif";
57 model = "imx-spdif"; 51 model = "imx-spdif";
@@ -89,7 +83,7 @@
89 }; 83 };
90 84
91 pinctrl_cubox_i_spdif: cubox-i-spdif { 85 pinctrl_cubox_i_spdif: cubox-i-spdif {
92 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>; 86 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
93 }; 87 };
94 88
95 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus { 89 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
@@ -121,6 +115,8 @@
121}; 115};
122 116
123&spdif { 117&spdif {
118 pinctrl-names = "default";
119 pinctrl-0 = <&pinctrl_cubox_i_spdif>;
124 status = "okay"; 120 status = "okay";
125}; 121};
126 122
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index 2363593e1050..ef58d1c24313 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -612,7 +612,7 @@ clocks {
612 compatible = "ti,keystone,psc-clock"; 612 compatible = "ti,keystone,psc-clock";
613 clocks = <&chipclk13>; 613 clocks = <&chipclk13>;
614 clock-output-names = "vcp-3"; 614 clock-output-names = "vcp-3";
615 reg = <0x0235000a8 0xb00>, <0x02350060 0x400>; 615 reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
616 reg-names = "control", "domain"; 616 reg-names = "control", "domain";
617 domain-id = <24>; 617 domain-id = <24>;
618 }; 618 };
diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts
index b9b55c95a566..d3b253bbc885 100644
--- a/arch/arm/boot/dts/omap3-gta04.dts
+++ b/arch/arm/boot/dts/omap3-gta04.dts
@@ -13,7 +13,7 @@
13 13
14/ { 14/ {
15 model = "OMAP3 GTA04"; 15 model = "OMAP3 GTA04";
16 compatible = "ti,omap3-gta04", "ti,omap3"; 16 compatible = "ti,omap3-gta04", "ti,omap36xx", "ti,omap3";
17 17
18 cpus { 18 cpus {
19 cpu@0 { 19 cpu@0 {
@@ -32,7 +32,7 @@
32 aux-button { 32 aux-button {
33 label = "aux"; 33 label = "aux";
34 linux,code = <169>; 34 linux,code = <169>;
35 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; 35 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
36 gpio-key,wakeup; 36 gpio-key,wakeup;
37 }; 37 };
38 }; 38 };
@@ -92,6 +92,8 @@
92 bmp085@77 { 92 bmp085@77 {
93 compatible = "bosch,bmp085"; 93 compatible = "bosch,bmp085";
94 reg = <0x77>; 94 reg = <0x77>;
95 interrupt-parent = <&gpio4>;
96 interrupts = <17 IRQ_TYPE_EDGE_RISING>;
95 }; 97 };
96 98
97 /* leds */ 99 /* leds */
@@ -141,8 +143,8 @@
141 pinctrl-names = "default"; 143 pinctrl-names = "default";
142 pinctrl-0 = <&mmc1_pins>; 144 pinctrl-0 = <&mmc1_pins>;
143 vmmc-supply = <&vmmc1>; 145 vmmc-supply = <&vmmc1>;
144 vmmc_aux-supply = <&vsim>;
145 bus-width = <4>; 146 bus-width = <4>;
147 ti,non-removable;
146}; 148};
147 149
148&mmc2 { 150&mmc2 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 25a2b5f652fd..f2779ac75872 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -14,7 +14,7 @@
14 14
15/ { 15/ {
16 model = "IGEPv2 (TI OMAP AM/DM37x)"; 16 model = "IGEPv2 (TI OMAP AM/DM37x)";
17 compatible = "isee,omap3-igep0020", "ti,omap3"; 17 compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
18 18
19 leds { 19 leds {
20 pinctrl-names = "default"; 20 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 145c58cfc8ac..2793749eb1ba 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -13,7 +13,7 @@
13 13
14/ { 14/ {
15 model = "IGEP COM MODULE (TI OMAP AM/DM37x)"; 15 model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
16 compatible = "isee,omap3-igep0030", "ti,omap3"; 16 compatible = "isee,omap3-igep0030", "ti,omap36xx", "ti,omap3";
17 17
18 leds { 18 leds {
19 pinctrl-names = "default"; 19 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/omap3-n9.dts b/arch/arm/boot/dts/omap3-n9.dts
index 39828ce464ee..9938b5dc1909 100644
--- a/arch/arm/boot/dts/omap3-n9.dts
+++ b/arch/arm/boot/dts/omap3-n9.dts
@@ -14,5 +14,5 @@
14 14
15/ { 15/ {
16 model = "Nokia N9"; 16 model = "Nokia N9";
17 compatible = "nokia,omap3-n9", "ti,omap3"; 17 compatible = "nokia,omap3-n9", "ti,omap36xx", "ti,omap3";
18}; 18};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 6fc85f963530..0bf40c90faba 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -1,6 +1,6 @@
1/* 1/*
2 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz> 2 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
3 * Copyright 2013 Aaro Koskinen <aaro.koskinen@iki.fi> 3 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 (or later) as 6 * it under the terms of the GNU General Public License version 2 (or later) as
@@ -13,7 +13,7 @@
13 13
14/ { 14/ {
15 model = "Nokia N900"; 15 model = "Nokia N900";
16 compatible = "nokia,omap3-n900", "ti,omap3"; 16 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
17 17
18 cpus { 18 cpus {
19 cpu@0 { 19 cpu@0 {
diff --git a/arch/arm/boot/dts/omap3-n950.dts b/arch/arm/boot/dts/omap3-n950.dts
index b076a526b999..261c5589bfa3 100644
--- a/arch/arm/boot/dts/omap3-n950.dts
+++ b/arch/arm/boot/dts/omap3-n950.dts
@@ -14,5 +14,5 @@
14 14
15/ { 15/ {
16 model = "Nokia N950"; 16 model = "Nokia N950";
17 compatible = "nokia,omap3-n950", "ti,omap3"; 17 compatible = "nokia,omap3-n950", "ti,omap36xx", "ti,omap3";
18}; 18};
diff --git a/arch/arm/boot/dts/omap3-overo-storm-tobi.dts b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
new file mode 100644
index 000000000000..966b5c9cd96a
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-overo-storm-tobi.dts
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Tobi expansion board is manufactured by Gumstix Inc.
11 */
12
13/dts-v1/;
14
15#include "omap36xx.dtsi"
16#include "omap3-overo-tobi-common.dtsi"
17
18/ {
19 model = "OMAP36xx/AM37xx/DM37xx Gumstix Overo on Tobi";
20 compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap36xx", "ti,omap3";
21};
22
diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
index 7e4ad2aec37a..4edc013a91c1 100644
--- a/arch/arm/boot/dts/omap3-tobi.dts
+++ b/arch/arm/boot/dts/omap3-overo-tobi-common.dtsi
@@ -13,9 +13,6 @@
13#include "omap3-overo.dtsi" 13#include "omap3-overo.dtsi"
14 14
15/ { 15/ {
16 model = "TI OMAP3 Gumstix Overo on Tobi";
17 compatible = "ti,omap3-tobi", "ti,omap3-overo", "ti,omap3";
18
19 leds { 16 leds {
20 compatible = "gpio-leds"; 17 compatible = "gpio-leds";
21 heartbeat { 18 heartbeat {
diff --git a/arch/arm/boot/dts/omap3-overo-tobi.dts b/arch/arm/boot/dts/omap3-overo-tobi.dts
new file mode 100644
index 000000000000..de5653e1b5ca
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-overo-tobi.dts
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * Tobi expansion board is manufactured by Gumstix Inc.
11 */
12
13/dts-v1/;
14
15#include "omap34xx.dtsi"
16#include "omap3-overo-tobi-common.dtsi"
17
18/ {
19 model = "OMAP35xx Gumstix Overo on Tobi";
20 compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3";
21};
22
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index a461d2fd1fb0..597099907f8e 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -9,9 +9,6 @@
9/* 9/*
10 * The Gumstix Overo must be combined with an expansion board. 10 * The Gumstix Overo must be combined with an expansion board.
11 */ 11 */
12/dts-v1/;
13
14#include "omap34xx.dtsi"
15 12
16/ { 13/ {
17 pwmleds { 14 pwmleds {
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 10666ca8aee1..d4d2763f4794 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -426,7 +426,7 @@
426 }; 426 };
427 427
428 rtp: rtp@01c25000 { 428 rtp: rtp@01c25000 {
429 compatible = "allwinner,sun4i-ts"; 429 compatible = "allwinner,sun4i-a10-ts";
430 reg = <0x01c25000 0x100>; 430 reg = <0x01c25000 0x100>;
431 interrupts = <29>; 431 interrupts = <29>;
432 }; 432 };
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 64961595e8d6..79fd412005b0 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -383,7 +383,7 @@
383 }; 383 };
384 384
385 rtp: rtp@01c25000 { 385 rtp: rtp@01c25000 {
386 compatible = "allwinner,sun4i-ts"; 386 compatible = "allwinner,sun4i-a10-ts";
387 reg = <0x01c25000 0x100>; 387 reg = <0x01c25000 0x100>;
388 interrupts = <29>; 388 interrupts = <29>;
389 }; 389 };
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 320335abfccd..c463fd730c91 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -346,7 +346,7 @@
346 }; 346 };
347 347
348 rtp: rtp@01c25000 { 348 rtp: rtp@01c25000 {
349 compatible = "allwinner,sun4i-ts"; 349 compatible = "allwinner,sun4i-a10-ts";
350 reg = <0x01c25000 0x100>; 350 reg = <0x01c25000 0x100>;
351 interrupts = <29>; 351 interrupts = <29>;
352 }; 352 };
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 9ff09484847b..6f25cf559ad0 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -454,7 +454,7 @@
454 rtc: rtc@01c20d00 { 454 rtc: rtc@01c20d00 {
455 compatible = "allwinner,sun7i-a20-rtc"; 455 compatible = "allwinner,sun7i-a20-rtc";
456 reg = <0x01c20d00 0x20>; 456 reg = <0x01c20d00 0x20>;
457 interrupts = <0 24 1>; 457 interrupts = <0 24 4>;
458 }; 458 };
459 459
460 sid: eeprom@01c23800 { 460 sid: eeprom@01c23800 {
@@ -463,7 +463,7 @@
463 }; 463 };
464 464
465 rtp: rtp@01c25000 { 465 rtp: rtp@01c25000 {
466 compatible = "allwinner,sun4i-ts"; 466 compatible = "allwinner,sun4i-a10-ts";
467 reg = <0x01c25000 0x100>; 467 reg = <0x01c25000 0x100>;
468 interrupts = <0 29 4>; 468 interrupts = <0 29 4>;
469 }; 469 };
@@ -596,10 +596,10 @@
596 hstimer@01c60000 { 596 hstimer@01c60000 {
597 compatible = "allwinner,sun7i-a20-hstimer"; 597 compatible = "allwinner,sun7i-a20-hstimer";
598 reg = <0x01c60000 0x1000>; 598 reg = <0x01c60000 0x1000>;
599 interrupts = <0 81 1>, 599 interrupts = <0 81 4>,
600 <0 82 1>, 600 <0 82 4>,
601 <0 83 1>, 601 <0 83 4>,
602 <0 84 1>; 602 <0 84 4>;
603 clocks = <&ahb_gates 28>; 603 clocks = <&ahb_gates 28>;
604 }; 604 };
605 605
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 389e987ec281..44ec401ec366 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -57,6 +57,8 @@
57 resets = <&tegra_car 27>; 57 resets = <&tegra_car 27>;
58 reset-names = "dc"; 58 reset-names = "dc";
59 59
60 nvidia,head = <0>;
61
60 rgb { 62 rgb {
61 status = "disabled"; 63 status = "disabled";
62 }; 64 };
@@ -72,6 +74,8 @@
72 resets = <&tegra_car 26>; 74 resets = <&tegra_car 26>;
73 reset-names = "dc"; 75 reset-names = "dc";
74 76
77 nvidia,head = <1>;
78
75 rgb { 79 rgb {
76 status = "disabled"; 80 status = "disabled";
77 }; 81 };
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 480ecda3416b..48d2a7f4d0c0 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -94,6 +94,8 @@
94 resets = <&tegra_car 27>; 94 resets = <&tegra_car 27>;
95 reset-names = "dc"; 95 reset-names = "dc";
96 96
97 nvidia,head = <0>;
98
97 rgb { 99 rgb {
98 status = "disabled"; 100 status = "disabled";
99 }; 101 };
@@ -109,6 +111,8 @@
109 resets = <&tegra_car 26>; 111 resets = <&tegra_car 26>;
110 reset-names = "dc"; 112 reset-names = "dc";
111 113
114 nvidia,head = <1>;
115
112 rgb { 116 rgb {
113 status = "disabled"; 117 status = "disabled";
114 }; 118 };
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 9104224124ee..1e156d9d0506 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -28,7 +28,7 @@
28 compatible = "nvidia,cardhu", "nvidia,tegra30"; 28 compatible = "nvidia,cardhu", "nvidia,tegra30";
29 29
30 aliases { 30 aliases {
31 rtc0 = "/i2c@7000d000/tps6586x@34"; 31 rtc0 = "/i2c@7000d000/tps65911@2d";
32 rtc1 = "/rtc@7000e000"; 32 rtc1 = "/rtc@7000e000";
33 }; 33 };
34 34
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index ed8e7700b46d..19a84e933f4e 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -170,6 +170,8 @@
170 resets = <&tegra_car 27>; 170 resets = <&tegra_car 27>;
171 reset-names = "dc"; 171 reset-names = "dc";
172 172
173 nvidia,head = <0>;
174
173 rgb { 175 rgb {
174 status = "disabled"; 176 status = "disabled";
175 }; 177 };
@@ -185,6 +187,8 @@
185 resets = <&tegra_car 26>; 187 resets = <&tegra_car 26>;
186 reset-names = "dc"; 188 reset-names = "dc";
187 189
190 nvidia,head = <1>;
191
188 rgb { 192 rgb {
189 status = "disabled"; 193 status = "disabled";
190 }; 194 };
diff --git a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi b/arch/arm/boot/dts/testcases/tests-interrupts.dtsi
deleted file mode 100644
index c843720bd3e5..000000000000
--- a/arch/arm/boot/dts/testcases/tests-interrupts.dtsi
+++ /dev/null
@@ -1,58 +0,0 @@
1
2/ {
3 testcase-data {
4 interrupts {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 test_intc0: intc0 {
8 interrupt-controller;
9 #interrupt-cells = <1>;
10 };
11
12 test_intc1: intc1 {
13 interrupt-controller;
14 #interrupt-cells = <3>;
15 };
16
17 test_intc2: intc2 {
18 interrupt-controller;
19 #interrupt-cells = <2>;
20 };
21
22 test_intmap0: intmap0 {
23 #interrupt-cells = <1>;
24 #address-cells = <0>;
25 interrupt-map = <1 &test_intc0 9>,
26 <2 &test_intc1 10 11 12>,
27 <3 &test_intc2 13 14>,
28 <4 &test_intc2 15 16>;
29 };
30
31 test_intmap1: intmap1 {
32 #interrupt-cells = <2>;
33 interrupt-map = <0x5000 1 2 &test_intc0 15>;
34 };
35
36 interrupts0 {
37 interrupt-parent = <&test_intc0>;
38 interrupts = <1>, <2>, <3>, <4>;
39 };
40
41 interrupts1 {
42 interrupt-parent = <&test_intmap0>;
43 interrupts = <1>, <2>, <3>, <4>;
44 };
45
46 interrupts-extended0 {
47 reg = <0x5000 0x100>;
48 interrupts-extended = <&test_intc0 1>,
49 <&test_intc1 2 3 4>,
50 <&test_intc2 5 6>,
51 <&test_intmap0 1>,
52 <&test_intmap0 2>,
53 <&test_intmap0 3>,
54 <&test_intmap1 1 2>;
55 };
56 };
57 };
58};
diff --git a/arch/arm/boot/dts/testcases/tests-phandle.dtsi b/arch/arm/boot/dts/testcases/tests-phandle.dtsi
deleted file mode 100644
index 0007d3cd7dc2..000000000000
--- a/arch/arm/boot/dts/testcases/tests-phandle.dtsi
+++ /dev/null
@@ -1,39 +0,0 @@
1
2/ {
3 testcase-data {
4 phandle-tests {
5 provider0: provider0 {
6 #phandle-cells = <0>;
7 };
8
9 provider1: provider1 {
10 #phandle-cells = <1>;
11 };
12
13 provider2: provider2 {
14 #phandle-cells = <2>;
15 };
16
17 provider3: provider3 {
18 #phandle-cells = <3>;
19 };
20
21 consumer-a {
22 phandle-list = <&provider1 1>,
23 <&provider2 2 0>,
24 <0>,
25 <&provider3 4 4 3>,
26 <&provider2 5 100>,
27 <&provider0>,
28 <&provider1 7>;
29 phandle-list-names = "first", "second", "third";
30
31 phandle-list-bad-phandle = <12345678 0 0>;
32 phandle-list-bad-args = <&provider2 1 0>,
33 <&provider3 0>;
34 empty-property;
35 unterminated-string = [40 41 42 43];
36 };
37 };
38 };
39};
diff --git a/arch/arm/boot/dts/testcases/tests.dtsi b/arch/arm/boot/dts/testcases/tests.dtsi
deleted file mode 100644
index 3f123ecc9dd7..000000000000
--- a/arch/arm/boot/dts/testcases/tests.dtsi
+++ /dev/null
@@ -1,2 +0,0 @@
1/include/ "tests-phandle.dtsi"
2/include/ "tests-interrupts.dtsi"
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index f43907c40c93..65f657711323 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -1,4 +1,4 @@
1/include/ "versatile-ab.dts" 1#include <versatile-ab.dts>
2 2
3/ { 3/ {
4 model = "ARM Versatile PB"; 4 model = "ARM Versatile PB";
@@ -47,4 +47,4 @@
47 }; 47 };
48}; 48};
49 49
50/include/ "testcases/tests.dtsi" 50#include <testcases.dtsi>
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 00fe9e9710fd..27d69b558c5d 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -204,7 +204,10 @@ CONFIG_MMC_BLOCK_MINORS=16
204CONFIG_MMC_SDHCI=y 204CONFIG_MMC_SDHCI=y
205CONFIG_MMC_SDHCI_PLTFM=y 205CONFIG_MMC_SDHCI_PLTFM=y
206CONFIG_MMC_SDHCI_TEGRA=y 206CONFIG_MMC_SDHCI_TEGRA=y
207CONFIG_NEW_LEDS=y
208CONFIG_LEDS_CLASS=y
207CONFIG_LEDS_GPIO=y 209CONFIG_LEDS_GPIO=y
210CONFIG_LEDS_TRIGGERS=y
208CONFIG_LEDS_TRIGGER_TIMER=y 211CONFIG_LEDS_TRIGGER_TIMER=y
209CONFIG_LEDS_TRIGGER_ONESHOT=y 212CONFIG_LEDS_TRIGGER_ONESHOT=y
210CONFIG_LEDS_TRIGGER_HEARTBEAT=y 213CONFIG_LEDS_TRIGGER_HEARTBEAT=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index e9a49fe0284e..8b8b61685a34 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -212,6 +212,7 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *,
212static inline void __flush_icache_all(void) 212static inline void __flush_icache_all(void)
213{ 213{
214 __flush_icache_preferred(); 214 __flush_icache_preferred();
215 dsb();
215} 216}
216 217
217/* 218/*
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 8756e4bcdba0..4afb376d9c7c 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -30,14 +30,15 @@
30 */ 30 */
31#define UL(x) _AC(x, UL) 31#define UL(x) _AC(x, UL)
32 32
33/* PAGE_OFFSET - the virtual address of the start of the kernel image */
34#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
35
33#ifdef CONFIG_MMU 36#ifdef CONFIG_MMU
34 37
35/* 38/*
36 * PAGE_OFFSET - the virtual address of the start of the kernel image
37 * TASK_SIZE - the maximum size of a user space task. 39 * TASK_SIZE - the maximum size of a user space task.
38 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area 40 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
39 */ 41 */
40#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
41#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M)) 42#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M))
42#define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M) 43#define TASK_UNMAPPED_BASE ALIGN(TASK_SIZE / 3, SZ_16M)
43 44
@@ -104,10 +105,6 @@
104#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) 105#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
105#endif 106#endif
106 107
107#ifndef PAGE_OFFSET
108#define PAGE_OFFSET PLAT_PHYS_OFFSET
109#endif
110
111/* 108/*
112 * The module can be at any place in ram in nommu mode. 109 * The module can be at any place in ram in nommu mode.
113 */ 110 */
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index 03243f7eeddf..85c60adc8b60 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -120,13 +120,16 @@
120/* 120/*
121 * 2nd stage PTE definitions for LPAE. 121 * 2nd stage PTE definitions for LPAE.
122 */ 122 */
123#define L_PTE_S2_MT_UNCACHED (_AT(pteval_t, 0x5) << 2) /* MemAttr[3:0] */ 123#define L_PTE_S2_MT_UNCACHED (_AT(pteval_t, 0x0) << 2) /* strongly ordered */
124#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */ 124#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* normal inner write-through */
125#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */ 125#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* normal inner write-back */
126#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */ 126#define L_PTE_S2_MT_DEV_SHARED (_AT(pteval_t, 0x1) << 2) /* device */
127#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */ 127#define L_PTE_S2_MT_MASK (_AT(pteval_t, 0xf) << 2)
128 128
129#define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */ 129#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
130#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
131
132#define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */
130 133
131/* 134/*
132 * Hyp-mode PL2 PTE definitions for LPAE. 135 * Hyp-mode PL2 PTE definitions for LPAE.
diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h
index ef3c6072aa45..ac4bfae26702 100644
--- a/arch/arm/include/asm/spinlock.h
+++ b/arch/arm/include/asm/spinlock.h
@@ -37,18 +37,9 @@
37 37
38static inline void dsb_sev(void) 38static inline void dsb_sev(void)
39{ 39{
40#if __LINUX_ARM_ARCH__ >= 7 40
41 __asm__ __volatile__ ( 41 dsb(ishst);
42 "dsb ishst\n" 42 __asm__(SEV);
43 SEV
44 );
45#else
46 __asm__ __volatile__ (
47 "mcr p15, 0, %0, c7, c10, 4\n"
48 SEV
49 : : "r" (0)
50 );
51#endif
52} 43}
53 44
54/* 45/*
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 47cd974e57ea..c96ecacb2021 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -177,6 +177,18 @@ __lookup_processor_type_data:
177 .long __proc_info_end 177 .long __proc_info_end
178 .size __lookup_processor_type_data, . - __lookup_processor_type_data 178 .size __lookup_processor_type_data, . - __lookup_processor_type_data
179 179
180__error_lpae:
181#ifdef CONFIG_DEBUG_LL
182 adr r0, str_lpae
183 bl printascii
184 b __error
185str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n"
186#else
187 b __error
188#endif
189 .align
190ENDPROC(__error_lpae)
191
180__error_p: 192__error_p:
181#ifdef CONFIG_DEBUG_LL 193#ifdef CONFIG_DEBUG_LL
182 adr r0, str_p1 194 adr r0, str_p1
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 914616e0bdcd..f5f381d91556 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -102,7 +102,7 @@ ENTRY(stext)
102 and r3, r3, #0xf @ extract VMSA support 102 and r3, r3, #0xf @ extract VMSA support
103 cmp r3, #5 @ long-descriptor translation table format? 103 cmp r3, #5 @ long-descriptor translation table format?
104 THUMB( it lo ) @ force fixup-able long branch encoding 104 THUMB( it lo ) @ force fixup-able long branch encoding
105 blo __error_p @ only classic page table format 105 blo __error_lpae @ only classic page table format
106#endif 106#endif
107 107
108#ifndef CONFIG_XIP_KERNEL 108#ifndef CONFIG_XIP_KERNEL
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index b0df9761de6d..1e8b030dbefd 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -731,7 +731,7 @@ static void __init request_standard_resources(const struct machine_desc *mdesc)
731 kernel_data.end = virt_to_phys(_end - 1); 731 kernel_data.end = virt_to_phys(_end - 1);
732 732
733 for_each_memblock(memory, region) { 733 for_each_memblock(memory, region) {
734 res = memblock_virt_alloc_low(sizeof(*res), 0); 734 res = memblock_virt_alloc(sizeof(*res), 0);
735 res->name = "System RAM"; 735 res->name = "System RAM";
736 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); 736 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
737 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; 737 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 1d8248ea5669..bd18bb8b2770 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -878,7 +878,8 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self,
878 unsigned long cmd, 878 unsigned long cmd,
879 void *v) 879 void *v)
880{ 880{
881 if (cmd == CPU_PM_EXIT) { 881 if (cmd == CPU_PM_EXIT &&
882 __hyp_get_vectors() == hyp_default_vectors) {
882 cpu_init_hyp_mode(NULL); 883 cpu_init_hyp_mode(NULL);
883 return NOTIFY_OK; 884 return NOTIFY_OK;
884 } 885 }
diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S
index ddc15539bad2..0d68d4073068 100644
--- a/arch/arm/kvm/interrupts.S
+++ b/arch/arm/kvm/interrupts.S
@@ -220,6 +220,10 @@ after_vfp_restore:
220 * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are 220 * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
221 * passed in r0 and r1. 221 * passed in r0 and r1.
222 * 222 *
223 * A function pointer with a value of 0xffffffff has a special meaning,
224 * and is used to implement __hyp_get_vectors in the same way as in
225 * arch/arm/kernel/hyp_stub.S.
226 *
223 * The calling convention follows the standard AAPCS: 227 * The calling convention follows the standard AAPCS:
224 * r0 - r3: caller save 228 * r0 - r3: caller save
225 * r12: caller save 229 * r12: caller save
@@ -363,6 +367,11 @@ hyp_hvc:
363host_switch_to_hyp: 367host_switch_to_hyp:
364 pop {r0, r1, r2} 368 pop {r0, r1, r2}
365 369
370 /* Check for __hyp_get_vectors */
371 cmp r0, #-1
372 mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
373 beq 1f
374
366 push {lr} 375 push {lr}
367 mrs lr, SPSR 376 mrs lr, SPSR
368 push {lr} 377 push {lr}
@@ -378,7 +387,7 @@ THUMB( orr lr, #1)
378 pop {lr} 387 pop {lr}
379 msr SPSR_csxf, lr 388 msr SPSR_csxf, lr
380 pop {lr} 389 pop {lr}
381 eret 3901: eret
382 391
383guest_trap: 392guest_trap:
384 load_vcpu @ Load VCPU pointer to r0 393 load_vcpu @ Load VCPU pointer to r0
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index befcaf5d0574..ec419649320f 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -101,11 +101,9 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
101obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o 101obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
102obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o 102obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o
103 103
104ifeq ($(CONFIG_PM),y)
105obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o 104obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
106# i.MX6SL reuses i.MX6Q code 105# i.MX6SL reuses i.MX6Q code
107obj-$(CONFIG_SOC_IMX6SL) += pm-imx6q.o headsmp.o 106obj-$(CONFIG_SOC_IMX6SL) += pm-imx6q.o headsmp.o
108endif
109 107
110# i.MX5 based machines 108# i.MX5 based machines
111obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o 109obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index 59c3b9b26bb4..baf439dc22d8 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -144,13 +144,11 @@ void imx6q_set_chicken_bit(void);
144void imx_cpu_die(unsigned int cpu); 144void imx_cpu_die(unsigned int cpu);
145int imx_cpu_kill(unsigned int cpu); 145int imx_cpu_kill(unsigned int cpu);
146 146
147#ifdef CONFIG_PM
148void imx6q_pm_init(void); 147void imx6q_pm_init(void);
149void imx6q_pm_set_ccm_base(void __iomem *base); 148void imx6q_pm_set_ccm_base(void __iomem *base);
149#ifdef CONFIG_PM
150void imx5_pm_init(void); 150void imx5_pm_init(void);
151#else 151#else
152static inline void imx6q_pm_init(void) {}
153static inline void imx6q_pm_set_ccm_base(void __iomem *base) {}
154static inline void imx5_pm_init(void) {} 152static inline void imx5_pm_init(void) {}
155#endif 153#endif
156 154
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 91449c5cb70f..85089d821982 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -156,6 +156,7 @@ static struct omap_usb_config nokia770_usb_config __initdata = {
156 .register_dev = 1, 156 .register_dev = 1,
157 .hmc_mode = 16, 157 .hmc_mode = 16,
158 .pins[0] = 6, 158 .pins[0] = 6,
159 .extcon = "tahvo-usb",
159}; 160};
160 161
161#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 162#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e2ce4f8366a7..0af7ca02314d 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -50,6 +50,7 @@ config SOC_OMAP5
50 bool "TI OMAP5" 50 bool "TI OMAP5"
51 depends on ARCH_MULTI_V7 51 depends on ARCH_MULTI_V7
52 select ARCH_OMAP2PLUS 52 select ARCH_OMAP2PLUS
53 select ARCH_HAS_OPP
53 select ARM_CPU_SUSPEND if PM 54 select ARM_CPU_SUSPEND if PM
54 select ARM_GIC 55 select ARM_GIC
55 select CPU_V7 56 select CPU_V7
@@ -63,6 +64,7 @@ config SOC_AM33XX
63 bool "TI AM33XX" 64 bool "TI AM33XX"
64 depends on ARCH_MULTI_V7 65 depends on ARCH_MULTI_V7
65 select ARCH_OMAP2PLUS 66 select ARCH_OMAP2PLUS
67 select ARCH_HAS_OPP
66 select ARM_CPU_SUSPEND if PM 68 select ARM_CPU_SUSPEND if PM
67 select CPU_V7 69 select CPU_V7
68 select MULTI_IRQ_HANDLER 70 select MULTI_IRQ_HANDLER
@@ -72,6 +74,7 @@ config SOC_AM43XX
72 depends on ARCH_MULTI_V7 74 depends on ARCH_MULTI_V7
73 select CPU_V7 75 select CPU_V7
74 select ARCH_OMAP2PLUS 76 select ARCH_OMAP2PLUS
77 select ARCH_HAS_OPP
75 select MULTI_IRQ_HANDLER 78 select MULTI_IRQ_HANDLER
76 select ARM_GIC 79 select ARM_GIC
77 select MACH_OMAP_GENERIC 80 select MACH_OMAP_GENERIC
@@ -80,6 +83,7 @@ config SOC_DRA7XX
80 bool "TI DRA7XX" 83 bool "TI DRA7XX"
81 depends on ARCH_MULTI_V7 84 depends on ARCH_MULTI_V7
82 select ARCH_OMAP2PLUS 85 select ARCH_OMAP2PLUS
86 select ARCH_HAS_OPP
83 select ARM_CPU_SUSPEND if PM 87 select ARM_CPU_SUSPEND if PM
84 select ARM_GIC 88 select ARM_GIC
85 select CPU_V7 89 select CPU_V7
@@ -268,9 +272,6 @@ config MACH_OMAP_3430SDP
268 default y 272 default y
269 select OMAP_PACKAGE_CBB 273 select OMAP_PACKAGE_CBB
270 274
271config MACH_NOKIA_N800
272 bool
273
274config MACH_NOKIA_N810 275config MACH_NOKIA_N810
275 bool 276 bool
276 277
@@ -281,7 +282,6 @@ config MACH_NOKIA_N8X0
281 bool "Nokia N800/N810" 282 bool "Nokia N800/N810"
282 depends on SOC_OMAP2420 283 depends on SOC_OMAP2420
283 default y 284 default y
284 select MACH_NOKIA_N800
285 select MACH_NOKIA_N810 285 select MACH_NOKIA_N810
286 select MACH_NOKIA_N810_WIMAX 286 select MACH_NOKIA_N810_WIMAX
287 select OMAP_PACKAGE_ZAC 287 select OMAP_PACKAGE_ZAC
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 3b05aea56d1f..11ed9152e665 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -433,7 +433,9 @@ static const struct clk_ops dpll4_m5x2_ck_ops = {
433 .enable = &omap2_dflt_clk_enable, 433 .enable = &omap2_dflt_clk_enable,
434 .disable = &omap2_dflt_clk_disable, 434 .disable = &omap2_dflt_clk_disable,
435 .is_enabled = &omap2_dflt_clk_is_enabled, 435 .is_enabled = &omap2_dflt_clk_is_enabled,
436 .set_rate = &omap3_clkoutx2_set_rate,
436 .recalc_rate = &omap3_clkoutx2_recalc, 437 .recalc_rate = &omap3_clkoutx2_recalc,
438 .round_rate = &omap3_clkoutx2_round_rate,
437}; 439};
438 440
439static const struct clk_ops dpll4_m5x2_ck_3630_ops = { 441static const struct clk_ops dpll4_m5x2_ck_3630_ops = {
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 4c158c838d40..01fc710c8181 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -23,6 +23,8 @@
23#include "prm.h" 23#include "prm.h"
24#include "clockdomain.h" 24#include "clockdomain.h"
25 25
26#define MAX_CPUS 2
27
26/* Machine specific information */ 28/* Machine specific information */
27struct idle_statedata { 29struct idle_statedata {
28 u32 cpu_state; 30 u32 cpu_state;
@@ -48,11 +50,11 @@ static struct idle_statedata omap4_idle_data[] = {
48 }, 50 },
49}; 51};
50 52
51static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS]; 53static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS];
52static struct clockdomain *cpu_clkdm[NR_CPUS]; 54static struct clockdomain *cpu_clkdm[MAX_CPUS];
53 55
54static atomic_t abort_barrier; 56static atomic_t abort_barrier;
55static bool cpu_done[NR_CPUS]; 57static bool cpu_done[MAX_CPUS];
56static struct idle_statedata *state_ptr = &omap4_idle_data[0]; 58static struct idle_statedata *state_ptr = &omap4_idle_data[0];
57 59
58/* Private functions */ 60/* Private functions */
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 3185ced807c9..3c418ea54bbe 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -623,6 +623,32 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk)
623 623
624/* Clock control for DPLL outputs */ 624/* Clock control for DPLL outputs */
625 625
626/* Find the parent DPLL for the given clkoutx2 clock */
627static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw)
628{
629 struct clk_hw_omap *pclk = NULL;
630 struct clk *parent;
631
632 /* Walk up the parents of clk, looking for a DPLL */
633 do {
634 do {
635 parent = __clk_get_parent(hw->clk);
636 hw = __clk_get_hw(parent);
637 } while (hw && (__clk_get_flags(hw->clk) & CLK_IS_BASIC));
638 if (!hw)
639 break;
640 pclk = to_clk_hw_omap(hw);
641 } while (pclk && !pclk->dpll_data);
642
643 /* clk does not have a DPLL as a parent? error in the clock data */
644 if (!pclk) {
645 WARN_ON(1);
646 return NULL;
647 }
648
649 return pclk;
650}
651
626/** 652/**
627 * omap3_clkoutx2_recalc - recalculate DPLL X2 output virtual clock rate 653 * omap3_clkoutx2_recalc - recalculate DPLL X2 output virtual clock rate
628 * @clk: DPLL output struct clk 654 * @clk: DPLL output struct clk
@@ -637,27 +663,14 @@ unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
637 unsigned long rate; 663 unsigned long rate;
638 u32 v; 664 u32 v;
639 struct clk_hw_omap *pclk = NULL; 665 struct clk_hw_omap *pclk = NULL;
640 struct clk *parent;
641 666
642 if (!parent_rate) 667 if (!parent_rate)
643 return 0; 668 return 0;
644 669
645 /* Walk up the parents of clk, looking for a DPLL */ 670 pclk = omap3_find_clkoutx2_dpll(hw);
646 do {
647 do {
648 parent = __clk_get_parent(hw->clk);
649 hw = __clk_get_hw(parent);
650 } while (hw && (__clk_get_flags(hw->clk) & CLK_IS_BASIC));
651 if (!hw)
652 break;
653 pclk = to_clk_hw_omap(hw);
654 } while (pclk && !pclk->dpll_data);
655 671
656 /* clk does not have a DPLL as a parent? error in the clock data */ 672 if (!pclk)
657 if (!pclk) {
658 WARN_ON(1);
659 return 0; 673 return 0;
660 }
661 674
662 dd = pclk->dpll_data; 675 dd = pclk->dpll_data;
663 676
@@ -672,6 +685,55 @@ unsigned long omap3_clkoutx2_recalc(struct clk_hw *hw,
672 return rate; 685 return rate;
673} 686}
674 687
688int omap3_clkoutx2_set_rate(struct clk_hw *hw, unsigned long rate,
689 unsigned long parent_rate)
690{
691 return 0;
692}
693
694long omap3_clkoutx2_round_rate(struct clk_hw *hw, unsigned long rate,
695 unsigned long *prate)
696{
697 const struct dpll_data *dd;
698 u32 v;
699 struct clk_hw_omap *pclk = NULL;
700
701 if (!*prate)
702 return 0;
703
704 pclk = omap3_find_clkoutx2_dpll(hw);
705
706 if (!pclk)
707 return 0;
708
709 dd = pclk->dpll_data;
710
711 /* TYPE J does not have a clkoutx2 */
712 if (dd->flags & DPLL_J_TYPE) {
713 *prate = __clk_round_rate(__clk_get_parent(pclk->hw.clk), rate);
714 return *prate;
715 }
716
717 WARN_ON(!dd->enable_mask);
718
719 v = omap2_clk_readl(pclk, dd->control_reg) & dd->enable_mask;
720 v >>= __ffs(dd->enable_mask);
721
722 /* If in bypass, the rate is fixed to the bypass rate*/
723 if (v != OMAP3XXX_EN_DPLL_LOCKED)
724 return *prate;
725
726 if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) {
727 unsigned long best_parent;
728
729 best_parent = (rate / 2);
730 *prate = __clk_round_rate(__clk_get_parent(hw->clk),
731 best_parent);
732 }
733
734 return *prate * 2;
735}
736
675/* OMAP3/4 non-CORE DPLL clkops */ 737/* OMAP3/4 non-CORE DPLL clkops */
676const struct clk_hw_omap_ops clkhwops_omap3_dpll = { 738const struct clk_hw_omap_ops clkhwops_omap3_dpll = {
677 .allow_idle = omap3_dpll_allow_idle, 739 .allow_idle = omap3_dpll_allow_idle,
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index d24926e6340f..ab43755364f5 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1339,7 +1339,7 @@ static void __maybe_unused gpmc_read_timings_dt(struct device_node *np,
1339 of_property_read_bool(np, "gpmc,time-para-granularity"); 1339 of_property_read_bool(np, "gpmc,time-para-granularity");
1340} 1340}
1341 1341
1342#ifdef CONFIG_MTD_NAND 1342#if IS_ENABLED(CONFIG_MTD_NAND)
1343 1343
1344static const char * const nand_xfer_types[] = { 1344static const char * const nand_xfer_types[] = {
1345 [NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled", 1345 [NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled",
@@ -1429,7 +1429,7 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
1429} 1429}
1430#endif 1430#endif
1431 1431
1432#ifdef CONFIG_MTD_ONENAND 1432#if IS_ENABLED(CONFIG_MTD_ONENAND)
1433static int gpmc_probe_onenand_child(struct platform_device *pdev, 1433static int gpmc_probe_onenand_child(struct platform_device *pdev,
1434 struct device_node *child) 1434 struct device_node *child)
1435{ 1435{
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index d408b15b4fbf..af432b191255 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -179,15 +179,6 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
179 .length = L4_EMU_34XX_SIZE, 179 .length = L4_EMU_34XX_SIZE,
180 .type = MT_DEVICE 180 .type = MT_DEVICE
181 }, 181 },
182#if defined(CONFIG_DEBUG_LL) && \
183 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
184 {
185 .virtual = ZOOM_UART_VIRT,
186 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
187 .length = SZ_1M,
188 .type = MT_DEVICE
189 },
190#endif
191}; 182};
192#endif 183#endif
193 184
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 42d81885c700..1f33f5db10d5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1947,29 +1947,31 @@ static int _ocp_softreset(struct omap_hwmod *oh)
1947 goto dis_opt_clks; 1947 goto dis_opt_clks;
1948 1948
1949 _write_sysconfig(v, oh); 1949 _write_sysconfig(v, oh);
1950 ret = _clear_softreset(oh, &v);
1951 if (ret)
1952 goto dis_opt_clks;
1953
1954 _write_sysconfig(v, oh);
1955 1950
1956 if (oh->class->sysc->srst_udelay) 1951 if (oh->class->sysc->srst_udelay)
1957 udelay(oh->class->sysc->srst_udelay); 1952 udelay(oh->class->sysc->srst_udelay);
1958 1953
1959 c = _wait_softreset_complete(oh); 1954 c = _wait_softreset_complete(oh);
1960 if (c == MAX_MODULE_SOFTRESET_WAIT) 1955 if (c == MAX_MODULE_SOFTRESET_WAIT) {
1961 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1956 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1962 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1957 oh->name, MAX_MODULE_SOFTRESET_WAIT);
1963 else 1958 ret = -ETIMEDOUT;
1959 goto dis_opt_clks;
1960 } else {
1964 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); 1961 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1962 }
1963
1964 ret = _clear_softreset(oh, &v);
1965 if (ret)
1966 goto dis_opt_clks;
1967
1968 _write_sysconfig(v, oh);
1965 1969
1966 /* 1970 /*
1967 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from 1971 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1968 * _wait_target_ready() or _reset() 1972 * _wait_target_ready() or _reset()
1969 */ 1973 */
1970 1974
1971 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1972
1973dis_opt_clks: 1975dis_opt_clks:
1974 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1976 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1975 _disable_optional_clocks(oh); 1977 _disable_optional_clocks(oh);
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 18f333c440db..810c205d668b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1365,11 +1365,10 @@ static struct omap_hwmod_class_sysconfig dra7xx_spinlock_sysc = {
1365 .rev_offs = 0x0000, 1365 .rev_offs = 0x0000,
1366 .sysc_offs = 0x0010, 1366 .sysc_offs = 0x0010,
1367 .syss_offs = 0x0014, 1367 .syss_offs = 0x0014,
1368 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | 1368 .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
1369 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 1369 SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1370 SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), 1370 SYSS_HAS_RESET_STATUS),
1371 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 1371 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1372 SIDLE_SMART_WKUP),
1373 .sysc_fields = &omap_hwmod_sysc_type1, 1372 .sysc_fields = &omap_hwmod_sysc_type1,
1374}; 1373};
1375 1374
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 3d5b24dcd9a4..c33e07e2f0d4 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -22,6 +22,8 @@
22#include "common-board-devices.h" 22#include "common-board-devices.h"
23#include "dss-common.h" 23#include "dss-common.h"
24#include "control.h" 24#include "control.h"
25#include "omap-secure.h"
26#include "soc.h"
25 27
26struct pdata_init { 28struct pdata_init {
27 const char *compatible; 29 const char *compatible;
@@ -169,6 +171,22 @@ static void __init am3517_evm_legacy_init(void)
169 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); 171 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
170 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ 172 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
171} 173}
174
175static void __init nokia_n900_legacy_init(void)
176{
177 hsmmc2_internal_input_clk();
178
179 if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
180 if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
181 pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
182 /* set IBE to 1 */
183 rx51_secure_update_aux_cr(BIT(6), 0);
184 } else {
185 pr_warning("RX-51: Not enabling ARM errata 430973 workaround\n");
186 pr_warning("Thumb binaries may crash randomly without this workaround\n");
187 }
188 }
189}
172#endif /* CONFIG_ARCH_OMAP3 */ 190#endif /* CONFIG_ARCH_OMAP3 */
173 191
174#ifdef CONFIG_ARCH_OMAP4 192#ifdef CONFIG_ARCH_OMAP4
@@ -239,6 +257,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
239#endif 257#endif
240#ifdef CONFIG_ARCH_OMAP3 258#ifdef CONFIG_ARCH_OMAP3
241 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), 259 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata),
260 OF_DEV_AUXDATA("ti,omap3-padconf", 0x480025a0, "480025a0.pinmux", &pcs_pdata),
242 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), 261 OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata),
243 /* Only on am3517 */ 262 /* Only on am3517 */
244 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), 263 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
@@ -259,7 +278,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
259static struct pdata_init pdata_quirks[] __initdata = { 278static struct pdata_init pdata_quirks[] __initdata = {
260#ifdef CONFIG_ARCH_OMAP3 279#ifdef CONFIG_ARCH_OMAP3
261 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, }, 280 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
262 { "nokia,omap3-n900", hsmmc2_internal_input_clk, }, 281 { "nokia,omap3-n900", nokia_n900_legacy_init, },
263 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, 282 { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
264 { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, 283 { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
265 { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, 284 { "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 6334b96b4097..280f3c58abe5 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -183,11 +183,11 @@ void omap4_prminst_global_warm_sw_reset(void)
183 OMAP4_PRM_RSTCTRL_OFFSET); 183 OMAP4_PRM_RSTCTRL_OFFSET);
184 v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; 184 v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK;
185 omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, 185 omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION,
186 OMAP4430_PRM_DEVICE_INST, 186 dev_inst,
187 OMAP4_PRM_RSTCTRL_OFFSET); 187 OMAP4_PRM_RSTCTRL_OFFSET);
188 188
189 /* OCP barrier */ 189 /* OCP barrier */
190 v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, 190 v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
191 OMAP4430_PRM_DEVICE_INST, 191 dev_inst,
192 OMAP4_PRM_RSTCTRL_OFFSET); 192 OMAP4_PRM_RSTCTRL_OFFSET);
193} 193}
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index f70583fee59f..29997bde277d 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -38,6 +38,7 @@
38#include <linux/mtd/physmap.h> 38#include <linux/mtd/physmap.h>
39#include <linux/usb/gpio_vbus.h> 39#include <linux/usb/gpio_vbus.h>
40#include <linux/reboot.h> 40#include <linux/reboot.h>
41#include <linux/regulator/fixed.h>
41#include <linux/regulator/max1586.h> 42#include <linux/regulator/max1586.h>
42#include <linux/slab.h> 43#include <linux/slab.h>
43#include <linux/i2c/pxa-i2c.h> 44#include <linux/i2c/pxa-i2c.h>
@@ -714,6 +715,10 @@ static struct gpio global_gpios[] = {
714 { GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" }, 715 { GPIO56_MT9M111_nOE, GPIOF_OUT_INIT_LOW, "Camera nOE" },
715}; 716};
716 717
718static struct regulator_consumer_supply fixed_5v0_consumers[] = {
719 REGULATOR_SUPPLY("power", "pwm-backlight"),
720};
721
717static void __init mioa701_machine_init(void) 722static void __init mioa701_machine_init(void)
718{ 723{
719 int rc; 724 int rc;
@@ -753,6 +758,10 @@ static void __init mioa701_machine_init(void)
753 pxa_set_i2c_info(&i2c_pdata); 758 pxa_set_i2c_info(&i2c_pdata);
754 pxa27x_set_i2c_power_info(NULL); 759 pxa27x_set_i2c_power_info(NULL);
755 pxa_set_camera_info(&mioa701_pxacamera_platform_data); 760 pxa_set_camera_info(&mioa701_pxacamera_platform_data);
761
762 regulator_register_always_on(0, "fixed-5.0V", fixed_5v0_consumers,
763 ARRAY_SIZE(fixed_5v0_consumers),
764 5000000);
756} 765}
757 766
758static void mioa701_machine_exit(void) 767static void mioa701_machine_exit(void)
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index f33679d2d3ee..50e1d850ee2e 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -13,6 +13,8 @@
13#ifndef __ASM_ARCH_COLLIE_H 13#ifndef __ASM_ARCH_COLLIE_H
14#define __ASM_ARCH_COLLIE_H 14#define __ASM_ARCH_COLLIE_H
15 15
16#include "hardware.h" /* Gives GPIO_MAX */
17
16extern void locomolcd_power(int on); 18extern void locomolcd_power(int on);
17 19
18#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) 20#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 4ae0286b468d..f55b05a29b55 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -24,6 +24,7 @@
24#include <linux/cpu_pm.h> 24#include <linux/cpu_pm.h>
25#include <linux/suspend.h> 25#include <linux/suspend.h>
26#include <linux/err.h> 26#include <linux/err.h>
27#include <linux/slab.h>
27#include <linux/clk/tegra.h> 28#include <linux/clk/tegra.h>
28 29
29#include <asm/smp_plat.h> 30#include <asm/smp_plat.h>
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 303a285d80fd..6191603379e1 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -73,10 +73,20 @@ u32 tegra_uart_config[3] = {
73static void __init tegra_init_cache(void) 73static void __init tegra_init_cache(void)
74{ 74{
75#ifdef CONFIG_CACHE_L2X0 75#ifdef CONFIG_CACHE_L2X0
76 static const struct of_device_id pl310_ids[] __initconst = {
77 { .compatible = "arm,pl310-cache", },
78 {}
79 };
80
81 struct device_node *np;
76 int ret; 82 int ret;
77 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; 83 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
78 u32 aux_ctrl, cache_type; 84 u32 aux_ctrl, cache_type;
79 85
86 np = of_find_matching_node(NULL, pl310_ids);
87 if (!np)
88 return;
89
80 cache_type = readl(p + L2X0_CACHE_TYPE); 90 cache_type = readl(p + L2X0_CACHE_TYPE);
81 aux_ctrl = (cache_type & 0x700) << (17-8); 91 aux_ctrl = (cache_type & 0x700) << (17-8);
82 aux_ctrl |= 0x7C400001; 92 aux_ctrl |= 0x7C400001;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 1a77450e728a..11b3914660d2 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1358,7 +1358,7 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1358 *handle = DMA_ERROR_CODE; 1358 *handle = DMA_ERROR_CODE;
1359 size = PAGE_ALIGN(size); 1359 size = PAGE_ALIGN(size);
1360 1360
1361 if (gfp & GFP_ATOMIC) 1361 if (!(gfp & __GFP_WAIT))
1362 return __iommu_alloc_atomic(dev, size, handle); 1362 return __iommu_alloc_atomic(dev, size, handle);
1363 1363
1364 /* 1364 /*
diff --git a/arch/arm/mm/dump.c b/arch/arm/mm/dump.c
index 2b3a56414271..ef69152f9b52 100644
--- a/arch/arm/mm/dump.c
+++ b/arch/arm/mm/dump.c
@@ -264,6 +264,9 @@ static void walk_pmd(struct pg_state *st, pud_t *pud, unsigned long start)
264 note_page(st, addr, 3, pmd_val(*pmd)); 264 note_page(st, addr, 3, pmd_val(*pmd));
265 else 265 else
266 walk_pte(st, pmd, addr); 266 walk_pte(st, pmd, addr);
267
268 if (SECTION_SIZE < PMD_SIZE && pmd_large(pmd[1]))
269 note_page(st, addr + SECTION_SIZE, 3, pmd_val(pmd[1]));
267 } 270 }
268} 271}
269 272
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index d5a982d15a88..7ea641b7aa7d 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -38,6 +38,7 @@ static inline pmd_t *pmd_off_k(unsigned long virt)
38 38
39struct mem_type { 39struct mem_type {
40 pteval_t prot_pte; 40 pteval_t prot_pte;
41 pteval_t prot_pte_s2;
41 pmdval_t prot_l1; 42 pmdval_t prot_l1;
42 pmdval_t prot_sect; 43 pmdval_t prot_sect;
43 unsigned int domain; 44 unsigned int domain;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4f08c133cc25..a623cb3ad012 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -232,12 +232,16 @@ __setup("noalign", noalign_setup);
232#endif /* ifdef CONFIG_CPU_CP15 / else */ 232#endif /* ifdef CONFIG_CPU_CP15 / else */
233 233
234#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_XN 234#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_XN
235#define PROT_PTE_S2_DEVICE PROT_PTE_DEVICE
235#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE 236#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
236 237
237static struct mem_type mem_types[] = { 238static struct mem_type mem_types[] = {
238 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ 239 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
239 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | 240 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
240 L_PTE_SHARED, 241 L_PTE_SHARED,
242 .prot_pte_s2 = s2_policy(PROT_PTE_S2_DEVICE) |
243 s2_policy(L_PTE_S2_MT_DEV_SHARED) |
244 L_PTE_SHARED,
241 .prot_l1 = PMD_TYPE_TABLE, 245 .prot_l1 = PMD_TYPE_TABLE,
242 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_S, 246 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_S,
243 .domain = DOMAIN_IO, 247 .domain = DOMAIN_IO,
@@ -508,7 +512,8 @@ static void __init build_mem_type_table(void)
508 cp = &cache_policies[cachepolicy]; 512 cp = &cache_policies[cachepolicy];
509 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; 513 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
510 s2_pgprot = cp->pte_s2; 514 s2_pgprot = cp->pte_s2;
511 hyp_device_pgprot = s2_device_pgprot = mem_types[MT_DEVICE].prot_pte; 515 hyp_device_pgprot = mem_types[MT_DEVICE].prot_pte;
516 s2_device_pgprot = mem_types[MT_DEVICE].prot_pte_s2;
512 517
513 /* 518 /*
514 * ARMv6 and above have extended page tables. 519 * ARMv6 and above have extended page tables.
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 45dc29f85d56..32b3558321c4 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -208,7 +208,6 @@ __v6_setup:
208 mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache 208 mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache
209 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 209 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
210 mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache 210 mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache
211 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
212#ifdef CONFIG_MMU 211#ifdef CONFIG_MMU
213 mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs 212 mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs
214 mcr p15, 0, r0, c2, c0, 2 @ TTB control register 213 mcr p15, 0, r0, c2, c0, 2 @ TTB control register
@@ -218,6 +217,8 @@ __v6_setup:
218 ALT_UP(orr r8, r8, #TTB_FLAGS_UP) 217 ALT_UP(orr r8, r8, #TTB_FLAGS_UP)
219 mcr p15, 0, r8, c2, c0, 1 @ load TTB1 218 mcr p15, 0, r8, c2, c0, 1 @ load TTB1
220#endif /* CONFIG_MMU */ 219#endif /* CONFIG_MMU */
220 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer and
221 @ complete invalidations
221 adr r5, v6_crval 222 adr r5, v6_crval
222 ldmia r5, {r5, r6} 223 ldmia r5, {r5, r6}
223 ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables 224 ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index bd1781979a39..74f6033e76dd 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -351,7 +351,6 @@ __v7_setup:
351 351
3524: mov r10, #0 3524: mov r10, #0
353 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate 353 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
354 dsb
355#ifdef CONFIG_MMU 354#ifdef CONFIG_MMU
356 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs 355 mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
357 v7_ttb_setup r10, r4, r8, r5 @ TTBCR, TTBRx setup 356 v7_ttb_setup r10, r4, r8, r5 @ TTBCR, TTBRx setup
@@ -360,6 +359,7 @@ __v7_setup:
360 mcr p15, 0, r5, c10, c2, 0 @ write PRRR 359 mcr p15, 0, r5, c10, c2, 0 @ write PRRR
361 mcr p15, 0, r6, c10, c2, 1 @ write NMRR 360 mcr p15, 0, r6, c10, c2, 1 @ write NMRR
362#endif 361#endif
362 dsb @ Complete invalidations
363#ifndef CONFIG_ARM_THUMBEE 363#ifndef CONFIG_ARM_THUMBEE
364 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE 364 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
365 and r0, r0, #(0xf << 12) @ ThumbEE enabled field 365 and r0, r0, #(0xf << 12) @ ThumbEE enabled field
diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h
index 13fb0b3efc5f..453a179469a3 100644
--- a/arch/arm64/include/asm/percpu.h
+++ b/arch/arm64/include/asm/percpu.h
@@ -16,6 +16,8 @@
16#ifndef __ASM_PERCPU_H 16#ifndef __ASM_PERCPU_H
17#define __ASM_PERCPU_H 17#define __ASM_PERCPU_H
18 18
19#ifdef CONFIG_SMP
20
19static inline void set_my_cpu_offset(unsigned long off) 21static inline void set_my_cpu_offset(unsigned long off)
20{ 22{
21 asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory"); 23 asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory");
@@ -36,6 +38,12 @@ static inline unsigned long __my_cpu_offset(void)
36} 38}
37#define __my_cpu_offset __my_cpu_offset() 39#define __my_cpu_offset __my_cpu_offset()
38 40
41#else /* !CONFIG_SMP */
42
43#define set_my_cpu_offset(x) do { } while (0)
44
45#endif /* CONFIG_SMP */
46
39#include <asm-generic/percpu.h> 47#include <asm-generic/percpu.h>
40 48
41#endif /* __ASM_PERCPU_H */ 49#endif /* __ASM_PERCPU_H */
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index b524dcd17243..aa3917c8b623 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -136,11 +136,11 @@ extern struct page *empty_zero_page;
136/* 136/*
137 * The following only work if pte_present(). Undefined behaviour otherwise. 137 * The following only work if pte_present(). Undefined behaviour otherwise.
138 */ 138 */
139#define pte_present(pte) (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)) 139#define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
140#define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY) 140#define pte_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
141#define pte_young(pte) (pte_val(pte) & PTE_AF) 141#define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
142#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL) 142#define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
143#define pte_write(pte) (pte_val(pte) & PTE_WRITE) 143#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
144#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN)) 144#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
145 145
146#define pte_valid_user(pte) \ 146#define pte_valid_user(pte) \
diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c
index c3b6c63ea5fb..38f0558f0c0a 100644
--- a/arch/arm64/kernel/stacktrace.c
+++ b/arch/arm64/kernel/stacktrace.c
@@ -48,7 +48,11 @@ int unwind_frame(struct stackframe *frame)
48 48
49 frame->sp = fp + 0x10; 49 frame->sp = fp + 0x10;
50 frame->fp = *(unsigned long *)(fp); 50 frame->fp = *(unsigned long *)(fp);
51 frame->pc = *(unsigned long *)(fp + 8); 51 /*
52 * -4 here because we care about the PC at time of bl,
53 * not where the return will go.
54 */
55 frame->pc = *(unsigned long *)(fp + 8) - 4;
52 56
53 return 0; 57 return 0;
54} 58}
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 3b47c36e10ff..2c56012cb2d2 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -694,6 +694,24 @@ __hyp_panic_str:
694 694
695 .align 2 695 .align 2
696 696
697/*
698 * u64 kvm_call_hyp(void *hypfn, ...);
699 *
700 * This is not really a variadic function in the classic C-way and care must
701 * be taken when calling this to ensure parameters are passed in registers
702 * only, since the stack will change between the caller and the callee.
703 *
704 * Call the function with the first argument containing a pointer to the
705 * function you wish to call in Hyp mode, and subsequent arguments will be
706 * passed as x0, x1, and x2 (a maximum of 3 arguments in addition to the
707 * function pointer can be passed). The function being called must be mapped
708 * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
709 * passed in r0 and r1.
710 *
711 * A function pointer with a value of 0 has a special meaning, and is
712 * used to implement __hyp_get_vectors in the same way as in
713 * arch/arm64/kernel/hyp_stub.S.
714 */
697ENTRY(kvm_call_hyp) 715ENTRY(kvm_call_hyp)
698 hvc #0 716 hvc #0
699 ret 717 ret
@@ -737,7 +755,12 @@ el1_sync: // Guest trapped into EL2
737 pop x2, x3 755 pop x2, x3
738 pop x0, x1 756 pop x0, x1
739 757
740 push lr, xzr 758 /* Check for __hyp_get_vectors */
759 cbnz x0, 1f
760 mrs x0, vbar_el2
761 b 2f
762
7631: push lr, xzr
741 764
742 /* 765 /*
743 * Compute the function address in EL2, and shuffle the parameters. 766 * Compute the function address in EL2, and shuffle the parameters.
@@ -750,7 +773,7 @@ el1_sync: // Guest trapped into EL2
750 blr lr 773 blr lr
751 774
752 pop lr, xzr 775 pop lr, xzr
753 eret 7762: eret
754 777
755el1_trap: 778el1_trap:
756 /* 779 /*
diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
index 22fb66590dcd..dba48a5d5bb9 100644
--- a/arch/avr32/Makefile
+++ b/arch/avr32/Makefile
@@ -11,7 +11,7 @@ all: uImage vmlinux.elf
11 11
12KBUILD_DEFCONFIG := atstk1002_defconfig 12KBUILD_DEFCONFIG := atstk1002_defconfig
13 13
14KBUILD_CFLAGS += -pipe -fno-builtin -mno-pic 14KBUILD_CFLAGS += -pipe -fno-builtin -mno-pic -D__linux__
15KBUILD_AFLAGS += -mrelax -mno-pic 15KBUILD_AFLAGS += -mrelax -mno-pic
16KBUILD_CFLAGS_MODULE += -mno-relax 16KBUILD_CFLAGS_MODULE += -mno-relax
17LDFLAGS_vmlinux += --relax 17LDFLAGS_vmlinux += --relax
diff --git a/arch/avr32/boards/mimc200/fram.c b/arch/avr32/boards/mimc200/fram.c
index 9764a1a1073e..c1466a872b9c 100644
--- a/arch/avr32/boards/mimc200/fram.c
+++ b/arch/avr32/boards/mimc200/fram.c
@@ -11,6 +11,7 @@
11#define FRAM_VERSION "1.0" 11#define FRAM_VERSION "1.0"
12 12
13#include <linux/miscdevice.h> 13#include <linux/miscdevice.h>
14#include <linux/module.h>
14#include <linux/proc_fs.h> 15#include <linux/proc_fs.h>
15#include <linux/mm.h> 16#include <linux/mm.h>
16#include <linux/io.h> 17#include <linux/io.h>
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
index cfb9fe1b8df9..c7c64a63c29f 100644
--- a/arch/avr32/include/asm/Kbuild
+++ b/arch/avr32/include/asm/Kbuild
@@ -17,5 +17,6 @@ generic-y += scatterlist.h
17generic-y += sections.h 17generic-y += sections.h
18generic-y += topology.h 18generic-y += topology.h
19generic-y += trace_clock.h 19generic-y += trace_clock.h
20generic-y += vga.h
20generic-y += xor.h 21generic-y += xor.h
21generic-y += hash.h 22generic-y += hash.h
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h
index fc6483f83ccc..4f5ec2bb7172 100644
--- a/arch/avr32/include/asm/io.h
+++ b/arch/avr32/include/asm/io.h
@@ -295,6 +295,8 @@ extern void __iounmap(void __iomem *addr);
295#define iounmap(addr) \ 295#define iounmap(addr) \
296 __iounmap(addr) 296 __iounmap(addr)
297 297
298#define ioremap_wc ioremap_nocache
299
298#define cached(addr) P1SEGADDR(addr) 300#define cached(addr) P1SEGADDR(addr)
299#define uncached(addr) P2SEGADDR(addr) 301#define uncached(addr) P2SEGADDR(addr)
300 302
diff --git a/arch/c6x/include/asm/cache.h b/arch/c6x/include/asm/cache.h
index 09c5a0f5f4d1..86648c083bb4 100644
--- a/arch/c6x/include/asm/cache.h
+++ b/arch/c6x/include/asm/cache.h
@@ -12,6 +12,7 @@
12#define _ASM_C6X_CACHE_H 12#define _ASM_C6X_CACHE_H
13 13
14#include <linux/irqflags.h> 14#include <linux/irqflags.h>
15#include <linux/init.h>
15 16
16/* 17/*
17 * Cache line size 18 * Cache line size
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index 7cc8c364924d..6fb9e813a910 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -1,4 +1,4 @@
1 1generic-y += barrier.h
2generic-y += bitsperlong.h 2generic-y += bitsperlong.h
3generic-y += clkdev.h 3generic-y += clkdev.h
4generic-y += cputime.h 4generic-y += cputime.h
@@ -6,6 +6,7 @@ generic-y += device.h
6generic-y += emergency-restart.h 6generic-y += emergency-restart.h
7generic-y += errno.h 7generic-y += errno.h
8generic-y += exec.h 8generic-y += exec.h
9generic-y += hash.h
9generic-y += hw_irq.h 10generic-y += hw_irq.h
10generic-y += ioctl.h 11generic-y += ioctl.h
11generic-y += ipcbuf.h 12generic-y += ipcbuf.h
@@ -18,6 +19,7 @@ generic-y += local.h
18generic-y += mman.h 19generic-y += mman.h
19generic-y += mutex.h 20generic-y += mutex.h
20generic-y += percpu.h 21generic-y += percpu.h
22generic-y += preempt.h
21generic-y += resource.h 23generic-y += resource.h
22generic-y += scatterlist.h 24generic-y += scatterlist.h
23generic-y += sections.h 25generic-y += sections.h
@@ -31,5 +33,3 @@ generic-y += trace_clock.h
31generic-y += types.h 33generic-y += types.h
32generic-y += word-at-a-time.h 34generic-y += word-at-a-time.h
33generic-y += xor.h 35generic-y += xor.h
34generic-y += preempt.h
35generic-y += hash.h
diff --git a/arch/m68k/include/asm/barrier.h b/arch/m68k/include/asm/barrier.h
deleted file mode 100644
index 15c5f77c1614..000000000000
--- a/arch/m68k/include/asm/barrier.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _M68K_BARRIER_H
2#define _M68K_BARRIER_H
3
4#define nop() do { asm volatile ("nop"); barrier(); } while (0)
5
6#include <asm-generic/barrier.h>
7
8#endif /* _M68K_BARRIER_H */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 014f288fc813..9d38b73989eb 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6
7#define NR_syscalls 349 7#define NR_syscalls 351
8 8
9#define __ARCH_WANT_OLD_READDIR 9#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_OLD_STAT 10#define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index 625f321001dc..b932dd470041 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -354,5 +354,7 @@
354#define __NR_process_vm_writev 346 354#define __NR_process_vm_writev 346
355#define __NR_kcmp 347 355#define __NR_kcmp 347
356#define __NR_finit_module 348 356#define __NR_finit_module 348
357#define __NR_sched_setattr 349
358#define __NR_sched_getattr 350
357 359
358#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ 360#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 3f04ea0ab802..b6223dc41d82 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -369,4 +369,6 @@ ENTRY(sys_call_table)
369 .long sys_process_vm_writev 369 .long sys_process_vm_writev
370 .long sys_kcmp 370 .long sys_kcmp
371 .long sys_finit_module 371 .long sys_finit_module
372 .long sys_sched_setattr
373 .long sys_sched_getattr /* 350 */
372 374
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 84fdf6857c31..a613d2c82fd9 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -200,10 +200,11 @@ static inline void __user *arch_compat_alloc_user_space(long len)
200 200
201 /* 201 /*
202 * We can't access below the stack pointer in the 32bit ABI and 202 * We can't access below the stack pointer in the 32bit ABI and
203 * can access 288 bytes in the 64bit ABI 203 * can access 288 bytes in the 64bit big-endian ABI,
204 * or 512 bytes with the new ELFv2 little-endian ABI.
204 */ 205 */
205 if (!is_32bit_task()) 206 if (!is_32bit_task())
206 usp -= 288; 207 usp -= USER_REDZONE_SIZE;
207 208
208 return (void __user *) (usp - len); 209 return (void __user *) (usp - len);
209} 210}
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 9e39ceb1d19f..d4dd41fb951b 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -172,10 +172,20 @@ struct eeh_ops {
172}; 172};
173 173
174extern struct eeh_ops *eeh_ops; 174extern struct eeh_ops *eeh_ops;
175extern int eeh_subsystem_enabled; 175extern bool eeh_subsystem_enabled;
176extern raw_spinlock_t confirm_error_lock; 176extern raw_spinlock_t confirm_error_lock;
177extern int eeh_probe_mode; 177extern int eeh_probe_mode;
178 178
179static inline bool eeh_enabled(void)
180{
181 return eeh_subsystem_enabled;
182}
183
184static inline void eeh_set_enable(bool mode)
185{
186 eeh_subsystem_enabled = mode;
187}
188
179#define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */ 189#define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */
180#define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */ 190#define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */
181 191
@@ -246,7 +256,7 @@ void eeh_remove_device(struct pci_dev *);
246 * If this macro yields TRUE, the caller relays to eeh_check_failure() 256 * If this macro yields TRUE, the caller relays to eeh_check_failure()
247 * which does further tests out of line. 257 * which does further tests out of line.
248 */ 258 */
249#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) 259#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_enabled())
250 260
251/* 261/*
252 * Reads from a device which has been isolated by EEH will return 262 * Reads from a device which has been isolated by EEH will return
@@ -257,6 +267,13 @@ void eeh_remove_device(struct pci_dev *);
257 267
258#else /* !CONFIG_EEH */ 268#else /* !CONFIG_EEH */
259 269
270static inline bool eeh_enabled(void)
271{
272 return false;
273}
274
275static inline void eeh_set_enable(bool mode) { }
276
260static inline int eeh_init(void) 277static inline int eeh_init(void)
261{ 278{
262 return 0; 279 return 0;
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index d750336b171d..623f2971ce0e 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -127,7 +127,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
127 unsigned long addr, pte_t *ptep) 127 unsigned long addr, pte_t *ptep)
128{ 128{
129#ifdef CONFIG_PPC64 129#ifdef CONFIG_PPC64
130 return __pte(pte_update(mm, addr, ptep, ~0UL, 1)); 130 return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1));
131#else 131#else
132 return __pte(pte_update(ptep, ~0UL, 0)); 132 return __pte(pte_update(ptep, ~0UL, 0));
133#endif 133#endif
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 40157e2ca691..ed82142a3251 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -816,8 +816,8 @@ int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
816int64_t opal_pci_poll(uint64_t phb_id); 816int64_t opal_pci_poll(uint64_t phb_id);
817int64_t opal_return_cpu(void); 817int64_t opal_return_cpu(void);
818 818
819int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, __be64 *val); 819int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
820int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val); 820int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
821 821
822int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type, 822int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
823 uint32_t addr, uint32_t data, uint32_t sz); 823 uint32_t addr, uint32_t data, uint32_t sz);
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index bc141c950b1e..eb9261024f51 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -195,6 +195,7 @@ extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
195static inline unsigned long pte_update(struct mm_struct *mm, 195static inline unsigned long pte_update(struct mm_struct *mm,
196 unsigned long addr, 196 unsigned long addr,
197 pte_t *ptep, unsigned long clr, 197 pte_t *ptep, unsigned long clr,
198 unsigned long set,
198 int huge) 199 int huge)
199{ 200{
200#ifdef PTE_ATOMIC_UPDATES 201#ifdef PTE_ATOMIC_UPDATES
@@ -205,14 +206,15 @@ static inline unsigned long pte_update(struct mm_struct *mm,
205 andi. %1,%0,%6\n\ 206 andi. %1,%0,%6\n\
206 bne- 1b \n\ 207 bne- 1b \n\
207 andc %1,%0,%4 \n\ 208 andc %1,%0,%4 \n\
209 or %1,%1,%7\n\
208 stdcx. %1,0,%3 \n\ 210 stdcx. %1,0,%3 \n\
209 bne- 1b" 211 bne- 1b"
210 : "=&r" (old), "=&r" (tmp), "=m" (*ptep) 212 : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
211 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY) 213 : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set)
212 : "cc" ); 214 : "cc" );
213#else 215#else
214 unsigned long old = pte_val(*ptep); 216 unsigned long old = pte_val(*ptep);
215 *ptep = __pte(old & ~clr); 217 *ptep = __pte((old & ~clr) | set);
216#endif 218#endif
217 /* huge pages use the old page table lock */ 219 /* huge pages use the old page table lock */
218 if (!huge) 220 if (!huge)
@@ -231,9 +233,9 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
231{ 233{
232 unsigned long old; 234 unsigned long old;
233 235
234 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) 236 if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
235 return 0; 237 return 0;
236 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0); 238 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
237 return (old & _PAGE_ACCESSED) != 0; 239 return (old & _PAGE_ACCESSED) != 0;
238} 240}
239#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 241#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
@@ -252,7 +254,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
252 if ((pte_val(*ptep) & _PAGE_RW) == 0) 254 if ((pte_val(*ptep) & _PAGE_RW) == 0)
253 return; 255 return;
254 256
255 pte_update(mm, addr, ptep, _PAGE_RW, 0); 257 pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
256} 258}
257 259
258static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, 260static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
@@ -261,7 +263,7 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
261 if ((pte_val(*ptep) & _PAGE_RW) == 0) 263 if ((pte_val(*ptep) & _PAGE_RW) == 0)
262 return; 264 return;
263 265
264 pte_update(mm, addr, ptep, _PAGE_RW, 1); 266 pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
265} 267}
266 268
267/* 269/*
@@ -284,14 +286,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
284static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 286static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
285 unsigned long addr, pte_t *ptep) 287 unsigned long addr, pte_t *ptep)
286{ 288{
287 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0); 289 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
288 return __pte(old); 290 return __pte(old);
289} 291}
290 292
291static inline void pte_clear(struct mm_struct *mm, unsigned long addr, 293static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
292 pte_t * ptep) 294 pte_t * ptep)
293{ 295{
294 pte_update(mm, addr, ptep, ~0UL, 0); 296 pte_update(mm, addr, ptep, ~0UL, 0, 0);
295} 297}
296 298
297 299
@@ -506,7 +508,9 @@ extern int pmdp_set_access_flags(struct vm_area_struct *vma,
506 508
507extern unsigned long pmd_hugepage_update(struct mm_struct *mm, 509extern unsigned long pmd_hugepage_update(struct mm_struct *mm,
508 unsigned long addr, 510 unsigned long addr,
509 pmd_t *pmdp, unsigned long clr); 511 pmd_t *pmdp,
512 unsigned long clr,
513 unsigned long set);
510 514
511static inline int __pmdp_test_and_clear_young(struct mm_struct *mm, 515static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
512 unsigned long addr, pmd_t *pmdp) 516 unsigned long addr, pmd_t *pmdp)
@@ -515,7 +519,7 @@ static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
515 519
516 if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) 520 if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
517 return 0; 521 return 0;
518 old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED); 522 old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
519 return ((old & _PAGE_ACCESSED) != 0); 523 return ((old & _PAGE_ACCESSED) != 0);
520} 524}
521 525
@@ -542,7 +546,7 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
542 if ((pmd_val(*pmdp) & _PAGE_RW) == 0) 546 if ((pmd_val(*pmdp) & _PAGE_RW) == 0)
543 return; 547 return;
544 548
545 pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW); 549 pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW, 0);
546} 550}
547 551
548#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH 552#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index f83b6f3e1b39..3ebb188c3ff5 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -75,12 +75,34 @@ static inline pte_t pte_mknuma(pte_t pte)
75 return pte; 75 return pte;
76} 76}
77 77
78#define ptep_set_numa ptep_set_numa
79static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
80 pte_t *ptep)
81{
82 if ((pte_val(*ptep) & _PAGE_PRESENT) == 0)
83 VM_BUG_ON(1);
84
85 pte_update(mm, addr, ptep, _PAGE_PRESENT, _PAGE_NUMA, 0);
86 return;
87}
88
78#define pmd_numa pmd_numa 89#define pmd_numa pmd_numa
79static inline int pmd_numa(pmd_t pmd) 90static inline int pmd_numa(pmd_t pmd)
80{ 91{
81 return pte_numa(pmd_pte(pmd)); 92 return pte_numa(pmd_pte(pmd));
82} 93}
83 94
95#define pmdp_set_numa pmdp_set_numa
96static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
97 pmd_t *pmdp)
98{
99 if ((pmd_val(*pmdp) & _PAGE_PRESENT) == 0)
100 VM_BUG_ON(1);
101
102 pmd_hugepage_update(mm, addr, pmdp, _PAGE_PRESENT, _PAGE_NUMA);
103 return;
104}
105
84#define pmd_mknonnuma pmd_mknonnuma 106#define pmd_mknonnuma pmd_mknonnuma
85static inline pmd_t pmd_mknonnuma(pmd_t pmd) 107static inline pmd_t pmd_mknonnuma(pmd_t pmd)
86{ 108{
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index becc08e6a65c..279b80f3bb29 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -28,11 +28,23 @@
28 28
29#ifdef __powerpc64__ 29#ifdef __powerpc64__
30 30
31/*
32 * Size of redzone that userspace is allowed to use below the stack
33 * pointer. This is 288 in the 64-bit big-endian ELF ABI, and 512 in
34 * the new ELFv2 little-endian ABI, so we allow the larger amount.
35 *
36 * For kernel code we allow a 288-byte redzone, in order to conserve
37 * kernel stack space; gcc currently only uses 288 bytes, and will
38 * hopefully allow explicit control of the redzone size in future.
39 */
40#define USER_REDZONE_SIZE 512
41#define KERNEL_REDZONE_SIZE 288
42
31#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ 43#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
32#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */ 44#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
33#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265) 45#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
34#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \ 46#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
35 STACK_FRAME_OVERHEAD + 288) 47 STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
36#define STACK_FRAME_MARKER 12 48#define STACK_FRAME_MARKER 12
37 49
38/* Size of dummy stack frame allocated when calling signal handler. */ 50/* Size of dummy stack frame allocated when calling signal handler. */
@@ -41,6 +53,8 @@
41 53
42#else /* __powerpc64__ */ 54#else /* __powerpc64__ */
43 55
56#define USER_REDZONE_SIZE 0
57#define KERNEL_REDZONE_SIZE 0
44#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ 58#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
45#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */ 59#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
46#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773) 60#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
diff --git a/arch/powerpc/include/asm/vdso.h b/arch/powerpc/include/asm/vdso.h
index 0d9cecddf8a4..c53f5f6d1761 100644
--- a/arch/powerpc/include/asm/vdso.h
+++ b/arch/powerpc/include/asm/vdso.h
@@ -4,11 +4,11 @@
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6/* Default link addresses for the vDSOs */ 6/* Default link addresses for the vDSOs */
7#define VDSO32_LBASE 0x100000 7#define VDSO32_LBASE 0x0
8#define VDSO64_LBASE 0x100000 8#define VDSO64_LBASE 0x0
9 9
10/* Default map addresses for 32bit vDSO */ 10/* Default map addresses for 32bit vDSO */
11#define VDSO32_MBASE VDSO32_LBASE 11#define VDSO32_MBASE 0x100000
12 12
13#define VDSO_VERSION_STRING LINUX_2.6.15 13#define VDSO_VERSION_STRING LINUX_2.6.15
14 14
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 11c1d069d920..7a13f378ca2c 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -98,17 +98,19 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
98 size_t csize, unsigned long offset, int userbuf) 98 size_t csize, unsigned long offset, int userbuf)
99{ 99{
100 void *vaddr; 100 void *vaddr;
101 phys_addr_t paddr;
101 102
102 if (!csize) 103 if (!csize)
103 return 0; 104 return 0;
104 105
105 csize = min_t(size_t, csize, PAGE_SIZE); 106 csize = min_t(size_t, csize, PAGE_SIZE);
107 paddr = pfn << PAGE_SHIFT;
106 108
107 if ((min_low_pfn < pfn) && (pfn < max_pfn)) { 109 if (memblock_is_region_memory(paddr, csize)) {
108 vaddr = __va(pfn << PAGE_SHIFT); 110 vaddr = __va(paddr);
109 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf); 111 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
110 } else { 112 } else {
111 vaddr = __ioremap(pfn << PAGE_SHIFT, PAGE_SIZE, 0); 113 vaddr = __ioremap(paddr, PAGE_SIZE, 0);
112 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf); 114 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
113 iounmap(vaddr); 115 iounmap(vaddr);
114 } 116 }
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 148db72a8c43..e7b76a6bf150 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -28,6 +28,7 @@
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/proc_fs.h> 29#include <linux/proc_fs.h>
30#include <linux/rbtree.h> 30#include <linux/rbtree.h>
31#include <linux/reboot.h>
31#include <linux/seq_file.h> 32#include <linux/seq_file.h>
32#include <linux/spinlock.h> 33#include <linux/spinlock.h>
33#include <linux/export.h> 34#include <linux/export.h>
@@ -89,7 +90,7 @@
89/* Platform dependent EEH operations */ 90/* Platform dependent EEH operations */
90struct eeh_ops *eeh_ops = NULL; 91struct eeh_ops *eeh_ops = NULL;
91 92
92int eeh_subsystem_enabled; 93bool eeh_subsystem_enabled = false;
93EXPORT_SYMBOL(eeh_subsystem_enabled); 94EXPORT_SYMBOL(eeh_subsystem_enabled);
94 95
95/* 96/*
@@ -364,7 +365,7 @@ int eeh_dev_check_failure(struct eeh_dev *edev)
364 365
365 eeh_stats.total_mmio_ffs++; 366 eeh_stats.total_mmio_ffs++;
366 367
367 if (!eeh_subsystem_enabled) 368 if (!eeh_enabled())
368 return 0; 369 return 0;
369 370
370 if (!edev) { 371 if (!edev) {
@@ -747,6 +748,17 @@ int __exit eeh_ops_unregister(const char *name)
747 return -EEXIST; 748 return -EEXIST;
748} 749}
749 750
751static int eeh_reboot_notifier(struct notifier_block *nb,
752 unsigned long action, void *unused)
753{
754 eeh_set_enable(false);
755 return NOTIFY_DONE;
756}
757
758static struct notifier_block eeh_reboot_nb = {
759 .notifier_call = eeh_reboot_notifier,
760};
761
750/** 762/**
751 * eeh_init - EEH initialization 763 * eeh_init - EEH initialization
752 * 764 *
@@ -778,6 +790,14 @@ int eeh_init(void)
778 if (machine_is(powernv) && cnt++ <= 0) 790 if (machine_is(powernv) && cnt++ <= 0)
779 return ret; 791 return ret;
780 792
793 /* Register reboot notifier */
794 ret = register_reboot_notifier(&eeh_reboot_nb);
795 if (ret) {
796 pr_warn("%s: Failed to register notifier (%d)\n",
797 __func__, ret);
798 return ret;
799 }
800
781 /* call platform initialization function */ 801 /* call platform initialization function */
782 if (!eeh_ops) { 802 if (!eeh_ops) {
783 pr_warning("%s: Platform EEH operation not found\n", 803 pr_warning("%s: Platform EEH operation not found\n",
@@ -822,7 +842,7 @@ int eeh_init(void)
822 return ret; 842 return ret;
823 } 843 }
824 844
825 if (eeh_subsystem_enabled) 845 if (eeh_enabled())
826 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n"); 846 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
827 else 847 else
828 pr_warning("EEH: No capable adapters found\n"); 848 pr_warning("EEH: No capable adapters found\n");
@@ -897,7 +917,7 @@ void eeh_add_device_late(struct pci_dev *dev)
897 struct device_node *dn; 917 struct device_node *dn;
898 struct eeh_dev *edev; 918 struct eeh_dev *edev;
899 919
900 if (!dev || !eeh_subsystem_enabled) 920 if (!dev || !eeh_enabled())
901 return; 921 return;
902 922
903 pr_debug("EEH: Adding device %s\n", pci_name(dev)); 923 pr_debug("EEH: Adding device %s\n", pci_name(dev));
@@ -1005,7 +1025,7 @@ void eeh_remove_device(struct pci_dev *dev)
1005{ 1025{
1006 struct eeh_dev *edev; 1026 struct eeh_dev *edev;
1007 1027
1008 if (!dev || !eeh_subsystem_enabled) 1028 if (!dev || !eeh_enabled())
1009 return; 1029 return;
1010 edev = pci_dev_to_eeh_dev(dev); 1030 edev = pci_dev_to_eeh_dev(dev);
1011 1031
@@ -1045,7 +1065,7 @@ void eeh_remove_device(struct pci_dev *dev)
1045 1065
1046static int proc_eeh_show(struct seq_file *m, void *v) 1066static int proc_eeh_show(struct seq_file *m, void *v)
1047{ 1067{
1048 if (0 == eeh_subsystem_enabled) { 1068 if (!eeh_enabled()) {
1049 seq_printf(m, "EEH Subsystem is globally disabled\n"); 1069 seq_printf(m, "EEH Subsystem is globally disabled\n");
1050 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs); 1070 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1051 } else { 1071 } else {
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 9b27b293a922..b0ded97ee4e1 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -74,6 +74,7 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
74 */ 74 */
75static int test_24bit_addr(unsigned long ip, unsigned long addr) 75static int test_24bit_addr(unsigned long ip, unsigned long addr)
76{ 76{
77 addr = ppc_function_entry((void *)addr);
77 78
78 /* use the create_branch to verify that this offset can be branched */ 79 /* use the create_branch to verify that this offset can be branched */
79 return create_branch((unsigned int *)ip, addr, 0); 80 return create_branch((unsigned int *)ip, addr, 0);
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 879f09620f83..7c6bb4b17b49 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -57,11 +57,14 @@ _GLOBAL(call_do_softirq)
57 mtlr r0 57 mtlr r0
58 blr 58 blr
59 59
60/*
61 * void call_do_irq(struct pt_regs *regs, struct thread_info *irqtp);
62 */
60_GLOBAL(call_do_irq) 63_GLOBAL(call_do_irq)
61 mflr r0 64 mflr r0
62 stw r0,4(r1) 65 stw r0,4(r1)
63 lwz r10,THREAD+KSP_LIMIT(r2) 66 lwz r10,THREAD+KSP_LIMIT(r2)
64 addi r11,r3,THREAD_INFO_GAP 67 addi r11,r4,THREAD_INFO_GAP
65 stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4) 68 stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
66 mr r1,r4 69 mr r1,r4
67 stw r10,8(r1) 70 stw r10,8(r1)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 8d4c247f1738..af064d28b365 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1048,6 +1048,15 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
1048 flush_altivec_to_thread(src); 1048 flush_altivec_to_thread(src);
1049 flush_vsx_to_thread(src); 1049 flush_vsx_to_thread(src);
1050 flush_spe_to_thread(src); 1050 flush_spe_to_thread(src);
1051 /*
1052 * Flush TM state out so we can copy it. __switch_to_tm() does this
1053 * flush but it removes the checkpointed state from the current CPU and
1054 * transitions the CPU out of TM mode. Hence we need to call
1055 * tm_recheckpoint_new_task() (on the same task) to restore the
1056 * checkpointed state back and the TM mode.
1057 */
1058 __switch_to_tm(src);
1059 tm_recheckpoint_new_task(src);
1051 1060
1052 *dst = *src; 1061 *dst = *src;
1053 1062
diff --git a/arch/powerpc/kernel/reloc_64.S b/arch/powerpc/kernel/reloc_64.S
index 1482327cfeba..d88736fbece6 100644
--- a/arch/powerpc/kernel/reloc_64.S
+++ b/arch/powerpc/kernel/reloc_64.S
@@ -81,6 +81,7 @@ _GLOBAL(relocate)
81 81
826: blr 826: blr
83 83
84.balign 8
84p_dyn: .llong __dynamic_start - 0b 85p_dyn: .llong __dynamic_start - 0b
85p_rela: .llong __rela_dyn_start - 0b 86p_rela: .llong __rela_dyn_start - 0b
86p_st: .llong _stext - 0b 87p_st: .llong _stext - 0b
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index e35bf773df7a..8d253c29649b 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -65,8 +65,8 @@ struct rt_sigframe {
65 struct siginfo __user *pinfo; 65 struct siginfo __user *pinfo;
66 void __user *puc; 66 void __user *puc;
67 struct siginfo info; 67 struct siginfo info;
68 /* 64 bit ABI allows for 288 bytes below sp before decrementing it. */ 68 /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
69 char abigap[288]; 69 char abigap[USER_REDZONE_SIZE];
70} __attribute__ ((aligned (16))); 70} __attribute__ ((aligned (16)));
71 71
72static const char fmt32[] = KERN_INFO \ 72static const char fmt32[] = KERN_INFO \
diff --git a/arch/powerpc/kernel/vdso32/vdso32_wrapper.S b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
index 79683d0393f5..6ac107ac402a 100644
--- a/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
+++ b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
@@ -6,7 +6,7 @@
6 .globl vdso32_start, vdso32_end 6 .globl vdso32_start, vdso32_end
7 .balign PAGE_SIZE 7 .balign PAGE_SIZE
8vdso32_start: 8vdso32_start:
9 .incbin "arch/powerpc/kernel/vdso32/vdso32.so" 9 .incbin "arch/powerpc/kernel/vdso32/vdso32.so.dbg"
10 .balign PAGE_SIZE 10 .balign PAGE_SIZE
11vdso32_end: 11vdso32_end:
12 12
diff --git a/arch/powerpc/kernel/vdso64/vdso64_wrapper.S b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
index 8df9e2463007..df60fca6a13d 100644
--- a/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
+++ b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
@@ -6,7 +6,7 @@
6 .globl vdso64_start, vdso64_end 6 .globl vdso64_start, vdso64_end
7 .balign PAGE_SIZE 7 .balign PAGE_SIZE
8vdso64_start: 8vdso64_start:
9 .incbin "arch/powerpc/kernel/vdso64/vdso64.so" 9 .incbin "arch/powerpc/kernel/vdso64/vdso64.so.dbg"
10 .balign PAGE_SIZE 10 .balign PAGE_SIZE
11vdso64_end: 11vdso64_end:
12 12
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 65b7b65e8708..62bf5e8e78da 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -510,7 +510,8 @@ int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
510} 510}
511 511
512unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, 512unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
513 pmd_t *pmdp, unsigned long clr) 513 pmd_t *pmdp, unsigned long clr,
514 unsigned long set)
514{ 515{
515 516
516 unsigned long old, tmp; 517 unsigned long old, tmp;
@@ -526,14 +527,15 @@ unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
526 andi. %1,%0,%6\n\ 527 andi. %1,%0,%6\n\
527 bne- 1b \n\ 528 bne- 1b \n\
528 andc %1,%0,%4 \n\ 529 andc %1,%0,%4 \n\
530 or %1,%1,%7\n\
529 stdcx. %1,0,%3 \n\ 531 stdcx. %1,0,%3 \n\
530 bne- 1b" 532 bne- 1b"
531 : "=&r" (old), "=&r" (tmp), "=m" (*pmdp) 533 : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
532 : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY) 534 : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY), "r" (set)
533 : "cc" ); 535 : "cc" );
534#else 536#else
535 old = pmd_val(*pmdp); 537 old = pmd_val(*pmdp);
536 *pmdp = __pmd(old & ~clr); 538 *pmdp = __pmd((old & ~clr) | set);
537#endif 539#endif
538 if (old & _PAGE_HASHPTE) 540 if (old & _PAGE_HASHPTE)
539 hpte_do_hugepage_flush(mm, addr, pmdp); 541 hpte_do_hugepage_flush(mm, addr, pmdp);
@@ -708,7 +710,7 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
708void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, 710void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
709 pmd_t *pmdp) 711 pmd_t *pmdp)
710{ 712{
711 pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT); 713 pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT, 0);
712} 714}
713 715
714/* 716/*
@@ -835,7 +837,7 @@ pmd_t pmdp_get_and_clear(struct mm_struct *mm,
835 unsigned long old; 837 unsigned long old;
836 pgtable_t *pgtable_slot; 838 pgtable_t *pgtable_slot;
837 839
838 old = pmd_hugepage_update(mm, addr, pmdp, ~0UL); 840 old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0);
839 old_pmd = __pmd(old); 841 old_pmd = __pmd(old);
840 /* 842 /*
841 * We have pmd == none and we are holding page_table_lock. 843 * We have pmd == none and we are holding page_table_lock.
diff --git a/arch/powerpc/mm/subpage-prot.c b/arch/powerpc/mm/subpage-prot.c
index a770df2dae70..6c0b1f5f8d2c 100644
--- a/arch/powerpc/mm/subpage-prot.c
+++ b/arch/powerpc/mm/subpage-prot.c
@@ -78,7 +78,7 @@ static void hpte_flush_range(struct mm_struct *mm, unsigned long addr,
78 pte = pte_offset_map_lock(mm, pmd, addr, &ptl); 78 pte = pte_offset_map_lock(mm, pmd, addr, &ptl);
79 arch_enter_lazy_mmu_mode(); 79 arch_enter_lazy_mmu_mode();
80 for (; npages > 0; --npages) { 80 for (; npages > 0; --npages) {
81 pte_update(mm, addr, pte, 0, 0); 81 pte_update(mm, addr, pte, 0, 0, 0);
82 addr += PAGE_SIZE; 82 addr += PAGE_SIZE;
83 ++pte; 83 ++pte;
84 } 84 }
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index e1e71618b70c..253fefe3d1a0 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -44,7 +44,8 @@ static int ioda_eeh_event(struct notifier_block *nb,
44 44
45 /* We simply send special EEH event */ 45 /* We simply send special EEH event */
46 if ((changed_evts & OPAL_EVENT_PCI_ERROR) && 46 if ((changed_evts & OPAL_EVENT_PCI_ERROR) &&
47 (events & OPAL_EVENT_PCI_ERROR)) 47 (events & OPAL_EVENT_PCI_ERROR) &&
48 eeh_enabled())
48 eeh_send_failure_event(NULL); 49 eeh_send_failure_event(NULL);
49 50
50 return 0; 51 return 0;
@@ -113,6 +114,7 @@ DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbB_dbgfs_ops, ioda_eeh_inbB_dbgfs_get,
113 ioda_eeh_inbB_dbgfs_set, "0x%llx\n"); 114 ioda_eeh_inbB_dbgfs_set, "0x%llx\n");
114#endif /* CONFIG_DEBUG_FS */ 115#endif /* CONFIG_DEBUG_FS */
115 116
117
116/** 118/**
117 * ioda_eeh_post_init - Chip dependent post initialization 119 * ioda_eeh_post_init - Chip dependent post initialization
118 * @hose: PCI controller 120 * @hose: PCI controller
@@ -220,6 +222,22 @@ static int ioda_eeh_set_option(struct eeh_pe *pe, int option)
220 return ret; 222 return ret;
221} 223}
222 224
225static void ioda_eeh_phb_diag(struct pci_controller *hose)
226{
227 struct pnv_phb *phb = hose->private_data;
228 long rc;
229
230 rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
231 PNV_PCI_DIAG_BUF_SIZE);
232 if (rc != OPAL_SUCCESS) {
233 pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
234 __func__, hose->global_number, rc);
235 return;
236 }
237
238 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
239}
240
223/** 241/**
224 * ioda_eeh_get_state - Retrieve the state of PE 242 * ioda_eeh_get_state - Retrieve the state of PE
225 * @pe: EEH PE 243 * @pe: EEH PE
@@ -271,6 +289,9 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
271 result |= EEH_STATE_DMA_ACTIVE; 289 result |= EEH_STATE_DMA_ACTIVE;
272 result |= EEH_STATE_MMIO_ENABLED; 290 result |= EEH_STATE_MMIO_ENABLED;
273 result |= EEH_STATE_DMA_ENABLED; 291 result |= EEH_STATE_DMA_ENABLED;
292 } else if (!(pe->state & EEH_PE_ISOLATED)) {
293 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
294 ioda_eeh_phb_diag(hose);
274 } 295 }
275 296
276 return result; 297 return result;
@@ -314,6 +335,15 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
314 __func__, fstate, hose->global_number, pe_no); 335 __func__, fstate, hose->global_number, pe_no);
315 } 336 }
316 337
338 /* Dump PHB diag-data for frozen PE */
339 if (result != EEH_STATE_NOT_SUPPORT &&
340 (result & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) !=
341 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE) &&
342 !(pe->state & EEH_PE_ISOLATED)) {
343 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
344 ioda_eeh_phb_diag(hose);
345 }
346
317 return result; 347 return result;
318} 348}
319 349
@@ -489,8 +519,7 @@ static int ioda_eeh_bridge_reset(struct pci_controller *hose,
489static int ioda_eeh_reset(struct eeh_pe *pe, int option) 519static int ioda_eeh_reset(struct eeh_pe *pe, int option)
490{ 520{
491 struct pci_controller *hose = pe->phb; 521 struct pci_controller *hose = pe->phb;
492 struct eeh_dev *edev; 522 struct pci_bus *bus;
493 struct pci_dev *dev;
494 int ret; 523 int ret;
495 524
496 /* 525 /*
@@ -519,73 +548,17 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
519 if (pe->type & EEH_PE_PHB) { 548 if (pe->type & EEH_PE_PHB) {
520 ret = ioda_eeh_phb_reset(hose, option); 549 ret = ioda_eeh_phb_reset(hose, option);
521 } else { 550 } else {
522 if (pe->type & EEH_PE_DEVICE) { 551 bus = eeh_pe_bus_get(pe);
523 /* 552 if (pci_is_root_bus(bus))
524 * If it's device PE, we didn't refer to the parent
525 * PCI bus yet. So we have to figure it out indirectly.
526 */
527 edev = list_first_entry(&pe->edevs,
528 struct eeh_dev, list);
529 dev = eeh_dev_to_pci_dev(edev);
530 dev = dev->bus->self;
531 } else {
532 /*
533 * If it's bus PE, the parent PCI bus is already there
534 * and just pick it up.
535 */
536 dev = pe->bus->self;
537 }
538
539 /*
540 * Do reset based on the fact that the direct upstream bridge
541 * is root bridge (port) or not.
542 */
543 if (dev->bus->number == 0)
544 ret = ioda_eeh_root_reset(hose, option); 553 ret = ioda_eeh_root_reset(hose, option);
545 else 554 else
546 ret = ioda_eeh_bridge_reset(hose, dev, option); 555 ret = ioda_eeh_bridge_reset(hose, bus->self, option);
547 } 556 }
548 557
549 return ret; 558 return ret;
550} 559}
551 560
552/** 561/**
553 * ioda_eeh_get_log - Retrieve error log
554 * @pe: EEH PE
555 * @severity: Severity level of the log
556 * @drv_log: buffer to store the log
557 * @len: space of the log buffer
558 *
559 * The function is used to retrieve error log from P7IOC.
560 */
561static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
562 char *drv_log, unsigned long len)
563{
564 s64 ret;
565 unsigned long flags;
566 struct pci_controller *hose = pe->phb;
567 struct pnv_phb *phb = hose->private_data;
568
569 spin_lock_irqsave(&phb->lock, flags);
570
571 ret = opal_pci_get_phb_diag_data2(phb->opal_id,
572 phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
573 if (ret) {
574 spin_unlock_irqrestore(&phb->lock, flags);
575 pr_warning("%s: Can't get log for PHB#%x-PE#%x (%lld)\n",
576 __func__, hose->global_number, pe->addr, ret);
577 return -EIO;
578 }
579
580 /* The PHB diag-data is always indicative */
581 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
582
583 spin_unlock_irqrestore(&phb->lock, flags);
584
585 return 0;
586}
587
588/**
589 * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE 562 * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE
590 * @pe: EEH PE 563 * @pe: EEH PE
591 * 564 *
@@ -666,22 +639,6 @@ static void ioda_eeh_hub_diag(struct pci_controller *hose)
666 } 639 }
667} 640}
668 641
669static void ioda_eeh_phb_diag(struct pci_controller *hose)
670{
671 struct pnv_phb *phb = hose->private_data;
672 long rc;
673
674 rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
675 PNV_PCI_DIAG_BUF_SIZE);
676 if (rc != OPAL_SUCCESS) {
677 pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
678 __func__, hose->global_number, rc);
679 return;
680 }
681
682 pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
683}
684
685static int ioda_eeh_get_phb_pe(struct pci_controller *hose, 642static int ioda_eeh_get_phb_pe(struct pci_controller *hose,
686 struct eeh_pe **pe) 643 struct eeh_pe **pe)
687{ 644{
@@ -855,6 +812,20 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
855 } 812 }
856 813
857 /* 814 /*
815 * EEH core will try recover from fenced PHB or
816 * frozen PE. In the time for frozen PE, EEH core
817 * enable IO path for that before collecting logs,
818 * but it ruins the site. So we have to dump the
819 * log in advance here.
820 */
821 if ((ret == EEH_NEXT_ERR_FROZEN_PE ||
822 ret == EEH_NEXT_ERR_FENCED_PHB) &&
823 !((*pe)->state & EEH_PE_ISOLATED)) {
824 eeh_pe_state_mark(*pe, EEH_PE_ISOLATED);
825 ioda_eeh_phb_diag(hose);
826 }
827
828 /*
858 * If we have no errors on the specific PHB or only 829 * If we have no errors on the specific PHB or only
859 * informative error there, we continue poking it. 830 * informative error there, we continue poking it.
860 * Otherwise, we need actions to be taken by upper 831 * Otherwise, we need actions to be taken by upper
@@ -872,7 +843,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
872 .set_option = ioda_eeh_set_option, 843 .set_option = ioda_eeh_set_option,
873 .get_state = ioda_eeh_get_state, 844 .get_state = ioda_eeh_get_state,
874 .reset = ioda_eeh_reset, 845 .reset = ioda_eeh_reset,
875 .get_log = ioda_eeh_get_log,
876 .configure_bridge = ioda_eeh_configure_bridge, 846 .configure_bridge = ioda_eeh_configure_bridge,
877 .next_error = ioda_eeh_next_error 847 .next_error = ioda_eeh_next_error
878}; 848};
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index a79fddc5e74e..a59788e83b8b 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -145,7 +145,7 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
145 * Enable EEH explicitly so that we will do EEH check 145 * Enable EEH explicitly so that we will do EEH check
146 * while accessing I/O stuff 146 * while accessing I/O stuff
147 */ 147 */
148 eeh_subsystem_enabled = 1; 148 eeh_set_enable(true);
149 149
150 /* Save memory bars */ 150 /* Save memory bars */
151 eeh_save_bars(edev); 151 eeh_save_bars(edev);
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
index 4fbf276ac99e..4cd2ea6c0dbe 100644
--- a/arch/powerpc/platforms/powernv/opal-xscom.c
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -71,11 +71,11 @@ static int opal_xscom_err_xlate(int64_t rc)
71 } 71 }
72} 72}
73 73
74static u64 opal_scom_unmangle(u64 reg) 74static u64 opal_scom_unmangle(u64 addr)
75{ 75{
76 /* 76 /*
77 * XSCOM indirect addresses have the top bit set. Additionally 77 * XSCOM indirect addresses have the top bit set. Additionally
78 * the reset of the top 3 nibbles is always 0. 78 * the rest of the top 3 nibbles is always 0.
79 * 79 *
80 * Because the debugfs interface uses signed offsets and shifts 80 * Because the debugfs interface uses signed offsets and shifts
81 * the address left by 3, we basically cannot use the top 4 bits 81 * the address left by 3, we basically cannot use the top 4 bits
@@ -86,10 +86,13 @@ static u64 opal_scom_unmangle(u64 reg)
86 * conversion here. To leave room for further xscom address 86 * conversion here. To leave room for further xscom address
87 * expansion, we only clear out the top byte 87 * expansion, we only clear out the top byte
88 * 88 *
89 * For in-kernel use, we also support the real indirect bit, so
90 * we test for any of the top 5 bits
91 *
89 */ 92 */
90 if (reg & (1ull << 59)) 93 if (addr & (0x1full << 59))
91 reg = (reg & ~(0xffull << 56)) | (1ull << 63); 94 addr = (addr & ~(0xffull << 56)) | (1ull << 63);
92 return reg; 95 return addr;
93} 96}
94 97
95static int opal_scom_read(scom_map_t map, u64 reg, u64 *value) 98static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
@@ -98,8 +101,8 @@ static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
98 int64_t rc; 101 int64_t rc;
99 __be64 v; 102 __be64 v;
100 103
101 reg = opal_scom_unmangle(reg); 104 reg = opal_scom_unmangle(m->addr + reg);
102 rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v)); 105 rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
103 *value = be64_to_cpu(v); 106 *value = be64_to_cpu(v);
104 return opal_xscom_err_xlate(rc); 107 return opal_xscom_err_xlate(rc);
105} 108}
@@ -109,8 +112,8 @@ static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
109 struct opal_scom_map *m = map; 112 struct opal_scom_map *m = map;
110 int64_t rc; 113 int64_t rc;
111 114
112 reg = opal_scom_unmangle(reg); 115 reg = opal_scom_unmangle(m->addr + reg);
113 rc = opal_xscom_write(m->chip, m->addr + reg, value); 116 rc = opal_xscom_write(m->chip, reg, value);
114 return opal_xscom_err_xlate(rc); 117 return opal_xscom_err_xlate(rc);
115} 118}
116 119
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 95633d79ef5d..8518817dcdfd 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -134,57 +134,72 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
134 pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n", 134 pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n",
135 hose->global_number, common->version); 135 hose->global_number, common->version);
136 136
137 pr_info(" brdgCtl: %08x\n", data->brdgCtl); 137 if (data->brdgCtl)
138 138 pr_info(" brdgCtl: %08x\n",
139 pr_info(" portStatusReg: %08x\n", data->portStatusReg); 139 data->brdgCtl);
140 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus); 140 if (data->portStatusReg || data->rootCmplxStatus ||
141 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus); 141 data->busAgentStatus)
142 142 pr_info(" UtlSts: %08x %08x %08x\n",
143 pr_info(" deviceStatus: %08x\n", data->deviceStatus); 143 data->portStatusReg, data->rootCmplxStatus,
144 pr_info(" slotStatus: %08x\n", data->slotStatus); 144 data->busAgentStatus);
145 pr_info(" linkStatus: %08x\n", data->linkStatus); 145 if (data->deviceStatus || data->slotStatus ||
146 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus); 146 data->linkStatus || data->devCmdStatus ||
147 pr_info(" devSecStatus: %08x\n", data->devSecStatus); 147 data->devSecStatus)
148 148 pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
149 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus); 149 data->deviceStatus, data->slotStatus,
150 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus); 150 data->linkStatus, data->devCmdStatus,
151 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus); 151 data->devSecStatus);
152 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1); 152 if (data->rootErrorStatus || data->uncorrErrorStatus ||
153 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2); 153 data->corrErrorStatus)
154 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3); 154 pr_info(" RootErrSts: %08x %08x %08x\n",
155 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4); 155 data->rootErrorStatus, data->uncorrErrorStatus,
156 pr_info(" sourceId: %08x\n", data->sourceId); 156 data->corrErrorStatus);
157 pr_info(" errorClass: %016llx\n", data->errorClass); 157 if (data->tlpHdr1 || data->tlpHdr2 ||
158 pr_info(" correlator: %016llx\n", data->correlator); 158 data->tlpHdr3 || data->tlpHdr4)
159 pr_info(" p7iocPlssr: %016llx\n", data->p7iocPlssr); 159 pr_info(" RootErrLog: %08x %08x %08x %08x\n",
160 pr_info(" p7iocCsr: %016llx\n", data->p7iocCsr); 160 data->tlpHdr1, data->tlpHdr2,
161 pr_info(" lemFir: %016llx\n", data->lemFir); 161 data->tlpHdr3, data->tlpHdr4);
162 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask); 162 if (data->sourceId || data->errorClass ||
163 pr_info(" lemWOF: %016llx\n", data->lemWOF); 163 data->correlator)
164 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus); 164 pr_info(" RootErrLog1: %08x %016llx %016llx\n",
165 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus); 165 data->sourceId, data->errorClass,
166 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0); 166 data->correlator);
167 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1); 167 if (data->p7iocPlssr || data->p7iocCsr)
168 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus); 168 pr_info(" PhbSts: %016llx %016llx\n",
169 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus); 169 data->p7iocPlssr, data->p7iocCsr);
170 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0); 170 if (data->lemFir || data->lemErrorMask ||
171 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1); 171 data->lemWOF)
172 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus); 172 pr_info(" Lem: %016llx %016llx %016llx\n",
173 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus); 173 data->lemFir, data->lemErrorMask,
174 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0); 174 data->lemWOF);
175 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1); 175 if (data->phbErrorStatus || data->phbFirstErrorStatus ||
176 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus); 176 data->phbErrorLog0 || data->phbErrorLog1)
177 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus); 177 pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
178 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0); 178 data->phbErrorStatus, data->phbFirstErrorStatus,
179 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1); 179 data->phbErrorLog0, data->phbErrorLog1);
180 if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
181 data->mmioErrorLog0 || data->mmioErrorLog1)
182 pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
183 data->mmioErrorStatus, data->mmioFirstErrorStatus,
184 data->mmioErrorLog0, data->mmioErrorLog1);
185 if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
186 data->dma0ErrorLog0 || data->dma0ErrorLog1)
187 pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
188 data->dma0ErrorStatus, data->dma0FirstErrorStatus,
189 data->dma0ErrorLog0, data->dma0ErrorLog1);
190 if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
191 data->dma1ErrorLog0 || data->dma1ErrorLog1)
192 pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
193 data->dma1ErrorStatus, data->dma1FirstErrorStatus,
194 data->dma1ErrorLog0, data->dma1ErrorLog1);
180 195
181 for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) { 196 for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
182 if ((data->pestA[i] >> 63) == 0 && 197 if ((data->pestA[i] >> 63) == 0 &&
183 (data->pestB[i] >> 63) == 0) 198 (data->pestB[i] >> 63) == 0)
184 continue; 199 continue;
185 200
186 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]); 201 pr_info(" PE[%3d] A/B: %016llx %016llx\n",
187 pr_info(" PESTB: %016llx\n", data->pestB[i]); 202 i, data->pestA[i], data->pestB[i]);
188 } 203 }
189} 204}
190 205
@@ -197,62 +212,77 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
197 data = (struct OpalIoPhb3ErrorData*)common; 212 data = (struct OpalIoPhb3ErrorData*)common;
198 pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n", 213 pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n",
199 hose->global_number, common->version); 214 hose->global_number, common->version);
200 215 if (data->brdgCtl)
201 pr_info(" brdgCtl: %08x\n", data->brdgCtl); 216 pr_info(" brdgCtl: %08x\n",
202 217 data->brdgCtl);
203 pr_info(" portStatusReg: %08x\n", data->portStatusReg); 218 if (data->portStatusReg || data->rootCmplxStatus ||
204 pr_info(" rootCmplxStatus: %08x\n", data->rootCmplxStatus); 219 data->busAgentStatus)
205 pr_info(" busAgentStatus: %08x\n", data->busAgentStatus); 220 pr_info(" UtlSts: %08x %08x %08x\n",
206 221 data->portStatusReg, data->rootCmplxStatus,
207 pr_info(" deviceStatus: %08x\n", data->deviceStatus); 222 data->busAgentStatus);
208 pr_info(" slotStatus: %08x\n", data->slotStatus); 223 if (data->deviceStatus || data->slotStatus ||
209 pr_info(" linkStatus: %08x\n", data->linkStatus); 224 data->linkStatus || data->devCmdStatus ||
210 pr_info(" devCmdStatus: %08x\n", data->devCmdStatus); 225 data->devSecStatus)
211 pr_info(" devSecStatus: %08x\n", data->devSecStatus); 226 pr_info(" RootSts: %08x %08x %08x %08x %08x\n",
212 227 data->deviceStatus, data->slotStatus,
213 pr_info(" rootErrorStatus: %08x\n", data->rootErrorStatus); 228 data->linkStatus, data->devCmdStatus,
214 pr_info(" uncorrErrorStatus: %08x\n", data->uncorrErrorStatus); 229 data->devSecStatus);
215 pr_info(" corrErrorStatus: %08x\n", data->corrErrorStatus); 230 if (data->rootErrorStatus || data->uncorrErrorStatus ||
216 pr_info(" tlpHdr1: %08x\n", data->tlpHdr1); 231 data->corrErrorStatus)
217 pr_info(" tlpHdr2: %08x\n", data->tlpHdr2); 232 pr_info(" RootErrSts: %08x %08x %08x\n",
218 pr_info(" tlpHdr3: %08x\n", data->tlpHdr3); 233 data->rootErrorStatus, data->uncorrErrorStatus,
219 pr_info(" tlpHdr4: %08x\n", data->tlpHdr4); 234 data->corrErrorStatus);
220 pr_info(" sourceId: %08x\n", data->sourceId); 235 if (data->tlpHdr1 || data->tlpHdr2 ||
221 pr_info(" errorClass: %016llx\n", data->errorClass); 236 data->tlpHdr3 || data->tlpHdr4)
222 pr_info(" correlator: %016llx\n", data->correlator); 237 pr_info(" RootErrLog: %08x %08x %08x %08x\n",
223 238 data->tlpHdr1, data->tlpHdr2,
224 pr_info(" nFir: %016llx\n", data->nFir); 239 data->tlpHdr3, data->tlpHdr4);
225 pr_info(" nFirMask: %016llx\n", data->nFirMask); 240 if (data->sourceId || data->errorClass ||
226 pr_info(" nFirWOF: %016llx\n", data->nFirWOF); 241 data->correlator)
227 pr_info(" PhbPlssr: %016llx\n", data->phbPlssr); 242 pr_info(" RootErrLog1: %08x %016llx %016llx\n",
228 pr_info(" PhbCsr: %016llx\n", data->phbCsr); 243 data->sourceId, data->errorClass,
229 pr_info(" lemFir: %016llx\n", data->lemFir); 244 data->correlator);
230 pr_info(" lemErrorMask: %016llx\n", data->lemErrorMask); 245 if (data->nFir || data->nFirMask ||
231 pr_info(" lemWOF: %016llx\n", data->lemWOF); 246 data->nFirWOF)
232 pr_info(" phbErrorStatus: %016llx\n", data->phbErrorStatus); 247 pr_info(" nFir: %016llx %016llx %016llx\n",
233 pr_info(" phbFirstErrorStatus: %016llx\n", data->phbFirstErrorStatus); 248 data->nFir, data->nFirMask,
234 pr_info(" phbErrorLog0: %016llx\n", data->phbErrorLog0); 249 data->nFirWOF);
235 pr_info(" phbErrorLog1: %016llx\n", data->phbErrorLog1); 250 if (data->phbPlssr || data->phbCsr)
236 pr_info(" mmioErrorStatus: %016llx\n", data->mmioErrorStatus); 251 pr_info(" PhbSts: %016llx %016llx\n",
237 pr_info(" mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus); 252 data->phbPlssr, data->phbCsr);
238 pr_info(" mmioErrorLog0: %016llx\n", data->mmioErrorLog0); 253 if (data->lemFir || data->lemErrorMask ||
239 pr_info(" mmioErrorLog1: %016llx\n", data->mmioErrorLog1); 254 data->lemWOF)
240 pr_info(" dma0ErrorStatus: %016llx\n", data->dma0ErrorStatus); 255 pr_info(" Lem: %016llx %016llx %016llx\n",
241 pr_info(" dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus); 256 data->lemFir, data->lemErrorMask,
242 pr_info(" dma0ErrorLog0: %016llx\n", data->dma0ErrorLog0); 257 data->lemWOF);
243 pr_info(" dma0ErrorLog1: %016llx\n", data->dma0ErrorLog1); 258 if (data->phbErrorStatus || data->phbFirstErrorStatus ||
244 pr_info(" dma1ErrorStatus: %016llx\n", data->dma1ErrorStatus); 259 data->phbErrorLog0 || data->phbErrorLog1)
245 pr_info(" dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus); 260 pr_info(" PhbErr: %016llx %016llx %016llx %016llx\n",
246 pr_info(" dma1ErrorLog0: %016llx\n", data->dma1ErrorLog0); 261 data->phbErrorStatus, data->phbFirstErrorStatus,
247 pr_info(" dma1ErrorLog1: %016llx\n", data->dma1ErrorLog1); 262 data->phbErrorLog0, data->phbErrorLog1);
263 if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
264 data->mmioErrorLog0 || data->mmioErrorLog1)
265 pr_info(" OutErr: %016llx %016llx %016llx %016llx\n",
266 data->mmioErrorStatus, data->mmioFirstErrorStatus,
267 data->mmioErrorLog0, data->mmioErrorLog1);
268 if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
269 data->dma0ErrorLog0 || data->dma0ErrorLog1)
270 pr_info(" InAErr: %016llx %016llx %016llx %016llx\n",
271 data->dma0ErrorStatus, data->dma0FirstErrorStatus,
272 data->dma0ErrorLog0, data->dma0ErrorLog1);
273 if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
274 data->dma1ErrorLog0 || data->dma1ErrorLog1)
275 pr_info(" InBErr: %016llx %016llx %016llx %016llx\n",
276 data->dma1ErrorStatus, data->dma1FirstErrorStatus,
277 data->dma1ErrorLog0, data->dma1ErrorLog1);
248 278
249 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) { 279 for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
250 if ((data->pestA[i] >> 63) == 0 && 280 if ((data->pestA[i] >> 63) == 0 &&
251 (data->pestB[i] >> 63) == 0) 281 (data->pestB[i] >> 63) == 0)
252 continue; 282 continue;
253 283
254 pr_info(" PE[%3d] PESTA: %016llx\n", i, data->pestA[i]); 284 pr_info(" PE[%3d] A/B: %016llx %016llx\n",
255 pr_info(" PESTB: %016llx\n", data->pestB[i]); 285 i, data->pestA[i], data->pestB[i]);
256 } 286 }
257} 287}
258 288
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 9ef3cc8ebc11..8a8f0472d98f 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -265,7 +265,7 @@ static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
265 enable = 1; 265 enable = 1;
266 266
267 if (enable) { 267 if (enable) {
268 eeh_subsystem_enabled = 1; 268 eeh_set_enable(true);
269 eeh_add_to_parent_pe(edev); 269 eeh_add_to_parent_pe(edev);
270 270
271 pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n", 271 pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 82789e79e539..0ea99e3d4815 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -35,12 +35,7 @@
35#include "offline_states.h" 35#include "offline_states.h"
36 36
37/* This version can't take the spinlock, because it never returns */ 37/* This version can't take the spinlock, because it never returns */
38static struct rtas_args rtas_stop_self_args = { 38static int rtas_stop_self_token = RTAS_UNKNOWN_SERVICE;
39 .token = RTAS_UNKNOWN_SERVICE,
40 .nargs = 0,
41 .nret = 1,
42 .rets = &rtas_stop_self_args.args[0],
43};
44 39
45static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) = 40static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) =
46 CPU_STATE_OFFLINE; 41 CPU_STATE_OFFLINE;
@@ -93,15 +88,20 @@ void set_default_offline_state(int cpu)
93 88
94static void rtas_stop_self(void) 89static void rtas_stop_self(void)
95{ 90{
96 struct rtas_args *args = &rtas_stop_self_args; 91 struct rtas_args args = {
92 .token = cpu_to_be32(rtas_stop_self_token),
93 .nargs = 0,
94 .nret = 1,
95 .rets = &args.args[0],
96 };
97 97
98 local_irq_disable(); 98 local_irq_disable();
99 99
100 BUG_ON(args->token == RTAS_UNKNOWN_SERVICE); 100 BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
101 101
102 printk("cpu %u (hwid %u) Ready to die...\n", 102 printk("cpu %u (hwid %u) Ready to die...\n",
103 smp_processor_id(), hard_smp_processor_id()); 103 smp_processor_id(), hard_smp_processor_id());
104 enter_rtas(__pa(args)); 104 enter_rtas(__pa(&args));
105 105
106 panic("Alas, I survived.\n"); 106 panic("Alas, I survived.\n");
107} 107}
@@ -392,10 +392,10 @@ static int __init pseries_cpu_hotplug_init(void)
392 } 392 }
393 } 393 }
394 394
395 rtas_stop_self_args.token = rtas_token("stop-self"); 395 rtas_stop_self_token = rtas_token("stop-self");
396 qcss_tok = rtas_token("query-cpu-stopped-state"); 396 qcss_tok = rtas_token("query-cpu-stopped-state");
397 397
398 if (rtas_stop_self_args.token == RTAS_UNKNOWN_SERVICE || 398 if (rtas_stop_self_token == RTAS_UNKNOWN_SERVICE ||
399 qcss_tok == RTAS_UNKNOWN_SERVICE) { 399 qcss_tok == RTAS_UNKNOWN_SERVICE) {
400 printk(KERN_INFO "CPU Hotplug not supported by firmware " 400 printk(KERN_INFO "CPU Hotplug not supported by firmware "
401 "- disabling.\n"); 401 "- disabling.\n");
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 70670a2d9cf2..c413ec158ff5 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -113,7 +113,8 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
113{ 113{
114 struct device_node *dn, *pdn; 114 struct device_node *dn, *pdn;
115 struct pci_bus *bus; 115 struct pci_bus *bus;
116 const __be32 *pcie_link_speed_stats; 116 u32 pcie_link_speed_stats[2];
117 int rc;
117 118
118 bus = bridge->bus; 119 bus = bridge->bus;
119 120
@@ -122,38 +123,45 @@ int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
122 return 0; 123 return 0;
123 124
124 for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { 125 for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) {
125 pcie_link_speed_stats = of_get_property(pdn, 126 rc = of_property_read_u32_array(pdn,
126 "ibm,pcie-link-speed-stats", NULL); 127 "ibm,pcie-link-speed-stats",
127 if (pcie_link_speed_stats) 128 &pcie_link_speed_stats[0], 2);
129 if (!rc)
128 break; 130 break;
129 } 131 }
130 132
131 of_node_put(pdn); 133 of_node_put(pdn);
132 134
133 if (!pcie_link_speed_stats) { 135 if (rc) {
134 pr_err("no ibm,pcie-link-speed-stats property\n"); 136 pr_err("no ibm,pcie-link-speed-stats property\n");
135 return 0; 137 return 0;
136 } 138 }
137 139
138 switch (be32_to_cpup(pcie_link_speed_stats)) { 140 switch (pcie_link_speed_stats[0]) {
139 case 0x01: 141 case 0x01:
140 bus->max_bus_speed = PCIE_SPEED_2_5GT; 142 bus->max_bus_speed = PCIE_SPEED_2_5GT;
141 break; 143 break;
142 case 0x02: 144 case 0x02:
143 bus->max_bus_speed = PCIE_SPEED_5_0GT; 145 bus->max_bus_speed = PCIE_SPEED_5_0GT;
144 break; 146 break;
147 case 0x04:
148 bus->max_bus_speed = PCIE_SPEED_8_0GT;
149 break;
145 default: 150 default:
146 bus->max_bus_speed = PCI_SPEED_UNKNOWN; 151 bus->max_bus_speed = PCI_SPEED_UNKNOWN;
147 break; 152 break;
148 } 153 }
149 154
150 switch (be32_to_cpup(pcie_link_speed_stats)) { 155 switch (pcie_link_speed_stats[1]) {
151 case 0x01: 156 case 0x01:
152 bus->cur_bus_speed = PCIE_SPEED_2_5GT; 157 bus->cur_bus_speed = PCIE_SPEED_2_5GT;
153 break; 158 break;
154 case 0x02: 159 case 0x02:
155 bus->cur_bus_speed = PCIE_SPEED_5_0GT; 160 bus->cur_bus_speed = PCIE_SPEED_5_0GT;
156 break; 161 break;
162 case 0x04:
163 bus->cur_bus_speed = PCIE_SPEED_8_0GT;
164 break;
157 default: 165 default:
158 bus->cur_bus_speed = PCI_SPEED_UNKNOWN; 166 bus->cur_bus_speed = PCI_SPEED_UNKNOWN;
159 break; 167 break;
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 59c8efce1b99..0248949a756d 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1421,5 +1421,5 @@ ENTRY(sys_sched_setattr_wrapper)
1421ENTRY(sys_sched_getattr_wrapper) 1421ENTRY(sys_sched_getattr_wrapper)
1422 lgfr %r2,%r2 # pid_t 1422 lgfr %r2,%r2 # pid_t
1423 llgtr %r3,%r3 # const char __user * 1423 llgtr %r3,%r3 # const char __user *
1424 llgfr %r3,%r3 # unsigned int 1424 llgfr %r4,%r4 # unsigned int
1425 jg sys_sched_getattr 1425 jg sys_sched_getattr
diff --git a/arch/s390/pci/pci_dma.c b/arch/s390/pci/pci_dma.c
index 60c11a629d96..f91c03119804 100644
--- a/arch/s390/pci/pci_dma.c
+++ b/arch/s390/pci/pci_dma.c
@@ -206,11 +206,13 @@ static void dma_cleanup_tables(struct zpci_dev *zdev)
206 zdev->dma_table = NULL; 206 zdev->dma_table = NULL;
207} 207}
208 208
209static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev, unsigned long start, 209static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev,
210 int size) 210 unsigned long start, int size)
211{ 211{
212 unsigned long boundary_size = 0x1000000; 212 unsigned long boundary_size;
213 213
214 boundary_size = ALIGN(dma_get_seg_boundary(&zdev->pdev->dev) + 1,
215 PAGE_SIZE) >> PAGE_SHIFT;
214 return iommu_area_alloc(zdev->iommu_bitmap, zdev->iommu_pages, 216 return iommu_area_alloc(zdev->iommu_bitmap, zdev->iommu_pages,
215 start, size, 0, boundary_size, 0); 217 start, size, 0, boundary_size, 0);
216} 218}
diff --git a/arch/sh/include/cpu-sh2/cpu/cache.h b/arch/sh/include/cpu-sh2/cpu/cache.h
index 673515bc4135..aa1b2b9088a7 100644
--- a/arch/sh/include/cpu-sh2/cpu/cache.h
+++ b/arch/sh/include/cpu-sh2/cpu/cache.h
@@ -18,7 +18,7 @@
18#define SH_CACHE_ASSOC 8 18#define SH_CACHE_ASSOC 8
19 19
20#if defined(CONFIG_CPU_SUBTYPE_SH7619) 20#if defined(CONFIG_CPU_SUBTYPE_SH7619)
21#define CCR 0xffffffec 21#define SH_CCR 0xffffffec
22 22
23#define CCR_CACHE_CE 0x01 /* Cache enable */ 23#define CCR_CACHE_CE 0x01 /* Cache enable */
24#define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */ 24#define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */
diff --git a/arch/sh/include/cpu-sh2a/cpu/cache.h b/arch/sh/include/cpu-sh2a/cpu/cache.h
index defb0baa5a06..b27ce92cb600 100644
--- a/arch/sh/include/cpu-sh2a/cpu/cache.h
+++ b/arch/sh/include/cpu-sh2a/cpu/cache.h
@@ -17,8 +17,8 @@
17#define SH_CACHE_COMBINED 4 17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8 18#define SH_CACHE_ASSOC 8
19 19
20#define CCR 0xfffc1000 /* CCR1 */ 20#define SH_CCR 0xfffc1000 /* CCR1 */
21#define CCR2 0xfffc1004 21#define SH_CCR2 0xfffc1004
22 22
23/* 23/*
24 * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not 24 * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
diff --git a/arch/sh/include/cpu-sh3/cpu/cache.h b/arch/sh/include/cpu-sh3/cpu/cache.h
index bee2d81c56bf..29700fd88c75 100644
--- a/arch/sh/include/cpu-sh3/cpu/cache.h
+++ b/arch/sh/include/cpu-sh3/cpu/cache.h
@@ -17,7 +17,7 @@
17#define SH_CACHE_COMBINED 4 17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8 18#define SH_CACHE_ASSOC 8
19 19
20#define CCR 0xffffffec /* Address of Cache Control Register */ 20#define SH_CCR 0xffffffec /* Address of Cache Control Register */
21 21
22#define CCR_CACHE_CE 0x01 /* Cache Enable */ 22#define CCR_CACHE_CE 0x01 /* Cache Enable */
23#define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ 23#define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */
diff --git a/arch/sh/include/cpu-sh4/cpu/cache.h b/arch/sh/include/cpu-sh4/cpu/cache.h
index 7bfb9e8b069c..92c4cd119b66 100644
--- a/arch/sh/include/cpu-sh4/cpu/cache.h
+++ b/arch/sh/include/cpu-sh4/cpu/cache.h
@@ -17,7 +17,7 @@
17#define SH_CACHE_COMBINED 4 17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8 18#define SH_CACHE_ASSOC 8
19 19
20#define CCR 0xff00001c /* Address of Cache Control Register */ 20#define SH_CCR 0xff00001c /* Address of Cache Control Register */
21#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */ 21#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
22#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/ 22#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
23#define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */ 23#define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index ecf83cd158dc..0d7360d549c1 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -112,7 +112,7 @@ static void cache_init(void)
112 unsigned long ccr, flags; 112 unsigned long ccr, flags;
113 113
114 jump_to_uncached(); 114 jump_to_uncached();
115 ccr = __raw_readl(CCR); 115 ccr = __raw_readl(SH_CCR);
116 116
117 /* 117 /*
118 * At this point we don't know whether the cache is enabled or not - a 118 * At this point we don't know whether the cache is enabled or not - a
@@ -189,7 +189,7 @@ static void cache_init(void)
189 189
190 l2_cache_init(); 190 l2_cache_init();
191 191
192 __raw_writel(flags, CCR); 192 __raw_writel(flags, SH_CCR);
193 back_to_cached(); 193 back_to_cached();
194} 194}
195#else 195#else
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index 115725198038..777e50f33c00 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -36,7 +36,7 @@ static int cache_seq_show(struct seq_file *file, void *iter)
36 */ 36 */
37 jump_to_uncached(); 37 jump_to_uncached();
38 38
39 ccr = __raw_readl(CCR); 39 ccr = __raw_readl(SH_CCR);
40 if ((ccr & CCR_CACHE_ENABLE) == 0) { 40 if ((ccr & CCR_CACHE_ENABLE) == 0) {
41 back_to_cached(); 41 back_to_cached();
42 42
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c
index defcf719f2e8..a74259f2f981 100644
--- a/arch/sh/mm/cache-sh2.c
+++ b/arch/sh/mm/cache-sh2.c
@@ -63,9 +63,9 @@ static void sh2__flush_invalidate_region(void *start, int size)
63 local_irq_save(flags); 63 local_irq_save(flags);
64 jump_to_uncached(); 64 jump_to_uncached();
65 65
66 ccr = __raw_readl(CCR); 66 ccr = __raw_readl(SH_CCR);
67 ccr |= CCR_CACHE_INVALIDATE; 67 ccr |= CCR_CACHE_INVALIDATE;
68 __raw_writel(ccr, CCR); 68 __raw_writel(ccr, SH_CCR);
69 69
70 back_to_cached(); 70 back_to_cached();
71 local_irq_restore(flags); 71 local_irq_restore(flags);
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 949e2d3138a0..ee87d081259b 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -134,7 +134,8 @@ static void sh2a__flush_invalidate_region(void *start, int size)
134 134
135 /* If there are too many pages then just blow the cache */ 135 /* If there are too many pages then just blow the cache */
136 if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) { 136 if (((end - begin) >> PAGE_SHIFT) >= MAX_OCACHE_PAGES) {
137 __raw_writel(__raw_readl(CCR) | CCR_OCACHE_INVALIDATE, CCR); 137 __raw_writel(__raw_readl(SH_CCR) | CCR_OCACHE_INVALIDATE,
138 SH_CCR);
138 } else { 139 } else {
139 for (v = begin; v < end; v += L1_CACHE_BYTES) 140 for (v = begin; v < end; v += L1_CACHE_BYTES)
140 sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v); 141 sh2a_invalidate_line(CACHE_OC_ADDRESS_ARRAY, v);
@@ -167,7 +168,8 @@ static void sh2a_flush_icache_range(void *args)
167 /* I-Cache invalidate */ 168 /* I-Cache invalidate */
168 /* If there are too many pages then just blow the cache */ 169 /* If there are too many pages then just blow the cache */
169 if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) { 170 if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
170 __raw_writel(__raw_readl(CCR) | CCR_ICACHE_INVALIDATE, CCR); 171 __raw_writel(__raw_readl(SH_CCR) | CCR_ICACHE_INVALIDATE,
172 SH_CCR);
171 } else { 173 } else {
172 for (v = start; v < end; v += L1_CACHE_BYTES) 174 for (v = start; v < end; v += L1_CACHE_BYTES)
173 sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v); 175 sh2a_invalidate_line(CACHE_IC_ADDRESS_ARRAY, v);
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 0e529285b28d..51d8f7f31d1d 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -133,9 +133,9 @@ static void flush_icache_all(void)
133 jump_to_uncached(); 133 jump_to_uncached();
134 134
135 /* Flush I-cache */ 135 /* Flush I-cache */
136 ccr = __raw_readl(CCR); 136 ccr = __raw_readl(SH_CCR);
137 ccr |= CCR_CACHE_ICI; 137 ccr |= CCR_CACHE_ICI;
138 __raw_writel(ccr, CCR); 138 __raw_writel(ccr, SH_CCR);
139 139
140 /* 140 /*
141 * back_to_cached() will take care of the barrier for us, don't add 141 * back_to_cached() will take care of the barrier for us, don't add
diff --git a/arch/sh/mm/cache-shx3.c b/arch/sh/mm/cache-shx3.c
index c0adbee97b5f..24c58b7dc022 100644
--- a/arch/sh/mm/cache-shx3.c
+++ b/arch/sh/mm/cache-shx3.c
@@ -19,7 +19,7 @@ void __init shx3_cache_init(void)
19{ 19{
20 unsigned int ccr; 20 unsigned int ccr;
21 21
22 ccr = __raw_readl(CCR); 22 ccr = __raw_readl(SH_CCR);
23 23
24 /* 24 /*
25 * If we've got cache aliases, resolve them in hardware. 25 * If we've got cache aliases, resolve them in hardware.
@@ -40,5 +40,5 @@ void __init shx3_cache_init(void)
40 ccr |= CCR_CACHE_IBE; 40 ccr |= CCR_CACHE_IBE;
41#endif 41#endif
42 42
43 writel_uncached(ccr, CCR); 43 writel_uncached(ccr, SH_CCR);
44} 44}
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index 616966a96cba..097c2cdd117f 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -285,8 +285,8 @@ void __init cpu_cache_init(void)
285{ 285{
286 unsigned int cache_disabled = 0; 286 unsigned int cache_disabled = 0;
287 287
288#ifdef CCR 288#ifdef SH_CCR
289 cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); 289 cache_disabled = !(__raw_readl(SH_CCR) & CCR_CACHE_ENABLE);
290#endif 290#endif
291 291
292 compute_alias(&boot_cpu_data.icache); 292 compute_alias(&boot_cpu_data.icache);
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index c51efdcd07a2..7d8b7e94b93b 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -27,7 +27,7 @@ config SPARC
27 select RTC_DRV_M48T59 27 select RTC_DRV_M48T59
28 select HAVE_DMA_ATTRS 28 select HAVE_DMA_ATTRS
29 select HAVE_DMA_API_DEBUG 29 select HAVE_DMA_API_DEBUG
30 select HAVE_ARCH_JUMP_LABEL 30 select HAVE_ARCH_JUMP_LABEL if SPARC64
31 select GENERIC_IRQ_SHOW 31 select GENERIC_IRQ_SHOW
32 select ARCH_WANT_IPC_PARSE_VERSION 32 select ARCH_WANT_IPC_PARSE_VERSION
33 select GENERIC_PCI_IOMAP 33 select GENERIC_PCI_IOMAP
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index 869023abe5a4..cfbe53c17b0d 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -14,6 +14,7 @@
14#include <linux/pagemap.h> 14#include <linux/pagemap.h>
15#include <linux/vmalloc.h> 15#include <linux/vmalloc.h>
16#include <linux/kdebug.h> 16#include <linux/kdebug.h>
17#include <linux/export.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/init.h> 19#include <linux/init.h>
19#include <linux/log2.h> 20#include <linux/log2.h>
@@ -62,6 +63,7 @@ extern unsigned long last_valid_pfn;
62static pgd_t *srmmu_swapper_pg_dir; 63static pgd_t *srmmu_swapper_pg_dir;
63 64
64const struct sparc32_cachetlb_ops *sparc32_cachetlb_ops; 65const struct sparc32_cachetlb_ops *sparc32_cachetlb_ops;
66EXPORT_SYMBOL(sparc32_cachetlb_ops);
65 67
66#ifdef CONFIG_SMP 68#ifdef CONFIG_SMP
67const struct sparc32_cachetlb_ops *local_ops; 69const struct sparc32_cachetlb_ops *local_ops;
diff --git a/arch/x86/boot/compressed/aslr.c b/arch/x86/boot/compressed/aslr.c
index 90a21f430117..4dbf967da50d 100644
--- a/arch/x86/boot/compressed/aslr.c
+++ b/arch/x86/boot/compressed/aslr.c
@@ -111,7 +111,7 @@ struct mem_vector {
111}; 111};
112 112
113#define MEM_AVOID_MAX 5 113#define MEM_AVOID_MAX 5
114struct mem_vector mem_avoid[MEM_AVOID_MAX]; 114static struct mem_vector mem_avoid[MEM_AVOID_MAX];
115 115
116static bool mem_contains(struct mem_vector *region, struct mem_vector *item) 116static bool mem_contains(struct mem_vector *region, struct mem_vector *item)
117{ 117{
@@ -180,7 +180,7 @@ static void mem_avoid_init(unsigned long input, unsigned long input_size,
180} 180}
181 181
182/* Does this memory vector overlap a known avoided area? */ 182/* Does this memory vector overlap a known avoided area? */
183bool mem_avoid_overlap(struct mem_vector *img) 183static bool mem_avoid_overlap(struct mem_vector *img)
184{ 184{
185 int i; 185 int i;
186 186
@@ -192,8 +192,9 @@ bool mem_avoid_overlap(struct mem_vector *img)
192 return false; 192 return false;
193} 193}
194 194
195unsigned long slots[CONFIG_RANDOMIZE_BASE_MAX_OFFSET / CONFIG_PHYSICAL_ALIGN]; 195static unsigned long slots[CONFIG_RANDOMIZE_BASE_MAX_OFFSET /
196unsigned long slot_max = 0; 196 CONFIG_PHYSICAL_ALIGN];
197static unsigned long slot_max;
197 198
198static void slots_append(unsigned long addr) 199static void slots_append(unsigned long addr)
199{ 200{
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h
index 3d6b9f81cc68..acd86c850414 100644
--- a/arch/x86/include/asm/efi.h
+++ b/arch/x86/include/asm/efi.h
@@ -134,6 +134,7 @@ extern void efi_setup_page_tables(void);
134extern void __init old_map_region(efi_memory_desc_t *md); 134extern void __init old_map_region(efi_memory_desc_t *md);
135extern void __init runtime_code_page_mkexec(void); 135extern void __init runtime_code_page_mkexec(void);
136extern void __init efi_runtime_mkexec(void); 136extern void __init efi_runtime_mkexec(void);
137extern void __init efi_apply_memmap_quirks(void);
137 138
138struct efi_setup_data { 139struct efi_setup_data {
139 u64 fw_vendor; 140 u64 fw_vendor;
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 57ae63cd6ee2..94605c0e9cee 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -66,6 +66,6 @@ extern void tsc_save_sched_clock_state(void);
66extern void tsc_restore_sched_clock_state(void); 66extern void tsc_restore_sched_clock_state(void);
67 67
68/* MSR based TSC calibration for Intel Atom SoC platforms */ 68/* MSR based TSC calibration for Intel Atom SoC platforms */
69int try_msr_calibrate_tsc(unsigned long *fast_calibrate); 69unsigned long try_msr_calibrate_tsc(void);
70 70
71#endif /* _ASM_X86_TSC_H */ 71#endif /* _ASM_X86_TSC_H */
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index b88645191fe5..79f9f848bee4 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1192,6 +1192,9 @@ static void x86_pmu_del(struct perf_event *event, int flags)
1192 for (i = 0; i < cpuc->n_events; i++) { 1192 for (i = 0; i < cpuc->n_events; i++) {
1193 if (event == cpuc->event_list[i]) { 1193 if (event == cpuc->event_list[i]) {
1194 1194
1195 if (i >= cpuc->n_events - cpuc->n_added)
1196 --cpuc->n_added;
1197
1195 if (x86_pmu.put_event_constraints) 1198 if (x86_pmu.put_event_constraints)
1196 x86_pmu.put_event_constraints(cpuc, event); 1199 x86_pmu.put_event_constraints(cpuc, event);
1197 1200
@@ -1521,6 +1524,8 @@ static int __init init_hw_perf_events(void)
1521 1524
1522 pr_cont("%s PMU driver.\n", x86_pmu.name); 1525 pr_cont("%s PMU driver.\n", x86_pmu.name);
1523 1526
1527 x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */
1528
1524 for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next) 1529 for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next)
1525 quirk->func(); 1530 quirk->func();
1526 1531
@@ -1534,7 +1539,6 @@ static int __init init_hw_perf_events(void)
1534 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1, 1539 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1,
1535 0, x86_pmu.num_counters, 0, 0); 1540 0, x86_pmu.num_counters, 0, 0);
1536 1541
1537 x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */
1538 x86_pmu_format_group.attrs = x86_pmu.format_attrs; 1542 x86_pmu_format_group.attrs = x86_pmu.format_attrs;
1539 1543
1540 if (x86_pmu.event_attrs) 1544 if (x86_pmu.event_attrs)
@@ -1820,9 +1824,12 @@ static ssize_t set_attr_rdpmc(struct device *cdev,
1820 if (ret) 1824 if (ret)
1821 return ret; 1825 return ret;
1822 1826
1827 if (x86_pmu.attr_rdpmc_broken)
1828 return -ENOTSUPP;
1829
1823 if (!!val != !!x86_pmu.attr_rdpmc) { 1830 if (!!val != !!x86_pmu.attr_rdpmc) {
1824 x86_pmu.attr_rdpmc = !!val; 1831 x86_pmu.attr_rdpmc = !!val;
1825 smp_call_function(change_rdpmc, (void *)val, 1); 1832 on_each_cpu(change_rdpmc, (void *)val, 1);
1826 } 1833 }
1827 1834
1828 return count; 1835 return count;
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index c1a861829d81..4972c244d0bc 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -409,6 +409,7 @@ struct x86_pmu {
409 /* 409 /*
410 * sysfs attrs 410 * sysfs attrs
411 */ 411 */
412 int attr_rdpmc_broken;
412 int attr_rdpmc; 413 int attr_rdpmc;
413 struct attribute **format_attrs; 414 struct attribute **format_attrs;
414 struct attribute **event_attrs; 415 struct attribute **event_attrs;
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 0fa4f242f050..aa333d966886 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1361,10 +1361,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
1361 intel_pmu_disable_all(); 1361 intel_pmu_disable_all();
1362 handled = intel_pmu_drain_bts_buffer(); 1362 handled = intel_pmu_drain_bts_buffer();
1363 status = intel_pmu_get_status(); 1363 status = intel_pmu_get_status();
1364 if (!status) { 1364 if (!status)
1365 intel_pmu_enable_all(0); 1365 goto done;
1366 return handled;
1367 }
1368 1366
1369 loops = 0; 1367 loops = 0;
1370again: 1368again:
@@ -2310,10 +2308,7 @@ __init int intel_pmu_init(void)
2310 if (version > 1) 2308 if (version > 1)
2311 x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3); 2309 x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
2312 2310
2313 /* 2311 if (boot_cpu_has(X86_FEATURE_PDCM)) {
2314 * v2 and above have a perf capabilities MSR
2315 */
2316 if (version > 1) {
2317 u64 capabilities; 2312 u64 capabilities;
2318 2313
2319 rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities); 2314 rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 29c248799ced..c88f7f4b03ee 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -501,8 +501,11 @@ static struct extra_reg snbep_uncore_cbox_extra_regs[] = {
501 SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN, 501 SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN,
502 SNBEP_CBO_PMON_CTL_TID_EN, 0x1), 502 SNBEP_CBO_PMON_CTL_TID_EN, 0x1),
503 SNBEP_CBO_EVENT_EXTRA_REG(0x0334, 0xffff, 0x4), 503 SNBEP_CBO_EVENT_EXTRA_REG(0x0334, 0xffff, 0x4),
504 SNBEP_CBO_EVENT_EXTRA_REG(0x4334, 0xffff, 0x6),
504 SNBEP_CBO_EVENT_EXTRA_REG(0x0534, 0xffff, 0x4), 505 SNBEP_CBO_EVENT_EXTRA_REG(0x0534, 0xffff, 0x4),
506 SNBEP_CBO_EVENT_EXTRA_REG(0x4534, 0xffff, 0x6),
505 SNBEP_CBO_EVENT_EXTRA_REG(0x0934, 0xffff, 0x4), 507 SNBEP_CBO_EVENT_EXTRA_REG(0x0934, 0xffff, 0x4),
508 SNBEP_CBO_EVENT_EXTRA_REG(0x4934, 0xffff, 0x6),
506 SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0x6), 509 SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0x6),
507 SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x8), 510 SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x8),
508 SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x8), 511 SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x8),
@@ -1178,10 +1181,15 @@ static struct extra_reg ivt_uncore_cbox_extra_regs[] = {
1178 SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN, 1181 SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN,
1179 SNBEP_CBO_PMON_CTL_TID_EN, 0x1), 1182 SNBEP_CBO_PMON_CTL_TID_EN, 0x1),
1180 SNBEP_CBO_EVENT_EXTRA_REG(0x1031, 0x10ff, 0x2), 1183 SNBEP_CBO_EVENT_EXTRA_REG(0x1031, 0x10ff, 0x2),
1184 SNBEP_CBO_EVENT_EXTRA_REG(0x1134, 0xffff, 0x4),
1185 SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0xc),
1186 SNBEP_CBO_EVENT_EXTRA_REG(0x5134, 0xffff, 0xc),
1181 SNBEP_CBO_EVENT_EXTRA_REG(0x0334, 0xffff, 0x4), 1187 SNBEP_CBO_EVENT_EXTRA_REG(0x0334, 0xffff, 0x4),
1188 SNBEP_CBO_EVENT_EXTRA_REG(0x4334, 0xffff, 0xc),
1182 SNBEP_CBO_EVENT_EXTRA_REG(0x0534, 0xffff, 0x4), 1189 SNBEP_CBO_EVENT_EXTRA_REG(0x0534, 0xffff, 0x4),
1190 SNBEP_CBO_EVENT_EXTRA_REG(0x4534, 0xffff, 0xc),
1183 SNBEP_CBO_EVENT_EXTRA_REG(0x0934, 0xffff, 0x4), 1191 SNBEP_CBO_EVENT_EXTRA_REG(0x0934, 0xffff, 0x4),
1184 SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0xc), 1192 SNBEP_CBO_EVENT_EXTRA_REG(0x4934, 0xffff, 0xc),
1185 SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x10), 1193 SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x10),
1186 SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x10), 1194 SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x10),
1187 SNBEP_CBO_EVENT_EXTRA_REG(0x2135, 0xffff, 0x10), 1195 SNBEP_CBO_EVENT_EXTRA_REG(0x2135, 0xffff, 0x10),
diff --git a/arch/x86/kernel/cpu/perf_event_p6.c b/arch/x86/kernel/cpu/perf_event_p6.c
index b1e2fe115323..7c1a0c07b607 100644
--- a/arch/x86/kernel/cpu/perf_event_p6.c
+++ b/arch/x86/kernel/cpu/perf_event_p6.c
@@ -231,31 +231,49 @@ static __initconst const struct x86_pmu p6_pmu = {
231 231
232}; 232};
233 233
234static __init void p6_pmu_rdpmc_quirk(void)
235{
236 if (boot_cpu_data.x86_mask < 9) {
237 /*
238 * PPro erratum 26; fixed in stepping 9 and above.
239 */
240 pr_warn("Userspace RDPMC support disabled due to a CPU erratum\n");
241 x86_pmu.attr_rdpmc_broken = 1;
242 x86_pmu.attr_rdpmc = 0;
243 }
244}
245
234__init int p6_pmu_init(void) 246__init int p6_pmu_init(void)
235{ 247{
248 x86_pmu = p6_pmu;
249
236 switch (boot_cpu_data.x86_model) { 250 switch (boot_cpu_data.x86_model) {
237 case 1: 251 case 1: /* Pentium Pro */
238 case 3: /* Pentium Pro */ 252 x86_add_quirk(p6_pmu_rdpmc_quirk);
239 case 5: 253 break;
240 case 6: /* Pentium II */ 254
241 case 7: 255 case 3: /* Pentium II - Klamath */
242 case 8: 256 case 5: /* Pentium II - Deschutes */
243 case 11: /* Pentium III */ 257 case 6: /* Pentium II - Mendocino */
244 case 9:
245 case 13:
246 /* Pentium M */
247 break; 258 break;
259
260 case 7: /* Pentium III - Katmai */
261 case 8: /* Pentium III - Coppermine */
262 case 10: /* Pentium III Xeon */
263 case 11: /* Pentium III - Tualatin */
264 break;
265
266 case 9: /* Pentium M - Banias */
267 case 13: /* Pentium M - Dothan */
268 break;
269
248 default: 270 default:
249 pr_cont("unsupported p6 CPU model %d ", 271 pr_cont("unsupported p6 CPU model %d ", boot_cpu_data.x86_model);
250 boot_cpu_data.x86_model);
251 return -ENODEV; 272 return -ENODEV;
252 } 273 }
253 274
254 x86_pmu = p6_pmu;
255
256 memcpy(hw_cache_event_ids, p6_hw_cache_event_ids, 275 memcpy(hw_cache_event_ids, p6_hw_cache_event_ids,
257 sizeof(hw_cache_event_ids)); 276 sizeof(hw_cache_event_ids));
258 277
259
260 return 0; 278 return 0;
261} 279}
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 81ba27679f18..f36bd42d6f0c 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -544,6 +544,10 @@ ENDPROC(early_idt_handlers)
544 /* This is global to keep gas from relaxing the jumps */ 544 /* This is global to keep gas from relaxing the jumps */
545ENTRY(early_idt_handler) 545ENTRY(early_idt_handler)
546 cld 546 cld
547
548 cmpl $2,(%esp) # X86_TRAP_NMI
549 je is_nmi # Ignore NMI
550
547 cmpl $2,%ss:early_recursion_flag 551 cmpl $2,%ss:early_recursion_flag
548 je hlt_loop 552 je hlt_loop
549 incl %ss:early_recursion_flag 553 incl %ss:early_recursion_flag
@@ -594,8 +598,9 @@ ex_entry:
594 pop %edx 598 pop %edx
595 pop %ecx 599 pop %ecx
596 pop %eax 600 pop %eax
597 addl $8,%esp /* drop vector number and error code */
598 decl %ss:early_recursion_flag 601 decl %ss:early_recursion_flag
602is_nmi:
603 addl $8,%esp /* drop vector number and error code */
599 iret 604 iret
600ENDPROC(early_idt_handler) 605ENDPROC(early_idt_handler)
601 606
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index e1aabdb314c8..a468c0a65c42 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -343,6 +343,9 @@ early_idt_handlers:
343ENTRY(early_idt_handler) 343ENTRY(early_idt_handler)
344 cld 344 cld
345 345
346 cmpl $2,(%rsp) # X86_TRAP_NMI
347 je is_nmi # Ignore NMI
348
346 cmpl $2,early_recursion_flag(%rip) 349 cmpl $2,early_recursion_flag(%rip)
347 jz 1f 350 jz 1f
348 incl early_recursion_flag(%rip) 351 incl early_recursion_flag(%rip)
@@ -405,8 +408,9 @@ ENTRY(early_idt_handler)
405 popq %rdx 408 popq %rdx
406 popq %rcx 409 popq %rcx
407 popq %rax 410 popq %rax
408 addq $16,%rsp # drop vector number and error code
409 decl early_recursion_flag(%rip) 411 decl early_recursion_flag(%rip)
412is_nmi:
413 addq $16,%rsp # drop vector number and error code
410 INTERRUPT_RETURN 414 INTERRUPT_RETURN
411ENDPROC(early_idt_handler) 415ENDPROC(early_idt_handler)
412 416
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 4eabc160696f..679cef0791cd 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -279,5 +279,7 @@ void arch_crash_save_vmcoreinfo(void)
279 VMCOREINFO_SYMBOL(node_data); 279 VMCOREINFO_SYMBOL(node_data);
280 VMCOREINFO_LENGTH(node_data, MAX_NUMNODES); 280 VMCOREINFO_LENGTH(node_data, MAX_NUMNODES);
281#endif 281#endif
282 vmcoreinfo_append_str("KERNELOFFSET=%lx\n",
283 (unsigned long)&_text - __START_KERNEL);
282} 284}
283 285
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 872079a67e4d..f7d0672481fd 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -100,8 +100,10 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,
100 flag |= __GFP_ZERO; 100 flag |= __GFP_ZERO;
101again: 101again:
102 page = NULL; 102 page = NULL;
103 if (!(flag & GFP_ATOMIC)) 103 /* CMA can be used only in the context which permits sleeping */
104 if (flag & __GFP_WAIT)
104 page = dma_alloc_from_contiguous(dev, count, get_order(size)); 105 page = dma_alloc_from_contiguous(dev, count, get_order(size));
106 /* fallback */
105 if (!page) 107 if (!page)
106 page = alloc_pages_node(dev_to_node(dev), flag, get_order(size)); 108 page = alloc_pages_node(dev_to_node(dev), flag, get_order(size));
107 if (!page) 109 if (!page)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 06853e670354..ce72964b2f46 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1239,14 +1239,8 @@ void __init setup_arch(char **cmdline_p)
1239 register_refined_jiffies(CLOCK_TICK_RATE); 1239 register_refined_jiffies(CLOCK_TICK_RATE);
1240 1240
1241#ifdef CONFIG_EFI 1241#ifdef CONFIG_EFI
1242 /* Once setup is done above, unmap the EFI memory map on 1242 if (efi_enabled(EFI_BOOT))
1243 * mismatched firmware/kernel archtectures since there is no 1243 efi_apply_memmap_quirks();
1244 * support for runtime services.
1245 */
1246 if (efi_enabled(EFI_BOOT) && !efi_is_native()) {
1247 pr_info("efi: Setup done, disabling due to 32/64-bit mismatch\n");
1248 efi_unmap_memmap();
1249 }
1250#endif 1244#endif
1251} 1245}
1252 1246
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index acb3b606613e..cfbe99f88830 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -653,13 +653,10 @@ unsigned long native_calibrate_tsc(void)
653 653
654 /* Calibrate TSC using MSR for Intel Atom SoCs */ 654 /* Calibrate TSC using MSR for Intel Atom SoCs */
655 local_irq_save(flags); 655 local_irq_save(flags);
656 i = try_msr_calibrate_tsc(&fast_calibrate); 656 fast_calibrate = try_msr_calibrate_tsc();
657 local_irq_restore(flags); 657 local_irq_restore(flags);
658 if (i >= 0) { 658 if (fast_calibrate)
659 if (i == 0)
660 pr_warn("Fast TSC calibration using MSR failed\n");
661 return fast_calibrate; 659 return fast_calibrate;
662 }
663 660
664 local_irq_save(flags); 661 local_irq_save(flags);
665 fast_calibrate = quick_pit_calibrate(); 662 fast_calibrate = quick_pit_calibrate();
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 8b5434f4389f..92ae6acac8a7 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -53,7 +53,7 @@ static struct freq_desc freq_desc_tables[] = {
53 /* TNG */ 53 /* TNG */
54 { 6, 0x4a, 1, { 0, FREQ_100, FREQ_133, 0, 0, 0, 0, 0 } }, 54 { 6, 0x4a, 1, { 0, FREQ_100, FREQ_133, 0, 0, 0, 0, 0 } },
55 /* VLV2 */ 55 /* VLV2 */
56 { 6, 0x37, 1, { 0, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } }, 56 { 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
57 /* ANN */ 57 /* ANN */
58 { 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } }, 58 { 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
59}; 59};
@@ -77,21 +77,18 @@ static int match_cpu(u8 family, u8 model)
77 77
78/* 78/*
79 * Do MSR calibration only for known/supported CPUs. 79 * Do MSR calibration only for known/supported CPUs.
80 * Return values: 80 *
81 * -1: CPU is unknown/unsupported for MSR based calibration 81 * Returns the calibration value or 0 if MSR calibration failed.
82 * 0: CPU is known/supported, but calibration failed
83 * 1: CPU is known/supported, and calibration succeeded
84 */ 82 */
85int try_msr_calibrate_tsc(unsigned long *fast_calibrate) 83unsigned long try_msr_calibrate_tsc(void)
86{ 84{
87 int cpu_index;
88 u32 lo, hi, ratio, freq_id, freq; 85 u32 lo, hi, ratio, freq_id, freq;
86 unsigned long res;
87 int cpu_index;
89 88
90 cpu_index = match_cpu(boot_cpu_data.x86, boot_cpu_data.x86_model); 89 cpu_index = match_cpu(boot_cpu_data.x86, boot_cpu_data.x86_model);
91 if (cpu_index < 0) 90 if (cpu_index < 0)
92 return -1; 91 return 0;
93
94 *fast_calibrate = 0;
95 92
96 if (freq_desc_tables[cpu_index].msr_plat) { 93 if (freq_desc_tables[cpu_index].msr_plat) {
97 rdmsr(MSR_PLATFORM_INFO, lo, hi); 94 rdmsr(MSR_PLATFORM_INFO, lo, hi);
@@ -103,7 +100,7 @@ int try_msr_calibrate_tsc(unsigned long *fast_calibrate)
103 pr_info("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio); 100 pr_info("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio);
104 101
105 if (!ratio) 102 if (!ratio)
106 return 0; 103 goto fail;
107 104
108 /* Get FSB FREQ ID */ 105 /* Get FSB FREQ ID */
109 rdmsr(MSR_FSB_FREQ, lo, hi); 106 rdmsr(MSR_FSB_FREQ, lo, hi);
@@ -112,16 +109,19 @@ int try_msr_calibrate_tsc(unsigned long *fast_calibrate)
112 pr_info("Resolved frequency ID: %u, frequency: %u KHz\n", 109 pr_info("Resolved frequency ID: %u, frequency: %u KHz\n",
113 freq_id, freq); 110 freq_id, freq);
114 if (!freq) 111 if (!freq)
115 return 0; 112 goto fail;
116 113
117 /* TSC frequency = maximum resolved freq * maximum resolved bus ratio */ 114 /* TSC frequency = maximum resolved freq * maximum resolved bus ratio */
118 *fast_calibrate = freq * ratio; 115 res = freq * ratio;
119 pr_info("TSC runs at %lu KHz\n", *fast_calibrate); 116 pr_info("TSC runs at %lu KHz\n", res);
120 117
121#ifdef CONFIG_X86_LOCAL_APIC 118#ifdef CONFIG_X86_LOCAL_APIC
122 lapic_timer_frequency = (freq * 1000) / HZ; 119 lapic_timer_frequency = (freq * 1000) / HZ;
123 pr_info("lapic_timer_frequency = %d\n", lapic_timer_frequency); 120 pr_info("lapic_timer_frequency = %d\n", lapic_timer_frequency);
124#endif 121#endif
122 return res;
125 123
126 return 1; 124fail:
125 pr_warn("Fast TSC calibration using MSR failed\n");
126 return 0;
127} 127}
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index e50425d0f5f7..9b531351a587 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2672,6 +2672,7 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2672 break; 2672 break;
2673 } 2673 }
2674 2674
2675 drop_large_spte(vcpu, iterator.sptep);
2675 if (!is_shadow_present_pte(*iterator.sptep)) { 2676 if (!is_shadow_present_pte(*iterator.sptep)) {
2676 u64 base_addr = iterator.addr; 2677 u64 base_addr = iterator.addr;
2677 2678
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a06f101ef64b..392752834751 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6688,7 +6688,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
6688 else if (is_page_fault(intr_info)) 6688 else if (is_page_fault(intr_info))
6689 return enable_ept; 6689 return enable_ept;
6690 else if (is_no_device(intr_info) && 6690 else if (is_no_device(intr_info) &&
6691 !(nested_read_cr0(vmcs12) & X86_CR0_TS)) 6691 !(vmcs12->guest_cr0 & X86_CR0_TS))
6692 return 0; 6692 return 0;
6693 return vmcs12->exception_bitmap & 6693 return vmcs12->exception_bitmap &
6694 (1u << (intr_info & INTR_INFO_VECTOR_MASK)); 6694 (1u << (intr_info & INTR_INFO_VECTOR_MASK));
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 39c28f09dfd5..2b8578432d5b 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -6186,7 +6186,7 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6186 frag->len -= len; 6186 frag->len -= len;
6187 } 6187 }
6188 6188
6189 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) { 6189 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6190 vcpu->mmio_needed = 0; 6190 vcpu->mmio_needed = 0;
6191 6191
6192 /* FIXME: return into emulator if single-stepping. */ 6192 /* FIXME: return into emulator if single-stepping. */
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 6dea040cc3a1..a10c8c792161 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -1020,13 +1020,17 @@ static inline bool smap_violation(int error_code, struct pt_regs *regs)
1020 * This routine handles page faults. It determines the address, 1020 * This routine handles page faults. It determines the address,
1021 * and the problem, and then passes it off to one of the appropriate 1021 * and the problem, and then passes it off to one of the appropriate
1022 * routines. 1022 * routines.
1023 *
1024 * This function must have noinline because both callers
1025 * {,trace_}do_page_fault() have notrace on. Having this an actual function
1026 * guarantees there's a function trace entry.
1023 */ 1027 */
1024static void __kprobes 1028static void __kprobes noinline
1025__do_page_fault(struct pt_regs *regs, unsigned long error_code) 1029__do_page_fault(struct pt_regs *regs, unsigned long error_code,
1030 unsigned long address)
1026{ 1031{
1027 struct vm_area_struct *vma; 1032 struct vm_area_struct *vma;
1028 struct task_struct *tsk; 1033 struct task_struct *tsk;
1029 unsigned long address;
1030 struct mm_struct *mm; 1034 struct mm_struct *mm;
1031 int fault; 1035 int fault;
1032 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; 1036 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
@@ -1034,9 +1038,6 @@ __do_page_fault(struct pt_regs *regs, unsigned long error_code)
1034 tsk = current; 1038 tsk = current;
1035 mm = tsk->mm; 1039 mm = tsk->mm;
1036 1040
1037 /* Get the faulting address: */
1038 address = read_cr2();
1039
1040 /* 1041 /*
1041 * Detect and handle instructions that would cause a page fault for 1042 * Detect and handle instructions that would cause a page fault for
1042 * both a tracked kernel page and a userspace page. 1043 * both a tracked kernel page and a userspace page.
@@ -1248,32 +1249,50 @@ good_area:
1248 up_read(&mm->mmap_sem); 1249 up_read(&mm->mmap_sem);
1249} 1250}
1250 1251
1251dotraplinkage void __kprobes 1252dotraplinkage void __kprobes notrace
1252do_page_fault(struct pt_regs *regs, unsigned long error_code) 1253do_page_fault(struct pt_regs *regs, unsigned long error_code)
1253{ 1254{
1255 unsigned long address = read_cr2(); /* Get the faulting address */
1254 enum ctx_state prev_state; 1256 enum ctx_state prev_state;
1255 1257
1258 /*
1259 * We must have this function tagged with __kprobes, notrace and call
1260 * read_cr2() before calling anything else. To avoid calling any kind
1261 * of tracing machinery before we've observed the CR2 value.
1262 *
1263 * exception_{enter,exit}() contain all sorts of tracepoints.
1264 */
1265
1256 prev_state = exception_enter(); 1266 prev_state = exception_enter();
1257 __do_page_fault(regs, error_code); 1267 __do_page_fault(regs, error_code, address);
1258 exception_exit(prev_state); 1268 exception_exit(prev_state);
1259} 1269}
1260 1270
1261static void trace_page_fault_entries(struct pt_regs *regs, 1271#ifdef CONFIG_TRACING
1272static void trace_page_fault_entries(unsigned long address, struct pt_regs *regs,
1262 unsigned long error_code) 1273 unsigned long error_code)
1263{ 1274{
1264 if (user_mode(regs)) 1275 if (user_mode(regs))
1265 trace_page_fault_user(read_cr2(), regs, error_code); 1276 trace_page_fault_user(address, regs, error_code);
1266 else 1277 else
1267 trace_page_fault_kernel(read_cr2(), regs, error_code); 1278 trace_page_fault_kernel(address, regs, error_code);
1268} 1279}
1269 1280
1270dotraplinkage void __kprobes 1281dotraplinkage void __kprobes notrace
1271trace_do_page_fault(struct pt_regs *regs, unsigned long error_code) 1282trace_do_page_fault(struct pt_regs *regs, unsigned long error_code)
1272{ 1283{
1284 /*
1285 * The exception_enter and tracepoint processing could
1286 * trigger another page faults (user space callchain
1287 * reading) and destroy the original cr2 value, so read
1288 * the faulting address now.
1289 */
1290 unsigned long address = read_cr2();
1273 enum ctx_state prev_state; 1291 enum ctx_state prev_state;
1274 1292
1275 prev_state = exception_enter(); 1293 prev_state = exception_enter();
1276 trace_page_fault_entries(regs, error_code); 1294 trace_page_fault_entries(address, regs, error_code);
1277 __do_page_fault(regs, error_code); 1295 __do_page_fault(regs, error_code, address);
1278 exception_exit(prev_state); 1296 exception_exit(prev_state);
1279} 1297}
1298#endif /* CONFIG_TRACING */
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 1a201ac7cef8..b97acecf3fd9 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -52,6 +52,7 @@
52#include <asm/tlbflush.h> 52#include <asm/tlbflush.h>
53#include <asm/x86_init.h> 53#include <asm/x86_init.h>
54#include <asm/rtc.h> 54#include <asm/rtc.h>
55#include <asm/uv/uv.h>
55 56
56#define EFI_DEBUG 57#define EFI_DEBUG
57 58
@@ -1210,3 +1211,22 @@ static int __init parse_efi_cmdline(char *str)
1210 return 0; 1211 return 0;
1211} 1212}
1212early_param("efi", parse_efi_cmdline); 1213early_param("efi", parse_efi_cmdline);
1214
1215void __init efi_apply_memmap_quirks(void)
1216{
1217 /*
1218 * Once setup is done earlier, unmap the EFI memory map on mismatched
1219 * firmware/kernel architectures since there is no support for runtime
1220 * services.
1221 */
1222 if (!efi_is_native()) {
1223 pr_info("efi: Setup done, disabling due to 32/64-bit mismatch\n");
1224 efi_unmap_memmap();
1225 }
1226
1227 /*
1228 * UV doesn't support the new EFI pagetable mapping yet.
1229 */
1230 if (is_uv_system())
1231 set_bit(EFI_OLD_MEMMAP, &x86_efi_facility);
1232}
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index ba56e11cbf77..c87ae7c6e5f9 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -20,6 +20,7 @@ config XTENSA
20 select HAVE_FUNCTION_TRACER 20 select HAVE_FUNCTION_TRACER
21 select HAVE_IRQ_TIME_ACCOUNTING 21 select HAVE_IRQ_TIME_ACCOUNTING
22 select HAVE_PERF_EVENTS 22 select HAVE_PERF_EVENTS
23 select COMMON_CLK
23 help 24 help
24 Xtensa processors are 32-bit RISC machines designed by Tensilica 25 Xtensa processors are 32-bit RISC machines designed by Tensilica
25 primarily for embedded systems. These processors are both 26 primarily for embedded systems. These processors are both
@@ -80,7 +81,6 @@ choice
80config XTENSA_VARIANT_FSF 81config XTENSA_VARIANT_FSF
81 bool "fsf - default (not generic) configuration" 82 bool "fsf - default (not generic) configuration"
82 select MMU 83 select MMU
83 select HAVE_XTENSA_GPIO32
84 84
85config XTENSA_VARIANT_DC232B 85config XTENSA_VARIANT_DC232B
86 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)" 86 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
@@ -135,7 +135,6 @@ config HAVE_SMP
135config SMP 135config SMP
136 bool "Enable Symmetric multi-processing support" 136 bool "Enable Symmetric multi-processing support"
137 depends on HAVE_SMP 137 depends on HAVE_SMP
138 select USE_GENERIC_SMP_HELPERS
139 select GENERIC_SMP_IDLE_THREAD 138 select GENERIC_SMP_IDLE_THREAD
140 help 139 help
141 Enabled SMP Software; allows more than one CPU/CORE 140 Enabled SMP Software; allows more than one CPU/CORE
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index 46b4f5eab421..e7370b11348e 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -35,6 +35,13 @@
35 interrupt-controller; 35 interrupt-controller;
36 }; 36 };
37 37
38 clocks {
39 osc: main-oscillator {
40 #clock-cells = <0>;
41 compatible = "fixed-clock";
42 };
43 };
44
38 serial0: serial@fd050020 { 45 serial0: serial@fd050020 {
39 device_type = "serial"; 46 device_type = "serial";
40 compatible = "ns16550a"; 47 compatible = "ns16550a";
@@ -42,9 +49,7 @@
42 reg = <0xfd050020 0x20>; 49 reg = <0xfd050020 0x20>;
43 reg-shift = <2>; 50 reg-shift = <2>;
44 interrupts = <0 1>; /* external irq 0 */ 51 interrupts = <0 1>; /* external irq 0 */
45 /* Filled in by platform_setup from FPGA register 52 clocks = <&osc>;
46 * clock-frequency = <100000000>;
47 */
48 }; 53 };
49 54
50 enet0: ethoc@fd030000 { 55 enet0: ethoc@fd030000 {
@@ -52,5 +57,6 @@
52 reg = <0xfd030000 0x4000 0xfd800000 0x4000>; 57 reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
53 interrupts = <1 1>; /* external irq 1 */ 58 interrupts = <1 1>; /* external irq 1 */
54 local-mac-address = [00 50 c2 13 6f 00]; 59 local-mac-address = [00 50 c2 13 6f 00];
60 clocks = <&osc>;
55 }; 61 };
56}; 62};
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 2a042d430c25..74944207167e 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -25,7 +25,7 @@
25 25
26#ifdef CONFIG_MMU 26#ifdef CONFIG_MMU
27 27
28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF 28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
29extern unsigned long xtensa_kio_paddr; 29extern unsigned long xtensa_kio_paddr;
30 30
31static inline unsigned long xtensa_get_kio_paddr(void) 31static inline unsigned long xtensa_get_kio_paddr(void)
diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h
index 8c194f6af45e..677bfcf4ee5d 100644
--- a/arch/xtensa/include/asm/traps.h
+++ b/arch/xtensa/include/asm/traps.h
@@ -23,25 +23,37 @@ void secondary_trap_init(void);
23 23
24static inline void spill_registers(void) 24static inline void spill_registers(void)
25{ 25{
26 26#if XCHAL_NUM_AREGS > 16
27 __asm__ __volatile__ ( 27 __asm__ __volatile__ (
28 "movi a14, "__stringify((1 << PS_EXCM_BIT) | LOCKLEVEL)"\n\t" 28 " call12 1f\n"
29 "mov a12, a0\n\t" 29 " _j 2f\n"
30 "rsr a13, sar\n\t" 30 " retw\n"
31 "xsr a14, ps\n\t" 31 " .align 4\n"
32 "movi a0, _spill_registers\n\t" 32 "1:\n"
33 "rsync\n\t" 33 " _entry a1, 48\n"
34 "callx0 a0\n\t" 34 " addi a12, a0, 3\n"
35 "mov a0, a12\n\t" 35#if XCHAL_NUM_AREGS > 32
36 "wsr a13, sar\n\t" 36 " .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n"
37 "wsr a14, ps\n\t" 37 " _entry a1, 48\n"
38 : : 38 " mov a12, a0\n"
39#if defined(CONFIG_FRAME_POINTER) 39 " .endr\n"
40 : "a2", "a3", "a4", "a11", "a12", "a13", "a14", "a15", 40#endif
41 " _entry a1, 48\n"
42#if XCHAL_NUM_AREGS % 12 == 0
43 " mov a8, a8\n"
44#elif XCHAL_NUM_AREGS % 12 == 4
45 " mov a12, a12\n"
46#elif XCHAL_NUM_AREGS % 12 == 8
47 " mov a4, a4\n"
48#endif
49 " retw\n"
50 "2:\n"
51 : : : "a12", "a13", "memory");
41#else 52#else
42 : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15", 53 __asm__ __volatile__ (
54 " mov a12, a12\n"
55 : : : "memory");
43#endif 56#endif
44 "memory");
45} 57}
46 58
47#endif /* _XTENSA_TRAPS_H */ 59#endif /* _XTENSA_TRAPS_H */
diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h
index 5791b45d5a5d..f74ddfbb92ef 100644
--- a/arch/xtensa/include/asm/vectors.h
+++ b/arch/xtensa/include/asm/vectors.h
@@ -25,7 +25,7 @@
25#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000 25#define XCHAL_KIO_DEFAULT_PADDR 0xf0000000
26#define XCHAL_KIO_SIZE 0x10000000 26#define XCHAL_KIO_SIZE 0x10000000
27 27
28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF 28#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
29#define XCHAL_KIO_PADDR xtensa_get_kio_paddr() 29#define XCHAL_KIO_PADDR xtensa_get_kio_paddr()
30#else 30#else
31#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR 31#define XCHAL_KIO_PADDR XCHAL_KIO_DEFAULT_PADDR
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index 51940fec6990..b9395529f02d 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -734,7 +734,12 @@ __SYSCALL(332, sys_finit_module, 3)
734#define __NR_accept4 333 734#define __NR_accept4 333
735__SYSCALL(333, sys_accept4, 4) 735__SYSCALL(333, sys_accept4, 4)
736 736
737#define __NR_syscall_count 334 737#define __NR_sched_setattr 334
738__SYSCALL(334, sys_sched_setattr, 2)
739#define __NR_sched_getattr 335
740__SYSCALL(335, sys_sched_getattr, 3)
741
742#define __NR_syscall_count 336
738 743
739/* 744/*
740 * sysxtensa syscall handler 745 * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 21dbe6bdb8ed..ef7f4990722b 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1081,196 +1081,53 @@ ENTRY(fast_syscall_spill_registers)
1081 1081
1082 rsr a0, sar 1082 rsr a0, sar
1083 s32i a3, a2, PT_AREG3 1083 s32i a3, a2, PT_AREG3
1084 s32i a4, a2, PT_AREG4 1084 s32i a0, a2, PT_SAR
1085 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1086 1085
1087 /* The spill routine might clobber a7, a11, and a15. */ 1086 /* The spill routine might clobber a4, a7, a8, a11, a12, and a15. */
1088 1087
1088 s32i a4, a2, PT_AREG4
1089 s32i a7, a2, PT_AREG7 1089 s32i a7, a2, PT_AREG7
1090 s32i a8, a2, PT_AREG8
1090 s32i a11, a2, PT_AREG11 1091 s32i a11, a2, PT_AREG11
1092 s32i a12, a2, PT_AREG12
1091 s32i a15, a2, PT_AREG15 1093 s32i a15, a2, PT_AREG15
1092 1094
1093 call0 _spill_registers # destroys a3, a4, and SAR
1094
1095 /* Advance PC, restore registers and SAR, and return from exception. */
1096
1097 l32i a3, a2, PT_AREG5
1098 l32i a4, a2, PT_AREG4
1099 l32i a0, a2, PT_AREG0
1100 wsr a3, sar
1101 l32i a3, a2, PT_AREG3
1102
1103 /* Restore clobbered registers. */
1104
1105 l32i a7, a2, PT_AREG7
1106 l32i a11, a2, PT_AREG11
1107 l32i a15, a2, PT_AREG15
1108
1109 movi a2, 0
1110 rfe
1111
1112ENDPROC(fast_syscall_spill_registers)
1113
1114/* Fixup handler.
1115 *
1116 * We get here if the spill routine causes an exception, e.g. tlb miss.
1117 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1118 * we entered the spill routine and jump to the user exception handler.
1119 *
1120 * a0: value of depc, original value in depc
1121 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1122 * a3: exctable, original value in excsave1
1123 */
1124
1125ENTRY(fast_syscall_spill_registers_fixup)
1126
1127 rsr a2, windowbase # get current windowbase (a2 is saved)
1128 xsr a0, depc # restore depc and a0
1129 ssl a2 # set shift (32 - WB)
1130
1131 /* We need to make sure the current registers (a0-a3) are preserved.
1132 * To do this, we simply set the bit for the current window frame
1133 * in WS, so that the exception handlers save them to the task stack.
1134 */
1135
1136 xsr a3, excsave1 # get spill-mask
1137 slli a3, a3, 1 # shift left by one
1138
1139 slli a2, a3, 32-WSBITS
1140 src a2, a3, a2 # a2 = xxwww1yyxxxwww1yy......
1141 wsr a2, windowstart # set corrected windowstart
1142
1143 srli a3, a3, 1
1144 rsr a2, excsave1
1145 l32i a2, a2, EXC_TABLE_DOUBLE_SAVE # restore a2
1146 xsr a2, excsave1
1147 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE # save a3
1148 l32i a3, a2, EXC_TABLE_PARAM # original WB (in user task)
1149 xsr a2, excsave1
1150
1151 /* Return to the original (user task) WINDOWBASE.
1152 * We leave the following frame behind:
1153 * a0, a1, a2 same
1154 * a3: trashed (saved in EXC_TABLE_DOUBLE_SAVE)
1155 * depc: depc (we have to return to that address)
1156 * excsave_1: exctable
1157 */
1158
1159 wsr a3, windowbase
1160 rsync
1161
1162 /* We are now in the original frame when we entered _spill_registers:
1163 * a0: return address
1164 * a1: used, stack pointer
1165 * a2: kernel stack pointer
1166 * a3: available
1167 * depc: exception address
1168 * excsave: exctable
1169 * Note: This frame might be the same as above.
1170 */
1171
1172 /* Setup stack pointer. */
1173
1174 addi a2, a2, -PT_USER_SIZE
1175 s32i a0, a2, PT_AREG0
1176
1177 /* Make sure we return to this fixup handler. */
1178
1179 movi a3, fast_syscall_spill_registers_fixup_return
1180 s32i a3, a2, PT_DEPC # setup depc
1181
1182 /* Jump to the exception handler. */
1183
1184 rsr a3, excsave1
1185 rsr a0, exccause
1186 addx4 a0, a0, a3 # find entry in table
1187 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1188 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1189 jx a0
1190
1191ENDPROC(fast_syscall_spill_registers_fixup)
1192
1193ENTRY(fast_syscall_spill_registers_fixup_return)
1194
1195 /* When we return here, all registers have been restored (a2: DEPC) */
1196
1197 wsr a2, depc # exception address
1198
1199 /* Restore fixup handler. */
1200
1201 rsr a2, excsave1
1202 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE
1203 movi a3, fast_syscall_spill_registers_fixup
1204 s32i a3, a2, EXC_TABLE_FIXUP
1205 rsr a3, windowbase
1206 s32i a3, a2, EXC_TABLE_PARAM
1207 l32i a2, a2, EXC_TABLE_KSTK
1208
1209 /* Load WB at the time the exception occurred. */
1210
1211 rsr a3, sar # WB is still in SAR
1212 neg a3, a3
1213 wsr a3, windowbase
1214 rsync
1215
1216 rsr a3, excsave1
1217 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1218
1219 rfde
1220
1221ENDPROC(fast_syscall_spill_registers_fixup_return)
1222
1223/*
1224 * spill all registers.
1225 *
1226 * This is not a real function. The following conditions must be met:
1227 *
1228 * - must be called with call0.
1229 * - uses a3, a4 and SAR.
1230 * - the last 'valid' register of each frame are clobbered.
1231 * - the caller must have registered a fixup handler
1232 * (or be inside a critical section)
1233 * - PS_EXCM must be set (PS_WOE cleared?)
1234 */
1235
1236ENTRY(_spill_registers)
1237
1238 /* 1095 /*
1239 * Rotate ws so that the current windowbase is at bit 0. 1096 * Rotate ws so that the current windowbase is at bit 0.
1240 * Assume ws = xxxwww1yy (www1 current window frame). 1097 * Assume ws = xxxwww1yy (www1 current window frame).
1241 * Rotate ws right so that a4 = yyxxxwww1. 1098 * Rotate ws right so that a4 = yyxxxwww1.
1242 */ 1099 */
1243 1100
1244 rsr a4, windowbase 1101 rsr a0, windowbase
1245 rsr a3, windowstart # a3 = xxxwww1yy 1102 rsr a3, windowstart # a3 = xxxwww1yy
1246 ssr a4 # holds WB 1103 ssr a0 # holds WB
1247 slli a4, a3, WSBITS 1104 slli a0, a3, WSBITS
1248 or a3, a3, a4 # a3 = xxxwww1yyxxxwww1yy 1105 or a3, a3, a0 # a3 = xxxwww1yyxxxwww1yy
1249 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1 1106 srl a3, a3 # a3 = 00xxxwww1yyxxxwww1
1250 1107
1251 /* We are done if there are no more than the current register frame. */ 1108 /* We are done if there are no more than the current register frame. */
1252 1109
1253 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww 1110 extui a3, a3, 1, WSBITS-1 # a3 = 0yyxxxwww
1254 movi a4, (1 << (WSBITS-1)) 1111 movi a0, (1 << (WSBITS-1))
1255 _beqz a3, .Lnospill # only one active frame? jump 1112 _beqz a3, .Lnospill # only one active frame? jump
1256 1113
1257 /* We want 1 at the top, so that we return to the current windowbase */ 1114 /* We want 1 at the top, so that we return to the current windowbase */
1258 1115
1259 or a3, a3, a4 # 1yyxxxwww 1116 or a3, a3, a0 # 1yyxxxwww
1260 1117
1261 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */ 1118 /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1262 1119
1263 wsr a3, windowstart # save shifted windowstart 1120 wsr a3, windowstart # save shifted windowstart
1264 neg a4, a3 1121 neg a0, a3
1265 and a3, a4, a3 # first bit set from right: 000010000 1122 and a3, a0, a3 # first bit set from right: 000010000
1266 1123
1267 ffs_ws a4, a3 # a4: shifts to skip empty frames 1124 ffs_ws a0, a3 # a0: shifts to skip empty frames
1268 movi a3, WSBITS 1125 movi a3, WSBITS
1269 sub a4, a3, a4 # WSBITS-a4:number of 0-bits from right 1126 sub a0, a3, a0 # WSBITS-a0:number of 0-bits from right
1270 ssr a4 # save in SAR for later. 1127 ssr a0 # save in SAR for later.
1271 1128
1272 rsr a3, windowbase 1129 rsr a3, windowbase
1273 add a3, a3, a4 1130 add a3, a3, a0
1274 wsr a3, windowbase 1131 wsr a3, windowbase
1275 rsync 1132 rsync
1276 1133
@@ -1285,22 +1142,6 @@ ENTRY(_spill_registers)
1285 * we have to save 4,8. or 12 registers. 1142 * we have to save 4,8. or 12 registers.
1286 */ 1143 */
1287 1144
1288 _bbsi.l a3, 1, .Lc4
1289 _bbsi.l a3, 2, .Lc8
1290
1291 /* Special case: we have a call12-frame starting at a4. */
1292
1293 _bbci.l a3, 3, .Lc12 # bit 3 shouldn't be zero! (Jump to Lc12 first)
1294
1295 s32e a4, a1, -16 # a1 is valid with an empty spill area
1296 l32e a4, a5, -12
1297 s32e a8, a4, -48
1298 mov a8, a4
1299 l32e a4, a1, -16
1300 j .Lc12c
1301
1302.Lnospill:
1303 ret
1304 1145
1305.Lloop: _bbsi.l a3, 1, .Lc4 1146.Lloop: _bbsi.l a3, 1, .Lc4
1306 _bbci.l a3, 2, .Lc12 1147 _bbci.l a3, 2, .Lc12
@@ -1314,20 +1155,10 @@ ENTRY(_spill_registers)
1314 s32e a9, a4, -28 1155 s32e a9, a4, -28
1315 s32e a10, a4, -24 1156 s32e a10, a4, -24
1316 s32e a11, a4, -20 1157 s32e a11, a4, -20
1317
1318 srli a11, a3, 2 # shift windowbase by 2 1158 srli a11, a3, 2 # shift windowbase by 2
1319 rotw 2 1159 rotw 2
1320 _bnei a3, 1, .Lloop 1160 _bnei a3, 1, .Lloop
1321 1161 j .Lexit
1322.Lexit: /* Done. Do the final rotation, set WS, and return. */
1323
1324 rotw 1
1325 rsr a3, windowbase
1326 ssl a3
1327 movi a3, 1
1328 sll a3, a3
1329 wsr a3, windowstart
1330 ret
1331 1162
1332.Lc4: s32e a4, a9, -16 1163.Lc4: s32e a4, a9, -16
1333 s32e a5, a9, -12 1164 s32e a5, a9, -12
@@ -1343,11 +1174,11 @@ ENTRY(_spill_registers)
1343 1174
1344 /* 12-register frame (call12) */ 1175 /* 12-register frame (call12) */
1345 1176
1346 l32e a2, a5, -12 1177 l32e a0, a5, -12
1347 s32e a8, a2, -48 1178 s32e a8, a0, -48
1348 mov a8, a2 1179 mov a8, a0
1349 1180
1350.Lc12c: s32e a9, a8, -44 1181 s32e a9, a8, -44
1351 s32e a10, a8, -40 1182 s32e a10, a8, -40
1352 s32e a11, a8, -36 1183 s32e a11, a8, -36
1353 s32e a12, a8, -32 1184 s32e a12, a8, -32
@@ -1367,30 +1198,54 @@ ENTRY(_spill_registers)
1367 */ 1198 */
1368 1199
1369 rotw 1 1200 rotw 1
1370 mov a5, a13 1201 mov a4, a13
1371 rotw -1 1202 rotw -1
1372 1203
1373 s32e a4, a9, -16 1204 s32e a4, a8, -16
1374 s32e a5, a9, -12 1205 s32e a5, a8, -12
1375 s32e a6, a9, -8 1206 s32e a6, a8, -8
1376 s32e a7, a9, -4 1207 s32e a7, a8, -4
1377 1208
1378 rotw 3 1209 rotw 3
1379 1210
1380 _beqi a3, 1, .Lexit 1211 _beqi a3, 1, .Lexit
1381 j .Lloop 1212 j .Lloop
1382 1213
1383.Linvalid_mask: 1214.Lexit:
1384 1215
1385 /* We get here because of an unrecoverable error in the window 1216 /* Done. Do the final rotation and set WS */
1386 * registers. If we are in user space, we kill the application, 1217
1387 * however, this condition is unrecoverable in kernel space. 1218 rotw 1
1388 */ 1219 rsr a3, windowbase
1220 ssl a3
1221 movi a3, 1
1222 sll a3, a3
1223 wsr a3, windowstart
1224.Lnospill:
1225
1226 /* Advance PC, restore registers and SAR, and return from exception. */
1227
1228 l32i a3, a2, PT_SAR
1229 l32i a0, a2, PT_AREG0
1230 wsr a3, sar
1231 l32i a3, a2, PT_AREG3
1389 1232
1390 rsr a0, ps 1233 /* Restore clobbered registers. */
1391 _bbci.l a0, PS_UM_BIT, 1f
1392 1234
1393 /* User space: Setup a dummy frame and kill application. 1235 l32i a4, a2, PT_AREG4
1236 l32i a7, a2, PT_AREG7
1237 l32i a8, a2, PT_AREG8
1238 l32i a11, a2, PT_AREG11
1239 l32i a12, a2, PT_AREG12
1240 l32i a15, a2, PT_AREG15
1241
1242 movi a2, 0
1243 rfe
1244
1245.Linvalid_mask:
1246
1247 /* We get here because of an unrecoverable error in the window
1248 * registers, so set up a dummy frame and kill the user application.
1394 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer. 1249 * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
1395 */ 1250 */
1396 1251
@@ -1414,14 +1269,136 @@ ENTRY(_spill_registers)
1414 movi a4, do_exit 1269 movi a4, do_exit
1415 callx4 a4 1270 callx4 a4
1416 1271
14171: /* Kernel space: PANIC! */ 1272 /* shouldn't return, so panic */
1418 1273
1419 wsr a0, excsave1 1274 wsr a0, excsave1
1420 movi a0, unrecoverable_exception 1275 movi a0, unrecoverable_exception
1421 callx0 a0 # should not return 1276 callx0 a0 # should not return
14221: j 1b 12771: j 1b
1423 1278
1424ENDPROC(_spill_registers) 1279
1280ENDPROC(fast_syscall_spill_registers)
1281
1282/* Fixup handler.
1283 *
1284 * We get here if the spill routine causes an exception, e.g. tlb miss.
1285 * We basically restore WINDOWBASE and WINDOWSTART to the condition when
1286 * we entered the spill routine and jump to the user exception handler.
1287 *
1288 * Note that we only need to restore the bits in windowstart that have not
1289 * been spilled yet by the _spill_register routine. Luckily, a3 contains a
1290 * rotated windowstart with only those bits set for frames that haven't been
1291 * spilled yet. Because a3 is rotated such that bit 0 represents the register
1292 * frame for the current windowbase - 1, we need to rotate a3 left by the
1293 * value of the current windowbase + 1 and move it to windowstart.
1294 *
1295 * a0: value of depc, original value in depc
1296 * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
1297 * a3: exctable, original value in excsave1
1298 */
1299
1300ENTRY(fast_syscall_spill_registers_fixup)
1301
1302 rsr a2, windowbase # get current windowbase (a2 is saved)
1303 xsr a0, depc # restore depc and a0
1304 ssl a2 # set shift (32 - WB)
1305
1306 /* We need to make sure the current registers (a0-a3) are preserved.
1307 * To do this, we simply set the bit for the current window frame
1308 * in WS, so that the exception handlers save them to the task stack.
1309 *
1310 * Note: we use a3 to set the windowbase, so we take a special care
1311 * of it, saving it in the original _spill_registers frame across
1312 * the exception handler call.
1313 */
1314
1315 xsr a3, excsave1 # get spill-mask
1316 slli a3, a3, 1 # shift left by one
1317 addi a3, a3, 1 # set the bit for the current window frame
1318
1319 slli a2, a3, 32-WSBITS
1320 src a2, a3, a2 # a2 = xxwww1yyxxxwww1yy......
1321 wsr a2, windowstart # set corrected windowstart
1322
1323 srli a3, a3, 1
1324 rsr a2, excsave1
1325 l32i a2, a2, EXC_TABLE_DOUBLE_SAVE # restore a2
1326 xsr a2, excsave1
1327 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE # save a3
1328 l32i a3, a2, EXC_TABLE_PARAM # original WB (in user task)
1329 xsr a2, excsave1
1330
1331 /* Return to the original (user task) WINDOWBASE.
1332 * We leave the following frame behind:
1333 * a0, a1, a2 same
1334 * a3: trashed (saved in EXC_TABLE_DOUBLE_SAVE)
1335 * depc: depc (we have to return to that address)
1336 * excsave_1: exctable
1337 */
1338
1339 wsr a3, windowbase
1340 rsync
1341
1342 /* We are now in the original frame when we entered _spill_registers:
1343 * a0: return address
1344 * a1: used, stack pointer
1345 * a2: kernel stack pointer
1346 * a3: available
1347 * depc: exception address
1348 * excsave: exctable
1349 * Note: This frame might be the same as above.
1350 */
1351
1352 /* Setup stack pointer. */
1353
1354 addi a2, a2, -PT_USER_SIZE
1355 s32i a0, a2, PT_AREG0
1356
1357 /* Make sure we return to this fixup handler. */
1358
1359 movi a3, fast_syscall_spill_registers_fixup_return
1360 s32i a3, a2, PT_DEPC # setup depc
1361
1362 /* Jump to the exception handler. */
1363
1364 rsr a3, excsave1
1365 rsr a0, exccause
1366 addx4 a0, a0, a3 # find entry in table
1367 l32i a0, a0, EXC_TABLE_FAST_USER # load handler
1368 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1369 jx a0
1370
1371ENDPROC(fast_syscall_spill_registers_fixup)
1372
1373ENTRY(fast_syscall_spill_registers_fixup_return)
1374
1375 /* When we return here, all registers have been restored (a2: DEPC) */
1376
1377 wsr a2, depc # exception address
1378
1379 /* Restore fixup handler. */
1380
1381 rsr a2, excsave1
1382 s32i a3, a2, EXC_TABLE_DOUBLE_SAVE
1383 movi a3, fast_syscall_spill_registers_fixup
1384 s32i a3, a2, EXC_TABLE_FIXUP
1385 rsr a3, windowbase
1386 s32i a3, a2, EXC_TABLE_PARAM
1387 l32i a2, a2, EXC_TABLE_KSTK
1388
1389 /* Load WB at the time the exception occurred. */
1390
1391 rsr a3, sar # WB is still in SAR
1392 neg a3, a3
1393 wsr a3, windowbase
1394 rsync
1395
1396 rsr a3, excsave1
1397 l32i a3, a3, EXC_TABLE_DOUBLE_SAVE
1398
1399 rfde
1400
1401ENDPROC(fast_syscall_spill_registers_fixup_return)
1425 1402
1426#ifdef CONFIG_MMU 1403#ifdef CONFIG_MMU
1427/* 1404/*
@@ -1794,6 +1771,43 @@ ENTRY(system_call)
1794 1771
1795ENDPROC(system_call) 1772ENDPROC(system_call)
1796 1773
1774/*
1775 * Spill live registers on the kernel stack macro.
1776 *
1777 * Entry condition: ps.woe is set, ps.excm is cleared
1778 * Exit condition: windowstart has single bit set
1779 * May clobber: a12, a13
1780 */
1781 .macro spill_registers_kernel
1782
1783#if XCHAL_NUM_AREGS > 16
1784 call12 1f
1785 _j 2f
1786 retw
1787 .align 4
17881:
1789 _entry a1, 48
1790 addi a12, a0, 3
1791#if XCHAL_NUM_AREGS > 32
1792 .rept (XCHAL_NUM_AREGS - 32) / 12
1793 _entry a1, 48
1794 mov a12, a0
1795 .endr
1796#endif
1797 _entry a1, 48
1798#if XCHAL_NUM_AREGS % 12 == 0
1799 mov a8, a8
1800#elif XCHAL_NUM_AREGS % 12 == 4
1801 mov a12, a12
1802#elif XCHAL_NUM_AREGS % 12 == 8
1803 mov a4, a4
1804#endif
1805 retw
18062:
1807#else
1808 mov a12, a12
1809#endif
1810 .endm
1797 1811
1798/* 1812/*
1799 * Task switch. 1813 * Task switch.
@@ -1806,21 +1820,20 @@ ENTRY(_switch_to)
1806 1820
1807 entry a1, 16 1821 entry a1, 16
1808 1822
1809 mov a12, a2 # preserve 'prev' (a2) 1823 mov a10, a2 # preserve 'prev' (a2)
1810 mov a13, a3 # and 'next' (a3) 1824 mov a11, a3 # and 'next' (a3)
1811 1825
1812 l32i a4, a2, TASK_THREAD_INFO 1826 l32i a4, a2, TASK_THREAD_INFO
1813 l32i a5, a3, TASK_THREAD_INFO 1827 l32i a5, a3, TASK_THREAD_INFO
1814 1828
1815 save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER 1829 save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1816 1830
1817 s32i a0, a12, THREAD_RA # save return address 1831 s32i a0, a10, THREAD_RA # save return address
1818 s32i a1, a12, THREAD_SP # save stack pointer 1832 s32i a1, a10, THREAD_SP # save stack pointer
1819 1833
1820 /* Disable ints while we manipulate the stack pointer. */ 1834 /* Disable ints while we manipulate the stack pointer. */
1821 1835
1822 movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL 1836 rsil a14, LOCKLEVEL
1823 xsr a14, ps
1824 rsr a3, excsave1 1837 rsr a3, excsave1
1825 rsync 1838 rsync
1826 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */ 1839 s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
@@ -1835,7 +1848,7 @@ ENTRY(_switch_to)
1835 1848
1836 /* Flush register file. */ 1849 /* Flush register file. */
1837 1850
1838 call0 _spill_registers # destroys a3, a4, and SAR 1851 spill_registers_kernel
1839 1852
1840 /* Set kernel stack (and leave critical section) 1853 /* Set kernel stack (and leave critical section)
1841 * Note: It's save to set it here. The stack will not be overwritten 1854 * Note: It's save to set it here. The stack will not be overwritten
@@ -1851,13 +1864,13 @@ ENTRY(_switch_to)
1851 1864
1852 /* restore context of the task 'next' */ 1865 /* restore context of the task 'next' */
1853 1866
1854 l32i a0, a13, THREAD_RA # restore return address 1867 l32i a0, a11, THREAD_RA # restore return address
1855 l32i a1, a13, THREAD_SP # restore stack pointer 1868 l32i a1, a11, THREAD_SP # restore stack pointer
1856 1869
1857 load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER 1870 load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
1858 1871
1859 wsr a14, ps 1872 wsr a14, ps
1860 mov a2, a12 # return 'prev' 1873 mov a2, a10 # return 'prev'
1861 rsync 1874 rsync
1862 1875
1863 retw 1876 retw
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 7d12af1317f1..84fe931bb60e 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -22,6 +22,7 @@
22#include <linux/bootmem.h> 22#include <linux/bootmem.h>
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/percpu.h> 24#include <linux/percpu.h>
25#include <linux/clk-provider.h>
25#include <linux/cpu.h> 26#include <linux/cpu.h>
26#include <linux/of_fdt.h> 27#include <linux/of_fdt.h>
27#include <linux/of_platform.h> 28#include <linux/of_platform.h>
@@ -276,6 +277,7 @@ void __init early_init_devtree(void *params)
276 277
277static int __init xtensa_device_probe(void) 278static int __init xtensa_device_probe(void)
278{ 279{
280 of_clk_init(NULL);
279 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 281 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
280 return 0; 282 return 0;
281} 283}
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 08b769d3b3a1..2a1823de69cc 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -30,6 +30,7 @@
30#include <asm/platform.h> 30#include <asm/platform.h>
31 31
32unsigned long ccount_freq; /* ccount Hz */ 32unsigned long ccount_freq; /* ccount Hz */
33EXPORT_SYMBOL(ccount_freq);
33 34
34static cycle_t ccount_read(struct clocksource *cs) 35static cycle_t ccount_read(struct clocksource *cs)
35{ 36{
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S
index cb8fd44caabc..f9e1ec346e35 100644
--- a/arch/xtensa/kernel/vectors.S
+++ b/arch/xtensa/kernel/vectors.S
@@ -235,7 +235,7 @@ ENTRY(_DoubleExceptionVector)
235 235
236 /* Check for overflow/underflow exception, jump if overflow. */ 236 /* Check for overflow/underflow exception, jump if overflow. */
237 237
238 _bbci.l a0, 6, _DoubleExceptionVector_WindowOverflow 238 bbci.l a0, 6, _DoubleExceptionVector_WindowOverflow
239 239
240 /* 240 /*
241 * Restart window underflow exception. 241 * Restart window underflow exception.
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index 74a60c7e085e..80b33ed51f31 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -122,9 +122,7 @@ EXPORT_SYMBOL(insw);
122EXPORT_SYMBOL(insl); 122EXPORT_SYMBOL(insl);
123 123
124extern long common_exception_return; 124extern long common_exception_return;
125extern long _spill_registers;
126EXPORT_SYMBOL(common_exception_return); 125EXPORT_SYMBOL(common_exception_return);
127EXPORT_SYMBOL(_spill_registers);
128 126
129#ifdef CONFIG_FUNCTION_TRACER 127#ifdef CONFIG_FUNCTION_TRACER
130EXPORT_SYMBOL(_mcount); 128EXPORT_SYMBOL(_mcount);
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index 479d7537a32a..aff108df92d3 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -90,7 +90,7 @@ int __init mem_reserve(unsigned long start, unsigned long end, int must_exist)
90 90
91 91
92/* 92/*
93 * Initialize the bootmem system and give it all the memory we have available. 93 * Initialize the bootmem system and give it all low memory we have available.
94 */ 94 */
95 95
96void __init bootmem_init(void) 96void __init bootmem_init(void)
@@ -142,9 +142,14 @@ void __init bootmem_init(void)
142 142
143 /* Add all remaining memory pieces into the bootmem map */ 143 /* Add all remaining memory pieces into the bootmem map */
144 144
145 for (i=0; i<sysmem.nr_banks; i++) 145 for (i = 0; i < sysmem.nr_banks; i++) {
146 free_bootmem(sysmem.bank[i].start, 146 if (sysmem.bank[i].start >> PAGE_SHIFT < max_low_pfn) {
147 sysmem.bank[i].end - sysmem.bank[i].start); 147 unsigned long end = min(max_low_pfn << PAGE_SHIFT,
148 sysmem.bank[i].end);
149 free_bootmem(sysmem.bank[i].start,
150 end - sysmem.bank[i].start);
151 }
152 }
148 153
149} 154}
150 155
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 36ec171698b8..861203e958da 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -39,7 +39,7 @@ void init_mmu(void)
39 set_itlbcfg_register(0); 39 set_itlbcfg_register(0);
40 set_dtlbcfg_register(0); 40 set_dtlbcfg_register(0);
41#endif 41#endif
42#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF 42#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
43 /* 43 /*
44 * Update the IO area mapping in case xtensa_kio_paddr has changed 44 * Update the IO area mapping in case xtensa_kio_paddr has changed
45 */ 45 */
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index 800227862fe8..57fd08b36f51 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -135,11 +135,11 @@ static void __init update_local_mac(struct device_node *node)
135 135
136static int __init machine_setup(void) 136static int __init machine_setup(void)
137{ 137{
138 struct device_node *serial; 138 struct device_node *clock;
139 struct device_node *eth = NULL; 139 struct device_node *eth = NULL;
140 140
141 for_each_compatible_node(serial, NULL, "ns16550a") 141 for_each_node_by_name(clock, "main-oscillator")
142 update_clock_frequency(serial); 142 update_clock_frequency(clock);
143 143
144 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) 144 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
145 update_local_mac(eth); 145 update_local_mac(eth);
@@ -290,6 +290,7 @@ static int __init xtavnet_init(void)
290 * knows whether they set it correctly on the DIP switches. 290 * knows whether they set it correctly on the DIP switches.
291 */ 291 */
292 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr); 292 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
293 ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
293 294
294 return 0; 295 return 0;
295} 296}
diff --git a/arch/xtensa/variants/fsf/include/variant/tie.h b/arch/xtensa/variants/fsf/include/variant/tie.h
index bf4020116df5..244cdea4dee5 100644
--- a/arch/xtensa/variants/fsf/include/variant/tie.h
+++ b/arch/xtensa/variants/fsf/include/variant/tie.h
@@ -18,13 +18,6 @@
18#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ 18#define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
19#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ 19#define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
20 20
21/* Basic parameters of each coprocessor: */
22#define XCHAL_CP7_NAME "XTIOP"
23#define XCHAL_CP7_IDENT XTIOP
24#define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
25#define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
26#define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
27
28/* Filler info for unassigned coprocessors, to simplify arrays etc: */ 21/* Filler info for unassigned coprocessors, to simplify arrays etc: */
29#define XCHAL_NCP_SA_SIZE 0 22#define XCHAL_NCP_SA_SIZE 0
30#define XCHAL_NCP_SA_ALIGN 1 23#define XCHAL_NCP_SA_ALIGN 1
@@ -42,6 +35,8 @@
42#define XCHAL_CP5_SA_ALIGN 1 35#define XCHAL_CP5_SA_ALIGN 1
43#define XCHAL_CP6_SA_SIZE 0 36#define XCHAL_CP6_SA_SIZE 0
44#define XCHAL_CP6_SA_ALIGN 1 37#define XCHAL_CP6_SA_ALIGN 1
38#define XCHAL_CP7_SA_SIZE 0
39#define XCHAL_CP7_SA_ALIGN 1
45 40
46/* Save area for non-coprocessor optional and custom (TIE) state: */ 41/* Save area for non-coprocessor optional and custom (TIE) state: */
47#define XCHAL_NCP_SA_SIZE 0 42#define XCHAL_NCP_SA_SIZE 0
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 03:16:25 -0500