diff options
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 45dc29f85d56..32b3558321c4 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -208,7 +208,6 @@ __v6_setup: | |||
208 | mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache | 208 | mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache |
209 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache | 209 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache |
210 | mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache | 210 | mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache |
211 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | ||
212 | #ifdef CONFIG_MMU | 211 | #ifdef CONFIG_MMU |
213 | mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs | 212 | mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs |
214 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register | 213 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register |
@@ -218,6 +217,8 @@ __v6_setup: | |||
218 | ALT_UP(orr r8, r8, #TTB_FLAGS_UP) | 217 | ALT_UP(orr r8, r8, #TTB_FLAGS_UP) |
219 | mcr p15, 0, r8, c2, c0, 1 @ load TTB1 | 218 | mcr p15, 0, r8, c2, c0, 1 @ load TTB1 |
220 | #endif /* CONFIG_MMU */ | 219 | #endif /* CONFIG_MMU */ |
220 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer and | ||
221 | @ complete invalidations | ||
221 | adr r5, v6_crval | 222 | adr r5, v6_crval |
222 | ldmia r5, {r5, r6} | 223 | ldmia r5, {r5, r6} |
223 | ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables | 224 | ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables |