diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-02-27 09:58:53 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-27 09:58:53 -0500 |
commit | a3a3c4664184f86ef964323d106c62158e2b3f25 (patch) | |
tree | a9b10a59f5ad8c2ac0196fca9b4e1eeaf75dbb4b /arch | |
parent | 96a3eab338c01e172745b1686c51c1be96ce9ead (diff) | |
parent | 6ea96e111e6a7f06ef62227bf64e8cd65bd705b3 (diff) |
Merge branch 'davinci/cleanups' into next/cleanup
* davinci/cleanups:
ARM: davinci: add back dummy header files
ARM: davinci: dm644x: don't force vpfe registeration on all boards
ARM: davinci: dm644x: fix inconsistent variable naming
ARM: davinci: dm644x: improve readability using macro
ARM: davinci: streamline sysmod access
ARM: davinci: create new common platform header for davinci
ARM: davinci: dm646x: move private definitions to C file
ARM: davinci: dm365: move private definitions to C file
ARM: davinci: dm644x: move private definitions to C file
Conflicts:
arch/arm/mach-davinci/board-dm644x-evm.c
arch/arm/mach-davinci/board-neuros-osd2.c
arch/arm/mach-davinci/board-sffsdr.c
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-davinci/board-dm355-evm.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm355-leopard.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm365-evm.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm644x-evm.c | 28 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm646x-evm.c | 32 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-neuros-osd2.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-sffsdr.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/davinci.h | 96 | ||||
-rw-r--r-- | arch/arm/mach-davinci/devices.c | 32 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm365.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm644x.c | 53 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm355.h | 32 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm365.h | 53 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm644x.h | 47 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/dm646x.h | 42 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/hardware.h | 2 |
18 files changed, 220 insertions, 255 deletions
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index 275341f159fb..82ed753fb360 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -26,13 +26,14 @@ | |||
26 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
28 | 28 | ||
29 | #include <mach/dm355.h> | ||
30 | #include <mach/i2c.h> | 29 | #include <mach/i2c.h> |
31 | #include <mach/serial.h> | 30 | #include <mach/serial.h> |
32 | #include <mach/nand.h> | 31 | #include <mach/nand.h> |
33 | #include <mach/mmc.h> | 32 | #include <mach/mmc.h> |
34 | #include <mach/usb.h> | 33 | #include <mach/usb.h> |
35 | 34 | ||
35 | #include "davinci.h" | ||
36 | |||
36 | /* NOTE: this is geared for the standard config, with a socketed | 37 | /* NOTE: this is geared for the standard config, with a socketed |
37 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | 38 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you |
38 | * swap chips, maybe with a different block size, partitioning may | 39 | * swap chips, maybe with a different block size, partitioning may |
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index e99db28181ae..d74a8b3445fb 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c | |||
@@ -23,13 +23,14 @@ | |||
23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
25 | 25 | ||
26 | #include <mach/dm355.h> | ||
27 | #include <mach/i2c.h> | 26 | #include <mach/i2c.h> |
28 | #include <mach/serial.h> | 27 | #include <mach/serial.h> |
29 | #include <mach/nand.h> | 28 | #include <mach/nand.h> |
30 | #include <mach/mmc.h> | 29 | #include <mach/mmc.h> |
31 | #include <mach/usb.h> | 30 | #include <mach/usb.h> |
32 | 31 | ||
32 | #include "davinci.h" | ||
33 | |||
33 | /* NOTE: this is geared for the standard config, with a socketed | 34 | /* NOTE: this is geared for the standard config, with a socketed |
34 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | 35 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you |
35 | * swap chips, maybe with a different block size, partitioning may | 36 | * swap chips, maybe with a different block size, partitioning may |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 849311d3cb7c..5bce2b83bb4f 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
33 | 33 | ||
34 | #include <mach/mux.h> | 34 | #include <mach/mux.h> |
35 | #include <mach/dm365.h> | ||
36 | #include <mach/common.h> | 35 | #include <mach/common.h> |
37 | #include <mach/i2c.h> | 36 | #include <mach/i2c.h> |
38 | #include <mach/serial.h> | 37 | #include <mach/serial.h> |
@@ -42,6 +41,8 @@ | |||
42 | 41 | ||
43 | #include <media/tvp514x.h> | 42 | #include <media/tvp514x.h> |
44 | 43 | ||
44 | #include "davinci.h" | ||
45 | |||
45 | static inline int have_imager(void) | 46 | static inline int have_imager(void) |
46 | { | 47 | { |
47 | /* REVISIT when it's supported, trigger via Kconfig */ | 48 | /* REVISIT when it's supported, trigger via Kconfig */ |
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 1247ecdcf752..864f676eccac 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | 32 | ||
33 | #include <mach/dm644x.h> | ||
34 | #include <mach/common.h> | 33 | #include <mach/common.h> |
35 | #include <mach/i2c.h> | 34 | #include <mach/i2c.h> |
36 | #include <mach/serial.h> | 35 | #include <mach/serial.h> |
@@ -40,6 +39,8 @@ | |||
40 | #include <mach/usb.h> | 39 | #include <mach/usb.h> |
41 | #include <mach/aemif.h> | 40 | #include <mach/aemif.h> |
42 | 41 | ||
42 | #include "davinci.h" | ||
43 | |||
43 | #define DM644X_EVM_PHY_ID "davinci_mdio-0:01" | 44 | #define DM644X_EVM_PHY_ID "davinci_mdio-0:01" |
44 | #define LXT971_PHY_ID (0x001378e2) | 45 | #define LXT971_PHY_ID (0x001378e2) |
45 | #define LXT971_PHY_MASK (0xfffffff0) | 46 | #define LXT971_PHY_MASK (0xfffffff0) |
@@ -189,7 +190,7 @@ static struct platform_device davinci_fb_device = { | |||
189 | .num_resources = 0, | 190 | .num_resources = 0, |
190 | }; | 191 | }; |
191 | 192 | ||
192 | static struct tvp514x_platform_data tvp5146_pdata = { | 193 | static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = { |
193 | .clk_polarity = 0, | 194 | .clk_polarity = 0, |
194 | .hs_polarity = 1, | 195 | .hs_polarity = 1, |
195 | .vs_polarity = 1 | 196 | .vs_polarity = 1 |
@@ -197,7 +198,7 @@ static struct tvp514x_platform_data tvp5146_pdata = { | |||
197 | 198 | ||
198 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | 199 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) |
199 | /* Inputs available at the TVP5146 */ | 200 | /* Inputs available at the TVP5146 */ |
200 | static struct v4l2_input tvp5146_inputs[] = { | 201 | static struct v4l2_input dm644xevm_tvp5146_inputs[] = { |
201 | { | 202 | { |
202 | .index = 0, | 203 | .index = 0, |
203 | .name = "Composite", | 204 | .name = "Composite", |
@@ -217,7 +218,7 @@ static struct v4l2_input tvp5146_inputs[] = { | |||
217 | * ouput that goes to vpfe. There is a one to one correspondence | 218 | * ouput that goes to vpfe. There is a one to one correspondence |
218 | * with tvp5146_inputs | 219 | * with tvp5146_inputs |
219 | */ | 220 | */ |
220 | static struct vpfe_route tvp5146_routes[] = { | 221 | static struct vpfe_route dm644xevm_tvp5146_routes[] = { |
221 | { | 222 | { |
222 | .input = INPUT_CVBS_VI2B, | 223 | .input = INPUT_CVBS_VI2B, |
223 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | 224 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, |
@@ -228,13 +229,13 @@ static struct vpfe_route tvp5146_routes[] = { | |||
228 | }, | 229 | }, |
229 | }; | 230 | }; |
230 | 231 | ||
231 | static struct vpfe_subdev_info vpfe_sub_devs[] = { | 232 | static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = { |
232 | { | 233 | { |
233 | .name = "tvp5146", | 234 | .name = "tvp5146", |
234 | .grp_id = 0, | 235 | .grp_id = 0, |
235 | .num_inputs = ARRAY_SIZE(tvp5146_inputs), | 236 | .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs), |
236 | .inputs = tvp5146_inputs, | 237 | .inputs = dm644xevm_tvp5146_inputs, |
237 | .routes = tvp5146_routes, | 238 | .routes = dm644xevm_tvp5146_routes, |
238 | .can_route = 1, | 239 | .can_route = 1, |
239 | .ccdc_if_params = { | 240 | .ccdc_if_params = { |
240 | .if_type = VPFE_BT656, | 241 | .if_type = VPFE_BT656, |
@@ -243,15 +244,15 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { | |||
243 | }, | 244 | }, |
244 | .board_info = { | 245 | .board_info = { |
245 | I2C_BOARD_INFO("tvp5146", 0x5d), | 246 | I2C_BOARD_INFO("tvp5146", 0x5d), |
246 | .platform_data = &tvp5146_pdata, | 247 | .platform_data = &dm644xevm_tvp5146_pdata, |
247 | }, | 248 | }, |
248 | }, | 249 | }, |
249 | }; | 250 | }; |
250 | 251 | ||
251 | static struct vpfe_config vpfe_cfg = { | 252 | static struct vpfe_config dm644xevm_capture_cfg = { |
252 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | 253 | .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs), |
253 | .i2c_adapter_id = 1, | 254 | .i2c_adapter_id = 1, |
254 | .sub_devs = vpfe_sub_devs, | 255 | .sub_devs = dm644xevm_vpfe_sub_devs, |
255 | .card_name = "DM6446 EVM", | 256 | .card_name = "DM6446 EVM", |
256 | .ccdc = "DM6446 CCDC", | 257 | .ccdc = "DM6446 CCDC", |
257 | }; | 258 | }; |
@@ -624,8 +625,6 @@ static struct davinci_uart_config uart_config __initdata = { | |||
624 | static void __init | 625 | static void __init |
625 | davinci_evm_map_io(void) | 626 | davinci_evm_map_io(void) |
626 | { | 627 | { |
627 | /* setup input configuration for VPFE input devices */ | ||
628 | dm644x_set_vpfe_config(&vpfe_cfg); | ||
629 | dm644x_init(); | 628 | dm644x_init(); |
630 | } | 629 | } |
631 | 630 | ||
@@ -697,6 +696,7 @@ static __init void davinci_evm_init(void) | |||
697 | evm_init_i2c(); | 696 | evm_init_i2c(); |
698 | 697 | ||
699 | davinci_setup_mmc(0, &dm6446evm_mmc_config); | 698 | davinci_setup_mmc(0, &dm6446evm_mmc_config); |
699 | dm644x_init_video(&dm644xevm_capture_cfg); | ||
700 | 700 | ||
701 | davinci_serial_init(&uart_config); | 701 | davinci_serial_init(&uart_config); |
702 | dm644x_init_asp(&dm644x_evm_snd_data); | 702 | dm644x_init_asp(&dm644x_evm_snd_data); |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 872ac69fa049..d72ab948d630 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
38 | 38 | ||
39 | #include <mach/dm646x.h> | ||
40 | #include <mach/common.h> | 39 | #include <mach/common.h> |
41 | #include <mach/serial.h> | 40 | #include <mach/serial.h> |
42 | #include <mach/i2c.h> | 41 | #include <mach/i2c.h> |
@@ -45,6 +44,7 @@ | |||
45 | #include <mach/cdce949.h> | 44 | #include <mach/cdce949.h> |
46 | #include <mach/aemif.h> | 45 | #include <mach/aemif.h> |
47 | 46 | ||
47 | #include "davinci.h" | ||
48 | #include "clock.h" | 48 | #include "clock.h" |
49 | 49 | ||
50 | #define NAND_BLOCK_SIZE SZ_128K | 50 | #define NAND_BLOCK_SIZE SZ_128K |
@@ -410,8 +410,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
410 | .bus_delay = 0 /* usec */, | 410 | .bus_delay = 0 /* usec */, |
411 | }; | 411 | }; |
412 | 412 | ||
413 | #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) | ||
414 | #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) | ||
415 | #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) | 413 | #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) |
416 | #define VCH2CLK_SYSCLK8 (BIT(9)) | 414 | #define VCH2CLK_SYSCLK8 (BIT(9)) |
417 | #define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) | 415 | #define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) |
@@ -429,8 +427,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
429 | #define TVP5147_CH0 "tvp514x-0" | 427 | #define TVP5147_CH0 "tvp514x-0" |
430 | #define TVP5147_CH1 "tvp514x-1" | 428 | #define TVP5147_CH1 "tvp514x-1" |
431 | 429 | ||
432 | static void __iomem *vpif_vidclkctl_reg; | ||
433 | static void __iomem *vpif_vsclkdis_reg; | ||
434 | /* spin lock for updating above registers */ | 430 | /* spin lock for updating above registers */ |
435 | static spinlock_t vpif_reg_lock; | 431 | static spinlock_t vpif_reg_lock; |
436 | 432 | ||
@@ -441,14 +437,14 @@ static int set_vpif_clock(int mux_mode, int hd) | |||
441 | int val = 0; | 437 | int val = 0; |
442 | int err = 0; | 438 | int err = 0; |
443 | 439 | ||
444 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client) | 440 | if (!cpld_client) |
445 | return -ENXIO; | 441 | return -ENXIO; |
446 | 442 | ||
447 | /* disable the clock */ | 443 | /* disable the clock */ |
448 | spin_lock_irqsave(&vpif_reg_lock, flags); | 444 | spin_lock_irqsave(&vpif_reg_lock, flags); |
449 | value = __raw_readl(vpif_vsclkdis_reg); | 445 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
450 | value |= (VIDCH3CLK | VIDCH2CLK); | 446 | value |= (VIDCH3CLK | VIDCH2CLK); |
451 | __raw_writel(value, vpif_vsclkdis_reg); | 447 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
452 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 448 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
453 | 449 | ||
454 | val = i2c_smbus_read_byte(cpld_client); | 450 | val = i2c_smbus_read_byte(cpld_client); |
@@ -464,7 +460,7 @@ static int set_vpif_clock(int mux_mode, int hd) | |||
464 | if (err) | 460 | if (err) |
465 | return err; | 461 | return err; |
466 | 462 | ||
467 | value = __raw_readl(vpif_vidclkctl_reg); | 463 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
468 | value &= ~(VCH2CLK_MASK); | 464 | value &= ~(VCH2CLK_MASK); |
469 | value &= ~(VCH3CLK_MASK); | 465 | value &= ~(VCH3CLK_MASK); |
470 | 466 | ||
@@ -473,13 +469,13 @@ static int set_vpif_clock(int mux_mode, int hd) | |||
473 | else | 469 | else |
474 | value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK); | 470 | value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK); |
475 | 471 | ||
476 | __raw_writel(value, vpif_vidclkctl_reg); | 472 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
477 | 473 | ||
478 | spin_lock_irqsave(&vpif_reg_lock, flags); | 474 | spin_lock_irqsave(&vpif_reg_lock, flags); |
479 | value = __raw_readl(vpif_vsclkdis_reg); | 475 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
480 | /* enable the clock */ | 476 | /* enable the clock */ |
481 | value &= ~(VIDCH3CLK | VIDCH2CLK); | 477 | value &= ~(VIDCH3CLK | VIDCH2CLK); |
482 | __raw_writel(value, vpif_vsclkdis_reg); | 478 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
483 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 479 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
484 | 480 | ||
485 | return 0; | 481 | return 0; |
@@ -564,7 +560,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
564 | int val; | 560 | int val; |
565 | u32 value; | 561 | u32 value; |
566 | 562 | ||
567 | if (!vpif_vidclkctl_reg || !cpld_client) | 563 | if (!cpld_client) |
568 | return -ENXIO; | 564 | return -ENXIO; |
569 | 565 | ||
570 | val = i2c_smbus_read_byte(cpld_client); | 566 | val = i2c_smbus_read_byte(cpld_client); |
@@ -572,7 +568,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
572 | return val; | 568 | return val; |
573 | 569 | ||
574 | spin_lock_irqsave(&vpif_reg_lock, flags); | 570 | spin_lock_irqsave(&vpif_reg_lock, flags); |
575 | value = __raw_readl(vpif_vidclkctl_reg); | 571 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
576 | if (mux_mode) { | 572 | if (mux_mode) { |
577 | val &= VPIF_INPUT_TWO_CHANNEL; | 573 | val &= VPIF_INPUT_TWO_CHANNEL; |
578 | value |= VIDCH1CLK; | 574 | value |= VIDCH1CLK; |
@@ -580,7 +576,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
580 | val |= VPIF_INPUT_ONE_CHANNEL; | 576 | val |= VPIF_INPUT_ONE_CHANNEL; |
581 | value &= ~VIDCH1CLK; | 577 | value &= ~VIDCH1CLK; |
582 | } | 578 | } |
583 | __raw_writel(value, vpif_vidclkctl_reg); | 579 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
584 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 580 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
585 | 581 | ||
586 | err = i2c_smbus_write_byte(cpld_client, val); | 582 | err = i2c_smbus_write_byte(cpld_client, val); |
@@ -674,12 +670,6 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = { | |||
674 | 670 | ||
675 | static void __init evm_init_video(void) | 671 | static void __init evm_init_video(void) |
676 | { | 672 | { |
677 | vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4); | ||
678 | vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4); | ||
679 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) { | ||
680 | pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n"); | ||
681 | return; | ||
682 | } | ||
683 | spin_lock_init(&vpif_reg_lock); | 673 | spin_lock_init(&vpif_reg_lock); |
684 | 674 | ||
685 | dm646x_setup_vpif(&dm646x_vpif_display_config, | 675 | dm646x_setup_vpif(&dm646x_vpif_display_config, |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 8d34f513d415..a772bb45570a 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | 32 | ||
33 | #include <mach/dm644x.h> | ||
34 | #include <mach/common.h> | 33 | #include <mach/common.h> |
35 | #include <mach/i2c.h> | 34 | #include <mach/i2c.h> |
36 | #include <mach/serial.h> | 35 | #include <mach/serial.h> |
@@ -39,6 +38,8 @@ | |||
39 | #include <mach/mmc.h> | 38 | #include <mach/mmc.h> |
40 | #include <mach/usb.h> | 39 | #include <mach/usb.h> |
41 | 40 | ||
41 | #include "davinci.h" | ||
42 | |||
42 | #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01" | 43 | #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01" |
43 | #define LXT971_PHY_ID 0x001378e2 | 44 | #define LXT971_PHY_ID 0x001378e2 |
44 | #define LXT971_PHY_MASK 0xfffffff0 | 45 | #define LXT971_PHY_MASK 0xfffffff0 |
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 31da3c5b2ba3..76e675096104 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c | |||
@@ -35,13 +35,14 @@ | |||
35 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
36 | #include <asm/mach/flash.h> | 36 | #include <asm/mach/flash.h> |
37 | 37 | ||
38 | #include <mach/dm644x.h> | ||
39 | #include <mach/common.h> | 38 | #include <mach/common.h> |
40 | #include <mach/i2c.h> | 39 | #include <mach/i2c.h> |
41 | #include <mach/serial.h> | 40 | #include <mach/serial.h> |
42 | #include <mach/mux.h> | 41 | #include <mach/mux.h> |
43 | #include <mach/usb.h> | 42 | #include <mach/usb.h> |
44 | 43 | ||
44 | #include "davinci.h" | ||
45 | |||
45 | #define SFFSDR_PHY_ID "davinci_mdio-0:01" | 46 | #define SFFSDR_PHY_ID "davinci_mdio-0:01" |
46 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { | 47 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { |
47 | /* U-Boot Environment: Block 0 | 48 | /* U-Boot Environment: Block 0 |
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h new file mode 100644 index 000000000000..9d708034b57f --- /dev/null +++ b/arch/arm/mach-davinci/davinci.h | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * This file contains the processor specific definitions | ||
3 | * of the TI DM644x, DM355, DM365, and DM646x. | ||
4 | * | ||
5 | * Copyright (C) 2011 Texas Instruments Incorporated | ||
6 | * Copyright (c) 2007 Deep Root Systems, LLC | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation version 2. | ||
11 | * | ||
12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
13 | * kind, whether express or implied; without even the implied warranty | ||
14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | */ | ||
17 | #ifndef __DAVINCI_H | ||
18 | #define __DAVINCI_H | ||
19 | |||
20 | #include <linux/clk.h> | ||
21 | #include <linux/videodev2.h> | ||
22 | #include <linux/davinci_emac.h> | ||
23 | #include <linux/platform_device.h> | ||
24 | #include <linux/spi/spi.h> | ||
25 | |||
26 | #include <mach/asp.h> | ||
27 | #include <mach/keyscan.h> | ||
28 | #include <mach/hardware.h> | ||
29 | |||
30 | #include <media/davinci/vpfe_capture.h> | ||
31 | #include <media/davinci/vpif_types.h> | ||
32 | |||
33 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000 | ||
34 | #define SYSMOD_VIDCLKCTL 0x38 | ||
35 | #define SYSMOD_VDD3P3VPWDN 0x48 | ||
36 | #define SYSMOD_VSCLKDIS 0x6c | ||
37 | #define SYSMOD_PUPDCTL1 0x7c | ||
38 | |||
39 | extern void __iomem *davinci_sysmod_base; | ||
40 | #define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x)) | ||
41 | void davinci_map_sysmod(void); | ||
42 | |||
43 | /* DM355 base addresses */ | ||
44 | #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000 | ||
45 | #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
46 | |||
47 | #define ASP1_TX_EVT_EN 1 | ||
48 | #define ASP1_RX_EVT_EN 2 | ||
49 | |||
50 | /* DM365 base addresses */ | ||
51 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 | ||
52 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
53 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
54 | |||
55 | /* DM644x base addresses */ | ||
56 | #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000 | ||
57 | #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
58 | #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
59 | #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
60 | #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
61 | |||
62 | /* DM646x base addresses */ | ||
63 | #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 | ||
64 | #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 | ||
65 | |||
66 | /* DM355 function declarations */ | ||
67 | void __init dm355_init(void); | ||
68 | void dm355_init_spi0(unsigned chipselect_mask, | ||
69 | struct spi_board_info *info, unsigned len); | ||
70 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); | ||
71 | void dm355_set_vpfe_config(struct vpfe_config *cfg); | ||
72 | |||
73 | /* DM365 function declarations */ | ||
74 | void __init dm365_init(void); | ||
75 | void __init dm365_init_asp(struct snd_platform_data *pdata); | ||
76 | void __init dm365_init_vc(struct snd_platform_data *pdata); | ||
77 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); | ||
78 | void __init dm365_init_rtc(void); | ||
79 | void dm365_init_spi0(unsigned chipselect_mask, | ||
80 | struct spi_board_info *info, unsigned len); | ||
81 | void dm365_set_vpfe_config(struct vpfe_config *cfg); | ||
82 | |||
83 | /* DM644x function declarations */ | ||
84 | void __init dm644x_init(void); | ||
85 | void __init dm644x_init_asp(struct snd_platform_data *pdata); | ||
86 | int __init dm644x_init_video(struct vpfe_config *); | ||
87 | |||
88 | /* DM646x function declarations */ | ||
89 | void __init dm646x_init(void); | ||
90 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); | ||
91 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); | ||
92 | int __init dm646x_init_edma(struct edma_rsv_info *rsv); | ||
93 | void dm646x_video_init(void); | ||
94 | void dm646x_setup_vpif(struct vpif_display_config *, | ||
95 | struct vpif_capture_config *); | ||
96 | #endif /*__DAVINCI_H */ | ||
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 50c0156b4262..d2f9666284a7 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <mach/mmc.h> | 23 | #include <mach/mmc.h> |
24 | #include <mach/time.h> | 24 | #include <mach/time.h> |
25 | 25 | ||
26 | #include "davinci.h" | ||
26 | #include "clock.h" | 27 | #include "clock.h" |
27 | 28 | ||
28 | #define DAVINCI_I2C_BASE 0x01C21000 | 29 | #define DAVINCI_I2C_BASE 0x01C21000 |
@@ -33,8 +34,19 @@ | |||
33 | #define DM365_MMCSD0_BASE 0x01D11000 | 34 | #define DM365_MMCSD0_BASE 0x01D11000 |
34 | #define DM365_MMCSD1_BASE 0x01D00000 | 35 | #define DM365_MMCSD1_BASE 0x01D00000 |
35 | 36 | ||
36 | /* System control register offsets */ | 37 | void __iomem *davinci_sysmod_base; |
37 | #define DM64XX_VDD3P3V_PWDN 0x48 | 38 | |
39 | void davinci_map_sysmod(void) | ||
40 | { | ||
41 | davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE, | ||
42 | 0x800); | ||
43 | /* | ||
44 | * Throw a bug since a lot of board initialization code depends | ||
45 | * on system module availability. ioremap() failing this early | ||
46 | * need careful looking into anyway. | ||
47 | */ | ||
48 | BUG_ON(!davinci_sysmod_base); | ||
49 | } | ||
38 | 50 | ||
39 | static struct resource i2c_resources[] = { | 51 | static struct resource i2c_resources[] = { |
40 | { | 52 | { |
@@ -212,12 +224,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
212 | davinci_cfg_reg(DM355_SD1_DATA2); | 224 | davinci_cfg_reg(DM355_SD1_DATA2); |
213 | davinci_cfg_reg(DM355_SD1_DATA3); | 225 | davinci_cfg_reg(DM355_SD1_DATA3); |
214 | } else if (cpu_is_davinci_dm365()) { | 226 | } else if (cpu_is_davinci_dm365()) { |
215 | void __iomem *pupdctl1 = | ||
216 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c); | ||
217 | |||
218 | /* Configure pull down control */ | 227 | /* Configure pull down control */ |
219 | __raw_writel((__raw_readl(pupdctl1) & ~0xfc0), | 228 | unsigned v; |
220 | pupdctl1); | 229 | |
230 | v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); | ||
231 | __raw_writel(v & ~0xfc0, | ||
232 | DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); | ||
221 | 233 | ||
222 | mmcsd1_resources[0].start = DM365_MMCSD1_BASE; | 234 | mmcsd1_resources[0].start = DM365_MMCSD1_BASE; |
223 | mmcsd1_resources[0].end = DM365_MMCSD1_BASE + | 235 | mmcsd1_resources[0].end = DM365_MMCSD1_BASE + |
@@ -246,11 +258,9 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
246 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; | 258 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; |
247 | } else if (cpu_is_davinci_dm644x()) { | 259 | } else if (cpu_is_davinci_dm644x()) { |
248 | /* REVISIT: should this be in board-init code? */ | 260 | /* REVISIT: should this be in board-init code? */ |
249 | void __iomem *base = | ||
250 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
251 | |||
252 | /* Power-on 3.3V IO cells */ | 261 | /* Power-on 3.3V IO cells */ |
253 | __raw_writel(0, base + DM64XX_VDD3P3V_PWDN); | 262 | __raw_writel(0, |
263 | DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); | ||
254 | /*Set up the pull regiter for MMC */ | 264 | /*Set up the pull regiter for MMC */ |
255 | davinci_cfg_reg(DM644X_MSTK); | 265 | davinci_cfg_reg(DM644X_MSTK); |
256 | } | 266 | } |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 19667cfc5de0..fd3d09aa6cde 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -18,7 +18,6 @@ | |||
18 | 18 | ||
19 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
20 | 20 | ||
21 | #include <mach/dm355.h> | ||
22 | #include <mach/cputype.h> | 21 | #include <mach/cputype.h> |
23 | #include <mach/edma.h> | 22 | #include <mach/edma.h> |
24 | #include <mach/psc.h> | 23 | #include <mach/psc.h> |
@@ -31,6 +30,7 @@ | |||
31 | #include <mach/spi.h> | 30 | #include <mach/spi.h> |
32 | #include <mach/gpio-davinci.h> | 31 | #include <mach/gpio-davinci.h> |
33 | 32 | ||
33 | #include "davinci.h" | ||
34 | #include "clock.h" | 34 | #include "clock.h" |
35 | #include "mux.h" | 35 | #include "mux.h" |
36 | 36 | ||
@@ -871,6 +871,7 @@ void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) | |||
871 | void __init dm355_init(void) | 871 | void __init dm355_init(void) |
872 | { | 872 | { |
873 | davinci_common_init(&davinci_soc_info_dm355); | 873 | davinci_common_init(&davinci_soc_info_dm355); |
874 | davinci_map_sysmod(); | ||
874 | } | 875 | } |
875 | 876 | ||
876 | static int __init dm355_init_devices(void) | 877 | static int __init dm355_init_devices(void) |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index f15b435cc655..1a2e953082b3 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -21,7 +21,6 @@ | |||
21 | 21 | ||
22 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
23 | 23 | ||
24 | #include <mach/dm365.h> | ||
25 | #include <mach/cputype.h> | 24 | #include <mach/cputype.h> |
26 | #include <mach/edma.h> | 25 | #include <mach/edma.h> |
27 | #include <mach/psc.h> | 26 | #include <mach/psc.h> |
@@ -35,11 +34,28 @@ | |||
35 | #include <mach/spi.h> | 34 | #include <mach/spi.h> |
36 | #include <mach/gpio-davinci.h> | 35 | #include <mach/gpio-davinci.h> |
37 | 36 | ||
37 | #include "davinci.h" | ||
38 | #include "clock.h" | 38 | #include "clock.h" |
39 | #include "mux.h" | 39 | #include "mux.h" |
40 | 40 | ||
41 | #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ | 41 | #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ |
42 | 42 | ||
43 | /* Base of key scan register bank */ | ||
44 | #define DM365_KEYSCAN_BASE 0x01c69400 | ||
45 | |||
46 | #define DM365_RTC_BASE 0x01c69000 | ||
47 | |||
48 | #define DAVINCI_DM365_VC_BASE 0x01d0c000 | ||
49 | #define DAVINCI_DMA_VC_TX 2 | ||
50 | #define DAVINCI_DMA_VC_RX 3 | ||
51 | |||
52 | #define DM365_EMAC_BASE 0x01d07000 | ||
53 | #define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) | ||
54 | #define DM365_EMAC_CNTRL_OFFSET 0x0000 | ||
55 | #define DM365_EMAC_CNTRL_MOD_OFFSET 0x3000 | ||
56 | #define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 | ||
57 | #define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
58 | |||
43 | static struct pll_data pll1_data = { | 59 | static struct pll_data pll1_data = { |
44 | .num = 1, | 60 | .num = 1, |
45 | .phys_base = DAVINCI_PLL1_BASE, | 61 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -1122,6 +1138,7 @@ void __init dm365_init_rtc(void) | |||
1122 | void __init dm365_init(void) | 1138 | void __init dm365_init(void) |
1123 | { | 1139 | { |
1124 | davinci_common_init(&davinci_soc_info_dm365); | 1140 | davinci_common_init(&davinci_soc_info_dm365); |
1141 | davinci_map_sysmod(); | ||
1125 | } | 1142 | } |
1126 | 1143 | ||
1127 | static struct resource dm365_vpss_resources[] = { | 1144 | static struct resource dm365_vpss_resources[] = { |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 43a48ee1917b..23e81cafba8d 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -15,7 +15,6 @@ | |||
15 | 15 | ||
16 | #include <asm/mach/map.h> | 16 | #include <asm/mach/map.h> |
17 | 17 | ||
18 | #include <mach/dm644x.h> | ||
19 | #include <mach/cputype.h> | 18 | #include <mach/cputype.h> |
20 | #include <mach/edma.h> | 19 | #include <mach/edma.h> |
21 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
@@ -27,6 +26,7 @@ | |||
27 | #include <mach/asp.h> | 26 | #include <mach/asp.h> |
28 | #include <mach/gpio-davinci.h> | 27 | #include <mach/gpio-davinci.h> |
29 | 28 | ||
29 | #include "davinci.h" | ||
30 | #include "clock.h" | 30 | #include "clock.h" |
31 | #include "mux.h" | 31 | #include "mux.h" |
32 | 32 | ||
@@ -35,6 +35,13 @@ | |||
35 | */ | 35 | */ |
36 | #define DM644X_REF_FREQ 27000000 | 36 | #define DM644X_REF_FREQ 27000000 |
37 | 37 | ||
38 | #define DM644X_EMAC_BASE 0x01c80000 | ||
39 | #define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000) | ||
40 | #define DM644X_EMAC_CNTRL_OFFSET 0x0000 | ||
41 | #define DM644X_EMAC_CNTRL_MOD_OFFSET 0x1000 | ||
42 | #define DM644X_EMAC_CNTRL_RAM_OFFSET 0x2000 | ||
43 | #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
44 | |||
38 | static struct pll_data pll1_data = { | 45 | static struct pll_data pll1_data = { |
39 | .num = 1, | 46 | .num = 1, |
40 | .phys_base = DAVINCI_PLL1_BASE, | 47 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -587,13 +594,15 @@ static struct platform_device dm644x_asp_device = { | |||
587 | .resource = dm644x_asp_resources, | 594 | .resource = dm644x_asp_resources, |
588 | }; | 595 | }; |
589 | 596 | ||
597 | #define DM644X_VPSS_BASE 0x01c73400 | ||
598 | |||
590 | static struct resource dm644x_vpss_resources[] = { | 599 | static struct resource dm644x_vpss_resources[] = { |
591 | { | 600 | { |
592 | /* VPSS Base address */ | 601 | /* VPSS Base address */ |
593 | .name = "vpss", | 602 | .name = "vpss", |
594 | .start = 0x01c73400, | 603 | .start = DM644X_VPSS_BASE, |
595 | .end = 0x01c73400 + 0xff, | 604 | .end = DM644X_VPSS_BASE + 0xff, |
596 | .flags = IORESOURCE_MEM, | 605 | .flags = IORESOURCE_MEM, |
597 | }, | 606 | }, |
598 | }; | 607 | }; |
599 | 608 | ||
@@ -605,7 +614,7 @@ static struct platform_device dm644x_vpss_device = { | |||
605 | .resource = dm644x_vpss_resources, | 614 | .resource = dm644x_vpss_resources, |
606 | }; | 615 | }; |
607 | 616 | ||
608 | static struct resource vpfe_resources[] = { | 617 | static struct resource dm644x_vpfe_resources[] = { |
609 | { | 618 | { |
610 | .start = IRQ_VDINT0, | 619 | .start = IRQ_VDINT0, |
611 | .end = IRQ_VDINT0, | 620 | .end = IRQ_VDINT0, |
@@ -639,22 +648,17 @@ static struct platform_device dm644x_ccdc_dev = { | |||
639 | }, | 648 | }, |
640 | }; | 649 | }; |
641 | 650 | ||
642 | static struct platform_device vpfe_capture_dev = { | 651 | static struct platform_device dm644x_vpfe_dev = { |
643 | .name = CAPTURE_DRV_NAME, | 652 | .name = CAPTURE_DRV_NAME, |
644 | .id = -1, | 653 | .id = -1, |
645 | .num_resources = ARRAY_SIZE(vpfe_resources), | 654 | .num_resources = ARRAY_SIZE(dm644x_vpfe_resources), |
646 | .resource = vpfe_resources, | 655 | .resource = dm644x_vpfe_resources, |
647 | .dev = { | 656 | .dev = { |
648 | .dma_mask = &vpfe_capture_dma_mask, | 657 | .dma_mask = &vpfe_capture_dma_mask, |
649 | .coherent_dma_mask = DMA_BIT_MASK(32), | 658 | .coherent_dma_mask = DMA_BIT_MASK(32), |
650 | }, | 659 | }, |
651 | }; | 660 | }; |
652 | 661 | ||
653 | void dm644x_set_vpfe_config(struct vpfe_config *cfg) | ||
654 | { | ||
655 | vpfe_capture_dev.dev.platform_data = cfg; | ||
656 | } | ||
657 | |||
658 | /*----------------------------------------------------------------------*/ | 662 | /*----------------------------------------------------------------------*/ |
659 | 663 | ||
660 | static struct map_desc dm644x_io_desc[] = { | 664 | static struct map_desc dm644x_io_desc[] = { |
@@ -779,16 +783,29 @@ void __init dm644x_init_asp(struct snd_platform_data *pdata) | |||
779 | void __init dm644x_init(void) | 783 | void __init dm644x_init(void) |
780 | { | 784 | { |
781 | davinci_common_init(&davinci_soc_info_dm644x); | 785 | davinci_common_init(&davinci_soc_info_dm644x); |
786 | davinci_map_sysmod(); | ||
782 | } | 787 | } |
783 | 788 | ||
784 | static int __init dm644x_init_devices(void) | 789 | int __init dm644x_init_video(struct vpfe_config *vpfe_cfg) |
785 | { | 790 | { |
786 | if (!cpu_is_davinci_dm644x()) | 791 | dm644x_vpfe_dev.dev.platform_data = vpfe_cfg; |
787 | return 0; | ||
788 | 792 | ||
789 | /* Add ccdc clock aliases */ | 793 | /* Add ccdc clock aliases */ |
790 | clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); | 794 | clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); |
791 | clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); | 795 | clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); |
796 | |||
797 | platform_device_register(&dm644x_vpss_device); | ||
798 | platform_device_register(&dm644x_ccdc_dev); | ||
799 | platform_device_register(&dm644x_vpfe_dev); | ||
800 | |||
801 | return 0; | ||
802 | } | ||
803 | |||
804 | static int __init dm644x_init_devices(void) | ||
805 | { | ||
806 | if (!cpu_is_davinci_dm644x()) | ||
807 | return 0; | ||
808 | |||
792 | platform_device_register(&dm644x_edma_device); | 809 | platform_device_register(&dm644x_edma_device); |
793 | 810 | ||
794 | platform_device_register(&dm644x_mdio_device); | 811 | platform_device_register(&dm644x_mdio_device); |
@@ -796,10 +813,6 @@ static int __init dm644x_init_devices(void) | |||
796 | clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev), | 813 | clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev), |
797 | NULL, &dm644x_emac_device.dev); | 814 | NULL, &dm644x_emac_device.dev); |
798 | 815 | ||
799 | platform_device_register(&dm644x_vpss_device); | ||
800 | platform_device_register(&dm644x_ccdc_dev); | ||
801 | platform_device_register(&vpfe_capture_dev); | ||
802 | |||
803 | return 0; | 816 | return 0; |
804 | } | 817 | } |
805 | postcore_initcall(dm644x_init_devices); | 818 | postcore_initcall(dm644x_init_devices); |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 00f774394b16..9eb87c1d1edd 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
18 | 18 | ||
19 | #include <mach/dm646x.h> | ||
20 | #include <mach/cputype.h> | 19 | #include <mach/cputype.h> |
21 | #include <mach/edma.h> | 20 | #include <mach/edma.h> |
22 | #include <mach/irqs.h> | 21 | #include <mach/irqs.h> |
@@ -28,12 +27,11 @@ | |||
28 | #include <mach/asp.h> | 27 | #include <mach/asp.h> |
29 | #include <mach/gpio-davinci.h> | 28 | #include <mach/gpio-davinci.h> |
30 | 29 | ||
30 | #include "davinci.h" | ||
31 | #include "clock.h" | 31 | #include "clock.h" |
32 | #include "mux.h" | 32 | #include "mux.h" |
33 | 33 | ||
34 | #define DAVINCI_VPIF_BASE (0x01C12000) | 34 | #define DAVINCI_VPIF_BASE (0x01C12000) |
35 | #define VDD3P3V_PWDN_OFFSET (0x48) | ||
36 | #define VSCLKDIS_OFFSET (0x6C) | ||
37 | 35 | ||
38 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ | 36 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ |
39 | BIT_MASK(0)) | 37 | BIT_MASK(0)) |
@@ -46,6 +44,13 @@ | |||
46 | #define DM646X_REF_FREQ 27000000 | 44 | #define DM646X_REF_FREQ 27000000 |
47 | #define DM646X_AUX_FREQ 24000000 | 45 | #define DM646X_AUX_FREQ 24000000 |
48 | 46 | ||
47 | #define DM646X_EMAC_BASE 0x01c80000 | ||
48 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | ||
49 | #define DM646X_EMAC_CNTRL_OFFSET 0x0000 | ||
50 | #define DM646X_EMAC_CNTRL_MOD_OFFSET 0x1000 | ||
51 | #define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000 | ||
52 | #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
53 | |||
49 | static struct pll_data pll1_data = { | 54 | static struct pll_data pll1_data = { |
50 | .num = 1, | 55 | .num = 1, |
51 | .phys_base = DAVINCI_PLL1_BASE, | 56 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -873,15 +878,14 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config, | |||
873 | struct vpif_capture_config *capture_config) | 878 | struct vpif_capture_config *capture_config) |
874 | { | 879 | { |
875 | unsigned int value; | 880 | unsigned int value; |
876 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
877 | 881 | ||
878 | value = __raw_readl(base + VSCLKDIS_OFFSET); | 882 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
879 | value &= ~VSCLKDIS_MASK; | 883 | value &= ~VSCLKDIS_MASK; |
880 | __raw_writel(value, base + VSCLKDIS_OFFSET); | 884 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
881 | 885 | ||
882 | value = __raw_readl(base + VDD3P3V_PWDN_OFFSET); | 886 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); |
883 | value &= ~VDD3P3V_VID_MASK; | 887 | value &= ~VDD3P3V_VID_MASK; |
884 | __raw_writel(value, base + VDD3P3V_PWDN_OFFSET); | 888 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); |
885 | 889 | ||
886 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); | 890 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); |
887 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); | 891 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); |
@@ -905,6 +909,7 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv) | |||
905 | void __init dm646x_init(void) | 909 | void __init dm646x_init(void) |
906 | { | 910 | { |
907 | davinci_common_init(&davinci_soc_info_dm646x); | 911 | davinci_common_init(&davinci_soc_info_dm646x); |
912 | davinci_map_sysmod(); | ||
908 | } | 913 | } |
909 | 914 | ||
910 | static int __init dm646x_init_devices(void) | 915 | static int __init dm646x_init_devices(void) |
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h deleted file mode 100644 index 36dff4a0ce3f..000000000000 --- a/arch/arm/mach-davinci/include/mach/dm355.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Chip specific defines for DM355 SoC | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_DM355_H | ||
12 | #define __ASM_ARCH_DM355_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/asp.h> | ||
16 | #include <media/davinci/vpfe_capture.h> | ||
17 | |||
18 | #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01E10000 | ||
19 | #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
20 | |||
21 | #define ASP1_TX_EVT_EN 1 | ||
22 | #define ASP1_RX_EVT_EN 2 | ||
23 | |||
24 | struct spi_board_info; | ||
25 | |||
26 | void __init dm355_init(void); | ||
27 | void dm355_init_spi0(unsigned chipselect_mask, | ||
28 | struct spi_board_info *info, unsigned len); | ||
29 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); | ||
30 | void dm355_set_vpfe_config(struct vpfe_config *cfg); | ||
31 | |||
32 | #endif /* __ASM_ARCH_DM355_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index 2563bf4e93a1..b9bf3d6a4423 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h | |||
@@ -1,52 +1 @@ | |||
1 | /* | /* empty, remove once unused */ | |
2 | * Copyright (C) 2009 Texas Instruments Incorporated | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation version 2. | ||
7 | * | ||
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
9 | * kind, whether express or implied; without even the implied warranty | ||
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | */ | ||
13 | #ifndef __ASM_ARCH_DM365_H | ||
14 | #define __ASM_ARCH_DM665_H | ||
15 | |||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/davinci_emac.h> | ||
18 | #include <mach/hardware.h> | ||
19 | #include <mach/asp.h> | ||
20 | #include <mach/keyscan.h> | ||
21 | #include <media/davinci/vpfe_capture.h> | ||
22 | |||
23 | #define DM365_EMAC_BASE (0x01D07000) | ||
24 | #define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) | ||
25 | #define DM365_EMAC_CNTRL_OFFSET (0x0000) | ||
26 | #define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) | ||
27 | #define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) | ||
28 | #define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
29 | |||
30 | /* Base of key scan register bank */ | ||
31 | #define DM365_KEYSCAN_BASE (0x01C69400) | ||
32 | |||
33 | #define DM365_RTC_BASE (0x01C69000) | ||
34 | |||
35 | #define DAVINCI_DM365_VC_BASE (0x01D0C000) | ||
36 | #define DAVINCI_DMA_VC_TX 2 | ||
37 | #define DAVINCI_DMA_VC_RX 3 | ||
38 | |||
39 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01D10000 | ||
40 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
41 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
42 | |||
43 | void __init dm365_init(void); | ||
44 | void __init dm365_init_asp(struct snd_platform_data *pdata); | ||
45 | void __init dm365_init_vc(struct snd_platform_data *pdata); | ||
46 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); | ||
47 | void __init dm365_init_rtc(void); | ||
48 | void dm365_init_spi0(unsigned chipselect_mask, | ||
49 | struct spi_board_info *info, unsigned len); | ||
50 | |||
51 | void dm365_set_vpfe_config(struct vpfe_config *cfg); | ||
52 | #endif /* __ASM_ARCH_DM365_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h deleted file mode 100644 index 5a1b26d4e68b..000000000000 --- a/arch/arm/mach-davinci/include/mach/dm644x.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * This file contains the processor specific definitions | ||
3 | * of the TI DM644x. | ||
4 | * | ||
5 | * Copyright (C) 2008 Texas Instruments. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | */ | ||
22 | #ifndef __ASM_ARCH_DM644X_H | ||
23 | #define __ASM_ARCH_DM644X_H | ||
24 | |||
25 | #include <linux/davinci_emac.h> | ||
26 | #include <mach/hardware.h> | ||
27 | #include <mach/asp.h> | ||
28 | #include <media/davinci/vpfe_capture.h> | ||
29 | |||
30 | #define DM644X_EMAC_BASE (0x01C80000) | ||
31 | #define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000) | ||
32 | #define DM644X_EMAC_CNTRL_OFFSET (0x0000) | ||
33 | #define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000) | ||
34 | #define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000) | ||
35 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
36 | |||
37 | #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000 | ||
38 | #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
39 | #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
40 | #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
41 | #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
42 | |||
43 | void __init dm644x_init(void); | ||
44 | void __init dm644x_init_asp(struct snd_platform_data *pdata); | ||
45 | void dm644x_set_vpfe_config(struct vpfe_config *cfg); | ||
46 | |||
47 | #endif /* __ASM_ARCH_DM644X_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index a8ee6c9f0bb0..b9bf3d6a4423 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h | |||
@@ -1,41 +1 @@ | |||
1 | /* | /* empty, remove once unused */ | |
2 | * Chip specific defines for DM646x SoC | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_DM646X_H | ||
12 | #define __ASM_ARCH_DM646X_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/asp.h> | ||
16 | #include <linux/i2c.h> | ||
17 | #include <linux/videodev2.h> | ||
18 | #include <linux/davinci_emac.h> | ||
19 | #include <media/davinci/vpif_types.h> | ||
20 | |||
21 | #define DM646X_EMAC_BASE (0x01C80000) | ||
22 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | ||
23 | #define DM646X_EMAC_CNTRL_OFFSET (0x0000) | ||
24 | #define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000) | ||
25 | #define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000) | ||
26 | #define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
27 | |||
28 | #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 | ||
29 | #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 | ||
30 | |||
31 | void __init dm646x_init(void); | ||
32 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); | ||
33 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); | ||
34 | int __init dm646x_init_edma(struct edma_rsv_info *rsv); | ||
35 | |||
36 | void dm646x_video_init(void); | ||
37 | |||
38 | void dm646x_setup_vpif(struct vpif_display_config *, | ||
39 | struct vpif_capture_config *); | ||
40 | |||
41 | #endif /* __ASM_ARCH_DM646X_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index 414e0b93e741..0209b1fc22a1 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h | |||
@@ -19,8 +19,6 @@ | |||
19 | * and the chip/board init code should then explicitly include | 19 | * and the chip/board init code should then explicitly include |
20 | * <chipname>.h | 20 | * <chipname>.h |
21 | */ | 21 | */ |
22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 | ||
23 | |||
24 | /* | 22 | /* |
25 | * I/O mapping | 23 | * I/O mapping |
26 | */ | 24 | */ |