diff options
Diffstat (limited to 'arch/arm/mach-davinci/dm646x.c')
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 00f774394b16..9eb87c1d1edd 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
18 | 18 | ||
19 | #include <mach/dm646x.h> | ||
20 | #include <mach/cputype.h> | 19 | #include <mach/cputype.h> |
21 | #include <mach/edma.h> | 20 | #include <mach/edma.h> |
22 | #include <mach/irqs.h> | 21 | #include <mach/irqs.h> |
@@ -28,12 +27,11 @@ | |||
28 | #include <mach/asp.h> | 27 | #include <mach/asp.h> |
29 | #include <mach/gpio-davinci.h> | 28 | #include <mach/gpio-davinci.h> |
30 | 29 | ||
30 | #include "davinci.h" | ||
31 | #include "clock.h" | 31 | #include "clock.h" |
32 | #include "mux.h" | 32 | #include "mux.h" |
33 | 33 | ||
34 | #define DAVINCI_VPIF_BASE (0x01C12000) | 34 | #define DAVINCI_VPIF_BASE (0x01C12000) |
35 | #define VDD3P3V_PWDN_OFFSET (0x48) | ||
36 | #define VSCLKDIS_OFFSET (0x6C) | ||
37 | 35 | ||
38 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ | 36 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ |
39 | BIT_MASK(0)) | 37 | BIT_MASK(0)) |
@@ -46,6 +44,13 @@ | |||
46 | #define DM646X_REF_FREQ 27000000 | 44 | #define DM646X_REF_FREQ 27000000 |
47 | #define DM646X_AUX_FREQ 24000000 | 45 | #define DM646X_AUX_FREQ 24000000 |
48 | 46 | ||
47 | #define DM646X_EMAC_BASE 0x01c80000 | ||
48 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | ||
49 | #define DM646X_EMAC_CNTRL_OFFSET 0x0000 | ||
50 | #define DM646X_EMAC_CNTRL_MOD_OFFSET 0x1000 | ||
51 | #define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000 | ||
52 | #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
53 | |||
49 | static struct pll_data pll1_data = { | 54 | static struct pll_data pll1_data = { |
50 | .num = 1, | 55 | .num = 1, |
51 | .phys_base = DAVINCI_PLL1_BASE, | 56 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -873,15 +878,14 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config, | |||
873 | struct vpif_capture_config *capture_config) | 878 | struct vpif_capture_config *capture_config) |
874 | { | 879 | { |
875 | unsigned int value; | 880 | unsigned int value; |
876 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
877 | 881 | ||
878 | value = __raw_readl(base + VSCLKDIS_OFFSET); | 882 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
879 | value &= ~VSCLKDIS_MASK; | 883 | value &= ~VSCLKDIS_MASK; |
880 | __raw_writel(value, base + VSCLKDIS_OFFSET); | 884 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
881 | 885 | ||
882 | value = __raw_readl(base + VDD3P3V_PWDN_OFFSET); | 886 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); |
883 | value &= ~VDD3P3V_VID_MASK; | 887 | value &= ~VDD3P3V_VID_MASK; |
884 | __raw_writel(value, base + VDD3P3V_PWDN_OFFSET); | 888 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); |
885 | 889 | ||
886 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); | 890 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); |
887 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); | 891 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); |
@@ -905,6 +909,7 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv) | |||
905 | void __init dm646x_init(void) | 909 | void __init dm646x_init(void) |
906 | { | 910 | { |
907 | davinci_common_init(&davinci_soc_info_dm646x); | 911 | davinci_common_init(&davinci_soc_info_dm646x); |
912 | davinci_map_sysmod(); | ||
908 | } | 913 | } |
909 | 914 | ||
910 | static int __init dm646x_init_devices(void) | 915 | static int __init dm646x_init_devices(void) |