Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into rmobile-latest

Conflicts:
	arch/arm/mach-shmobile/Makefile

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1951 files changed, 38534 insertions, 33000 deletions

diff --git a/arch/Kconfig b/arch/Kconfig
index 4b0669cbb3b0..2505740b81d2 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -30,6 +30,10 @@ config OPROFILE_EVENT_MULTIPLEX
 config HAVE_OPROFILE
         bool
 
+config OPROFILE_NMI_TIMER
+        def_bool y
+        depends on PERF_EVENTS && HAVE_PERF_EVENTS_NMI
+
 config KPROBES
         bool "Kprobes"
         depends on MODULES
diff --git a/arch/alpha/include/asm/ipcbuf.h b/arch/alpha/include/asm/ipcbuf.h
index d9c0e1a50702..84c7e51cb6d0 100644
--- a/arch/alpha/include/asm/ipcbuf.h
+++ b/arch/alpha/include/asm/ipcbuf.h
@@ -1,28 +1 @@
-#ifndef _ALPHA_IPCBUF_H
-#define _ALPHA_IPCBUF_H
-
-/* 
- * The ipc64_perm structure for alpha architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t  key;
-        __kernel_uid_t  uid;
-        __kernel_gid_t  gid;
-        __kernel_uid_t  cuid;
-        __kernel_gid_t  cgid;
-        __kernel_mode_t mode; 
-        unsigned short  seq;
-        unsigned short  __pad1;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-
-#endif /* _ALPHA_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/alpha/include/asm/socket.h b/arch/alpha/include/asm/socket.h
index 06edfefc3373..082355f159e6 100644
--- a/arch/alpha/include/asm/socket.h
+++ b/arch/alpha/include/asm/socket.h
@@ -69,6 +69,9 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/alpha/include/asm/thread_info.h b/arch/alpha/include/asm/thread_info.h
index ff73db022342..28335bd40e40 100644
--- a/arch/alpha/include/asm/thread_info.h
+++ b/arch/alpha/include/asm/thread_info.h
@@ -79,7 +79,6 @@ register struct thread_info *__current_thread_info __asm__("$8");
 #define TIF_UAC_SIGBUS          12      /* ! userspace part of 'osf_sysinfo' */
 #define TIF_MEMDIE              13      /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     14      /* restore signal mask in do_signal */
-#define TIF_FREEZE              16      /* is freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
@@ -87,7 +86,6 @@ register struct thread_info *__current_thread_info __asm__("$8");
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 /* Work to do on interrupt/exception return.  */
 #define _TIF_WORK_MASK          (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
diff --git a/arch/alpha/include/asm/types.h b/arch/alpha/include/asm/types.h
index 881544339c21..0a0579076f4a 100644
--- a/arch/alpha/include/asm/types.h
+++ b/arch/alpha/include/asm/types.h
@@ -15,9 +15,4 @@
 #include <asm-generic/int-l64.h>
 #endif
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned int umode_t;
-
-#endif /* __ASSEMBLY__ */
 #endif /* _ALPHA_TYPES_H */
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983f..f72e1707d463 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -220,8 +220,9 @@ config NEED_MACH_MEMORY_H
           be avoided when possible.
 
 config PHYS_OFFSET
-        hex "Physical address of main memory"
+        hex "Physical address of main memory" if MMU
         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
+        default DRAM_BASE if !MMU
         help
           Please provide the physical address corresponding to the
           location of main memory in your system.
@@ -257,6 +258,7 @@ config ARCH_INTEGRATOR
         select ARCH_HAS_CPUFREQ
         select CLKDEV_LOOKUP
         select HAVE_MACH_CLKDEV
+        select HAVE_TCM
         select ICST
         select GENERIC_CLOCKEVENTS
         select PLAT_VERSATILE
@@ -340,10 +342,12 @@ config ARCH_HIGHBANK
         select ARM_AMBA
         select ARM_GIC
         select ARM_TIMER_SP804
+        select CACHE_L2X0
         select CLKDEV_LOOKUP
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU
+        select HAVE_SMP
         select USE_OF
         help
           Support for the Calxeda Highbank SoC based boards.
@@ -361,6 +365,7 @@ config ARCH_CNS3XXX
         select CPU_V6K
         select GENERIC_CLOCKEVENTS
         select ARM_GIC
+        select MIGHT_HAVE_CACHE_L2X0
         select MIGHT_HAVE_PCI
         select PCI_DOMAINS if PCI
         help
@@ -381,6 +386,7 @@ config ARCH_PRIMA2
         select GENERIC_CLOCKEVENTS
         select CLKDEV_LOOKUP
         select GENERIC_IRQ_CHIP
+        select MIGHT_HAVE_CACHE_L2X0
         select USE_OF
         select ZONE_DMA
         help
@@ -633,6 +639,8 @@ config ARCH_TEGRA
         select GENERIC_GPIO
         select HAVE_CLK
         select HAVE_SCHED_CLOCK
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_HAS_CPUFREQ
         help
           This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -702,7 +710,9 @@ config ARCH_SHMOBILE
         select HAVE_CLK
         select CLKDEV_LOOKUP
         select HAVE_MACH_CLKDEV
+        select HAVE_SMP
         select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
         select NO_IOPORT
         select SPARSE_IRQ
         select MULTI_IRQ_HANDLER
@@ -867,16 +877,6 @@ config ARCH_SHARK
           Support for the StrongARM based Digital DNARD machine, also known
           as "Shark" (<http://www.shark-linux.de/shark.html>).
 
-config ARCH_TCC_926
-        bool "Telechips TCC ARM926-based systems"
-        select CLKSRC_MMIO
-        select CPU_ARM926T
-        select HAVE_CLK
-        select CLKDEV_LOOKUP
-        select GENERIC_CLOCKEVENTS
-        help
-          Support for Telechips TCC ARM926-based systems.
-
 config ARCH_U300
         bool "ST-Ericsson U300 Series"
         depends on MMU
@@ -904,6 +904,8 @@ config ARCH_U8500
         select CLKDEV_LOOKUP
         select ARCH_REQUIRE_GPIOLIB
         select ARCH_HAS_CPUFREQ
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Support for ST-Ericsson's Ux500 architecture
 
@@ -914,6 +916,7 @@ config ARCH_NOMADIK
         select CPU_ARM926T
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_REQUIRE_GPIOLIB
         help
           Support for the Nomadik platform by ST-Ericsson
@@ -973,6 +976,7 @@ config ARCH_ZYNQ
         select ARM_GIC
         select ARM_AMBA
         select ICST
+        select MIGHT_HAVE_CACHE_L2X0
         select USE_OF
         help
           Support for Xilinx Zynq ARM Cortex A9 Platform
@@ -1059,8 +1063,6 @@ source "arch/arm/plat-s5p/Kconfig"
 
 source "arch/arm/plat-spear/Kconfig"
 
-source "arch/arm/plat-tcc/Kconfig"
-
 if ARCH_S3C2410
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-s3c2412/Kconfig"
@@ -1125,6 +1127,11 @@ config ARM_TIMER_SP804
 
 source arch/arm/mm/Kconfig
 
+config ARM_NR_BANKS
+        int
+        default 16 if ARCH_EP93XX
+        default 8
+
 config IWMMXT
         bool "Enable iWMMXt support"
         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
@@ -1133,10 +1140,9 @@ config IWMMXT
           Enable support for iWMMXt context switching at run time if
           running on a CPU that supports it.
 
-#  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
 config XSCALE_PMU
         bool
-        depends on CPU_XSCALE && !XSCALE_PMU_TIMER
+        depends on CPU_XSCALE
         default y
 
 config CPU_HAS_PMU
@@ -1231,7 +1237,7 @@ config ARM_ERRATA_742231
           capabilities of the processor.
 
 config PL310_ERRATA_588369
-        bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
+        bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
         depends on CACHE_L2X0
         help
            The PL310 L2 cache controller implements three types of Clean &
@@ -1245,7 +1251,7 @@ config PL310_ERRATA_588369
 
 config ARM_ERRATA_720789
         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
         help
           This option enables the workaround for the 720789 Cortex-A9 (prior to
           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
@@ -1256,7 +1262,7 @@ config ARM_ERRATA_720789
           entries regardless of the ASID.
 
 config PL310_ERRATA_727915
-        bool "Background Clean & Invalidate by Way operation can cause data corruption"
+        bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
         depends on CACHE_L2X0
         help
           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
@@ -1281,7 +1287,7 @@ config ARM_ERRATA_743622
 
 config ARM_ERRATA_751472
         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
         help
           This option enables the workaround for the 751472 Cortex-A9 (prior
           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
@@ -1289,8 +1295,8 @@ config ARM_ERRATA_751472
           operation is received by a CPU before the ICIALLUIS has completed,
           potentially leading to corrupted entries in the cache or TLB.
 
-config ARM_ERRATA_753970
-        bool "ARM errata: cache sync operation may be faulty"
+config PL310_ERRATA_753970
+        bool "PL310 errata: cache sync operation may be faulty"
         depends on CACHE_PL310
         help
           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
@@ -1352,6 +1358,18 @@ config ARM_ERRATA_764369
           relevant cache maintenance functions and sets a specific bit
           in the diagnostic control register of the SCU.
 
+config PL310_ERRATA_769419
+        bool "PL310 errata: no automatic Store Buffer drain"
+        depends on CACHE_L2X0
+        help
+          On revisions of the PL310 prior to r3p2, the Store Buffer does
+          not automatically drain. This can cause normal, non-cacheable
+          writes to be retained when the memory system is idle, leading
+          to suboptimal I/O performance for drivers using coherent DMA.
+          This option adds a write barrier to the cpu_idle loop so that,
+          on systems with an outer cache, the store buffer is drained
+          explicitly.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
@@ -1422,14 +1440,20 @@ menu "Kernel Features"
 
 source "kernel/time/Kconfig"
 
+config HAVE_SMP
+        bool
+        help
+          This option should be selected by machines which have an SMP-
+          capable CPU.
+
+          The only effect of this option is to make the SMP-related
+          options available to the user for configuration.
+
 config SMP
         bool "Symmetric Multi-Processing"
         depends on CPU_V6K || CPU_V7
         depends on GENERIC_CLOCKEVENTS
-        depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
-                 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
-                 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
+        depends on HAVE_SMP
         depends on MMU
         select USE_GENERIC_SMP_HELPERS
         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1547,6 +1571,16 @@ config LOCAL_TIMERS
           accounting to be spread across the timer interval, preventing a
           "thundering herd" at every timer tick.
 
+config ARCH_NR_GPIO
+        int
+        default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
+        default 350 if ARCH_U8500
+        default 0
+        help
+          Maximum number of GPIOs in the system.
+
+          If unsure, leave the default value.
+
 source kernel/Kconfig.preempt
 
 config HZ
@@ -1959,7 +1993,7 @@ endchoice
 
 config XIP_KERNEL
         bool "Kernel Execute-In-Place from ROM"
-        depends on !ZBOOT_ROM
+        depends on !ZBOOT_ROM && !ARM_LPAE
         help
           Execute-In-Place allows the kernel to run from non-volatile storage
           directly addressable by the CPU, such as NOR flash. This saves RAM
@@ -1989,7 +2023,7 @@ config XIP_PHYS_ADDR
 
 config KEXEC
         bool "Kexec system call (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
         help
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dfcf3b033e10..40319d91bb7f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4)		:= exynos
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
 machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
-machine-$(CONFIG_ARCH_TCC8K)            := tcc8k
 machine-$(CONFIG_ARCH_TEGRA)            := tegra
 machine-$(CONFIG_ARCH_U300)             := u300
 machine-$(CONFIG_ARCH_U8500)            := ux500
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ)		:= zynq
 plat-$(CONFIG_ARCH_MXC)         := mxc
 plat-$(CONFIG_ARCH_OMAP)        := omap
 plat-$(CONFIG_ARCH_S3C64XX)     := samsung
-plat-$(CONFIG_ARCH_TCC_926)     := tcc
 plat-$(CONFIG_ARCH_ZYNQ)        := versatile
 plat-$(CONFIG_PLAT_IOP)         := iop
 plat-$(CONFIG_PLAT_NOMADIK)     := nomadik
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 176062ac7f07..5df26a9976a2 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -65,6 +65,8 @@ $(obj)/%.dtb: $(src)/dts/%.dts
 
 $(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
 
+clean-files := *.dtb
+
 quiet_cmd_uimage = UIMAGE  $@
       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \
                    -C none -a $(LOADADDR) -e $(STARTADDR) \
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 21f56ff32797..cf0a64ce4b83 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj)
 asflags-y := -Wa,-march=all
 
 # Supply kernel BSS size to the decompressor via a linker symbol.
-KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}')
+KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
+                awk 'END{print $$3}')
 LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
 # Supply ZRELADDR to the decompressor via a linker symbol.
 ifneq ($(CONFIG_AUTO_ZRELADDR),y)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index c2effc917254..c5d60250d43d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -659,6 +659,7 @@ __armv7_mmu_cache_on:
                 mcrne   p15, 0, r3, c2, c0, 0   @ load page table pointer
                 mcrne   p15, 0, r1, c3, c0, 0   @ load domain access control
 #endif
+                mcr     p15, 0, r0, c7, c5, 4   @ ISB
                 mcr     p15, 0, r0, c1, c0, 0   @ load control register
                 mrc     p15, 0, r0, c1, c0, 0   @ and read it back
                 mov     r0, #0
diff --git a/arch/arm/boot/dts/testcases/tests-phandle.dtsi b/arch/arm/boot/dts/testcases/tests-phandle.dtsi
new file mode 100644
index 000000000000..ec0c4e6212c9
--- /dev/null
+++ b/arch/arm/boot/dts/testcases/tests-phandle.dtsi
@@ -0,0 +1,37 @@
+
+/ {
+        testcase-data {
+                phandle-tests {
+                        provider0: provider0 {
+                                #phandle-cells = <0>;
+                        };
+
+                        provider1: provider1 {
+                                #phandle-cells = <1>;
+                        };
+
+                        provider2: provider2 {
+                                #phandle-cells = <2>;
+                        };
+
+                        provider3: provider3 {
+                                #phandle-cells = <3>;
+                        };
+
+                        consumer-a {
+                                phandle-list =  <&provider1 1>,
+                                                <&provider2 2 0>,
+                                                <0>,
+                                                <&provider3 4 4 3>,
+                                                <&provider2 5 100>,
+                                                <&provider0>,
+                                                <&provider1 7>;
+                                phandle-list-names = "first", "second", "third";
+
+                                phandle-list-bad-phandle = <12345678 0 0>;
+                                phandle-list-bad-args = <&provider2 1 0>,
+                                                        <&provider3 0>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/testcases/tests.dtsi b/arch/arm/boot/dts/testcases/tests.dtsi
new file mode 100644
index 000000000000..a7c5067622e8
--- /dev/null
+++ b/arch/arm/boot/dts/testcases/tests.dtsi
@@ -0,0 +1 @@
+/include/ "tests-phandle.dtsi"
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
index 8a614e398004..166461073b78 100644
--- a/arch/arm/boot/dts/versatile-pb.dts
+++ b/arch/arm/boot/dts/versatile-pb.dts
@@ -46,3 +46,5 @@
                 };
         };
 };
+
+/include/ "testcases/tests.dtsi"
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 74df9ca2be31..81a933eb0903 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,8 +1,14 @@
 config ARM_GIC
         select IRQ_DOMAIN
+        select MULTI_IRQ_HANDLER
+        bool
+
+config GIC_NON_BANKED
         bool
 
 config ARM_VIC
+        select IRQ_DOMAIN
+        select MULTI_IRQ_HANDLER
         bool
 
 config ARM_VIC_NR
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0e6ae470c94f..b2dc2dd7f1df 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -40,13 +40,36 @@
 #include <linux/slab.h>
 
 #include <asm/irq.h>
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/gic.h>
 
-static DEFINE_RAW_SPINLOCK(irq_controller_lock);
+union gic_base {
+        void __iomem *common_base;
+        void __percpu __iomem **percpu_base;
+};
+
+struct gic_chip_data {
+        unsigned int irq_offset;
+        union gic_base dist_base;
+        union gic_base cpu_base;
+#ifdef CONFIG_CPU_PM
+        u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
+        u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
+        u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
+        u32 __percpu *saved_ppi_enable;
+        u32 __percpu *saved_ppi_conf;
+#endif
+#ifdef CONFIG_IRQ_DOMAIN
+        struct irq_domain domain;
+#endif
+        unsigned int gic_irqs;
+#ifdef CONFIG_GIC_NON_BANKED
+        void __iomem *(*get_base)(union gic_base *);
+#endif
+};
 
-/* Address of GIC 0 CPU interface */
-void __iomem *gic_cpu_base_addr __read_mostly;
+static DEFINE_RAW_SPINLOCK(irq_controller_lock);
 
 /*
  * Supported arch specific GIC irq extension.
@@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = {
 
 static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
 
+#ifdef CONFIG_GIC_NON_BANKED
+static void __iomem *gic_get_percpu_base(union gic_base *base)
+{
+        return *__this_cpu_ptr(base->percpu_base);
+}
+
+static void __iomem *gic_get_common_base(union gic_base *base)
+{
+        return base->common_base;
+}
+
+static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data)
+{
+        return data->get_base(&data->dist_base);
+}
+
+static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data)
+{
+        return data->get_base(&data->cpu_base);
+}
+
+static inline void gic_set_base_accessor(struct gic_chip_data *data,
+                                         void __iomem *(*f)(union gic_base *))
+{
+        data->get_base = f;
+}
+#else
+#define gic_data_dist_base(d)   ((d)->dist_base.common_base)
+#define gic_data_cpu_base(d)    ((d)->cpu_base.common_base)
+#define gic_set_base_accessor(d,f)
+#endif
+
 static inline void __iomem *gic_dist_base(struct irq_data *d)
 {
         struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
-        return gic_data->dist_base;
+        return gic_data_dist_base(gic_data);
 }
 
 static inline void __iomem *gic_cpu_base(struct irq_data *d)
 {
         struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
-        return gic_data->cpu_base;
+        return gic_data_cpu_base(gic_data);
 }
 
 static inline unsigned int gic_irq(struct irq_data *d)
@@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
 #define gic_set_wake    NULL
 #endif
 
+asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
+{
+        u32 irqstat, irqnr;
+        struct gic_chip_data *gic = &gic_data[0];
+        void __iomem *cpu_base = gic_data_cpu_base(gic);
+
+        do {
+                irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
+                irqnr = irqstat & ~0x1c00;
+
+                if (likely(irqnr > 15 && irqnr < 1021)) {
+                        irqnr = irq_domain_to_irq(&gic->domain, irqnr);
+                        handle_IRQ(irqnr, regs);
+                        continue;
+                }
+                if (irqnr < 16) {
+                        writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
+#ifdef CONFIG_SMP
+                        handle_IPI(irqnr, regs);
+#endif
+                        continue;
+                }
+                break;
+        } while (1);
+}
+
 static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
         struct gic_chip_data *chip_data = irq_get_handler_data(irq);
@@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
         chained_irq_enter(chip, desc);
 
         raw_spin_lock(&irq_controller_lock);
-        status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK);
+        status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK);
         raw_spin_unlock(&irq_controller_lock);
 
         gic_irq = (status & 0x3ff);
@@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
         u32 cpumask;
         unsigned int gic_irqs = gic->gic_irqs;
         struct irq_domain *domain = &gic->domain;
-        void __iomem *base = gic->dist_base;
+        void __iomem *base = gic_data_dist_base(gic);
         u32 cpu = 0;
 
 #ifdef CONFIG_SMP
@@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
 
 static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
 {
-        void __iomem *dist_base = gic->dist_base;
-        void __iomem *base = gic->cpu_base;
+        void __iomem *dist_base = gic_data_dist_base(gic);
+        void __iomem *base = gic_data_cpu_base(gic);
         int i;
 
         /*
@@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr)
                 BUG();
 
         gic_irqs = gic_data[gic_nr].gic_irqs;
-        dist_base = gic_data[gic_nr].dist_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
 
         if (!dist_base)
                 return;
@@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr)
                 BUG();
 
         gic_irqs = gic_data[gic_nr].gic_irqs;
-        dist_base = gic_data[gic_nr].dist_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
 
         if (!dist_base)
                 return;
@@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr)
         if (gic_nr >= MAX_GIC_NR)
                 BUG();
 
-        dist_base = gic_data[gic_nr].dist_base;
-        cpu_base = gic_data[gic_nr].cpu_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
+        cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
 
         if (!dist_base || !cpu_base)
                 return;
@@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr)
         if (gic_nr >= MAX_GIC_NR)
                 BUG();
 
-        dist_base = gic_data[gic_nr].dist_base;
-        cpu_base = gic_data[gic_nr].cpu_base;
+        dist_base = gic_data_dist_base(&gic_data[gic_nr]);
+        cpu_base = gic_data_cpu_base(&gic_data[gic_nr]);
 
         if (!dist_base || !cpu_base)
                 return;
@@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd,	void *v)
         int i;
 
         for (i = 0; i < MAX_GIC_NR; i++) {
+#ifdef CONFIG_GIC_NON_BANKED
+                /* Skip over unused GICs */
+                if (!gic_data[i].get_base)
+                        continue;
+#endif
                 switch (cmd) {
                 case CPU_PM_ENTER:
                         gic_cpu_save(i);
@@ -526,7 +612,8 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
                 sizeof(u32));
         BUG_ON(!gic->saved_ppi_conf);
 
-        cpu_pm_register_notifier(&gic_notifier_block);
+        if (gic == &gic_data[0])
+                cpu_pm_register_notifier(&gic_notifier_block);
 }
 #else
 static void __init gic_pm_init(struct gic_chip_data *gic)
@@ -563,8 +650,9 @@ const struct irq_domain_ops gic_irq_domain_ops = {
 #endif
 };
 
-void __init gic_init(unsigned int gic_nr, int irq_start,
-        void __iomem *dist_base, void __iomem *cpu_base)
+void __init gic_init_bases(unsigned int gic_nr, int irq_start,
+                           void __iomem *dist_base, void __iomem *cpu_base,
+                           u32 percpu_offset)
 {
         struct gic_chip_data *gic;
         struct irq_domain *domain;
@@ -574,26 +662,55 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
 
         gic = &gic_data[gic_nr];
         domain = &gic->domain;
-        gic->dist_base = dist_base;
-        gic->cpu_base = cpu_base;
+#ifdef CONFIG_GIC_NON_BANKED
+        if (percpu_offset) { /* Frankein-GIC without banked registers... */
+                unsigned int cpu;
+
+                gic->dist_base.percpu_base = alloc_percpu(void __iomem *);
+                gic->cpu_base.percpu_base = alloc_percpu(void __iomem *);
+                if (WARN_ON(!gic->dist_base.percpu_base ||
+                            !gic->cpu_base.percpu_base)) {
+                        free_percpu(gic->dist_base.percpu_base);
+                        free_percpu(gic->cpu_base.percpu_base);
+                        return;
+                }
+
+                for_each_possible_cpu(cpu) {
+                        unsigned long offset = percpu_offset * cpu_logical_map(cpu);
+                        *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset;
+                        *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset;
+                }
+
+                gic_set_base_accessor(gic, gic_get_percpu_base);
+        } else
+#endif
+        {                       /* Normal, sane GIC... */
+                WARN(percpu_offset,
+                     "GIC_NON_BANKED not enabled, ignoring %08x offset!",
+                     percpu_offset);
+                gic->dist_base.common_base = dist_base;
+                gic->cpu_base.common_base = cpu_base;
+                gic_set_base_accessor(gic, gic_get_common_base);
+        }
 
         /*
          * For primary GICs, skip over SGIs.
          * For secondary GICs, skip over PPIs, too.
          */
+        domain->hwirq_base = 32;
         if (gic_nr == 0) {
-                gic_cpu_base_addr = cpu_base;
-                domain->hwirq_base = 16;
-                if (irq_start > 0)
-                        irq_start = (irq_start & ~31) + 16;
-        } else
-                domain->hwirq_base = 32;
+                if ((irq_start & 31) > 0) {
+                        domain->hwirq_base = 16;
+                        if (irq_start != -1)
+                                irq_start = (irq_start & ~31) + 16;
+                }
+        }
 
         /*
          * Find out how many interrupts are supported.
          * The GIC only supports up to 1020 interrupt sources.
          */
-        gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f;
+        gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f;
         gic_irqs = (gic_irqs + 1) * 32;
         if (gic_irqs > 1020)
                 gic_irqs = 1020;
@@ -641,7 +758,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
         dsb();
 
         /* this always happens on GIC0 */
-        writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
+        writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
 }
 #endif
 
@@ -652,6 +769,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
 {
         void __iomem *cpu_base;
         void __iomem *dist_base;
+        u32 percpu_offset;
         int irq;
         struct irq_domain *domain = &gic_data[gic_cnt].domain;
 
@@ -664,9 +782,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
         cpu_base = of_iomap(node, 1);
         WARN(!cpu_base, "unable to map gic cpu registers\n");
 
+        if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
+                percpu_offset = 0;
+
         domain->of_node = of_node_get(node);
 
-        gic_init(gic_cnt, -1, dist_base, cpu_base);
+        gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
 
         if (parent) {
                 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 7129cfbdacd6..d8e44a43047c 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -221,17 +221,6 @@
  */
 #define MCODE_BUFF_PER_REQ      256
 
-/*
- * Mark a _pl330_req as free.
- * We do it by writing DMAEND as the first instruction
- * because no valid request is going to have DMAEND as
- * its first instruction to execute.
- */
-#define MARK_FREE(req)  do { \
-                                _emit_END(0, (req)->mc_cpu); \
-                                (req)->mc_len = 0; \
-                        } while (0)
-
 /* If the _pl330_req is available to the client */
 #define IS_FREE(req)    (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
 
@@ -301,8 +290,10 @@ struct pl330_thread {
         struct pl330_dmac *dmac;
         /* Only two at a time */
         struct _pl330_req req[2];
-        /* Index of the last submitted request */
+        /* Index of the last enqueued request */
         unsigned lstenq;
+        /* Index of the last submitted request or -1 if the DMA is stopped */
+        int req_running;
 };
 
 enum pl330_dmac_state {
@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
         writel(0, regs + DBGCMD);
 }
 
+/*
+ * Mark a _pl330_req as free.
+ * We do it by writing DMAEND as the first instruction
+ * because no valid request is going to have DMAEND as
+ * its first instruction to execute.
+ */
+static void mark_free(struct pl330_thread *thrd, int idx)
+{
+        struct _pl330_req *req = &thrd->req[idx];
+
+        _emit_END(0, req->mc_cpu);
+        req->mc_len = 0;
+
+        thrd->req_running = -1;
+}
+
 static inline u32 _state(struct pl330_thread *thrd)
 {
         void __iomem *regs = thrd->dmac->pinfo->base;
@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
         }
 }
 
-/* If the request 'req' of thread 'thrd' is currently active */
-static inline bool _req_active(struct pl330_thread *thrd,
-                struct _pl330_req *req)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
-
-        if (IS_FREE(req))
-                return false;
-
-        return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
-}
-
-/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
-static inline unsigned _thrd_active(struct pl330_thread *thrd)
-{
-        if (_req_active(thrd, &thrd->req[0]))
-                return 1; /* First req active */
-
-        if (_req_active(thrd, &thrd->req[1]))
-                return 2; /* Second req active */
-
-        return 0;
-}
-
 static void _stop(struct pl330_thread *thrd)
 {
         void __iomem *regs = thrd->dmac->pinfo->base;
@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
         struct _arg_GO go;
         unsigned ns;
         u8 insn[6] = {0, 0, 0, 0, 0, 0};
+        int idx;
 
         /* Return if already ACTIVE */
         if (_state(thrd) != PL330_STATE_STOPPED)
                 return true;
 
-        if (!IS_FREE(&thrd->req[1 - thrd->lstenq]))
-                req = &thrd->req[1 - thrd->lstenq];
-        else if (!IS_FREE(&thrd->req[thrd->lstenq]))
-                req = &thrd->req[thrd->lstenq];
-        else
-                req = NULL;
+        idx = 1 - thrd->lstenq;
+        if (!IS_FREE(&thrd->req[idx]))
+                req = &thrd->req[idx];
+        else {
+                idx = thrd->lstenq;
+                if (!IS_FREE(&thrd->req[idx]))
+                        req = &thrd->req[idx];
+                else
+                        req = NULL;
+        }
 
         /* Return if no request */
         if (!req || !req->r)
@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
         /* Only manager can execute GO */
         _execute_DBGINSN(thrd, insn, true);
 
+        thrd->req_running = idx;
+
         return true;
 }
 
@@ -1211,8 +1200,8 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
         ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
         ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
 
-        ccr |= (rqc->dcctl << CC_SRCCCTRL_SHFT);
-        ccr |= (rqc->scctl << CC_DSTCCTRL_SHFT);
+        ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
+        ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
 
         ccr |= (rqc->swap << CC_SWAP_SHFT);
 
@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
 
                         thrd->req[0].r = NULL;
                         thrd->req[1].r = NULL;
-                        MARK_FREE(&thrd->req[0]);
-                        MARK_FREE(&thrd->req[1]);
+                        mark_free(thrd, 0);
+                        mark_free(thrd, 1);
 
                         /* Clear the reset flag */
                         pl330->dmac_tbd.reset_chan &= ~(1 << i);
@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
 
                         thrd = &pl330->channels[id];
 
-                        active = _thrd_active(thrd);
-                        if (!active) /* Aborted */
+                        active = thrd->req_running;
+                        if (active == -1) /* Aborted */
                                 continue;
 
-                        active -= 1;
-
                         rqdone = &thrd->req[active];
-                        MARK_FREE(rqdone);
+                        mark_free(thrd, active);
 
                         /* Get going again ASAP */
                         _start(thrd);
@@ -1480,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi)
 
         /* Now that we are in no hurry, do the callbacks */
         while (!list_empty(&pl330->req_done)) {
+                struct pl330_req *r;
+
                 rqdone = container_of(pl330->req_done.next,
                                         struct _pl330_req, rqd);
 
                 list_del_init(&rqdone->rqd);
 
+                /* Detach the req */
+                r = rqdone->r;
+                rqdone->r = NULL;
+
                 spin_unlock_irqrestore(&pl330->lock, flags);
-                _callback(rqdone->r, PL330_ERR_NONE);
+                _callback(r, PL330_ERR_NONE);
                 spin_lock_irqsave(&pl330->lock, flags);
         }
 
@@ -1509,7 +1502,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
         struct pl330_thread *thrd = ch_id;
         struct pl330_dmac *pl330;
         unsigned long flags;
-        int ret = 0, active;
+        int ret = 0, active = thrd->req_running;
 
         if (!thrd || thrd->free || thrd->dmac->state == DYING)
                 return -EINVAL;
@@ -1525,28 +1518,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
 
                 thrd->req[0].r = NULL;
                 thrd->req[1].r = NULL;
-                MARK_FREE(&thrd->req[0]);
-                MARK_FREE(&thrd->req[1]);
+                mark_free(thrd, 0);
+                mark_free(thrd, 1);
                 break;
 
         case PL330_OP_ABORT:
-                active = _thrd_active(thrd);
-
                 /* Make sure the channel is stopped */
                 _stop(thrd);
 
                 /* ABORT is only for the active req */
-                if (!active)
+                if (active == -1)
                         break;
 
-                active--;
-
                 thrd->req[active].r = NULL;
-                MARK_FREE(&thrd->req[active]);
+                mark_free(thrd, active);
 
                 /* Start the next */
         case PL330_OP_START:
-                if (!_thrd_active(thrd) && !_start(thrd))
+                if ((active == -1) && !_start(thrd))
                         ret = -EIO;
                 break;
 
@@ -1587,14 +1576,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
         else
                 pstatus->faulting = false;
 
-        active = _thrd_active(thrd);
+        active = thrd->req_running;
 
-        if (!active) {
+        if (active == -1) {
                 /* Indicate that the thread is not running */
                 pstatus->top_req = NULL;
                 pstatus->wait_req = NULL;
         } else {
-                active--;
                 pstatus->top_req = thrd->req[active].r;
                 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
                                         ? thrd->req[1 - active].r : NULL;
@@ -1623,6 +1611,11 @@ static inline int _alloc_event(struct pl330_thread *thrd)
         return -1;
 }
 
+static bool _chan_ns(const struct pl330_info *pi, int i)
+{
+        return pi->pcfg.irq_ns & (1 << i);
+}
+
 /* Upon success, returns IdentityToken for the
  * allocated channel, NULL otherwise.
  */
@@ -1647,15 +1640,16 @@ void *pl330_request_channel(const struct pl330_info *pi)
 
         for (i = 0; i < chans; i++) {
                 thrd = &pl330->channels[i];
-                if (thrd->free) {
+                if ((thrd->free) && (!_manager_ns(thrd) ||
+                                        _chan_ns(pi, i))) {
                         thrd->ev = _alloc_event(thrd);
                         if (thrd->ev >= 0) {
                                 thrd->free = false;
                                 thrd->lstenq = 1;
                                 thrd->req[0].r = NULL;
-                                MARK_FREE(&thrd->req[0]);
+                                mark_free(thrd, 0);
                                 thrd->req[1].r = NULL;
-                                MARK_FREE(&thrd->req[1]);
+                                mark_free(thrd, 1);
                                 break;
                         }
                 }
@@ -1761,14 +1755,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
         thrd->req[0].mc_bus = pl330->mcode_bus
                                 + (thrd->id * pi->mcbufsz);
         thrd->req[0].r = NULL;
-        MARK_FREE(&thrd->req[0]);
+        mark_free(thrd, 0);
 
         thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
                                 + pi->mcbufsz / 2;
         thrd->req[1].mc_bus = thrd->req[0].mc_bus
                                 + pi->mcbufsz / 2;
         thrd->req[1].r = NULL;
-        MARK_FREE(&thrd->req[1]);
+        mark_free(thrd, 1);
 }
 
 static int dmac_alloc_threads(struct pl330_dmac *pl330)
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 2393b5bc96fa..8794a34eae61 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next,
 }
 
 static struct clock_event_device sp804_clockevent = {
-        .shift          = 32,
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_mode       = sp804_set_mode,
         .set_next_event = sp804_set_next_event,
@@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
 
         clkevt_base = base;
         clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
-
         evt->name = name;
         evt->irq = irq;
-        evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift);
-        evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
-        evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
 
         setup_irq(irq, &sp804_timer_irq);
-        clockevents_register_device(evt);
+        clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
 }
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 01f18a421b17..dcb004a804c7 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -19,17 +19,22 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/syscore_ops.h>
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/vic.h>
 
-#ifdef CONFIG_PM
 /**
  * struct vic_device - VIC PM device
  * @irq: The IRQ number for the base of the VIC.
@@ -40,6 +45,7 @@
  * @int_enable: Save for VIC_INT_ENABLE.
  * @soft_int: Save for VIC_INT_SOFT.
  * @protect: Save for VIC_PROTECT.
+ * @domain: The IRQ domain for the VIC.
  */
 struct vic_device {
         void __iomem    *base;
@@ -50,13 +56,13 @@ struct vic_device {
         u32             int_enable;
         u32             soft_int;
         u32             protect;
+        struct irq_domain domain;
 };
 
 /* we cannot allocate memory when VICs are initially registered */
 static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
 
 static int vic_id;
-#endif /* CONFIG_PM */
 
 /**
  * vic_init2 - common initialisation code
@@ -156,39 +162,50 @@ static int __init vic_pm_init(void)
         return 0;
 }
 late_initcall(vic_pm_init);
+#endif /* CONFIG_PM */
 
 /**
- * vic_pm_register - Register a VIC for later power management control
+ * vic_register() - Register a VIC.
  * @base: The base address of the VIC.
  * @irq: The base IRQ for the VIC.
  * @resume_sources: bitmask of interrupts allowed for resume sources.
+ * @node: The device tree node associated with the VIC.
  *
  * Register the VIC with the system device tree so that it can be notified
  * of suspend and resume requests and ensure that the correct actions are
  * taken to re-instate the settings on resume.
+ *
+ * This also configures the IRQ domain for the VIC.
  */
-static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources)
+static void __init vic_register(void __iomem *base, unsigned int irq,
+                                u32 resume_sources, struct device_node *node)
 {
         struct vic_device *v;
 
-        if (vic_id >= ARRAY_SIZE(vic_devices))
+        if (vic_id >= ARRAY_SIZE(vic_devices)) {
                 printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
-        else {
-                v = &vic_devices[vic_id];
-                v->base = base;
-                v->resume_sources = resume_sources;
-                v->irq = irq;
-                vic_id++;
+                return;
         }
+
+        v = &vic_devices[vic_id];
+        v->base = base;
+        v->resume_sources = resume_sources;
+        v->irq = irq;
+        vic_id++;
+
+        v->domain.irq_base = irq;
+        v->domain.nr_irq = 32;
+#ifdef CONFIG_OF_IRQ
+        v->domain.of_node = of_node_get(node);
+#endif /* CONFIG_OF */
+        v->domain.ops = &irq_domain_simple_ops;
+        irq_domain_add(&v->domain);
 }
-#else
-static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
-#endif /* CONFIG_PM */
 
 static void vic_ack_irq(struct irq_data *d)
 {
         void __iomem *base = irq_data_get_irq_chip_data(d);
-        unsigned int irq = d->irq & 31;
+        unsigned int irq = d->hwirq;
         writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
         /* moreover, clear the soft-triggered, in case it was the reason */
         writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
@@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d)
 static void vic_mask_irq(struct irq_data *d)
 {
         void __iomem *base = irq_data_get_irq_chip_data(d);
-        unsigned int irq = d->irq & 31;
+        unsigned int irq = d->hwirq;
         writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 }
 
 static void vic_unmask_irq(struct irq_data *d)
 {
         void __iomem *base = irq_data_get_irq_chip_data(d);
-        unsigned int irq = d->irq & 31;
+        unsigned int irq = d->hwirq;
         writel(1 << irq, base + VIC_INT_ENABLE);
 }
 
@@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq)
 static int vic_set_wake(struct irq_data *d, unsigned int on)
 {
         struct vic_device *v = vic_from_irq(d->irq);
-        unsigned int off = d->irq & 31;
+        unsigned int off = d->hwirq;
         u32 bit = 1 << off;
 
         if (!v)
@@ -301,7 +318,7 @@ static void __init vic_set_irq_sources(void __iomem *base,
  *  and 020 within the page. We call this "second block".
  */
 static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
-                                u32 vic_sources)
+                               u32 vic_sources, struct device_node *node)
 {
         unsigned int i;
         int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
@@ -328,17 +345,12 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
         }
 
         vic_set_irq_sources(base, irq_start, vic_sources);
+        vic_register(base, irq_start, 0, node);
 }
 
-/**
- * vic_init - initialise a vectored interrupt controller
- * @base: iomem base address
- * @irq_start: starting interrupt number, must be muliple of 32
- * @vic_sources: bitmask of interrupt sources to allow
- * @resume_sources: bitmask of interrupt sources to allow for resume
- */
-void __init vic_init(void __iomem *base, unsigned int irq_start,
-                     u32 vic_sources, u32 resume_sources)
+static void __init __vic_init(void __iomem *base, unsigned int irq_start,
+                              u32 vic_sources, u32 resume_sources,
+                              struct device_node *node)
 {
         unsigned int i;
         u32 cellid = 0;
@@ -356,7 +368,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 
         switch(vendor) {
         case AMBA_VENDOR_ST:
-                vic_init_st(base, irq_start, vic_sources);
+                vic_init_st(base, irq_start, vic_sources, node);
                 return;
         default:
                 printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
@@ -375,5 +387,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 
         vic_set_irq_sources(base, irq_start, vic_sources);
 
-        vic_pm_register(base, irq_start, resume_sources);
+        vic_register(base, irq_start, resume_sources, node);
+}
+
+/**
+ * vic_init() - initialise a vectored interrupt controller
+ * @base: iomem base address
+ * @irq_start: starting interrupt number, must be muliple of 32
+ * @vic_sources: bitmask of interrupt sources to allow
+ * @resume_sources: bitmask of interrupt sources to allow for resume
+ */
+void __init vic_init(void __iomem *base, unsigned int irq_start,
+                     u32 vic_sources, u32 resume_sources)
+{
+        __vic_init(base, irq_start, vic_sources, resume_sources, NULL);
+}
+
+#ifdef CONFIG_OF
+int __init vic_of_init(struct device_node *node, struct device_node *parent)
+{
+        void __iomem *regs;
+        int irq_base;
+
+        if (WARN(parent, "non-root VICs are not supported"))
+                return -EINVAL;
+
+        regs = of_iomap(node, 0);
+        if (WARN_ON(!regs))
+                return -EIO;
+
+        irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
+        if (WARN_ON(irq_base < 0))
+                goto out_unmap;
+
+        __vic_init(regs, irq_base, ~0, ~0, node);
+
+        return 0;
+
+ out_unmap:
+        iounmap(regs);
+
+        return -EIO;
+}
+#endif /* CONFIG OF */
+
+/*
+ * Handle each interrupt in a single VIC.  Returns non-zero if we've
+ * handled at least one interrupt.  This does a single read of the
+ * status register and handles all interrupts in order from LSB first.
+ */
+static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
+{
+        u32 stat, irq;
+        int handled = 0;
+
+        stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
+        while (stat) {
+                irq = ffs(stat) - 1;
+                handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs);
+                stat &= ~(1 << irq);
+                handled = 1;
+        }
+
+        return handled;
+}
+
+/*
+ * Keep iterating over all registered VIC's until there are no pending
+ * interrupts.
+ */
+asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs)
+{
+        int i, handled;
+
+        do {
+                for (i = 0, handled = 0; i < vic_id; ++i)
+                        handled |= handle_one_vic(&vic_devices[i], regs);
+        } while (handled);
 }
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9_defconfig
index ffb1edd93363..8826eb218e73 100644
--- a/arch/arm/configs/at91cap9adk_defconfig
+++ b/arch/arm/configs/at91cap9_defconfig
@@ -38,7 +38,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -52,16 +51,12 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -81,7 +76,6 @@ CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_CLUT224 is not set
@@ -99,7 +93,6 @@ CONFIG_MMC_AT91=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
index 38cb7c985426..bbe4e1a1f5d8 100644
--- a/arch/arm/configs/at91rm9200_defconfig
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
@@ -56,7 +55,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
 CONFIG_INET_IPCOMP=m
@@ -75,18 +73,8 @@ CONFIG_IPV6_TUNNEL=m
 CONFIG_BRIDGE=m
 CONFIG_VLAN_8021Q=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_AFS_PARTS=y
 CONFIG_MTD_CHAR=y
@@ -108,8 +96,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_LEGACY=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=m
@@ -119,14 +105,23 @@ CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_TUN=m
+CONFIG_ARM_AT91_ETHER=y
 CONFIG_PHYLIB=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_SMSC_PHY=y
 CONFIG_MICREL_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_ARM_AT91_ETHER=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP=y
+CONFIG_PPP_BSDCOMP=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=m
+CONFIG_PPP_ASYNC=y
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
 CONFIG_USB_CATC=m
 CONFIG_USB_KAWETH=m
 CONFIG_USB_PEGASUS=m
@@ -139,18 +134,6 @@ CONFIG_USB_NET_RNDIS_HOST=m
 CONFIG_USB_ALI_M5632=y
 CONFIG_USB_AN2720=y
 CONFIG_USB_EPSON2888=y
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPPOE=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
@@ -158,9 +141,9 @@ CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_LEGACY_PTY_COUNT=32
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=32
 CONFIG_HW_RANDOM=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -290,7 +273,6 @@ CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
-CONFIG_SMB_FS=m
 CONFIG_CIFS=m
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAC_PARTITION=y
@@ -335,7 +317,6 @@ CONFIG_NLS_UTF8=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_FTRACE is not set
 CONFIG_CRYPTO_PCBC=y
 CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260_defconfig
index f8a9226413bf..505b3765f87e 100644
--- a/arch/arm/configs/at91sam9260ek_defconfig
+++ b/arch/arm/configs/at91sam9260_defconfig
@@ -12,11 +12,23 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9260=y
+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
 CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
 CONFIG_FPE_NWFPE=y
 CONFIG_NET=y
@@ -33,12 +45,10 @@ CONFIG_IP_PNP_BOOTP=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -55,7 +65,6 @@ CONFIG_I2C_GPIO=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_VGA_CONSOLE is not set
 # CONFIG_USB_HID is not set
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
@@ -71,7 +80,6 @@ CONFIG_USB_G_SERIAL=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_CRAMFS=y
diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index 9e90e6d79297..9123568d9a8d 100644
--- a/arch/arm/configs/at91sam9g20ek_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -14,6 +14,15 @@ CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_MACH_AT91SAM9G20EK=y
 CONFIG_MACH_AT91SAM9G20EK_2MMC=y
+CONFIG_MACH_CPU9G20=y
+CONFIG_MACH_ACMENETUSFOXG20=y
+CONFIG_MACH_PORTUXG20=y
+CONFIG_MACH_STAMP9G20=y
+CONFIG_MACH_PCONTROL_G20=y
+CONFIG_MACH_GSIA18S=y
+CONFIG_MACH_USB_A9G20=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_AEABI=y
@@ -21,9 +30,10 @@ CONFIG_LEDS=y
 CONFIG_LEDS_CPU=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -37,8 +47,6 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -48,17 +56,13 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
@@ -66,15 +70,14 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_HW_RANDOM=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_SEQUENCER=y
@@ -82,7 +85,6 @@ CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
 CONFIG_SND_SEQUENCER_OSS=y
 # CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_AT73C213=y
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
@@ -105,7 +107,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
index c5876d244f4b..606d48f3b8f8 100644
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -18,6 +18,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9G45=y
 CONFIG_MACH_AT91SAM9M10G45EK=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 CONFIG_AT91_SLOW_CLOCK=y
 CONFIG_AEABI=y
@@ -73,11 +74,8 @@ CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_MII=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_DAVICOM_PHY=y
 CONFIG_LIBERTAS_THINFIRM=m
 CONFIG_LIBERTAS_THINFIRM_USB=m
 CONFIG_AT76C50X_USB=m
@@ -131,7 +129,6 @@ CONFIG_I2C_GPIO=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 # CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
 CONFIG_FB_UDL=m
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rl_defconfig
index 75621e4d03fc..ad562ee64209 100644
--- a/arch/arm/configs/at91sam9rlek_defconfig
+++ b/arch/arm/configs/at91sam9rl_defconfig
@@ -23,8 +23,6 @@ CONFIG_NET=y
 CONFIG_UNIX=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -35,7 +33,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=4
 CONFIG_BLK_DEV_RAM_SIZE=24576
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
@@ -62,13 +59,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_MMC=y
 CONFIG_MMC_AT91=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
index 227a477346ed..d95763d5f0d8 100644
--- a/arch/arm/configs/ezx_defconfig
+++ b/arch/arm/configs/ezx_defconfig
@@ -287,7 +287,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_MMC=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index 176ec22af034..fd996bb13022 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -263,7 +263,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_MMC=y
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 11a4192197c8..cf497ce41dfe 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
 CONFIG_ARCH_IMX_V4_V5=y
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
+CONFIG_MACH_APF9328=y
 CONFIG_MACH_MX21ADS=y
 CONFIG_MACH_MX25_3DS=y
-CONFIG_MACH_EUKREA_CPUIMX25=y
+CONFIG_MACH_EUKREA_CPUIMX25SD=y
 CONFIG_MACH_MX27ADS=y
 CONFIG_MACH_PCM038=y
 CONFIG_MACH_CPUIMX27=y
@@ -72,17 +73,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
 CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
 CONFIG_DM9000=y
+CONFIG_SMC91X=y
 CONFIG_SMC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_SMSC_PHY=y
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -100,6 +100,7 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_IMX=y
 CONFIG_SPI=y
 CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=y
 CONFIG_W1=y
 CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
@@ -139,6 +140,7 @@ CONFIG_MMC=y
 CONFIG_MMC_MXC=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_MC13783=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index a88e64d4e9a5..443675d317e6 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -132,7 +132,7 @@ CONFIG_USB_MON=m
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VBUS_DRAW=500
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_USB_GADGETFS=m
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7b63462b349d..945a34f2a34d 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,13 +48,7 @@ CONFIG_MACH_SX1=y
 CONFIG_MACH_NOKIA770=y
 CONFIG_MACH_AMS_DELTA=y
 CONFIG_MACH_OMAP_GENERIC=y
-CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
-CONFIG_OMAP_ARM_216MHZ=y
-CONFIG_OMAP_ARM_195MHZ=y
-CONFIG_OMAP_ARM_192MHZ=y
 CONFIG_OMAP_ARM_182MHZ=y
-CONFIG_OMAP_ARM_168MHZ=y
-# CONFIG_OMAP_ARM_60MHZ is not set
 # CONFIG_ARM_THUMB is not set
 CONFIG_PCCARD=y
 CONFIG_OMAP_CF=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index 4a5a12681be2..374000ec4e4e 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -14,8 +14,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U300=y
 CONFIG_MACH_U300=y
 CONFIG_MACH_U300_BS335=y
-CONFIG_MACH_U300_DUAL_RAM=y
-CONFIG_U300_DEBUG=y
 CONFIG_MACH_U300_SPIDUMMY=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -26,19 +24,21 @@ CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
 CONFIG_CPU_IDLE=y
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 # CONFIG_SUSPEND is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_MISC_DEVICES is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSMC=y
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 # CONFIG_HWMON is not set
@@ -51,6 +51,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
+CONFIG_MMC_CLKGATE=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
@@ -65,10 +66,8 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_PREEMPT is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 97d31a4663da..2d7b6e7b7271 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -10,7 +10,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U8500=y
 CONFIG_UX500_SOC_DB5500=y
 CONFIG_UX500_SOC_DB8500=y
-CONFIG_MACH_U8500=y
+CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_U5500=y
 CONFIG_NO_HZ=y
@@ -24,6 +24,7 @@ CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_VFP=y
 CONFIG_NEON=y
+CONFIG_PM_RUNTIME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -41,11 +42,8 @@ CONFIG_MISC_DEVICES=y
 CONFIG_AB8500_PWM=y
 CONFIG_SENSORS_BH1780=y
 CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_SMSC_PHY=y
 # CONFIG_WLAN is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
@@ -72,15 +70,12 @@ CONFIG_SPI=y
 CONFIG_SPI_PL022=y
 CONFIG_GPIO_STMPE=y
 CONFIG_GPIO_TC3589X=y
-# CONFIG_HWMON is not set
 CONFIG_MFD_STMPE=y
 CONFIG_MFD_TC3589X=y
+CONFIG_AB5500_CORE=y
 CONFIG_AB8500_CORE=y
 CONFIG_REGULATOR_AB8500=y
 # CONFIG_HID_SUPPORT is not set
-CONFIG_USB_MUSB_HDRC=y
-CONFIG_USB_GADGET_MUSB_HDRC=y
-CONFIG_MUSB_PIO_ONLY=y
 CONFIG_USB_GADGET=y
 CONFIG_AB8500_USB=y
 CONFIG_MMC=y
@@ -97,6 +92,7 @@ CONFIG_DMADEVICES=y
 CONFIG_STE_DMA40=y
 CONFIG_STAGING=y
 CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
+CONFIG_HSEM_U8500=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
index 59577ad3f4ef..547a3c1e59db 100644
--- a/arch/arm/configs/zeus_defconfig
+++ b/arch/arm/configs/zeus_defconfig
@@ -140,7 +140,7 @@ CONFIG_USB_SERIAL=m
 CONFIG_USB_SERIAL_GENERIC=y
 CONFIG_USB_SERIAL_MCT_U232=m
 CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_FILE_STORAGE=m
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 29035e86a59d..b6e65dedfd71 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -187,6 +187,17 @@
 #endif
 
 /*
+ * Instruction barrier
+ */
+        .macro  instr_sync
+#if __LINUX_ARM_ARCH__ >= 7
+        isb
+#elif __LINUX_ARM_ARCH__ == 6
+        mcr     p15, 0, r0, c7, c5, 4
+#endif
+        .endm
+
+/*
  * SMP data memory barrier
  */
         .macro  smp_dmb mode
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 9abe7a07d5ac..fac79dceb736 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -32,7 +32,6 @@
 
 #define __BUG(__file, __line, __value)                          \
 do {                                                            \
-        BUILD_BUG_ON(sizeof(struct bug_entry) != 12);           \
         asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n"        \
                 ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
                 "2:\t.asciz " #__file "\n"                      \
diff --git a/arch/arm/include/asm/cti.h b/arch/arm/include/asm/cti.h
new file mode 100644
index 000000000000..a0ada3ea4358
--- /dev/null
+++ b/arch/arm/include/asm/cti.h
@@ -0,0 +1,179 @@
+#ifndef __ASMARM_CTI_H
+#define __ASMARM_CTI_H
+
+#include        <asm/io.h>
+
+/* The registers' definition is from section 3.2 of
+ * Embedded Cross Trigger Revision: r0p0
+ */
+#define         CTICONTROL              0x000
+#define         CTISTATUS               0x004
+#define         CTILOCK                 0x008
+#define         CTIPROTECTION           0x00C
+#define         CTIINTACK               0x010
+#define         CTIAPPSET               0x014
+#define         CTIAPPCLEAR             0x018
+#define         CTIAPPPULSE             0x01c
+#define         CTIINEN                 0x020
+#define         CTIOUTEN                0x0A0
+#define         CTITRIGINSTATUS         0x130
+#define         CTITRIGOUTSTATUS        0x134
+#define         CTICHINSTATUS           0x138
+#define         CTICHOUTSTATUS          0x13c
+#define         CTIPERIPHID0            0xFE0
+#define         CTIPERIPHID1            0xFE4
+#define         CTIPERIPHID2            0xFE8
+#define         CTIPERIPHID3            0xFEC
+#define         CTIPCELLID0             0xFF0
+#define         CTIPCELLID1             0xFF4
+#define         CTIPCELLID2             0xFF8
+#define         CTIPCELLID3             0xFFC
+
+/* The below are from section 3.6.4 of
+ * CoreSight v1.0 Architecture Specification
+ */
+#define         LOCKACCESS              0xFB0
+#define         LOCKSTATUS              0xFB4
+
+/* write this value to LOCKACCESS will unlock the module, and
+ * other value will lock the module
+ */
+#define         LOCKCODE                0xC5ACCE55
+
+/**
+ * struct cti - cross trigger interface struct
+ * @base: mapped virtual address for the cti base
+ * @irq: irq number for the cti
+ * @trig_out_for_irq: triger out number which will cause
+ *      the @irq happen
+ *
+ * cti struct used to operate cti registers.
+ */
+struct cti {
+        void __iomem *base;
+        int irq;
+        int trig_out_for_irq;
+};
+
+/**
+ * cti_init - initialize the cti instance
+ * @cti: cti instance
+ * @base: mapped virtual address for the cti base
+ * @irq: irq number for the cti
+ * @trig_out: triger out number which will cause
+ *      the @irq happen
+ *
+ * called by machine code to pass the board dependent
+ * @base, @irq and @trig_out to cti.
+ */
+static inline void cti_init(struct cti *cti,
+        void __iomem *base, int irq, int trig_out)
+{
+        cti->base = base;
+        cti->irq  = irq;
+        cti->trig_out_for_irq = trig_out;
+}
+
+/**
+ * cti_map_trigger - use the @chan to map @trig_in to @trig_out
+ * @cti: cti instance
+ * @trig_in: trigger in number
+ * @trig_out: trigger out number
+ * @channel: channel number
+ *
+ * This function maps one trigger in of @trig_in to one trigger
+ * out of @trig_out using the channel @chan.
+ */
+static inline void cti_map_trigger(struct cti *cti,
+        int trig_in, int trig_out, int chan)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+
+        val = __raw_readl(base + CTIINEN + trig_in * 4);
+        val |= BIT(chan);
+        __raw_writel(val, base + CTIINEN + trig_in * 4);
+
+        val = __raw_readl(base + CTIOUTEN + trig_out * 4);
+        val |= BIT(chan);
+        __raw_writel(val, base + CTIOUTEN + trig_out * 4);
+}
+
+/**
+ * cti_enable - enable the cti module
+ * @cti: cti instance
+ *
+ * enable the cti module
+ */
+static inline void cti_enable(struct cti *cti)
+{
+        __raw_writel(0x1, cti->base + CTICONTROL);
+}
+
+/**
+ * cti_disable - disable the cti module
+ * @cti: cti instance
+ *
+ * enable the cti module
+ */
+static inline void cti_disable(struct cti *cti)
+{
+        __raw_writel(0, cti->base + CTICONTROL);
+}
+
+/**
+ * cti_irq_ack - clear the cti irq
+ * @cti: cti instance
+ *
+ * clear the cti irq
+ */
+static inline void cti_irq_ack(struct cti *cti)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+
+        val = __raw_readl(base + CTIINTACK);
+        val |= BIT(cti->trig_out_for_irq);
+        __raw_writel(val, base + CTIINTACK);
+}
+
+/**
+ * cti_unlock - unlock cti module
+ * @cti: cti instance
+ *
+ * unlock the cti module, or else any writes to the cti
+ * module is not allowed.
+ */
+static inline void cti_unlock(struct cti *cti)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+
+        val = __raw_readl(base + LOCKSTATUS);
+
+        if (val & 1) {
+                val = LOCKCODE;
+                __raw_writel(val, base + LOCKACCESS);
+        }
+}
+
+/**
+ * cti_lock - lock cti module
+ * @cti: cti instance
+ *
+ * lock the cti module, so any writes to the cti
+ * module will be not allowed.
+ */
+static inline void cti_lock(struct cti *cti)
+{
+        void __iomem *base = cti->base;
+        unsigned long val;
+
+        val = __raw_readl(base + LOCKSTATUS);
+
+        if (!(val & 1)) {
+                val = ~LOCKCODE;
+                __raw_writel(val, base + LOCKACCESS);
+        }
+}
+#endif
diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h
new file mode 100644
index 000000000000..0df7a2c1fc3d
--- /dev/null
+++ b/arch/arm/include/asm/edac.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ * Based on PPC version Copyright 2007 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+/*
+ * ECC atomic, DMA, SMP and interrupt safe scrub function.
+ * Implements the per arch atomic_scrub() that EDAC use for software
+ * ECC scrubbing.  It reads memory and then writes back the original
+ * value, allowing the hardware to detect and correct memory errors.
+ */
+static inline void atomic_scrub(void *va, u32 size)
+{
+#if __LINUX_ARM_ARCH__ >= 6
+        unsigned int *virt_addr = va;
+        unsigned int temp, temp2;
+        unsigned int i;
+
+        for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
+                /* Very carefully read and write to memory atomically
+                 * so we are interrupt, DMA and SMP safe.
+                 */
+                __asm__ __volatile__("\n"
+                        "1:     ldrex   %0, [%2]\n"
+                        "       strex   %1, %0, [%2]\n"
+                        "       teq     %1, #0\n"
+                        "       bne     1b\n"
+                        : "=&r"(temp), "=&r"(temp2)
+                        : "r"(virt_addr)
+                        : "cc");
+        }
+#endif
+}
+
+#endif
diff --git a/arch/arm/include/asm/entry-macro-vic2.S b/arch/arm/include/asm/entry-macro-vic2.S
deleted file mode 100644
index 3ceb85e43850..000000000000
--- a/arch/arm/include/asm/entry-macro-vic2.S
+++ /dev/null
@@ -1,57 +0,0 @@
-/* arch/arm/include/asm/entry-macro-vic2.S
- *
- * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * Low-level IRQ helper macros for a device with two VICs
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
-*/
-
-/* This should be included from <mach/entry-macro.S> with the necessary
- * defines for virtual addresses and IRQ bases for the two vics.
- *
- * The code needs the following defined:
- *      IRQ_VIC0_BASE   IRQ number of VIC0's first IRQ
- *      IRQ_VIC1_BASE   IRQ number of VIC1's first IRQ
- *      VA_VIC0         Virtual address of VIC0
- *      VA_VIC1         Virtual address of VIC1
- *
- * Note, code assumes VIC0's virtual address is an ARM immediate constant
- * away from VIC1.
-*/
-
-#include <asm/hardware/vic.h>
-
-        .macro  disable_fiq
-        .endm
-
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-        @ check the vic0
-        mov     \irqnr, #IRQ_VIC0_BASE + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE)
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
-        .endm
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 11ad0bfbb0ad..7151753b0989 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,6 +1,10 @@
 #ifndef _ARCH_ARM_GPIO_H
 #define _ARCH_ARM_GPIO_H
 
+#if CONFIG_ARCH_NR_GPIO > 0
+#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO
+#endif
+
 /* not all ARM platforms necessarily support this API ... */
 #include <mach/gpio.h>
 
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index ddf07a92a6c8..436e60b2cf7a 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu);
 
 #define arch_irq_stat_cpu       smp_irq_stat_cpu
 
-#if NR_IRQS > 512
-#define HARDIRQ_BITS    10
-#elif NR_IRQS > 256
-#define HARDIRQ_BITS    9
-#else
-#define HARDIRQ_BITS    8
-#endif
-
-/*
- * The hardirq mask has to be large enough to have space
- * for potentially all IRQ sources in the system nesting
- * on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
 #define __ARCH_IRQ_EXIT_IRQS_DISABLED   1
 
 #endif /* __ASM_HARDIRQ_H */
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 1db1143a9483..7df239bcdf27 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -20,6 +20,8 @@
 #ifndef __ASM_ARM_HARDWARE_L2X0_H
 #define __ASM_ARM_HARDWARE_L2X0_H
 
+#include <linux/errno.h>
+
 #define L2X0_CACHE_ID                   0x000
 #define L2X0_CACHE_TYPE                 0x004
 #define L2X0_CTRL                       0x100
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644
index 74ebc803904d..000000000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/arm/include/asm/hardware/entry-macro-gic.S
- *
- * Low-level IRQ helper macros for GIC
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/hardware/gic.h>
-
-#ifndef HAVE_GET_IRQNR_PREAMBLE
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =gic_cpu_base_addr
-        ldr     \base, [\base]
-        .endm
-#endif
-
-/*
- * The interrupt numbering scheme is defined in the
- * interrupt controller spec.  To wit:
- *
- * Interrupts 0-15 are IPI
- * 16-31 are local.  We allow 30 to be used for the watchdog.
- * 32-1020 are global
- * 1021-1022 are reserved
- * 1023 is "spurious" (no interrupt)
- *
- * A simple read from the controller will tell us the number of the highest
- * priority enabled interrupt.  We then just need to check whether it is in the
- * valid range for an IRQ (30-1020 inclusive).
- */
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-        ldr     \irqstat, [\base, #GIC_CPU_INTACK]
-        /* bits 12-10 = src CPU, 9-0 = int # */
-
-        ldr     \tmp, =1021
-        bic     \irqnr, \irqstat, #0x1c00
-        cmp     \irqnr, #15
-        cmpcc   \irqnr, \irqnr
-        cmpne   \irqnr, \tmp
-        cmpcs   \irqnr, \irqnr
-        .endm
-
-/* We assume that irqstat (the raw value of the IRQ acknowledge
- * register) is preserved from the macro above.
- * If there is an IPI, we immediately signal end of interrupt on the
- * controller, since this requires the original irqstat value which
- * we won't easily be able to recreate later.
- */
-
-        .macro test_for_ipi, irqnr, irqstat, base, tmp
-        bic     \irqnr, \irqstat, #0x1c00
-        cmp     \irqnr, #16
-        strcc   \irqstat, [\base, #GIC_CPU_EOI]
-        cmpcs   \irqnr, \irqnr
-        .endm
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 3e91f22046f5..4bdfe0018696 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,30 +36,22 @@
 #include <linux/irqdomain.h>
 struct device_node;
 
-extern void __iomem *gic_cpu_base_addr;
 extern struct irq_chip gic_arch_extn;
 
-void gic_init(unsigned int, int, void __iomem *, void __iomem *);
+void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
+                    u32 offset);
 int gic_of_init(struct device_node *node, struct device_node *parent);
 void gic_secondary_init(unsigned int);
+void gic_handle_irq(struct pt_regs *regs);
 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
 void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
 
-struct gic_chip_data {
-        void __iomem *dist_base;
-        void __iomem *cpu_base;
-#ifdef CONFIG_CPU_PM
-        u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)];
-        u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)];
-        u32 saved_spi_target[DIV_ROUND_UP(1020, 4)];
-        u32 __percpu *saved_ppi_enable;
-        u32 __percpu *saved_ppi_conf;
-#endif
-#ifdef CONFIG_IRQ_DOMAIN
-        struct irq_domain domain;
-#endif
-        unsigned int gic_irqs;
-};
+static inline void gic_init(unsigned int nr, int start,
+                            void __iomem *dist , void __iomem *cpu)
+{
+        gic_init_bases(nr, start, dist, cpu, 0);
+}
+
 #endif
 
 #endif
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 5daea2961d48..077c32326c63 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void);
 void iop3xx_map_io(void);
 void iop_init_cp6_handler(void);
 void iop_init_time(unsigned long tickrate);
+void iop3xx_restart(char, const char *);
 
 static inline u32 read_tmr0(void)
 {
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 5d72550a8097..f42ebd619590 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -41,7 +41,15 @@
 #define VIC_PL192_VECT_ADDR             0xF00
 
 #ifndef __ASSEMBLY__
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+struct device_node;
+struct pt_regs;
+
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
-#endif
+int vic_of_init(struct device_node *node, struct device_node *parent);
+void vic_handle_irq(struct pt_regs *regs);
 
+#endif /* __ASSEMBLY__ */
 #endif
diff --git a/arch/arm/include/asm/idmap.h b/arch/arm/include/asm/idmap.h
new file mode 100644
index 000000000000..bf863edb517d
--- /dev/null
+++ b/arch/arm/include/asm/idmap.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_IDMAP_H
+#define __ASM_IDMAP_H
+
+#include <linux/compiler.h>
+#include <asm/pgtable.h>
+
+/* Tag a function as requiring to be executed via an identity mapping. */
+#define __idmap __section(.idmap.text) noinline notrace
+
+extern pgd_t *idmap_pgd;
+
+void setup_mm_for_reboot(void);
+
+#endif  /* __ASM_IDMAP_H */
diff --git a/arch/arm/include/asm/ipcbuf.h b/arch/arm/include/asm/ipcbuf.h
index 97683975f7df..84c7e51cb6d0 100644
--- a/arch/arm/include/asm/ipcbuf.h
+++ b/arch/arm/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef __ASMARM_IPCBUF_H
-#define __ASMARM_IPCBUF_H
-
-/*
- * The ipc64_perm structure for arm architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* __ASMARM_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 7d19425dd496..d7692cafde7f 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -13,12 +13,13 @@
 struct tag;
 struct meminfo;
 struct sys_timer;
+struct pt_regs;
 
 struct machine_desc {
         unsigned int            nr;             /* architecture number  */
         const char              *name;          /* architecture name    */
         unsigned long           atag_offset;    /* tagged list (relative) */
-        const char              **dt_compat;    /* array of device tree
+        const char *const       *dt_compat;     /* array of device tree
                                                  * 'compatible' strings */
 
         unsigned int            nr_irqs;        /* number of IRQs */
@@ -30,10 +31,10 @@ struct machine_desc {
         unsigned int            video_start;    /* start of video RAM   */
         unsigned int            video_end;      /* end of video RAM     */
 
-        unsigned int            reserve_lp0 :1; /* never has lp0        */
-        unsigned int            reserve_lp1 :1; /* never has lp1        */
-        unsigned int            reserve_lp2 :1; /* never has lp2        */
-        unsigned int            soft_reboot :1; /* soft reboot          */
+        unsigned char           reserve_lp0 :1; /* never has lp0        */
+        unsigned char           reserve_lp1 :1; /* never has lp1        */
+        unsigned char           reserve_lp2 :1; /* never has lp2        */
+        char                    restart_mode;   /* default restart mode */
         void                    (*fixup)(struct tag *, char **,
                                          struct meminfo *);
         void                    (*reserve)(void);/* reserve mem blocks  */
@@ -45,6 +46,7 @@ struct machine_desc {
 #ifdef CONFIG_MULTI_IRQ_HANDLER
         void                    (*handle_irq)(struct pt_regs *);
 #endif
+        void                    (*restart)(char, const char *);
 };
 
 /*
diff --git a/arch/arm/include/asm/mach/time.h b/arch/arm/include/asm/mach/time.h
index d5adaae5ee2c..f73c908b7fa0 100644
--- a/arch/arm/include/asm/mach/time.h
+++ b/arch/arm/include/asm/mach/time.h
@@ -10,8 +10,6 @@
 #ifndef __ASM_ARM_MACH_TIME_H
 #define __ASM_ARM_MACH_TIME_H
 
-#include <linux/sysdev.h>
-
 /*
  * This is our kernel timer structure.
  *
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
new file mode 100644
index 000000000000..c0efdd60966f
--- /dev/null
+++ b/arch/arm/include/asm/opcodes.h
@@ -0,0 +1,20 @@
+/*
+ *  arch/arm/include/asm/opcodes.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_OPCODES_H
+#define __ASM_ARM_OPCODES_H
+
+#ifndef __ASSEMBLY__
+extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
+#endif
+
+#define ARM_OPCODE_CONDTEST_FAIL   0
+#define ARM_OPCODE_CONDTEST_PASS   1
+#define ARM_OPCODE_CONDTEST_UNCOND 2
+
+#endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index ca94653f1ecb..97b440c25c58 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -151,7 +151,11 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
 #define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
+#ifdef CONFIG_ARM_LPAE
+#include <asm/pgtable-3level-types.h>
+#else
 #include <asm/pgtable-2level-types.h>
+#endif
 
 #endif /* CONFIG_MMU */
 
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 0f8e3827a89b..99cfe3607989 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -32,7 +32,4 @@ enum arm_perf_pmu_ids {
 extern enum arm_perf_pmu_ids
 armpmu_get_pmu_id(void);
 
-extern int
-armpmu_get_max_events(void);
-
 #endif /* __ARM_PERF_EVENT_H__ */
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
index 3e08fd3fbb6b..943504f53f57 100644
--- a/arch/arm/include/asm/pgalloc.h
+++ b/arch/arm/include/asm/pgalloc.h
@@ -25,12 +25,34 @@
 #define _PAGE_USER_TABLE        (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
 #define _PAGE_KERNEL_TABLE      (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
 
+#ifdef CONFIG_ARM_LPAE
+
+static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+        return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
+}
+
+static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
+{
+        BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
+        free_page((unsigned long)pmd);
+}
+
+static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
+{
+        set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
+}
+
+#else   /* !CONFIG_ARM_LPAE */
+
 /*
  * Since we have only two-level page tables, these are trivial
  */
 #define pmd_alloc_one(mm,addr)          ({ BUG(); ((pmd_t *)2); })
 #define pmd_free(mm, pmd)               do { } while (0)
-#define pgd_populate(mm,pmd,pte)        BUG()
+#define pud_populate(mm,pmd,pte)        BUG()
+
+#endif  /* CONFIG_ARM_LPAE */
 
 extern pgd_t *pgd_alloc(struct mm_struct *mm);
 extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
@@ -109,7 +131,9 @@ static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
 {
         pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot;
         pmdp[0] = __pmd(pmdval);
+#ifndef CONFIG_ARM_LPAE
         pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
+#endif
         flush_pmd_entry(pmdp);
 }
 
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 470457e1cfc5..2317a71c8f8e 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -140,4 +140,45 @@
 #define L_PTE_MT_DEV_CACHED     (_AT(pteval_t, 0x0b) << 2)      /* 1011 */
 #define L_PTE_MT_MASK           (_AT(pteval_t, 0x0f) << 2)
 
+#ifndef __ASSEMBLY__
+
+/*
+ * The "pud_xxx()" functions here are trivial when the pmd is folded into
+ * the pud: the pud entry is never bad, always exists, and can't be set or
+ * cleared.
+ */
+#define pud_none(pud)           (0)
+#define pud_bad(pud)            (0)
+#define pud_present(pud)        (1)
+#define pud_clear(pudp)         do { } while (0)
+#define set_pud(pud,pudp)       do { } while (0)
+
+static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
+{
+        return (pmd_t *)pud;
+}
+
+#define pmd_bad(pmd)            (pmd_val(pmd) & 2)
+
+#define copy_pmd(pmdpd,pmdps)           \
+        do {                            \
+                pmdpd[0] = pmdps[0];    \
+                pmdpd[1] = pmdps[1];    \
+                flush_pmd_entry(pmdpd); \
+        } while (0)
+
+#define pmd_clear(pmdp)                 \
+        do {                            \
+                pmdp[0] = __pmd(0);     \
+                pmdp[1] = __pmd(0);     \
+                clean_pmd_entry(pmdp);  \
+        } while (0)
+
+/* we don't need complex calculations here as the pmd is folded into the pgd */
+#define pmd_addr_end(addr,end) (end)
+
+#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* _ASM_PGTABLE_2LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-3level-hwdef.h b/arch/arm/include/asm/pgtable-3level-hwdef.h
new file mode 100644
index 000000000000..d7952824c5c4
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level-hwdef.h
@@ -0,0 +1,77 @@
+/*
+ * arch/arm/include/asm/pgtable-3level-hwdef.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_3LEVEL_HWDEF_H
+#define _ASM_PGTABLE_3LEVEL_HWDEF_H
+
+/*
+ * Hardware page table definitions.
+ *
+ * + Level 1/2 descriptor
+ *   - common
+ */
+#define PMD_TYPE_MASK           (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_FAULT          (_AT(pmdval_t, 0) << 0)
+#define PMD_TYPE_TABLE          (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_SECT           (_AT(pmdval_t, 1) << 0)
+#define PMD_BIT4                (_AT(pmdval_t, 0))
+#define PMD_DOMAIN(x)           (_AT(pmdval_t, 0))
+
+/*
+ *   - section
+ */
+#define PMD_SECT_BUFFERABLE     (_AT(pmdval_t, 1) << 2)
+#define PMD_SECT_CACHEABLE      (_AT(pmdval_t, 1) << 3)
+#define PMD_SECT_S              (_AT(pmdval_t, 3) << 8)
+#define PMD_SECT_AF             (_AT(pmdval_t, 1) << 10)
+#define PMD_SECT_nG             (_AT(pmdval_t, 1) << 11)
+#define PMD_SECT_XN             (_AT(pmdval_t, 1) << 54)
+#define PMD_SECT_AP_WRITE       (_AT(pmdval_t, 0))
+#define PMD_SECT_AP_READ        (_AT(pmdval_t, 0))
+#define PMD_SECT_TEX(x)         (_AT(pmdval_t, 0))
+
+/*
+ * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
+ */
+#define PMD_SECT_UNCACHED       (_AT(pmdval_t, 0) << 2) /* strongly ordered */
+#define PMD_SECT_BUFFERED       (_AT(pmdval_t, 1) << 2) /* normal non-cacheable */
+#define PMD_SECT_WT             (_AT(pmdval_t, 2) << 2) /* normal inner write-through */
+#define PMD_SECT_WB             (_AT(pmdval_t, 3) << 2) /* normal inner write-back */
+#define PMD_SECT_WBWA           (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */
+
+/*
+ * + Level 3 descriptor (PTE)
+ */
+#define PTE_TYPE_MASK           (_AT(pteval_t, 3) << 0)
+#define PTE_TYPE_FAULT          (_AT(pteval_t, 0) << 0)
+#define PTE_TYPE_PAGE           (_AT(pteval_t, 3) << 0)
+#define PTE_BUFFERABLE          (_AT(pteval_t, 1) << 2)         /* AttrIndx[0] */
+#define PTE_CACHEABLE           (_AT(pteval_t, 1) << 3)         /* AttrIndx[1] */
+#define PTE_EXT_SHARED          (_AT(pteval_t, 3) << 8)         /* SH[1:0], inner shareable */
+#define PTE_EXT_AF              (_AT(pteval_t, 1) << 10)        /* Access Flag */
+#define PTE_EXT_NG              (_AT(pteval_t, 1) << 11)        /* nG */
+#define PTE_EXT_XN              (_AT(pteval_t, 1) << 54)        /* XN */
+
+/*
+ * 40-bit physical address supported.
+ */
+#define PHYS_MASK_SHIFT         (40)
+#define PHYS_MASK               ((1ULL << PHYS_MASK_SHIFT) - 1)
+
+#endif
diff --git a/arch/arm/include/asm/pgtable-3level-types.h b/arch/arm/include/asm/pgtable-3level-types.h
new file mode 100644
index 000000000000..921aa30259c4
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level-types.h
@@ -0,0 +1,70 @@
+/*
+ * arch/arm/include/asm/pgtable-3level-types.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_3LEVEL_TYPES_H
+#define _ASM_PGTABLE_3LEVEL_TYPES_H
+
+#include <asm/types.h>
+
+typedef u64 pteval_t;
+typedef u64 pmdval_t;
+typedef u64 pgdval_t;
+
+#undef STRICT_MM_TYPECHECKS
+
+#ifdef STRICT_MM_TYPECHECKS
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { pteval_t pte; } pte_t;
+typedef struct { pmdval_t pmd; } pmd_t;
+typedef struct { pgdval_t pgd; } pgd_t;
+typedef struct { pteval_t pgprot; } pgprot_t;
+
+#define pte_val(x)      ((x).pte)
+#define pmd_val(x)      ((x).pmd)
+#define pgd_val(x)      ((x).pgd)
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) } )
+#define __pmd(x)        ((pmd_t) { (x) } )
+#define __pgd(x)        ((pgd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+
+#else   /* !STRICT_MM_TYPECHECKS */
+
+typedef pteval_t pte_t;
+typedef pmdval_t pmd_t;
+typedef pgdval_t pgd_t;
+typedef pteval_t pgprot_t;
+
+#define pte_val(x)      (x)
+#define pmd_val(x)      (x)
+#define pgd_val(x)      (x)
+#define pgprot_val(x)   (x)
+
+#define __pte(x)        (x)
+#define __pmd(x)        (x)
+#define __pgd(x)        (x)
+#define __pgprot(x)     (x)
+
+#endif  /* STRICT_MM_TYPECHECKS */
+
+#endif  /* _ASM_PGTABLE_3LEVEL_TYPES_H */
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
new file mode 100644
index 000000000000..759af70f9a0a
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -0,0 +1,155 @@
+/*
+ * arch/arm/include/asm/pgtable-3level.h
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_3LEVEL_H
+#define _ASM_PGTABLE_3LEVEL_H
+
+/*
+ * With LPAE, there are 3 levels of page tables. Each level has 512 entries of
+ * 8 bytes each, occupying a 4K page. The first level table covers a range of
+ * 512GB, each entry representing 1GB. Since we are limited to 4GB input
+ * address range, only 4 entries in the PGD are used.
+ *
+ * There are enough spare bits in a page table entry for the kernel specific
+ * state.
+ */
+#define PTRS_PER_PTE            512
+#define PTRS_PER_PMD            512
+#define PTRS_PER_PGD            4
+
+#define PTE_HWTABLE_PTRS        (PTRS_PER_PTE)
+#define PTE_HWTABLE_OFF         (0)
+#define PTE_HWTABLE_SIZE        (PTRS_PER_PTE * sizeof(u64))
+
+/*
+ * PGDIR_SHIFT determines the size a top-level page table entry can map.
+ */
+#define PGDIR_SHIFT             30
+
+/*
+ * PMD_SHIFT determines the size a middle-level page table entry can map.
+ */
+#define PMD_SHIFT               21
+
+#define PMD_SIZE                (1UL << PMD_SHIFT)
+#define PMD_MASK                (~(PMD_SIZE-1))
+#define PGDIR_SIZE              (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK              (~(PGDIR_SIZE-1))
+
+/*
+ * section address mask and size definitions.
+ */
+#define SECTION_SHIFT           21
+#define SECTION_SIZE            (1UL << SECTION_SHIFT)
+#define SECTION_MASK            (~(SECTION_SIZE-1))
+
+#define USER_PTRS_PER_PGD       (PAGE_OFFSET / PGDIR_SIZE)
+
+/*
+ * "Linux" PTE definitions for LPAE.
+ *
+ * These bits overlap with the hardware bits but the naming is preserved for
+ * consistency with the classic page table format.
+ */
+#define L_PTE_PRESENT           (_AT(pteval_t, 3) << 0)         /* Valid */
+#define L_PTE_FILE              (_AT(pteval_t, 1) << 2)         /* only when !PRESENT */
+#define L_PTE_BUFFERABLE        (_AT(pteval_t, 1) << 2)         /* AttrIndx[0] */
+#define L_PTE_CACHEABLE         (_AT(pteval_t, 1) << 3)         /* AttrIndx[1] */
+#define L_PTE_USER              (_AT(pteval_t, 1) << 6)         /* AP[1] */
+#define L_PTE_RDONLY            (_AT(pteval_t, 1) << 7)         /* AP[2] */
+#define L_PTE_SHARED            (_AT(pteval_t, 3) << 8)         /* SH[1:0], inner shareable */
+#define L_PTE_YOUNG             (_AT(pteval_t, 1) << 10)        /* AF */
+#define L_PTE_XN                (_AT(pteval_t, 1) << 54)        /* XN */
+#define L_PTE_DIRTY             (_AT(pteval_t, 1) << 55)        /* unused */
+#define L_PTE_SPECIAL           (_AT(pteval_t, 1) << 56)        /* unused */
+
+/*
+ * To be used in assembly code with the upper page attributes.
+ */
+#define L_PTE_XN_HIGH           (1 << (54 - 32))
+#define L_PTE_DIRTY_HIGH        (1 << (55 - 32))
+
+/*
+ * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
+ */
+#define L_PTE_MT_UNCACHED       (_AT(pteval_t, 0) << 2) /* strongly ordered */
+#define L_PTE_MT_BUFFERABLE     (_AT(pteval_t, 1) << 2) /* normal non-cacheable */
+#define L_PTE_MT_WRITETHROUGH   (_AT(pteval_t, 2) << 2) /* normal inner write-through */
+#define L_PTE_MT_WRITEBACK      (_AT(pteval_t, 3) << 2) /* normal inner write-back */
+#define L_PTE_MT_WRITEALLOC     (_AT(pteval_t, 7) << 2) /* normal inner write-alloc */
+#define L_PTE_MT_DEV_SHARED     (_AT(pteval_t, 4) << 2) /* device */
+#define L_PTE_MT_DEV_NONSHARED  (_AT(pteval_t, 4) << 2) /* device */
+#define L_PTE_MT_DEV_WC         (_AT(pteval_t, 1) << 2) /* normal non-cacheable */
+#define L_PTE_MT_DEV_CACHED     (_AT(pteval_t, 3) << 2) /* normal inner write-back */
+#define L_PTE_MT_MASK           (_AT(pteval_t, 7) << 2)
+
+/*
+ * Software PGD flags.
+ */
+#define L_PGD_SWAPPER           (_AT(pgdval_t, 1) << 55)        /* swapper_pg_dir entry */
+
+#ifndef __ASSEMBLY__
+
+#define pud_none(pud)           (!pud_val(pud))
+#define pud_bad(pud)            (!(pud_val(pud) & 2))
+#define pud_present(pud)        (pud_val(pud))
+
+#define pud_clear(pudp)                 \
+        do {                            \
+                *pudp = __pud(0);       \
+                clean_pmd_entry(pudp);  \
+        } while (0)
+
+#define set_pud(pudp, pud)              \
+        do {                            \
+                *pudp = pud;            \
+                flush_pmd_entry(pudp);  \
+        } while (0)
+
+static inline pmd_t *pud_page_vaddr(pud_t pud)
+{
+        return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
+}
+
+/* Find an entry in the second-level page table.. */
+#define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
+static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
+{
+        return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
+}
+
+#define pmd_bad(pmd)            (!(pmd_val(pmd) & 2))
+
+#define copy_pmd(pmdpd,pmdps)           \
+        do {                            \
+                *pmdpd = *pmdps;        \
+                flush_pmd_entry(pmdpd); \
+        } while (0)
+
+#define pmd_clear(pmdp)                 \
+        do {                            \
+                *pmdp = __pmd(0);       \
+                clean_pmd_entry(pmdp);  \
+        } while (0)
+
+#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext)))
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_PGTABLE_3LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-hwdef.h b/arch/arm/include/asm/pgtable-hwdef.h
index 183111164ce9..8426229ba292 100644
--- a/arch/arm/include/asm/pgtable-hwdef.h
+++ b/arch/arm/include/asm/pgtable-hwdef.h
@@ -10,6 +10,10 @@
 #ifndef _ASMARM_PGTABLE_HWDEF_H
 #define _ASMARM_PGTABLE_HWDEF_H
 
+#ifdef CONFIG_ARM_LPAE
+#include <asm/pgtable-3level-hwdef.h>
+#else
 #include <asm/pgtable-2level-hwdef.h>
+#endif
 
 #endif
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 9451dce3a553..f66626d71e7d 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -11,20 +11,24 @@
 #define _ASMARM_PGTABLE_H
 
 #include <linux/const.h>
-#include <asm-generic/4level-fixup.h>
 #include <asm/proc-fns.h>
 
 #ifndef CONFIG_MMU
 
+#include <asm-generic/4level-fixup.h>
 #include "pgtable-nommu.h"
 
 #else
 
+#include <asm-generic/pgtable-nopud.h>
 #include <asm/memory.h>
-#include <mach/vmalloc.h>
 #include <asm/pgtable-hwdef.h>
 
+#ifdef CONFIG_ARM_LPAE
+#include <asm/pgtable-3level.h>
+#else
 #include <asm/pgtable-2level.h>
+#endif
 
 /*
  * Just any arbitrary offset to the start of the vmalloc VM area: the
@@ -33,15 +37,10 @@
  * any out-of-bounds memory accesses will hopefully be caught.
  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  * area for the same reason. ;)
- *
- * Note that platforms may override VMALLOC_START, but they must provide
- * VMALLOC_END.  VMALLOC_END defines the (exclusive) limit of this space,
- * which may not overlap IO space.
  */
-#ifndef VMALLOC_START
 #define VMALLOC_OFFSET          (8*1024*1024)
 #define VMALLOC_START           (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#endif
+#define VMALLOC_END             0xff000000UL
 
 #define LIBRARY_TEXT_START      0x0c000000
 
@@ -163,39 +162,8 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
 
-/*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
- */
-#define pgd_none(pgd)           (0)
-#define pgd_bad(pgd)            (0)
-#define pgd_present(pgd)        (1)
-#define pgd_clear(pgdp)         do { } while (0)
-#define set_pgd(pgd,pgdp)       do { } while (0)
-#define set_pud(pud,pudp)       do { } while (0)
-
-
-/* Find an entry in the second-level page table.. */
-#define pmd_offset(dir, addr)   ((pmd_t *)(dir))
-
 #define pmd_none(pmd)           (!pmd_val(pmd))
 #define pmd_present(pmd)        (pmd_val(pmd))
-#define pmd_bad(pmd)            (pmd_val(pmd) & 2)
-
-#define copy_pmd(pmdpd,pmdps)           \
-        do {                            \
-                pmdpd[0] = pmdps[0];    \
-                pmdpd[1] = pmdps[1];    \
-                flush_pmd_entry(pmdpd); \
-        } while (0)
-
-#define pmd_clear(pmdp)                 \
-        do {                            \
-                pmdp[0] = __pmd(0);     \
-                pmdp[1] = __pmd(0);     \
-                clean_pmd_entry(pmdp);  \
-        } while (0)
 
 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 {
@@ -204,10 +172,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 
 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
 
-/* we don't need complex calculations here as the pmd is folded into the pgd */
-#define pmd_addr_end(addr,end)  (end)
-
-
 #ifndef CONFIG_HIGHPTE
 #define __pte_map(pmd)          pmd_page_vaddr(*(pmd))
 #define __pte_unmap(pte)        do { } while (0)
@@ -229,7 +193,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 #define pte_page(pte)           pfn_to_page(pte_pfn(pte))
 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page), prot)
 
-#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
 #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
 
 #if __LINUX_ARM_ARCH__ < 6
@@ -336,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
  * We provide our own arch_get_unmapped_area to cope with VIPT caches.
  */
 #define HAVE_ARCH_UNMAPPED_AREA
+#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 
 /*
  * remap a physical page `pfn' of size `size' with page protection `prot'
@@ -346,9 +310,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 
 #define pgtable_cache_init() do { } while (0)
 
-void identity_mapping_add(pgd_t *, unsigned long, unsigned long);
-void identity_mapping_del(pgd_t *, unsigned long, unsigned long);
-
 #endif /* !__ASSEMBLY__ */
 
 #endif /* CONFIG_MMU */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 71d99b83cdb9..b5a5be2536c1 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -27,13 +27,22 @@ enum arm_pmu_type {
 /*
  * struct arm_pmu_platdata - ARM PMU platform data
  *
- * @handle_irq: an optional handler which will be called from the interrupt and
- * passed the address of the low level handler, and can be used to implement
- * any platform specific handling before or after calling it.
+ * @handle_irq: an optional handler which will be called from the
+ *      interrupt and passed the address of the low level handler,
+ *      and can be used to implement any platform specific handling
+ *      before or after calling it.
+ * @enable_irq: an optional handler which will be called after
+ *      request_irq and be used to handle some platform specific
+ *      irq enablement
+ * @disable_irq: an optional handler which will be called before
+ *      free_irq and be used to handle some platform specific
+ *      irq disablement
  */
 struct arm_pmu_platdata {
         irqreturn_t (*handle_irq)(int irq, void *dev,
                                   irq_handler_t pmu_handler);
+        void (*enable_irq)(int irq);
+        void (*disable_irq)(int irq);
 };
 
 #ifdef CONFIG_CPU_HAS_PMU
@@ -55,16 +64,6 @@ reserve_pmu(enum arm_pmu_type type);
 extern void
 release_pmu(enum arm_pmu_type type);
 
-/**
- * init_pmu() - Initialise the PMU.
- *
- * Initialise the system ready for PMU enabling. This should typically set the
- * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do
- * the actual hardware initialisation.
- */
-extern int
-init_pmu(enum arm_pmu_type type);
-
 #else /* CONFIG_CPU_HAS_PMU */
 
 #include <linux/err.h>
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 9e92cb205e65..f3628fb3d2b3 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -65,7 +65,11 @@ extern struct processor {
          * Set a possibly extended PTE.  Non-extended PTEs should
          * ignore 'ext'.
          */
+#ifdef CONFIG_ARM_LPAE
+        void (*set_pte_ext)(pte_t *ptep, pte_t pte);
+#else
         void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
+#endif
 
         /* Suspend/resume */
         unsigned int suspend_size;
@@ -79,7 +83,11 @@ extern void cpu_proc_fin(void);
 extern int cpu_do_idle(void);
 extern void cpu_dcache_clean_area(void *, int);
 extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
+#ifdef CONFIG_ARM_LPAE
+extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
+#else
 extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
+#endif
 extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
 
 /* These three are private to arch/arm/kernel/suspend.c */
@@ -107,6 +115,18 @@ extern void cpu_resume(void);
 
 #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
 
+#ifdef CONFIG_ARM_LPAE
+#define cpu_get_pgd()   \
+        ({                                              \
+                unsigned long pg, pg2;                  \
+                __asm__("mrrc   p15, 0, %0, %1, c2"     \
+                        : "=r" (pg), "=r" (pg2)         \
+                        :                               \
+                        : "cc");                        \
+                pg &= ~(PTRS_PER_PGD*sizeof(pgd_t)-1);  \
+                (pgd_t *)phys_to_virt(pg);              \
+        })
+#else
 #define cpu_get_pgd()   \
         ({                                              \
                 unsigned long pg;                       \
@@ -115,6 +135,7 @@ extern void cpu_resume(void);
                 pg &= ~0x3fff;                          \
                 (pgd_t *)phys_to_virt(pg);              \
         })
+#endif
 
 #endif
 
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index b2d9df5667af..ce280b8d613c 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr)
 
 #endif
 
+#define HAVE_ARCH_PICK_MMAP_LAYOUT
+
 #endif
 
 #endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 6f65ca86a5ec..ee0363307918 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -13,7 +13,6 @@
 
 #ifdef CONFIG_OF
 
-#include <asm/setup.h>
 #include <asm/irq.h>
 
 extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index c8e6ddf3e860..e3f757263438 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -8,113 +8,7 @@
 #ifndef ASM_SCHED_CLOCK
 #define ASM_SCHED_CLOCK
 
-#include <linux/kernel.h>
-#include <linux/types.h>
-
-struct clock_data {
-        u64 epoch_ns;
-        u32 epoch_cyc;
-        u32 epoch_cyc_copy;
-        u32 mult;
-        u32 shift;
-};
-
-#define DEFINE_CLOCK_DATA(name) struct clock_data name
-
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
-{
-        return (cyc * mult) >> shift;
-}
-
-/*
- * Atomically update the sched_clock epoch.  Your update callback will
- * be called from a timer before the counter wraps - read the current
- * counter value, and call this function to safely move the epochs
- * forward.  Only use this from the update callback.
- */
-static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask)
-{
-        unsigned long flags;
-        u64 ns = cd->epoch_ns +
-                cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift);
-
-        /*
-         * Write epoch_cyc and epoch_ns in a way that the update is
-         * detectable in cyc_to_fixed_sched_clock().
-         */
-        raw_local_irq_save(flags);
-        cd->epoch_cyc = cyc;
-        smp_wmb();
-        cd->epoch_ns = ns;
-        smp_wmb();
-        cd->epoch_cyc_copy = cyc;
-        raw_local_irq_restore(flags);
-}
-
-/*
- * If your clock rate is known at compile time, using this will allow
- * you to optimize the mult/shift loads away.  This is paired with
- * init_fixed_sched_clock() to ensure that your mult/shift are correct.
- */
-static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd,
-        u32 cyc, u32 mask, u32 mult, u32 shift)
-{
-        u64 epoch_ns;
-        u32 epoch_cyc;
-
-        /*
-         * Load the epoch_cyc and epoch_ns atomically.  We do this by
-         * ensuring that we always write epoch_cyc, epoch_ns and
-         * epoch_cyc_copy in strict order, and read them in strict order.
-         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
-         * the middle of an update, and we should repeat the load.
-         */
-        do {
-                epoch_cyc = cd->epoch_cyc;
-                smp_rmb();
-                epoch_ns = cd->epoch_ns;
-                smp_rmb();
-        } while (epoch_cyc != cd->epoch_cyc_copy);
-
-        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift);
-}
-
-/*
- * Otherwise, you need to use this, which will obtain the mult/shift
- * from the clock_data structure.  Use init_sched_clock() with this.
- */
-static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
-        u32 cyc, u32 mask)
-{
-        return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift);
-}
-
-/*
- * Initialize the clock data - calculate the appropriate multiplier
- * and shift.  Also setup a timer to ensure that the epoch is refreshed
- * at the appropriate time interval, which will call your update
- * handler.
- */
-void init_sched_clock(struct clock_data *, void (*)(void),
-        unsigned int, unsigned long);
-
-/*
- * Use this initialization function rather than init_sched_clock() if
- * you're using cyc_to_fixed_sched_clock, which will warn if your
- * constants are incorrect.
- */
-static inline void init_fixed_sched_clock(struct clock_data *cd,
-        void (*update)(void), unsigned int bits, unsigned long rate,
-        u32 mult, u32 shift)
-{
-        init_sched_clock(cd, update, bits, rate);
-        if (cd->mult != mult || cd->shift != shift) {
-                pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n"
-                        "sched_clock: fix multiply/shift to avoid scheduler hiccups\n",
-                        mult, shift, cd->mult, cd->shift);
-        }
-}
-
 extern void sched_clock_postinit(void);
+extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
 
 #endif
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 915696dd9c7c..23ebc0c82a39 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn }
 /*
  * Memory map description
  */
-#ifdef CONFIG_ARCH_EP93XX
-# define NR_BANKS 16
-#else
-# define NR_BANKS 8
-#endif
+#define NR_BANKS        CONFIG_ARM_NR_BANKS
 
 struct membank {
         phys_addr_t start;
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h
index 90ffd04b8e74..dec6f9afb3cf 100644
--- a/arch/arm/include/asm/socket.h
+++ b/arch/arm/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index 9997ad20eff1..32ee164a2f6b 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -24,12 +24,13 @@
 
 #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6
 
-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
 {
         __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x));
         return x;
 }
-#define __arch_swab16 __arch_swab16
+#define __arch_swahb32 __arch_swahb32
+#define __arch_swab16(x) ((__u16)__arch_swahb32(x))
 
 static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 {
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 984014b92647..e4c96cc6ec0c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -80,6 +80,14 @@ struct siginfo;
 void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
                 unsigned long err, unsigned long trap);
 
+#ifdef CONFIG_ARM_LPAE
+#define FAULT_CODE_ALIGNMENT    33
+#define FAULT_CODE_DEBUG        34
+#else
+#define FAULT_CODE_ALIGNMENT    1
+#define FAULT_CODE_DEBUG        2
+#endif
+
 void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
                                        struct pt_regs *),
                      int sig, int code, const char *name);
@@ -100,7 +108,7 @@ extern void __show_regs(struct pt_regs *);
 extern int __pure cpu_architecture(void);
 extern void cpu_init(void);
 
-void arm_machine_restart(char mode, const char *cmd);
+void soft_restart(unsigned long);
 extern void (*arm_pm_restart)(char str, const char *cmd);
 
 #define UDBG_UNDEFINED  (1 << 0)
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index 7b5cc8dae06e..0f30c3a78fc1 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -142,7 +142,6 @@ extern void vfp_flush_hwstate(struct thread_info *);
 #define TIF_POLLING_NRFLAG      16
 #define TIF_USING_IWMMXT        17
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
-#define TIF_FREEZE              19
 #define TIF_RESTORE_SIGMASK     20
 #define TIF_SECCOMP             21
 
@@ -152,7 +151,6 @@ extern void vfp_flush_hwstate(struct thread_info *);
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_USING_IWMMXT       (1 << TIF_USING_IWMMXT)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
 
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 265f908c4a6e..5d3ed7e38561 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -202,8 +202,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
         tlb_remove_page(tlb, pte);
 }
 
+static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
+                                  unsigned long addr)
+{
+#ifdef CONFIG_ARM_LPAE
+        tlb_add_flush(tlb, addr);
+        tlb_remove_page(tlb, virt_to_page(pmdp));
+#endif
+}
+
 #define pte_free_tlb(tlb, ptep, addr)   __pte_free_tlb(tlb, ptep, addr)
-#define pmd_free_tlb(tlb, pmdp, addr)   pmd_free((tlb)->mm, pmdp)
+#define pmd_free_tlb(tlb, pmdp, addr)   __pmd_free_tlb(tlb, pmdp, addr)
+#define pud_free_tlb(tlb, pudp, addr)   pud_free((tlb)->mm, pudp)
 
 #define tlb_migrate_finish(mm)          do { } while (0)
 
diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
index a7e457ed27c3..58b8b84adcd2 100644
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -25,7 +25,7 @@ extern struct cputopo_arm cpu_topology[NR_CPUS];
 
 void init_cpu_topology(void);
 void store_cpu_topology(unsigned int cpuid);
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
+const struct cpumask *cpu_coregroup_mask(int cpu);
 
 #else
 
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
index 48192ac3a23a..28beab917ffc 100644
--- a/arch/arm/include/asm/types.h
+++ b/arch/arm/include/asm/types.h
@@ -3,12 +3,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index c60a2944f95b..4a1123783806 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -402,6 +402,8 @@
 #define __NR_syncfs                     (__NR_SYSCALL_BASE+373)
 #define __NR_sendmmsg                   (__NR_SYSCALL_BASE+374)
 #define __NR_setns                      (__NR_SYSCALL_BASE+375)
+#define __NR_process_vm_readv           (__NR_SYSCALL_BASE+376)
+#define __NR_process_vm_writev          (__NR_SYSCALL_BASE+377)
 
 /*
  * The following SWIs are ARM private.
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h
index a5edf421005c..d1c3f3a71c94 100644
--- a/arch/arm/include/asm/unwind.h
+++ b/arch/arm/include/asm/unwind.h
@@ -30,14 +30,15 @@ enum unwind_reason_code {
 };
 
 struct unwind_idx {
-        unsigned long addr;
+        unsigned long addr_offset;
         unsigned long insn;
 };
 
 struct unwind_table {
         struct list_head list;
-        struct unwind_idx *start;
-        struct unwind_idx *stop;
+        const struct unwind_idx *start;
+        const struct unwind_idx *origin;
+        const struct unwind_idx *stop;
         unsigned long begin_addr;
         unsigned long end_addr;
 };
@@ -49,15 +50,6 @@ extern struct unwind_table *unwind_table_add(unsigned long start,
 extern void unwind_table_del(struct unwind_table *tab);
 extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk);
 
-#ifdef CONFIG_ARM_UNWIND
-extern int __init unwind_init(void);
-#else
-static inline int __init unwind_init(void)
-{
-        return 0;
-}
-#endif
-
 #endif  /* !__ASSEMBLY__ */
 
 #ifdef CONFIG_ARM_UNWIND
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 16eed6aebfa4..43b740d0e374 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg
 
 # Object file lists.
 
-obj-y           := elf.o entry-armv.o entry-common.o irq.o \
+obj-y           := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
                    process.o ptrace.o return_address.o setup.o signal.o \
                    sys_arm.o stacktrace.o time.o traps.o
 
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 9943e9e74a1b..463ff4a0ec8a 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -385,6 +385,8 @@
                 CALL(sys_syncfs)
                 CALL(sys_sendmmsg)
 /* 375 */       CALL(sys_setns)
+                CALL(sys_process_vm_readv)
+                CALL(sys_process_vm_writev)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 9ad50c4208ae..3a456c6c7005 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -36,12 +36,11 @@
 #ifdef CONFIG_MULTI_IRQ_HANDLER
         ldr     r1, =handle_arch_irq
         mov     r0, sp
-        ldr     r1, [r1]
         adr     lr, BSYM(9997f)
-        teq     r1, #0
-        movne   pc, r1
-#endif
+        ldr     pc, [r1]
+#else
         arch_irq_handler_default
+#endif
 9997:
         .endm
 
@@ -497,7 +496,7 @@ ENDPROC(__und_usr)
         .popsection
         .pushsection __ex_table,"a"
         .long   1b, 4b
-#if __LINUX_ARM_ARCH__ >= 7
+#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
         .long   2b, 4b
         .long   3b, 4b
 #endif
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 566c54c2a1fe..14e277d2ff91 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -39,8 +39,14 @@
 #error KERNEL_RAM_VADDR must start at 0xXXXX8000
 #endif
 
+#ifdef CONFIG_ARM_LPAE
+        /* LPAE requires an additional page for the PGD */
+#define PG_DIR_SIZE     0x5000
+#define PMD_ORDER       3
+#else
 #define PG_DIR_SIZE     0x4000
 #define PMD_ORDER       2
+#endif
 
         .globl  swapper_pg_dir
         .equ    swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
@@ -164,17 +170,36 @@ __create_page_tables:
         teq     r0, r6
         bne     1b
 
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Build the PGD table (first level) to point to the PMD table. A PGD
+         * entry is 64-bit wide.
+         */
+        mov     r0, r4
+        add     r3, r4, #0x1000                 @ first PMD table address
+        orr     r3, r3, #3                      @ PGD block type
+        mov     r6, #4                          @ PTRS_PER_PGD
+        mov     r7, #1 << (55 - 32)             @ L_PGD_SWAPPER
+1:      str     r3, [r0], #4                    @ set bottom PGD entry bits
+        str     r7, [r0], #4                    @ set top PGD entry bits
+        add     r3, r3, #0x1000                 @ next PMD table
+        subs    r6, r6, #1
+        bne     1b
+
+        add     r4, r4, #0x1000                 @ point to the PMD tables
+#endif
+
         ldr     r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
 
         /*
          * Create identity mapping to cater for __enable_mmu.
          * This identity mapping will be removed by paging_init().
          */
-        adr     r0, __enable_mmu_loc
+        adr     r0, __turn_mmu_on_loc
         ldmia   r0, {r3, r5, r6}
         sub     r0, r0, r3                      @ virt->phys offset
-        add     r5, r5, r0                      @ phys __enable_mmu
-        add     r6, r6, r0                      @ phys __enable_mmu_end
+        add     r5, r5, r0                      @ phys __turn_mmu_on
+        add     r6, r6, r0                      @ phys __turn_mmu_on_end
         mov     r5, r5, lsr #SECTION_SHIFT
         mov     r6, r6, lsr #SECTION_SHIFT
 
@@ -219,8 +244,8 @@ __create_page_tables:
 #endif
 
         /*
-         * Then map boot params address in r2 or
-         * the first 1MB of ram if boot params address is not specified.
+         * Then map boot params address in r2 or the first 1MB (2MB with LPAE)
+         * of ram if boot params address is not specified.
          */
         mov     r0, r2, lsr #SECTION_SHIFT
         movs    r0, r0, lsl #SECTION_SHIFT
@@ -251,7 +276,15 @@ __create_page_tables:
         mov     r3, r7, lsr #SECTION_SHIFT
         ldr     r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
         orr     r3, r7, r3, lsl #SECTION_SHIFT
+#ifdef CONFIG_ARM_LPAE
+        mov     r7, #1 << (54 - 32)             @ XN
+#else
+        orr     r3, r3, #PMD_SECT_XN
+#endif
 1:      str     r3, [r0], #4
+#ifdef CONFIG_ARM_LPAE
+        str     r7, [r0], #4
+#endif
         add     r3, r3, #1 << SECTION_SHIFT
         cmp     r0, r6
         blo     1b
@@ -283,14 +316,17 @@ __create_page_tables:
         str     r3, [r0]
 #endif
 #endif
+#ifdef CONFIG_ARM_LPAE
+        sub     r4, r4, #0x1000         @ point to the PGD table
+#endif
         mov     pc, lr
 ENDPROC(__create_page_tables)
         .ltorg
         .align
-__enable_mmu_loc:
+__turn_mmu_on_loc:
         .long   .
-        .long   __enable_mmu
-        .long   __enable_mmu_end
+        .long   __turn_mmu_on
+        .long   __turn_mmu_on_end
 
 #if defined(CONFIG_SMP)
         __CPUINIT
@@ -360,7 +396,7 @@ __secondary_data:
  *  r13 = *virtual* address to jump to upon completion
  */
 __enable_mmu:
-#ifdef CONFIG_ALIGNMENT_TRAP
+#if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
         orr     r0, r0, #CR_A
 #else
         bic     r0, r0, #CR_A
@@ -374,12 +410,17 @@ __enable_mmu:
 #ifdef CONFIG_CPU_ICACHE_DISABLE
         bic     r0, r0, #CR_I
 #endif
+#ifdef CONFIG_ARM_LPAE
+        mov     r5, #0
+        mcrr    p15, 0, r4, r5, c2              @ load TTBR0
+#else
         mov     r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
                       domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
                       domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \
                       domain_val(DOMAIN_IO, DOMAIN_CLIENT))
         mcr     p15, 0, r5, c3, c0, 0           @ load domain access register
         mcr     p15, 0, r4, c2, c0, 0           @ load page table pointer
+#endif
         b       __turn_mmu_on
 ENDPROC(__enable_mmu)
 
@@ -398,15 +439,19 @@ ENDPROC(__enable_mmu)
  * other registers depend on the function called upon completion
  */
         .align  5
-__turn_mmu_on:
+        .pushsection    .idmap.text, "ax"
+ENTRY(__turn_mmu_on)
         mov     r0, r0
+        instr_sync
         mcr     p15, 0, r0, c1, c0, 0           @ write control reg
         mrc     p15, 0, r3, c0, c0, 0           @ read id reg
+        instr_sync
         mov     r3, r3
         mov     r3, r13
         mov     pc, r3
-__enable_mmu_end:
+__turn_mmu_on_end:
 ENDPROC(__turn_mmu_on)
+        .popsection
 
 
 #ifdef CONFIG_SMP_ON_UP
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 814a52a9dc39..d6a95ef9131d 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void)
         }
 
         /* Register debug fault handler. */
-        hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
-                        "watchpoint debug exception");
-        hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
-                        "breakpoint debug exception");
+        hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
+                        TRAP_HWBKPT, "watchpoint debug exception");
+        hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
+                        TRAP_HWBKPT, "breakpoint debug exception");
 
         /* Register hotplug notifier. */
         register_cpu_notifier(&dbg_reset_nb);
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c
index 9fe8910308af..8a30c89da70e 100644
--- a/arch/arm/kernel/kprobes-arm.c
+++ b/arch/arm/kernel/kprobes-arm.c
@@ -519,10 +519,12 @@ static const union decode_item arm_cccc_0000_____1001_table[] = {
 static const union decode_item arm_cccc_0001_____1001_table[] = {
         /* Synchronization primitives                                   */
 
+#if __LINUX_ARM_ARCH__ < 6
+        /* Deprecated on ARMv6 and may be UNDEFINED on v7               */
         /* SMP/SWPB             cccc 0001 0x00 xxxx xxxx xxxx 1001 xxxx */
         DECODE_EMULATEX (0x0fb000f0, 0x01000090, emulate_rd12rn16rm0_rwflags_nopc,
                                                  REGS(NOPC, NOPC, 0, 0, NOPC)),
-
+#endif
         /* LDREX/STREX{,D,B,H}  cccc 0001 1xxx xxxx xxxx xxxx 1001 xxxx */
         /* And unallocated instructions...                              */
         DECODE_END
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index fc82de8bdcce..ba32b393b3f0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -427,18 +427,25 @@ void kprobe_arm_test_cases(void)
 
         TEST_GROUP("Synchronization primitives")
 
-        /*
-         * Use hard coded constants for SWP instructions to avoid warnings
-         * about deprecated instructions.
-         */
-        TEST_RP( ".word 0xe108e097 @ swp        lr, r",7,VAL2,", [r",8,0,"]")
-        TEST_R(  ".word 0x610d0091 @ swpvs      r0, r",1,VAL1,", [sp]")
-        TEST_RP( ".word 0xe10cd09e @ swp        sp, r",14,VAL2,", [r",12,13*4,"]")
+#if __LINUX_ARM_ARCH__ < 6
+        TEST_RP("swp    lr, r",7,VAL2,", [r",8,0,"]")
+        TEST_R( "swpvs  r0, r",1,VAL1,", [sp]")
+        TEST_RP("swp    sp, r",14,VAL2,", [r",12,13*4,"]")
+#else
+        TEST_UNSUPPORTED(".word 0xe108e097 @ swp        lr, r7, [r8]")
+        TEST_UNSUPPORTED(".word 0x610d0091 @ swpvs      r0, r1, [sp]")
+        TEST_UNSUPPORTED(".word 0xe10cd09e @ swp        sp, r14 [r12]")
+#endif
         TEST_UNSUPPORTED(".word 0xe102f091 @ swp pc, r1, [r2]")
         TEST_UNSUPPORTED(".word 0xe102009f @ swp r0, pc, [r2]")
         TEST_UNSUPPORTED(".word 0xe10f0091 @ swp r0, r1, [pc]")
-        TEST_RP( ".word 0xe148e097 @ swpb       lr, r",7,VAL2,", [r",8,0,"]")
-        TEST_R(  ".word 0x614d0091 @ swpvsb     r0, r",1,VAL1,", [sp]")
+#if __LINUX_ARM_ARCH__ < 6
+        TEST_RP("swpb   lr, r",7,VAL2,", [r",8,0,"]")
+        TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
+#else
+        TEST_UNSUPPORTED(".word 0xe148e097 @ swpb       lr, r7, [r8]")
+        TEST_UNSUPPORTED(".word 0x614d0091 @ swpvsb     r0, r1, [sp]")
+#endif
         TEST_UNSUPPORTED(".word 0xe142f091 @ swpb pc, r1, [r2]")
 
         TEST_UNSUPPORTED(".word 0xe1100090") /* Unallocated space */
@@ -550,7 +557,7 @@ void kprobe_arm_test_cases(void)
         TEST_RPR(  "strccd      r",8, VAL2,", [r",13,0, ", r",12,48,"]")
         TEST_RPR(  "strd        r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
         TEST_RPR(  "strcsd      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
-        TEST_RPR(  "strd        r",2, VAL1,", [r",3, 24,"], r",4,48,"")
+        TEST_RPR(  "strd        r",2, VAL1,", [r",5, 24,"], r",4,48,"")
         TEST_RPR(  "strd        r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
         TEST_UNSUPPORTED(".word 0xe1afc0fa      @ strd r12, [pc, r10]!")
 
diff --git a/arch/arm/kernel/kprobes-test-thumb.c b/arch/arm/kernel/kprobes-test-thumb.c
index 5e726c31c45a..5d8b85792222 100644
--- a/arch/arm/kernel/kprobes-test-thumb.c
+++ b/arch/arm/kernel/kprobes-test-thumb.c
@@ -222,8 +222,8 @@ void kprobe_thumb16_test_cases(void)
 DONT_TEST_IN_ITBLOCK(
         TEST_BF_R(  "cbnz       r",0,0, ", 2f")
         TEST_BF_R(  "cbz        r",2,-1,", 2f")
-        TEST_BF_RX( "cbnz       r",4,1, ", 2f",0x20)
-        TEST_BF_RX( "cbz        r",7,0, ", 2f",0x40)
+        TEST_BF_RX( "cbnz       r",4,1, ", 2f", SPACE_0x20)
+        TEST_BF_RX( "cbz        r",7,0, ", 2f", SPACE_0x40)
 )
         TEST_R("sxth    r0, r",7, HH1,"")
         TEST_R("sxth    r7, r",0, HH2,"")
@@ -246,7 +246,7 @@ DONT_TEST_IN_ITBLOCK(
         TESTCASE_START(code)            \
         TEST_ARG_PTR(13, offset)        \
         TEST_ARG_END("")                \
-        TEST_BRANCH_F(code,0)           \
+        TEST_BRANCH_F(code)             \
         TESTCASE_END
 
         TEST("push      {r0}")
@@ -319,8 +319,8 @@ CONDITION_INSTRUCTIONS(8,
 
         TEST_BF(  "b    2f")
         TEST_BB(  "b    2b")
-        TEST_BF_X("b    2f", 0x400)
-        TEST_BB_X("b    2b", 0x400)
+        TEST_BF_X("b    2f", SPACE_0x400)
+        TEST_BB_X("b    2b", SPACE_0x400)
 
         TEST_GROUP("Testing instructions in IT blocks")
 
@@ -746,7 +746,7 @@ CONDITION_INSTRUCTIONS(22,
         TEST_BB("bne.w  2b")
         TEST_BF("bgt.w  2f")
         TEST_BB("blt.w  2b")
-        TEST_BF_X("bpl.w        2f",0x1000)
+        TEST_BF_X("bpl.w        2f", SPACE_0x1000)
 )
 
         TEST_UNSUPPORTED("msr   cpsr, r0")
@@ -786,11 +786,11 @@ CONDITION_INSTRUCTIONS(22,
 
         TEST_BF(  "b.w  2f")
         TEST_BB(  "b.w  2b")
-        TEST_BF_X("b.w  2f", 0x1000)
+        TEST_BF_X("b.w  2f", SPACE_0x1000)
 
         TEST_BF(  "bl.w 2f")
         TEST_BB(  "bl.w 2b")
-        TEST_BB_X("bl.w 2b", 0x1000)
+        TEST_BB_X("bl.w 2b", SPACE_0x1000)
 
         TEST_X( "blx    __dummy_arm_subroutine",
                 ".arm                           \n\t"
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index e17cdd6d90d8..1862d8f2fd44 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -202,6 +202,8 @@
 #include <linux/slab.h>
 #include <linux/kprobes.h>
 
+#include <asm/opcodes.h>
+
 #include "kprobes.h"
 #include "kprobes-test.h"
 
@@ -1050,65 +1052,9 @@ static int test_instance;
 
 static unsigned long test_check_cc(int cc, unsigned long cpsr)
 {
-        unsigned long temp;
-
-        switch (cc) {
-        case 0x0: /* eq */
-                return cpsr & PSR_Z_BIT;
-
-        case 0x1: /* ne */
-                return (~cpsr) & PSR_Z_BIT;
-
-        case 0x2: /* cs */
-                return cpsr & PSR_C_BIT;
-
-        case 0x3: /* cc */
-                return (~cpsr) & PSR_C_BIT;
-
-        case 0x4: /* mi */
-                return cpsr & PSR_N_BIT;
-
-        case 0x5: /* pl */
-                return (~cpsr) & PSR_N_BIT;
-
-        case 0x6: /* vs */
-                return cpsr & PSR_V_BIT;
-
-        case 0x7: /* vc */
-                return (~cpsr) & PSR_V_BIT;
+        int ret = arm_check_condition(cc << 28, cpsr);
 
-        case 0x8: /* hi */
-                cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
-                return cpsr & PSR_C_BIT;
-
-        case 0x9: /* ls */
-                cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
-                return (~cpsr) & PSR_C_BIT;
-
-        case 0xa: /* ge */
-                cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                return (~cpsr) & PSR_N_BIT;
-
-        case 0xb: /* lt */
-                cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                return cpsr & PSR_N_BIT;
-
-        case 0xc: /* gt */
-                temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                temp |= (cpsr << 1);       /* PSR_N_BIT |= PSR_Z_BIT */
-                return (~temp) & PSR_N_BIT;
-
-        case 0xd: /* le */
-                temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                temp |= (cpsr << 1);       /* PSR_N_BIT |= PSR_Z_BIT */
-                return temp & PSR_N_BIT;
-
-        case 0xe: /* al */
-        case 0xf: /* unconditional */
-                return true;
-        }
-        BUG();
-        return false;
+        return (ret != ARM_OPCODE_CONDTEST_FAIL);
 }
 
 static int is_last_scenario;
@@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario)
 
         if (!test_case_is_thumb) {
                 /* Testing ARM code */
-                probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0;
+                int cc = current_instruction >> 28;
+
+                probe_should_run = test_check_cc(cc, cpsr) != 0;
                 if (scenario == 15)
                         is_last_scenario = true;
 
diff --git a/arch/arm/kernel/kprobes-test.h b/arch/arm/kernel/kprobes-test.h
index 0dc5d77b9356..e28a869b1ae4 100644
--- a/arch/arm/kernel/kprobes-test.h
+++ b/arch/arm/kernel/kprobes-test.h
@@ -149,23 +149,31 @@ struct test_arg_end {
         "1:     "instruction"                           \n\t"   \
         "       nop                                     \n\t"
 
-#define TEST_BRANCH_F(instruction, xtra_dist)                   \
+#define TEST_BRANCH_F(instruction)                              \
         TEST_INSTRUCTION(instruction)                           \
-        ".if "#xtra_dist"                               \n\t"   \
         "       b       99f                             \n\t"   \
-        ".space "#xtra_dist"                            \n\t"   \
-        ".endif                                         \n\t"   \
+        "2:     nop                                     \n\t"
+
+#define TEST_BRANCH_B(instruction)                              \
+        "       b       50f                             \n\t"   \
+        "       b       99f                             \n\t"   \
+        "2:     nop                                     \n\t"   \
+        "       b       99f                             \n\t"   \
+        TEST_INSTRUCTION(instruction)
+
+#define TEST_BRANCH_FX(instruction, codex)                      \
+        TEST_INSTRUCTION(instruction)                           \
+        "       b       99f                             \n\t"   \
+        codex"                                          \n\t"   \
         "       b       99f                             \n\t"   \
         "2:     nop                                     \n\t"
 
-#define TEST_BRANCH_B(instruction, xtra_dist)                   \
+#define TEST_BRANCH_BX(instruction, codex)                      \
         "       b       50f                             \n\t"   \
         "       b       99f                             \n\t"   \
         "2:     nop                                     \n\t"   \
         "       b       99f                             \n\t"   \
-        ".if "#xtra_dist"                               \n\t"   \
-        ".space "#xtra_dist"                            \n\t"   \
-        ".endif                                         \n\t"   \
+        codex"                                          \n\t"   \
         TEST_INSTRUCTION(instruction)
 
 #define TESTCASE_END                                            \
@@ -301,47 +309,60 @@ struct test_arg_end {
         TESTCASE_START(code1 #reg1 code2)       \
         TEST_ARG_PTR(reg1, val1)                \
         TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code1 #reg1 code2, 0)     \
+        TEST_BRANCH_F(code1 #reg1 code2)        \
         TESTCASE_END
 
-#define TEST_BF_X(code, xtra_dist)              \
+#define TEST_BF(code)                           \
         TESTCASE_START(code)                    \
         TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code, xtra_dist)          \
+        TEST_BRANCH_F(code)                     \
         TESTCASE_END
 
-#define TEST_BB_X(code, xtra_dist)              \
+#define TEST_BB(code)                           \
         TESTCASE_START(code)                    \
         TEST_ARG_END("")                        \
-        TEST_BRANCH_B(code, xtra_dist)          \
+        TEST_BRANCH_B(code)                     \
         TESTCASE_END
 
-#define TEST_BF_RX(code1, reg, val, code2, xtra_dist)   \
-        TESTCASE_START(code1 #reg code2)                \
-        TEST_ARG_REG(reg, val)                          \
-        TEST_ARG_END("")                                \
-        TEST_BRANCH_F(code1 #reg code2, xtra_dist)      \
+#define TEST_BF_R(code1, reg, val, code2)       \
+        TESTCASE_START(code1 #reg code2)        \
+        TEST_ARG_REG(reg, val)                  \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_F(code1 #reg code2)         \
         TESTCASE_END
 
-#define TEST_BB_RX(code1, reg, val, code2, xtra_dist)   \
-        TESTCASE_START(code1 #reg code2)                \
-        TEST_ARG_REG(reg, val)                          \
-        TEST_ARG_END("")                                \
-        TEST_BRANCH_B(code1 #reg code2, xtra_dist)      \
+#define TEST_BB_R(code1, reg, val, code2)       \
+        TESTCASE_START(code1 #reg code2)        \
+        TEST_ARG_REG(reg, val)                  \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_B(code1 #reg code2)         \
         TESTCASE_END
 
-#define TEST_BF(code)   TEST_BF_X(code, 0)
-#define TEST_BB(code)   TEST_BB_X(code, 0)
-
-#define TEST_BF_R(code1, reg, val, code2) TEST_BF_RX(code1, reg, val, code2, 0)
-#define TEST_BB_R(code1, reg, val, code2) TEST_BB_RX(code1, reg, val, code2, 0)
-
 #define TEST_BF_RR(code1, reg1, val1, code2, reg2, val2, code3) \
         TESTCASE_START(code1 #reg1 code2 #reg2 code3)           \
         TEST_ARG_REG(reg1, val1)                                \
         TEST_ARG_REG(reg2, val2)                                \
         TEST_ARG_END("")                                        \
-        TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3, 0)         \
+        TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3)            \
+        TESTCASE_END
+
+#define TEST_BF_X(code, codex)                  \
+        TESTCASE_START(code)                    \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_FX(code, codex)             \
+        TESTCASE_END
+
+#define TEST_BB_X(code, codex)                  \
+        TESTCASE_START(code)                    \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_BX(code, codex)             \
+        TESTCASE_END
+
+#define TEST_BF_RX(code1, reg, val, code2, codex)       \
+        TESTCASE_START(code1 #reg code2)                \
+        TEST_ARG_REG(reg, val)                          \
+        TEST_ARG_END("")                                \
+        TEST_BRANCH_FX(code1 #reg code2, codex)         \
         TESTCASE_END
 
 #define TEST_X(code, codex)                     \
@@ -372,6 +393,25 @@ struct test_arg_end {
         TESTCASE_END
 
 
+/*
+ * Macros for defining space directives spread over multiple lines.
+ * These are required so the compiler guesses better the length of inline asm
+ * code and will spill the literal pool early enough to avoid generating PC
+ * relative loads with out of range offsets.
+ */
+#define TWICE(x)        x x
+#define SPACE_0x8       TWICE(".space 4\n\t")
+#define SPACE_0x10      TWICE(SPACE_0x8)
+#define SPACE_0x20      TWICE(SPACE_0x10)
+#define SPACE_0x40      TWICE(SPACE_0x20)
+#define SPACE_0x80      TWICE(SPACE_0x40)
+#define SPACE_0x100     TWICE(SPACE_0x80)
+#define SPACE_0x200     TWICE(SPACE_0x100)
+#define SPACE_0x400     TWICE(SPACE_0x200)
+#define SPACE_0x800     TWICE(SPACE_0x400)
+#define SPACE_0x1000    TWICE(SPACE_0x800)
+
+
 /* Various values used in test cases... */
 #define N(val)  (val ^ 0xffffffff)
 #define VAL1    0x12345678
diff --git a/arch/arm/kernel/leds.c b/arch/arm/kernel/leds.c
index 0bcd38341573..1911dae19e4f 100644
--- a/arch/arm/kernel/leds.c
+++ b/arch/arm/kernel/leds.c
@@ -9,7 +9,7 @@
  */
 #include <linux/export.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/string.h>
 
@@ -34,8 +34,8 @@ static const struct leds_evt_name evt_names[] = {
         { "red",   led_red_on,   led_red_off   },
 };
 
-static ssize_t leds_store(struct sys_device *dev,
-                        struct sysdev_attribute *attr,
+static ssize_t leds_store(struct device *dev,
+                        struct device_attribute *attr,
                         const char *buf, size_t size)
 {
         int ret = -EINVAL, len = strcspn(buf, " ");
@@ -69,15 +69,16 @@ static ssize_t leds_store(struct sys_device *dev,
         return ret;
 }
 
-static SYSDEV_ATTR(event, 0200, NULL, leds_store);
+static DEVICE_ATTR(event, 0200, NULL, leds_store);
 
-static struct sysdev_class leds_sysclass = {
+static struct bus_type leds_subsys = {
         .name           = "leds",
+        .dev_name       = "leds",
 };
 
-static struct sys_device leds_device = {
+static struct device leds_device = {
         .id             = 0,
-        .cls            = &leds_sysclass,
+        .bus            = &leds_subsys,
 };
 
 static int leds_suspend(void)
@@ -105,11 +106,11 @@ static struct syscore_ops leds_syscore_ops = {
 static int __init leds_init(void)
 {
         int ret;
-        ret = sysdev_class_register(&leds_sysclass);
+        ret = subsys_system_register(&leds_subsys, NULL);
         if (ret == 0)
-                ret = sysdev_register(&leds_device);
+                ret = device_register(&leds_device);
         if (ret == 0)
-                ret = sysdev_create_file(&leds_device, &attr_event);
+                ret = device_create_file(&leds_device, &dev_attr_event);
         if (ret == 0)
                 register_syscore_ops(&leds_syscore_ops);
         return ret;
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index c1b4463dcc83..764bd456d84f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -12,12 +12,11 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 #include <asm/mach-types.h>
+#include <asm/system.h>
 
 extern const unsigned char relocate_new_kernel[];
 extern const unsigned int relocate_new_kernel_size;
 
-extern void setup_mm_for_reboot(char mode);
-
 extern unsigned long kexec_start_address;
 extern unsigned long kexec_indirection_page;
 extern unsigned long kexec_mach_type;
@@ -32,24 +31,6 @@ static atomic_t waiting_for_crash_ipi;
 
 int machine_kexec_prepare(struct kimage *image)
 {
-        unsigned long page_list;
-        void *reboot_code_buffer;
-        page_list = image->head & PAGE_MASK;
-
-        reboot_code_buffer = page_address(image->control_code_page);
-
-        /* Prepare parameters for reboot_code_buffer*/
-        kexec_start_address = image->start;
-        kexec_indirection_page = page_list;
-        kexec_mach_type = machine_arch_type;
-        kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
-
-        /* copy our kernel relocation code to the control code page */
-        memcpy(reboot_code_buffer,
-               relocate_new_kernel, relocate_new_kernel_size);
-
-        flush_icache_range((unsigned long) reboot_code_buffer,
-                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         return 0;
 }
 
@@ -100,26 +81,35 @@ void (*kexec_reinit)(void);
 
 void machine_kexec(struct kimage *image)
 {
+        unsigned long page_list;
         unsigned long reboot_code_buffer_phys;
         void *reboot_code_buffer;
 
+
+        page_list = image->head & PAGE_MASK;
+
         /* we need both effective and real address here */
         reboot_code_buffer_phys =
             page_to_pfn(image->control_code_page) << PAGE_SHIFT;
         reboot_code_buffer = page_address(image->control_code_page);
 
+        /* Prepare parameters for reboot_code_buffer*/
+        kexec_start_address = image->start;
+        kexec_indirection_page = page_list;
+        kexec_mach_type = machine_arch_type;
+        kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
+
+        /* copy our kernel relocation code to the control code page */
+        memcpy(reboot_code_buffer,
+               relocate_new_kernel, relocate_new_kernel_size);
+
+
+        flush_icache_range((unsigned long) reboot_code_buffer,
+                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         printk(KERN_INFO "Bye!\n");
 
         if (kexec_reinit)
                 kexec_reinit();
-        local_irq_disable();
-        local_fiq_disable();
-        setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/
-        flush_cache_all();
-        outer_flush_all();
-        outer_disable();
-        cpu_proc_fin();
-        outer_inv_all();
-        flush_cache_all();
-        cpu_reset(reboot_code_buffer_phys);
+
+        soft_restart(reboot_code_buffer_phys);
 }
diff --git a/arch/arm/kernel/opcodes.c b/arch/arm/kernel/opcodes.c
new file mode 100644
index 000000000000..f8179c6a817f
--- /dev/null
+++ b/arch/arm/kernel/opcodes.c
@@ -0,0 +1,72 @@
+/*
+ *  linux/arch/arm/kernel/opcodes.c
+ *
+ *  A32 condition code lookup feature moved from nwfpe/fpopcode.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <asm/opcodes.h>
+
+#define ARM_OPCODE_CONDITION_UNCOND 0xf
+
+/*
+ * condition code lookup table
+ * index into the table is test code: EQ, NE, ... LT, GT, AL, NV
+ *
+ * bit position in short is condition code: NZCV
+ */
+static const unsigned short cc_map[16] = {
+        0xF0F0,                 /* EQ == Z set            */
+        0x0F0F,                 /* NE                     */
+        0xCCCC,                 /* CS == C set            */
+        0x3333,                 /* CC                     */
+        0xFF00,                 /* MI == N set            */
+        0x00FF,                 /* PL                     */
+        0xAAAA,                 /* VS == V set            */
+        0x5555,                 /* VC                     */
+        0x0C0C,                 /* HI == C set && Z clear */
+        0xF3F3,                 /* LS == C clear || Z set */
+        0xAA55,                 /* GE == (N==V)           */
+        0x55AA,                 /* LT == (N!=V)           */
+        0x0A05,                 /* GT == (!Z && (N==V))   */
+        0xF5FA,                 /* LE == (Z || (N!=V))    */
+        0xFFFF,                 /* AL always              */
+        0                       /* NV                     */
+};
+
+/*
+ * Returns:
+ * ARM_OPCODE_CONDTEST_FAIL   - if condition fails
+ * ARM_OPCODE_CONDTEST_PASS   - if condition passes (including AL)
+ * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional
+ *                              opcode space from v5 onwards
+ *
+ * Code that tests whether a conditional instruction would pass its condition
+ * check should check that return value == ARM_OPCODE_CONDTEST_PASS.
+ *
+ * Code that tests if a condition means that the instruction would be executed
+ * (regardless of conditional or unconditional) should instead check that the
+ * return value != ARM_OPCODE_CONDTEST_FAIL.
+ */
+asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr)
+{
+        u32 cc_bits  = opcode >> 28;
+        u32 psr_cond = psr >> 28;
+        unsigned int ret;
+
+        if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {
+                if ((cc_map[cc_bits] >> (psr_cond)) & 1)
+                        ret = ARM_OPCODE_CONDTEST_PASS;
+                else
+                        ret = ARM_OPCODE_CONDTEST_FAIL;
+        } else {
+                ret = ARM_OPCODE_CONDTEST_UNCOND;
+        }
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(arm_check_condition);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 24e2347be6b1..5bb91bf3d47f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -59,8 +59,7 @@ armpmu_get_pmu_id(void)
 }
 EXPORT_SYMBOL_GPL(armpmu_get_pmu_id);
 
-int
-armpmu_get_max_events(void)
+int perf_num_counters(void)
 {
         int max_events = 0;
 
@@ -69,12 +68,6 @@ armpmu_get_max_events(void)
 
         return max_events;
 }
-EXPORT_SYMBOL_GPL(armpmu_get_max_events);
-
-int perf_num_counters(void)
-{
-        return armpmu_get_max_events();
-}
 EXPORT_SYMBOL_GPL(perf_num_counters);
 
 #define HW_OP_UNSUPPORTED               0xFFFF
@@ -343,19 +336,25 @@ validate_group(struct perf_event *event)
 {
         struct perf_event *sibling, *leader = event->group_leader;
         struct pmu_hw_events fake_pmu;
+        DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
 
-        memset(&fake_pmu, 0, sizeof(fake_pmu));
+        /*
+         * Initialise the fake PMU. We only need to populate the
+         * used_mask for the purposes of validation.
+         */
+        memset(fake_used_mask, 0, sizeof(fake_used_mask));
+        fake_pmu.used_mask = fake_used_mask;
 
         if (!validate_event(&fake_pmu, leader))
-                return -ENOSPC;
+                return -EINVAL;
 
         list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
                 if (!validate_event(&fake_pmu, sibling))
-                        return -ENOSPC;
+                        return -EINVAL;
         }
 
         if (!validate_event(&fake_pmu, event))
-                return -ENOSPC;
+                return -EINVAL;
 
         return 0;
 }
@@ -374,6 +373,8 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
 {
         int i, irq, irqs;
         struct platform_device *pmu_device = armpmu->plat_device;
+        struct arm_pmu_platdata *plat =
+                dev_get_platdata(&pmu_device->dev);
 
         irqs = min(pmu_device->num_resources, num_possible_cpus());
 
@@ -381,8 +382,11 @@ armpmu_release_hardware(struct arm_pmu *armpmu)
                 if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
                         continue;
                 irq = platform_get_irq(pmu_device, i);
-                if (irq >= 0)
+                if (irq >= 0) {
+                        if (plat && plat->disable_irq)
+                                plat->disable_irq(irq);
                         free_irq(irq, armpmu);
+                }
         }
 
         release_pmu(armpmu->type);
@@ -396,6 +400,9 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
         int i, err, irq, irqs;
         struct platform_device *pmu_device = armpmu->plat_device;
 
+        if (!pmu_device)
+                return -ENODEV;
+
         err = reserve_pmu(armpmu->type);
         if (err) {
                 pr_warning("unable to reserve pmu\n");
@@ -439,7 +446,8 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
                                 irq);
                         armpmu_release_hardware(armpmu);
                         return err;
-                }
+                } else if (plat && plat->enable_irq)
+                        plat->enable_irq(irq);
 
                 cpumask_set_cpu(i, &armpmu->active_irqs);
         }
@@ -631,6 +639,9 @@ static struct platform_device_id armpmu_plat_device_ids[] = {
 
 static int __devinit armpmu_device_probe(struct platform_device *pdev)
 {
+        if (!cpu_pmu)
+                return -ENODEV;
+
         cpu_pmu->plat_device = pdev;
         return 0;
 }
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index e63d8115c01b..533be9930ec2 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -65,13 +65,15 @@ enum armv6_counters {
  * accesses/misses in hardware.
  */
 static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV6_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV6_PERFCTR_INSTR_EXEC,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV6_PERFCTR_BR_MISPREDICT,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV6_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV6_PERFCTR_INSTR_EXEC,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV6_PERFCTR_BR_EXEC,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV6_PERFCTR_BR_MISPREDICT,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6_PERFCTR_IBUF_STALL,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV6_PERFCTR_LSU_FULL_STALL,
 };
 
 static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -218,13 +220,15 @@ enum armv6mpcore_perf_types {
  * accesses/misses in hardware.
  */
 static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV6MPCORE_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV6MPCORE_PERFCTR_INSTR_EXEC,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV6MPCORE_PERFCTR_BR_MISPREDICT,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV6MPCORE_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV6MPCORE_PERFCTR_INSTR_EXEC,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV6MPCORE_PERFCTR_BR_EXEC,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV6MPCORE_PERFCTR_BR_MISPREDICT,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6MPCORE_PERFCTR_IBUF_STALL,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV6MPCORE_PERFCTR_LSU_FULL_STALL,
 };
 
 static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 1ef6d0034b85..460bbbb6b885 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -28,165 +28,87 @@ static struct arm_pmu armv7pmu;
  * they are not available.
  */
 enum armv7_perf_types {
-        ARMV7_PERFCTR_PMNC_SW_INCR              = 0x00,
-        ARMV7_PERFCTR_IFETCH_MISS               = 0x01,
-        ARMV7_PERFCTR_ITLB_MISS                 = 0x02,
-        ARMV7_PERFCTR_DCACHE_REFILL             = 0x03, /* L1 */
-        ARMV7_PERFCTR_DCACHE_ACCESS             = 0x04, /* L1 */
-        ARMV7_PERFCTR_DTLB_REFILL               = 0x05,
-        ARMV7_PERFCTR_DREAD                     = 0x06,
-        ARMV7_PERFCTR_DWRITE                    = 0x07,
-        ARMV7_PERFCTR_INSTR_EXECUTED            = 0x08,
-        ARMV7_PERFCTR_EXC_TAKEN                 = 0x09,
-        ARMV7_PERFCTR_EXC_EXECUTED              = 0x0A,
-        ARMV7_PERFCTR_CID_WRITE                 = 0x0B,
-        /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS.
+        ARMV7_PERFCTR_PMNC_SW_INCR                      = 0x00,
+        ARMV7_PERFCTR_L1_ICACHE_REFILL                  = 0x01,
+        ARMV7_PERFCTR_ITLB_REFILL                       = 0x02,
+        ARMV7_PERFCTR_L1_DCACHE_REFILL                  = 0x03,
+        ARMV7_PERFCTR_L1_DCACHE_ACCESS                  = 0x04,
+        ARMV7_PERFCTR_DTLB_REFILL                       = 0x05,
+        ARMV7_PERFCTR_MEM_READ                          = 0x06,
+        ARMV7_PERFCTR_MEM_WRITE                         = 0x07,
+        ARMV7_PERFCTR_INSTR_EXECUTED                    = 0x08,
+        ARMV7_PERFCTR_EXC_TAKEN                         = 0x09,
+        ARMV7_PERFCTR_EXC_EXECUTED                      = 0x0A,
+        ARMV7_PERFCTR_CID_WRITE                         = 0x0B,
+
+        /*
+         * ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS.
          * It counts:
-         *  - all branch instructions,
+         *  - all (taken) branch instructions,
          *  - instructions that explicitly write the PC,
          *  - exception generating instructions.
          */
-        ARMV7_PERFCTR_PC_WRITE                  = 0x0C,
-        ARMV7_PERFCTR_PC_IMM_BRANCH             = 0x0D,
-        ARMV7_PERFCTR_PC_PROC_RETURN            = 0x0E,
-        ARMV7_PERFCTR_UNALIGNED_ACCESS          = 0x0F,
+        ARMV7_PERFCTR_PC_WRITE                          = 0x0C,
+        ARMV7_PERFCTR_PC_IMM_BRANCH                     = 0x0D,
+        ARMV7_PERFCTR_PC_PROC_RETURN                    = 0x0E,
+        ARMV7_PERFCTR_MEM_UNALIGNED_ACCESS              = 0x0F,
+        ARMV7_PERFCTR_PC_BRANCH_MIS_PRED                = 0x10,
+        ARMV7_PERFCTR_CLOCK_CYCLES                      = 0x11,
+        ARMV7_PERFCTR_PC_BRANCH_PRED                    = 0x12,
 
         /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */
-        ARMV7_PERFCTR_PC_BRANCH_MIS_PRED        = 0x10,
-        ARMV7_PERFCTR_CLOCK_CYCLES              = 0x11,
-        ARMV7_PERFCTR_PC_BRANCH_PRED            = 0x12,
-        ARMV7_PERFCTR_MEM_ACCESS                = 0x13,
-        ARMV7_PERFCTR_L1_ICACHE_ACCESS          = 0x14,
-        ARMV7_PERFCTR_L1_DCACHE_WB              = 0x15,
-        ARMV7_PERFCTR_L2_DCACHE_ACCESS          = 0x16,
-        ARMV7_PERFCTR_L2_DCACHE_REFILL          = 0x17,
-        ARMV7_PERFCTR_L2_DCACHE_WB              = 0x18,
-        ARMV7_PERFCTR_BUS_ACCESS                = 0x19,
-        ARMV7_PERFCTR_MEMORY_ERROR              = 0x1A,
-        ARMV7_PERFCTR_INSTR_SPEC                = 0x1B,
-        ARMV7_PERFCTR_TTBR_WRITE                = 0x1C,
-        ARMV7_PERFCTR_BUS_CYCLES                = 0x1D,
-
-        ARMV7_PERFCTR_CPU_CYCLES                = 0xFF
+        ARMV7_PERFCTR_MEM_ACCESS                        = 0x13,
+        ARMV7_PERFCTR_L1_ICACHE_ACCESS                  = 0x14,
+        ARMV7_PERFCTR_L1_DCACHE_WB                      = 0x15,
+        ARMV7_PERFCTR_L2_CACHE_ACCESS                   = 0x16,
+        ARMV7_PERFCTR_L2_CACHE_REFILL                   = 0x17,
+        ARMV7_PERFCTR_L2_CACHE_WB                       = 0x18,
+        ARMV7_PERFCTR_BUS_ACCESS                        = 0x19,
+        ARMV7_PERFCTR_MEM_ERROR                         = 0x1A,
+        ARMV7_PERFCTR_INSTR_SPEC                        = 0x1B,
+        ARMV7_PERFCTR_TTBR_WRITE                        = 0x1C,
+        ARMV7_PERFCTR_BUS_CYCLES                        = 0x1D,
+
+        ARMV7_PERFCTR_CPU_CYCLES                        = 0xFF
 };
 
 /* ARMv7 Cortex-A8 specific event types */
 enum armv7_a8_perf_types {
-        ARMV7_PERFCTR_WRITE_BUFFER_FULL         = 0x40,
-        ARMV7_PERFCTR_L2_STORE_MERGED           = 0x41,
-        ARMV7_PERFCTR_L2_STORE_BUFF             = 0x42,
-        ARMV7_PERFCTR_L2_ACCESS                 = 0x43,
-        ARMV7_PERFCTR_L2_CACH_MISS              = 0x44,
-        ARMV7_PERFCTR_AXI_READ_CYCLES           = 0x45,
-        ARMV7_PERFCTR_AXI_WRITE_CYCLES          = 0x46,
-        ARMV7_PERFCTR_MEMORY_REPLAY             = 0x47,
-        ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY   = 0x48,
-        ARMV7_PERFCTR_L1_DATA_MISS              = 0x49,
-        ARMV7_PERFCTR_L1_INST_MISS              = 0x4A,
-        ARMV7_PERFCTR_L1_DATA_COLORING          = 0x4B,
-        ARMV7_PERFCTR_L1_NEON_DATA              = 0x4C,
-        ARMV7_PERFCTR_L1_NEON_CACH_DATA         = 0x4D,
-        ARMV7_PERFCTR_L2_NEON                   = 0x4E,
-        ARMV7_PERFCTR_L2_NEON_HIT               = 0x4F,
-        ARMV7_PERFCTR_L1_INST                   = 0x50,
-        ARMV7_PERFCTR_PC_RETURN_MIS_PRED        = 0x51,
-        ARMV7_PERFCTR_PC_BRANCH_FAILED          = 0x52,
-        ARMV7_PERFCTR_PC_BRANCH_TAKEN           = 0x53,
-        ARMV7_PERFCTR_PC_BRANCH_EXECUTED        = 0x54,
-        ARMV7_PERFCTR_OP_EXECUTED               = 0x55,
-        ARMV7_PERFCTR_CYCLES_INST_STALL         = 0x56,
-        ARMV7_PERFCTR_CYCLES_INST               = 0x57,
-        ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL    = 0x58,
-        ARMV7_PERFCTR_CYCLES_NEON_INST_STALL    = 0x59,
-        ARMV7_PERFCTR_NEON_CYCLES               = 0x5A,
-
-        ARMV7_PERFCTR_PMU0_EVENTS               = 0x70,
-        ARMV7_PERFCTR_PMU1_EVENTS               = 0x71,
-        ARMV7_PERFCTR_PMU_EVENTS                = 0x72,
+        ARMV7_A8_PERFCTR_L2_CACHE_ACCESS                = 0x43,
+        ARMV7_A8_PERFCTR_L2_CACHE_REFILL                = 0x44,
+        ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS               = 0x50,
+        ARMV7_A8_PERFCTR_STALL_ISIDE                    = 0x56,
 };
 
 /* ARMv7 Cortex-A9 specific event types */
 enum armv7_a9_perf_types {
-        ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC     = 0x40,
-        ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC     = 0x41,
-        ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC       = 0x42,
-
-        ARMV7_PERFCTR_COHERENT_LINE_MISS        = 0x50,
-        ARMV7_PERFCTR_COHERENT_LINE_HIT         = 0x51,
-
-        ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES   = 0x60,
-        ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES   = 0x61,
-        ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62,
-        ARMV7_PERFCTR_STREX_EXECUTED_PASSED     = 0x63,
-        ARMV7_PERFCTR_STREX_EXECUTED_FAILED     = 0x64,
-        ARMV7_PERFCTR_DATA_EVICTION             = 0x65,
-        ARMV7_PERFCTR_ISSUE_STAGE_NO_INST       = 0x66,
-        ARMV7_PERFCTR_ISSUE_STAGE_EMPTY         = 0x67,
-        ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE  = 0x68,
-
-        ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E,
-
-        ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST   = 0x70,
-        ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71,
-        ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST  = 0x72,
-        ARMV7_PERFCTR_FP_EXECUTED_INST          = 0x73,
-        ARMV7_PERFCTR_NEON_EXECUTED_INST        = 0x74,
-
-        ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80,
-        ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES  = 0x81,
-        ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES        = 0x82,
-        ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES        = 0x83,
-        ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES  = 0x84,
-        ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES  = 0x85,
-        ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES      = 0x86,
-
-        ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES  = 0x8A,
-        ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B,
-
-        ARMV7_PERFCTR_ISB_INST                  = 0x90,
-        ARMV7_PERFCTR_DSB_INST                  = 0x91,
-        ARMV7_PERFCTR_DMB_INST                  = 0x92,
-        ARMV7_PERFCTR_EXT_INTERRUPTS            = 0x93,
-
-        ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED     = 0xA0,
-        ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED       = 0xA1,
-        ARMV7_PERFCTR_PLE_FIFO_FLUSH            = 0xA2,
-        ARMV7_PERFCTR_PLE_RQST_COMPLETED        = 0xA3,
-        ARMV7_PERFCTR_PLE_FIFO_OVERFLOW         = 0xA4,
-        ARMV7_PERFCTR_PLE_RQST_PROG             = 0xA5
+        ARMV7_A9_PERFCTR_INSTR_CORE_RENAME              = 0x68,
+        ARMV7_A9_PERFCTR_STALL_ICACHE                   = 0x60,
+        ARMV7_A9_PERFCTR_STALL_DISPATCH                 = 0x66,
 };
 
 /* ARMv7 Cortex-A5 specific event types */
 enum armv7_a5_perf_types {
-        ARMV7_PERFCTR_IRQ_TAKEN                 = 0x86,
-        ARMV7_PERFCTR_FIQ_TAKEN                 = 0x87,
-
-        ARMV7_PERFCTR_EXT_MEM_RQST              = 0xc0,
-        ARMV7_PERFCTR_NC_EXT_MEM_RQST           = 0xc1,
-        ARMV7_PERFCTR_PREFETCH_LINEFILL         = 0xc2,
-        ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP    = 0xc3,
-        ARMV7_PERFCTR_ENTER_READ_ALLOC          = 0xc4,
-        ARMV7_PERFCTR_READ_ALLOC                = 0xc5,
-
-        ARMV7_PERFCTR_STALL_SB_FULL             = 0xc9,
+        ARMV7_A5_PERFCTR_PREFETCH_LINEFILL              = 0xc2,
+        ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP         = 0xc3,
 };
 
 /* ARMv7 Cortex-A15 specific event types */
 enum armv7_a15_perf_types {
-        ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS     = 0x40,
-        ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS    = 0x41,
-        ARMV7_PERFCTR_L1_DCACHE_READ_REFILL     = 0x42,
-        ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL    = 0x43,
+        ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ         = 0x40,
+        ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE        = 0x41,
+        ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ         = 0x42,
+        ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE        = 0x43,
 
-        ARMV7_PERFCTR_L1_DTLB_READ_REFILL       = 0x4C,
-        ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL      = 0x4D,
+        ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ           = 0x4C,
+        ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE          = 0x4D,
 
-        ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS     = 0x50,
-        ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS    = 0x51,
-        ARMV7_PERFCTR_L2_DCACHE_READ_REFILL     = 0x52,
-        ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL    = 0x53,
+        ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ          = 0x50,
+        ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE         = 0x51,
+        ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ          = 0x52,
+        ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE         = 0x53,
 
-        ARMV7_PERFCTR_SPEC_PC_WRITE             = 0x76,
+        ARMV7_A15_PERFCTR_PC_WRITE_SPEC                 = 0x76,
 };
 
 /*
@@ -197,13 +119,15 @@ enum armv7_a15_perf_types {
  * accesses/misses in hardware.
  */
 static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_CLOCK_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A8_PERFCTR_STALL_ISIDE,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 
 static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -217,12 +141,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                  * combined.
                  */
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -231,12 +155,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         },
         [C(L1I)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_INST,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_INST_MISS,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_INST,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_INST_MISS,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -245,12 +169,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         },
         [C(LL)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACH_MISS,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACH_MISS,
+                        [C(RESULT_ACCESS)]      = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_A8_PERFCTR_L2_CACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -274,11 +198,11 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(ITLB)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -287,14 +211,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         },
         [C(BPU)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -321,14 +243,15 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
  * Cortex-A9 HW events mapping
  */
 static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        =
-                                        ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = ARMV7_PERFCTR_DCACHE_ACCESS,
-        [PERF_COUNT_HW_CACHE_MISSES]        = ARMV7_PERFCTR_DCACHE_REFILL,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_CLOCK_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_A9_PERFCTR_INSTR_CORE_RENAME,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A9_PERFCTR_STALL_ICACHE,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = ARMV7_A9_PERFCTR_STALL_DISPATCH,
 };
 
 static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -342,12 +265,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                  * combined.
                  */
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -357,11 +280,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(L1I)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -399,11 +322,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(ITLB)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -412,14 +335,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         },
         [C(BPU)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_WRITE,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -446,13 +367,15 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
  * Cortex-A5 HW events mapping
  */
 static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 
 static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -460,42 +383,34 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                                         [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
         [C(L1D)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_DCACHE_ACCESS,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_DCACHE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
+                        [C(RESULT_ACCESS)]      = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
+                        [C(RESULT_MISS)]        = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
                 },
         },
         [C(L1I)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 /*
                  * The prefetch counters don't differentiate between the I
                  * side and the D side.
                  */
                 [C(OP_PREFETCH)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP,
+                        [C(RESULT_ACCESS)]      = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL,
+                        [C(RESULT_MISS)]        = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP,
                 },
         },
         [C(LL)] = {
@@ -529,11 +444,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(ITLB)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -543,13 +458,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(BPU)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -562,13 +475,15 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
  * Cortex-A15 HW events mapping
  */
 static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_SPEC_PC_WRITE,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
-        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_BUS_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_A15_PERFCTR_PC_WRITE_SPEC,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = ARMV7_PERFCTR_BUS_CYCLES,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 
 static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
@@ -576,16 +491,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                                         [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
         [C(L1D)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L1_DCACHE_READ_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -601,11 +512,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
                  */
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_IFETCH_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -614,16 +525,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         },
         [C(LL)] = {
                 [C(OP_READ)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L2_DCACHE_READ_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ,
                 },
                 [C(OP_WRITE)] = {
-                        [C(RESULT_ACCESS)]
-                                        = ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL,
+                        [C(RESULT_ACCESS)]      = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -633,13 +540,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(DTLB)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L1_DTLB_READ_REFILL,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL,
+                        [C(RESULT_MISS)]        = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -649,11 +554,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(ITLB)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
-                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_MISS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
@@ -663,13 +568,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
         [C(BPU)] = {
                 [C(OP_READ)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_WRITE)] = {
                         [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
-                        [C(RESULT_MISS)]
-                                        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
                 },
                 [C(OP_PREFETCH)] = {
                         [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index e0cca10a8411..3b99d8269829 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -48,13 +48,15 @@ enum xscale_counters {
 };
 
 static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]          = XSCALE_PERFCTR_CCNT,
-        [PERF_COUNT_HW_INSTRUCTIONS]        = XSCALE_PERFCTR_INSTRUCTION,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_CACHE_MISSES]        = HW_OP_UNSUPPORTED,
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH,
-        [PERF_COUNT_HW_BRANCH_MISSES]       = XSCALE_PERFCTR_BRANCH_MISS,
-        [PERF_COUNT_HW_BUS_CYCLES]          = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CPU_CYCLES]              = XSCALE_PERFCTR_CCNT,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = XSCALE_PERFCTR_INSTRUCTION,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_CACHE_MISSES]            = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = XSCALE_PERFCTR_BRANCH,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = XSCALE_PERFCTR_BRANCH_MISS,
+        [PERF_COUNT_HW_BUS_CYCLES]              = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = XSCALE_PERFCTR_ICACHE_NO_DELIVER,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
 };
 
 static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index 2c3407ee8576..2334bf8a650a 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -33,3 +33,4 @@ release_pmu(enum arm_pmu_type type)
 {
         clear_bit_unlock(type, pmu_lock);
 }
+EXPORT_SYMBOL_GPL(release_pmu);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 75316f0dd02a..971d65c253a9 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -57,7 +57,7 @@ static const char *isa_modes[] = {
   "ARM" , "Thumb" , "Jazelle", "ThumbEE"
 };
 
-extern void setup_mm_for_reboot(char mode);
+extern void setup_mm_for_reboot(void);
 
 static volatile int hlt_counter;
 
@@ -92,18 +92,24 @@ static int __init hlt_setup(char *__unused)
 __setup("nohlt", nohlt_setup);
 __setup("hlt", hlt_setup);
 
-void arm_machine_restart(char mode, const char *cmd)
+extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
+typedef void (*phys_reset_t)(unsigned long);
+
+/*
+ * A temporary stack to use for CPU reset. This is static so that we
+ * don't clobber it with the identity mapping. When running with this
+ * stack, any references to the current task *will not work* so you
+ * should really do as little as possible before jumping to your reset
+ * code.
+ */
+static u64 soft_restart_stack[16];
+
+static void __soft_restart(void *addr)
 {
-        /* Disable interrupts first */
-        local_irq_disable();
-        local_fiq_disable();
+        phys_reset_t phys_reset;
 
-        /*
-         * Tell the mm system that we are going to reboot -
-         * we may need it to insert some 1:1 mappings so that
-         * soft boot works.
-         */
-        setup_mm_for_reboot(mode);
+        /* Take out a flat memory mapping. */
+        setup_mm_for_reboot();
 
         /* Clean and invalidate caches */
         flush_cache_all();
@@ -114,18 +120,35 @@ void arm_machine_restart(char mode, const char *cmd)
         /* Push out any further dirty data, and ensure cache is empty */
         flush_cache_all();
 
-        /*
-         * Now call the architecture specific reboot code.
-         */
-        arch_reset(mode, cmd);
+        /* Switch to the identity mapping. */
+        phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset);
+        phys_reset((unsigned long)addr);
 
-        /*
-         * Whoops - the architecture was unable to reboot.
-         * Tell the user!
-         */
-        mdelay(1000);
-        printk("Reboot failed -- System halted\n");
-        while (1);
+        /* Should never get here. */
+        BUG();
+}
+
+void soft_restart(unsigned long addr)
+{
+        u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack);
+
+        /* Disable interrupts first */
+        local_irq_disable();
+        local_fiq_disable();
+
+        /* Disable the L2 if we're the last man standing. */
+        if (num_online_cpus() == 1)
+                outer_disable();
+
+        /* Change to the new stack and continue with the reset. */
+        call_with_stack(__soft_restart, (void *)addr, (void *)stack);
+
+        /* Should never get here. */
+        BUG();
+}
+
+static void null_restart(char mode, const char *cmd)
+{
 }
 
 /*
@@ -134,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd)
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
 
-void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
+void (*arm_pm_restart)(char str, const char *cmd) = null_restart;
 EXPORT_SYMBOL_GPL(arm_pm_restart);
 
 static void do_nothing(void *unused)
@@ -183,7 +206,8 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 leds_event(led_idle_start);
                 while (!need_resched()) {
 #ifdef CONFIG_HOTPLUG_CPU
@@ -192,6 +216,9 @@ void cpu_idle(void)
 #endif
 
                         local_irq_disable();
+#ifdef CONFIG_PL310_ERRATA_769419
+                        wmb();
+#endif
                         if (hlt_counter) {
                                 local_irq_enable();
                                 cpu_relax();
@@ -210,7 +237,8 @@ void cpu_idle(void)
                         }
                 }
                 leds_event(led_idle_end);
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
@@ -250,7 +278,15 @@ void machine_power_off(void)
 void machine_restart(char *cmd)
 {
         machine_shutdown();
+
         arm_pm_restart(reboot_mode, cmd);
+
+        /* Give a grace period for failure to restart of 1s */
+        mdelay(1000);
+
+        /* Whoops - the platform was unable to reboot. Tell the user! */
+        printk("Reboot failed -- System halted\n");
+        while (1);
 }
 
 void __show_regs(struct pt_regs *regs)
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9a46370fe9da..5416c7c12528 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -14,61 +14,153 @@
 
 #include <asm/sched_clock.h>
 
+struct clock_data {
+        u64 epoch_ns;
+        u32 epoch_cyc;
+        u32 epoch_cyc_copy;
+        u32 mult;
+        u32 shift;
+};
+
 static void sched_clock_poll(unsigned long wrap_ticks);
 static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
-static void (*sched_clock_update_fn)(void);
+
+static struct clock_data cd = {
+        .mult   = NSEC_PER_SEC / HZ,
+};
+
+static u32 __read_mostly sched_clock_mask = 0xffffffff;
+
+static u32 notrace jiffy_sched_clock_read(void)
+{
+        return (u32)(jiffies - INITIAL_JIFFIES);
+}
+
+static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
+
+static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+{
+        return (cyc * mult) >> shift;
+}
+
+static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
+{
+        u64 epoch_ns;
+        u32 epoch_cyc;
+
+        /*
+         * Load the epoch_cyc and epoch_ns atomically.  We do this by
+         * ensuring that we always write epoch_cyc, epoch_ns and
+         * epoch_cyc_copy in strict order, and read them in strict order.
+         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
+         * the middle of an update, and we should repeat the load.
+         */
+        do {
+                epoch_cyc = cd.epoch_cyc;
+                smp_rmb();
+                epoch_ns = cd.epoch_ns;
+                smp_rmb();
+        } while (epoch_cyc != cd.epoch_cyc_copy);
+
+        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift);
+}
+
+/*
+ * Atomically update the sched_clock epoch.
+ */
+static void notrace update_sched_clock(void)
+{
+        unsigned long flags;
+        u32 cyc;
+        u64 ns;
+
+        cyc = read_sched_clock();
+        ns = cd.epoch_ns +
+                cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
+                          cd.mult, cd.shift);
+        /*
+         * Write epoch_cyc and epoch_ns in a way that the update is
+         * detectable in cyc_to_fixed_sched_clock().
+         */
+        raw_local_irq_save(flags);
+        cd.epoch_cyc = cyc;
+        smp_wmb();
+        cd.epoch_ns = ns;
+        smp_wmb();
+        cd.epoch_cyc_copy = cyc;
+        raw_local_irq_restore(flags);
+}
 
 static void sched_clock_poll(unsigned long wrap_ticks)
 {
         mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
-        sched_clock_update_fn();
+        update_sched_clock();
 }
 
-void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
-        unsigned int clock_bits, unsigned long rate)
+void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
         unsigned long r, w;
         u64 res, wrap;
         char r_unit;
 
-        sched_clock_update_fn = update;
+        BUG_ON(bits > 32);
+        WARN_ON(!irqs_disabled());
+        WARN_ON(read_sched_clock != jiffy_sched_clock_read);
+        read_sched_clock = read;
+        sched_clock_mask = (1 << bits) - 1;
 
         /* calculate the mult/shift to convert counter ticks to ns. */
-        clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0);
+        clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0);
 
         r = rate;
         if (r >= 4000000) {
                 r /= 1000000;
                 r_unit = 'M';
-        } else {
+        } else if (r >= 1000) {
                 r /= 1000;
                 r_unit = 'k';
-        }
+        } else
+                r_unit = ' ';
 
         /* calculate how many ns until we wrap */
-        wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift);
+        wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift);
         do_div(wrap, NSEC_PER_MSEC);
         w = wrap;
 
         /* calculate the ns resolution of this counter */
-        res = cyc_to_ns(1ULL, cd->mult, cd->shift);
+        res = cyc_to_ns(1ULL, cd.mult, cd.shift);
         pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n",
-                clock_bits, r, r_unit, res, w);
+                bits, r, r_unit, res, w);
 
         /*
          * Start the timer to keep sched_clock() properly updated and
          * sets the initial epoch.
          */
         sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
-        update();
+        update_sched_clock();
 
         /*
          * Ensure that sched_clock() starts off at 0ns
          */
-        cd->epoch_ns = 0;
+        cd.epoch_ns = 0;
+
+        pr_debug("Registered %pF as sched_clock source\n", read);
+}
+
+unsigned long long notrace sched_clock(void)
+{
+        u32 cyc = read_sched_clock();
+        return cyc_to_sched_clock(cyc, sched_clock_mask);
 }
 
 void __init sched_clock_postinit(void)
 {
+        /*
+         * If no sched_clock function has been provided at that point,
+         * make it the final one one.
+         */
+        if (read_sched_clock == jiffy_sched_clock_read)
+                setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
+
         sched_clock_poll(sched_clock_timer.data);
 }
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 7e7977ab994f..129fbd55bde8 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -31,6 +31,7 @@
 #include <linux/memblock.h>
 #include <linux/bug.h>
 #include <linux/compiler.h>
+#include <linux/sort.h>
 
 #include <asm/unified.h>
 #include <asm/cpu.h>
@@ -52,6 +53,7 @@
 #include <asm/mach/time.h>
 #include <asm/traps.h>
 #include <asm/unwind.h>
+#include <asm/memblock.h>
 
 #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
 #include "compat.h"
@@ -461,8 +463,10 @@ static void __init setup_processor(void)
                cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
                proc_arch[cpu_architecture()], cr_alignment);
 
-        sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
-        sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
+        snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
+                 list->arch_name, ENDIANNESS);
+        snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
+                 list->elf_name, ENDIANNESS);
         elf_hwcap = list->elf_hwcap;
 #ifndef CONFIG_ARM_THUMB
         elf_hwcap &= ~HWCAP_THUMB;
@@ -888,13 +892,17 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
         return mdesc;
 }
 
+static int __init meminfo_cmp(const void *_a, const void *_b)
+{
+        const struct membank *a = _a, *b = _b;
+        long cmp = bank_pfn_start(a) - bank_pfn_start(b);
+        return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
+}
 
 void __init setup_arch(char **cmdline_p)
 {
         struct machine_desc *mdesc;
 
-        unwind_init();
-
         setup_processor();
         mdesc = setup_machine_fdt(__atags_pointer);
         if (!mdesc)
@@ -902,8 +910,14 @@ void __init setup_arch(char **cmdline_p)
         machine_desc = mdesc;
         machine_name = mdesc->name;
 
-        if (mdesc->soft_reboot)
-                reboot_setup("s");
+#ifdef CONFIG_ZONE_DMA
+        if (mdesc->dma_zone_size) {
+                extern unsigned long arm_dma_zone_size;
+                arm_dma_zone_size = mdesc->dma_zone_size;
+        }
+#endif
+        if (mdesc->restart_mode)
+                reboot_setup(&mdesc->restart_mode);
 
         init_mm.start_code = (unsigned long) _text;
         init_mm.end_code   = (unsigned long) _etext;
@@ -916,12 +930,16 @@ void __init setup_arch(char **cmdline_p)
 
         parse_early_param();
 
+        sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
         sanity_check_meminfo();
         arm_memblock_init(&meminfo, mdesc);
 
         paging_init(mdesc);
         request_standard_resources(mdesc);
 
+        if (mdesc->restart)
+                arm_pm_restart = mdesc->restart;
+
         unflatten_device_tree();
 
 #ifdef CONFIG_SMP
@@ -932,12 +950,6 @@ void __init setup_arch(char **cmdline_p)
 
         tcm_init();
 
-#ifdef CONFIG_ZONE_DMA
-        if (mdesc->dma_zone_size) {
-                extern unsigned long arm_dma_zone_size;
-                arm_dma_zone_size = mdesc->dma_zone_size;
-        }
-#endif
 #ifdef CONFIG_MULTI_IRQ_HANDLER
         handle_arch_irq = mdesc->handle_irq;
 #endif
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 020e99c845e7..1f268bda4552 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -54,14 +54,18 @@ ENDPROC(cpu_suspend_abort)
  * r0 = control register value
  */
         .align  5
+        .pushsection    .idmap.text,"ax"
 ENTRY(cpu_resume_mmu)
         ldr     r3, =cpu_resume_after_mmu
+        instr_sync
         mcr     p15, 0, r0, c1, c0, 0   @ turn on MMU, I-cache, etc
         mrc     p15, 0, r0, c0, c0, 0   @ read id reg
+        instr_sync
         mov     r0, r0
         mov     r0, r0
         mov     pc, r3                  @ jump to virtual address
 ENDPROC(cpu_resume_mmu)
+        .popsection
 cpu_resume_after_mmu:
         bl      cpu_init                @ restore the und/abt/irq banked regs
         mov     r0, #0                  @ return zero on success
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index ef5640b9e218..57db122a4f62 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -31,6 +31,7 @@
 #include <asm/cpu.h>
 #include <asm/cputype.h>
 #include <asm/exception.h>
+#include <asm/idmap.h>
 #include <asm/topology.h>
 #include <asm/mmu_context.h>
 #include <asm/pgtable.h>
@@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
 {
         struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
         struct task_struct *idle = ci->idle;
-        pgd_t *pgd;
         int ret;
 
         /*
@@ -84,29 +84,11 @@ int __cpuinit __cpu_up(unsigned int cpu)
         }
 
         /*
-         * Allocate initial page tables to allow the new CPU to
-         * enable the MMU safely.  This essentially means a set
-         * of our "standard" page tables, with the addition of
-         * a 1:1 mapping for the physical address of the kernel.
-         */
-        pgd = pgd_alloc(&init_mm);
-        if (!pgd)
-                return -ENOMEM;
-
-        if (PHYS_OFFSET != PAGE_OFFSET) {
-#ifndef CONFIG_HOTPLUG_CPU
-                identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end));
-#endif
-                identity_mapping_add(pgd, __pa(_stext), __pa(_etext));
-                identity_mapping_add(pgd, __pa(_sdata), __pa(_edata));
-        }
-
-        /*
          * We need to tell the secondary core where to find
          * its stack and the page tables.
          */
         secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
-        secondary_data.pgdir = virt_to_phys(pgd);
+        secondary_data.pgdir = virt_to_phys(idmap_pgd);
         secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir);
         __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data));
         outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1));
@@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu)
         secondary_data.stack = NULL;
         secondary_data.pgdir = 0;
 
-        if (PHYS_OFFSET != PAGE_OFFSET) {
-#ifndef CONFIG_HOTPLUG_CPU
-                identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end));
-#endif
-                identity_mapping_del(pgd, __pa(_stext), __pa(_etext));
-                identity_mapping_del(pgd, __pa(_sdata), __pa(_edata));
-        }
-
-        pgd_free(&init_mm, pgd);
-
         return ret;
 }
 
@@ -550,6 +522,10 @@ static void ipi_cpu_stop(unsigned int cpu)
         local_fiq_disable();
         local_irq_disable();
 
+#ifdef CONFIG_HOTPLUG_CPU
+        platform_cpu_kill(cpu);
+#endif
+
         while (1)
                 cpu_relax();
 }
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index a8a6682d6b52..c8e938553d47 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -10,8 +10,11 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
 #include <linux/delay.h>
 #include <linux/device.h>
+#include <linux/err.h>
 #include <linux/smp.h>
 #include <linux/jiffies.h>
 #include <linux/clockchips.h>
@@ -25,6 +28,7 @@
 /* set up by the platform code */
 void __iomem *twd_base;
 
+static struct clk *twd_clk;
 static unsigned long twd_timer_rate;
 
 static struct clock_event_device __percpu **twd_evt;
@@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk)
         disable_percpu_irq(clk->irq);
 }
 
+#ifdef CONFIG_CPU_FREQ
+
+/*
+ * Updates clockevent frequency when the cpu frequency changes.
+ * Called on the cpu that is changing frequency with interrupts disabled.
+ */
+static void twd_update_frequency(void *data)
+{
+        twd_timer_rate = clk_get_rate(twd_clk);
+
+        clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
+}
+
+static int twd_cpufreq_transition(struct notifier_block *nb,
+        unsigned long state, void *data)
+{
+        struct cpufreq_freqs *freqs = data;
+
+        /*
+         * The twd clock events must be reprogrammed to account for the new
+         * frequency.  The timer is local to a cpu, so cross-call to the
+         * changing cpu.
+         */
+        if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
+                smp_call_function_single(freqs->cpu, twd_update_frequency,
+                        NULL, 1);
+
+        return NOTIFY_OK;
+}
+
+static struct notifier_block twd_cpufreq_nb = {
+        .notifier_call = twd_cpufreq_transition,
+};
+
+static int twd_cpufreq_init(void)
+{
+        if (!IS_ERR(twd_clk))
+                return cpufreq_register_notifier(&twd_cpufreq_nb,
+                        CPUFREQ_TRANSITION_NOTIFIER);
+
+        return 0;
+}
+core_initcall(twd_cpufreq_init);
+
+#endif
+
 static void __cpuinit twd_calibrate_rate(void)
 {
         unsigned long count;
@@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id)
         return IRQ_NONE;
 }
 
+static struct clk *twd_get_clock(void)
+{
+        struct clk *clk;
+        int err;
+
+        clk = clk_get_sys("smp_twd", NULL);
+        if (IS_ERR(clk)) {
+                pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
+                return clk;
+        }
+
+        err = clk_prepare(clk);
+        if (err) {
+                pr_err("smp_twd: clock failed to prepare: %d\n", err);
+                clk_put(clk);
+                return ERR_PTR(err);
+        }
+
+        err = clk_enable(clk);
+        if (err) {
+                pr_err("smp_twd: clock failed to enable: %d\n", err);
+                clk_unprepare(clk);
+                clk_put(clk);
+                return ERR_PTR(err);
+        }
+
+        return clk;
+}
+
 /*
  * Setup the local clock events for a CPU.
  */
@@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
                 }
         }
 
-        twd_calibrate_rate();
+        if (!twd_clk)
+                twd_clk = twd_get_clock();
+
+        if (!IS_ERR_OR_NULL(twd_clk))
+                twd_timer_rate = clk_get_rate(twd_clk);
+        else
+                twd_calibrate_rate();
 
         clk->name = "local_timer";
         clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
@@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
         clk->rating = 350;
         clk->set_mode = twd_set_mode;
         clk->set_next_event = twd_set_next_event;
-        clk->shift = 20;
-        clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift);
-        clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
-        clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
 
         this_cpu_clk = __this_cpu_ptr(twd_evt);
         *this_cpu_clk = clk;
 
-        clockevents_register_device(clk);
-
+        clockevents_config_and_register(clk, twd_timer_rate,
+                                        0xf, 0xffffffff);
         enable_percpu_irq(clk->irq, 0);
 }
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c
index 93a22d282c16..1794cc3b0f18 100644
--- a/arch/arm/kernel/suspend.c
+++ b/arch/arm/kernel/suspend.c
@@ -1,13 +1,12 @@
 #include <linux/init.h>
 
+#include <asm/idmap.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/memory.h>
 #include <asm/suspend.h>
 #include <asm/tlbflush.h>
 
-static pgd_t *suspend_pgd;
-
 extern int __cpu_suspend(unsigned long, int (*)(unsigned long));
 extern void cpu_resume_mmu(void);
 
@@ -21,7 +20,7 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
         *save_ptr = virt_to_phys(ptr);
 
         /* This must correspond to the LDM in cpu_resume() assembly */
-        *ptr++ = virt_to_phys(suspend_pgd);
+        *ptr++ = virt_to_phys(idmap_pgd);
         *ptr++ = sp;
         *ptr++ = virt_to_phys(cpu_do_resume);
 
@@ -42,7 +41,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
         struct mm_struct *mm = current->active_mm;
         int ret;
 
-        if (!suspend_pgd)
+        if (!idmap_pgd)
                 return -EINVAL;
 
         /*
@@ -59,14 +58,3 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
 
         return ret;
 }
-
-static int __init cpu_suspend_init(void)
-{
-        suspend_pgd = pgd_alloc(&init_mm);
-        if (suspend_pgd) {
-                unsigned long addr = virt_to_phys(cpu_resume_mmu);
-                identity_mapping_add(suspend_pgd, addr, addr + SECTION_SIZE);
-        }
-        return suspend_pgd ? 0 : -ENOMEM;
-}
-core_initcall(cpu_suspend_init);
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 5f452f8fde05..df745188f5de 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -25,6 +25,7 @@
 #include <linux/syscalls.h>
 #include <linux/perf_event.h>
 
+#include <asm/opcodes.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
 
@@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr)
 
         perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
 
+        res = arm_check_condition(instr, regs->ARM_cpsr);
+        switch (res) {
+        case ARM_OPCODE_CONDTEST_PASS:
+                break;
+        case ARM_OPCODE_CONDTEST_FAIL:
+                /* Condition failed - return to next instruction */
+                regs->ARM_pc += 4;
+                return 0;
+        case ARM_OPCODE_CONDTEST_UNCOND:
+                /* If unconditional encoding - not a SWP, undef */
+                return -EFAULT;
+        default:
+                return -EINVAL;
+        }
+
         if (current->pid != previous_pid) {
                 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
                          current->comm, (unsigned long)current->pid);
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30e302d33e0a..01ec453bb924 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
  */
 void __init tcm_init(void)
 {
-        u32 tcm_status = read_cpuid_tcmstatus();
-        u8 dtcm_banks = (tcm_status >> 16) & 0x03;
-        u8 itcm_banks = (tcm_status & 0x03);
+        u32 tcm_status;
+        u8 dtcm_banks;
+        u8 itcm_banks;
         size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
         size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
         char *start;
@@ -191,6 +191,22 @@ void __init tcm_init(void)
         int ret;
         int i;
 
+        /*
+         * Prior to ARMv5 there is no TCM, and trying to read the status
+         * register will hang the processor.
+         */
+        if (cpu_architecture() < CPU_ARCH_ARMv5) {
+                if (dtcm_code_sz || itcm_code_sz)
+                        pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
+                                "ITCM code compiled in, but no TCM present "
+                                "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
+                return;
+        }
+
+        tcm_status = read_cpuid_tcmstatus();
+        dtcm_banks = (tcm_status >> 16) & 0x03;
+        itcm_banks = (tcm_status & 0x03);
+
         /* Values greater than 2 for D/ITCM banks are "reserved" */
         if (dtcm_banks > 2)
                 dtcm_banks = 0;
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 1040c00405d0..8200deaa14f6 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -43,7 +43,7 @@
 
 struct cputopo_arm cpu_topology[NR_CPUS];
 
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+const struct cpumask *cpu_coregroup_mask(int cpu)
 {
         return &cpu_topology[cpu].core_sibling;
 }
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index e7e8365795c3..00df012c4678 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -67,7 +67,7 @@ EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2);
 
 struct unwind_ctrl_block {
         unsigned long vrs[16];          /* virtual register set */
-        unsigned long *insn;            /* pointer to the current instructions word */
+        const unsigned long *insn;      /* pointer to the current instructions word */
         int entries;                    /* number of entries left to interpret */
         int byte;                       /* current byte number in the instructions word */
 };
@@ -83,8 +83,9 @@ enum regs {
         PC = 15
 };
 
-extern struct unwind_idx __start_unwind_idx[];
-extern struct unwind_idx __stop_unwind_idx[];
+extern const struct unwind_idx __start_unwind_idx[];
+static const struct unwind_idx *__origin_unwind_idx;
+extern const struct unwind_idx __stop_unwind_idx[];
 
 static DEFINE_SPINLOCK(unwind_lock);
 static LIST_HEAD(unwind_tables);
@@ -98,45 +99,99 @@ static LIST_HEAD(unwind_tables);
 })
 
 /*
- * Binary search in the unwind index. The entries entries are
+ * Binary search in the unwind index. The entries are
  * guaranteed to be sorted in ascending order by the linker.
+ *
+ * start = first entry
+ * origin = first entry with positive offset (or stop if there is no such entry)
+ * stop - 1 = last entry
  */
-static struct unwind_idx *search_index(unsigned long addr,
-                                       struct unwind_idx *first,
-                                       struct unwind_idx *last)
+static const struct unwind_idx *search_index(unsigned long addr,
+                                       const struct unwind_idx *start,
+                                       const struct unwind_idx *origin,
+                                       const struct unwind_idx *stop)
 {
-        pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last);
+        unsigned long addr_prel31;
+
+        pr_debug("%s(%08lx, %p, %p, %p)\n",
+                        __func__, addr, start, origin, stop);
+
+        /*
+         * only search in the section with the matching sign. This way the
+         * prel31 numbers can be compared as unsigned longs.
+         */
+        if (addr < (unsigned long)start)
+                /* negative offsets: [start; origin) */
+                stop = origin;
+        else
+                /* positive offsets: [origin; stop) */
+                start = origin;
+
+        /* prel31 for address relavive to start */
+        addr_prel31 = (addr - (unsigned long)start) & 0x7fffffff;
 
-        if (addr < first->addr) {
+        while (start < stop - 1) {
+                const struct unwind_idx *mid = start + ((stop - start) >> 1);
+
+                /*
+                 * As addr_prel31 is relative to start an offset is needed to
+                 * make it relative to mid.
+                 */
+                if (addr_prel31 - ((unsigned long)mid - (unsigned long)start) <
+                                mid->addr_offset)
+                        stop = mid;
+                else {
+                        /* keep addr_prel31 relative to start */
+                        addr_prel31 -= ((unsigned long)mid -
+                                        (unsigned long)start);
+                        start = mid;
+                }
+        }
+
+        if (likely(start->addr_offset <= addr_prel31))
+                return start;
+        else {
                 pr_warning("unwind: Unknown symbol address %08lx\n", addr);
                 return NULL;
-        } else if (addr >= last->addr)
-                return last;
+        }
+}
 
-        while (first < last - 1) {
-                struct unwind_idx *mid = first + ((last - first + 1) >> 1);
+static const struct unwind_idx *unwind_find_origin(
+                const struct unwind_idx *start, const struct unwind_idx *stop)
+{
+        pr_debug("%s(%p, %p)\n", __func__, start, stop);
+        while (start < stop) {
+                const struct unwind_idx *mid = start + ((stop - start) >> 1);
 
-                if (addr < mid->addr)
-                        last = mid;
+                if (mid->addr_offset >= 0x40000000)
+                        /* negative offset */
+                        start = mid + 1;
                 else
-                        first = mid;
+                        /* positive offset */
+                        stop = mid;
         }
-
-        return first;
+        pr_debug("%s -> %p\n", __func__, stop);
+        return stop;
 }
 
-static struct unwind_idx *unwind_find_idx(unsigned long addr)
+static const struct unwind_idx *unwind_find_idx(unsigned long addr)
 {
-        struct unwind_idx *idx = NULL;
+        const struct unwind_idx *idx = NULL;
         unsigned long flags;
 
         pr_debug("%s(%08lx)\n", __func__, addr);
 
-        if (core_kernel_text(addr))
+        if (core_kernel_text(addr)) {
+                if (unlikely(!__origin_unwind_idx))
+                        __origin_unwind_idx =
+                                unwind_find_origin(__start_unwind_idx,
+                                                __stop_unwind_idx);
+
                 /* main unwind table */
                 idx = search_index(addr, __start_unwind_idx,
-                                   __stop_unwind_idx - 1);
-        else {
+                                   __origin_unwind_idx,
+                                   __stop_unwind_idx);
+        } else {
                 /* module unwind tables */
                 struct unwind_table *table;
 
@@ -145,7 +200,8 @@ static struct unwind_idx *unwind_find_idx(unsigned long addr)
                         if (addr >= table->begin_addr &&
                             addr < table->end_addr) {
                                 idx = search_index(addr, table->start,
-                                                   table->stop - 1);
+                                                   table->origin,
+                                                   table->stop);
                                 /* Move-to-front to exploit common traces */
                                 list_move(&table->list, &unwind_tables);
                                 break;
@@ -274,7 +330,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
 int unwind_frame(struct stackframe *frame)
 {
         unsigned long high, low;
-        struct unwind_idx *idx;
+        const struct unwind_idx *idx;
         struct unwind_ctrl_block ctrl;
 
         /* only go to a higher address on the stack */
@@ -399,7 +455,6 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
                                       unsigned long text_size)
 {
         unsigned long flags;
-        struct unwind_idx *idx;
         struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL);
 
         pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size,
@@ -408,15 +463,12 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
         if (!tab)
                 return tab;
 
-        tab->start = (struct unwind_idx *)start;
-        tab->stop = (struct unwind_idx *)(start + size);
+        tab->start = (const struct unwind_idx *)start;
+        tab->stop = (const struct unwind_idx *)(start + size);
+        tab->origin = unwind_find_origin(tab->start, tab->stop);
         tab->begin_addr = text_addr;
         tab->end_addr = text_addr + text_size;
 
-        /* Convert the symbol addresses to absolute values */
-        for (idx = tab->start; idx < tab->stop; idx++)
-                idx->addr = prel31_to_addr(&idx->addr);
-
         spin_lock_irqsave(&unwind_lock, flags);
         list_add_tail(&tab->list, &unwind_tables);
         spin_unlock_irqrestore(&unwind_lock, flags);
@@ -437,16 +489,3 @@ void unwind_table_del(struct unwind_table *tab)
 
         kfree(tab);
 }
-
-int __init unwind_init(void)
-{
-        struct unwind_idx *idx;
-
-        /* Convert the symbol addresses to absolute values */
-        for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++)
-                idx->addr = prel31_to_addr(&idx->addr);
-
-        pr_debug("unwind: ARM stack unwinding initialised\n");
-
-        return 0;
-}
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 20b3041e0860..f76e75548670 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -13,6 +13,12 @@
         *(.proc.info.init)                                              \
         VMLINUX_SYMBOL(__proc_info_end) = .;
 
+#define IDMAP_TEXT                                                      \
+        ALIGN_FUNCTION();                                               \
+        VMLINUX_SYMBOL(__idmap_text_start) = .;                         \
+        *(.idmap.text)                                                  \
+        VMLINUX_SYMBOL(__idmap_text_end) = .;
+
 #ifdef CONFIG_HOTPLUG_CPU
 #define ARM_CPU_DISCARD(x)
 #define ARM_CPU_KEEP(x)         x
@@ -92,6 +98,7 @@ SECTIONS
                         SCHED_TEXT
                         LOCK_TEXT
                         KPROBES_TEXT
+                        IDMAP_TEXT
 #ifdef CONFIG_MMU
                         *(.fixup)
 #endif
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index cf73a7f742dd..0ade0acc1ed9 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -13,7 +13,8 @@ lib-y		:= backtrace.o changebit.o csumipv6.o csumpartial.o   \
                    testchangebit.o testclearbit.o testsetbit.o        \
                    ashldi3.o ashrdi3.o lshrdi3.o muldi3.o             \
                    ucmpdi2.o lib1funcs.o div64.o                      \
-                   io-readsb.o io-writesb.o io-readsl.o io-writesl.o
+                   io-readsb.o io-writesb.o io-readsl.o io-writesl.o  \
+                   call_with_stack.o
 
 mmu-y   := clear_user.o copy_page.o getuser.o putuser.o
 
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 10d868a5a481..d6408d1ee543 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,5 +1,9 @@
+#include <asm/unwind.h>
+
 #if __LINUX_ARM_ARCH__ >= 6
-        .macro  bitop, instr
+        .macro  bitop, name, instr
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         mov     r2, #1
@@ -13,9 +17,13 @@
         cmp     r0, #0
         bne     1b
         bx      lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 
-        .macro  testop, instr, store
+        .macro  testop, name, instr, store
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         mov     r2, #1
@@ -34,9 +42,13 @@
         cmp     r0, #0
         movne   r0, #1
 2:      bx      lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 #else
-        .macro  bitop, instr
+        .macro  bitop, name, instr
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         and     r2, r0, #31
@@ -49,6 +61,8 @@
         str     r2, [r1, r0, lsl #2]
         restore_irqs ip
         mov     pc, lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 
 /**
@@ -59,7 +73,9 @@
  * Note: we can trivially conditionalise the store instruction
  * to avoid dirtying the data cache.
  */
-        .macro  testop, instr, store
+        .macro  testop, name, instr, store
+ENTRY(  \name           )
+UNWIND( .fnstart        )
         ands    ip, r1, #3
         strneb  r1, [ip]                @ assert word-aligned
         and     r3, r0, #31
@@ -73,5 +89,7 @@
         moveq   r0, #0
         restore_irqs ip
         mov     pc, lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
         .endm
 #endif
diff --git a/arch/arm/lib/call_with_stack.S b/arch/arm/lib/call_with_stack.S
new file mode 100644
index 000000000000..916c80f13ae7
--- /dev/null
+++ b/arch/arm/lib/call_with_stack.S
@@ -0,0 +1,44 @@
+/*
+ * arch/arm/lib/call_with_stack.S
+ *
+ * Copyright (C) 2011 ARM Ltd.
+ * Written by Will Deacon <will.deacon@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+/*
+ * void call_with_stack(void (*fn)(void *), void *arg, void *sp)
+ *
+ * Change the stack to that pointed at by sp, then invoke fn(arg) with
+ * the new stack.
+ */
+ENTRY(call_with_stack)
+        str     sp, [r2, #-4]!
+        str     lr, [r2, #-4]!
+
+        mov     sp, r2
+        mov     r2, r0
+        mov     r0, r1
+
+        adr     lr, BSYM(1f)
+        mov     pc, r2
+
+1:      ldr     lr, [sp]
+        ldr     sp, [sp, #4]
+        mov     pc, lr
+ENDPROC(call_with_stack)
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 68ed5b62e839..f4027862172f 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_change_bit)
-        bitop   eor
-ENDPROC(_change_bit)
+bitop   _change_bit, eor
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 4c04c3b51eeb..f6b75fb64d30 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_clear_bit)
-        bitop   bic
-ENDPROC(_clear_bit)
+bitop   _clear_bit, bic
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index bbee5c66a23e..618fedae4b37 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_set_bit)
-        bitop   orr
-ENDPROC(_set_bit)
+bitop   _set_bit, orr
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 15a4d431f229..4becdc3a59cb 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_test_and_change_bit)
-        testop  eor, str
-ENDPROC(_test_and_change_bit)
+testop  _test_and_change_bit, eor, str
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 521b66b5b95d..918841dcce7a 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_test_and_clear_bit)
-        testop  bicne, strne
-ENDPROC(_test_and_clear_bit)
+testop  _test_and_clear_bit, bicne, strne
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 1c98cc2185bb..8d1b2fe9e487 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                 .text
 
-ENTRY(_test_and_set_bit)
-        testop  orreq, streq
-ENDPROC(_test_and_set_bit)
+testop  _test_and_set_bit, orreq, streq
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index ecdd54dd68c6..29373397d2df 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -313,7 +313,7 @@ static struct at91_gpio_bank at91cap9_gpio[] = {
         }
 };
 
-static void at91cap9_reset(void)
+static void at91cap9_restart(char mode, const char *cmd)
 {
         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
@@ -335,7 +335,7 @@ static void __init at91cap9_map_io(void)
 
 static void __init at91cap9_initialize(void)
 {
-        at91_arch_reset = at91cap9_reset;
+        arm_pm_restart = at91cap9_restart;
         pm_power_off = at91cap9_poweroff;
         at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
 
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 713d3bdbd284..430a9fdc3dbf 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -288,7 +288,7 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
         }
 };
 
-static void at91rm9200_reset(void)
+static void at91rm9200_restart(char mode, const char *cmd)
 {
         /*
          * Perform a hardware reset with the use of the Watchdog timer.
@@ -309,7 +309,7 @@ static void __init at91rm9200_map_io(void)
 
 static void __init at91rm9200_initialize(void)
 {
-        at91_arch_reset = at91rm9200_reset;
+        arm_pm_restart = at91rm9200_restart;
         at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                         | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
                         | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 66591fa53e05..ad930688358c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b84a9f642f59..e76cd49ebc9e 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -195,9 +195,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
-        CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
-        CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
-        CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
         /* more usart lookup table for DT entries */
         CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
@@ -327,7 +327,7 @@ static void __init at91sam9260_map_io(void)
 
 static void __init at91sam9260_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
+        arm_pm_restart = at91sam9_alt_restart;
         pm_power_off = at91sam9260_poweroff;
         at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                         | (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 25e3464fb07f..629fa9774972 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 658a5185abfd..19ac7c0729a0 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -287,7 +287,7 @@ static void __init at91sam9261_map_io(void)
 
 static void __init at91sam9261_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
+        arm_pm_restart = at91sam9_alt_restart;
         pm_power_off = at91sam9261_poweroff;
         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                         | (1 << AT91SAM9261_ID_IRQ2);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index ae78f4d03b73..a178b58b0b9c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index f83fbb0ee0c5..50d016310031 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -305,7 +305,7 @@ static void __init at91sam9263_map_io(void)
 
 static void __init at91sam9263_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
+        arm_pm_restart = at91sam9_alt_restart;
         pm_power_off = at91sam9263_poweroff;
         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index ad017eb1f8df..d5fbac9ff4fa 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  *  USB Device (Gadget)
  * -------------------------------------------------------------------- */
 
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index e0256deb91fb..d3f931c5942e 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -14,20 +14,15 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <mach/at91sam9_sdramc.h>
 #include <mach/at91_rstc.h>
 
                         .arm
 
-                        .globl  at91sam9_alt_reset
+                        .globl  at91sam9_alt_restart
 
-at91sam9_alt_reset:     mrc     p15, 0, r0, c1, c0, 0
-                        orr     r0, r0, #CR_I
-                        mcr     p15, 0, r0, c1, c0, 0           @ enable I-cache
-
-                        ldr     r0, .at91_va_base_sdramc        @ preload constants
+at91sam9_alt_restart:   ldr     r0, .at91_va_base_sdramc        @ preload constants
                         ldr     r1, .at91_va_base_rstc_cr
 
                         mov     r2, #1
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 318b0407ea04..ff21f7a60c63 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -317,7 +317,7 @@ static struct at91_gpio_bank at91sam9g45_gpio[] = {
         }
 };
 
-static void at91sam9g45_reset(void)
+static void at91sam9g45_restart(char mode, const char *cmd)
 {
         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
@@ -340,7 +340,7 @@ static void __init at91sam9g45_map_io(void)
 
 static void __init at91sam9g45_initialize(void)
 {
-        at91_arch_reset = at91sam9g45_reset;
+        arm_pm_restart = at91sam9g45_restart;
         pm_power_off = at91sam9g45_poweroff;
         at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index a238105d2c11..61cbb46f5b0e 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -292,7 +292,7 @@ static void __init at91sam9rl_map_io(void)
 
 static void __init at91sam9rl_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
+        arm_pm_restart = at91sam9_alt_restart;
         pm_power_off = at91sam9rl_poweroff;
         at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 938b34f57741..7f4503bc4cbb 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -57,7 +57,7 @@ extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
 /* reset */
-extern void at91sam9_alt_reset(void);
+extern void at91sam9_alt_restart(char, const char *);
 
  /* GPIO */
 #define AT91RM9200_PQFP         3       /* AT91RM9200 PQFP package has 3 banks */
@@ -71,5 +71,4 @@ struct at91_gpio_bank {
 extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
 extern void __init at91_gpio_irq_setup(void);
 
-extern void (*at91_arch_reset)(void);
 extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4298e7806c76..4ca09ef7ca29 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -30,14 +30,6 @@
 
 #ifndef __ASSEMBLY__
 
-#ifndef CONFIG_ARCH_AT91X40
-#define __arch_ioremap  at91_ioremap
-#define __arch_iounmap  at91_iounmap
-#endif
-
-void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
-void at91_iounmap(volatile void __iomem *addr);
-
 static inline unsigned int at91_sys_read(unsigned int reg_offset)
 {
         void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index 36af14bc13bb..cbd64f3bcecd 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -47,13 +47,4 @@ static inline void arch_idle(void)
 #endif
 }
 
-void (*at91_arch_reset)(void);
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* call the CPU-specific reset function */
-        if (at91_arch_reset)
-                (at91_arch_reset)();
-}
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index 8f4866045b41..ec164a4124c9 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -19,7 +19,7 @@
 #define BOARD_HAVE_NAND_16BIT   (1 << 31)
 static inline int board_have_nand_16bit(void)
 {
-        return system_rev & BOARD_HAVE_NAND_16BIT;
+        return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
 }
 
 #endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-at91/include/mach/vmalloc.h b/arch/arm/mach-at91/include/mach/vmalloc.h
deleted file mode 100644
index 8e4a1bd0ab1d..000000000000
--- a/arch/arm/mach-at91/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#include <mach/hardware.h>
-
-#define VMALLOC_END             (AT91_VIRT_BASE & PGDIR_MASK)
-
-#endif
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index aa64294c7db3..cf98a8f94dc5 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -73,24 +73,6 @@ static struct map_desc at91_io_desc __initdata = {
         .type           = MT_DEVICE,
 };
 
-void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
-                return (void __iomem *)AT91_IO_P2V(p);
-
-        return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
-}
-EXPORT_SYMBOL(at91_ioremap);
-
-void at91_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(at91_iounmap);
-
 #define AT91_DBGU0      0xfffff200
 #define AT91_DBGU1      0xffffee00
 
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index 31a143592c81..9e5e7552498c 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -49,7 +49,29 @@ HW_DECLARE_SPINLOCK(gpio)
 #endif
 
 /* sysctl */
-int bcmring_arch_warm_reboot;   /* do a warm reboot on hard reset */
+static int bcmring_arch_warm_reboot;    /* do a warm reboot on hard reset */
+
+static void bcmring_restart(char mode, const char *cmd)
+{
+        printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
+
+        if (mode == 'h') {
+                /* Reboot configured in proc entry */
+                if (bcmring_arch_warm_reboot) {
+                        printk("warm reset\n");
+                        /* Issue Warm reset (do not reset ethernet switch, keep alive) */
+                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
+                } else {
+                        /* Force reset of everything */
+                        printk("force reset\n");
+                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
+                }
+        } else {
+                /* Force reset of everything */
+                printk("force reset\n");
+                chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
+        }
+}
 
 static struct ctl_table_header *bcmring_sysctl_header;
 
@@ -173,4 +195,5 @@ MACHINE_START(BCMRING, "BCMRING")
         .init_irq = bcmring_init_irq,
         .timer = &bcmring_timer,
         .init_machine = bcmring_init_machine
+        .restart = bcmring_restart,
 MACHINE_END
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 43eadbcc29ed..6b67b7e8426c 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -25,7 +25,6 @@
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/amba/bus.h>
 #include <linux/clkdev.h>
@@ -235,7 +234,7 @@ void __init bcmring_init_timer(void)
          */
         bcmring_clocksource_init();
 
-        sp804_clockevents_register(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
+        sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
 }
 
 struct sys_timer bcmring_timer = {
diff --git a/arch/arm/mach-bcmring/dma.c b/arch/arm/mach-bcmring/dma.c
index b52b8de91bde..1a1a27dd5654 100644
--- a/arch/arm/mach-bcmring/dma.c
+++ b/arch/arm/mach-bcmring/dma.c
@@ -36,6 +36,7 @@
 #include <linux/mm.h>
 #include <linux/pfn.h>
 #include <linux/atomic.h>
+#include <linux/sched.h>
 #include <mach/dma.h>
 
 /* I don't quite understand why dc4 fails when this is set to 1 and DMA is enabled */
@@ -1614,7 +1615,7 @@ DMA_MemType_t dma_mem_type(void *addr)
 {
         unsigned long addrVal = (unsigned long)addr;
 
-        if (addrVal >= VMALLOC_END) {
+        if (addrVal >= CONSISTENT_BASE) {
                 /* NOTE: DMA virtual memory space starts at 0xFFxxxxxx */
 
                 /* dma_alloc_xxx pages are physically and virtually contiguous */
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
index 38b37060d426..cb78250db649 100644
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ b/arch/arm/mach-bcmring/include/mach/system.h
@@ -20,35 +20,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/csp/chipcHw_inline.h>
-
-extern int bcmring_arch_warm_reboot;
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
-
-        if (mode == 'h') {
-                /* Reboot configured in proc entry */
-                if (bcmring_arch_warm_reboot) {
-                        printk("warm reset\n");
-                        /* Issue Warm reset (do not reset ethernet switch, keep alive) */
-                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
-                } else {
-                        /* Force reset of everything */
-                        printk("force reset\n");
-                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-                }
-        } else {
-                /* Force reset of everything */
-                printk("force reset\n");
-                chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-        }
-}
-
 #endif
diff --git a/arch/arm/mach-bcmring/include/mach/vmalloc.h b/arch/arm/mach-bcmring/include/mach/vmalloc.h
deleted file mode 100644
index 7397bd7817d9..000000000000
--- a/arch/arm/mach-bcmring/include/mach/vmalloc.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-/*
- * Move VMALLOC_END to 0xf0000000 so that the vm space can range from
- * 0xe0000000 to 0xefffffff. This gives us 256 MB of vm space and handles
- * larger physical memory designs better.
- */
-#define VMALLOC_END       0xf0000000UL
diff --git a/arch/arm/mach-clps711x/Makefile b/arch/arm/mach-clps711x/Makefile
index 4a197315f0cf..f2f0256232e3 100644
--- a/arch/arm/mach-clps711x/Makefile
+++ b/arch/arm/mach-clps711x/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                   := irq.o mm.o time.o
+obj-y                   := common.o
 obj-m                   :=
 obj-n                   :=
 obj-                    :=
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 0276091b7f86..3fb79a1d0bde 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -68,5 +68,6 @@ MACHINE_START(AUTCPU12, "autronix autcpu12")
         .map_io         = autcpu12_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index 25b3bfd0e85a..c314f49d6ef6 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -59,4 +59,5 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712")
         .map_io         = cdb89712_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
index 1df9ec67aa92..a70147e347ac 100644
--- a/arch/arm/mach-clps711x/ceiva.c
+++ b/arch/arm/mach-clps711x/ceiva.c
@@ -60,4 +60,5 @@ MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
         .map_io         = ceiva_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index 80496c09ac59..dbc7842639dc 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -41,5 +41,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
         .map_io         = clps711x_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/common.c
index c2eceee645e3..ab1711b9b4d6 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -1,7 +1,9 @@
 /*
- *  linux/arch/arm/mach-clps711x/irq.c
+ *  linux/arch/arm/mach-clps711x/core.c
  *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
+ *  Core support for the CLPS711x-based machines.
+ *
+ *  Copyright (C) 2001,2011 Deep Blue Solutions Ltd
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,16 +19,42 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+#include <linux/kernel.h>
+#include <linux/mm.h>
 #include <linux/init.h>
-#include <linux/list.h>
+#include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/timex.h>
 
-#include <asm/mach/irq.h>
+#include <asm/sizes.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
-
+#include <asm/leds.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
 #include <asm/hardware/clps7111.h>
 
+/*
+ * This maps the generic CLPS711x registers
+ */
+static struct map_desc clps711x_io_desc[] __initdata = {
+        {
+                .virtual        = CLPS7111_VIRT_BASE,
+                .pfn            = __phys_to_pfn(CLPS7111_PHYS_BASE),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE
+        }
+};
+
+void __init clps711x_map_io(void)
+{
+        iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
+}
+
 static void int1_mask(struct irq_data *d)
 {
         u32 intmr1;
@@ -112,15 +140,15 @@ void __init clps711x_init_irq(void)
 
         for (i = 0; i < NR_IRQS; i++) {
                 if (INT1_IRQS & (1 << i)) {
-                        irq_set_chip_and_handler(i, &int1_chip,
+                        irq_set_chip_and_handler(i, &int1_chip,
                                                  handle_level_irq);
-                        set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+                        set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                 }
                 if (INT2_IRQS & (1 << i)) {
                         irq_set_chip_and_handler(i, &int2_chip,
                                                  handle_level_irq);
                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-                }                       
+                }
         }
 
         /*
@@ -141,3 +169,59 @@ void __init clps711x_init_irq(void)
         clps_writel(0, SYNCIO);
         clps_writel(0, KBDEOI);
 }
+
+/*
+ * gettimeoffset() returns time since last timer tick, in usecs.
+ *
+ * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+ * 'tick' is usecs per jiffy.
+ */
+static unsigned long clps711x_gettimeoffset(void)
+{
+        unsigned long hwticks;
+        hwticks = LATCH - (clps_readl(TC2D) & 0xffff);  /* since last underflow */
+        return (hwticks * (tick_nsec / 1000)) / LATCH;
+}
+
+/*
+ * IRQ handler for the timer
+ */
+static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
+{
+        timer_tick();
+        return IRQ_HANDLED;
+}
+
+static struct irqaction clps711x_timer_irq = {
+        .name           = "CLPS711x Timer Tick",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .handler        = p720t_timer_interrupt,
+};
+
+static void __init clps711x_timer_init(void)
+{
+        struct timespec tv;
+        unsigned int syscon;
+
+        syscon = clps_readl(SYSCON1);
+        syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
+        clps_writel(syscon, SYSCON1);
+
+        clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
+
+        setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
+
+        tv.tv_nsec = 0;
+        tv.tv_sec = clps_readl(RTCDR);
+        do_settimeofday(&tv);
+}
+
+struct sys_timer clps711x_timer = {
+        .init           = clps711x_timer_init,
+        .offset         = clps711x_gettimeoffset,
+};
+
+void clps711x_restart(char mode, const char *cmd)
+{
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index 2b8b801f1dc3..fc0f0650dcb5 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -9,3 +9,4 @@ struct sys_timer;
 extern void clps711x_map_io(void);
 extern void clps711x_init_irq(void);
 extern struct sys_timer clps711x_timer;
+extern void clps711x_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
index 9721f6111dc0..5fad0b4f40ad 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211-arch.c
@@ -62,4 +62,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
         .reserve        = edb7211_reserve,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index d99256687298..3a3f0b702cb4 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -78,4 +78,5 @@ MACHINE_START(FORTUNET, "ARM-FortuNet")
         .map_io         = clps711x_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
index f916cd7a477d..23d6ef8c84da 100644
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ b/arch/arm/mach-clps711x/include/mach/system.h
@@ -32,9 +32,4 @@ static inline void arch_idle(void)
         mov     r0, r0");
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        cpu_reset(0);
-}
-
 #endif
diff --git a/arch/arm/mach-clps711x/include/mach/vmalloc.h b/arch/arm/mach-clps711x/include/mach/vmalloc.h
deleted file mode 100644
index 467b96137e47..000000000000
--- a/arch/arm/mach-clps711x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-clps711x/mm.c b/arch/arm/mach-clps711x/mm.c
deleted file mode 100644
index 986592176767..000000000000
--- a/arch/arm/mach-clps711x/mm.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- *  linux/arch/arm/mach-clps711x/mm.c
- *
- *  Generic MM setup for the CLPS711x-based machines.
- *
- *  Copyright (C) 2001 Deep Blue Solutions Ltd
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/mach/map.h>
-#include <asm/hardware/clps7111.h>
-
-/*
- * This maps the generic CLPS711x registers
- */
-static struct map_desc clps711x_io_desc[] __initdata = {
-        {
-                .virtual        = CLPS7111_VIRT_BASE,
-                .pfn            = __phys_to_pfn(CLPS7111_PHYS_BASE),
-                .length         = SZ_1M,
-                .type           = MT_DEVICE
-        }
-};
-
-void __init clps711x_map_io(void)
-{
-        iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
-}
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 6ecea95f38b2..42ee8f33eafb 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -93,6 +93,7 @@ MACHINE_START(P720T, "ARM-Prospector720T")
         .map_io         = p720t_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
 
 static int p720t_hw_init(void)
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c
deleted file mode 100644
index d581ef0bcd24..000000000000
--- a/arch/arm/mach-clps711x/time.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- *  linux/arch/arm/mach-clps711x/time.c
- *
- *  Copyright (C) 2001 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <linux/timex.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/sched.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <asm/leds.h>
-#include <asm/hardware/clps7111.h>
-
-#include <asm/mach/time.h>
-
-
-/*
- * gettimeoffset() returns time since last timer tick, in usecs.
- *
- * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
- * 'tick' is usecs per jiffy.
- */
-static unsigned long clps711x_gettimeoffset(void)
-{
-        unsigned long hwticks;
-        hwticks = LATCH - (clps_readl(TC2D) & 0xffff);  /* since last underflow */
-        return (hwticks * (tick_nsec / 1000)) / LATCH;
-}
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t
-p720t_timer_interrupt(int irq, void *dev_id)
-{
-        timer_tick();
-        return IRQ_HANDLED;
-}
-
-static struct irqaction clps711x_timer_irq = {
-        .name           = "CLPS711x Timer Tick",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = p720t_timer_interrupt,
-};
-
-static void __init clps711x_timer_init(void)
-{
-        struct timespec tv;
-        unsigned int syscon;
-
-        syscon = clps_readl(SYSCON1);
-        syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
-        clps_writel(syscon, SYSCON1);
-
-        clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
-
-        setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
-
-        tv.tv_nsec = 0;
-        tv.tv_sec = clps_readl(RTCDR);
-        do_settimeofday(&tv);
-}
-
-struct sys_timer clps711x_timer = {
-        .init           = clps711x_timer_init,
-        .offset         = clps711x_gettimeoffset,
-};
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 55f7b4b08ab9..2c5fb4c7e509 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -26,6 +26,7 @@
 #include <linux/mtd/partitions.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
@@ -201,5 +202,7 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
         .map_io         = cns3420_map_io,
         .init_irq       = cns3xxx_init_irq,
         .timer          = &cns3xxx_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = cns3420_init,
+        .restart        = cns3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index fcd225343c61..4894b8c17151 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -22,5 +22,6 @@ static inline void cns3xxx_l2x0_init(void) {}
 void __init cns3xxx_map_io(void);
 void __init cns3xxx_init_irq(void);
 void cns3xxx_power_off(void);
+void cns3xxx_restart(char, const char *);
 
 #endif /* __CNS3XXX_CORE_H */
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index d87bfc397d39..01c57df5f716 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,8 +8,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <asm/hardware/entry-macro-gic.S>
-
                 .macro  disable_fiq
                 .endm
 
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 4f16c9b79f78..9e56b7dc133a 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -11,7 +11,6 @@
 #ifndef __MACH_SYSTEM_H
 #define __MACH_SYSTEM_H
 
-#include <linux/io.h>
 #include <asm/proc-fns.h>
 
 static inline void arch_idle(void)
@@ -23,6 +22,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
-
 #endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h b/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
deleted file mode 100644
index 1dd231d2f772..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * Copyright 2000 Russell King.
- * Copyright 2003 ARM Limited
- * Copyright 2008 Cavium Networks
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-
-#define VMALLOC_END             0xd8000000UL
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 0c04678615ce..36458080332a 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,9 +11,9 @@
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/atomic.h>
-#include <mach/system.h>
 #include <mach/cns3xxx.h>
 #include <mach/pm.h>
+#include "core.h"
 
 void cns3xxx_pwr_clk_en(unsigned int block)
 {
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
 }
 EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);
 
-void arch_reset(char mode, const char *cmd)
+void cns3xxx_restart(char mode, const char *cmd)
 {
         /*
          * To reset, we hit the on-board reset register
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 495e31306fc0..2db78bd5c835 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -4,7 +4,7 @@
 #
 
 # Common objects
-obj-y                   := time.o clock.o serial.o io.o psc.o \
+obj-y                   := time.o clock.o serial.o psc.o \
                            dma.o usb.o common.o sram.o aemif.o
 
 obj-$(CONFIG_DAVINCI_MUX)               += mux.o
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 11c3db985285..dc1afe5be20c 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -682,4 +682,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
         .timer          = &davinci_timer,
         .init_machine   = da830_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1d7d24995226..f8a682f60a42 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
         .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
         .tdm_slots      = 2,
         .serial_dir     = da850_iis_serializer_direction,
-        .asp_chan_q     = EVENTQ_1,
+        .asp_chan_q     = EVENTQ_0,
         .version        = MCASP_VERSION_2,
         .txnumevt       = 1,
         .rxnumevt       = 1,
@@ -1411,4 +1411,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
         .timer          = &davinci_timer,
         .init_machine   = da850_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 4e0e707c313d..275341f159fb 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -357,4 +357,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
         .timer        = &davinci_timer,
         .init_machine = dm355_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index ff2d2413279a..e99db28181ae 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -276,4 +276,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
         .timer        = &davinci_timer,
         .init_machine = dm355_leopard_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1918ae711428..346e1de2f5a8 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
                 /* UBL (a few copies) plus U-Boot */
                 .name           = "bootloader",
                 .offset         = 0,
-                .size           = 28 * NAND_BLOCK_SIZE,
+                .size           = 30 * NAND_BLOCK_SIZE,
                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
         }, {
                 /* U-Boot environment */
@@ -618,5 +618,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
         .timer          = &davinci_timer,
         .init_machine   = dm365_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 0cf8abf78d33..a64b49cfedca 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -719,4 +719,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
         .timer        = &davinci_timer,
         .init_machine = davinci_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f837a8..64017558860b 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
         int val;
         u32 value;
 
-        if (!vpif_vsclkdis_reg || !cpld_client)
+        if (!vpif_vidclkctl_reg || !cpld_client)
                 return -ENXIO;
 
         val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                 return val;
 
         spin_lock_irqsave(&vpif_reg_lock, flags);
-        value = __raw_readl(vpif_vsclkdis_reg);
+        value = __raw_readl(vpif_vidclkctl_reg);
         if (mux_mode) {
                 val &= VPIF_INPUT_TWO_CHANNEL;
                 value |= VIDCH1CLK;
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                 val |= VPIF_INPUT_ONE_CHANNEL;
                 value &= ~VIDCH1CLK;
         }
-        __raw_writel(value, vpif_vsclkdis_reg);
+        __raw_writel(value, vpif_vidclkctl_reg);
         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 
         err = i2c_smbus_write_byte(cpld_client, val);
@@ -799,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
         .timer        = &davinci_timer,
         .init_machine = evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
 
 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
@@ -808,5 +809,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
         .timer        = &davinci_timer,
         .init_machine = evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 3cfff555e8f2..672d820e2aa4 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -573,4 +573,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
         .timer          = &davinci_timer,
         .init_machine   = mityomapl138_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index e5f231aefee4..6c4a16415d47 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -278,4 +278,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
         .timer          = &davinci_timer,
         .init_machine = davinci_ntosd2_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index c6701e4a795c..e7c0c7c53493 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -344,4 +344,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
         .timer          = &davinci_timer,
         .init_machine   = omapl138_hawk_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 5dd4da9d2308..0b136a831c59 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -157,4 +157,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
         .timer        = &davinci_timer,
         .init_machine = davinci_sffsdr_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index f69e40a29e02..5f14e30b00d8 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -283,4 +283,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM")
         .timer          = &davinci_timer,
         .init_machine   = tnetv107x_evm_board_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = tnetv107x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 865ffe5899ac..cb9b2e47510c 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -97,9 +97,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
         local_flush_tlb_all();
         flush_cache_all();
 
-        if (!davinci_soc_info.reset)
-                davinci_soc_info.reset = davinci_watchdog_reset;
-
         /*
          * We want to check CPU revision early for cpu_is_xxxx() macros.
          * IO space mapping must be initialized before we can do that.
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a6bf5dcaef13..deee5c2da754 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1201,7 +1201,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
         .gpio_irq               = IRQ_DA8XX_GPIO0,
         .serial_dev             = &da8xx_serial_device,
         .emac_pdata             = &da8xx_emac_pdata,
-        .reset_device           = &da8xx_wdt_device,
 };
 
 void __init da830_init(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b047f8702278..0ed7fdb64efb 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1121,7 +1121,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
         .emac_pdata             = &da8xx_emac_pdata,
         .sram_dma               = DA8XX_ARM_RAM_BASE,
         .sram_len               = SZ_8K,
-        .reset_device           = &da8xx_wdt_device,
 };
 
 void __init da850_init(void)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 68def7188868..42dbf3dc11ab 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -363,6 +363,11 @@ struct platform_device da8xx_wdt_device = {
         .resource       = da8xx_watchdog_resources,
 };
 
+void da8xx_restart(char mode, const char *cmd)
+{
+        davinci_watchdog_reset(&da8xx_wdt_device);
+}
+
 int __init da8xx_register_watchdog(void)
 {
         return platform_device_register(&da8xx_wdt_device);
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 806a2f02b980..50c0156b4262 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -291,6 +291,11 @@ struct platform_device davinci_wdt_device = {
         .resource       = wdt_resources,
 };
 
+void davinci_restart(char mode, const char *cmd)
+{
+        davinci_watchdog_reset(&davinci_wdt_device);
+}
+
 static void davinci_init_wdt(void)
 {
         platform_device_register(&davinci_wdt_device);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index fe520d4167a2..19667cfc5de0 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -853,7 +853,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
         .serial_dev             = &dm355_serial_device,
         .sram_dma               = 0x00010000,
         .sram_len               = SZ_32K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 679e168dce34..f15b435cc655 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1083,7 +1083,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
         .emac_pdata             = &dm365_emac_pdata,
         .sram_dma               = 0x00010000,
         .sram_len               = SZ_32K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm365_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 3470983aa343..0800f9cf33bb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -767,7 +767,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
         .emac_pdata             = &dm644x_emac_pdata,
         .sram_dma               = 0x00008000,
         .sram_len               = SZ_16K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm644x_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed534f8e..00f774394b16 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -161,7 +161,6 @@ static struct clk dsp_clk = {
         .name = "dsp",
         .parent = &pll1_sysclk1,
         .lpsc = DM646X_LPSC_C64X_CPU,
-        .flags = PSC_DSP,
         .usecount = 1,                  /* REVISIT how to disable? */
 };
 
@@ -855,7 +854,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
         .emac_pdata             = &dm646x_emac_pdata,
         .sram_dma               = 0x10010000,
         .sram_len               = SZ_32K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a57cba21e21e..5cd39a4e0c96 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -77,14 +77,13 @@ struct davinci_soc_info {
         struct emac_platform_data       *emac_pdata;
         dma_addr_t                      sram_dma;
         unsigned                        sram_len;
-        struct platform_device          *reset_device;
-        void                            (*reset)(struct platform_device *);
 };
 
 extern struct davinci_soc_info davinci_soc_info;
 
 extern void davinci_common_init(struct davinci_soc_info *soc_info);
 extern void davinci_init_ide(void);
+void davinci_restart(char mode, const char *cmd);
 
 /* standard place to map on-chip SRAMs; they *may* support DMA */
 #define SRAM_VIRT       0xfffe0000
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index eaca7d8b9d68..ee3461d7ec1b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -91,6 +91,7 @@ int da8xx_register_cpuidle(void);
 void __iomem * __init da8xx_get_mem_ctlr(void);
 int da850_register_pm(struct platform_device *pdev);
 int __init da850_register_sata(unsigned long refclkpn);
+void da8xx_restart(char mode, const char *cmd);
 
 extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index d1b954955c12..b2267d1e1a71 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -21,12 +21,4 @@
 #define __mem_pci(a)            (a)
 #define __mem_isa(a)            (a)
 
-#ifndef __ASSEMBLER__
-#define __arch_ioremap          davinci_ioremap
-#define __arch_iounmap          davinci_iounmap
-
-void __iomem *davinci_ioremap(unsigned long phys, size_t size,
-                              unsigned int type);
-void davinci_iounmap(volatile void __iomem *addr);
-#endif
 #endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index fa59c097223d..8bc3fc256171 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
 #define PTCMD           0x120
 #define PTSTAT          0x128
 #define PDSTAT          0x200
-#define PDCTL1          0x304
+#define PDCTL           0x300
 #define MDSTAT          0x800
 #define MDCTL           0xA00
 
@@ -244,7 +244,10 @@
 #define PSC_STATE_ENABLE        3
 
 #define MDSTAT_STATE_MASK       0x3f
+#define PDSTAT_STATE_MASK       0x1f
 #define MDCTL_FORCE             BIT(31)
+#define PDCTL_NEXT              BIT(1)
+#define PDCTL_EPCGOOD           BIT(8)
 
 #ifndef __ASSEMBLER__
 
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index e65629c20769..fcb7a015aba5 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -18,10 +18,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (davinci_soc_info.reset)
-                davinci_soc_info.reset(davinci_soc_info.reset_device);
-}
-
 #endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 89c1fdc63c0b..83e5926f3c46 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -54,6 +54,7 @@ extern struct platform_device tnetv107x_serial_device;
 extern void __init tnetv107x_init(void);
 extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *);
 extern void __init tnetv107x_irq_init(void);
+void tnetv107x_restart(char mode, const char *cmd);
 
 #endif
 
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
deleted file mode 100644
index d49646a8e206..000000000000
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * DaVinci vmalloc definitions
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <mach/hardware.h>
-
-/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
-#define VMALLOC_END       (IO_VIRT - (2<<20))
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c
deleted file mode 100644
index 8ea60a8b2495..000000000000
--- a/arch/arm/mach-davinci/io.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * DaVinci I/O mapping code
- *
- * Copyright (C) 2005-2006 Texas Instruments
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/io.h>
-
-#include <asm/tlb.h>
-#include <asm/mach/map.h>
-
-#include <mach/common.h>
-
-/*
- * Intercept ioremap() requests for addresses in our fixed mapping regions.
- */
-void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        struct map_desc *desc = davinci_soc_info.io_desc;
-        int desc_num = davinci_soc_info.io_desc_num;
-        int i;
-
-        for (i = 0; i < desc_num; i++, desc++) {
-                unsigned long iophys = __pfn_to_phys(desc->pfn);
-                unsigned long iosize = desc->length;
-
-                if (p >= iophys && (p + size) <= (iophys + iosize))
-                        return __io(desc->virtual + p - iophys);
-        }
-
-        return __arm_ioremap_caller(p, size, type,
-                                        __builtin_return_address(0));
-}
-EXPORT_SYMBOL(davinci_ioremap);
-
-void davinci_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(davinci_iounmap);
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 1fb6bdff38c1..d7e210f4b55c 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 unsigned int id, bool enable, u32 flags)
 {
-        u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
+        u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
         void __iomem *psc_base;
         struct davinci_soc_info *soc_info = &davinci_soc_info;
         u32 next_state = PSC_STATE_ENABLE;
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 mdctl |= MDCTL_FORCE;
         __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
 
-        pdstat = __raw_readl(psc_base + PDSTAT);
-        if ((pdstat & 0x00000001) == 0) {
-                pdctl1 = __raw_readl(psc_base + PDCTL1);
-                pdctl1 |= 0x1;
-                __raw_writel(pdctl1, psc_base + PDCTL1);
+        pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
+        if ((pdstat & PDSTAT_STATE_MASK) == 0) {
+                pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
+                pdctl |= PDCTL_NEXT;
+                __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
 
                 ptcmd = 1 << domain;
                 __raw_writel(ptcmd, psc_base + PTCMD);
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                         epcpr = __raw_readl(psc_base + EPCPR);
                 } while ((((epcpr >> domain) & 1) == 0));
 
-                pdctl1 = __raw_readl(psc_base + PDCTL1);
-                pdctl1 |= 0x100;
-                __raw_writel(pdctl1, psc_base + PDCTL1);
+                pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
+                pdctl |= PDCTL_EPCGOOD;
+                __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
         } else {
                 ptcmd = 1 << domain;
                 __raw_writel(ptcmd, psc_base + PTCMD);
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 409bb869c7c7..dc1a209b9b66 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -730,6 +730,11 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev)
         __raw_writel(1, &regs->kick);
 }
 
+void tnetv107x_restart(char mode, const char *cmd)
+{
+        tnetv107x_watchdog_reset(&tnetv107x_wdt_device);
+}
+
 static struct davinci_soc_info tnetv107x_soc_info = {
         .io_desc                = io_desc,
         .io_desc_num            = ARRAY_SIZE(io_desc),
@@ -752,8 +757,6 @@ static struct davinci_soc_info tnetv107x_soc_info = {
         .gpio_num               = TNETV107X_N_GPIO,
         .timer_info             = &timer_info,
         .serial_dev             = &tnetv107x_serial_device,
-        .reset                  = tnetv107x_watchdog_reset,
-        .reset_device           = &tnetv107x_wdt_device,
 };
 
 void __init tnetv107x_init(void)
diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c
index c8a406f7e946..792b4e2e24f1 100644
--- a/arch/arm/mach-dove/cm-a510.c
+++ b/arch/arm/mach-dove/cm-a510.c
@@ -93,4 +93,5 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board")
         .init_early     = dove_init_early,
         .init_irq       = dove_init_irq,
         .timer          = &dove_timer,
+        .restart        = dove_restart,
 MACHINE_END
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index a9e0dae86a26..13bb236cd0cd 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -292,3 +292,19 @@ void __init dove_init(void)
         dove_xor0_init();
         dove_xor1_init();
 }
+
+void dove_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable soft reset to assert RSTOUTn.
+         */
+        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+        /*
+         * Assert soft reset.
+         */
+        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6a2046e44706..42027305c107 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -39,5 +39,6 @@ void dove_spi1_init(void);
 void dove_i2c_init(void);
 void dove_sdio0_init(void);
 void dove_sdio1_init(void);
+void dove_restart(char, const char *);
 
 #endif
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c
index 11ea34e4fc76..ea77ae430b2d 100644
--- a/arch/arm/mach-dove/dove-db-setup.c
+++ b/arch/arm/mach-dove/dove-db-setup.c
@@ -100,4 +100,5 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
         .init_early     = dove_init_early,
         .init_irq       = dove_init_irq,
         .timer          = &dove_timer,
+        .restart        = dove_restart,
 MACHINE_END
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index b20ec9af7882..ad1165d488c1 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_DOVE_H
 #define __ASM_ARCH_DOVE_H
 
-#include <mach/vmalloc.h>
-
 /*
  * Marvell Dove address maps.
  *
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
index 356afda56853..3027954f6162 100644
--- a/arch/arm/mach-dove/include/mach/system.h
+++ b/arch/arm/mach-dove/include/mach/system.h
@@ -9,28 +9,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable soft reset to assert RSTOUTn.
-         */
-        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-        /*
-         * Assert soft reset.
-         */
-        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-        while (1)
-                ;
-}
-
-
 #endif
diff --git a/arch/arm/mach-dove/include/mach/vmalloc.h b/arch/arm/mach-dove/include/mach/vmalloc.h
deleted file mode 100644
index a28792cf761e..000000000000
--- a/arch/arm/mach-dove/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-dove/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfd800000UL
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index d0ce8abdd4b6..294aad07f7a0 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -278,13 +278,19 @@ static int __init ebsa110_init(void)
 
 arch_initcall(ebsa110_init);
 
+static void ebsa110_restart(char mode, const char *cmd)
+{
+        soft_restart(0x80000000);
+}
+
 MACHINE_START(EBSA110, "EBSA110")
         /* Maintainer: Russell King */
         .atag_offset    = 0x400,
         .reserve_lp0    = 1,
         .reserve_lp2    = 1,
-        .soft_reboot    = 1,
+        .restart_mode   = 's',
         .map_io         = ebsa110_map_io,
         .init_irq       = ebsa110_init_irq,
         .timer          = &ebsa110_timer,
+        .restart        = ebsa110_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
index 9a26245bf1fc..2e4af65edb6f 100644
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ b/arch/arm/mach-ebsa110/include/mach/system.h
@@ -34,6 +34,4 @@ static inline void arch_idle(void)
         asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
 }
 
-#define arch_reset(mode, cmd)   cpu_reset(0x80000000)
-
 #endif
diff --git a/arch/arm/mach-ebsa110/include/mach/vmalloc.h b/arch/arm/mach-ebsa110/include/mach/vmalloc.h
deleted file mode 100644
index ea141b7a3e03..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/vmalloc.h
- *
- *  Copyright (C) 1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       0xdf000000UL
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 0713448206a5..681e939407d4 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -16,6 +16,7 @@
 
 #include <mach/hardware.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -36,6 +37,8 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = adssphere_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 2432a6b7dcac..24203f9a6796 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -906,3 +906,15 @@ void __init ep93xx_init_devices(void)
         platform_device_register(&ep93xx_ohci_device);
         platform_device_register(&ep93xx_leds);
 }
+
+void ep93xx_restart(char mode, const char *cmd)
+{
+        /*
+         * Set then clear the SWRST bit to initiate a software reset
+         */
+        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
+        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 70ef8c527d27..d115653edca3 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -39,6 +39,7 @@
 #include <mach/ep93xx_spi.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -250,8 +251,10 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -261,8 +264,10 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -272,8 +277,10 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -283,8 +290,10 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -294,8 +303,10 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -305,8 +316,10 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -316,8 +329,10 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -327,7 +342,9 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 45ee205856f8..af46970dc58e 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -16,6 +16,7 @@
 
 #include <mach/hardware.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -36,6 +37,8 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = gesbc9312_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
index 96b85e2c2c0b..9be6edcf9045 100644
--- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -9,51 +9,9 @@
  * the Free Software Foundation; either version 2 of the License, or (at
  * your option) any later version.
  */
-#include <mach/ep93xx-regs.h>
 
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =(EP93XX_AHB_VIRT_BASE)
-                orr     \base, \base, #0x000b0000
-                mov     \irqnr, #0
-                ldr     \irqstat, [\base]               @ lower 32 interrupts
-                cmp     \irqstat, #0
-                bne     1001f
-
-                eor     \base, \base, #0x00070000
-                ldr     \irqstat, [\base]               @ upper 32 interrupts
-                cmp     \irqstat, #0
-                beq     1002f
-                mov     \irqnr, #0x20
-
-1001:
-                movs    \tmp, \irqstat, lsl #16
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #16
-
-                movs    \tmp, \irqstat, lsl #8
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #8
-
-                movs    \tmp, \irqstat, lsl #4
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #4
-
-                movs    \tmp, \irqstat, lsl #2
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #2
-
-                movs    \tmp, \irqstat, lsl #1
-                addeq   \irqnr, \irqnr, #1
-                orrs    \base, \base, #1
-
-1002:
-                .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 50660455b1d8..d4c934931f9d 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -66,4 +66,6 @@ void ep93xx_register_ac97(void);
 void ep93xx_init_devices(void);
 extern struct sys_timer ep93xx_timer;
 
+void ep93xx_restart(char, const char *);
+
 #endif
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
index 6d661fe9d66c..b5bec7cb9b52 100644
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -1,24 +1,7 @@
 /*
  * arch/arm/mach-ep93xx/include/mach/system.h
  */
-
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        local_irq_disable();
-
-        /*
-         * Set then clear the SWRST bit to initiate a software reset
-         */
-        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-
-        while (1)
-                ;
-}
diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
deleted file mode 100644
index 1b3f25d03d39..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfe800000UL
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index e72f7368876e..7b98084f0c97 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -18,6 +18,7 @@
 
 #include <mach/hardware.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -80,8 +81,10 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -91,8 +94,10 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -102,8 +107,10 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -113,7 +120,9 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 52e090dc9d27..f4e553eca21c 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -25,6 +25,7 @@
 #include <mach/fb.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -80,6 +81,8 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = simone_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 8121e3aedc0a..fd846331ddff 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -31,6 +31,7 @@
 #include <mach/fb.h>
 #include <mach/gpio-ep93xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -177,6 +178,8 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
         .atag_offset    = 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = snappercl15_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 8b2f1435bcac..79f8ecf07a19 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -23,6 +23,7 @@
 #include <mach/hardware.h>
 #include <mach/ts72xx.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
@@ -247,6 +248,8 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
         .atag_offset    = 0x100,
         .map_io         = ts72xx_map_io,
         .init_irq       = ep93xx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = ts72xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d96e4dbec6a8..03dd4012043e 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -361,4 +361,5 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = vision_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 724ec0f3560d..e1efbca2a539 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -17,6 +17,8 @@ choice
 
 config ARCH_EXYNOS4
         bool "SAMSUNG EXYNOS4"
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Samsung EXYNOS4 SoCs based systems
 
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 59069a35e40b..bcb9efc576e9 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -10,15 +10,17 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for EXYNOS4 system
+# Core
 
-obj-$(CONFIG_ARCH_EXYNOS4)      += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o
-obj-$(CONFIG_ARCH_EXYNOS4)      += irq-eint.o dma.o pmu.o
+obj-$(CONFIG_ARCH_EXYNOS4)      += common.o clock.o
 obj-$(CONFIG_CPU_EXYNOS4210)    += clock-exynos4210.o
 obj-$(CONFIG_SOC_EXYNOS4212)    += clock-exynos4212.o
+
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 
+obj-$(CONFIG_ARCH_EXYNOS4)      += dma.o pmu.o
+
 obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
 
 obj-$(CONFIG_EXYNOS4_MCT)       += mct.o
@@ -45,6 +47,7 @@ obj-$(CONFIG_EXYNOS4_DEV_PD)		+= dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)        += dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)         += dev-dwmci.o
 
+obj-$(CONFIG_ARCH_EXYNOS4)              += setup-i2c0.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)        += setup-fimc.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)       += setup-fimd0.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C1)        += setup-i2c1.o
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c
index b9d5ef670eb4..a5823a7f249e 100644
--- a/arch/arm/mach-exynos/clock-exynos4210.c
+++ b/arch/arm/mach-exynos/clock-exynos4210.c
@@ -23,7 +23,6 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/exynos4.h>
 #include <plat/pm.h>
 
 #include <mach/hardware.h>
@@ -31,6 +30,8 @@
 #include <mach/regs-clock.h>
 #include <mach/exynos4-clock.h>
 
+#include "common.h"
+
 static struct sleep_save exynos4210_clock_save[] = {
         SAVE_ITEM(S5P_CLKSRC_IMAGE),
         SAVE_ITEM(S5P_CLKSRC_LCD1),
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index 77d5decb34fd..26a668b0d101 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -23,7 +23,6 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/exynos4.h>
 #include <plat/pm.h>
 
 #include <mach/hardware.h>
@@ -31,6 +30,8 @@
 #include <mach/regs-clock.h>
 #include <mach/exynos4-clock.h>
 
+#include "common.h"
+
 static struct sleep_save exynos4212_clock_save[] = {
         SAVE_ITEM(S5P_CLKSRC_IMAGE),
         SAVE_ITEM(S5P_CLKDIV_IMAGE),
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 2894f0adef5c..83616a039b15 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -21,7 +21,6 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/exynos4.h>
 #include <plat/pm.h>
 
 #include <mach/map.h>
@@ -29,6 +28,8 @@
 #include <mach/sysmmu.h>
 #include <mach/exynos4-clock.h>
 
+#include "common.h"
+
 static struct sleep_save exynos4_clock_save[] = {
         SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
         SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
new file mode 100644
index 000000000000..b6ac6ee658c0
--- /dev/null
+++ b/arch/arm/mach-exynos/common.c
@@ -0,0 +1,714 @@
+/*
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Codes for EXYNOS
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/gpio.h>
+#include <linux/sched.h>
+#include <linux/serial_core.h>
+
+#include <asm/proc-fns.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/regs-irq.h>
+#include <mach/regs-pmu.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/pm.h>
+#include <plat/sdhci.h>
+#include <plat/gpio-cfg.h>
+#include <plat/adc-core.h>
+#include <plat/fb-core.h>
+#include <plat/fimc-core.h>
+#include <plat/iic-core.h>
+#include <plat/tv-core.h>
+#include <plat/regs-serial.h>
+
+#include "common.h"
+
+unsigned int gic_bank_offset __read_mostly;
+
+static const char name_exynos4210[] = "EXYNOS4210";
+static const char name_exynos4212[] = "EXYNOS4212";
+static const char name_exynos4412[] = "EXYNOS4412";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = EXYNOS4210_CPU_ID,
+                .idmask         = EXYNOS4_CPU_MASK,
+                .map_io         = exynos4_map_io,
+                .init_clocks    = exynos4_init_clocks,
+                .init_uarts     = exynos4_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos4210,
+        }, {
+                .idcode         = EXYNOS4212_CPU_ID,
+                .idmask         = EXYNOS4_CPU_MASK,
+                .map_io         = exynos4_map_io,
+                .init_clocks    = exynos4_init_clocks,
+                .init_uarts     = exynos4_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos4212,
+        }, {
+                .idcode         = EXYNOS4412_CPU_ID,
+                .idmask         = EXYNOS4_CPU_MASK,
+                .map_io         = exynos4_map_io,
+                .init_clocks    = exynos4_init_clocks,
+                .init_uarts     = exynos4_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos4412,
+        },
+};
+
+/* Initial IO mappings */
+
+static struct map_desc exynos_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_PMU,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_PMU),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_COMBINER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_UART),
+                .length         = SZ_512K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CMU,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
+                .length         = SZ_128K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_COREPERI_BASE,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_COREPERI),
+                .length         = SZ_8K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_L2CC,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_L2CC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO1,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO1),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO2,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO2),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO3,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO3),
+                .length         = SZ_256,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_DMC0,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_HSPHY),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4_iodesc0[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4_iodesc1[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static void exynos_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+void exynos4_restart(char mode, const char *cmd)
+{
+        __raw_writel(0x1, S5P_SWRESET);
+}
+
+/*
+ * exynos_map_io
+ *
+ * register the standard cpu IO areas
+ */
+
+void __init exynos_init_io(struct map_desc *mach_desc, int size)
+{
+        /* initialize the io descriptors we need for initialization */
+        iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P_VA_CHIPID);
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init exynos4_map_io(void)
+{
+        iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
+
+        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
+                iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
+        else
+                iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
+
+        /* initialize device information early */
+        exynos4_default_sdhci0();
+        exynos4_default_sdhci1();
+        exynos4_default_sdhci2();
+        exynos4_default_sdhci3();
+
+        s3c_adc_setname("samsung-adc-v3");
+
+        s3c_fimc_setname(0, "exynos4-fimc");
+        s3c_fimc_setname(1, "exynos4-fimc");
+        s3c_fimc_setname(2, "exynos4-fimc");
+        s3c_fimc_setname(3, "exynos4-fimc");
+
+        /* The I2C bus controllers are directly compatible with s3c2440 */
+        s3c_i2c0_setname("s3c2440-i2c");
+        s3c_i2c1_setname("s3c2440-i2c");
+        s3c_i2c2_setname("s3c2440-i2c");
+
+        s5p_fb_setname(0, "exynos4-fb");
+        s5p_hdmi_setname("exynos4-hdmi");
+}
+
+void __init exynos4_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+
+        if (soc_is_exynos4210())
+                exynos4210_register_clocks();
+        else if (soc_is_exynos4212() || soc_is_exynos4412())
+                exynos4212_register_clocks();
+
+        exynos4_register_clocks();
+        exynos4_setup_clocks();
+}
+
+#define COMBINER_ENABLE_SET     0x0
+#define COMBINER_ENABLE_CLEAR   0x4
+#define COMBINER_INT_STATUS     0xC
+
+static DEFINE_SPINLOCK(irq_controller_lock);
+
+struct combiner_chip_data {
+        unsigned int irq_offset;
+        unsigned int irq_mask;
+        void __iomem *base;
+};
+
+static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
+
+static inline void __iomem *combiner_base(struct irq_data *data)
+{
+        struct combiner_chip_data *combiner_data =
+                irq_data_get_irq_chip_data(data);
+
+        return combiner_data->base;
+}
+
+static void combiner_mask_irq(struct irq_data *data)
+{
+        u32 mask = 1 << (data->irq % 32);
+
+        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
+}
+
+static void combiner_unmask_irq(struct irq_data *data)
+{
+        u32 mask = 1 << (data->irq % 32);
+
+        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
+}
+
+static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
+{
+        struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
+        unsigned int cascade_irq, combiner_irq;
+        unsigned long status;
+
+        chained_irq_enter(chip, desc);
+
+        spin_lock(&irq_controller_lock);
+        status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
+        spin_unlock(&irq_controller_lock);
+        status &= chip_data->irq_mask;
+
+        if (status == 0)
+                goto out;
+
+        combiner_irq = __ffs(status);
+
+        cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
+        if (unlikely(cascade_irq >= NR_IRQS))
+                do_bad_IRQ(cascade_irq, desc);
+        else
+                generic_handle_irq(cascade_irq);
+
+ out:
+        chained_irq_exit(chip, desc);
+}
+
+static struct irq_chip combiner_chip = {
+        .name           = "COMBINER",
+        .irq_mask       = combiner_mask_irq,
+        .irq_unmask     = combiner_unmask_irq,
+};
+
+static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
+{
+        if (combiner_nr >= MAX_COMBINER_NR)
+                BUG();
+        if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
+                BUG();
+        irq_set_chained_handler(irq, combiner_handle_cascade_irq);
+}
+
+static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
+                          unsigned int irq_start)
+{
+        unsigned int i;
+
+        if (combiner_nr >= MAX_COMBINER_NR)
+                BUG();
+
+        combiner_data[combiner_nr].base = base;
+        combiner_data[combiner_nr].irq_offset = irq_start;
+        combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
+
+        /* Disable all interrupts */
+
+        __raw_writel(combiner_data[combiner_nr].irq_mask,
+                     base + COMBINER_ENABLE_CLEAR);
+
+        /* Setup the Linux IRQ subsystem */
+
+        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
+                                + MAX_IRQ_IN_COMBINER; i++) {
+                irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
+                irq_set_chip_data(i, &combiner_data[combiner_nr]);
+                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+        }
+}
+
+static void exynos4_gic_irq_fix_base(struct irq_data *d)
+{
+        struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
+
+        gic_data->cpu_base = S5P_VA_GIC_CPU +
+                            (gic_bank_offset * smp_processor_id());
+
+        gic_data->dist_base = S5P_VA_GIC_DIST +
+                            (gic_bank_offset * smp_processor_id());
+}
+
+void __init exynos4_init_irq(void)
+{
+        int irq;
+
+        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
+
+        gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+        gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
+        gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
+        gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
+
+        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+
+                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
+                                COMBINER_IRQ(irq, 0));
+                combiner_cascade_irq(irq, IRQ_SPI(irq));
+        }
+
+        /*
+         * The parameters of s5p_init_irq() are for VIC init.
+         * Theses parameters should be NULL and 0 because EXYNOS4
+         * uses GIC instead of VIC.
+         */
+        s5p_init_irq(NULL, 0);
+}
+
+struct bus_type exynos4_subsys = {
+        .name           = "exynos4-core",
+        .dev_name       = "exynos4-core",
+};
+
+static struct device exynos4_dev = {
+        .bus    = &exynos4_subsys,
+};
+
+static int __init exynos4_core_init(void)
+{
+        return subsys_system_register(&exynos4_subsys, NULL);
+}
+core_initcall(exynos4_core_init);
+
+#ifdef CONFIG_CACHE_L2X0
+static int __init exynos4_l2x0_cache_init(void)
+{
+        /* TAG, Data Latency Control: 2cycle */
+        __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
+
+        if (soc_is_exynos4210())
+                __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+        else if (soc_is_exynos4212() || soc_is_exynos4412())
+                __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+
+        /* L2X0 Prefetch Control */
+        __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
+
+        /* L2X0 Power Control */
+        __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
+                     S5P_VA_L2CC + L2X0_POWER_CTRL);
+
+        l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
+
+        return 0;
+}
+
+early_initcall(exynos4_l2x0_cache_init);
+#endif
+
+int __init exynos_init(void)
+{
+        printk(KERN_INFO "EXYNOS: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = exynos_idle;
+
+        return device_register(&exynos4_dev);
+}
+
+static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
+        [0] = {
+                .name           = "uclk1",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+
+void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->has_fracval = 1;
+                        tcfg->clocks = exynos4_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
+                }
+                tcfg->flags |= NO_NEED_CHECK_CLKSRC;
+        }
+
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
+
+static DEFINE_SPINLOCK(eint_lock);
+
+static unsigned int eint0_15_data[16];
+
+static unsigned int exynos4_get_irq_nr(unsigned int number)
+{
+        u32 ret = 0;
+
+        switch (number) {
+        case 0 ... 3:
+                ret = (number + IRQ_EINT0);
+                break;
+        case 4 ... 7:
+                ret = (number + (IRQ_EINT4 - 4));
+                break;
+        case 8 ... 15:
+                ret = (number + (IRQ_EINT8 - 8));
+                break;
+        default:
+                printk(KERN_ERR "number available : %d\n", number);
+        }
+
+        return ret;
+}
+
+static inline void exynos4_irq_eint_mask(struct irq_data *data)
+{
+        u32 mask;
+
+        spin_lock(&eint_lock);
+        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        mask |= eint_irq_to_bit(data->irq);
+        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        spin_unlock(&eint_lock);
+}
+
+static void exynos4_irq_eint_unmask(struct irq_data *data)
+{
+        u32 mask;
+
+        spin_lock(&eint_lock);
+        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        mask &= ~(eint_irq_to_bit(data->irq));
+        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        spin_unlock(&eint_lock);
+}
+
+static inline void exynos4_irq_eint_ack(struct irq_data *data)
+{
+        __raw_writel(eint_irq_to_bit(data->irq),
+                     S5P_EINT_PEND(EINT_REG_NR(data->irq)));
+}
+
+static void exynos4_irq_eint_maskack(struct irq_data *data)
+{
+        exynos4_irq_eint_mask(data);
+        exynos4_irq_eint_ack(data);
+}
+
+static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+        int offs = EINT_OFFSET(data->irq);
+        int shift;
+        u32 ctrl, mask;
+        u32 newvalue = 0;
+
+        switch (type) {
+        case IRQ_TYPE_EDGE_RISING:
+                newvalue = S5P_IRQ_TYPE_EDGE_RISING;
+                break;
+
+        case IRQ_TYPE_EDGE_FALLING:
+                newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
+                break;
+
+        case IRQ_TYPE_EDGE_BOTH:
+                newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
+                break;
+
+        case IRQ_TYPE_LEVEL_LOW:
+                newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
+                break;
+
+        case IRQ_TYPE_LEVEL_HIGH:
+                newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
+                break;
+
+        default:
+                printk(KERN_ERR "No such irq type %d", type);
+                return -EINVAL;
+        }
+
+        shift = (offs & 0x7) * 4;
+        mask = 0x7 << shift;
+
+        spin_lock(&eint_lock);
+        ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
+        ctrl &= ~mask;
+        ctrl |= newvalue << shift;
+        __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
+        spin_unlock(&eint_lock);
+
+        switch (offs) {
+        case 0 ... 7:
+                s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
+                break;
+        case 8 ... 15:
+                s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
+                break;
+        case 16 ... 23:
+                s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
+                break;
+        case 24 ... 31:
+                s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
+                break;
+        default:
+                printk(KERN_ERR "No such irq number %d", offs);
+        }
+
+        return 0;
+}
+
+static struct irq_chip exynos4_irq_eint = {
+        .name           = "exynos4-eint",
+        .irq_mask       = exynos4_irq_eint_mask,
+        .irq_unmask     = exynos4_irq_eint_unmask,
+        .irq_mask_ack   = exynos4_irq_eint_maskack,
+        .irq_ack        = exynos4_irq_eint_ack,
+        .irq_set_type   = exynos4_irq_eint_set_type,
+#ifdef CONFIG_PM
+        .irq_set_wake   = s3c_irqext_wake,
+#endif
+};
+
+/*
+ * exynos4_irq_demux_eint
+ *
+ * This function demuxes the IRQ from from EINTs 16 to 31.
+ * It is designed to be inlined into the specific handler
+ * s5p_irq_demux_eintX_Y.
+ *
+ * Each EINT pend/mask registers handle eight of them.
+ */
+static inline void exynos4_irq_demux_eint(unsigned int start)
+{
+        unsigned int irq;
+
+        u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
+        u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
+
+        status &= ~mask;
+        status &= 0xff;
+
+        while (status) {
+                irq = fls(status) - 1;
+                generic_handle_irq(irq + start);
+                status &= ~(1 << irq);
+        }
+}
+
+static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_get_chip(irq);
+        chained_irq_enter(chip, desc);
+        exynos4_irq_demux_eint(IRQ_EINT(16));
+        exynos4_irq_demux_eint(IRQ_EINT(24));
+        chained_irq_exit(chip, desc);
+}
+
+static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
+{
+        u32 *irq_data = irq_get_handler_data(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
+
+        chained_irq_enter(chip, desc);
+        chip->irq_mask(&desc->irq_data);
+
+        if (chip->irq_ack)
+                chip->irq_ack(&desc->irq_data);
+
+        generic_handle_irq(*irq_data);
+
+        chip->irq_unmask(&desc->irq_data);
+        chained_irq_exit(chip, desc);
+}
+
+int __init exynos4_init_irq_eint(void)
+{
+        int irq;
+
+        for (irq = 0 ; irq <= 31 ; irq++) {
+                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
+                                         handle_level_irq);
+                set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
+        }
+
+        irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
+
+        for (irq = 0 ; irq <= 15 ; irq++) {
+                eint0_15_data[irq] = IRQ_EINT(irq);
+
+                irq_set_handler_data(exynos4_get_irq_nr(irq),
+                                     &eint0_15_data[irq]);
+                irq_set_chained_handler(exynos4_get_irq_nr(irq),
+                                        exynos4_irq_eint0_15);
+        }
+
+        return 0;
+}
+arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
new file mode 100644
index 000000000000..1ac49de0f398
--- /dev/null
+++ b/arch/arm/mach-exynos/common.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for EXYNOS machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
+#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
+
+void exynos_init_io(struct map_desc *mach_desc, int size);
+void exynos4_init_irq(void);
+
+void exynos4_register_clocks(void);
+void exynos4_setup_clocks(void);
+
+void exynos4210_register_clocks(void);
+void exynos4212_register_clocks(void);
+
+void exynos4_restart(char mode, const char *cmd);
+
+extern struct sys_timer exynos4_timer;
+
+#ifdef CONFIG_ARCH_EXYNOS
+extern  int exynos_init(void);
+extern void exynos4_map_io(void);
+extern void exynos4_init_clocks(int xtal);
+extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define exynos4_init_clocks NULL
+#define exynos4_init_uarts NULL
+#define exynos4_map_io NULL
+#define exynos_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
deleted file mode 100644
index 90ec247f3b37..000000000000
--- a/arch/arm/mach-exynos/cpu.c
+++ /dev/null
@@ -1,298 +0,0 @@
-/* linux/arch/arm/mach-exynos/cpu.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/sched.h>
-#include <linux/sysdev.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <asm/proc-fns.h>
-#include <asm/hardware/cache-l2x0.h>
-#include <asm/hardware/gic.h>
-
-#include <plat/cpu.h>
-#include <plat/clock.h>
-#include <plat/devs.h>
-#include <plat/exynos4.h>
-#include <plat/adc-core.h>
-#include <plat/sdhci.h>
-#include <plat/fb-core.h>
-#include <plat/fimc-core.h>
-#include <plat/iic-core.h>
-#include <plat/reset.h>
-#include <plat/tv-core.h>
-
-#include <mach/regs-irq.h>
-#include <mach/regs-pmu.h>
-
-unsigned int gic_bank_offset __read_mostly;
-
-extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
-                         unsigned int irq_start);
-extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
-
-/* Initial IO mappings */
-static struct map_desc exynos_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_SYSTIMER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_PMU,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_PMU),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_COMBINER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_GIC_CPU),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_GIC_DIST),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_CMU,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
-                .length         = SZ_128K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_COREPERI_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_COREPERI),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_L2CC,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_L2CC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO1,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO1),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO2,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO2),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO3,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO3),
-                .length         = SZ_256,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_DMC0,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_SROMC,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_HSPHY),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc0[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSRAM,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc1[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSRAM,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static void exynos_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
-static void exynos4_sw_reset(void)
-{
-        __raw_writel(0x1, S5P_SWRESET);
-}
-
-/*
- * exynos_map_io
- *
- * register the standard cpu IO areas
- */
-void __init exynos4_map_io(void)
-{
-        iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
-        iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
-
-        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
-                iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
-        else
-                iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
-
-        /* initialize device information early */
-        exynos4_default_sdhci0();
-        exynos4_default_sdhci1();
-        exynos4_default_sdhci2();
-        exynos4_default_sdhci3();
-
-        s3c_adc_setname("samsung-adc-v3");
-
-        s3c_fimc_setname(0, "exynos4-fimc");
-        s3c_fimc_setname(1, "exynos4-fimc");
-        s3c_fimc_setname(2, "exynos4-fimc");
-        s3c_fimc_setname(3, "exynos4-fimc");
-
-        /* The I2C bus controllers are directly compatible with s3c2440 */
-        s3c_i2c0_setname("s3c2440-i2c");
-        s3c_i2c1_setname("s3c2440-i2c");
-        s3c_i2c2_setname("s3c2440-i2c");
-
-        s5p_fb_setname(0, "exynos4-fb");
-        s5p_hdmi_setname("exynos4-hdmi");
-}
-
-void __init exynos4_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-
-        if (soc_is_exynos4210())
-                exynos4210_register_clocks();
-        else if (soc_is_exynos4212() || soc_is_exynos4412())
-                exynos4212_register_clocks();
-
-        exynos4_register_clocks();
-        exynos4_setup_clocks();
-}
-
-static void exynos4_gic_irq_fix_base(struct irq_data *d)
-{
-        struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
-
-        gic_data->cpu_base = S5P_VA_GIC_CPU +
-                            (gic_bank_offset * smp_processor_id());
-
-        gic_data->dist_base = S5P_VA_GIC_DIST +
-                            (gic_bank_offset * smp_processor_id());
-}
-
-void __init exynos4_init_irq(void)
-{
-        int irq;
-
-        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
-
-        gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
-        gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
-        gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
-        gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
-
-        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
-
-                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
-                                COMBINER_IRQ(irq, 0));
-                combiner_cascade_irq(irq, IRQ_SPI(irq));
-        }
-
-        /* The parameters of s5p_init_irq() are for VIC init.
-         * Theses parameters should be NULL and 0 because EXYNOS4
-         * uses GIC instead of VIC.
-         */
-        s5p_init_irq(NULL, 0);
-}
-
-struct sysdev_class exynos4_sysclass = {
-        .name   = "exynos4-core",
-};
-
-static struct sys_device exynos4_sysdev = {
-        .cls    = &exynos4_sysclass,
-};
-
-static int __init exynos4_core_init(void)
-{
-        return sysdev_class_register(&exynos4_sysclass);
-}
-core_initcall(exynos4_core_init);
-
-#ifdef CONFIG_CACHE_L2X0
-static int __init exynos4_l2x0_cache_init(void)
-{
-        /* TAG, Data Latency Control: 2cycle */
-        __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
-
-        if (soc_is_exynos4210())
-                __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-        else if (soc_is_exynos4212() || soc_is_exynos4412())
-                __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-
-        /* L2X0 Prefetch Control */
-        __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
-
-        /* L2X0 Power Control */
-        __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
-                     S5P_VA_L2CC + L2X0_POWER_CTRL);
-
-        l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
-
-        return 0;
-}
-
-early_initcall(exynos4_l2x0_cache_init);
-#endif
-
-int __init exynos_init(void)
-{
-        printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = exynos_idle;
-
-        /* set sw_reset function */
-        if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
-                s5p_reset_hook = exynos4_sw_reset;
-
-        return sysdev_register(&exynos4_sysdev);
-}
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 35f6502144ae..4ebb382c5979 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/cpuidle.h>
 #include <linux/io.h>
+#include <linux/export.h>
+#include <linux/time.h>
 
 #include <asm/proc-fns.h>
 
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S
index f5e9fd8e37b4..3ba4f547534b 100644
--- a/arch/arm/mach-exynos/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos/include/mach/entry-macro.S
@@ -9,83 +9,8 @@
  * warranty of any kind, whether express or implied.
 */
 
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/hardware/gic.h>
-
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                mov     \tmp, #0
-
-                mrc     p15, 0, \base, c0, c0, 5
-                and     \base, \base, #3
-                cmp     \base, #0
-                beq     1f
-
-                ldr     \tmp, =gic_bank_offset
-                ldr     \tmp, [\tmp]
-                cmp     \base, #1
-                beq     1f
-
-                cmp     \base, #2
-                addeq   \tmp, \tmp, \tmp
-                addne   \tmp, \tmp, \tmp, LSL #1
-
-1:              ldr     \base, =gic_cpu_base_addr
-                ldr     \base, [\base]
-                add     \base, \base, \tmp
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                /*
-                 * The interrupt numbering scheme is defined in the
-                 * interrupt controller spec.  To wit:
-                 *
-                 * Interrupts 0-15 are IPI
-                 * 16-28 are reserved
-                 * 29-31 are local.  We allow 30 to be used for the watchdog.
-                 * 32-1020 are global
-                 * 1021-1022 are reserved
-                 * 1023 is "spurious" (no interrupt)
-                 *
-                 * For now, we ignore all local interrupts so only return an interrupt if it's
-                 * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
-                 *
-                 * A simple read from the controller will tell us the number of the highest
-                 * priority enabled interrupt.  We then just need to check whether it is in the
-                 * valid range for an IRQ (30-1020 inclusive).
-                 */
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-                ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
-
-                ldr     \tmp, =1021
-
-                bic     \irqnr, \irqstat, #0x1c00
-
-                cmp     \irqnr, #15
-                cmpcc   \irqnr, \irqnr
-                cmpne   \irqnr, \tmp
-                cmpcs   \irqnr, \irqnr
-                addne   \irqnr, \irqnr, #32
-
-                .endm
-
-                /* We assume that irqstat (the raw value of the IRQ acknowledge
-                 * register) is preserved from the macro above.
-                 * If there is an IPI, we immediately signal end of interrupt on the
-                 * controller, since this requires the original irqstat value which
-                 * we won't easily be able to recreate later.
-                 */
-
-                .macro test_for_ipi, irqnr, irqstat, base, tmp
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #16
-                strcc   \irqstat, [\base, #GIC_CPU_EOI]
-                cmpcs   \irqnr, \irqnr
-                .endm
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 058541d45af0..d1829860a0ec 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -149,7 +149,6 @@
 #define S3C_PA_WDT                      EXYNOS4_PA_WATCHDOG
 #define S3C_PA_UART                     EXYNOS4_PA_UART
 
-#define S5P_PA_CHIPID                   EXYNOS4_PA_CHIPID
 #define S5P_PA_EHCI                     EXYNOS4_PA_EHCI
 #define S5P_PA_FIMC0                    EXYNOS4_PA_FIMC0
 #define S5P_PA_FIMC1                    EXYNOS4_PA_FIMC1
@@ -166,26 +165,17 @@
 #define S5P_PA_ONENAND_DMA              EXYNOS4_PA_ONENAND_DMA
 #define S5P_PA_SDO                      EXYNOS4_PA_SDO
 #define S5P_PA_SDRAM                    EXYNOS4_PA_SDRAM
-#define S5P_PA_SROMC                    EXYNOS4_PA_SROMC
-#define S5P_PA_SYSCON                   EXYNOS4_PA_SYSCON
-#define S5P_PA_TIMER                    EXYNOS4_PA_TIMER
 #define S5P_PA_VP                       EXYNOS4_PA_VP
 
 #define SAMSUNG_PA_ADC                  EXYNOS4_PA_ADC
 #define SAMSUNG_PA_ADC1                 EXYNOS4_PA_ADC1
 #define SAMSUNG_PA_KEYPAD               EXYNOS4_PA_KEYPAD
 
-#define EXYNOS_PA_COMBINER              EXYNOS4_PA_COMBINER
-#define EXYNOS_PA_GIC_CPU               EXYNOS4_PA_GIC_CPU
-#define EXYNOS_PA_GIC_DIST              EXYNOS4_PA_GIC_DIST
-#define EXYNOS_PA_PMU                   EXYNOS4_PA_PMU
-#define EXYNOS_PA_SYSTIMER              EXYNOS4_PA_SYSTIMER
-
 /* Compatibility UART */
 
 #define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
-#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART(x)                  (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
 #define S5P_PA_UART0                    S5P_PA_UART(0)
 #define S5P_PA_UART1                    S5P_PA_UART(1)
 #define S5P_PA_UART2                    S5P_PA_UART(2)
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
index 5e3220c18fc7..0063a6de3dc8 100644
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ b/arch/arm/mach-exynos/include/mach/system.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-exynos/include/mach/vmalloc.h b/arch/arm/mach-exynos/include/mach/vmalloc.h
deleted file mode 100644
index 284330e571d2..000000000000
--- a/arch/arm/mach-exynos/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/vmalloc.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Based on arch/arm/mach-s5p6440/include/mach/vmalloc.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * EXYNOS4 vmalloc definition
-*/
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H __FILE__
-
-#define VMALLOC_END     0xF6000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
deleted file mode 100644
index a8a83e3881a4..000000000000
--- a/arch/arm/mach-exynos/init.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/* linux/arch/arm/mach-exynos4/init.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/serial_core.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk1",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-
-/* uart registration process */
-void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->has_fracval = 1;
-                        tcfg->clocks = exynos4_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
-                }
-                tcfg->flags |= NO_NEED_CHECK_CLKSRC;
-        }
-
-        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-exynos/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c
deleted file mode 100644
index 5a2758ab055e..000000000000
--- a/arch/arm/mach-exynos/irq-combiner.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/* linux/arch/arm/mach-exynos4/irq-combiner.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Based on arch/arm/common/gic.c
- *
- * IRQ COMBINER support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/io.h>
-
-#include <asm/mach/irq.h>
-
-#define COMBINER_ENABLE_SET     0x0
-#define COMBINER_ENABLE_CLEAR   0x4
-#define COMBINER_INT_STATUS     0xC
-
-static DEFINE_SPINLOCK(irq_controller_lock);
-
-struct combiner_chip_data {
-        unsigned int irq_offset;
-        unsigned int irq_mask;
-        void __iomem *base;
-};
-
-static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
-
-static inline void __iomem *combiner_base(struct irq_data *data)
-{
-        struct combiner_chip_data *combiner_data =
-                irq_data_get_irq_chip_data(data);
-
-        return combiner_data->base;
-}
-
-static void combiner_mask_irq(struct irq_data *data)
-{
-        u32 mask = 1 << (data->irq % 32);
-
-        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
-}
-
-static void combiner_unmask_irq(struct irq_data *data)
-{
-        u32 mask = 1 << (data->irq % 32);
-
-        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
-}
-
-static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
-{
-        struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = irq_get_chip(irq);
-        unsigned int cascade_irq, combiner_irq;
-        unsigned long status;
-
-        chained_irq_enter(chip, desc);
-
-        spin_lock(&irq_controller_lock);
-        status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
-        spin_unlock(&irq_controller_lock);
-        status &= chip_data->irq_mask;
-
-        if (status == 0)
-                goto out;
-
-        combiner_irq = __ffs(status);
-
-        cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
-        if (unlikely(cascade_irq >= NR_IRQS))
-                do_bad_IRQ(cascade_irq, desc);
-        else
-                generic_handle_irq(cascade_irq);
-
- out:
-        chained_irq_exit(chip, desc);
-}
-
-static struct irq_chip combiner_chip = {
-        .name           = "COMBINER",
-        .irq_mask       = combiner_mask_irq,
-        .irq_unmask     = combiner_unmask_irq,
-};
-
-void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
-{
-        if (combiner_nr >= MAX_COMBINER_NR)
-                BUG();
-        if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
-                BUG();
-        irq_set_chained_handler(irq, combiner_handle_cascade_irq);
-}
-
-void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
-                          unsigned int irq_start)
-{
-        unsigned int i;
-
-        if (combiner_nr >= MAX_COMBINER_NR)
-                BUG();
-
-        combiner_data[combiner_nr].base = base;
-        combiner_data[combiner_nr].irq_offset = irq_start;
-        combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
-
-        /* Disable all interrupts */
-
-        __raw_writel(combiner_data[combiner_nr].irq_mask,
-                     base + COMBINER_ENABLE_CLEAR);
-
-        /* Setup the Linux IRQ subsystem */
-
-        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
-                                + MAX_IRQ_IN_COMBINER; i++) {
-                irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
-                irq_set_chip_data(i, &combiner_data[combiner_nr]);
-                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-        }
-}
diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c
deleted file mode 100644
index badb8c66fc9b..000000000000
--- a/arch/arm/mach-exynos/irq-eint.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/* linux/arch/arm/mach-exynos4/irq-eint.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS4 - IRQ EINT support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/gpio.h>
-
-#include <plat/pm.h>
-#include <plat/cpu.h>
-#include <plat/gpio-cfg.h>
-
-#include <mach/regs-gpio.h>
-
-#include <asm/mach/irq.h>
-
-static DEFINE_SPINLOCK(eint_lock);
-
-static unsigned int eint0_15_data[16];
-
-static unsigned int exynos4_get_irq_nr(unsigned int number)
-{
-        u32 ret = 0;
-
-        switch (number) {
-        case 0 ... 3:
-                ret = (number + IRQ_EINT0);
-                break;
-        case 4 ... 7:
-                ret = (number + (IRQ_EINT4 - 4));
-                break;
-        case 8 ... 15:
-                ret = (number + (IRQ_EINT8 - 8));
-                break;
-        default:
-                printk(KERN_ERR "number available : %d\n", number);
-        }
-
-        return ret;
-}
-
-static inline void exynos4_irq_eint_mask(struct irq_data *data)
-{
-        u32 mask;
-
-        spin_lock(&eint_lock);
-        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        mask |= eint_irq_to_bit(data->irq);
-        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        spin_unlock(&eint_lock);
-}
-
-static void exynos4_irq_eint_unmask(struct irq_data *data)
-{
-        u32 mask;
-
-        spin_lock(&eint_lock);
-        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        mask &= ~(eint_irq_to_bit(data->irq));
-        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        spin_unlock(&eint_lock);
-}
-
-static inline void exynos4_irq_eint_ack(struct irq_data *data)
-{
-        __raw_writel(eint_irq_to_bit(data->irq),
-                     S5P_EINT_PEND(EINT_REG_NR(data->irq)));
-}
-
-static void exynos4_irq_eint_maskack(struct irq_data *data)
-{
-        exynos4_irq_eint_mask(data);
-        exynos4_irq_eint_ack(data);
-}
-
-static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-        int offs = EINT_OFFSET(data->irq);
-        int shift;
-        u32 ctrl, mask;
-        u32 newvalue = 0;
-
-        switch (type) {
-        case IRQ_TYPE_EDGE_RISING:
-                newvalue = S5P_IRQ_TYPE_EDGE_RISING;
-                break;
-
-        case IRQ_TYPE_EDGE_FALLING:
-                newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
-                break;
-
-        case IRQ_TYPE_EDGE_BOTH:
-                newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
-                break;
-
-        case IRQ_TYPE_LEVEL_LOW:
-                newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
-                break;
-
-        case IRQ_TYPE_LEVEL_HIGH:
-                newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
-                break;
-
-        default:
-                printk(KERN_ERR "No such irq type %d", type);
-                return -EINVAL;
-        }
-
-        shift = (offs & 0x7) * 4;
-        mask = 0x7 << shift;
-
-        spin_lock(&eint_lock);
-        ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
-        ctrl &= ~mask;
-        ctrl |= newvalue << shift;
-        __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
-        spin_unlock(&eint_lock);
-
-        switch (offs) {
-        case 0 ... 7:
-                s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
-                break;
-        case 8 ... 15:
-                s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
-                break;
-        case 16 ... 23:
-                s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
-                break;
-        case 24 ... 31:
-                s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
-                break;
-        default:
-                printk(KERN_ERR "No such irq number %d", offs);
-        }
-
-        return 0;
-}
-
-static struct irq_chip exynos4_irq_eint = {
-        .name           = "exynos4-eint",
-        .irq_mask       = exynos4_irq_eint_mask,
-        .irq_unmask     = exynos4_irq_eint_unmask,
-        .irq_mask_ack   = exynos4_irq_eint_maskack,
-        .irq_ack        = exynos4_irq_eint_ack,
-        .irq_set_type   = exynos4_irq_eint_set_type,
-#ifdef CONFIG_PM
-        .irq_set_wake   = s3c_irqext_wake,
-#endif
-};
-
-/* exynos4_irq_demux_eint
- *
- * This function demuxes the IRQ from from EINTs 16 to 31.
- * It is designed to be inlined into the specific handler
- * s5p_irq_demux_eintX_Y.
- *
- * Each EINT pend/mask registers handle eight of them.
- */
-static inline void exynos4_irq_demux_eint(unsigned int start)
-{
-        unsigned int irq;
-
-        u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
-        u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
-
-        status &= ~mask;
-        status &= 0xff;
-
-        while (status) {
-                irq = fls(status) - 1;
-                generic_handle_irq(irq + start);
-                status &= ~(1 << irq);
-        }
-}
-
-static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_get_chip(irq);
-        chained_irq_enter(chip, desc);
-        exynos4_irq_demux_eint(IRQ_EINT(16));
-        exynos4_irq_demux_eint(IRQ_EINT(24));
-        chained_irq_exit(chip, desc);
-}
-
-static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
-{
-        u32 *irq_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = irq_get_chip(irq);
-
-        chained_irq_enter(chip, desc);
-        chip->irq_mask(&desc->irq_data);
-
-        if (chip->irq_ack)
-                chip->irq_ack(&desc->irq_data);
-
-        generic_handle_irq(*irq_data);
-
-        chip->irq_unmask(&desc->irq_data);
-        chained_irq_exit(chip, desc);
-}
-
-int __init exynos4_init_irq_eint(void)
-{
-        int irq;
-
-        for (irq = 0 ; irq <= 31 ; irq++) {
-                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
-                                         handle_level_irq);
-                set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
-        }
-
-        irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
-
-        for (irq = 0 ; irq <= 15 ; irq++) {
-                eint0_15_data[irq] = IRQ_EINT(irq);
-
-                irq_set_handler_data(exynos4_get_irq_nr(irq),
-                                     &eint0_15_data[irq]);
-                irq_set_chained_handler(exynos4_get_irq_nr(irq),
-                                        exynos4_irq_eint0_15);
-        }
-
-        return 0;
-}
-
-arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index f0ca6c157d29..d726fcd3acf9 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -16,11 +16,11 @@
 #include <linux/smsc911x.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <plat/exynos4.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
@@ -28,6 +28,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -187,7 +189,7 @@ static void __init armlex4210_smsc911x_init(void)
 
 static void __init armlex4210_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(armlex4210_uartcfgs,
                            ARRAY_SIZE(armlex4210_uartcfgs));
@@ -210,6 +212,8 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = armlex4210_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = armlex4210_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 236bbe187163..635fb97e31ab 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -32,12 +32,12 @@
 #include <media/v4l2-mediabus.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/adc.h>
 #include <plat/regs-fb-v4.h>
 #include <plat/regs-serial.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
@@ -54,6 +54,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define NURI_UCON_DEFAULT       (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -1283,7 +1285,7 @@ static struct platform_device *nuri_devices[] __initdata = {
 
 static void __init nuri_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
 }
@@ -1333,7 +1335,9 @@ MACHINE_START(NURI, "NURI")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = nuri_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = nuri_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &nuri_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index f80b563f2be7..586eb995aa96 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -22,13 +22,13 @@
 #include <linux/lcd.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
 
 #include <plat/regs-serial.h>
 #include <plat/regs-fb-v4.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
@@ -43,6 +43,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define ORIGEN_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -638,7 +640,7 @@ static void s5p_tv_setup(void)
 
 static void __init origen_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
 }
@@ -694,7 +696,9 @@ MACHINE_START(ORIGEN, "ORIGEN")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = origen_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = origen_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &origen_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index fcf2e0e23d53..d00e4f016a68 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,13 +21,13 @@
 #include <linux/serial_core.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/backlight.h>
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <plat/exynos4.h>
 #include <plat/gpio-cfg.h>
 #include <plat/iic.h>
 #include <plat/keypad.h>
@@ -36,6 +36,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDK4X12_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -249,7 +251,7 @@ static void __init smdk4x12_map_io(void)
 {
         clk_xusbxti.rate = 24000000;
 
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(clk_xusbxti.rate);
         s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
 }
@@ -287,8 +289,10 @@ MACHINE_START(SMDK4212, "SMDK4212")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = smdk4x12_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = smdk4x12_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
 
 MACHINE_START(SMDK4412, "SMDK4412")
@@ -297,6 +301,8 @@ MACHINE_START(SMDK4412, "SMDK4412")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = smdk4x12_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = smdk4x12_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index cec2afabe7b4..5b365613b470 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -21,13 +21,13 @@
 #include <linux/pwm_backlight.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
 #include <plat/regs-fb-v4.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
@@ -43,6 +43,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -332,7 +334,7 @@ static void s5p_tv_setup(void)
 
 static void __init smdkv310_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 }
@@ -375,9 +377,11 @@ MACHINE_START(SMDKV310, "SMDKV310")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = smdkv310_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = smdkv310_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &smdkv310_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
 
 MACHINE_START(SMDKC210, "SMDKC210")
@@ -385,6 +389,8 @@ MACHINE_START(SMDKC210, "SMDKC210")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = smdkv310_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = smdkv310_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index a2a177ff4b44..52aea972746a 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -24,10 +24,10 @@
 #include <linux/i2c/atmel_mxt_ts.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/iic.h>
@@ -47,6 +47,8 @@
 #include <media/s5p_fimc.h>
 #include <media/m5mols.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define UNIVERSAL_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -992,7 +994,7 @@ static struct platform_device *universal_devices[] __initdata = {
 
 static void __init universal_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
 }
@@ -1058,7 +1060,9 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
         .atag_offset    = 0x100,
         .init_irq       = exynos4_init_irq,
         .map_io         = universal_map_io,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = universal_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &universal_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 97343df8f132..85b5527d0918 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -44,8 +44,6 @@ struct mct_clock_event_device {
         char name[10];
 };
 
-static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
-
 static void exynos4_mct_write(unsigned int value, void *addr)
 {
         void __iomem *stat_addr;
@@ -264,6 +262,9 @@ static void exynos4_clockevent_init(void)
 }
 
 #ifdef CONFIG_LOCAL_TIMERS
+
+static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
+
 /* Clock event handling */
 static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt)
 {
@@ -428,9 +429,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
 
 void local_timer_stop(struct clock_event_device *evt)
 {
+        unsigned int cpu = smp_processor_id();
         evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
         if (mct_int_type == MCT_INT_SPI)
-                disable_irq(evt->irq);
+                if (cpu == 0)
+                        remove_irq(evt->irq, &mct_tick0_event_irq);
+                else
+                        remove_irq(evt->irq, &mct_tick1_event_irq);
         else
                 disable_percpu_irq(IRQ_MCT_LOCALTIMER);
 }
@@ -443,6 +448,7 @@ static void __init exynos4_timer_resources(void)
 
         clk_rate = clk_get_rate(mct_clk);
 
+#ifdef CONFIG_LOCAL_TIMERS
         if (mct_int_type == MCT_INT_PPI) {
                 int err;
 
@@ -452,6 +458,7 @@ static void __init exynos4_timer_resources(void)
                 WARN(err, "MCT: can't request IRQ %d (%d)\n",
                      IRQ_MCT_LOCALTIMER, err);
         }
+#endif /* CONFIG_LOCAL_TIMERS */
 }
 
 static void __init exynos4_timer_init(void)
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 69ffb2fb3875..60bc45e3e709 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -32,7 +32,6 @@
 
 #include <plat/cpu.h>
 
-extern unsigned int gic_bank_offset;
 extern void exynos4_secondary_startup(void);
 
 #define CPU1_BOOT_REG           (samsung_rev() == EXYNOS4210_REV_1_1 ? \
@@ -65,31 +64,6 @@ static void __iomem *scu_base_addr(void)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static void __cpuinit exynos4_gic_secondary_init(void)
-{
-        void __iomem *dist_base = S5P_VA_GIC_DIST +
-                                (gic_bank_offset * smp_processor_id());
-        void __iomem *cpu_base = S5P_VA_GIC_CPU +
-                                (gic_bank_offset * smp_processor_id());
-        int i;
-
-        /*
-         * Deal with the banked PPI and SGI interrupts - disable all
-         * PPI interrupts, ensure all SGI interrupts are enabled.
-         */
-        __raw_writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
-        __raw_writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
-
-        /*
-         * Set priority on PPI and SGI interrupts
-         */
-        for (i = 0; i < 32; i += 4)
-                __raw_writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
-
-        __raw_writel(0xf0, cpu_base + GIC_CPU_PRIMASK);
-        __raw_writel(1, cpu_base + GIC_CPU_CTRL);
-}
-
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
         /*
@@ -97,7 +71,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          * core (e.g. timer irq), then they will not have been enabled
          * for us: do so
          */
-        exynos4_gic_secondary_init();
+        gic_secondary_init(0);
 
         /*
          * let the primary processor know we're out of the
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 509a435afd4b..c4f792dcad19 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -205,7 +205,7 @@ static void exynos4_pm_prepare(void)
 
 }
 
-static int exynos4_pm_add(struct sys_device *sysdev)
+static int exynos4_pm_add(struct device *dev)
 {
         pm_cpu_prep = exynos4_pm_prepare;
         pm_cpu_sleep = exynos4_cpu_suspend;
@@ -301,8 +301,10 @@ static void exynos4_restore_pll(void)
         } while (epll_wait || vpll_wait);
 }
 
-static struct sysdev_driver exynos4_pm_driver = {
-        .add            = exynos4_pm_add,
+static struct subsys_interface exynos4_pm_interface = {
+        .name           = "exynos4_pm",
+        .subsys         = &exynos4_subsys,
+        .add_dev        = exynos4_pm_add,
 };
 
 static __init int exynos4_pm_drvinit(void)
@@ -325,7 +327,7 @@ static __init int exynos4_pm_drvinit(void)
                 clk_put(pll_base);
         }
 
-        return sysdev_driver_register(&exynos4_sysclass, &exynos4_pm_driver);
+        return subsys_interface_register(&exynos4_pm_interface);
 }
 arch_initcall(exynos4_pm_drvinit);
 
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index d5f178540928..25b453601acc 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -86,9 +86,10 @@ fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
 MACHINE_START(CATS, "Chalice-CATS")
         /* Maintainer: Philip Blundell */
         .atag_offset    = 0x100,
-        .soft_reboot    = 1,
+        .restart_mode   = 's',
         .fixup          = fixup_cats,
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &isa_timer,
+        .restart        = footbridge_restart,
 MACHINE_END
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 38a44f9b9da2..41978ee4f9d0 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -199,6 +199,33 @@ void __init footbridge_map_io(void)
                 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
 }
 
+void footbridge_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into the ROM */
+                soft_restart(0x41000000);
+        } else {
+                /*
+                 * Force the watchdog to do a CPU reset.
+                 *
+                 * After making sure that the watchdog is disabled
+                 * (so we can change the timer registers) we first
+                 * enable the timer to autoreload itself.  Next, the
+                 * timer interval is set really short and any
+                 * current interrupt request is cleared (so we can
+                 * see an edge transition).  Finally, TIMER4 is
+                 * enabled as the watchdog.
+                 */
+                *CSR_SA110_CNTL &= ~(1 << 13);
+                *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
+                                   TIMER_CNTL_AUTORELOAD |
+                                   TIMER_CNTL_DIV16;
+                *CSR_TIMER4_LOAD = 0x2;
+                *CSR_TIMER4_CLR  = 0;
+                *CSR_SA110_CNTL |= (1 << 13);
+        }
+}
+
 #ifdef CONFIG_FOOTBRIDGE_ADDIN
 
 static inline unsigned long fb_bus_sdram_offset(void)
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index b05e662d21ad..c9767b892cb2 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -8,3 +8,4 @@ extern void footbridge_map_io(void);
 extern void footbridge_init_irq(void);
 
 extern void isa_init_irq(unsigned int irq);
+extern void footbridge_restart(char, const char *);
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index 012210cf7d16..27716a7e5fc1 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &footbridge_timer,
+        .restart        = footbridge_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
index 0b2931566209..a174a5841bc2 100644
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -7,63 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/io.h>
-#include <asm/hardware/dec21285.h>
-#include <mach/hardware.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /*
-                 * Jump into the ROM
-                 */
-                cpu_reset(0x41000000);
-        } else {
-                if (machine_is_netwinder()) {
-                        /* open up the SuperIO chip
-                         */
-                        outb(0x87, 0x370);
-                        outb(0x87, 0x370);
-
-                        /* aux function group 1 (logical device 7)
-                         */
-                        outb(0x07, 0x370);
-                        outb(0x07, 0x371);
-
-                        /* set GP16 for WD-TIMER output
-                         */
-                        outb(0xe6, 0x370);
-                        outb(0x00, 0x371);
-
-                        /* set a RED LED and toggle WD_TIMER for rebooting
-                         */
-                        outb(0xc4, 0x338);
-                } else {
-                        /* 
-                         * Force the watchdog to do a CPU reset.
-                         *
-                         * After making sure that the watchdog is disabled
-                         * (so we can change the timer registers) we first
-                         * enable the timer to autoreload itself.  Next, the
-                         * timer interval is set really short and any
-                         * current interrupt request is cleared (so we can
-                         * see an edge transition).  Finally, TIMER4 is
-                         * enabled as the watchdog.
-                         */
-                        *CSR_SA110_CNTL &= ~(1 << 13);
-                        *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
-                                           TIMER_CNTL_AUTORELOAD |
-                                           TIMER_CNTL_DIV16;
-                        *CSR_TIMER4_LOAD = 0x2;
-                        *CSR_TIMER4_CLR  = 0;
-                        *CSR_SA110_CNTL |= (1 << 13);
-                }
-        }
-}
diff --git a/arch/arm/mach-footbridge/include/mach/vmalloc.h b/arch/arm/mach-footbridge/include/mach/vmalloc.h
deleted file mode 100644
index 40ba78e5782b..000000000000
--- a/arch/arm/mach-footbridge/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  arch/arm/mach-footbridge/include/mach/vmalloc.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-#define VMALLOC_END       0xf0000000UL
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 0d3846f3b60d..80a1c5cc9071 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -645,6 +645,32 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
 #endif
 }
 
+static void netwinder_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into the ROM */
+                soft_restart(0x41000000);
+        } else {
+                local_irq_disable();
+                local_fiq_disable();
+
+                /* open up the SuperIO chip */
+                outb(0x87, 0x370);
+                outb(0x87, 0x370);
+
+                /* aux function group 1 (logical device 7) */
+                outb(0x07, 0x370);
+                outb(0x07, 0x371);
+
+                /* set GP16 for WD-TIMER output */
+                outb(0xe6, 0x370);
+                outb(0x00, 0x371);
+
+                /* set a RED LED and toggle WD_TIMER for rebooting */
+                outb(0xc4, 0x338);
+        }
+}
+
 MACHINE_START(NETWINDER, "Rebel-NetWinder")
         /* Maintainer: Russell King/Rebel.com */
         .atag_offset    = 0x100,
@@ -656,4 +682,5 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &isa_timer,
+        .restart        = netwinder_restart,
 MACHINE_END
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index f41dba39b327..e1e9990fa957 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -19,5 +19,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &footbridge_timer,
+        .restart        = footbridge_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-gemini/include/mach/vmalloc.h b/arch/arm/mach-gemini/include/mach/vmalloc.h
deleted file mode 100644
index 45371eb86fcb..000000000000
--- a/arch/arm/mach-gemini/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#define VMALLOC_END     0xf0000000UL
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 51d4e44ab973..f8a2f6bb5483 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -242,3 +242,8 @@ void __init h720x_map_io(void)
 {
         iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc));
 }
+
+void h720x_restart(char mode, const char *cmd)
+{
+        CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
+}
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h
index 7dd5fa604efc..2489537d33dd 100644
--- a/arch/arm/mach-h720x/common.h
+++ b/arch/arm/mach-h720x/common.h
@@ -16,6 +16,7 @@
 extern unsigned long h720x_gettimeoffset(void);
 extern void __init h720x_init_irq(void);
 extern void __init h720x_map_io(void);
+extern void h720x_restart(char, const char *);
 
 #ifdef CONFIG_ARCH_H7202
 extern struct sys_timer h7202_timer;
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c
index 9886f19805f4..5fdb20c855e2 100644
--- a/arch/arm/mach-h720x/h7201-eval.c
+++ b/arch/arm/mach-h720x/h7201-eval.c
@@ -34,4 +34,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201")
         .init_irq       = h720x_init_irq,
         .timer          = &h7201_timer,
         .dma_zone_size  = SZ_256M,
+        .restart        = h720x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c
index 284a134819e1..169673036c59 100644
--- a/arch/arm/mach-h720x/h7202-eval.c
+++ b/arch/arm/mach-h720x/h7202-eval.c
@@ -77,4 +77,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202")
         .timer          = &h7202_timer,
         .init_machine   = init_eval_h7202,
         .dma_zone_size  = SZ_256M,
+        .restart        = h720x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
index a708d24ee46d..16ac46e239aa 100644
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ b/arch/arm/mach-h720x/include/mach/system.h
@@ -24,10 +24,4 @@ static void arch_idle(void)
         nop();
 }
 
-
-static __inline__ void arch_reset(char mode, const char *cmd)
-{
-        CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
-}
-
 #endif
diff --git a/arch/arm/mach-h720x/include/mach/vmalloc.h b/arch/arm/mach-h720x/include/mach/vmalloc.h
deleted file mode 100644
index 8520b4a4d4e6..000000000000
--- a/arch/arm/mach-h720x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/vmalloc.h
- */
-
-#ifndef __ARCH_ARM_VMALLOC_H
-#define __ARCH_ARM_VMALLOC_H
-
-#define VMALLOC_END       0xd0000000UL
-
-#endif
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 7e33fc94cd1e..d8e2d0be64ac 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,5 +1,6 @@
 extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
 extern void highbank_clocks_init(void);
+extern void highbank_restart(char, const char *);
 extern void __iomem *scu_base_addr;
 #ifdef CONFIG_DEBUG_HIGHBANK_UART
 extern void highbank_lluart_map_io(void);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b82dcf08e747..804c4a55f803 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -22,6 +22,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 
 #include <asm/cacheflush.h>
 #include <asm/unified.h>
@@ -72,6 +73,9 @@ static void __init highbank_map_io(void)
 
 void highbank_set_cpu_jump(int cpu, void *jump_addr)
 {
+#ifdef CONFIG_SMP
+        cpu = cpu_logical_map(cpu);
+#endif
         writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
         __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
         outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
@@ -140,6 +144,8 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
         .map_io         = highbank_map_io,
         .init_irq       = highbank_init_irq,
         .timer          = &highbank_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = highbank_init,
         .dt_compat      = highbank_match,
+        .restart        = highbank_restart,
 MACHINE_END
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-highbank/include/mach/entry-macro.S
+++ b/arch/arm/mach-highbank/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
-#include <asm/hardware/entry-macro-gic.S>
-
         .macro  disable_fiq
         .endm
 
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
index 7e8192296cae..b1d8b5fbe373 100644
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ b/arch/arm/mach-highbank/include/mach/system.h
@@ -21,6 +21,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-extern void arch_reset(char mode, const char *cmd);
-
 #endif
diff --git a/arch/arm/mach-highbank/include/mach/vmalloc.h b/arch/arm/mach-highbank/include/mach/vmalloc.h
deleted file mode 100644
index 1969e954277a..000000000000
--- a/arch/arm/mach-highbank/include/mach/vmalloc.h
+++ /dev/null
@@ -1 +0,0 @@
-#define VMALLOC_END             0xFEE00000UL
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 53f0c4c5ef1c..82c27230d4a9 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -20,7 +20,7 @@
 #include "core.h"
 #include "sysregs.h"
 
-void arch_reset(char mode, const char *cmd)
+void highbank_restart(char mode, const char *cmd)
 {
         if (mode == 'h')
                 hignbank_set_pwr_hard_reset();
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2a34ae..35a218cb5c7e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
 config HAVE_IMX_SRC
         bool
 
-#
-# ARCH_MX31 and ARCH_MX35 are left for compatibility
-# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
-# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
-# more sensible) names are used: SOC_IMX31 and SOC_IMX35
 config ARCH_MX1
         bool
 
@@ -27,12 +22,6 @@ config ARCH_MX25
 config MACH_MX27
         bool
 
-config ARCH_MX31
-        bool
-
-config ARCH_MX35
-        bool
-
 config SOC_IMX1
         bool
         select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31
         select CPU_V6
         select IMX_HAVE_PLATFORM_MXC_RNGA
         select ARCH_MXC_AUDMUX_V2
-        select ARCH_MX31
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
@@ -82,7 +70,6 @@ config SOC_IMX35
         select ARCH_MXC_IOMUX_V3
         select ARCH_MXC_AUDMUX_V2
         select HAVE_EPIT
-        select ARCH_MX35
         select MXC_AVIC
         select SMP_ON_UP if SMP
 
@@ -145,7 +132,7 @@ config MACH_MX25_3DS
         select IMX_HAVE_PLATFORM_MXC_NAND
         select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 
-config MACH_EUKREA_CPUIMX25
+config MACH_EUKREA_CPUIMX25SD
         bool "Support Eukrea CPUIMX25 Platform"
         select SOC_IMX25
         select IMX_HAVE_PLATFORM_FLEXCAN
@@ -161,7 +148,7 @@ config MACH_EUKREA_CPUIMX25
 
 choice
         prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX25
+        depends on MACH_EUKREA_CPUIMX25SD
         default MACH_EUKREA_MBIMXSD25_BASEBOARD
 
 config MACH_EUKREA_MBIMXSD25_BASEBOARD
@@ -555,7 +542,7 @@ config MACH_MX35_3DS
           Include support for MX35PDK platform. This includes specific
           configurations for the board and its peripherals.
 
-config MACH_EUKREA_CPUIMX35
+config MACH_EUKREA_CPUIMX35SD
         bool "Support Eukrea CPUIMX35 Platform"
         select SOC_IMX35
         select IMX_HAVE_PLATFORM_FLEXCAN
@@ -573,7 +560,7 @@ config MACH_EUKREA_CPUIMX35
 
 choice
         prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX35
+        depends on MACH_EUKREA_CPUIMX35SD
         default MACH_EUKREA_MBIMXSD35_BASEBOARD
 
 config MACH_EUKREA_MBIMXSD35_BASEBOARD
@@ -609,12 +596,12 @@ comment "i.MX6 family:"
 config SOC_IMX6Q
         bool "i.MX6 Quad support"
         select ARM_GIC
-        select CACHE_L2X0
         select CPU_V7
         select HAVE_ARM_SCU
         select HAVE_IMX_GPC
         select HAVE_IMX_MMDC
         select HAVE_IMX_SRC
+        select HAVE_SMP
         select USE_OF
 
         help
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aba73214c2a8..d97f409ce98b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
 
 # i.MX25 based machines
 obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
 
 # i.MX27 based machines
@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
 # i.MX35 based machines
 obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
 obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
 obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
 
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 8116f119517d..ac8238caecb9 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
 
 int __init mx35_clocks_init()
 {
-        unsigned int cgr2 = 3 << 26, cgr3 = 0;
+        unsigned int cgr2 = 3 << 26;
 
 #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
         cgr2 |= 3 << 16;
@@ -521,6 +521,12 @@ int __init mx35_clocks_init()
         __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
         __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
                         CCM_BASE + CCM_CGR1);
+        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
+        __raw_writel(0, CCM_BASE + CCM_CGR3);
+
+        clk_enable(&iim_clk);
+        imx_print_silicon_rev("i.MX35", mx35_revision());
+        clk_disable(&iim_clk);
 
         /*
          * Check if we came up in internal boot mode. If yes, we need some
@@ -529,17 +535,11 @@ int __init mx35_clocks_init()
          */
         if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
                 /* Additionally turn on UART1, SCC, and IIM clocks */
-                cgr2 |= 3 << 16 | 3 << 4;
-                cgr3 |= 3 << 2;
+                clk_enable(&iim_clk);
+                clk_enable(&uart1_clk);
+                clk_enable(&scc_clk);
         }
 
-        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
-        __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
-
-        clk_enable(&iim_clk);
-        imx_print_silicon_rev("i.MX35", mx35_revision());
-        clk_disable(&iim_clk);
-
 #ifdef CONFIG_MXC_USE_EPIT
         epit_timer_init(&epit1_clk,
                         MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 613a1b993bff..9273c2a24b54 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1931,14 +1931,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
                 val |= 0x1 << BP_CLPCR_LPM;
                 val &= ~BM_CLPCR_VSTBY;
                 val &= ~BM_CLPCR_SBYOS;
-                val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                 break;
         case STOP_POWER_OFF:
                 val |= 0x2 << BP_CLPCR_LPM;
                 val |= 0x3 << BP_CLPCR_STBY_COUNT;
                 val |= BM_CLPCR_VSTBY;
                 val |= BM_CLPCR_SBYOS;
-                val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                 break;
         default:
                 return -EINVAL;
@@ -1953,14 +1951,17 @@ static struct map_desc imx6q_clock_desc[] = {
         imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
 };
 
+void __init imx6q_clock_map_io(void)
+{
+        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
+}
+
 int __init mx6q_clocks_init(void)
 {
         struct device_node *np;
         void __iomem *base;
         int i, irq;
 
-        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
-
         /* retrieve the freqency of fixed clocks from device tree */
         for_each_compatible_node(np, NULL, "fixed-clock") {
                 u32 rate;
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 1e486e67dabb..146a4f073464 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -139,4 +139,5 @@ MACHINE_START(APF9328, "Armadeus APF9328")
         .handle_irq   = imx1_handle_irq,
         .timer        = &apf9328_timer,
         .init_machine = apf9328_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index c9a9cf67755e..e4f426a09899 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -561,4 +561,5 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
         .handle_irq = imx31_handle_irq,
         .timer = &armadillo5x0_timer,
         .init_machine = armadillo5x0_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 313f62ddc1ef..9a9897749dd6 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -65,4 +65,5 @@ MACHINE_START(BUG, "BugLabs BUGBase")
         .handle_irq = imx31_handle_irq,
         .timer = &bug_timer,
         .init_machine = bug_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index edb373052576..d085aea08709 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -318,4 +318,5 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
         .handle_irq = imx27_handle_irq,
         .timer = &eukrea_cpuimx27_timer,
         .init_machine = eukrea_cpuimx27_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 66af2e8f7e57..8ecc872b2547 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
         .bitrate =              100000,
 };
 
+#define TSC2007_IRQGPIO         IMX_GPIO_NR(3, 2)
+static int tsc2007_get_pendown_state(void)
+{
+        return !gpio_get_value(TSC2007_IRQGPIO);
+}
+
 static struct tsc2007_platform_data tsc2007_info = {
         .model                  = 2007,
         .x_plate_ohms           = 180,
+        .get_pendown_state = tsc2007_get_pendown_state,
 };
 
-#define TSC2007_IRQGPIO         IMX_GPIO_NR(3, 2)
 static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
         {
                 I2C_BOARD_INFO("pcf8563", 0x51),
@@ -201,4 +207,5 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
         .handle_irq = imx35_handle_irq,
         .timer = &eukrea_cpuimx35_timer,
         .init_machine = eukrea_cpuimx35_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index ab8fbcc472b5..76a97a598b9e 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -170,4 +170,5 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
         .handle_irq = imx25_handle_irq,
         .timer = &eukrea_cpuimx25_timer,
         .init_machine = eukrea_cpuimx25_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 38eb9e45110b..c2766ae02b4f 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -282,4 +282,5 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
         .handle_irq = imx27_handle_irq,
         .timer = &visstrim_m10_timer,
         .init_machine = visstrim_m10_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7052155d0557..c9d350c5dcc8 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -78,4 +78,5 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27ipcam_timer,
         .init_machine = mx27ipcam_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 8d6a63521f17..1f45b9189229 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -84,4 +84,5 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27lite_timer,
         .init_machine = mx27lite_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8bf5fa349484..05b49bb5d677 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -10,10 +10,13 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <asm/hardware/cache-l2x0.h>
@@ -23,6 +26,36 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
+void imx6q_restart(char mode, const char *cmd)
+{
+        struct device_node *np;
+        void __iomem *wdog_base;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
+        wdog_base = of_iomap(np, 0);
+        if (!wdog_base)
+                goto soft;
+
+        imx_src_prepare_restart();
+
+        /* enable wdog */
+        writew_relaxed(1 << 2, wdog_base);
+        /* write twice to ensure the request will not get ignored */
+        writew_relaxed(1 << 2, wdog_base);
+
+        /* wait for reset to assert ... */
+        mdelay(500);
+
+        pr_err("Watchdog reset failed to assert reset\n");
+
+        /* delay to allow the serial port to show the message */
+        mdelay(50);
+
+soft:
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
+
 static void __init imx6q_init_machine(void)
 {
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -34,16 +67,18 @@ static void __init imx6q_map_io(void)
 {
         imx_lluart_map_io();
         imx_scu_map_io();
+        imx6q_clock_map_io();
 }
 
-static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
+static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 7; /* imx6q gets 7 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx6q_irq_match[] __initconst = {
@@ -81,4 +116,5 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
         .timer          = &imx6q_timer,
         .init_machine   = imx6q_init_machine,
         .dt_compat      = imx6q_dt_compat,
+        .restart        = imx6q_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5f37f89e40fa..fc78e8071cd1 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -279,4 +279,5 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
         .handle_irq = imx31_handle_irq,
         .timer = &kzm_timer,
         .init_machine = kzm_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index fc49785e7340..97046088ff1a 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -147,6 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
         .handle_irq = imx1_handle_irq,
         .timer = &mx1ads_timer,
         .init_machine = mx1ads_init,
+        .restart        = mxc_restart,
 MACHINE_END
 
 MACHINE_START(MXLADS, "Freescale MXLADS")
@@ -157,4 +158,5 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
         .handle_irq = imx1_handle_irq,
         .timer = &mx1ads_timer,
         .init_machine = mx1ads_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 25f84028d055..8d9f95514b1f 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -312,4 +312,5 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
         .handle_irq = imx21_handle_irq,
         .timer = &mx21ads_timer,
         .init_machine = mx21ads_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 88dccf122243..f26734298aa6 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -270,4 +270,5 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
         .handle_irq = imx25_handle_irq,
         .timer = &mx25pdk_timer,
         .init_machine = mx25pdk_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index ba232d79fa81..18f35816706a 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -425,4 +425,5 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27pdk_timer,
         .init_machine = mx27pdk_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 74dd5731eb61..0228d2e07fe0 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -351,4 +351,5 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27ads_timer,
         .init_machine = mx27ads_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index b8c54b840185..2b565c381347 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -770,4 +770,5 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
         .timer = &mx31_3ds_timer,
         .init_machine = mx31_3ds_init,
         .reserve = mx31_3ds_reserve,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 9cc1a49053bb..4917aab0e253 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -542,4 +542,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31ads_timer,
         .init_machine = mx31ads_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 102ec99357cc..02401bbd6d53 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -303,4 +303,5 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31lilly_timer,
         .init_machine = mx31lilly_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index 5366d2de18fd..ef80751712e7 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -287,4 +287,5 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31lite_timer,
         .init_machine = mx31lite_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 93269150309c..b95981dacb2b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -600,4 +600,5 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31moboard_timer,
         .init_machine = mx31moboard_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 7a462025a0f7..0af6c9c5b3fd 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -224,4 +224,5 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
         .handle_irq = imx35_handle_irq,
         .timer = &mx35pdk_timer,
         .init_machine = mx35_3ds_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 125c19643b0f..8b3d3f07d894 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -274,4 +274,5 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
         .handle_irq = imx27_handle_irq,
         .timer = &mxt_td60_timer,
         .init_machine = mxt_td60_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 26072f4b02e3..d3b9c6b5edde 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -442,4 +442,5 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
         .handle_irq = imx27_handle_irq,
         .init_machine = pca100_init,
         .timer = &pca100_timer,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index efd6b536ef6a..d7e151669ed3 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -696,4 +696,5 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
         .handle_irq = imx31_handle_irq,
         .timer = &pcm037_timer,
         .init_machine = pcm037_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index a17e9c7dfca0..16f126da9f8f 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -357,4 +357,5 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
         .handle_irq = imx27_handle_irq,
         .timer = &pcm038_timer,
         .init_machine = pcm038_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 7366c2ae3ea5..06dc106519ae 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -425,4 +425,5 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
         .handle_irq = imx35_handle_irq,
         .timer = &pcm043_timer,
         .init_machine = pcm043_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 4ff5faf102a8..260621055b6b 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -273,4 +273,5 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
         .handle_irq = imx31_handle_irq,
         .timer = &qong_timer,
         .init_machine = qong_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index bb6e5b25d8d0..cb9ceae2f648 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -144,4 +144,5 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
         .handle_irq = imx1_handle_irq,
         .timer = &scb9328_timer,
         .init_machine = scb9328_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 69092458f2d9..033257e553ef 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -322,4 +322,5 @@ MACHINE_START(VPR200, "VPR200")
         .handle_irq = imx35_handle_irq,
         .timer = &vpr200_timer,
         .init_machine = vpr200_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec3398..31807d2a8b7b 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
 static void imx3_idle(void)
 {
         unsigned long reg = 0;
-        __asm__ __volatile__(
-                /* disable I and D cache */
-                "mrc p15, 0, %0, c1, c0, 0\n"
-                "bic %0, %0, #0x00001000\n"
-                "bic %0, %0, #0x00000004\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
-                /* invalidate I cache */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c5, 0\n"
-                /* clear and invalidate D cache */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c14, 0\n"
-                /* WFI */
-                "mov %0, #0\n"
-                "mcr p15, 0, %0, c7, c0, 4\n"
-                "nop\n" "nop\n" "nop\n" "nop\n"
-                "nop\n" "nop\n" "nop\n"
-                /* enable I and D cache */
-                "mrc p15, 0, %0, c1, c0, 0\n"
-                "orr %0, %0, #0x00001000\n"
-                "orr %0, %0, #0x00000004\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
-                : "=r" (reg));
+
+        if (!need_resched())
+                __asm__ __volatile__(
+                        /* disable I and D cache */
+                        "mrc p15, 0, %0, c1, c0, 0\n"
+                        "bic %0, %0, #0x00001000\n"
+                        "bic %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        /* invalidate I cache */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c5, 0\n"
+                        /* clear and invalidate D cache */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c14, 0\n"
+                        /* WFI */
+                        "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c0, 4\n"
+                        "nop\n" "nop\n" "nop\n" "nop\n"
+                        "nop\n" "nop\n" "nop\n"
+                        /* enable I and D cache */
+                        "mrc p15, 0, %0, c1, c0, 0\n"
+                        "orr %0, %0, #0x00001000\n"
+                        "orr %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        : "=r" (reg));
+        local_irq_enable();
 }
 
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
         l2x0_init(l2x0_base, 0x00030024, 0x00000000);
 }
 
+#ifdef CONFIG_SOC_IMX31
 static struct map_desc mx31_io_desc[] __initdata = {
         imx_map_entry(MX31, X_MEMC, MT_DEVICE),
         imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
         iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
 }
 
-static struct map_desc mx35_io_desc[] __initdata = {
-        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
-        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
-};
-
-void __init mx35_map_io(void)
-{
-        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
-}
-
 void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
-        imx_ioremap = imx3_ioremap;
-}
-
-void __init imx35_init_early(void)
-{
-        mxc_set_cpu_type(MXC_CPU_MX35);
-        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
-        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
+        pm_idle = imx3_idle;
         imx_ioremap = imx3_ioremap;
 }
 
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
         mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
 }
 
-void __init mx35_init_irq(void)
-{
-        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
-}
-
 static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
         .per_2_per_addr = 1677,
 };
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
 
         imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX31 */
+
+#ifdef CONFIG_SOC_IMX35
+static struct map_desc mx35_io_desc[] __initdata = {
+        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
+        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
+};
+
+void __init mx35_map_io(void)
+{
+        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
+}
+
+void __init imx35_init_early(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX35);
+        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
+        pm_idle = imx3_idle;
+        imx_ioremap = imx3_ioremap;
+}
+
+void __init mx35_init_irq(void)
+{
+        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
+}
 
 static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
         .ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
 
         imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 36cacbd0dcc2..4bde04f99e38 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -14,19 +14,26 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 #include <asm/unified.h>
 
 #define SRC_SCR                         0x000
 #define SRC_GPR1                        0x020
+#define BP_SRC_SCR_WARM_RESET_ENABLE    0
 #define BP_SRC_SCR_CORE1_RST            14
 #define BP_SRC_SCR_CORE1_ENABLE         22
 
 static void __iomem *src_base;
 
+#ifndef CONFIG_SMP
+#define cpu_logical_map(cpu)            0
+#endif
+
 void imx_enable_cpu(int cpu, bool enable)
 {
         u32 mask, val;
 
+        cpu = cpu_logical_map(cpu);
         mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
         val = readl_relaxed(src_base + SRC_SCR);
         val = enable ? val | mask : val & ~mask;
@@ -35,15 +42,38 @@ void imx_enable_cpu(int cpu, bool enable)
 
 void imx_set_cpu_jump(int cpu, void *jump_addr)
 {
+        cpu = cpu_logical_map(cpu);
         writel_relaxed(BSYM(virt_to_phys(jump_addr)),
                        src_base + SRC_GPR1 + cpu * 8);
 }
 
+void imx_src_prepare_restart(void)
+{
+        u32 val;
+
+        /* clear enable bits of secondary cores */
+        val = readl_relaxed(src_base + SRC_SCR);
+        val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE);
+        writel_relaxed(val, src_base + SRC_SCR);
+
+        /* clear persistent entry register of primary core */
+        writel_relaxed(0, src_base + SRC_GPR1);
+}
+
 void __init imx_src_init(void)
 {
         struct device_node *np;
+        u32 val;
 
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src");
         src_base = of_iomap(np, 0);
         WARN_ON(!src_base);
+
+        /*
+         * force warm reset sources to generate cold reset
+         * for a more reliable restart
+         */
+        val = readl_relaxed(src_base + SRC_SCR);
+        val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE);
+        writel_relaxed(val, src_base + SRC_SCR);
 }
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index dfd18f3b50e8..350e26636a06 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -6,6 +6,8 @@ config ARCH_INTEGRATOR_AP
         bool "Support Integrator/AP and Integrator/PP2 platforms"
         select CLKSRC_MMIO
         select MIGHT_HAVE_PCI
+        select SERIAL_AMBA_PL010
+        select SERIAL_AMBA_PL010_CONSOLE
         help
           Include support for the ARM(R) Integrator/AP and
           Integrator/PP2 platforms.
@@ -15,6 +17,8 @@ config ARCH_INTEGRATOR_CP
         select ARCH_CINTEGRATOR
         select ARM_TIMER_SP804
         select PLAT_VERSATILE_CLCD
+        select SERIAL_AMBA_PL011
+        select SERIAL_AMBA_PL011_CONSOLE
         help
           Include support for the ARM(R) Integrator CP platform.
 
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index a08f9b0299df..899561d8db28 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,2 +1,3 @@
 void integrator_init_early(void);
 void integrator_reserve(void);
+void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 4b38e13667ac..019f0ab08f66 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -29,6 +29,7 @@
 #include <mach/cm.h>
 #include <asm/system.h>
 #include <asm/leds.h>
+#include <asm/mach-types.h>
 #include <asm/mach/time.h>
 #include <asm/pgtable.h>
 
@@ -44,7 +45,6 @@ static struct amba_device rtc_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_RTCINT, NO_IRQ },
-        .periphid       = 0x00041030,
 };
 
 static struct amba_device uart0_device = {
@@ -58,7 +58,6 @@ static struct amba_device uart0_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_UARTINT0, NO_IRQ },
-        .periphid       = 0x0041010,
 };
 
 static struct amba_device uart1_device = {
@@ -72,7 +71,6 @@ static struct amba_device uart1_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_UARTINT1, NO_IRQ },
-        .periphid       = 0x0041010,
 };
 
 static struct amba_device kmi0_device = {
@@ -85,7 +83,6 @@ static struct amba_device kmi0_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_KMIINT0, NO_IRQ },
-        .periphid       = 0x00041050,
 };
 
 static struct amba_device kmi1_device = {
@@ -98,7 +95,6 @@ static struct amba_device kmi1_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_KMIINT1, NO_IRQ },
-        .periphid       = 0x00041050,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
@@ -157,6 +153,19 @@ static int __init integrator_init(void)
 {
         int i;
 
+        /*
+         * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
+         * hard-code them. The Integator/CP and forward have proper cell IDs.
+         * Else we leave them undefined to the bus driver can autoprobe them.
+         */
+        if (machine_is_integrator()) {
+                rtc_device.periphid     = 0x00041030;
+                uart0_device.periphid   = 0x00041010;
+                uart1_device.periphid   = 0x00041010;
+                kmi0_device.periphid    = 0x00041050;
+                kmi1_device.periphid    = 0x00041050;
+        }
+
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
@@ -238,3 +247,11 @@ void __init integrator_reserve(void)
 {
         memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
 }
+
+/*
+ * To reset, we hit the on-board reset register in the system FPGA
+ */
+void integrator_restart(char mode, const char *cmd)
+{
+        cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
+}
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
index e1551b8dab77..901514eba4a6 100644
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ b/arch/arm/mach-integrator/include/mach/system.h
@@ -21,8 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/cm.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -32,13 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * To reset, we hit the on-board reset register
-         * in the system FPGA
-         */
-        cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
-}
-
 #endif
diff --git a/arch/arm/mach-integrator/include/mach/vmalloc.h b/arch/arm/mach-integrator/include/mach/vmalloc.h
deleted file mode 100644
index 2f5a2bafb11f..000000000000
--- a/arch/arm/mach-integrator/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-integrator/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index a1769f35a86e..21a1d6cbef40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -472,4 +472,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         .init_irq       = ap_init_irq,
         .timer          = &ap_timer,
         .init_machine   = ap_init,
+        .restart        = integrator_restart,
 MACHINE_END
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5de49c33e4d4..a8b6aa6003f3 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -14,7 +14,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/string.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/kmi.h>
 #include <linux/amba/clcd.h>
@@ -499,4 +499,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         .init_irq       = intcp_init_irq,
         .timer          = &cp_timer,
         .init_machine   = intcp_init,
+        .restart        = integrator_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 52b7fab7ef60..07e9ff7adafb 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -10,6 +10,7 @@ void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
 void iop13xx_add_tpmi_devices(void);
 void iop13xx_init_irq(void);
+void iop13xx_restart(char, const char *);
 
 /* CPUID CP6 R0 Page 0 */
 static inline int iop13xx_cpu_id(void)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
index d0c66ef450a7..1f31ed3f8ae2 100644
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ b/arch/arm/mach-iop13xx/include/mach/system.h
@@ -7,21 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <mach/iop13xx.h>
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Reset the internal bus (warning both cores are reset)
-         */
-        write_wdtcr(IOP_WDTCR_EN_ARM);
-        write_wdtcr(IOP_WDTCR_EN);
-        write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
-        write_wdtcr(0x1000);
-
-        for(;;);
-}
diff --git a/arch/arm/mach-iop13xx/include/mach/vmalloc.h b/arch/arm/mach-iop13xx/include/mach/vmalloc.h
deleted file mode 100644
index c53456740345..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef _VMALLOC_H_
-#define _VMALLOC_H_
-#define VMALLOC_END     0xfa000000UL
-#endif
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 4cf2cc477eae..abaee8833588 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC")
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340mc_timer,
         .init_machine   = iq81340mc_init,
+        .restart        = iop13xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index cd9e27499a1e..690916a09dc6 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC")
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340sc_timer,
         .init_machine   = iq81340sc_init,
+        .restart        = iop13xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index a5b989728b9e..daabb1fa6c2c 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str)
 __setup("iop13xx_init_adma", iop13xx_init_adma_setup);
 __setup("iop13xx_init_uart", iop13xx_init_uart_setup);
 __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
+
+void iop13xx_restart(char mode, const char *cmd)
+{
+        /*
+         * Reset the internal bus (warning both cores are reset)
+         */
+        write_wdtcr(IOP_WDTCR_EN_ARM);
+        write_wdtcr(IOP_WDTCR_EN);
+        write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
+        write_wdtcr(0x1000);
+}
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 4325055d4e19..24069e03fdc1 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -208,4 +208,5 @@ MACHINE_START(EM7210, "Lanner EM7210")
         .init_irq       = iop32x_init_irq,
         .timer          = &em7210_timer,
         .init_machine   = em7210_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 0edc88020577..204e1d1cd766 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -212,4 +212,5 @@ MACHINE_START(GLANTANK, "GLAN Tank")
         .init_irq       = iop32x_init_irq,
         .timer          = &glantank_timer,
         .init_machine   = glantank_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 059c783ce0b2..2d88264b9863 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -13,15 +13,8 @@
 
 #include <asm/hardware/iop3xx.h>
 
-extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype);
-extern void __iop3xx_iounmap(void __iomem *addr);
-
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
 #define __mem_pci(a)            (a)
 
-#define __arch_ioremap  __iop3xx_ioremap
-#define __arch_iounmap  __iop3xx_iounmap
-
 #endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index a4b808fe0d81..4a88727bca98 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,28 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <asm/mach-types.h>
-#include <asm/hardware/iop3xx.h>
-#include <mach/n2100.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        local_irq_disable();
-
-        if (machine_is_n2100()) {
-                gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
-                gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
-                while (1)
-                        ;
-        }
-
-        *IOP3XX_PCSR = 0x30;
-
-        /* Jump into ROM at address 0 */
-        cpu_reset(0);
-}
diff --git a/arch/arm/mach-iop32x/include/mach/vmalloc.h b/arch/arm/mach-iop32x/include/mach/vmalloc.h
deleted file mode 100644
index c4862d48e583..000000000000
--- a/arch/arm/mach-iop32x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 9e7aaccfeba0..3eb642af1cdc 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -318,6 +318,7 @@ MACHINE_START(IQ31244, "Intel IQ31244")
         .init_irq       = iop32x_init_irq,
         .timer          = &iq31244_timer,
         .init_machine   = iq31244_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
 
 /* There should have been an ep80219 machine identifier from the beginning.
@@ -332,4 +333,5 @@ MACHINE_START(EP80219, "Intel EP80219")
         .init_irq       = iop32x_init_irq,
         .timer          = &iq31244_timer,
         .init_machine   = iq31244_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 53ea86f649dd..2ec724b58a2c 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -191,4 +191,5 @@ MACHINE_START(IQ80321, "Intel IQ80321")
         .init_irq       = iop32x_init_irq,
         .timer          = &iq80321_timer,
         .init_machine   = iq80321_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index d7269279968c..6b6d55912444 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -291,6 +291,14 @@ static void n2100_power_off(void)
                 ;
 }
 
+static void n2100_restart(char mode, const char *cmd)
+{
+        gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
+        gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
+        while (1)
+                ;
+}
+
 
 static struct timer_list power_button_poll_timer;
 
@@ -332,4 +340,5 @@ MACHINE_START(N2100, "Thecus N2100")
         .init_irq       = iop32x_init_irq,
         .timer          = &n2100_timer,
         .init_machine   = n2100_init_machine,
+        .restart        = n2100_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 39e893e97c21..a8a66fc8fbdb 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -13,15 +13,8 @@
 
 #include <asm/hardware/iop3xx.h>
 
-extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype);
-extern void __iop3xx_iounmap(void __iomem *addr);
-
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
 #define __mem_pci(a)            (a)
 
-#define __arch_ioremap  __iop3xx_ioremap
-#define __arch_iounmap  __iop3xx_iounmap
-
 #endif
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index f192a34be073..4f98e765397c 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,17 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <asm/hardware/iop3xx.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        *IOP3XX_PCSR = 0x30;
-
-        /* Jump into ROM at address 0 */
-        cpu_reset(0);
-}
diff --git a/arch/arm/mach-iop33x/include/mach/vmalloc.h b/arch/arm/mach-iop33x/include/mach/vmalloc.h
deleted file mode 100644
index 48331dc23704..000000000000
--- a/arch/arm/mach-iop33x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 9e14ccc56f8e..abce934f3816 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80331, "Intel IQ80331")
         .init_irq       = iop33x_init_irq,
         .timer          = &iq80331_timer,
         .init_machine   = iq80331_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 09c899a2523f..7513559e25bb 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80332, "Intel IQ80332")
         .init_irq       = iop33x_init_irq,
         .timer          = &iq80332_timer,
         .init_machine   = iq80332_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 24f0fe35f4ad..81c45370a4e6 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -515,3 +515,7 @@ void __init ixp2000_init_irq(void)
         }
 }
 
+void ixp2000_restart(char mode, const char *cmd)
+{
+        ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
+}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index af9994537e01..ee525416f0d2 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -259,6 +259,7 @@ MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board")
         .init_irq       = ixp2000_init_irq,
         .timer          = &enp2611_timer,
         .init_machine   = enp2611_init_machine,
+        .restart        = ixp2000_restart,
 MACHINE_END
 
 
diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h
index 42182c79ed90..bb0f8dcf9ee1 100644
--- a/arch/arm/mach-ixp2000/include/mach/platform.h
+++ b/arch/arm/mach-ixp2000/include/mach/platform.h
@@ -122,6 +122,7 @@ void ixp2000_map_io(void);
 void ixp2000_uart_init(void);
 void ixp2000_init_irq(void);
 void ixp2000_init_time(unsigned long);
+void ixp2000_restart(char, const char *);
 unsigned long ixp2000_gettimeoffset(void);
 
 struct pci_sys_data;
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
index de370992c848..a7fb08b2b8e7 100644
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ b/arch/arm/mach-ixp2000/include/mach/system.h
@@ -8,42 +8,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        local_irq_disable();
-
-        /*
-         * Reset flash banking register so that we are pointing at
-         * RedBoot bank.
-         */
-        if (machine_is_ixdp2401()) {
-                ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
-                                        ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
-                                                | IXDP2X01_CPLD_FLASH_INTERN));
-                ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
-        }
-
-        /*
-         * On IXDP2801 we need to write this magic sequence to the CPLD
-         * to cause a complete reset of the CPU and all external devices
-         * and move the flash bank register back to 0.
-         */
-        if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
-                unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
-
-                reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
-                ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
-                ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
-        }
-
-        ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
-}
diff --git a/arch/arm/mach-ixp2000/include/mach/vmalloc.h b/arch/arm/mach-ixp2000/include/mach/vmalloc.h
deleted file mode 100644
index 61c8dae24f95..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/vmalloc.h
- *
- * Author: Naeem Afzal <naeem.m.afzal@intel.com>
- *
- * Copyright 2002 Intel Corp.
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- *
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts.  That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_END         0xfb000000UL
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index f7dfd9700141..f53e911ec94a 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -176,5 +176,6 @@ MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform")
         .init_irq       = ixdp2400_init_irq,
         .timer          = &ixdp2400_timer,
         .init_machine   = ixdp2x00_init_machine,
+        .restart        = ixp2000_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index d33bcac1ec92..a2e7c393e74f 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -291,5 +291,6 @@ MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
         .init_irq       = ixdp2800_init_irq,
         .timer          = &ixdp2800_timer,
         .init_machine   = ixdp2x00_init_machine,
+        .restart        = ixp2000_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 61a28676b5be..7632beadabf6 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -413,6 +413,35 @@ static void __init ixdp2x01_init_machine(void)
         ixdp2x01_uart_init();
 }
 
+static void ixdp2401_restart(char mode, const char *cmd)
+{
+        /*
+         * Reset flash banking register so that we are pointing at
+         * RedBoot bank.
+         */
+        ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+                                ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
+                                        | IXDP2X01_CPLD_FLASH_INTERN));
+        ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
+
+        ixp2000_restart(mode, cmd);
+}
+
+static void ixdp280x_restart(char mode, const char *cmd)
+{
+        /*
+         * On IXDP2801 we need to write this magic sequence to the CPLD
+         * to cause a complete reset of the CPU and all external devices
+         * and move the flash bank register back to 0.
+         */
+        unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
+
+        reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
+        ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
+        ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
+
+        ixp2000_restart(mode, cmd);
+}
 
 #ifdef CONFIG_ARCH_IXDP2401
 MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
@@ -422,6 +451,7 @@ MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
         .init_irq       = ixdp2x01_init_irq,
         .timer          = &ixdp2x01_timer,
         .init_machine   = ixdp2x01_init_machine,
+        .restart        = ixdp2401_restart,
 MACHINE_END
 #endif
 
@@ -433,6 +463,7 @@ MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
         .init_irq       = ixdp2x01_init_irq,
         .timer          = &ixdp2x01_timer,
         .init_machine   = ixdp2x01_init_machine,
+        .restart        = ixdp280x_restart,
 MACHINE_END
 
 /*
@@ -446,6 +477,7 @@ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")
         .init_irq       = ixdp2x01_init_irq,
         .timer          = &ixdp2x01_timer,
         .init_machine   = ixdp2x01_init_machine,
+        .restart        = ixdp280x_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index a1bee33d183e..0923bb905cc0 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -444,3 +444,9 @@ void __init ixp23xx_sys_init(void)
         *IXP23XX_EXP_UNIT_FUSE |= 0xf;
         platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
 }
+
+void ixp23xx_restart(char mode, const char *cmd)
+{
+        /* Use on-chip reset capability */
+        *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
+}
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 30dd31652e9d..8f2487e1fc4e 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -90,4 +90,5 @@ MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso")
         .timer          = &ixp23xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = espresso_init,
+        .restart        = ixp23xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index a1749d0fd896..4ce4353b9f72 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,33 +20,4 @@
 #define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
 #define __mem_pci(a)    (a)
 
-static inline void __iomem *
-ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
-{
-        if (addr >= IXP23XX_PCI_MEM_START &&
-                addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) {
-                if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE)
-                        return NULL;
-
-                return (void __iomem *)
-                        ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT);
-        }
-
-        return __arm_ioremap(addr, size, mtype);
-}
-
-static inline void
-ixp23xx_iounmap(void __iomem *addr)
-{
-        if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) &&
-            (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE))
-                return;
-
-        __iounmap(addr);
-}
-
-#define __arch_ioremap  ixp23xx_ioremap
-#define __arch_iounmap  ixp23xx_iounmap
-
-
 #endif
diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h
index db9d9416e5e4..50de558e722e 100644
--- a/arch/arm/mach-ixp23xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp23xx/include/mach/platform.h
@@ -34,6 +34,7 @@ struct pci_sys_data;
 void ixp23xx_map_io(void);
 void ixp23xx_init_irq(void);
 void ixp23xx_sys_init(void);
+void ixp23xx_restart(char, const char *);
 int ixp23xx_pci_setup(int, struct pci_sys_data *);
 void ixp23xx_pci_preinit(void);
 struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*);
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
index 8920ff2dff1f..277dda7334b9 100644
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ b/arch/arm/mach-ixp23xx/include/mach/system.h
@@ -7,10 +7,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
 #if 0
@@ -18,16 +14,3 @@ static inline void arch_idle(void)
                 cpu_do_idle();
 #endif
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* First try machine specific support */
-        if (machine_is_ixdp2351()) {
-                *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
-                (void) *IXDP2351_CPLD_RESET1_REG;
-                *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
-        }
-
-        /* Use on-chip reset capability */
-        *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
-}
diff --git a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h b/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
deleted file mode 100644
index 896c56a1c00e..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/vmalloc.h
- *
- * Copyright (c) 2005 MontaVista Software, Inc.
- *
- * NPU mappings end at 0xf0000000 and we allocate 64MB for board
- * specific static I/O.
- */
-
-#define VMALLOC_END     (0xec000000UL)
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b3a57e0f3419..5d5dd3e8d069 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -326,6 +326,17 @@ static void __init ixdp2351_init(void)
         ixp23xx_sys_init();
 }
 
+static void ixdp2351_restart(char mode, const char *cmd)
+{
+        /* First try machine specific support */
+
+        *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
+        (void) *IXDP2351_CPLD_RESET1_REG;
+        *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
+
+        ixp23xx_restart(mode, cmd);
+}
+
 MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixdp2351_map_io,
@@ -333,4 +344,5 @@ MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
         .timer          = &ixp23xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = ixdp2351_init,
+        .restart        = ixdp2351_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 8f4dcbba9025..377283fc658c 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -177,4 +177,5 @@ MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform")
         .timer          = &ixp23xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = roadrunner_init,
+        .restart        = ixp23xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index 37609a22c450..a7277ad470a5 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 
  /*
@@ -190,6 +191,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index b86a0055ab96..3841ab4146ba 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -17,7 +17,6 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/serial.h>
-#include <linux/sched.h>
 #include <linux/tty.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
@@ -403,18 +402,9 @@ void __init ixp4xx_sys_init(void)
 /*
  * sched_clock()
  */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = *IXP4XX_OSTS;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace ixp4xx_update_sched_clock(void)
+static u32 notrace ixp4xx_read_sched_clock(void)
 {
-        u32 cyc = *IXP4XX_OSTS;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return *IXP4XX_OSTS;
 }
 
 /*
@@ -430,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
 static void __init ixp4xx_clocksource_init(void)
 {
-        init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq);
+        setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
 
         clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
                         ixp4xx_clocksource_read);
@@ -501,3 +491,23 @@ static void __init ixp4xx_clockevent_init(void)
 
         clockevents_register_device(&clockevent_ixp4xx);
 }
+
+void ixp4xx_restart(char mode, const char *cmd)
+{
+        if ( 1 && mode == 's') {
+                /* Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                /* Use on-chip reset capability */
+
+                /* set the "key" register to enable access to
+                 * "timer" and "enable" registers
+                 */
+                *IXP4XX_OSWK = IXP4XX_WDT_KEY;
+
+                /* write 0 to the timer register for an immediate reset */
+                *IXP4XX_OSWT = 0;
+
+                *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
+        }
+}
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 81dfec31842b..a74f86ce8bcc 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -117,6 +117,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
@@ -132,6 +133,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = coyote_init,
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 8837fbca27ce..67be177b336a 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -286,4 +286,5 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 2887c3578c17..6d5818285af8 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -277,5 +277,6 @@ MACHINE_START(FSG, "Freecom FSG-3")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index d69d1b053bb7..7ecf9b28f1c0 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -104,5 +104,6 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index bf6678d1a929..c0e3d69a8aec 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -504,4 +504,5 @@ MACHINE_START(GORAMO_MLR, "MultiLink")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index aa029fc19140..a23f89391458 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index e824c02c825a..df9250bbf13d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -125,6 +125,7 @@ extern void ixp4xx_init_irq(void);
 extern void ixp4xx_sys_init(void);
 extern void ixp4xx_timer_init(void);
 extern struct sys_timer ixp4xx_timer;
+extern void ixp4xx_restart(char, const char *);
 extern void ixp4xx_pci_preinit(void);
 struct pci_sys_data;
 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
index 54c0af7fa2d4..140a9bef4466 100644
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ b/arch/arm/mach-ixp4xx/include/mach/system.h
@@ -8,9 +8,6 @@
  * published by the Free Software Foundation.
  *
  */
-
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         /* ixp4xx does not implement the XScale PWRMODE register,
@@ -20,25 +17,3 @@ static inline void arch_idle(void)
         cpu_do_idle();
 #endif
 }
-
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if ( 1 && mode == 's') {
-                /* Jump into ROM at address 0 */
-                cpu_reset(0);
-        } else {
-                /* Use on-chip reset capability */
-
-                /* set the "key" register to enable access to
-                 * "timer" and "enable" registers
-                 */
-                *IXP4XX_OSWK = IXP4XX_WDT_KEY;
-
-                /* write 0 to the timer register for an immediate reset */
-                *IXP4XX_OSWT = 0;
-
-                *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
-        }
-}
-
diff --git a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h b/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
deleted file mode 100644
index 9bcd64d59854..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (0xff000000UL)
-
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index f235f829dfa6..8a38b39999f8 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -261,6 +261,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index de716fa1aab6..1010eb7b0083 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -321,4 +321,5 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index ac81ccb26bfe..aa355c360d57 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -307,4 +307,5 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 3b6a81a696fc..0940869fcfdd 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -246,6 +246,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP")
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
@@ -259,6 +260,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
@@ -269,5 +271,6 @@ MACHINE_START(MIC256, "Omicron MIC256")
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 27e469ef4523..9dec20683291 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -244,4 +244,5 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index b14144b967a7..5ac0f0a0fd8c 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -105,5 +105,6 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3248cfbe51d..0bff4a916231 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -534,3 +534,19 @@ static int __init kirkwood_clock_gate(void)
         return 0;
 }
 late_initcall(kirkwood_clock_gate);
+
+void kirkwood_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable soft reset to assert RSTOUTn.
+         */
+        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+        /*
+         * Assert soft reset.
+         */
+        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index b9b0f0968a36..1529280246d6 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -50,6 +50,7 @@ void kirkwood_uart1_init(void);
 void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
 void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
 void kirkwood_audio_init(void);
+void kirkwood_restart(char, const char *);
 
 extern int kirkwood_tclk;
 extern struct sys_timer kirkwood_timer;
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index f457e07a65f0..6e1bac929ab5 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -227,4 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index ff4c21c1f923..d93359379598 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -103,4 +103,5 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index e4d199b2b1e8..61d9a552a054 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -108,4 +108,5 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c
index 6c40f784b516..bdaed3867d13 100644
--- a/arch/arm/mach-kirkwood/guruplug-setup.c
+++ b/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -127,4 +127,5 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 1aaddc364f2e..49dd0cb5e166 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -19,31 +19,6 @@ static inline void __iomem *__io(unsigned long addr)
                                         + KIRKWOOD_PCIE_IO_VIRT_BASE);
 }
 
-static inline void __iomem *
-__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
-{
-        void __iomem *retval;
-        unsigned long offs = paddr - KIRKWOOD_REGS_PHYS_BASE;
-        if (mtype == MT_DEVICE && size && offs < KIRKWOOD_REGS_SIZE &&
-            size <= KIRKWOOD_REGS_SIZE && offs + size <= KIRKWOOD_REGS_SIZE) {
-                retval = (void __iomem *)KIRKWOOD_REGS_VIRT_BASE + offs;
-        } else {
-                retval = __arm_ioremap(paddr, size, mtype);
-        }
-
-        return retval;
-}
-
-static inline void
-__arch_iounmap(void __iomem *addr)
-{
-        if (addr < (void __iomem *)KIRKWOOD_REGS_VIRT_BASE ||
-            addr >= (void __iomem *)(KIRKWOOD_REGS_VIRT_BASE + KIRKWOOD_REGS_SIZE))
-                __iounmap(addr);
-}
-
-#define __arch_ioremap          __arch_ioremap
-#define __arch_iounmap          __arch_iounmap
 #define __io(a)                 __io(a)
 #define __mem_pci(a)            (a)
 
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
index 7568e95d279b..5fddde002b5e 100644
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ b/arch/arm/mach-kirkwood/include/mach/system.h
@@ -9,28 +9,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable soft reset to assert RSTOUTn.
-         */
-        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-        /*
-         * Assert soft reset.
-         */
-        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-        while (1)
-                ;
-}
-
-
 #endif
diff --git a/arch/arm/mach-kirkwood/include/mach/vmalloc.h b/arch/arm/mach-kirkwood/include/mach/vmalloc.h
deleted file mode 100644
index bf162ca3d2c1..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-kirkwood/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfe800000UL
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 9a1e917352f7..85f6169c2484 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -169,4 +169,5 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 8849bcc7328e..e6bba01bae38 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -264,6 +264,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -275,6 +276,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -286,5 +288,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index 1ba12c4dff8f..31ae8de34e93 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -405,6 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -416,5 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 5660ca6c3d88..01f8c8992880 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -220,6 +220,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -232,6 +233,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -244,5 +246,6 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 6663869773ab..fd2c9c8b6831 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -85,4 +85,5 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 66b3c05e37a6..ef922079348b 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -121,4 +121,5 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 8b102d62e82c..4ea70e5f7137 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -107,7 +107,7 @@ static void __init sheevaplug_init(void)
         kirkwood_init();
 
         /* setup gpio pin select */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                 kirkwood_mpp_conf(sheeva_esata_mpp_config);
         else
                 kirkwood_mpp_conf(sheevaplug_mpp_config);
@@ -123,11 +123,11 @@ static void __init sheevaplug_init(void)
         kirkwood_ge00_init(&sheevaplug_ge00_data);
 
         /* honor lower power consumption for plugs with out eSATA */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                 kirkwood_sata_init(&sheeva_esata_sata_data);
 
         /* enable sd wp and sd cd on plugs with esata */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                 kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
         else
                 kirkwood_sdio_init(&sheevaplug_mvsdio_data);
@@ -144,6 +144,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -155,5 +156,6 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index ea104fb5ec3d..966b2b3bb813 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -207,4 +207,5 @@ MACHINE_START(T5325, "HP t5325 Thin Client")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 262c034836d4..73e2b6ca9564 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -138,4 +138,5 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index b68f5b4a9ec8..5bbca2680442 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -182,4 +182,5 @@ MACHINE_START(TS41X, "QNAP TS-41x")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index a91f99d265aa..255502ddd879 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -228,4 +228,5 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board")
         .init_irq       = ks8695_init_irq,
         .init_machine   = acs5k_init,
         .timer          = &ks8695_timer,
+        .restart        = ks8695_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index d24bcef2e2dd..e0d36cef2c56 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -126,4 +126,5 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player")
         .init_irq       = ks8695_init_irq,
         .init_machine   = dsm320_init,
         .timer          = &ks8695_timer,
+        .restart        = ks8695_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 16c95657f8fd..a8270725b76d 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -58,4 +58,5 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board")
         .init_irq       = ks8695_init_irq,
         .init_machine   = micrel_init,
         .timer          = &ks8695_timer,
+        .restart        = ks8695_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
index 2fbfab8d5fae..f8bdb11a9c33 100644
--- a/arch/arm/mach-ks8695/generic.h
+++ b/arch/arm/mach-ks8695/generic.h
@@ -12,4 +12,5 @@
 
 extern __init void ks8695_map_io(void);
 extern __init void ks8695_init_irq(void);
+extern void ks8695_restart(char, const char *);
 extern struct sys_timer ks8695_timer;
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
index fb1dda9be2d0..59fe992395bf 100644
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ b/arch/arm/mach-ks8695/include/mach/system.h
@@ -14,9 +14,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/regs-timer.h>
-
 static void arch_idle(void)
 {
         /*
@@ -27,22 +24,4 @@ static void arch_idle(void)
 
 }
 
-static void arch_reset(char mode, const char *cmd)
-{
-        unsigned int reg;
-
-        if (mode == 's')
-                cpu_reset(0);
-
-        /* disable timer0 */
-        reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
-        __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
-
-        /* enable watchdog mode */
-        __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
-
-        /* re-enable timer0 */
-        __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
-}
-
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/vmalloc.h b/arch/arm/mach-ks8695/include/mach/vmalloc.h
deleted file mode 100644
index 744ac66be3a2..000000000000
--- a/arch/arm/mach-ks8695/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ks8695/include/mach/vmalloc.h
- *
- * Copyright (C) 2006 Ben Dooks
- * Copyright (C) 2006 Simtec Electronics <linux@simtec.co.uk>
- *
- * KS8695 vmalloc definition
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END       (KS8695_IO_VA & PGDIR_MASK)
-
-#endif
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index a78092dcd6fb..76802aac0f45 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 69c072c2c0f9..37dfcd5bd2ad 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -109,3 +109,21 @@ struct sys_timer ks8695_timer = {
         .offset         = ks8695_gettimeoffset,
         .resume         = ks8695_timer_setup,
 };
+
+void ks8695_restart(char mode, const char *cmd)
+{
+        unsigned int reg;
+
+        if (mode == 's')
+                soft_restart(0);
+
+        /* disable timer0 */
+        reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
+        __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+
+        /* enable watchdog mode */
+        __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
+
+        /* re-enable timer0 */
+        __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+}
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 205b2dbb565b..369b152896cd 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -164,7 +164,7 @@ int clk_is_sysclk_mainosc(void)
 /*
  * System reset via the watchdog timer
  */
-void lpc32xx_watchdog_reset(void)
+static void lpc32xx_watchdog_reset(void)
 {
         /* Make sure WDT clocks are enabled */
         __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
@@ -311,3 +311,21 @@ void __init lpc32xx_map_io(void)
 {
         iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
 }
+
+void lpc23xx_restart(char mode, const char *cmd)
+{
+        switch (mode) {
+        case 's':
+        case 'h':
+                lpc32xx_watchdog_reset();
+                break;
+
+        default:
+                /* Do nothing */
+                break;
+        }
+
+        /* Wait for watchdog to reset system */
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 5583f52662bd..4b4e700343c1 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -39,6 +39,8 @@ extern void __init lpc32xx_init_irq(void);
 extern void __init lpc32xx_map_io(void);
 extern void __init lpc32xx_serial_init(void);
 extern void __init lpc32xx_gpio_init(void);
+extern void lpc23xx_restart(char, const char *);
+
 
 /*
  * Structure used for setting up and querying the PLLS
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
index df3b0dea4d7b..bf176c991520 100644
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ b/arch/arm/mach-lpc32xx/include/mach/system.h
@@ -24,29 +24,4 @@ static void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        extern void lpc32xx_watchdog_reset(void);
-
-        switch (mode) {
-        case 's':
-        case 'h':
-                printk(KERN_CRIT "RESET: Rebooting system\n");
-
-                /* Disable interrupts */
-                local_irq_disable();
-
-                lpc32xx_watchdog_reset();
-                break;
-
-        default:
-                /* Do nothing */
-                break;
-        }
-
-        /* Wait for watchdog to reset system */
-        while (1)
-                ;
-}
-
 #endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
deleted file mode 100644
index 720fa43a60bf..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/vmalloc.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     0xF0000000UL
-
-#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 6d2f0d1b9373..bfee5b455105 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -18,7 +18,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/dma-mapping.h>
@@ -388,4 +388,5 @@ MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller")
         .init_irq       = lpc32xx_init_irq,
         .timer          = &lpc32xx_timer,
         .init_machine   = phy3250_board_init,
+        .restart        = lpc23xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 7a60bbbce7a4..3e6dfab59ef6 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -243,6 +243,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
+        .restart        = pxa168_restart,
 MACHINE_END
 
 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
@@ -251,4 +252,5 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 39f0878d64a0..8de3dc6131a4 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -45,4 +45,5 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = avengers_lite_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index 983cfb15fbde..e16f04b39b15 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -219,4 +219,5 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = brownstone_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 5720674739f0..062b5b93c50e 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -45,3 +45,8 @@ void __init mmp_map_io(void)
         /* this is early, initialize mmp_chip_id here */
         mmp_chip_id = __raw_readl(MMP_CHIPID);
 }
+
+void mmp_restart(char mode, const char *cmd)
+{
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index ec8d65ded25c..1c9d6c1ea97a 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -6,3 +6,4 @@ extern void timer_init(int irq);
 
 extern void __init icu_init_irq(void);
 extern void __init mmp_map_io(void);
+extern void mmp_restart(char, const char *);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index c4fd806b15b4..5a6a27a6cfd0 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -121,4 +121,5 @@ MACHINE_START(FLINT, "Flint Development Platform")
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = flint_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc41..1e3abbe37cac 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -182,7 +182,7 @@ static void __init gplugd_init(void)
 
         /* on-chip devices */
         pxa168_add_uart(3);
-        pxa168_add_ssp(0);
+        pxa168_add_ssp(1);
         pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
 
         pxa168_add_eth(&gplugd_eth_platform_data);
@@ -194,4 +194,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = gplugd_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index d14eeaf16322..99b4ce1b6562 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,7 +7,7 @@
 #define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
 
 #define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (GPIO_REGS_VIRT + (x))
+#define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
 
 #define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
 
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7fb568d2845b..a677aa732c26 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -5,6 +5,7 @@ struct sys_timer;
 
 extern struct sys_timer pxa168_timer;
 extern void __init pxa168_init_irq(void);
+extern void pxa168_restart(char, const char *);
 extern void pxa168_clear_keypad_wakeup(void);
 
 #include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
index 1a8a25edb1b4..1d001eab81e1 100644
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -9,18 +9,8 @@
 #ifndef __ASM_MACH_SYSTEM_H
 #define __ASM_MACH_SYSTEM_H
 
-#include <mach/cputype.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (cpu_is_pxa168())
-                cpu_reset(0xffff0000);
-        else
-                cpu_reset(0);
-}
 #endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h
deleted file mode 100644
index 1d0bac003ad0..000000000000
--- a/arch/arm/mach-mmp/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 8bfac6612623..96cf5c8fe47d 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -175,4 +175,5 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = jasper_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 76ca15c00e45..13f23867a86a 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -214,3 +214,8 @@ int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
         pxa168_device_usb_host.dev.platform_data = pdata;
         return platform_device_register(&pxa168_device_usb_host);
 }
+
+void pxa168_restart(char mode, const char *cmd)
+{
+        soft_restart(0xffff0000);
+}
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index eb5be879fd8c..257a21283ec1 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -103,4 +103,5 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = tavorevb_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index bbe4727b96cc..8ac22a62bf1a 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -86,4 +86,5 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = teton_bga_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 4e91ee6e27c8..71fc4ee4602c 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -25,7 +25,6 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
-#include <linux/sched.h>
 
 #include <asm/sched_clock.h>
 #include <mach/addr-map.h>
@@ -42,8 +41,6 @@
 #define MAX_DELTA               (0xfffffffe)
 #define MIN_DELTA               (16)
 
-static DEFINE_CLOCK_DATA(cd);
-
 /*
  * FIXME: the timer needs some delay to stablize the counter capture
  */
@@ -59,16 +56,9 @@ static inline uint32_t timer_read(void)
         return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));
 }
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace mmp_read_sched_clock(void)
 {
-        u32 cyc = timer_read();
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace mmp_update_sched_clock(void)
-{
-        u32 cyc = timer_read();
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return timer_read();
 }
 
 static irqreturn_t timer_interrupt(int irq, void *dev_id)
@@ -201,7 +191,7 @@ void __init timer_init(int irq)
 {
         timer_config();
 
-        init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE);
+        setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
 
         ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
         ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 176515a76989..f02658825576 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -159,4 +159,5 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = ttc_dkb_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ebde97f5d5f0..e6beaff7621e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -67,6 +67,7 @@ config MSM_SOC_REV_A
         bool
 config  ARCH_MSM_SCORPIONMP
         bool
+        select HAVE_SMP
 
 config  ARCH_MSM_ARM11
         bool
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 6dc1cbd2a595..ed3598128530 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -99,6 +99,7 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
         .map_io = msm8960_map_io,
         .init_irq = msm8960_init_irq,
         .timer = &msm_timer,
+        .handle_irq = gic_handle_irq,
         .init_machine = msm8960_sim_init,
 MACHINE_END
 
@@ -108,6 +109,7 @@ MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
         .map_io = msm8960_map_io,
         .init_irq = msm8960_init_irq,
         .timer = &msm_timer,
+        .handle_irq = gic_handle_irq,
         .init_machine = msm8960_rumi3_init,
 MACHINE_END
 
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 44bf71688373..0a113424632c 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,6 +108,7 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
         .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
         .init_machine = msm8x60_init,
         .timer = &msm_timer,
 MACHINE_END
@@ -117,6 +118,7 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
         .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
         .init_machine = msm8x60_init,
         .timer = &msm_timer,
 MACHINE_END
@@ -126,6 +128,7 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
         .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
         .init_machine = msm8x60_init,
         .timer = &msm_timer,
 MACHINE_END
@@ -135,6 +138,7 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
         .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
+        .handle_irq = gic_handle_irq,
         .init_machine = msm8x60_init,
         .timer = &msm_timer,
 MACHINE_END
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index 32b465763dbd..97b8191d9d38 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -18,7 +18,7 @@
 #include <linux/input.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 
 #include <linux/delay.h>
 
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 24030d0da6e3..0fb7a17df398 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -18,6 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/bootmem.h>
+#include <linux/module.h>
 #include <mach/irqs.h>
 #include <mach/iommu.h>
 
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
deleted file mode 100644
index 717076f3ca73..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Low-level IRQ helper macros
- *
- * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/hardware/entry-macro-gic.S>
-
-        .macro  disable_fiq
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
deleted file mode 100644
index 70563ed11b36..000000000000
--- a/arch/arm/mach-msm/include/mach/entry-macro-vic.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) 2007 Google, Inc.
- * Author: Brian Swetland <swetland@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#include <mach/msm_iomap.h>
-
-        .macro  disable_fiq
-        .endm
-
-        .macro  get_irqnr_preamble, base, tmp
-        @ enable imprecise aborts
-        cpsie   a
-        mov     \base, #MSM_VIC_BASE
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        @ 0xD0 has irq# or old irq# if the irq has been handled
-        @ 0xD4 has irq# or -1 if none pending *but* if you just
-        @ read 0xD4 you never get the first irq for some reason
-        ldr     \irqnr, [\base, #0xD0]
-        ldr     \irqnr, [\base, #0xD4]
-        cmp     \irqnr, #0xffffffff
-        .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S
index b16f082eeb6f..41f7003ef34f 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro.S
@@ -16,8 +16,27 @@
  *
  */
 
-#if defined(CONFIG_ARM_GIC)
-#include <mach/entry-macro-qgic.S>
-#else
-#include <mach/entry-macro-vic.S>
+        .macro  disable_fiq
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+#if !defined(CONFIG_ARM_GIC)
+#include <mach/msm_iomap.h>
+
+        .macro  get_irqnr_preamble, base, tmp
+        @ enable imprecise aborts
+        cpsie   a
+        mov     \base, #MSM_VIC_BASE
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        @ 0xD0 has irq# or old irq# if the irq has been handled
+        @ 0xD4 has irq# or -1 if none pending *but* if you just
+        @ read 0xD4 you never get the first irq for some reason
+        ldr     \irqnr, [\base, #0xD0]
+        ldr     \irqnr, [\base, #0xD4]
+        cmp     \irqnr, #0xffffffff
+        .endm
 #endif
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index d2e83f42ba16..311db2b35da0 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,16 +12,8 @@
  * GNU General Public License for more details.
  *
  */
-
-#include <mach/hardware.h>
-
 void arch_idle(void);
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        for (;;) ;  /* depends on IPC w/ other core */
-}
-
 /* low level hardware reset hook -- for example, hitting the
  * PSHOLD line on the PMIC to hard reset the system
  */
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
deleted file mode 100644
index d138448eff16..000000000000
--- a/arch/arm/mach-msm/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* arch/arm/mach-msm/include/mach/vmalloc.h
- *
- * Copyright (C) 2007 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_ARCH_MSM_VMALLOC_H
-#define __ASM_ARCH_MSM_VMALLOC_H
-
-#define VMALLOC_END       0xd0000000UL
-
-#endif
-
diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c
index 8736afff82f3..0c56a5aaf588 100644
--- a/arch/arm/mach-msm/smd_debug.c
+++ b/arch/arm/mach-msm/smd_debug.c
@@ -215,7 +215,7 @@ static const struct file_operations debug_ops = {
         .llseek = default_llseek,
 };
 
-static void debug_create(const char *name, mode_t mode,
+static void debug_create(const char *name, umode_t mode,
                          struct dentry *dent,
                          int (*fill)(char *buf, int max))
 {
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index 0e94268d6e6f..ee74ec97c141 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -151,4 +151,5 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
         .init_early     = mv78xx0_init_early,
         .init_irq       = mv78xx0_init_irq,
         .timer          = &mv78xx0_timer,
+        .restart        = mv78xx0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 23d3980ef59d..5b9632b01169 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -401,3 +401,19 @@ void __init mv78xx0_init(void)
         feroceon_l2_init(is_l2_writethrough());
 #endif
 }
+
+void mv78xx0_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable soft reset to assert RSTOUTn.
+         */
+        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+        /*
+         * Assert soft reset.
+         */
+        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 632e63d65e7a..07d5f8f6be7d 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -46,6 +46,7 @@ void mv78xx0_uart1_init(void);
 void mv78xx0_uart2_init(void);
 void mv78xx0_uart3_init(void);
 void mv78xx0_i2c_init(void);
+void mv78xx0_restart(char, const char *);
 
 extern struct sys_timer mv78xx0_timer;
 
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 50b85ae2da52..4d6d48bf51ef 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -99,4 +99,5 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
         .init_early     = mv78xx0_init_early,
         .init_irq       = mv78xx0_init_irq,
         .timer          = &mv78xx0_timer,
+        .restart        = mv78xx0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
index 66e7ce4e90bd..8c3a5387cec7 100644
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ b/arch/arm/mach-mv78xx0/include/mach/system.h
@@ -9,28 +9,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable soft reset to assert RSTOUTn.
-         */
-        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-        /*
-         * Assert soft reset.
-         */
-        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-        while (1)
-                ;
-}
-
-
 #endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
deleted file mode 100644
index ba26fe98e640..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-mv78xx0/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
index e85222e53578..9a882706e138 100644
--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -84,4 +84,5 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
         .init_early     = mv78xx0_init_early,
         .init_irq       = mv78xx0_init_irq,
         .timer          = &mv78xx0_timer,
+        .restart        = mv78xx0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 1fc110348040..944025da8333 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -297,4 +297,5 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
         .handle_irq = imx51_handle_irq,
         .timer = &mxc_timer,
         .init_machine = eukrea_cpuimx51_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index 52a11c1898e6..9fbe923c8b08 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -335,4 +335,5 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
         .handle_irq = imx51_handle_irq,
         .timer = &mxc_timer,
         .init_machine = eukrea_cpuimx51sd_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
index fc3621d90bde..42b66e8d9615 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -222,4 +222,5 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
         .handle_irq = imx50_handle_irq,
         .timer = &mx50_rdp_timer,
         .init_machine = mx50_rdp_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 05783906db2b..83eab4176ca4 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -175,4 +175,5 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
         .handle_irq = imx51_handle_irq,
         .timer = &mx51_3ds_timer,
         .init_machine = mx51_3ds_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 5c837603ff0f..e4b822e9f719 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -362,7 +362,7 @@ static void __init mx51_babbage_init(void)
 {
         iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
         iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
-                PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
+                PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
 
         imx51_soc_init();
 
@@ -426,4 +426,5 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
         .handle_irq = imx51_handle_irq,
         .timer = &mx51_babbage_timer,
         .init_machine = mx51_babbage_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index a9e48662cf75..3a5ed2dd885a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -182,7 +182,7 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon
         .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
 };
 
-void mx51_efikamx_reset(void)
+static void mx51_efikamx_restart(char mode, const char *cmd)
 {
         if (system_rev == 0x11)
                 gpio_direction_output(EFIKAMX_RESET1_1, 0);
@@ -292,4 +292,5 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
         .handle_irq = imx51_handle_irq,
         .timer = &mx51_efikamx_timer,
         .init_machine = mx51_efikamx_init,
+        .restart = mx51_efikamx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 38c4a3e28d3c..ea5f65b0381a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -287,4 +287,5 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")
         .handle_irq = imx51_handle_irq,
         .init_machine =  efikasb_board_init,
         .timer = &mx51_efikasb_timer,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 0d7f0fffb23a..5f224f1c3eb6 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -257,4 +257,5 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_ard_timer,
         .init_machine = mx53_ard_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 6bea31ab8f85..d6ce137896d6 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -106,7 +106,7 @@ static inline void mx53_evk_fec_reset(void)
         gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
 }
 
-static struct fec_platform_data mx53_evk_fec_pdata = {
+static const struct fec_platform_data mx53_evk_fec_pdata __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
@@ -175,4 +175,5 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_evk_timer,
         .init_machine = mx53_evk_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 7678f7734db6..fd8b524e1c58 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -242,7 +242,7 @@ static inline void mx53_loco_fec_reset(void)
         gpio_set_value(LOCO_FEC_PHY_RST, 1);
 }
 
-static struct fec_platform_data mx53_loco_fec_data = {
+static const struct fec_platform_data mx53_loco_fec_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
@@ -317,4 +317,5 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_loco_timer,
         .init_machine = mx53_loco_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index 59c0845eb4a6..22c53c9b18aa 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -104,7 +104,7 @@ static inline void mx53_smd_fec_reset(void)
         gpio_set_value(SMD_FEC_PHY_RST, 1);
 }
 
-static struct fec_platform_data mx53_smd_fec_data = {
+static const struct fec_platform_data mx53_smd_fec_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
@@ -164,4 +164,5 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_smd_timer,
         .init_machine = mx53_smd_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 5c5328257dca..5e2e7a843860 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -16,7 +16,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <mach/hardware.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 static int mx5_cpu_rev = -1;
 
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
         if (!cpu_is_mx51())
                 return 0;
 
-        if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) {
+        if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
+                        (elf_hwcap & HWCAP_NEON)) {
                 elf_hwcap &= ~HWCAP_NEON;
                 pr_info("Turning off NEON support, detected broken NEON implementation\n");
         }
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index ccc61585659b..e6bad17b908c 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
         { /* sentinel */ }
 };
 
-static void __init imx51_tzic_add_irq_domain(struct device_node *np,
+static int __init imx51_tzic_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
         irq_domain_add_simple(np, 0);
+        return 0;
 }
 
-static void __init imx51_gpio_add_irq_domain(struct device_node *np,
+static int __init imx51_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 4; /* imx51 gets 4 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx51_irq_match[] __initconst = {
@@ -113,4 +115,5 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
         .timer          = &imx51_timer,
         .init_machine   = imx51_dt_init,
         .dt_compat      = imx51_dt_board_compat,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index ccaa0b81b768..05ebb3e68679 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
         { /* sentinel */ }
 };
 
-static void __init imx53_tzic_add_irq_domain(struct device_node *np,
+static int __init imx53_tzic_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
         irq_domain_add_simple(np, 0);
+        return 0;
 }
 
-static void __init imx53_gpio_add_irq_domain(struct device_node *np,
+static int __init imx53_gpio_add_irq_domain(struct device_node *np,
                                 struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
-                                   32 * 7; /* imx53 gets 7 gpio ports */
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 
+        gpio_irq_base -= 32;
         irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+
+        return 0;
 }
 
 static const struct of_device_id imx53_irq_match[] __initconst = {
@@ -123,4 +125,5 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
         .timer          = &imx53_timer,
         .init_machine   = imx53_dt_init,
         .dt_compat      = imx53_dt_board_compat,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 26eacc9d0d90..df4a508f240a 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,7 +23,9 @@
 
 static void imx5_idle(void)
 {
-        mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        if (!need_resched())
+                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        local_irq_enable();
 }
 
 /*
@@ -89,7 +91,7 @@ void __init imx51_init_early(void)
         mxc_set_cpu_type(MXC_CPU_MX51);
         mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
-        imx_idle = imx5_idle;
+        pm_idle = imx5_idle;
 }
 
 void __init imx53_init_early(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 229ae3494216..da6e4aad177c 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)		\
         reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);         \
         reg &= ~BM_CLKCTRL_##dr##_DIV;                                  \
         reg |= div << BP_CLKCTRL_##dr##_DIV;                            \
-        if (reg | (1 << clk->enable_shift)) {                           \
+        if (reg & (1 << clk->enable_shift)) {                           \
                 pr_err("%s: clock is gated\n", __func__);               \
                 return -EINVAL;                                         \
         }                                                               \
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 635bb5d9a20a..1388485414c9 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -16,6 +16,7 @@ struct clk;
 extern const u32 *mxs_get_ocotp(void);
 extern int mxs_reset_block(void __iomem *);
 extern void mxs_timer_init(struct clk *, int);
+extern void mxs_restart(char, const char *);
 
 extern int mx23_register_gpios(void);
 extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h
index 75d86118b76a..30c7990f3c01 100644
--- a/arch/arm/mach-mxs/include/mach/mx28.h
+++ b/arch/arm/mach-mxs/include/mach/mx28.h
@@ -104,8 +104,8 @@
 #define MX28_INT_CAN1                   9
 #define MX28_INT_LRADC_TOUCH            10
 #define MX28_INT_HSADC                  13
-#define MX28_INT_IRADC_THRESH0          14
-#define MX28_INT_IRADC_THRESH1          15
+#define MX28_INT_LRADC_THRESH0          14
+#define MX28_INT_LRADC_THRESH1          15
 #define MX28_INT_LRADC_CH0              16
 #define MX28_INT_LRADC_CH1              17
 #define MX28_INT_LRADC_CH2              18
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index 0d2d2b470998..bde5f6634747 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -30,6 +30,7 @@
  */
 #define cpu_is_mx23()           (                                       \
                 machine_is_mx23evk() ||                                 \
+                machine_is_stmp378x() ||                                \
                 0)
 #define cpu_is_mx28()           (                                       \
                 machine_is_mx28evk() ||                                 \
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
index 0e428239b433..e7ad1bb29423 100644
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ b/arch/arm/mach-mxs/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
-
 #endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/vmalloc.h b/arch/arm/mach-mxs/include/mach/vmalloc.h
deleted file mode 100644
index 103b0165ed0b..000000000000
--- a/arch/arm/mach-mxs/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 2000 Russell King.
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_MXS_VMALLOC_H__
-#define __MACH_MXS_VMALLOC_H__
-
-/* vmalloc ending address */
-#define VMALLOC_END       0xf4000000UL
-
-#endif /* __MACH_MXS_VMALLOC_H__ */
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 3b1681e4f49a..2f2758230edf 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -361,6 +361,7 @@ static struct sys_timer m28evk_timer = {
 MACHINE_START(M28EVK, "DENX M28 EVK")
         .map_io         = mx28_map_io,
         .init_irq       = mx28_init_irq,
-        .init_machine   = m28evk_init,
         .timer          = &m28evk_timer,
+        .init_machine   = m28evk_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index c325fbe4e4c6..5ea1c57d2606 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -184,4 +184,5 @@ MACHINE_START(MX23EVK, "Freescale MX23 EVK")
         .init_irq       = mx23_init_irq,
         .timer          = &mx23evk_timer,
         .init_machine   = mx23evk_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 064ec5abaa55..d0cc37fd23a4 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -501,4 +501,5 @@ MACHINE_START(MX28EVK, "Freescale MX28 EVK")
         .init_irq       = mx28_init_irq,
         .timer          = &mx28evk_timer,
         .init_machine   = mx28evk_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 177e53123a02..a626c07b8713 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -115,6 +115,7 @@ static struct sys_timer stmp378x_dvb_timer = {
 MACHINE_START(STMP378X, "STMP378X")
         .map_io         = mx23_map_io,
         .init_irq       = mx23_init_irq,
-        .init_machine   = stmp378x_dvb_init,
         .timer          = &stmp378x_dvb_timer,
+        .init_machine   = stmp378x_dvb_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
index 9a1f0e7a338e..2c0862e655ee 100644
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ b/arch/arm/mach-mxs/mach-tx28.c
@@ -178,4 +178,5 @@ MACHINE_START(TX28, "Ka-Ro electronics TX28 module")
         .init_irq = mx28_init_irq,
         .timer = &tx28_timer,
         .init_machine = tx28_stk5v3_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index 0fcff47009cf..9a7b08b2a925 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
         MX28_PAD_ENET0_CRS__ENET1_RX_EN,
 };
 
-static struct fec_platform_data tx28_fec0_data = {
+static const struct fec_platform_data tx28_fec0_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
-static struct fec_platform_data tx28_fec1_data = {
+static const struct fec_platform_data tx28_fec1_data __initconst = {
         .phy = PHY_INTERFACE_MODE_RMII,
 };
 
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index 20ec3bddf7cd..b936633b7682 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr;
 /*
  * Reset the system. It is called by machine_restart().
  */
-void arch_reset(char mode, const char *cmd)
+void mxs_restart(char mode, const char *cmd)
 {
         /* reset the chip */
         __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr);
@@ -53,7 +53,7 @@ void arch_reset(char mode, const char *cmd)
         mdelay(50);
 
         /* We'll take a jump through zero as a poor second */
-        cpu_reset(0);
+        soft_restart(0);
 }
 
 static int __init mxs_arch_reset_init(void)
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 00023b5cf12b..59e67979f197 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -187,3 +187,8 @@ static int __init netx_init(void)
 
 subsys_initcall(netx_init);
 
+void netx_restart(char mode, const char *cmd)
+{
+        writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
+               NETX_SYSTEM_RES_CR);
+}
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
index ede2d35341c3..9b915119b8d6 100644
--- a/arch/arm/mach-netx/generic.h
+++ b/arch/arm/mach-netx/generic.h
@@ -19,6 +19,7 @@
 
 extern void __init netx_map_io(void);
 extern void __init netx_init_irq(void);
+extern void netx_restart(char, const char *);
 
 struct sys_timer;
 extern struct sys_timer netx_timer;
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S
index 844f1f9acbdf..6e9f1cbe1634 100644
--- a/arch/arm/mach-netx/include/mach/entry-macro.S
+++ b/arch/arm/mach-netx/include/mach/entry-macro.S
@@ -18,22 +18,9 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#include <mach/hardware.h>
 
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =io_p2v(0x001ff000)
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, [\base, #0]
-                clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #31
-                cmp     \irqstat, #0
-                .endm
-
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
index dc7b4bc003c5..b38fa36d58c4 100644
--- a/arch/arm/mach-netx/include/mach/system.h
+++ b/arch/arm/mach-netx/include/mach/system.h
@@ -19,20 +19,10 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include "netx-regs.h"
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
-               NETX_SYSTEM_RES_CR);
-}
-
 #endif
 
diff --git a/arch/arm/mach-netx/include/mach/vmalloc.h b/arch/arm/mach-netx/include/mach/vmalloc.h
deleted file mode 100644
index 871f1ef7bff5..000000000000
--- a/arch/arm/mach-netx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/vmalloc.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index 90903dd44cbc..180ea899a48a 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>
 
@@ -203,6 +204,8 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
         .atag_offset    = 0x100,
         .map_io         = netx_map_io,
         .init_irq       = netx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &netx_timer,
         .init_machine   = nxdb500_init,
+        .restart        = netx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index c63384aba500..58009e29b20e 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>
 
@@ -96,6 +97,8 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
         .atag_offset    = 0x100,
         .map_io         = netx_map_io,
         .init_irq       = netx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &netx_timer,
         .init_machine   = nxdkn_init,
+        .restart        = netx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index 8f548ec83ad2..122e99826ef6 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/vic.h>
 #include <mach/netx-regs.h>
 #include <mach/eth.h>
 
@@ -180,6 +181,8 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
         .atag_offset    = 0x100,
         .map_io         = netx_map_io,
         .init_irq       = netx_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &netx_timer,
         .init_machine   = nxeb500hmi_init,
+        .restart        = netx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 0cbb74c96ef7..7c878bf00340 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -21,6 +21,7 @@
 #include <linux/mtd/onenand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
+#include <asm/hardware/vic.h>
 #include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -34,6 +35,8 @@
 #include <mach/nand.h>
 #include <mach/fsmc.h>
 
+#include "cpu-8815.h"
+
 /* Initial value for SRC control register: all timers use MXTAL/8 source */
 #define SRC_CR_INIT_MASK        0x00007fff
 #define SRC_CR_INIT_VAL         0x2aaa8000
@@ -280,6 +283,8 @@ MACHINE_START(NOMADIK, "NHK8815")
         .atag_offset    = 0x100,
         .map_io         = cpu8815_map_io,
         .init_irq       = cpu8815_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &nomadik_timer,
         .init_machine   = nhk8815_platform_init,
+        .restart        = cpu8815_restart,
 MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index dc67717db6f0..65df7b4fdd3e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -21,6 +21,7 @@
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
 #include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
@@ -32,6 +33,7 @@
 #include <asm/hardware/cache-l2x0.h>
 
 #include "clock.h"
+#include "cpu-8815.h"
 
 #define __MEM_4K_RESOURCE(x) \
         .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
@@ -164,3 +166,13 @@ void __init cpu8815_init_irq(void)
 #endif
          return;
 }
+
+void cpu8815_restart(char mode, const char *cmd)
+{
+        void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
+
+        /* FIXME: use egpio when implemented */
+
+        /* Write anything to Reset status register */
+        writel(1, src_rstsr);
+}
diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h
new file mode 100644
index 000000000000..71c21e8a11dc
--- /dev/null
+++ b/arch/arm/mach-nomadik/cpu-8815.h
@@ -0,0 +1,4 @@
+extern void cpu8815_map_io(void);
+extern void cpu8815_platform_init(void);
+extern void cpu8815_init_irq(void);
+extern void cpu8815_restart(char, const char *);
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S
index 49f1aa3bb420..98ea1c1fbbab 100644
--- a/arch/arm/mach-nomadik/include/mach/entry-macro.S
+++ b/arch/arm/mach-nomadik/include/mach/entry-macro.S
@@ -6,38 +6,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
         .macro  disable_fiq
         .endm
 
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =IO_ADDRESS(NOMADIK_IC_BASE)
-        .endm
-
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-        /* This stanza gets the irq mask from one of two status registers */
-        mov     \irqnr, #0
-        ldr     \irqstat, [\base, #VIC_REG_IRQSR0]      @ get masked status
-        cmp     \irqstat, #0
-        bne     1001f
-        add     \irqnr, \irqnr, #32
-        ldr     \irqstat, [\base, #VIC_REG_IRQSR1]      @ get masked status
-
-1001:   tst     \irqstat, #15
-        bne     1002f
-        add     \irqnr, \irqnr, #4
-        movs    \irqstat, \irqstat, lsr #4
-        bne     1001b
-1002:   tst     \irqstat, #1
-        bne     1003f
-        add     \irqnr, \irqnr, #1
-        movs    \irqstat, \irqstat, lsr #1
-        bne     1002b
-1003:   /* EQ will be set if no irqs pending */
-        .endm
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h
index b7897edf1f35..bcaeaf41c053 100644
--- a/arch/arm/mach-nomadik/include/mach/setup.h
+++ b/arch/arm/mach-nomadik/include/mach/setup.h
@@ -12,9 +12,6 @@
 
 #ifdef CONFIG_NOMADIK_8815
 
-extern void cpu8815_map_io(void);
-extern void cpu8815_platform_init(void);
-extern void cpu8815_init_irq(void);
 extern void nmdk_timer_init(void);
 
 #endif /* NOMADIK_8815 */
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
index 7119f688116e..25e198b8976c 100644
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ b/arch/arm/mach-nomadik/include/mach/system.h
@@ -20,9 +20,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -32,14 +29,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
-
-        /* FIXME: use egpio when implemented */
-
-        /* Write anything to Reset status register */
-        writel(1, src_rstsr);
-}
-
 #endif
diff --git a/arch/arm/mach-nomadik/include/mach/vmalloc.h b/arch/arm/mach-nomadik/include/mach/vmalloc.h
deleted file mode 100644
index f83d574d9445..000000000000
--- a/arch/arm/mach-nomadik/include/mach/vmalloc.h
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#define VMALLOC_END       0xe8000000UL
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index e0a028161dde..73f287d6429b 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -171,14 +171,6 @@ config MACH_OMAP_GENERIC
 comment "OMAP CPU Speed"
         depends on ARCH_OMAP1
 
-config OMAP_CLOCKS_SET_BY_BOOTLOADER
-        bool "OMAP clocks set by bootloader"
-        depends on ARCH_OMAP1
-        help
-          Enable this option to prevent the kernel from overriding the clock
-          frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
-          internal LCD controller and MPU peripherals.
-
 config OMAP_ARM_216MHZ
         bool "OMAP ARM 216 MHz CPU (1710 only)"
         depends on ARCH_OMAP1 && ARCH_OMAP16XX
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 51bae31cf361..88909cc0b254 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -35,7 +35,7 @@
 #include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <mach/camera.h>
 
 #include <mach/ams-delta-fiq.h>
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
         omap_cfg_reg(J19_1610_CAM_D6);
         omap_cfg_reg(J18_1610_CAM_D7);
 
-        iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
-
         omap_board_config = ams_delta_config;
         omap_board_config_size = ARRAY_SIZE(ams_delta_config);
         omap_serial_init();
@@ -373,15 +371,22 @@ static int __init ams_delta_modem_init(void)
 }
 arch_initcall(ams_delta_modem_init);
 
+static void __init ams_delta_map_io(void)
+{
+        omap15xx_map_io();
+        iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
+}
+
 MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
         /* Maintainer: Jonathan McDowell <noodles@earth.li> */
         .atag_offset    = 0x100,
-        .map_io         = omap15xx_map_io,
+        .map_io         = ams_delta_map_io,
         .init_early     = omap1_init_early,
         .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = ams_delta_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
 
 EXPORT_SYMBOL(ams_delta_latch1_write);
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 23178275f96b..0b9464b41212 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -32,7 +32,7 @@
 #include <plat/flash.h>
 #include <plat/fpga.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 
 /* fsample is pretty close to p2-sample */
@@ -390,4 +390,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_fsample_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index dc5b75de531c..9a5fe581bc1c 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -25,7 +25,7 @@
 #include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 
 /* assume no Mini-AB port */
 
@@ -89,4 +89,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_generic_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index b334b1481678..00ad6b22d60a 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -43,7 +43,7 @@
 #include <plat/irda.h>
 #include <plat/usb.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/flash.h>
 
 #include "board-h2.h"
@@ -456,4 +456,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
         .init_irq       = omap1_init_irq,
         .init_machine   = h2_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 74ebe72c9848..4a7f25149703 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -45,7 +45,7 @@
 #include <plat/usb.h>
 #include <plat/keypad.h>
 #include <plat/dma.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/flash.h>
 
 #include "board-h3.h"
@@ -444,4 +444,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
         .init_irq       = omap1_init_irq,
         .init_machine   = h3_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 3e91baab1a89..731cc3db7ab3 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -41,7 +41,7 @@
 #include <asm/mach/arch.h>
 
 #include <plat/omap7xx.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 #include <plat/keypad.h>
 #include <plat/usb.h>
@@ -610,4 +610,5 @@ MACHINE_START(HERALD, "HTC Herald")
         .init_irq       = omap1_init_irq,
         .init_machine   = htcherald_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 273153dba15b..309369ea6978 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -37,7 +37,7 @@
 #include <plat/tc.h>
 #include <plat/usb.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/mmc.h>
 
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
@@ -460,4 +460,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
         .init_irq       = omap1_init_irq,
         .init_machine   = innovator_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 6798b8488315..f9efc036ba96 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -30,7 +30,7 @@
 #include <plat/usb.h>
 #include <plat/board.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/hwa742.h>
 #include <plat/lcd_mipid.h>
 #include <plat/mmc.h>
@@ -259,4 +259,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_nokia770_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index c3859278d257..675de06557aa 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -51,7 +51,7 @@
 #include <plat/usb.h>
 #include <plat/mux.h>
 #include <plat/tc.h>
-#include <plat/common.h>
+#include "common.h"
 
 /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
 #define OMAP_OSK_ETHR_START             0x04800300
@@ -578,4 +578,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
         .init_irq       = omap1_init_irq,
         .init_machine   = osk_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index f9c44cb15b47..81fa27f88369 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -41,7 +41,7 @@
 #include <plat/board.h>
 #include <plat/irda.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 
 #define PALMTE_USBDETECT_GPIO   0
 #define PALMTE_USB_OR_DC_GPIO   1
@@ -270,4 +270,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmte_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 11a98539f7bb..81cb82178388 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -39,7 +39,7 @@
 #include <plat/board.h>
 #include <plat/irda.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -317,4 +317,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmtt_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 42061573e380..e881945ce8ec 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -41,7 +41,7 @@
 #include <plat/board.h>
 #include <plat/irda.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -334,4 +334,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmz71_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 203ae07550db..c000bed76276 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -32,7 +32,7 @@
 #include <plat/fpga.h>
 #include <plat/flash.h>
 #include <plat/keypad.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 
 static const unsigned int p2_keymap[] = {
@@ -352,4 +352,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_perseus2_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 092a4c046407..7bcd82ab0fd0 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -40,7 +40,7 @@
 #include <plat/usb.h>
 #include <plat/tc.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/keypad.h>
 #include <plat/board-sx1.h>
 
@@ -416,4 +416,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_sx1_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 61ed6cdab2bd..f83a502dc93c 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -28,13 +28,12 @@
 #include <linux/export.h>
 
 #include <mach/hardware.h>
-#include <mach/system.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
 #include <plat/board-voiceblue.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/tc.h>
@@ -221,7 +220,7 @@ void voiceblue_wdt_ping(void)
         gpio_set_value(0, wdt_gpio_state);
 }
 
-static void voiceblue_reset(char mode, const char *cmd)
+static void voiceblue_restart(char mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -285,8 +284,6 @@ static void __init voiceblue_init(void)
          * (it is connected through invertor) */
         omap_writeb(0x00, OMAP_LPG1_LCR);
         omap_writeb(0x00, OMAP_LPG1_PMR);       /* Disable clock */
-
-        arch_reset = voiceblue_reset;
 }
 
 MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
@@ -298,4 +295,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
         .init_irq       = omap1_init_irq,
         .init_machine   = voiceblue_init,
         .timer          = &omap1_timer,
+        .restart        = voiceblue_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index eaf09efb91ca..16b1423b454a 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -17,7 +17,8 @@
 
 #include <plat/clock.h>
 
-extern int __init omap1_clk_init(void);
+int omap1_clk_init(void);
+void omap1_clk_late_init(void);
 extern int omap1_clk_enable(struct clk *clk);
 extern void omap1_clk_disable(struct clk *clk);
 extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 92400b9eb69f..9ff90a744a21 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -16,6 +16,8 @@
 
 #include <linux/kernel.h>
 #include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include <asm/mach-types.h>  /* for machine_is_* */
@@ -767,6 +769,15 @@ static struct clk_functions omap1_clk_functions = {
         .clk_disable_unused     = omap1_clk_disable_unused,
 };
 
+static void __init omap1_show_rates(void)
+{
+        pr_notice("Clocking rate (xtal/DPLL1/MPU): "
+                        "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+                ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+                ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+                arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+}
+
 int __init omap1_clk_init(void)
 {
         struct omap_clk *c;
@@ -835,9 +846,12 @@ int __init omap1_clk_init(void)
         /* We want to be in syncronous scalable mode */
         omap_writew(0x1000, ARM_SYSST);
 
-#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
-        /* Use values set by bootloader. Determine PLL rate and recalculate
-         * dependent clocks as if kernel had changed PLL or divisors.
+
+        /*
+         * Initially use the values set by bootloader. Determine PLL rate and
+         * recalculate dependent clocks as if kernel had changed PLL or
+         * divisors. See also omap1_clk_late_init() that can reprogram dpll1
+         * after the SRAM is initialized.
          */
         {
                 unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +876,10 @@ int __init omap1_clk_init(void)
                         }
                 }
         }
-#else
-        /* Find the highest supported frequency and enable it */
-        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
-                printk(KERN_ERR "System frequencies not set. Check your config.\n");
-                /* Guess sane values (60MHz) */
-                omap_writew(0x2290, DPLL_CTL);
-                omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
-                ck_dpll1.rate = 60000000;
-        }
-#endif
         propagate_rate(&ck_dpll1);
         /* Cache rates for clocks connected to ck_ref (not dpll1) */
         propagate_rate(&ck_ref);
-        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
-                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
-               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
-               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
-               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
-
+        omap1_show_rates();
         if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
                 /* Select slicer output as OMAP input clock */
                 omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +924,27 @@ int __init omap1_clk_init(void)
 
         return 0;
 }
+
+#define OMAP1_DPLL1_SANE_VALUE  60000000
+
+void __init omap1_clk_late_init(void)
+{
+        unsigned long rate = ck_dpll1.rate;
+
+        if (rate >= OMAP1_DPLL1_SANE_VALUE)
+                return;
+
+        /* System booting at unusable rate, force reprogramming of DPLL1 */
+        ck_dpll1_p->rate = 0;
+
+        /* Find the highest supported frequency and enable it */
+        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+                pr_err("System frequencies not set, using default. Check your config.\n");
+                omap_writew(0x2290, DPLL_CTL);
+                omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL);
+                ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
+        }
+        propagate_rate(&ck_dpll1);
+        omap1_show_rates();
+        loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate);
+}
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
new file mode 100644
index 000000000000..a9a5146dd2d4
--- /dev/null
+++ b/arch/arm/mach-omap1/common.h
@@ -0,0 +1,62 @@
+/*
+ *
+ * Header for code common to all OMAP1 machines.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the  GNU General Public License along
+ * with this program; if not, write  to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
+#define __ARCH_ARM_MACH_OMAP1_COMMON_H
+
+#include <plat/common.h>
+
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+void omap7xx_map_io(void);
+#else
+static inline void omap7xx_map_io(void)
+{
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP15XX
+void omap15xx_map_io(void);
+#else
+static inline void omap15xx_map_io(void)
+{
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP16XX
+void omap16xx_map_io(void);
+#else
+static inline void omap16xx_map_io(void)
+{
+}
+#endif
+
+void omap1_init_early(void);
+void omap1_init_irq(void);
+void omap1_restart(char, const char *);
+
+extern struct sys_timer omap1_timer;
+extern bool omap_32k_timer_init(void);
+
+#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 48ef9888e820..1d76a63c0983 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -22,7 +22,7 @@
 #include <mach/hardware.h>
 #include <asm/mach/map.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/tc.h>
 #include <plat/board.h>
 #include <plat/mux.h>
@@ -30,6 +30,8 @@
 #include <plat/omap7xx.h>
 #include <plat/mcbsp.h>
 
+#include "clock.h"
+
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
                 return -ENODEV;
 
         omap_sram_init();
+        omap1_clk_late_init();
 
         /* please keep these calls, and their implementations above,
          * in alphabetical order so they're easier to sort through.
diff --git a/arch/arm/mach-omap1/include/mach/vmalloc.h b/arch/arm/mach-omap1/include/mach/vmalloc.h
deleted file mode 100644
index 22ec4a479577..000000000000
--- a/arch/arm/mach-omap1/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-omap1/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#define VMALLOC_END     0xd8000000UL
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 7969cfda4454..8e55b6fb3478 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -121,7 +121,6 @@ void __init omap16xx_map_io(void)
 void omap1_init_early(void)
 {
         omap_check_revision();
-        omap_ioremap_init();
 
         /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
          * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index ad951ee69205..91d199b64979 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -5,10 +5,9 @@
 #include <linux/io.h>
 
 #include <mach/hardware.h>
-#include <mach/system.h>
 #include <plat/prcm.h>
 
-void omap1_arch_reset(char mode, const char *cmd)
+void omap1_restart(char mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -21,5 +20,3 @@ void omap1_arch_reset(char mode, const char *cmd)
 
         omap_writew(1, ARM_RSTCT1);
 }
-
-void (*arch_reset)(char, const char *) = omap1_arch_reset;
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index a1837771e031..b8faffa44f9e 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -37,7 +37,6 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
-#include <linux/sched.h>
 #include <linux/spinlock.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -54,7 +53,7 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #ifdef CONFIG_OMAP_MPU_TIMER
 
@@ -190,30 +189,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
  * ---------------------------------------------------------------------------
  */
 
-static DEFINE_CLOCK_DATA(cd);
-
-static inline unsigned long long notrace _omap_mpu_sched_clock(void)
-{
-        u32 cyc = ~omap_mpu_timer_read(1);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-#ifndef CONFIG_OMAP_32K_TIMER
-unsigned long long notrace sched_clock(void)
-{
-        return _omap_mpu_sched_clock();
-}
-#else
-static unsigned long long notrace omap_mpu_sched_clock(void)
-{
-        return _omap_mpu_sched_clock();
-}
-#endif
-
-static void notrace mpu_update_sched_clock(void)
+static u32 notrace omap_mpu_read_sched_clock(void)
 {
-        u32 cyc = ~omap_mpu_timer_read(1);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return ~omap_mpu_timer_read(1);
 }
 
 static void __init omap_init_clocksource(unsigned long rate)
@@ -223,7 +201,7 @@ static void __init omap_init_clocksource(unsigned long rate)
                         "%s: can't register clocksource!\n";
 
         omap_mpu_timer_start(1, ~0, 1);
-        init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+        setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
 
         if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
                         300, 32, clocksource_mmio_readl_down))
@@ -254,30 +232,6 @@ static inline void omap_mpu_timer_init(void)
 }
 #endif  /* CONFIG_OMAP_MPU_TIMER */
 
-#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
-static unsigned long long (*preferred_sched_clock)(void);
-
-unsigned long long notrace sched_clock(void)
-{
-        if (!preferred_sched_clock)
-                return 0;
-
-        return preferred_sched_clock();
-}
-
-static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
-{
-        if (use_32k_sched_clock)
-                preferred_sched_clock = omap_32k_sched_clock;
-        else
-                preferred_sched_clock = omap_mpu_sched_clock;
-}
-#else
-static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
-{
-}
-#endif
-
 static inline int omap_32k_timer_usable(void)
 {
         int res = false;
@@ -299,12 +253,8 @@ static inline int omap_32k_timer_usable(void)
  */
 static void __init omap1_timer_init(void)
 {
-        if (omap_32k_timer_usable()) {
-                preferred_sched_clock_init(1);
-        } else {
+        if (!omap_32k_timer_usable())
                 omap_mpu_timer_init();
-                preferred_sched_clock_init(0);
-        }
 }
 
 struct sys_timer omap1_timer = {
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 96604a50c4fe..9a54ef4dcf5e 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,7 +52,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/dmtimer.h>
 
 /*
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 503414718905..4f01533083cc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -25,6 +25,7 @@ config ARCH_OMAP2
         depends on ARCH_OMAP2PLUS
         default y
         select CPU_V6
+        select MULTI_IRQ_HANDLER
 
 config ARCH_OMAP3
         bool "TI OMAP3"
@@ -36,13 +37,16 @@ config ARCH_OMAP3
         select ARCH_HAS_OPP
         select PM_OPP if PM
         select ARM_CPU_SUSPEND if PM
+        select MULTI_IRQ_HANDLER
 
 config ARCH_OMAP4
         bool "TI OMAP4"
         default y
         depends on ARCH_OMAP2PLUS
+        select CACHE_L2X0
         select CPU_V7
         select ARM_GIC
+        select HAVE_SMP
         select LOCAL_TIMERS if SMP
         select PL310_ERRATA_588369
         select PL310_ERRATA_727915
@@ -334,6 +338,7 @@ config MACH_OMAP4_PANDA
 config OMAP3_EMU
         bool "OMAP3 debugging peripherals"
         depends on ARCH_OMAP3
+        select ARM_AMBA
         select OC_ETM
         help
           Say Y here to enable debugging hardware of omap3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69ab1c069134..b009f17dee56 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-         common.o gpio.o dma.o wd_timer.o
+         common.o gpio.o dma.o wd_timer.o display.o
 
 omap-2-3-common                         = irq.o sdrc.o
 hwmod-common                            = omap_hwmod.o \
@@ -264,7 +264,4 @@ smsc911x-$(CONFIG_SMSC911X)		:= gpmc-smsc911x.o
 obj-y                                   += $(smsc911x-m) $(smsc911x-y)
 obj-$(CONFIG_ARCH_OMAP4)                += hwspinlock.o
 
-disp-$(CONFIG_OMAP2_DSS)                := display.o
-obj-y                                   += $(disp-m) $(disp-y)
-
 obj-y                                   += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index d704f0ac328d..7370983f809f 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -34,7 +34,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 #include <plat/usb.h>
 #include <plat/gpmc-smc91x.h>
@@ -301,6 +301,8 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
         .map_io         = omap243x_map_io,
         .init_early     = omap2430_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_2430sdp_init,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 77142c13fa13..9996334cb687 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -33,7 +33,7 @@
 #include <plat/mcspi.h>
 #include <plat/board.h>
 #include <plat/usb.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/dma.h>
 #include <plat/gpmc.h>
 #include <video/omapdss.h>
@@ -728,6 +728,8 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
         .map_io         = omap3_map_io,
         .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_3430sdp_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index f552305162fc..6ef350d1ae4f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -16,7 +16,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 #include <plat/gpmc-smc91x.h>
 #include <plat/usb.h>
@@ -215,6 +215,8 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
         .map_io         = omap3_map_io,
         .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_sdp_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 515646886b59..bad5d5a5ef79 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,13 +27,13 @@
 #include <linux/leds_pwm.h>
 
 #include <mach/hardware.h>
-#include <mach/omap4-common.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/usb.h>
 #include <plat/mmc.h>
 #include <plat/omap4-keypad.h>
@@ -984,6 +984,8 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
         .map_io         = omap4_map_io,
         .init_early     = omap4430_init_early,
         .init_irq       = gic_init_irq,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = omap_4430sdp_init,
         .timer          = &omap4_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 7834536ab416..c3851e8de28b 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -27,7 +27,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/usb.h>
 
 #include "mux.h"
@@ -98,6 +98,8 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
         .map_io         = omap3_map_io,
         .init_early     = am35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = am3517_crane_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index d314f033c9df..f5a3a3f11739 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -32,7 +32,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/usb.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
@@ -491,6 +491,8 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
         .map_io         = omap3_map_io,
         .init_early     = am35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = am3517_evm_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index de8134b7f580..ac773829941f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -37,7 +37,7 @@
 #include <plat/led.h>
 #include <plat/usb.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 
 #include <video/omapdss.h>
@@ -354,6 +354,8 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
         .map_io         = omap242x_map_io,
         .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_apollon_init,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index bd1bcacb40f9..1545102d1f9b 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -37,7 +37,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/nand.h>
 #include <plat/gpmc.h>
 #include <plat/usb.h>
@@ -634,8 +634,10 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t35_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(CM_T3730, "Compulab CM-T3730")
@@ -644,6 +646,8 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
         .map_io         = omap3_map_io,
         .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3730_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 3f4dc6626845..f36d694d2159 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -39,7 +39,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/usb.h>
 #include <plat/nand.h>
 #include <plat/gpmc.h>
@@ -299,6 +299,8 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .map_io         = omap3_map_io,
         .init_early     = am35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3517_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 90154e411da0..e873063f4fda 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -41,7 +41,7 @@
 #include <asm/mach/flash.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 #include <plat/nand.h>
 #include <plat/usb.h>
@@ -660,6 +660,8 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = devkit8000_init,
         .timer          = &omap3_secure_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index fb55fa3dad5a..f8c5b2cc7c9c 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -20,8 +20,7 @@
 #include <asm/mach/arch.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
-#include <mach/omap4-common.h>
+#include "common.h"
 #include "common-board-devices.h"
 
 /*
@@ -107,6 +106,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap2_timer,
         .dt_compat      = omap242x_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
 
@@ -122,9 +122,11 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
         .map_io         = omap243x_map_io,
         .init_early     = omap2430_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_generic_init,
         .timer          = &omap2_timer,
         .dt_compat      = omap243x_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
 
@@ -143,6 +145,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
         .init_machine   = omap3_init,
         .timer          = &omap3_timer,
         .dt_compat      = omap3_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
 
@@ -161,5 +164,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
         .init_machine   = omap4_init,
         .timer          = &omap4_timer,
         .dt_compat      = omap4_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8b351d92a1cc..54af800d143c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -34,7 +34,7 @@
 
 #include <plat/usb.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/menelaus.h>
 #include <plat/dma.h>
 #include <plat/gpmc.h>
@@ -396,6 +396,8 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
         .map_io         = omap242x_map_io,
         .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_h4_init,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index d0a3f78a9b69..a59ace0ed560 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -28,7 +28,7 @@
 #include <asm/mach/arch.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 #include <plat/usb.h>
 #include <video/omapdss.h>
@@ -672,8 +672,10 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = igep_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -682,6 +684,8 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = igep_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index e179da0c4da5..2d2a61f7dcbf 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -36,7 +36,7 @@
 
 #include <plat/mcspi.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 #include <mach/board-zoom.h>
 
@@ -434,6 +434,8 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
         .map_io         = omap3_map_io,
         .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_ldp_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index e9d5f4a3d064..cef2cf1c0b8d 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -26,7 +26,7 @@
 #include <asm/mach-types.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/menelaus.h>
 #include <mach/irqs.h>
 #include <plat/mcspi.h>
@@ -689,8 +689,10 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
         .map_io         = omap242x_map_io,
         .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -699,8 +701,10 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
         .map_io         = omap242x_map_io,
         .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -709,6 +713,8 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
         .map_io         = omap242x_map_io,
         .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
+        .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 4a71cb7e42d4..7ffcd2839e7b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -40,7 +40,7 @@
 #include <asm/mach/flash.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-dvi.h>
 #include <plat/gpmc.h>
@@ -559,6 +559,8 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
         .map_io         = omap3_map_io,
         .init_early     = omap3_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_beagle_init,
         .timer          = &omap3_secure_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index ec00b2ec7022..003fe34c9343 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -43,7 +43,7 @@
 
 #include <plat/board.h>
 #include <plat/usb.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/mcspi.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-dvi.h>
@@ -681,6 +681,8 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_evm_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7c0f193f246d..4198dd017d8f 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -40,7 +40,7 @@
 
 #include <plat/mux.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc-smsc911x.h>
 #include <plat/gpmc.h>
 #include <plat/sdrc.h>
@@ -208,8 +208,10 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3logic_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
@@ -217,6 +219,8 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3logic_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index f7811f4cfc3d..1644b73017fc 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -41,7 +41,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <mach/hardware.h>
 #include <plat/mcspi.h>
 #include <plat/usb.h>
@@ -606,6 +606,8 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3pandora_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index ddb7d6663c6d..cb089a46f62f 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -35,7 +35,7 @@
 #include <asm/mach/flash.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 #include <plat/nand.h>
 #include <plat/usb.h>
@@ -454,6 +454,8 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
         .map_io                 = omap3_map_io,
         .init_early             = omap35xx_init_early,
         .init_irq               = omap3_init_irq,
+        .handle_irq             = omap3_intc_handle_irq,
         .init_machine           = omap3_stalker_init,
         .timer                  = &omap3_secure_timer,
+        .restart                = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index a2d0d1971e27..a0b851aafcca 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -44,7 +44,7 @@
 #include <asm/mach/flash.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/gpmc.h>
 #include <plat/nand.h>
 #include <plat/usb.h>
@@ -381,6 +381,8 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
         .map_io         = omap3_map_io,
         .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_touchbook_init,
         .timer          = &omap3_secure_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index a8c2c4263e38..8b06c6a60d02 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -30,14 +30,14 @@
 #include <linux/wl12xx.h>
 
 #include <mach/hardware.h>
-#include <mach/omap4-common.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <video/omapdss.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/usb.h>
 #include <plat/mmc.h>
 #include <video/omap-panel-dvi.h>
@@ -577,6 +577,8 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
         .map_io         = omap4_map_io,
         .init_early     = omap4430_init_early,
         .init_irq       = gic_init_irq,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = omap4_panda_init,
         .timer          = &omap4_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 4cf7aeabab86..52c0cef77165 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -43,7 +43,7 @@
 #include <asm/mach/map.h>
 
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-dvi.h>
@@ -562,6 +562,8 @@ MACHINE_START(OVERO, "Gumstix Overo")
         .map_io         = omap3_map_io,
         .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = overo_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 616fb39763b0..8678b386c6a2 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -25,7 +25,7 @@
 #include <plat/mmc.h>
 #include <plat/usb.h>
 #include <plat/gpmc.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/onenand.h>
 
 #include "mux.h"
@@ -149,6 +149,8 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
         .map_io         = omap3_map_io,
         .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rm680_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ba1aa07bdb29..108fee6146fc 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -27,7 +27,7 @@
 
 #include <plat/mcspi.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/dma.h>
 #include <plat/gpmc.h>
 #include <plat/onenand.h>
@@ -193,7 +193,7 @@ static struct platform_device rx51_charger_device = {
 static void __init rx51_charger_init(void)
 {
         WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
-                GPIOF_OUT_INIT_LOW, "isp1704_reset"));
+                GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
 
         platform_device_register(&rx51_charger_device);
 }
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 4af7c4b2881a..27f01f051dff 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -25,7 +25,7 @@
 
 #include <plat/mcspi.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/dma.h>
 #include <plat/gpmc.h>
 #include <plat/usb.h>
@@ -127,6 +127,8 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
         .map_io         = omap3_map_io,
         .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rx51_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index e6ee8842285c..74713e3993e5 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -22,7 +22,7 @@
 
 #include <plat/irqs.h>
 #include <plat/board.h>
-#include <plat/common.h>
+#include "common.h"
 
 static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
 };
@@ -48,4 +48,5 @@ MACHINE_START(TI8168EVM, "ti8168evm")
         .init_irq       = ti816x_init_irq,
         .timer          = &omap3_timer,
         .init_machine   = ti8168_evm_init,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 6d0aa4fcb7c3..8d7ce11cfeaf 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -24,7 +24,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/usb.h>
 
 #include <mach/board-zoom.h>
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index be6684dc4f55..5c20bcc57f2b 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -21,7 +21,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 #include <plat/usb.h>
 
@@ -135,8 +135,10 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
         .map_io         = omap3_map_io,
         .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_zoom_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -145,6 +147,8 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
         .map_io         = omap3_map_io,
         .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
+        .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_zoom_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 38830d8d4783..04d39cdd2112 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "cm.h"
 #include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
index e96f53ea01a1..6a836303252c 100644
--- a/arch/arm/mach-omap2/cm44xx.c
+++ b/arch/arm/mach-omap2/cm44xx.c
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "cm.h"
 #include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index eb2a472bbf46..6204deaf85b1 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -20,7 +20,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "cm.h"
 #include "cm1_44xx.h"
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 110e5b9db145..684b8a7cd401 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -17,7 +17,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 #include <plat/mux.h>
 
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
new file mode 100644
index 000000000000..cda888a2e635
--- /dev/null
+++ b/arch/arm/mach-omap2/common.h
@@ -0,0 +1,186 @@
+/*
+ * Header for code common to all OMAP2+ machines.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the  GNU General Public License along
+ * with this program; if not, write  to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
+#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
+
+#include <linux/delay.h>
+#include <plat/common.h>
+
+#ifdef CONFIG_SOC_OMAP2420
+extern void omap242x_map_common_io(void);
+#else
+static inline void omap242x_map_common_io(void)
+{
+}
+#endif
+
+#ifdef CONFIG_SOC_OMAP2430
+extern void omap243x_map_common_io(void);
+#else
+static inline void omap243x_map_common_io(void)
+{
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+extern void omap34xx_map_common_io(void);
+#else
+static inline void omap34xx_map_common_io(void)
+{
+}
+#endif
+
+#ifdef CONFIG_SOC_OMAPTI816X
+extern void omapti816x_map_common_io(void);
+#else
+static inline void omapti816x_map_common_io(void)
+{
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP4
+extern void omap44xx_map_common_io(void);
+#else
+static inline void omap44xx_map_common_io(void)
+{
+}
+#endif
+
+extern void omap2_init_common_infrastructure(void);
+
+extern struct sys_timer omap2_timer;
+extern struct sys_timer omap3_timer;
+extern struct sys_timer omap3_secure_timer;
+extern struct sys_timer omap4_timer;
+
+void omap2420_init_early(void);
+void omap2430_init_early(void);
+void omap3430_init_early(void);
+void omap35xx_init_early(void);
+void omap3630_init_early(void);
+void omap3_init_early(void);    /* Do not use this one */
+void am35xx_init_early(void);
+void ti816x_init_early(void);
+void omap4430_init_early(void);
+void omap_prcm_restart(char, const char *);
+
+/*
+ * IO bases for various OMAP processors
+ * Except the tap base, rest all the io bases
+ * listed are physical addresses.
+ */
+struct omap_globals {
+        u32             class;          /* OMAP class to detect */
+        void __iomem    *tap;           /* Control module ID code */
+        void __iomem    *sdrc;           /* SDRAM Controller */
+        void __iomem    *sms;            /* SDRAM Memory Scheduler */
+        void __iomem    *ctrl;           /* System Control Module */
+        void __iomem    *ctrl_pad;      /* PAD Control Module */
+        void __iomem    *prm;            /* Power and Reset Management */
+        void __iomem    *cm;             /* Clock Management */
+        void __iomem    *cm2;
+};
+
+void omap2_set_globals_242x(void);
+void omap2_set_globals_243x(void);
+void omap2_set_globals_3xxx(void);
+void omap2_set_globals_443x(void);
+void omap2_set_globals_ti816x(void);
+
+/* These get called from omap2_set_globals_xxxx(), do not call these */
+void omap2_set_globals_tap(struct omap_globals *);
+void omap2_set_globals_sdrc(struct omap_globals *);
+void omap2_set_globals_control(struct omap_globals *);
+void omap2_set_globals_prcm(struct omap_globals *);
+
+void omap242x_map_io(void);
+void omap243x_map_io(void);
+void omap3_map_io(void);
+void omap4_map_io(void);
+
+/**
+ * omap_test_timeout - busy-loop, testing a condition
+ * @cond: condition to test until it evaluates to true
+ * @timeout: maximum number of microseconds in the timeout
+ * @index: loop index (integer)
+ *
+ * Loop waiting for @cond to become true or until at least @timeout
+ * microseconds have passed.  To use, define some integer @index in the
+ * calling code.  After running, if @index == @timeout, then the loop has
+ * timed out.
+ */
+#define omap_test_timeout(cond, timeout, index)                 \
+({                                                              \
+        for (index = 0; index < timeout; index++) {             \
+                if (cond)                                       \
+                        break;                                  \
+                udelay(1);                                      \
+        }                                                       \
+})
+
+extern struct device *omap2_get_mpuss_device(void);
+extern struct device *omap2_get_iva_device(void);
+extern struct device *omap2_get_l3_device(void);
+extern struct device *omap4_get_dsp_device(void);
+
+void omap2_init_irq(void);
+void omap3_init_irq(void);
+void ti816x_init_irq(void);
+extern int omap_irq_pending(void);
+void omap_intc_save_context(void);
+void omap_intc_restore_context(void);
+void omap3_intc_suspend(void);
+void omap3_intc_prepare_idle(void);
+void omap3_intc_resume_idle(void);
+void omap2_intc_handle_irq(struct pt_regs *regs);
+void omap3_intc_handle_irq(struct pt_regs *regs);
+
+/*
+ * wfi used in low power code. Directly opcode is used instead
+ * of instruction to avoid mulit-omap build break
+ */
+#ifdef CONFIG_THUMB2_KERNEL
+#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
+#else
+#define do_wfi()                        \
+                __asm__ __volatile__ (".word    0xe320f003" : : : "memory")
+#endif
+
+#ifdef CONFIG_CACHE_L2X0
+extern void __iomem *l2cache_base;
+#endif
+
+extern void __init gic_init_irq(void);
+extern void omap_smc1(u32 fn, u32 arg);
+
+#ifdef CONFIG_SMP
+/* Needed for secondary core boot */
+extern void omap_secondary_startup(void);
+extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
+extern void omap_auxcoreboot_addr(u32 cpu_addr);
+extern u32 omap_read_auxcoreboot0(void);
+#endif
+
+#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index e34d27f8c49c..114c037e433c 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -15,7 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/sdrc.h>
 
 #include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 1fe35c24fba2..e20332f4abdc 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -24,6 +24,7 @@
 
 #include <linux/sched.h>
 #include <linux/cpuidle.h>
+#include <linux/export.h>
 
 #include <plat/prcm.h>
 #include <plat/irqs.h>
@@ -33,6 +34,7 @@
 
 #include "pm.h"
 #include "control.h"
+#include "common.h"
 
 #ifdef CONFIG_CPU_IDLE
 
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index adb2756e242f..bc6cf863a563 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -22,13 +22,41 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 #include <linux/err.h>
+#include <linux/delay.h>
 
 #include <video/omapdss.h>
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
+#include "common.h"
 
 #include "control.h"
+#include "display.h"
+
+#define DISPC_CONTROL           0x0040
+#define DISPC_CONTROL2          0x0238
+#define DISPC_IRQSTATUS         0x0018
+
+#define DSS_SYSCONFIG           0x10
+#define DSS_SYSSTATUS           0x14
+#define DSS_CONTROL             0x40
+#define DSS_SDI_CONTROL         0x44
+#define DSS_PLL_CONTROL         0x48
+
+#define LCD_EN_MASK             (0x1 << 0)
+#define DIGIT_EN_MASK           (0x1 << 1)
+
+#define FRAMEDONE_IRQ_SHIFT     0
+#define EVSYNC_EVEN_IRQ_SHIFT   2
+#define EVSYNC_ODD_IRQ_SHIFT    3
+#define FRAMEDONE2_IRQ_SHIFT    22
+#define FRAMEDONETV_IRQ_SHIFT   24
+
+/*
+ * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
+ *     reset before deciding that something has gone wrong
+ */
+#define FRAMEDONE_IRQ_TIMEOUT           100
 
 static struct platform_device omap_display_device = {
         .name          = "omapdss",
@@ -172,3 +200,135 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
 
         return r;
 }
+
+static void dispc_disable_outputs(void)
+{
+        u32 v, irq_mask = 0;
+        bool lcd_en, digit_en, lcd2_en = false;
+        int i;
+        struct omap_dss_dispc_dev_attr *da;
+        struct omap_hwmod *oh;
+
+        oh = omap_hwmod_lookup("dss_dispc");
+        if (!oh) {
+                WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
+                return;
+        }
+
+        if (!oh->dev_attr) {
+                pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
+                return;
+        }
+
+        da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
+
+        /* store value of LCDENABLE and DIGITENABLE bits */
+        v = omap_hwmod_read(oh, DISPC_CONTROL);
+        lcd_en = v & LCD_EN_MASK;
+        digit_en = v & DIGIT_EN_MASK;
+
+        /* store value of LCDENABLE for LCD2 */
+        if (da->manager_count > 2) {
+                v = omap_hwmod_read(oh, DISPC_CONTROL2);
+                lcd2_en = v & LCD_EN_MASK;
+        }
+
+        if (!(lcd_en | digit_en | lcd2_en))
+                return; /* no managers currently enabled */
+
+        /*
+         * If any manager was enabled, we need to disable it before
+         * DSS clocks are disabled or DISPC module is reset
+         */
+        if (lcd_en)
+                irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT;
+
+        if (digit_en) {
+                if (da->has_framedonetv_irq) {
+                        irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT;
+                } else {
+                        irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT |
+                                1 << EVSYNC_ODD_IRQ_SHIFT;
+                }
+        }
+
+        if (lcd2_en)
+                irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
+
+        /*
+         * clear any previous FRAMEDONE, FRAMEDONETV,
+         * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts
+         */
+        omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
+
+        /* disable LCD and TV managers */
+        v = omap_hwmod_read(oh, DISPC_CONTROL);
+        v &= ~(LCD_EN_MASK | DIGIT_EN_MASK);
+        omap_hwmod_write(v, oh, DISPC_CONTROL);
+
+        /* disable LCD2 manager */
+        if (da->manager_count > 2) {
+                v = omap_hwmod_read(oh, DISPC_CONTROL2);
+                v &= ~LCD_EN_MASK;
+                omap_hwmod_write(v, oh, DISPC_CONTROL2);
+        }
+
+        i = 0;
+        while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
+               irq_mask) {
+                i++;
+                if (i > FRAMEDONE_IRQ_TIMEOUT) {
+                        pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n");
+                        break;
+                }
+                mdelay(1);
+        }
+}
+
+#define MAX_MODULE_SOFTRESET_WAIT       10000
+int omap_dss_reset(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_opt_clk *oc;
+        int c = 0;
+        int i, r;
+
+        if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
+                pr_err("dss_core: hwmod data doesn't contain reset data\n");
+                return -EINVAL;
+        }
+
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+                if (oc->_clk)
+                        clk_enable(oc->_clk);
+
+        dispc_disable_outputs();
+
+        /* clear SDI registers */
+        if (cpu_is_omap3430()) {
+                omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
+                omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
+        }
+
+        /*
+         * clear DSS_CONTROL register to switch DSS clock sources to
+         * PRCM clock, if any
+         */
+        omap_hwmod_write(0x0, oh, DSS_CONTROL);
+
+        omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
+                                & SYSS_RESETDONE_MASK),
+                        MAX_MODULE_SOFTRESET_WAIT, c);
+
+        if (c == MAX_MODULE_SOFTRESET_WAIT)
+                pr_warning("dss_core: waiting for reset to finish failed\n");
+        else
+                pr_debug("dss_core: softreset done\n");
+
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+                if (oc->_clk)
+                        clk_disable(oc->_clk);
+
+        r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+        return r;
+}
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
new file mode 100644
index 000000000000..b871b017b352
--- /dev/null
+++ b/arch/arm/mach-omap2/display.h
@@ -0,0 +1,29 @@
+/*
+ * display.h - OMAP2+ integration-specific DSS header
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_DISPLAY_H
+#define __ARCH_ARM_MACH_OMAP2_DISPLAY_H
+
+#include <linux/kernel.h>
+
+struct omap_dss_dispc_dev_attr {
+        u8      manager_count;
+        bool    has_framedonetv_irq;
+};
+
+#endif
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index ace99944e96f..a12e224eb97d 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -21,7 +21,7 @@
 
 #include <plat/cpu.h>
 #include <plat/i2c.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/omap_hwmod.h>
 
 #include "mux.h"
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 7f47092a193f..27ad722df637 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -21,7 +21,7 @@
 
 #include <asm/cputype.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/cpu.h>
 
 #include <mach/id.h>
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index feb90a10945a..56964a0c4c7e 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -10,146 +10,9 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/io.h>
-#include <mach/irqs.h>
-#include <asm/hardware/gic.h>
-
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-
-#include <plat/multi.h>
-
-#define OMAP2_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
-#define OMAP3_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
-#define OMAP4_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
-#define INTCPS_SIR_IRQ_OFFSET   0x0040  /* omap2/3 active interrupt offset */
-#define ACTIVEIRQ_MASK          0x7f    /* omap2/3 active interrupt bits */
 
                 .macro  disable_fiq
                 .endm
 
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-/*
- * Unoptimized irq functions for multi-omap2, 3 and 4
- */
-
-#ifdef MULTI_OMAP2
-                /*
-                 * Configure the interrupt base on the first interrupt.
-                 * See also omap_irq_base_init for setting omap_irq_base.
-                 */
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =omap_irq_base   @ irq base address
-                ldr     \base, [\base, #0]      @ irq base value
-                .endm
-
-                /* Check the pending interrupts. Note that base already set */
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                tst     \base, #0x100           @ gic address?
-                bne     4401f                   @ found gic
-
-                /* Handle omap2 and omap3 */
-                ldr     \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
-                cmp     \irqnr, #0x0
-                bne     9998f
-                ldr     \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
-                cmp     \irqnr, #0x0
-                bne     9998f
-                ldr     \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
-                cmp     \irqnr, #0x0
-                bne     9998f
-
-                /*
-                 * ti816x has additional IRQ pending register. Checking this
-                 * register on omap2 & omap3 has no effect (read as 0).
-                 */
-                ldr     \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
-                cmp     \irqnr, #0x0
-9998:
-                ldrne   \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
-                and     \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
-                b       9999f
-
-                /* Handle omap4 */
-4401:           ldr     \irqstat, [\base, #GIC_CPU_INTACK]
-                ldr     \tmp, =1021
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #15
-                cmpcc   \irqnr, \irqnr
-                cmpne   \irqnr, \tmp
-                cmpcs   \irqnr, \irqnr
-9999:
-                .endm
-
-#ifdef CONFIG_SMP
-                /* We assume that irqstat (the raw value of the IRQ acknowledge
-                 * register) is preserved from the macro above.
-                 * If there is an IPI, we immediately signal end of interrupt
-                 * on the controller, since this requires the original irqstat
-                 * value which we won't easily be able to recreate later.
-                 */
-
-                .macro test_for_ipi, irqnr, irqstat, base, tmp
-                bic     \irqnr, \irqstat, #0x1c00
-                cmp     \irqnr, #16
-                it      cc
-                strcc   \irqstat, [\base, #GIC_CPU_EOI]
-                it      cs
-                cmpcs   \irqnr, \irqnr
-                .endm
-#endif  /* CONFIG_SMP */
-
-#else   /* MULTI_OMAP2 */
-
-
-/*
- * Optimized irq functions for omap2, 3 and 4
- */
-
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-                .macro  get_irqnr_preamble, base, tmp
-#ifdef CONFIG_ARCH_OMAP2
-                ldr     \base, =OMAP2_IRQ_BASE
-#else
-                ldr     \base, =OMAP3_IRQ_BASE
-#endif
-                .endm
-
-                /* Check the pending interrupts. Note that base already set */
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqnr, [\base, #0x98] /* IRQ pending reg 1 */
-                cmp     \irqnr, #0x0
-                bne     9999f
-                ldr     \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */
-                cmp     \irqnr, #0x0
-                bne     9999f
-                ldr     \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
-                cmp     \irqnr, #0x0
-#ifdef CONFIG_SOC_OMAPTI816X
-                bne     9999f
-                ldr     \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
-                cmp     \irqnr, #0x0
-#endif
-9999:
-                ldrne   \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
-                and     \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
-
-                .endm
-#endif
-
-
-#ifdef CONFIG_ARCH_OMAP4
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =OMAP4_IRQ_BASE
-                .endm
-
-#endif
-
-#endif  /* MULTI_OMAP2 */
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h
deleted file mode 100644
index e4bd87619734..000000000000
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * omap4-common.h: OMAP4 specific common header file
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- *
- * Author:
- *      Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef OMAP_ARCH_OMAP4_COMMON_H
-#define OMAP_ARCH_OMAP4_COMMON_H
-
-/*
- * wfi used in low power code. Directly opcode is used instead
- * of instruction to avoid mulit-omap build break
- */
-#ifdef CONFIG_THUMB2_KERNEL
-#define do_wfi() __asm__ __volatile__ ("wfi" : : : "memory")
-#else
-#define do_wfi()                        \
-                __asm__ __volatile__ (".word    0xe320f003" : : : "memory")
-#endif
-
-#ifdef CONFIG_CACHE_L2X0
-extern void __iomem *l2cache_base;
-#endif
-
-extern void __iomem *gic_dist_base_addr;
-
-extern void __init gic_init_irq(void);
-extern void omap_smc1(u32 fn, u32 arg);
-
-#ifdef CONFIG_SMP
-/* Needed for secondary core boot */
-extern void omap_secondary_startup(void);
-extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
-extern void omap_auxcoreboot_addr(u32 cpu_addr);
-extern u32 omap_read_auxcoreboot0(void);
-#endif
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/vmalloc.h b/arch/arm/mach-omap2/include/mach/vmalloc.h
deleted file mode 100644
index 866319947760..000000000000
--- a/arch/arm/mach-omap2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/plat-omap/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#define VMALLOC_END       0xf8000000UL
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 25d20ced03e1..3f565dd2ea8d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -35,7 +35,7 @@
 #include "clock3xxx.h"
 #include "clock44xx.h"
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/omap-pm.h>
 #include "voltage.h"
 #include "powerdomain.h"
@@ -43,7 +43,7 @@
 #include "clockdomain.h"
 #include <plat/omap_hwmod.h>
 #include <plat/multi.h>
-#include <plat/common.h>
+#include "common.h"
 
 /*
  * The machine specific code may provide the extra mapping besides the
@@ -316,13 +316,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
 
-/* See irq.c, omap4-common.c and entry-macro.S */
-void __iomem *omap_irq_base;
-
 static void __init omap_common_init_early(void)
 {
         omap2_check_revision();
-        omap_ioremap_init();
         omap_init_consistent_dma_size();
 }
 
diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-omap2/io.h
+++ /dev/null
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 65f1be6a182c..42b1d6591912 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -15,6 +15,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
+#include <asm/exception.h>
 #include <asm/mach/irq.h>
 
 
@@ -35,6 +36,11 @@
 /* Number of IRQ state bits in each MIR register */
 #define IRQ_BITS_PER_REG        32
 
+#define OMAP2_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP3_IRQ_BASE          OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
+#define INTCPS_SIR_IRQ_OFFSET   0x0040  /* omap2/3 active interrupt offset */
+#define ACTIVEIRQ_MASK          0x7f    /* omap2/3 active interrupt bits */
+
 /*
  * OMAP2 has a number of different interrupt controllers, each interrupt
  * controller is identified as its own "bank". Register definitions are
@@ -143,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
 
 static void __init omap_init_irq(u32 base, int nr_irqs)
 {
+        void __iomem *omap_irq_base;
         unsigned long nr_of_irqs = 0;
         unsigned int nr_banks = 0;
         int i, j;
@@ -191,6 +198,44 @@ void __init ti816x_init_irq(void)
         omap_init_irq(OMAP34XX_IC_BASE, 128);
 }
 
+static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs *regs)
+{
+        u32 irqnr;
+
+        do {
+                irqnr = readl_relaxed(base_addr + 0x98);
+                if (irqnr)
+                        goto out;
+
+                irqnr = readl_relaxed(base_addr + 0xb8);
+                if (irqnr)
+                        goto out;
+
+                irqnr = readl_relaxed(base_addr + 0xd8);
+#ifdef CONFIG_SOC_OMAPTI816X
+                if (irqnr)
+                        goto out;
+                irqnr = readl_relaxed(base_addr + 0xf8);
+#endif
+
+out:
+                if (!irqnr)
+                        break;
+
+                irqnr = readl_relaxed(base_addr + INTCPS_SIR_IRQ_OFFSET);
+                irqnr &= ACTIVEIRQ_MASK;
+
+                if (irqnr)
+                        handle_IRQ(irqnr, regs);
+        } while (irqnr);
+}
+
+asmlinkage void __exception_irq_entry omap2_intc_handle_irq(struct pt_regs *regs)
+{
+        void __iomem *base_addr = OMAP2_IRQ_BASE;
+        omap_intc_handle_irq(base_addr, regs);
+}
+
 #ifdef CONFIG_ARCH_OMAP3
 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
 
@@ -263,4 +308,10 @@ void omap3_intc_resume_idle(void)
         /* Re-enable autoidle */
         intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
 }
+
+asmlinkage void __exception_irq_entry omap3_intc_handle_irq(struct pt_regs *regs)
+{
+        void __iomem *base_addr = OMAP3_IRQ_BASE;
+        omap_intc_handle_irq(base_addr, regs);
+}
 #endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 292eee3be15f..28fcb27005d2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                 pdata->reg_size = 4;
                 pdata->has_ccr = true;
         }
+        pdata->set_clk_src = omap2_mcbsp_set_clk_src;
+        if (id == 1)
+                pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
 
         if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
                 if (id == 2)
@@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
                                         name, oh->name);
                 return PTR_ERR(pdev);
         }
-        pdata->set_clk_src = omap2_mcbsp_set_clk_src;
-        if (id == 1)
-                pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
         omap_mcbsp_count++;
         return 0;
 }
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index 4976b9393e49..e5a1c3f40a86 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -19,7 +19,8 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
-#include <mach/omap4-common.h>
+
+#include "common.h"
 
 int platform_cpu_kill(unsigned int cpu)
 {
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 4412ddb7b3f6..e99bc6cd4714 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -24,7 +24,8 @@
 #include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
 #include <mach/hardware.h>
-#include <mach/omap4-common.h>
+
+#include "common.h"
 
 /* SCU base address */
 static void __iomem *scu_base;
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 35ac3e5f6e94..beecfdd56ea3 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -22,17 +22,18 @@
 #include <plat/irqs.h>
 
 #include <mach/hardware.h>
-#include <mach/omap4-common.h>
+
+#include "common.h"
 
 #ifdef CONFIG_CACHE_L2X0
 void __iomem *l2cache_base;
 #endif
 
-void __iomem *gic_dist_base_addr;
-
-
 void __init gic_init_irq(void)
 {
+        void __iomem *omap_irq_base;
+        void __iomem *gic_dist_base_addr;
+
         /* Static mapping, never released */
         gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
         BUG_ON(!gic_dist_base_addr);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6b3088db83b7..529142aff766 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -137,7 +137,7 @@
 #include <linux/mutex.h>
 #include <linux/spinlock.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/cpu.h>
 #include "clockdomain.h"
 #include "powerdomain.h"
@@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh)
                 ohii = &oh->mpu_irqs[i++];
         } while (ohii->irq != -1);
 
-        return i;
+        return i-1;
 }
 
 /**
@@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh)
                 ohdi = &oh->sdma_reqs[i++];
         } while (ohdi->dma_req != -1);
 
-        return i;
+        return i-1;
 }
 
 /**
@@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
                 mem = &os->addr[i++];
         } while (mem->pa_start != mem->pa_end);
 
-        return i;
+        return i-1;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 6d7206213525..a5409ce3f323 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -875,6 +875,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
         { .role = "tv_clk", .clk = "dss_54m_fck" },
         { .role = "sys_clk", .clk = "dss2_fck" },
 };
@@ -899,7 +903,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_slaves),
         .masters        = omap2420_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap2420_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 
 /* l4_core -> dss_dispc */
@@ -939,6 +943,7 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
         .slaves         = omap2420_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_dispc_slaves),
         .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 
 /* l4_core -> dss_rfbi */
@@ -961,6 +966,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
         &omap2420_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap2_rfbi_hwmod_class,
@@ -972,6 +981,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
                         .module_offs = CORE_MOD,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap2420_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -981,7 +992,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
         .master         = &omap2420_l4_core_hwmod,
         .slave          = &omap2420_dss_venc_hwmod,
-        .clk            = "dss_54m_fck",
+        .clk            = "dss_ick",
         .addr           = omap2_dss_venc_addrs,
         .fw = {
                 .omap2 = {
@@ -1001,7 +1012,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
 static struct omap_hwmod omap2420_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_fck",
+        .main_clk       = "dss_54m_fck",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index a2580d01c3ff..c4f56cb60d7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -942,6 +942,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
         { .role = "tv_clk", .clk = "dss_54m_fck" },
         { .role = "sys_clk", .clk = "dss2_fck" },
 };
@@ -966,7 +970,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_slaves),
         .masters        = omap2430_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap2430_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 
 /* l4_core -> dss_dispc */
@@ -1000,6 +1004,7 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
         .slaves         = omap2430_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_dispc_slaves),
         .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 
 /* l4_core -> dss_rfbi */
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
         &omap2430_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
                         .module_offs = CORE_MOD,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap2430_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -1036,7 +1047,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
         .master         = &omap2430_l4_core_hwmod,
         .slave          = &omap2430_dss_venc_hwmod,
-        .clk            = "dss_54m_fck",
+        .clk            = "dss_ick",
         .addr           = omap2_dss_venc_addrs,
         .flags          = OCPIF_SWSUP_IDLE,
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
@@ -1050,7 +1061,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
 static struct omap_hwmod omap2430_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_fck",
+        .main_clk       = "dss_54m_fck",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c451729d289a..c11273da5dcc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,6 +11,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
 #include <plat/dma.h>
+#include <plat/common.h>
 
 #include <mach/irqs.h>
 
@@ -43,13 +44,15 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
         .rev_offs       = 0x0000,
         .sysc_offs      = 0x0010,
         .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
 struct omap_hwmod_class omap2_dss_hwmod_class = {
         .name   = "dss",
         .sysc   = &omap2_dss_sysc,
+        .reset  = omap_dss_reset,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index bc9035ec87fc..eef43e2e163e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
-        { .role = "tv_clk", .clk = "dss_tv_fck" },
-        { .role = "video_clk", .clk = "dss_96m_fck" },
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
         { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+        { .role = "tv_clk", .clk = "dss_tv_fck" },
+        /* required only on OMAP3430 */
+        { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
 };
 
 static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3430es1_dss_slaves),
         .masters        = omap3xxx_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 
 static struct omap_hwmod omap3xxx_dss_core_hwmod = {
         .name           = "dss_core",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .class          = &omap2_dss_hwmod_class,
         .main_clk       = "dss1_alwon_fck", /* instead of dss_fck */
         .sdma_reqs      = omap3xxx_dss_sdma_chs,
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
         .slaves         = omap3xxx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
         .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 
 /*
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_dsi1_hwmod,
+        .clk            = "dss_ick",
         .addr           = omap3xxx_dss_dsi1_addrs,
         .fw = {
                 .omap2 = {
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
         &omap3xxx_l4_core__dss_dsi1,
 };
 
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+};
+
 static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
         .name           = "dss_dsi1",
         .class          = &omap3xxx_dsi_hwmod_class,
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
                         .module_offs = OMAP3430_DSS_MOD,
                 },
         },
+        .opt_clks       = dss_dsi1_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_opt_clks),
         .slaves         = omap3xxx_dss_dsi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
         &omap3xxx_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
         .name           = "dss_rfbi",
         .class          = &omap2_rfbi_hwmod_class,
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
                         .module_offs = OMAP3430_DSS_MOD,
                 },
         },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap3xxx_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
         .master         = &omap3xxx_l4_core_hwmod,
         .slave          = &omap3xxx_dss_venc_hwmod,
-        .clk            = "dss_tv_fck",
+        .clk            = "dss_ick",
         .addr           = omap2_dss_venc_addrs,
         .fw = {
                 .omap2 = {
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
         &omap3xxx_l4_core__dss_venc,
 };
 
+static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
+        /* required only on OMAP3430 */
+        { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
+};
+
 static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_alwon_fck",
+        .main_clk       = "dss_tv_fck",
         .prcm           = {
                 .omap2 = {
                         .prcm_reg_id = 1,
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
                         .module_offs = OMAP3430_DSS_MOD,
                 },
         },
+        .opt_clks       = dss_venc_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_venc_opt_clks),
         .slaves         = omap3xxx_dss_venc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
         .flags          = HWMOD_NO_IDLEST,
@@ -3220,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 
 /* 3430ES1-only hwmods */
 static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
-        &omap3xxx_iva_hwmod,
         &omap3430es1_dss_core_hwmod,
-        &omap3xxx_mailbox_hwmod,
         NULL
 };
 
 /* 3430ES2+-only hwmods */
 static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
-        &omap3xxx_iva_hwmod,
         &omap3xxx_dss_core_hwmod,
         &omap3xxx_usbhsotg_hwmod,
-        &omap3xxx_mailbox_hwmod,
         NULL
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7695e5d43316..daaf165af696 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,6 +30,7 @@
 #include <plat/mmc.h>
 #include <plat/i2c.h>
 #include <plat/dmtimer.h>
+#include <plat/common.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
 static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
         .name   = "dss",
         .sysc   = &omap44xx_dss_sysc,
+        .reset  = omap_dss_reset,
 };
 
 /* dss */
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
         { .role = "sys_clk", .clk = "dss_sys_clk" },
         { .role = "tv_clk", .clk = "dss_tv_clk" },
-        { .role = "dss_clk", .clk = "dss_dss_clk" },
-        { .role = "video_clk", .clk = "dss_48mhz_clk" },
+        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
 };
 
 static struct omap_hwmod omap44xx_dss_hwmod = {
         .name           = "dss_core",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
         .class          = &omap44xx_dss_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
         .main_clk       = "dss_dss_clk",
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
         { }
 };
 
+static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
+        .manager_count          = 3,
+        .has_framedonetv_irq    = 1
+};
+
 /* l4_per -> dss_dispc */
 static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
         .master         = &omap44xx_l4_per_hwmod,
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
         &omap44xx_l4_per__dss_dispc,
 };
 
-static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
-        { .role = "sys_clk", .clk = "dss_sys_clk" },
-        { .role = "tv_clk", .clk = "dss_tv_clk" },
-        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
-};
-
 static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
         .name           = "dss_dispc",
         .class          = &omap44xx_dispc_hwmod_class,
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
                         .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
                 },
         },
-        .opt_clks       = dss_dispc_opt_clks,
-        .opt_clks_cnt   = ARRAY_SIZE(dss_dispc_opt_clks),
         .slaves         = omap44xx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
+        .dev_attr       = &omap44xx_dss_dispc_dev_attr
 };
 
 /*
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
         .clkdm_name     = "l3_dss_clkdm",
         .mpu_irqs       = omap44xx_dss_hdmi_irqs,
         .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
-        .main_clk       = "dss_dss_clk",
+        .main_clk       = "dss_48mhz_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
         .name           = "dss_venc",
         .class          = &omap44xx_venc_hwmod_class,
         .clkdm_name     = "l3_dss_clkdm",
-        .main_clk       = "dss_dss_clk",
+        .main_clk       = "dss_tv_clk",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index de832ebc93a9..51e5418899fb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
         .srst_shift     = SYSC_TYPE2_SOFTRESET_SHIFT,
 };
 
+struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
+        .manager_count          = 2,
+        .has_framedonetv_irq    = 0
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 39a7c37f4587..ad5d8f04c0b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -16,6 +16,8 @@
 
 #include <plat/omap_hwmod.h>
 
+#include "display.h"
+
 /* Common address space across OMAP2xxx */
 extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
 extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
@@ -111,4 +113,6 @@ extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
 extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
 extern struct omap_hwmod_class omap2xxx_mcspi_class;
 
+extern struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr;
+
 #endif
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 6a66aa5e2a5b..d15225ff5c49 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev)
 static const struct of_device_id l3_noc_match[] = {
         {.compatible = "ti,omap4-l3-noc", },
         {},
-}
+};
 MODULE_DEVICE_TABLE(of, l3_noc_match);
 #else
 #define l3_noc_match NULL
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1e79bdf313e3..1881fe915149 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -18,12 +18,13 @@
 
 #include <plat/omap-pm.h>
 #include <plat/omap_device.h>
-#include <plat/common.h>
+#include "common.h"
 
 #include "voltage.h"
 #include "powerdomain.h"
 #include "clockdomain.h"
 #include "pm.h"
+#include "twl-common.h"
 
 static struct omap_device_pm_latency *pm_lats;
 
@@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init);
 
 static int __init omap2_common_pm_late_init(void)
 {
-        /* Init the OMAP TWL parameters */
-        omap3_twl_init();
-        omap4_twl_init();
-
         /* Init the voltage layer */
+        omap_pmic_late_init();
         omap_voltage_late_init();
 
         /* Initialize the voltages */
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index cf0c216132ab..ef8595c80296 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -42,6 +42,7 @@
 #include <plat/dma.h>
 #include <plat/board.h>
 
+#include "common.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
 #include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index efa66494c1e3..fa637dfdda53 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -42,6 +42,7 @@
 #include <plat/gpmc.h>
 #include <plat/dma.h>
 
+#include "common.h"
 #include "cm2xxx_3xxx.h"
 #include "cm-regbits-34xx.h"
 #include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 59a870be8390..8edb015f5618 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,8 +16,8 @@
 #include <linux/err.h>
 #include <linux/slab.h>
 
+#include "common.h"
 #include "powerdomain.h"
-#include <mach/omap4-common.h>
 
 struct power_state {
         struct powerdomain *pwrdm;
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 597e2da831b3..626acfad7190 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -25,8 +25,7 @@
 #include <linux/delay.h>
 #include <linux/export.h>
 
-#include <mach/system.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/prcm.h>
 #include <plat/irqs.h>
 
@@ -59,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void)
 EXPORT_SYMBOL(omap_prcm_get_reset_sources);
 
 /* Resets clock rates and reboots the system. Only called from system.h */
-static void omap_prcm_arch_reset(char mode, const char *cmd)
+void omap_prcm_restart(char mode, const char *cmd)
 {
         s16 prcm_offs = 0;
 
@@ -110,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd)
         omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
 }
 
-void (*arch_reset)(char, const char *) = omap_prcm_arch_reset;
-
 /**
  * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
  * @reg: physical address of module IDLEST register
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index 171fe171a749..ca669b50f390 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -15,7 +15,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prcm_mpu44xx.h"
 #include "cm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index f02d87f68e54..9a08ba397327 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -16,7 +16,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/cpu.h>
 #include <plat/prcm.h>
 
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 495a31a7e8a7..dd885eecf22a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -17,7 +17,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/cpu.h>
 #include <plat/prcm.h>
 
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 3a7bab16edd5..f6de5bc6b12a 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -16,7 +16,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm44xx.h"
 #include "prminst44xx.h"
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 14caa228bc0d..ee3a8ad304cb 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,7 +18,7 @@
 #include <linux/io.h>
 
 #include <plat/io.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/clock.h>
 #include <plat/sdrc.h>
 
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 8f2782874771..e3d345f46409 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -23,7 +23,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/clock.h>
 #include <plat/sram.h>
 
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index ccdb010f169d..791a63cdceb2 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,7 +24,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/clock.h>
 #include <plat/sram.h>
 
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 9992dbfdfdb3..42c326732a29 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -33,7 +33,7 @@
 #include <plat/omap-serial.h>
 #endif
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/board.h>
 #include <plat/clock.h>
 #include <plat/dma.h>
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 6a4f6839a7d9..9dd93453e563 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -26,7 +26,7 @@
 #include <linux/slab.h>
 #include <linux/pm_runtime.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "pm.h"
 #include "smartreflex.h"
@@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
                 sr_write_reg(sr_info, ERRCONFIG_V1, status);
         } else if (sr_info->ip_type == SR_TYPE_V2) {
                 /* Read the status bits */
-                sr_read_reg(sr_info, IRQSTATUS);
+                status = sr_read_reg(sr_info, IRQSTATUS);
 
                 /* Clear them by writing back */
                 sr_write_reg(sr_info, IRQSTATUS, status);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 037b0d7d4e05..6eeff0e0ae01 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -41,7 +41,7 @@
 #include <plat/dmtimer.h>
 #include <asm/localtimer.h>
 #include <asm/sched_clock.h>
-#include <plat/common.h>
+#include "common.h"
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
@@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc;
 /*
  * clocksource
  */
-static DEFINE_CLOCK_DATA(cd);
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
         return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
@@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void notrace dmtimer_update_sched_clock(void)
+static u32 notrace dmtimer_read_sched_clock(void)
 {
-        u32 cyc;
-
-        cyc = __omap_dm_timer_read_counter(&clksrc, 1);
-
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = 0;
-
         if (clksrc.reserved)
-                cyc = __omap_dm_timer_read_counter(&clksrc, 1);
+                return __omap_dm_timer_read_counter(clksrc.io_base, 1);
 
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+        return 0;
 }
 
 /* Setup free-running counter for clocksource */
@@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
 
         __omap_dm_timer_load_start(&clksrc,
                         OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
-        init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
+        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
                 pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 522435772168..10b20c652e5d 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -30,6 +30,7 @@
 #include <plat/usb.h>
 
 #include "twl-common.h"
+#include "pm.h"
 
 static struct i2c_board_info __initdata pmic_i2c_board_info = {
         .addr           = 0x48,
@@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate,
         omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
 }
 
+void __init omap_pmic_late_init(void)
+{
+        /* Init the OMAP TWL parameters (if PMIC has been registerd) */
+        if (!pmic_i2c_board_info.irq)
+                return;
+
+        omap3_twl_init();
+        omap4_twl_init();
+}
+
 #if defined(CONFIG_ARCH_OMAP3)
 static struct twl4030_usb_data omap3_usb_pdata = {
         .usb_mode       = T2_USB_MODE_ULPI,
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 5e83a5bd37fb..275dde8cb27a 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -1,6 +1,8 @@
 #ifndef __OMAP_PMIC_COMMON__
 #define __OMAP_PMIC_COMMON__
 
+#include <plat/irqs.h>
+
 #define TWL_COMMON_PDATA_USB            (1 << 0)
 #define TWL_COMMON_PDATA_BCI            (1 << 1)
 #define TWL_COMMON_PDATA_MADC           (1 << 2)
@@ -30,6 +32,7 @@ struct twl4030_platform_data;
 
 void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
                     struct twl4030_platform_data *pmic_data);
+void omap_pmic_late_init(void);
 
 static inline void omap2_pmic_init(const char *pmic_type,
                                    struct twl4030_platform_data *pmic_data)
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index cfe348e1af0e..a5ec7f8f2ea8 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm-regbits-34xx.h"
 #include "voltage.h"
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 2740a968145e..d70b930f2739 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 1f8fdf736e63..8a36342e60d2 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -27,7 +27,7 @@
 #include <linux/slab.h>
 #include <linux/clk.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm-regbits-34xx.h"
 #include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 071101debbbc..474559d5b072 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 #include <plat/cpu.h>
 
 #include "prm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index c4584e9ac717..4e11d022595d 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -21,7 +21,7 @@
 #include <linux/err.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm-regbits-44xx.h"
 #include "prm44xx.h"
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 66bd700a2b98..807391d84a9d 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -1,7 +1,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "voltage.h"
 #include "vp.h"
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index 260c554b1547..bd89f80089f5 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -19,7 +19,7 @@
 #include <linux/err.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm-regbits-34xx.h"
 #include "voltage.h"
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index b4e77044891e..8c031d16879e 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -19,7 +19,7 @@
 #include <linux/err.h>
 #include <linux/init.h>
 
-#include <plat/common.h>
+#include "common.h"
 
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 22ace0bf2f92..41127e80cc1e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -18,6 +18,7 @@
 #include <linux/mbus.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/ata_platform.h>
+#include <linux/delay.h>
 #include <net/dsa.h>
 #include <asm/page.h>
 #include <asm/setup.h>
@@ -304,6 +305,17 @@ void __init orion5x_init(void)
         orion5x_wdt_init();
 }
 
+void orion5x_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable and issue soft reset
+         */
+        orion5x_setbits(RSTOUTn_MASK, (1 << 2));
+        orion5x_setbits(CPU_SOFT_RESET, 1);
+        mdelay(200);
+        orion5x_clrbits(CPU_SOFT_RESET, 1);
+}
+
 /*
  * Many orion-based systems have buggy bootloader implementations.
  * This is a common fixup for bogus memory tags.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 909489f4d23e..37ef18de61b7 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -39,6 +39,7 @@ void orion5x_spi_init(void);
 void orion5x_uart0_init(void);
 void orion5x_uart1_init(void);
 void orion5x_xor_init(void);
+void orion5x_restart(char, const char *);
 
 /*
  * PCIe/PCI functions.
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 8c8300951f46..d75dcfa0f01c 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -343,6 +343,7 @@ MACHINE_START(D2NET, "LaCie d2 Network")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
 
@@ -355,6 +356,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 4b79a80d5e1f..a104d5a80e11 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 343f60e9639f..91b0f4788597 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -736,4 +736,5 @@ MACHINE_START(DNS323, "D-Link DNS-323")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 70a4e9265f06..355e962137c7 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -258,4 +258,5 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index c5196101a237..e9d9afdc2659 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -15,31 +15,6 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 
-static inline void __iomem *
-__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype)
-{
-        void __iomem *retval;
-        unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE;
-        if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE &&
-            size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) {
-                retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs;
-        } else {
-                retval = __arm_ioremap(paddr, size, mtype);
-        }
-
-        return retval;
-}
-
-static inline void
-__arch_iounmap(void __iomem *addr)
-{
-        if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE ||
-            addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE))
-                __iounmap(addr);
-}
-
-#define __arch_ioremap          __arch_ioremap
-#define __arch_iounmap          __arch_iounmap
 #define __io(a)                 __typesafe_io(a)
 #define __mem_pci(a)            (a)
 
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
index a1d6e46ab035..825a2650cefa 100644
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ b/arch/arm/mach-orion5x/include/mach/system.h
@@ -11,23 +11,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable and issue soft reset
-         */
-        orion5x_setbits(RSTOUTn_MASK, (1 << 2));
-        orion5x_setbits(CPU_SOFT_RESET, 1);
-        mdelay(200);
-        orion5x_clrbits(CPU_SOFT_RESET, 1);
-}
-
-
 #endif
diff --git a/arch/arm/mach-orion5x/include/mach/vmalloc.h b/arch/arm/mach-orion5x/include/mach/vmalloc.h
deleted file mode 100644
index 06b50aeff7b9..000000000000
--- a/arch/arm/mach-orion5x/include/mach/vmalloc.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/vmalloc.h
- */
-
-#define VMALLOC_END       0xfd800000UL
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index d3cd3f63258a..47587b832842 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -386,6 +386,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
 
@@ -399,5 +400,6 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 9503fff404e3..527213169db0 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -140,7 +140,7 @@ static struct mv_sata_platform_data lschl_sata_data = {
 
 static void lschl_power_off(void)
 {
-        arm_machine_restart('h', NULL);
+        orion5x_restart('h', NULL);
 }
 
 /*****************************************************************************
@@ -325,4 +325,5 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index ed6d772f4a24..9a8697b97dd7 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = {
 
 static void ls_hgl_power_off(void)
 {
-        arm_machine_restart('h', NULL);
+        orion5x_restart('h', NULL);
 }
 
 
@@ -272,4 +272,5 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 743f7f1db181..09c73659f467 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
 
 static void lsmini_power_off(void)
 {
-        arm_machine_restart('h', NULL);
+        orion5x_restart('h', NULL);
 }
 
 
@@ -274,5 +274,6 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 6020e26b1c71..65faaa34de61 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -267,5 +267,6 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
-        .fixup          = tag_fixup_mem32
+        .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 201ae3676289..c87fde4deeca 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -234,5 +234,6 @@ MACHINE_START(MV2120, "HP Media Vault mv2120")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
-        .fixup          = tag_fixup_mem32
+        .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 6197c79a2ecb..0180c393c711 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -426,5 +426,6 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index ebd6767d8e88..292038fc59fd 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -175,4 +175,5 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 05db2d336b08..c44eabaabc16 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -187,4 +187,5 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index e47fa0578ae3..96438b6b2022 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -311,4 +311,5 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 64317251ec00..2c5fab00d205 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -128,4 +128,5 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 29f1526f7b70..632a861ef82b 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 31e51f9b4b64..5d6408745582 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -178,7 +178,7 @@ static struct hw_pci qnap_ts209_pci __initdata = {
 
 static int __init qnap_ts209_pci_init(void)
 {
-        if (machine_is_ts_x09())
+        if (machine_is_ts209())
                 pci_common_init(&qnap_ts209_pci);
 
         return 0;
@@ -329,4 +329,5 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 0fbcc14e09d7..4e6ff759cd32 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -318,4 +318,5 @@ MACHINE_START(TS409, "QNAP TS-409")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b35e2005a348..c96f37472eda 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -627,4 +627,5 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index b8be7d8d0cf4..078c03f7cd52 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -179,4 +179,5 @@ MACHINE_START(WNR854T, "Netgear WNR854T")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index faf81a039360..46a9778171ce 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -267,4 +267,5 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 34d08347be5f..ad871bd7b1ab 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -11,6 +11,7 @@
 #include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach/arch.h>
@@ -33,22 +34,20 @@ static const char *picoxcell_dt_match[] = {
 };
 
 static const struct of_device_id vic_of_match[] __initconst = {
-        { .compatible = "arm,pl192-vic" },
+        { .compatible = "arm,pl192-vic", .data = vic_of_init, },
         { /* Sentinel */ }
 };
 
 static void __init picoxcell_init_irq(void)
 {
-        vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0);
-        vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
-        irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
-        irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
+        of_irq_init(vic_of_match);
 }
 
 DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
         .map_io         = picoxcell_map_io,
         .nr_irqs        = ARCH_NR_IRQS,
         .init_irq       = picoxcell_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &picoxcell_timer,
         .init_machine   = picoxcell_init_machine,
         .dt_compat      = picoxcell_dt_match,
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
index a6b09f75d9df..9b505ac00be9 100644
--- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S
+++ b/arch/arm/mach-picoxcell/include/mach/entry-macro.S
@@ -9,11 +9,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-#include <mach/map.h>
+        .macro  disable_fiq
+        .endm
 
-#define VA_VIC0         IO_ADDRESS(PICOXCELL_VIC0_BASE)
-#define VA_VIC1         IO_ADDRESS(PICOXCELL_VIC1_BASE)
-
-#include <asm/entry-macro-vic2.S>
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
index 67c589b0c1bc..1a5d8cb57df4 100644
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ b/arch/arm/mach-picoxcell/include/mach/system.h
@@ -23,9 +23,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(int mode, const char *cmd)
-{
-        /* Watchdog reset to go here. */
-}
-
 #endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/vmalloc.h b/arch/arm/mach-picoxcell/include/mach/vmalloc.h
deleted file mode 100644
index 0216cc4b1f0b..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/vmalloc.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#define VMALLOC_END     0xfe000000UL
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c
index 90a554ff4499..6c89cf8ab22e 100644
--- a/arch/arm/mach-picoxcell/time.c
+++ b/arch/arm/mach-picoxcell/time.c
@@ -11,7 +11,6 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
-#include <linux/sched.h>
 
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
@@ -66,21 +65,11 @@ static void picoxcell_add_clocksource(struct device_node *source_timer)
         dw_apb_clocksource_register(cs);
 }
 
-static DEFINE_CLOCK_DATA(cd);
 static void __iomem *sched_io_base;
 
-unsigned long long notrace sched_clock(void)
+unsigned u32 notrace picoxcell_read_sched_clock(void)
 {
-        cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
-
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace picoxcell_update_sched_clock(void)
-{
-        cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
-
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return __raw_readl(sched_io_base);
 }
 
 static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
@@ -100,7 +89,7 @@ static void picoxcell_init_sched_clock(void)
         timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
         of_node_put(sched_timer);
 
-        init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate);
+        setup_sched_clock(picoxcell_read_sched_clock, 32, rate);
 }
 
 static const struct of_device_id picoxcell_timer_ids[] __initconst = {
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index cdb95e726f5c..4cfb40b2ec19 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -260,6 +260,11 @@ void __init pnx4008_map_io(void)
         iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
 }
 
+static void pnx4008_restart(char mode, const char *cmd)
+{
+        soft_restart(0);
+}
+
 extern struct sys_timer pnx4008_timer;
 
 MACHINE_START(PNX4008, "Philips PNX4008")
@@ -269,4 +274,5 @@ MACHINE_START(PNX4008, "Philips PNX4008")
         .init_irq               = pnx4008_init_irq,
         .init_machine           = pnx4008_init,
         .timer                  = &pnx4008_timer,
+        .restart                = pnx4008_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
index 5dda2bb55f8d..60cfe7188091 100644
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ b/arch/arm/mach-pnx4008/include/mach/system.h
@@ -21,18 +21,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
 static void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        cpu_reset(0);
-}
-
 #endif
diff --git a/arch/arm/mach-pnx4008/include/mach/vmalloc.h b/arch/arm/mach-pnx4008/include/mach/vmalloc.h
deleted file mode 100644
index 184913c71141..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-pnx4008/include/mach/vmalloc.h
- *
- * Author: Vitaly Wool <source@mvista.com>
- *
- * 2006 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts.  That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index 83e5d2128118..b28a930d4f8a 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -16,6 +16,7 @@ extern struct sys_timer sirfsoc_timer;
 
 extern void __init sirfsoc_of_irq_init(void);
 extern void __init sirfsoc_of_clk_init(void);
+extern void sirfsoc_restart(char, const char *);
 
 #ifndef CONFIG_DEBUG_LL
 static inline void sirfsoc_map_lluart(void)  {}
diff --git a/arch/arm/mach-prima2/include/mach/map.h b/arch/arm/mach-prima2/include/mach/map.h
index 66b1ae2e553f..6f243532570c 100644
--- a/arch/arm/mach-prima2/include/mach/map.h
+++ b/arch/arm/mach-prima2/include/mach/map.h
@@ -9,8 +9,10 @@
 #ifndef __MACH_PRIMA2_MAP_H__
 #define __MACH_PRIMA2_MAP_H__
 
-#include <mach/vmalloc.h>
+#include <linux/const.h>
 
-#define SIRFSOC_VA(x)                   (VMALLOC_END + ((x) & 0x00FFF000))
+#define SIRFSOC_VA_BASE         _AC(0xFEC00000, UL)
+
+#define SIRFSOC_VA(x)           (SIRFSOC_VA_BASE + ((x) & 0x00FFF000))
 
 #endif
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
index 0dbd257ad16d..2c7d2a9d0c92 100644
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ b/arch/arm/mach-prima2/include/mach/system.h
@@ -9,21 +9,9 @@
 #ifndef __MACH_SYSTEM_H__
 #define __MACH_SYSTEM_H__
 
-#include <linux/bitops.h>
-#include <mach/hardware.h>
-
-#define SIRFSOC_SYS_RST_BIT  BIT(31)
-
-extern void __iomem *sirfsoc_rstc_base;
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
-}
-
 #endif
diff --git a/arch/arm/mach-prima2/include/mach/vmalloc.h b/arch/arm/mach-prima2/include/mach/vmalloc.h
deleted file mode 100644
index c9f90fec78e3..000000000000
--- a/arch/arm/mach-prima2/include/mach/vmalloc.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/ach-prima2/include/mach/vmalloc.h
- *
- * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
-
-#include <linux/const.h>
-
-#define VMALLOC_END    _AC(0xFEC00000, UL)
-
-#endif
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index cb53160f6c5d..26ebb57719df 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -9,6 +9,7 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/slab.h>
+#include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index ef555c041962..02b9c05ff990 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -8,6 +8,7 @@
 
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <linux/of.h>
@@ -39,4 +40,5 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")
         .dma_zone_size  = SZ_256M,
         .init_machine   = sirfsoc_mach_init,
         .dt_compat      = prima2cb_dt_match,
+        .restart        = sirfsoc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 492cfa8d2610..762adb73ab7c 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -68,3 +68,10 @@ int sirfsoc_reset_device(struct device *dev)
 
         return 0;
 }
+
+#define SIRFSOC_SYS_RST_BIT  BIT(31)
+
+void sirfsoc_restart(char mode, const char *cmd)
+{
+        writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
+}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index fc0b8544e174..82514f5c38f1 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -307,7 +307,7 @@ static inline void balloon3_mmc_init(void) {}
 /******************************************************************************
  * USB Gadget
  ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static void balloon3_udc_command(int cmd)
 {
         if (cmd == PXA2XX_UDC_CMD_CONNECT)
@@ -829,4 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3")
         .timer          = &pxa_timer,
         .init_machine   = balloon3_init,
         .atag_offset    = 0x100,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4efc16d39c79..c2f0be040d27 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -153,5 +153,6 @@ MACHINE_START(CAPC7117,
         .init_irq = pxa3xx_init_irq,
         .handle_irq = pxa3xx_handle_irq,
         .timer = &pxa_timer,
-        .init_machine = capc7117_init
+        .init_machine = capc7117_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index f2e4190080cb..ec170a552c23 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -524,4 +524,5 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX")
 #ifdef CONFIG_PCI
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index e096bba8fd57..7236974da0b7 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -858,4 +858,5 @@ MACHINE_START(CM_X300, "CM-X300 module")
         .timer          = &pxa_timer,
         .init_machine   = cm_x300_init,
         .fixup          = cm_x300_fixup,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c
index 80538b8806ed..248804bb2c9d 100644
--- a/arch/arm/mach-pxa/colibri-pxa270-income.c
+++ b/arch/arm/mach-pxa/colibri-pxa270-income.c
@@ -183,7 +183,7 @@ static inline void income_lcd_init(void) {}
 /******************************************************************************
  * Backlight
  ******************************************************************************/
-#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM__MODULE)
+#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
 static struct platform_pwm_backlight_data income_backlight_data = {
         .pwm_id         = 0,
         .max_brightness = 0x3ff,
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 05bfa1b1c001..6a685165c9f2 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -313,6 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
 MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
@@ -322,5 +323,6 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c825e8bf2db1..c01059a61f33 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -189,5 +189,6 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ffc5586..5028f2300d50 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -146,7 +146,7 @@ static void __init colibri_pxa320_init_eth(void)
 static inline void __init colibri_pxa320_init_eth(void) {}
 #endif /* CONFIG_AX88796 */
 
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
         .gpio_vbus              = mfp_to_gpio(MFP_PIN_GPIO96),
         .gpio_pullup            = -1,
@@ -259,5 +259,6 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 549468d088b9..9d4dc5970b9c 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -655,7 +655,7 @@ static void corgi_poweroff(void)
                 /* Green LED off tells the bootloader to halt */
                 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
 
-        arm_machine_restart('h', NULL);
+        pxa_restart('h', NULL);
 }
 
 static void corgi_restart(char mode, const char *cmd)
@@ -664,13 +664,12 @@ static void corgi_restart(char mode, const char *cmd)
                 /* Green LED on tells the bootloader to reboot */
                 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
 
-        arm_machine_restart('h', cmd);
+        pxa_restart('h', cmd);
 }
 
 static void __init corgi_init(void)
 {
         pm_power_off = corgi_poweroff;
-        arm_pm_restart = corgi_restart;
 
         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
         PCFR |= PCFR_OPDE;
@@ -726,6 +725,7 @@ MACHINE_START(CORGI, "SHARP Corgi")
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
         .timer          = &pxa_timer,
+        .restart        = corgi_restart,
 MACHINE_END
 #endif
 
@@ -737,6 +737,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd")
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
         .timer          = &pxa_timer,
+        .restart        = corgi_restart,
 MACHINE_END
 #endif
 
@@ -748,6 +749,7 @@ MACHINE_START(HUSKY, "SHARP Husky")
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
         .timer          = &pxa_timer,
+        .restart        = corgi_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 5e2cf39e9e4c..fb5a51d834e5 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -278,4 +278,5 @@ MACHINE_START(CSB726, "Cogent CSB726")
         .handle_irq       = pxa27x_handle_irq,
         .init_machine   = csb726_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 94acc0b01dd6..bd396ba67af7 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1305,6 +1305,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = em_x270_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
 MACHINE_START(EXEDA, "Compulab eXeda")
@@ -1314,4 +1315,5 @@ MACHINE_START(EXEDA, "Compulab eXeda")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = em_x270_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index d82b7aa3c096..69473db97758 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -196,6 +196,7 @@ MACHINE_START(E330, "Toshiba e330")
         .fixup          = eseries_fixup,
         .init_machine   = e330_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -246,6 +247,7 @@ MACHINE_START(E350, "Toshiba e350")
         .fixup          = eseries_fixup,
         .init_machine   = e350_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -369,6 +371,7 @@ MACHINE_START(E400, "Toshiba e400")
         .fixup          = eseries_fixup,
         .init_machine   = e400_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -558,6 +561,7 @@ MACHINE_START(E740, "Toshiba e740")
         .fixup          = eseries_fixup,
         .init_machine   = e740_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -750,6 +754,7 @@ MACHINE_START(E750, "Toshiba e750")
         .fixup          = eseries_fixup,
         .init_machine   = e750_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -955,5 +960,6 @@ MACHINE_START(E800, "Toshiba e800")
         .fixup          = eseries_fixup,
         .init_machine   = e800_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 8308eee5a924..15ab2533667d 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -804,6 +804,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = a780_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -870,6 +871,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = e680_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -936,6 +938,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = a1200_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1127,6 +1130,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = a910_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1193,6 +1197,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = e6_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1233,5 +1238,6 @@ MACHINE_START(EZX_E2, "Motorola EZX E2")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = e2_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 92a2e85ab02c..0d729e6619df 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -57,3 +57,5 @@ void __init pxa_set_ffuart_info(void *info);
 void __init pxa_set_btuart_info(void *info);
 void __init pxa_set_stuart_info(void *info);
 void __init pxa_set_hwuart_info(void *info);
+
+void pxa_restart(char, const char *);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 9c8208ca0415..ac3b1cef4751 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -106,7 +106,7 @@ static void __init gumstix_mmc_init(void)
 }
 #endif
 
-#ifdef CONFIG_USB_GADGET_PXA25X
+#ifdef CONFIG_USB_PXA25X
 static struct gpio_vbus_mach_info gumstix_udc_info = {
         .gpio_vbus              = GPIO_GUMSTIX_USB_GPIOn,
         .gpio_pullup            = GPIO_GUMSTIX_USB_GPIOx,
@@ -239,4 +239,5 @@ MACHINE_START(GUMSTIX, "Gumstix")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = gumstix_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index 4b5e110640b1..fde6b4c873c4 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -209,4 +209,5 @@ MACHINE_START(H5400, "HP iPAQ H5000")
         .handle_irq = pxa25x_handle_irq,
         .timer = &pxa_timer,
         .init_machine = h5000_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index f2c324570844..26d069a9f900 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -164,4 +164,5 @@ MACHINE_START(HIMALAYA, "HTC Himalaya")
         .handle_irq = pxa25x_handle_irq,
         .init_machine = himalaya_init,
         .timer = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 6f6368ece9bd..ce16bdae96de 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -845,4 +845,5 @@ MACHINE_START(H4700, "HP iPAQ HX4700")
         .handle_irq     = pxa27x_handle_irq,
         .init_machine = hx4700_init,
         .timer        = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index f78d5db758da..e239b82c99d7 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -196,5 +196,6 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = icontrol_init
+        .init_machine   = icontrol_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index ddf20e5c376e..fbabd84e110c 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -199,4 +199,5 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = idp_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index a73bc86a3c26..260c0c17692a 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -7,45 +7,9 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
 
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                mrc     p15, 0, \tmp, c0, c0, 0         @ CPUID
-                mov     \tmp, \tmp, lsr #13
-                and     \tmp, \tmp, #0x7                @ Core G
-                cmp     \tmp, #1
-                bhi     1002f
-
-                @ Core Generation 1 (PXA25x)
-                mov     \base, #io_p2v(0x40000000)      @ IIR Ctl = 0x40d00000
-                add     \base, \base, #0x00d00000
-                ldr     \irqstat, [\base, #0]           @ ICIP
-                ldr     \irqnr, [\base, #4]             @ ICMR
-
-                ands    \irqnr, \irqstat, \irqnr
-                beq     1001f
-                rsb     \irqstat, \irqnr, #0
-                and     \irqstat, \irqstat, \irqnr
-                clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #(31 + PXA_IRQ(0))
-                b       1001f
-1002:
-                @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
-                mrc     p6, 0, \irqstat, c5, c0, 0      @ ICHP
-                tst     \irqstat, #0x80000000
-                beq     1001f
-                bic     \irqstat, \irqstat, #0x80000000
-                mov     \irqnr, \irqstat, lsr #16
-                add     \irqnr, \irqnr, #(PXA_IRQ(0))
-1001:
-                .endm
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index f80bbe246afe..d4eac3d6ffb5 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -37,8 +37,8 @@ extern void __init palm27x_lcd_init(int power,
 #define palm27x_lcd_init(power, mode)   do {} while (0)
 #endif
 
-#if     defined(CONFIG_USB_GADGET_PXA27X) || \
-        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if     defined(CONFIG_USB_PXA27X) || \
+        defined(CONFIG_USB_PXA27X_MODULE)
 extern void __init palm27x_udc_init(int vbus, int pullup,
                                         int vbus_inverted);
 #else
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
index d1fce8b6d105..c5afacd3cc0b 100644
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ b/arch/arm/mach-pxa/include/mach/system.h
@@ -9,15 +9,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <asm/proc-fns.h>
-#include "hardware.h"
-#include "pxa2xx-regs.h"
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-
-void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/mach-pxa/include/mach/vmalloc.h b/arch/arm/mach-pxa/include/mach/vmalloc.h
deleted file mode 100644
index bfecfbf5f460..000000000000
--- a/arch/arm/mach-pxa/include/mach/vmalloc.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/vmalloc.h
- *
- * Author:      Nicolas Pitre
- * Copyright:   (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       (0xe8000000UL)
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 7b324ec6449f..c337c7eed514 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -445,4 +445,5 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = littleton_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1dd530279e0b..6119c015f393 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -505,4 +505,5 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = lpd270_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index c48ce6da9184..4b7a52871652 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -556,4 +556,5 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = lubbock_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4b796c37af3e..4e6774fff422 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -760,4 +760,5 @@ MACHINE_START(MAGICIAN, "HTC Magician")
         .handle_irq = pxa27x_handle_irq,
         .init_machine = magician_init,
         .timer = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 0567d3965fda..ca14555d5e15 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -622,4 +622,5 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = mainstone_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index b938fc2c316a..924a3b5f8da6 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -696,13 +696,13 @@ static void mioa701_machine_exit(void);
 static void mioa701_poweroff(void)
 {
         mioa701_machine_exit();
-        arm_machine_restart('s', NULL);
+        pxa_restart('s', NULL);
 }
 
 static void mioa701_restart(char c, const char *cmd)
 {
         mioa701_machine_exit();
-        arm_machine_restart('s', cmd);
+        pxa_restart('s', cmd);
 }
 
 static struct gpio global_gpios[] = {
@@ -734,7 +734,6 @@ static void __init mioa701_machine_init(void)
         pxa_set_udc_info(&mioa701_udc_info);
         pxa_set_ac97_info(&mioa701_ac97_info);
         pm_power_off = mioa701_poweroff;
-        arm_pm_restart = mioa701_restart;
         platform_add_devices(devices, ARRAY_SIZE(devices));
         gsm_init();
 
@@ -752,9 +751,11 @@ static void mioa701_machine_exit(void)
 
 MACHINE_START(MIOA701, "MIO A701")
         .atag_offset    = 0x100,
+        .restart_mode   = 's',
         .map_io         = &pxa27x_map_io,
         .init_irq       = &pxa27x_init_irq,
         .handle_irq     = &pxa27x_handle_irq,
         .init_machine   = mioa701_machine_init,
         .timer          = &pxa_timer,
+        .restart        = mioa701_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 4af5d513c380..169bf8f97af0 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -98,5 +98,6 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = mp900c_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 325c245c0a0d..fbc10d7b95d1 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -164,8 +164,8 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
 /******************************************************************************
  * USB Gadget
  ******************************************************************************/
-#if     defined(CONFIG_USB_GADGET_PXA27X) || \
-        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if     defined(CONFIG_USB_PXA27X) || \
+        defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info palm27x_udc_info = {
         .gpio_vbus_inverted     = 1,
 };
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 3d4a2819cae1..1fa80f4f80c8 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -347,5 +347,6 @@ MACHINE_START(PALMLD, "Palm LifeDrive")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmld_init
+        .init_machine   = palmld_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 99d6bcf1f974..5ba14316bd9c 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -208,5 +208,6 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmt5_init
+        .init_machine   = palmt5_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 6ec7caefb37c..29b51b40f09d 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -338,7 +338,7 @@ static inline void palmtc_mkp_init(void) {}
 /******************************************************************************
  * UDC
  ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE)
+#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE)
 static struct gpio_vbus_mach_info palmtc_udc_info = {
         .gpio_vbus              = GPIO_NR_PALMTC_USB_DETECT_N,
         .gpio_vbus_inverted     = 1,
@@ -542,5 +542,6 @@ MACHINE_START(PALMTC, "Palm Tungsten|C")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmtc_init
+        .init_machine   = palmtc_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 9376da06404c..5ebf49acb827 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -361,5 +361,6 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmte2_init
+        .init_machine   = palmte2_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 94e9708b349d..ec8249156c08 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -452,6 +452,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = treo680_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -464,5 +465,6 @@ MACHINE_START(CENTRO, "Palm Centro 685")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = centro_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 4e3e45927e95..6170d76dfba8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -369,5 +369,6 @@ MACHINE_START(PALMTX, "Palm T|X")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmtx_init
+        .init_machine   = palmtx_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 68e18baf8e07..b2dff9d415eb 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -404,5 +404,6 @@ MACHINE_START(PALMZ72, "Palm Zire72")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmz72_init
+        .init_machine   = palmz72_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 0b825a353537..fe9054435b6f 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -265,4 +265,5 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = pcm027_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 50c833177866..b260ce872d2d 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -417,12 +417,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = {
 
 static void poodle_poweroff(void)
 {
-        arm_machine_restart('h', NULL);
-}
-
-static void poodle_restart(char mode, const char *cmd)
-{
-        arm_machine_restart('h', cmd);
+        pxa_restart('h', NULL);
 }
 
 static void __init poodle_init(void)
@@ -430,7 +425,6 @@ static void __init poodle_init(void)
         int ret = 0;
 
         pm_power_off = poodle_poweroff;
-        arm_pm_restart = poodle_restart;
 
         PCFR |= PCFR_OPDE;
 
@@ -472,4 +466,5 @@ MACHINE_START(POODLE, "SHARP Poodle")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = poodle_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index f0c05f4d12ed..4962b1676629 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -1093,6 +1093,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1115,5 +1117,6 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 01e9d643394a..c8497b00cdfe 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -81,14 +81,17 @@ static void do_hw_reset(void)
         OSMR3 = OSCR + 368640;  /* ... in 100 ms */
 }
 
-void arch_reset(char mode, const char *cmd)
+void pxa_restart(char mode, const char *cmd)
 {
+        local_irq_disable();
+        local_fiq_disable();
+
         clear_reset_status(RESET_STATUS_ALL);
 
         switch (mode) {
         case 's':
                 /* Jump into ROM at address 0 */
-                cpu_reset(0);
+                soft_restart(0);
                 break;
         case 'g':
                 do_gpio_reset();
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index fc2c1e05af9c..878707056e65 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -602,4 +602,5 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = saar_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 3e999e308a2d..b6dbaca460c7 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -111,5 +111,6 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = saarb_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 953a9195f9e5..a7f81a3fd132 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -926,7 +926,7 @@ static inline void spitz_i2c_init(void) {}
  ******************************************************************************/
 static void spitz_poweroff(void)
 {
-        arm_machine_restart('g', NULL);
+        pxa_restart('g', NULL);
 }
 
 static void spitz_restart(char mode, const char *cmd)
@@ -943,7 +943,6 @@ static void __init spitz_init(void)
 {
         init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
         pm_power_off = spitz_poweroff;
-        arm_pm_restart = spitz_restart;
 
         PMCR = 0x00;
 
@@ -982,33 +981,39 @@ static void __init spitz_fixup(struct tag *tags, char **cmdline,
 
 #ifdef CONFIG_MACH_SPITZ
 MACHINE_START(SPITZ, "SHARP Spitz")
+        .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
         .timer          = &pxa_timer,
+        .restart        = spitz_restart,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_BORZOI
 MACHINE_START(BORZOI, "SHARP Borzoi")
+        .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
         .timer          = &pxa_timer,
+        .restart        = spitz_restart,
 MACHINE_END
 #endif
 
 #ifdef CONFIG_MACH_AKITA
 MACHINE_START(AKITA, "SHARP Akita")
+        .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
         .timer          = &pxa_timer,
+        .restart        = spitz_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 4c9a48bef569..80d7f23ad0fd 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -1005,6 +1005,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2")
         .timer          = &pxa_timer,
         .init_machine   = imote2_init,
         .atag_offset    = 0x100,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1017,5 +1018,6 @@ MACHINE_START(STARGATE2, "Stargate 2")
         .timer = &pxa_timer,
         .init_machine = stargate2_init,
         .atag_offset = 0x100,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index ad47bb98f30d..4fa36a3e383c 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -495,4 +495,5 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = tavorevb_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index fd569167302a..8a22879f0bb0 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -132,4 +132,5 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = evb3_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index de684701449c..b503049d6d26 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -16,7 +16,6 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/clockchips.h>
-#include <linux/sched.h>
 
 #include <asm/div64.h>
 #include <asm/mach/irq.h>
@@ -32,18 +31,10 @@
  * long as there is always less than 582 seconds between successive
  * calls to sched_clock() which should always be the case in practice.
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace pxa_read_sched_clock(void)
 {
-        u32 cyc = OSCR;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace pxa_update_sched_clock(void)
-{
-        u32 cyc = OSCR;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return OSCR;
 }
 
 
@@ -119,7 +110,7 @@ static void __init pxa_timer_init(void)
         OIER = 0;
         OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-        init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
+        setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
 
         clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
         ckevt_pxa_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 402b0c96613b..dfe40f8705aa 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -905,7 +905,7 @@ static struct platform_device *devices[] __initdata = {
 
 static void tosa_poweroff(void)
 {
-        arm_machine_restart('g', NULL);
+        pxa_restart('g', NULL);
 }
 
 static void tosa_restart(char mode, const char *cmd)
@@ -935,7 +935,6 @@ static void __init tosa_init(void)
         init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
 
         pm_power_off = tosa_poweroff;
-        arm_pm_restart = tosa_restart;
 
         PCFR |= PCFR_OPDE;
 
@@ -970,6 +969,7 @@ static void __init fixup_tosa(struct tag *tags, char **cmdline,
 }
 
 MACHINE_START(TOSA, "SHARP Tosa")
+        .restart_mode   = 'g',
         .fixup          = fixup_tosa,
         .map_io         = pxa25x_map_io,
         .nr_irqs        = TOSA_NR_IRQS,
@@ -977,4 +977,5 @@ MACHINE_START(TOSA, "SHARP Tosa")
         .handle_irq       = pxa25x_handle_irq,
         .init_machine   = tosa_init,
         .timer          = &pxa_timer,
+        .restart        = tosa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 1aaed2b17e10..0f30af617d8f 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -561,6 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
 MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
@@ -571,4 +572,5 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 242ddae332d3..afe2b7495523 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -998,4 +998,5 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = viper_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6ed1ff..fed5fb088714 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -343,7 +343,7 @@ static inline void vpac270_uhc_init(void) {}
 /******************************************************************************
  * USB Gadget
  ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
         .gpio_vbus              = GPIO41_VPAC270_UDC_DETECT,
         .gpio_pullup            = -1,
@@ -721,5 +721,6 @@ MACHINE_START(VPAC270, "Voipac PXA270")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = vpac270_init
+        .init_machine   = vpac270_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 70e1730ef282..4bbe9a36fe74 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -185,5 +185,6 @@ MACHINE_START(XCEP, "Iskratel XCEP")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index ead32c90fec1..d75f66ab8c34 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -725,4 +725,5 @@ MACHINE_START(ZIPIT2, "Zipit Z2")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = z2_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 498b83b089f3..9db35a7fcfc0 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -911,5 +911,6 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = zeus_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 6c39c3328418..7678b1bf7903 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -430,4 +430,5 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = zylonite_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index dba6d0c1fc17..c593be428b8f 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -12,6 +12,8 @@ config REALVIEW_EB_A9MP
         bool "Support Multicore Cortex-A9 Tile"
         depends on MACH_REALVIEW_EB
         select CPU_V7
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Enable support for the Cortex-A9MPCore tile fitted to the
           Realview(R) Emulation Baseboard platform.
@@ -21,6 +23,8 @@ config REALVIEW_EB_ARM11MP
         depends on MACH_REALVIEW_EB
         select CPU_V6K
         select ARCH_HAS_BARRIERS if SMP
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Enable support for the ARM11MPCore tile fitted to the Realview(R)
           Emulation Baseboard platform.
@@ -39,6 +43,8 @@ config MACH_REALVIEW_PB11MP
         select CPU_V6K
         select ARM_GIC
         select HAVE_PATA_PLATFORM
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_HAS_BARRIERS if SMP
         help
           Include support for the ARM(R) RealView(R) Platform Baseboard for
@@ -51,6 +57,7 @@ config MACH_REALVIEW_PB1176
         select CPU_V6
         select ARM_GIC
         select HAVE_TCM
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Include support for the ARM(R) RealView(R) Platform Baseboard for
           ARM1176JZF-S.
@@ -78,6 +85,8 @@ config MACH_REALVIEW_PBX
         bool "Support RealView(R) Platform Baseboard Explore"
         select ARM_GIC
         select HAVE_PATA_PLATFORM
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
         select ZONE_DMA if SPARSEMEM
         help
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index d5ed5d4f77d6..acd329afc3ac 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -21,7 +21,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/interrupt.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 47259c89a75e..735b57aaf2d6 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -65,6 +65,5 @@ extern int realview_usb_register(struct resource *res);
 extern void realview_init_early(void);
 extern void realview_fixup(struct tag *tags, char **from,
                            struct meminfo *meminfo);
-extern void (*realview_reset)(char);
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S
index 4071164aebaa..e8a5179c2653 100644
--- a/arch/arm/mach-realview/include/mach/entry-macro.S
+++ b/arch/arm/mach-realview/include/mach/entry-macro.S
@@ -7,8 +7,6 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
 
                 .macro  disable_fiq
                 .endm
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index 6657ff231161..471b671159ce 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -21,12 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
-void (*realview_reset)(char mode);
-
 static inline void arch_idle(void)
 {
         /*
@@ -36,15 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * To reset, we hit the on-board reset register
-         * in the system FPGA
-         */
-        if (realview_reset)
-                realview_reset(mode);
-        dsb();
-}
-
 #endif
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
deleted file mode 100644
index a2a4c6861407..000000000000
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END             0xf8000000UL
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 026c66ad7ec2..0069561464f9 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -21,7 +21,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
@@ -91,8 +91,8 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
 
 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
         {
-                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
+                .virtual        = IO_ADDRESS(REALVIEW_EB11MP_SCU_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_EB11MP_SCU_BASE),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
@@ -415,7 +415,7 @@ static struct sys_timer realview_eb_timer = {
         .init           = realview_eb_timer_init,
 };
 
-static void realview_eb_reset(char mode)
+static void realview_eb_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -427,6 +427,7 @@ static void realview_eb_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         if (core_tile_eb11mp())
                 __raw_writel(0x0008, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_eb_init(void)
@@ -458,7 +459,6 @@ static void __init realview_eb_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_eb_reset;
 }
 
 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
@@ -469,8 +469,10 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
         .init_early     = realview_init_early,
         .init_irq       = gic_init_irq,
         .timer          = &realview_eb_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = realview_eb_init,
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_eb_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index c057540ec776..8fe395568a47 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -21,7 +21,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
@@ -336,12 +336,13 @@ static struct sys_timer realview_pb1176_timer = {
         .init           = realview_pb1176_timer_init,
 };
 
-static void realview_pb1176_reset(char mode)
+static void realview_pb1176_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
+        dsb();
 }
 
 static void realview_pb1176_fixup(struct tag *tags, char **from,
@@ -381,7 +382,6 @@ static void __init realview_pb1176_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pb1176_reset;
 }
 
 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
@@ -392,8 +392,10 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
         .init_early     = realview_init_early,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pb1176_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = realview_pb1176_init,
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pb1176_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 671ad6d6ff00..34a26011bb89 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -21,7 +21,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
@@ -315,7 +315,7 @@ static struct sys_timer realview_pb11mp_timer = {
         .init           = realview_pb11mp_timer_init,
 };
 
-static void realview_pb11mp_reset(char mode)
+static void realview_pb11mp_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -327,6 +327,7 @@ static void realview_pb11mp_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(0x0000, reset_ctrl);
         __raw_writel(0x0004, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_pb11mp_init(void)
@@ -355,7 +356,6 @@ static void __init realview_pb11mp_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pb11mp_reset;
 }
 
 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
@@ -366,8 +366,10 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
         .init_early     = realview_init_early,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pb11mp_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = realview_pb11mp_init,
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pb11mp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index cbf22df4ad5b..d26a6def1d65 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -21,7 +21,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
@@ -271,7 +271,7 @@ static struct sys_timer realview_pba8_timer = {
         .init           = realview_pba8_timer_init,
 };
 
-static void realview_pba8_reset(char mode)
+static void realview_pba8_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -283,6 +283,7 @@ static void realview_pba8_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(0x0000, reset_ctrl);
         __raw_writel(0x0004, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_pba8_init(void)
@@ -305,7 +306,6 @@ static void __init realview_pba8_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pba8_reset;
 }
 
 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
@@ -316,8 +316,10 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
         .init_early     = realview_init_early,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pba8_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = realview_pba8_init,
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pba8_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 63c4114afae9..a250fb4124bf 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -20,7 +20,7 @@
 
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
@@ -98,8 +98,8 @@ static struct map_desc realview_pbx_io_desc[] __initdata = {
 
 static struct map_desc realview_local_io_desc[] __initdata = {
         {
-                .virtual        = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_CPU_BASE),
-                .pfn            = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_CPU_BASE),
+                .virtual        = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBX_TILE_SCU_BASE),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
@@ -339,7 +339,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from,
 #endif
 }
 
-static void realview_pbx_reset(char mode)
+static void realview_pbx_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -351,6 +351,7 @@ static void realview_pbx_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(0x00F0, reset_ctrl);
         __raw_writel(0x00F4, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_pbx_init(void)
@@ -388,7 +389,6 @@ static void __init realview_pbx_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pbx_reset;
 }
 
 MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
@@ -399,8 +399,10 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
         .init_early     = realview_init_early,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pbx_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = realview_pbx_init,
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pbx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
index 45c7b935dc45..359bab94b6af 100644
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ b/arch/arm/mach-rpc/include/mach/system.h
@@ -7,21 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/hardware/iomd.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        iomd_writeb(0, IOMD_ROMCR0);
-
-        /*
-         * Jump into the ROM
-         */
-        cpu_reset(0);
-}
diff --git a/arch/arm/mach-rpc/include/mach/vmalloc.h b/arch/arm/mach-rpc/include/mach/vmalloc.h
deleted file mode 100644
index fb700228637a..000000000000
--- a/arch/arm/mach-rpc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- *  arch/arm/mach-rpc/include/mach/vmalloc.h
- *
- *  Copyright (C) 1997 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define VMALLOC_END       0xdc000000UL
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 8559598ab767..3d44a59fc0df 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -24,6 +24,7 @@
 #include <asm/elf.h>
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
+#include <asm/hardware/iomd.h>
 #include <asm/page.h>
 #include <asm/domain.h>
 #include <asm/setup.h>
@@ -214,6 +215,16 @@ static int __init rpc_init(void)
 
 arch_initcall(rpc_init);
 
+static void rpc_restart(char mode, const char *cmd)
+{
+        iomd_writeb(0, IOMD_ROMCR0);
+
+        /*
+         * Jump into the ROM
+         */
+        soft_restart(0);
+}
+
 extern struct sys_timer ioc_timer;
 
 MACHINE_START(RISCPC, "Acorn-RiscPC")
@@ -224,4 +235,5 @@ MACHINE_START(RISCPC, "Acorn-RiscPC")
         .map_io         = rpc_map_io,
         .init_irq       = rpc_init_irq,
         .timer          = &ioc_timer,
+        .restart        = rpc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index bc53d2d16d1a..ac7b2ad5c405 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -24,7 +24,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c2410/common.h
new file mode 100644
index 000000000000..f65dc8062961
--- /dev/null
+++ b/arch/arm/mach-s3c2410/common.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S3C2410 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H
+#define __ARCH_ARM_MACH_S3C2410_COMMON_H
+
+void s3c2410_restart(char mode, const char *cmd);
+
+#endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */
diff --git a/arch/arm/mach-s3c2410/cpu-freq.c b/arch/arm/mach-s3c2410/cpu-freq.c
index 75189df995ae..7dc6c46b5e2b 100644
--- a/arch/arm/mach-s3c2410/cpu-freq.c
+++ b/arch/arm/mach-s3c2410/cpu-freq.c
@@ -16,7 +16,7 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
@@ -115,24 +115,25 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = {
         .debug_io_show  = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
 };
 
-static int s3c2410_cpufreq_add(struct sys_device *sysdev)
+static int s3c2410_cpufreq_add(struct device *dev)
 {
         return s3c_cpufreq_register(&s3c2410_cpufreq_info);
 }
 
-static struct sysdev_driver s3c2410_cpufreq_driver = {
-        .add            = s3c2410_cpufreq_add,
+static struct subsys_interface s3c2410_cpufreq_interface = {
+        .name           = "s3c2410_cpufreq",
+        .subsys         = &s3c2410_subsys,
+        .add_dev        = s3c2410_cpufreq_add,
 };
 
 static int __init s3c2410_cpufreq_init(void)
 {
-        return sysdev_driver_register(&s3c2410_sysclass,
-                                      &s3c2410_cpufreq_driver);
+        return subsys_interface_register(&s3c2410_cpufreq_interface);
 }
 
 arch_initcall(s3c2410_cpufreq_init);
 
-static int s3c2410a_cpufreq_add(struct sys_device *sysdev)
+static int s3c2410a_cpufreq_add(struct device *dev)
 {
         /* alter the maximum freq settings for S3C2410A. If a board knows
          * it only has a maximum of 200, then it should register its own
@@ -143,17 +144,18 @@ static int s3c2410a_cpufreq_add(struct sys_device *sysdev)
         s3c2410_cpufreq_info.max.pclk =  66500000;
         s3c2410_cpufreq_info.name = "s3c2410a";
 
-        return s3c2410_cpufreq_add(sysdev);
+        return s3c2410_cpufreq_add(dev);
 }
 
-static struct sysdev_driver s3c2410a_cpufreq_driver = {
-        .add            = s3c2410a_cpufreq_add,
+static struct subsys_interface s3c2410a_cpufreq_interface = {
+        .name           = "s3c2410a_cpufreq",
+        .subsys         = &s3c2410a_subsys,
+        .add_dev        = s3c2410a_cpufreq_add,
 };
 
 static int __init s3c2410a_cpufreq_init(void)
 {
-        return sysdev_driver_register(&s3c2410a_sysclass,
-                                      &s3c2410a_cpufreq_driver);
+        return subsys_interface_register(&s3c2410a_cpufreq_interface);
 }
 
 arch_initcall(s3c2410a_cpufreq_init);
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index dbe43df8cfec..2afd00014a77 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -14,7 +14,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 
 #include <mach/map.h>
@@ -132,7 +132,7 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
         },
 };
 
-static int __init s3c2410_dma_add(struct sys_device *sysdev)
+static int __init s3c2410_dma_add(struct device *dev)
 {
         s3c2410_dma_init();
         s3c24xx_dma_order_set(&s3c2410_dma_order);
@@ -140,24 +140,28 @@ static int __init s3c2410_dma_add(struct sys_device *sysdev)
 }
 
 #if defined(CONFIG_CPU_S3C2410)
-static struct sysdev_driver s3c2410_dma_driver = {
-        .add    = s3c2410_dma_add,
+static struct subsys_interface s3c2410_dma_interface = {
+        .name           = "s3c2410_dma",
+        .subsys         = &s3c2410_subsys,
+        .add_dev        = s3c2410_dma_add,
 };
 
 static int __init s3c2410_dma_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_dma_driver);
+        return subsys_interface_register(&s3c2410_interface);
 }
 
 arch_initcall(s3c2410_dma_drvinit);
 
-static struct sysdev_driver s3c2410a_dma_driver = {
-        .add    = s3c2410_dma_add,
+static struct subsys_interface s3c2410a_dma_interface = {
+        .name           = "s3c2410a_dma",
+        .subsys         = &s3c2410a_subsys,
+        .add_dev        = s3c2410_dma_add,
 };
 
 static int __init s3c2410a_dma_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_dma_driver);
+        return subsys_interface_register(&s3c2410a_dma_interface);
 }
 
 arch_initcall(s3c2410a_dma_drvinit);
@@ -165,13 +169,15 @@ arch_initcall(s3c2410a_dma_drvinit);
 
 #if defined(CONFIG_CPU_S3C2442)
 /* S3C2442 DMA contains the same selection table as the S3C2410 */
-static struct sysdev_driver s3c2442_dma_driver = {
-        .add    = s3c2410_dma_add,
+static struct subsys_interface s3c2442_dma_interface = {
+        .name           = "s3c2442_dma",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c2410_dma_add,
 };
 
 static int __init s3c2442_dma_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_dma_driver);
+        return subsys_interface_register(&s3c2442_dma_interface);
 }
 
 arch_initcall(s3c2442_dma_drvinit);
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index ae8e482b6427..acbdfecd4186 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -13,7 +13,7 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H __FILE__
 
-#include <linux/sysdev.h>
+#include <linux/device.h>
 
 #define MAX_DMA_TRANSFER_SIZE   0x100000 /* Data Unit is half word  */
 
@@ -202,7 +202,7 @@ struct s3c2410_dma_chan {
         struct s3c2410_dma_buf  *end;           /* end of queue */
 
         /* system device */
-        struct sys_device       dev;
+        struct device   dev;
 };
 
 typedef unsigned long dma_device_t;
diff --git a/arch/arm/mach-s3c2410/include/mach/reset.h b/arch/arm/mach-s3c2410/include/mach/reset.h
deleted file mode 100644
index f8c9387b049d..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/reset.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/reset.h
- *
- * Copyright (c) 2007 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 CPU reset controls
-*/
-
-#ifndef __ASM_ARCH_RESET_H
-#define __ASM_ARCH_RESET_H __FILE__
-
-/* This allows the over-ride of the default reset code
-*/
-
-extern void (*s3c24xx_reset_hook)(void);
-
-#endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
deleted file mode 100644
index 6faadcee7729..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/system-reset.h
- *
- * Copyright (c) 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - System define for arch_reset() function
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <mach/hardware.h>
-#include <plat/watchdog-reset.h>
-
-extern void (*s3c24xx_reset_hook)(void);
-
-static void
-arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                cpu_reset(0);
-        }
-
-        if (s3c24xx_reset_hook)
-                s3c24xx_reset_hook();
-
-        arch_wdt_reset();
-
-        /* we'll take a jump through zero as a poor second */
-        cpu_reset(0);
-}
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
index a8cbca6701e5..5e215c1a5c8f 100644
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ b/arch/arm/mach-s3c2410/include/mach/system.h
@@ -15,12 +15,10 @@
 
 #include <mach/map.h>
 #include <mach/idle.h>
-#include <mach/reset.h>
 
 #include <mach/regs-clock.h>
 
 void (*s3c24xx_idle)(void);
-void (*s3c24xx_reset_hook)(void);
 
 void s3c24xx_default_idle(void)
 {
@@ -54,5 +52,3 @@ static void arch_idle(void)
         else
                 s3c24xx_default_idle();
 }
-
-#include <mach/system-reset.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
deleted file mode 100644
index 7a311e8dddba..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
- *
- * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- *                    http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 vmalloc definition
-*/
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     0xF6000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 79838942b0ac..4220cc60de3c 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -63,6 +63,8 @@
 #include <linux/mtd/map.h>
 #include <linux/mtd/physmap.h>
 
+#include "common.h"
+
 static struct resource amlm5900_nor_resource = {
                 .start = 0x00000000,
                 .end   = 0x01000000 - 1,
@@ -241,4 +243,5 @@ MACHINE_START(AML_M5900, "AML_M5900")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = amlm5900_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index a20ae1ad4062..c6133c6ec18f 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -66,6 +66,7 @@
 
 #include "usb-simtec.h"
 #include "nor-simtec.h"
+#include "common.h"
 
 #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
 
@@ -662,4 +663,5 @@ MACHINE_START(BAST, "Simtec-BAST")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = bast_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 05a7d16e59f5..41245a603981 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -18,7 +18,7 @@
 #include <linux/memblock.h>
 #include <linux/timer.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -70,6 +70,8 @@
 
 #include <sound/uda1380.h>
 
+#include "common.h"
+
 #define H1940_LATCH             ((void __force __iomem *)0xF8000000)
 
 #define H1940_PA_LATCH          S3C2410_CS2
@@ -751,4 +753,5 @@ MACHINE_START(H1940, "IPAQ-H1940")
         .init_irq       = h1940_init_irq,
         .init_machine   = h1940_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 1dc3e3234417..383d00ca8f60 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -51,6 +51,8 @@
 #include <plat/s3c2410.h>
 #include <plat/udc.h>
 
+#include "common.h"
+
 static struct map_desc n30_iodesc[] __initdata = {
         /* nothing here yet */
 };
@@ -591,6 +593,7 @@ MACHINE_START(N30, "Acer-N30")
         .init_machine   = n30_init,
         .init_irq       = s3c24xx_init_irq,
         .map_io         = n30_map_io,
+        .restart        = s3c2410_restart,
 MACHINE_END
 
 MACHINE_START(N35, "Acer-N35")
@@ -601,4 +604,5 @@ MACHINE_START(N35, "Acer-N35")
         .init_machine   = n30_init,
         .init_irq       = s3c24xx_init_irq,
         .map_io         = n30_map_io,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f03f3fd9cec9..5f1e0eeb38a9 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -38,6 +38,8 @@
 #include <plat/iic.h>
 #include <plat/cpu.h>
 
+#include "common.h"
+
 static struct map_desc otom11_iodesc[] __initdata = {
   /* Device area */
         { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE },
@@ -121,4 +123,5 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
         .init_machine   = otom11_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 451852156254..91c16d9d2459 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -28,7 +28,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
 #include <linux/spi/spi.h>
@@ -62,6 +62,8 @@
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
+#include "common.h"
+
 static struct map_desc qt2410_iodesc[] __initdata = {
         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
 };
@@ -350,6 +352,5 @@ MACHINE_START(QT2410, "QT2410")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = qt2410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
-
-
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 99c9dfdb71c7..bdc27e772876 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -54,6 +54,8 @@
 
 #include <plat/common-smdk.h>
 
+#include "common.h"
+
 static struct map_desc smdk2410_iodesc[] __initdata = {
   /* nothing here yet */
 };
@@ -116,6 +118,5 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = smdk2410_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
-
-
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index e0d0b6fb2800..1114666f0efb 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -54,6 +54,8 @@
 #include <linux/mtd/map.h>
 #include <linux/mtd/physmap.h>
 
+#include "common.h"
+
 static struct resource tct_hammer_nor_resource = {
                 .start = 0x00000000,
                 .end   = 0x01000000 - 1,
@@ -151,4 +153,5 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = tct_hammer_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index df47e8e90065..cc7032b5c65b 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -53,6 +53,7 @@
 
 #include "usb-simtec.h"
 #include "nor-simtec.h"
+#include "common.h"
 
 /* macros for virtual address mods for the io space entries */
 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -405,4 +406,5 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
         .init_machine   = vr1000_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/pll.c b/arch/arm/mach-s3c2410/pll.c
index 8338865e11c0..c07438bfc99f 100644
--- a/arch/arm/mach-s3c2410/pll.c
+++ b/arch/arm/mach-s3c2410/pll.c
@@ -25,7 +25,7 @@
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -66,30 +66,34 @@ static struct cpufreq_frequency_table pll_vals_12MHz[] = {
     { .frequency = 270000000, .index = PLLVAL(127, 1, 1),  },
 };
 
-static int s3c2410_plls_add(struct sys_device *dev)
+static int s3c2410_plls_add(struct device *dev)
 {
         return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
 }
 
-static struct sysdev_driver s3c2410_plls_drv = {
-        .add    = s3c2410_plls_add,
+static struct subsys_interface s3c2410_plls_interface = {
+        .name           = "s3c2410_plls",
+        .subsys         = &s3c2410_subsys,
+        .add_dev        = s3c2410_plls_add,
 };
 
 static int __init s3c2410_pll_init(void)
 {
-        return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_plls_drv);
+        return subsys_interface_register(&s3c2410_plls_interface);
 
 }
 
 arch_initcall(s3c2410_pll_init);
 
-static struct sysdev_driver s3c2410a_plls_drv = {
-        .add    = s3c2410_plls_add,
+static struct subsys_interface s3c2410a_plls_interface = {
+        .name           = "s3c2410a_plls",
+        .subsys         = &s3c2410a_subsys,
+        .add_dev        = s3c2410_plls_add,
 };
 
 static int __init s3c2410a_pll_init(void)
 {
-        return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_plls_drv);
+        return subsys_interface_register(&s3c2410a_plls_interface);
 }
 
 arch_initcall(s3c2410a_pll_init);
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index 4728f9aa7df1..fda5385deff6 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -24,7 +24,7 @@
 #include <linux/suspend.h>
 #include <linux/errno.h>
 #include <linux/time.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/gpio.h>
 #include <linux/io.h>
@@ -111,7 +111,7 @@ struct syscore_ops s3c2410_pm_syscore_ops = {
         .resume         = s3c2410_pm_resume,
 };
 
-static int s3c2410_pm_add(struct sys_device *dev)
+static int s3c2410_pm_add(struct device *dev)
 {
         pm_cpu_prep = s3c2410_pm_prepare;
         pm_cpu_sleep = s3c2410_cpu_suspend;
@@ -120,52 +120,60 @@ static int s3c2410_pm_add(struct sys_device *dev)
 }
 
 #if defined(CONFIG_CPU_S3C2410)
-static struct sysdev_driver s3c2410_pm_driver = {
-        .add            = s3c2410_pm_add,
+static struct subsys_interface s3c2410_pm_interface = {
+        .name           = "s3c2410_pm",
+        .subsys         = &s3c2410_subsys,
+        .add_dev        = s3c2410_pm_add,
 };
 
 /* register ourselves */
 
 static int __init s3c2410_pm_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
+        return subsys_interface_register(&s3c2410_pm_interface);
 }
 
 arch_initcall(s3c2410_pm_drvinit);
 
-static struct sysdev_driver s3c2410a_pm_driver = {
-        .add            = s3c2410_pm_add,
+static struct subsys_interface s3c2410a_pm_interface = {
+        .name           = "s3c2410a_pm",
+        .subsys         = &s3c2410a_subsys,
+        .add_dev        = s3c2410_pm_add,
 };
 
 static int __init s3c2410a_pm_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2410a_sysclass, &s3c2410a_pm_driver);
+        return subsys_interface_register(&s3c2410a_pm_interface);
 }
 
 arch_initcall(s3c2410a_pm_drvinit);
 #endif
 
 #if defined(CONFIG_CPU_S3C2440)
-static struct sysdev_driver s3c2440_pm_driver = {
-        .add            = s3c2410_pm_add,
+static struct subsys_interface s3c2440_pm_interface = {
+        .name           = "s3c2440_pm",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2410_pm_add,
 };
 
 static int __init s3c2440_pm_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
+        return subsys_interface_register(&s3c2440_pm_interface);
 }
 
 arch_initcall(s3c2440_pm_drvinit);
 #endif
 
 #if defined(CONFIG_CPU_S3C2442)
-static struct sysdev_driver s3c2442_pm_driver = {
-        .add            = s3c2410_pm_add,
+static struct subsys_interface s3c2442_pm_interface = {
+        .name           = "s3c2442_pm",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c2410_pm_add,
 };
 
 static int __init s3c2442_pm_drvinit(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
+        return subsys_interface_register(&s3c2442_pm_interface);
 }
 
 arch_initcall(s3c2442_pm_drvinit);
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 3d7ebc557a72..eea559ec7a58 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -18,7 +18,7 @@
 #include <linux/init.h>
 #include <linux/gpio.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
@@ -42,6 +42,7 @@
 #include <plat/clock.h>
 #include <plat/pll.h>
 #include <plat/pm.h>
+#include <plat/watchdog-reset.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -131,22 +132,24 @@ void __init s3c2410_init_clocks(int xtal)
         s3c24xx_register_clock(&s3c2410_armclk);
 }
 
-struct sysdev_class s3c2410_sysclass = {
+struct bus_type s3c2410_subsys = {
         .name = "s3c2410-core",
+        .dev_name = "s3c2410-core",
 };
 
 /* Note, we would have liked to name this s3c2410-core, but we cannot
- * register two sysdev_class with the same name.
+ * register two subsystems with the same name.
  */
-struct sysdev_class s3c2410a_sysclass = {
+struct bus_type s3c2410a_subsys = {
         .name = "s3c2410a-core",
+        .dev_name = "s3c2410a-core",
 };
 
-static struct sys_device s3c2410_sysdev = {
-        .cls            = &s3c2410_sysclass,
+static struct device s3c2410_dev = {
+        .bus            = &s3c2410_subsys,
 };
 
-/* need to register class before we actually register the device, and
+/* need to register the subsystem before we actually register the device, and
  * we also need to ensure that it has been initialised before any of the
  * drivers even try to use it (even if not on an s3c2410 based system)
  * as a driver which may support both 2410 and 2440 may try and use it.
@@ -154,14 +157,14 @@ static struct sys_device s3c2410_sysdev = {
 
 static int __init s3c2410_core_init(void)
 {
-        return sysdev_class_register(&s3c2410_sysclass);
+        return subsys_system_register(&s3c2410_subsys, NULL);
 }
 
 core_initcall(s3c2410_core_init);
 
 static int __init s3c2410a_core_init(void)
 {
-        return sysdev_class_register(&s3c2410a_sysclass);
+        return subsys_system_register(&s3c2410a_subsys, NULL);
 }
 
 core_initcall(s3c2410a_core_init);
@@ -175,11 +178,23 @@ int __init s3c2410_init(void)
 #endif
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
-        return sysdev_register(&s3c2410_sysdev);
+        return device_register(&s3c2410_dev);
 }
 
 int __init s3c2410a_init(void)
 {
-        s3c2410_sysdev.cls = &s3c2410a_sysclass;
+        s3c2410_dev.bus = &s3c2410a_subsys;
         return s3c2410_init();
 }
+
+void s3c2410_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                soft_restart(0);
+        }
+
+        arch_wdt_reset();
+
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 140711db6c89..516881640808 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -26,7 +26,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
diff --git a/arch/arm/mach-s3c2412/cpu-freq.c b/arch/arm/mach-s3c2412/cpu-freq.c
index eb3ea1721335..d8664b7652ce 100644
--- a/arch/arm/mach-s3c2412/cpu-freq.c
+++ b/arch/arm/mach-s3c2412/cpu-freq.c
@@ -16,7 +16,7 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -194,7 +194,7 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = {
         .debug_io_show  = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs),
 };
 
-static int s3c2412_cpufreq_add(struct sys_device *sysdev)
+static int s3c2412_cpufreq_add(struct device *dev)
 {
         unsigned long fclk_rate;
 
@@ -244,14 +244,15 @@ err_fclk:
         return -ENOENT;
 }
 
-static struct sysdev_driver s3c2412_cpufreq_driver = {
-        .add            = s3c2412_cpufreq_add,
+static struct subsys_interface s3c2412_cpufreq_interface = {
+        .name           = "s3c2412_cpufreq",
+        .subsys         = &s3c2412_subsys,
+        .add_dev        = s3c2412_cpufreq_add,
 };
 
 static int s3c2412_cpufreq_init(void)
 {
-        return sysdev_driver_register(&s3c2412_sysclass,
-                                      &s3c2412_cpufreq_driver);
+        return subsys_interface_register(&s3c2412_cpufreq_interface);
 }
 
 arch_initcall(s3c2412_cpufreq_init);
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index d2a7d5ef3e67..142acd3b5e15 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -14,7 +14,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
@@ -159,19 +159,21 @@ static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
         .map_size       = ARRAY_SIZE(s3c2412_dma_mappings),
 };
 
-static int __init s3c2412_dma_add(struct sys_device *sysdev)
+static int __init s3c2412_dma_add(struct device *dev)
 {
         s3c2410_dma_init();
         return s3c24xx_dma_init_map(&s3c2412_dma_sel);
 }
 
-static struct sysdev_driver s3c2412_dma_driver = {
-        .add    = s3c2412_dma_add,
+static struct subsys_interface s3c2412_dma_interface = {
+        .name           = "s3c2412_dma",
+        .subsys         = &s3c2412_subsys,
+        .add_dev        = s3c2412_dma_add,
 };
 
 static int __init s3c2412_dma_init(void)
 {
-        return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
+        return subsys_interface_register(&s3c2412_dma_interface);
 }
 
 arch_initcall(s3c2412_dma_init);
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index 1a1aa220972b..a8a46c1644f4 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -170,7 +170,7 @@ static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state)
 
 static struct irq_chip s3c2412_irq_rtc_chip;
 
-static int s3c2412_irq_add(struct sys_device *sysdev)
+static int s3c2412_irq_add(struct device *dev)
 {
         unsigned int irqno;
 
@@ -200,13 +200,15 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2412_irq_driver = {
-        .add            = s3c2412_irq_add,
+static struct subsys_interface s3c2412_irq_interface = {
+        .name           = "s3c2412_irq",
+        .subsys         = &s3c2412_subsys,
+        .add_dev        = s3c2412_irq_add,
 };
 
 static int s3c2412_irq_init(void)
 {
-        return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_irq_driver);
+        return subsys_interface_register(&s3c2412_irq_interface);
 }
 
 arch_initcall(s3c2412_irq_init);
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 286ef1738c61..ae73ba34ecc6 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -48,6 +48,7 @@
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
 
+#include <plat/s3c2412.h>
 #include <plat/gpio-cfg.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
@@ -661,4 +662,5 @@ MACHINE_START(JIVE, "JIVE")
         .map_io         = jive_map_io,
         .init_machine   = jive_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index f1eec1b54932..b11451b853d8 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -134,6 +134,7 @@ MACHINE_START(S3C2413, "S3C2413")
         .map_io         = smdk2413_map_io,
         .init_machine   = smdk2413_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
 
 MACHINE_START(SMDK2412, "SMDK2412")
@@ -145,6 +146,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
         .map_io         = smdk2413_map_io,
         .init_machine   = smdk2413_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
 
 MACHINE_START(SMDK2413, "SMDK2413")
@@ -156,4 +158,5 @@ MACHINE_START(SMDK2413, "SMDK2413")
         .map_io         = smdk2413_map_io,
         .init_machine   = smdk2413_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 1bbb1ef5f4ff..94bfaa1fb148 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -162,4 +162,5 @@ MACHINE_START(VSTMS, "VSTMS")
         .init_machine   = vstms_init,
         .map_io         = vstms_map_io,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index f4077efa51fa..d1adfa65f66d 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -16,7 +16,7 @@
 #include <linux/list.h>
 #include <linux/timer.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
@@ -56,7 +56,7 @@ static void s3c2412_pm_prepare(void)
 {
 }
 
-static int s3c2412_pm_add(struct sys_device *sysdev)
+static int s3c2412_pm_add(struct device *dev)
 {
         pm_cpu_prep = s3c2412_pm_prepare;
         pm_cpu_sleep = s3c2412_cpu_suspend;
@@ -87,13 +87,15 @@ static struct sleep_save s3c2412_sleep[] = {
         SAVE_ITEM(S3C2413_GPJSLPCON),
 };
 
-static struct sysdev_driver s3c2412_pm_driver = {
-        .add            = s3c2412_pm_add,
+static struct subsys_interface s3c2412_pm_interface = {
+        .name           = "s3c2412_pm",
+        .subsys         = &s3c2412_subsys,
+        .add_dev        = s3c2412_pm_add,
 };
 
 static __init int s3c2412_pm_init(void)
 {
-        return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_pm_driver);
+        return subsys_interface_register(&s3c2412_pm_interface);
 }
 
 arch_initcall(s3c2412_pm_init);
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 57a1e01e4e50..aff6e85a97c6 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -18,7 +18,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
@@ -32,7 +32,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/reset.h>
 #include <mach/idle.h>
 
 #include <plat/cpu-freq.h>
@@ -131,8 +130,11 @@ static void s3c2412_idle(void)
         cpu_do_idle();
 }
 
-static void s3c2412_hard_reset(void)
+void s3c2412_restart(char mode, const char *cmd)
 {
+        if (mode == 's')
+                soft_restart(0);
+
         /* errata "Watch-dog/Software Reset Problem" specifies that
          * this reset must be done with the SYSCLK sourced from
          * EXTCLK instead of FOUT to avoid a glitch in the reset
@@ -164,10 +166,6 @@ void __init s3c2412_map_io(void)
 
         s3c24xx_idle = s3c2412_idle;
 
-        /* set custom reset hook */
-
-        s3c24xx_reset_hook = s3c2412_hard_reset;
-
         /* register our io-tables */
 
         iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
@@ -220,25 +218,26 @@ void __init s3c2412_init_clocks(int xtal)
         s3c2412_baseclk_add();
 }
 
-/* need to register class before we actually register the device, and
+/* need to register the subsystem before we actually register the device, and
  * we also need to ensure that it has been initialised before any of the
  * drivers even try to use it (even if not on an s3c2412 based system)
  * as a driver which may support both 2410 and 2440 may try and use it.
 */
 
-struct sysdev_class s3c2412_sysclass = {
+struct bus_type s3c2412_subsys = {
         .name = "s3c2412-core",
+        .dev_name = "s3c2412-core",
 };
 
 static int __init s3c2412_core_init(void)
 {
-        return sysdev_class_register(&s3c2412_sysclass);
+        return subsys_system_register(&s3c2412_subsys, NULL);
 }
 
 core_initcall(s3c2412_core_init);
 
-static struct sys_device s3c2412_sysdev = {
-        .cls            = &s3c2412_sysclass,
+static struct device s3c2412_dev = {
+        .bus            = &s3c2412_subsys,
 };
 
 int __init s3c2412_init(void)
@@ -250,5 +249,5 @@ int __init s3c2412_init(void)
 #endif
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
-        return sysdev_register(&s3c2412_sysdev);
+        return device_register(&s3c2412_dev);
 }
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
index 28ad20d42445..36df761061de 100644
--- a/arch/arm/mach-s3c2416/irq.c
+++ b/arch/arm/mach-s3c2416/irq.c
@@ -25,7 +25,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -213,7 +213,7 @@ static int __init s3c2416_add_sub(unsigned int base,
         return 0;
 }
 
-static int __init s3c2416_irq_add(struct sys_device *sysdev)
+static int __init s3c2416_irq_add(struct device *dev)
 {
         printk(KERN_INFO "S3C2416: IRQ Support\n");
 
@@ -234,13 +234,15 @@ static int __init s3c2416_irq_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2416_irq_driver = {
-        .add            = s3c2416_irq_add,
+static struct subsys_interface s3c2416_irq_interface = {
+        .name           = "s3c2416_irq",
+        .subsys         = &s3c2416_subsys,
+        .add_dev        = s3c2416_irq_add,
 };
 
 static int __init s3c2416_irq_init(void)
 {
-        return sysdev_driver_register(&s3c2416_sysclass, &s3c2416_irq_driver);
+        return subsys_interface_register(&s3c2416_irq_interface);
 }
 
 arch_initcall(s3c2416_irq_init);
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c
index a9eee531ca76..66b71736609c 100644
--- a/arch/arm/mach-s3c2416/mach-smdk2416.c
+++ b/arch/arm/mach-s3c2416/mach-smdk2416.c
@@ -251,4 +251,5 @@ MACHINE_START(SMDK2416, "SMDK2416")
         .map_io         = smdk2416_map_io,
         .init_machine   = smdk2416_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2416_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2416/pm.c b/arch/arm/mach-s3c2416/pm.c
index 9ec54f1d8e75..3bdb15a0d419 100644
--- a/arch/arm/mach-s3c2416/pm.c
+++ b/arch/arm/mach-s3c2416/pm.c
@@ -10,7 +10,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/io.h>
 
@@ -48,7 +48,7 @@ static void s3c2416_pm_prepare(void)
         __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
 }
 
-static int s3c2416_pm_add(struct sys_device *sysdev)
+static int s3c2416_pm_add(struct device *dev)
 {
         pm_cpu_prep = s3c2416_pm_prepare;
         pm_cpu_sleep = s3c2416_cpu_suspend;
@@ -56,13 +56,15 @@ static int s3c2416_pm_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2416_pm_driver = {
-        .add            = s3c2416_pm_add,
+static struct subsys_interface s3c2416_pm_interface = {
+        .name           = "s3c2416_pm",
+        .subsys         = &s3c2416_subsys,
+        .add_dev        = s3c2416_pm_add,
 };
 
 static __init int s3c2416_pm_init(void)
 {
-        return sysdev_driver_register(&s3c2416_sysclass, &s3c2416_pm_driver);
+        return subsys_interface_register(&s3c2416_pm_interface);
 }
 
 arch_initcall(s3c2416_pm_init);
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ee214bc83c83..5287d2808d3e 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -31,7 +31,7 @@
 #include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/clk.h>
 #include <linux/io.h>
@@ -44,7 +44,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/reset.h>
 #include <mach/idle.h>
 #include <mach/regs-s3c2443-clock.h>
 
@@ -68,16 +67,20 @@ static struct map_desc s3c2416_iodesc[] __initdata = {
         IODESC_ENT(TIMER),
 };
 
-struct sysdev_class s3c2416_sysclass = {
+struct bus_type s3c2416_subsys = {
         .name = "s3c2416-core",
+        .dev_name = "s3c2416-core",
 };
 
-static struct sys_device s3c2416_sysdev = {
-        .cls            = &s3c2416_sysclass,
+static struct device s3c2416_dev = {
+        .bus            = &s3c2416_subsys,
 };
 
-static void s3c2416_hard_reset(void)
+void s3c2416_restart(char mode, const char *cmd)
 {
+        if (mode == 's')
+                soft_restart(0);
+
         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
 }
 
@@ -85,7 +88,6 @@ int __init s3c2416_init(void)
 {
         printk(KERN_INFO "S3C2416: Initializing architecture\n");
 
-        s3c24xx_reset_hook = s3c2416_hard_reset;
         /* s3c24xx_idle = s3c2416_idle; */
 
         /* change WDT IRQ number */
@@ -105,7 +107,7 @@ int __init s3c2416_init(void)
 #endif
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
-        return sysdev_register(&s3c2416_sysdev);
+        return device_register(&s3c2416_dev);
 }
 
 void __init s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no)
@@ -133,7 +135,7 @@ void __init s3c2416_map_io(void)
         iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
 }
 
-/* need to register class before we actually register the device, and
+/* need to register the subsystem before we actually register the device, and
  * we also need to ensure that it has been initialised before any of the
  * drivers even try to use it (even if not on an s3c2416 based system)
  * as a driver which may support both 2443 and 2440 may try and use it.
@@ -141,7 +143,7 @@ void __init s3c2416_map_io(void)
 
 static int __init s3c2416_core_init(void)
 {
-        return sysdev_class_register(&s3c2416_sysclass);
+        return subsys_system_register(&s3c2416_subsys, NULL);
 }
 
 core_initcall(s3c2416_core_init);
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index f9e6bdaf41d2..d8957592fdc4 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -28,7 +28,6 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/mutex.h>
@@ -108,7 +107,7 @@ static struct clk s3c2440_clk_ac97 = {
         .ctrlbit        = S3C2440_CLKCON_CAMERA,
 };
 
-static int s3c2440_clk_add(struct sys_device *sysdev)
+static int s3c2440_clk_add(struct device *dev)
 {
         struct clk *clock_upll;
         struct clk *clock_h;
@@ -137,13 +136,15 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2440_clk_driver = {
-        .add    = s3c2440_clk_add,
+static struct subsys_interface s3c2440_clk_interface = {
+        .name           = "s3c2440_clk",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2440_clk_add,
 };
 
-static __init int s3c24xx_clk_driver(void)
+static __init int s3c24xx_clk_init(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
+        return subsys_interface_register(&s3c2440_clk_interface);
 }
 
-arch_initcall(s3c24xx_clk_driver);
+arch_initcall(s3c24xx_clk_init);
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
new file mode 100644
index 000000000000..db8a98ac68c5
--- /dev/null
+++ b/arch/arm/mach-s3c2440/common.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S3C2440 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
+#define __ARCH_ARM_MACH_S3C2440_COMMON_H
+
+void s3c2440_restart(char mode, const char *cmd);
+
+#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 0e73f8f9d132..15b1ddf8f626 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -14,7 +14,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 
 #include <mach/map.h>
@@ -174,20 +174,22 @@ static struct s3c24xx_dma_order __initdata s3c2440_dma_order = {
         },
 };
 
-static int __init s3c2440_dma_add(struct sys_device *sysdev)
+static int __init s3c2440_dma_add(struct device *dev)
 {
         s3c2410_dma_init();
         s3c24xx_dma_order_set(&s3c2440_dma_order);
         return s3c24xx_dma_init_map(&s3c2440_dma_sel);
 }
 
-static struct sysdev_driver s3c2440_dma_driver = {
-        .add    = s3c2440_dma_add,
+static struct subsys_interface s3c2440_dma_interface = {
+        .name           = "s3c2440_dma",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2440_dma_add,
 };
 
 static int __init s3c2440_dma_init(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_dma_driver);
+        return subsys_interface_register(&s3c2440_dma_interface);
 }
 
 arch_initcall(s3c2440_dma_init);
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index eb1cc0f0705e..4fee9bc6bcb5 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -92,7 +92,7 @@ static struct irq_chip s3c_irq_wdtac97 = {
         .irq_ack        = s3c_irq_wdtac97_ack,
 };
 
-static int s3c2440_irq_add(struct sys_device *sysdev)
+static int s3c2440_irq_add(struct device *dev)
 {
         unsigned int irqno;
 
@@ -113,13 +113,15 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2440_irq_driver = {
-        .add            = s3c2440_irq_add,
+static struct subsys_interface s3c2440_irq_interface = {
+        .name           = "s3c2440_irq",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2440_irq_add,
 };
 
 static int s3c2440_irq_init(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
+        return subsys_interface_register(&s3c2440_irq_interface);
 }
 
 arch_initcall(s3c2440_irq_init);
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 74f92fc3fd04..121ff8d2c887 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -55,6 +55,8 @@
 #include <plat/cpu.h>
 #include <plat/audio-simtec.h>
 
+#include "common.h"
+
 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
 
 static struct map_desc anubis_iodesc[] __initdata = {
@@ -503,4 +505,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
         .init_machine   = anubis_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 38887ee0c784..b7e334f07da4 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -49,6 +49,8 @@
 #include <plat/cpu.h>
 #include <plat/mci.h>
 
+#include "common.h"
+
 static struct map_desc at2440evb_iodesc[] __initdata = {
         /* Nothing here */
 };
@@ -238,4 +240,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
         .init_machine   = at2440evb_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index de1e0ff46cec..5859e609d28c 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -90,6 +90,7 @@
 #include <plat/iic.h>
 #include <plat/ts.h>
 
+#include "common.h"
 
 static struct pcf50633 *gta02_pcf;
 
@@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = gta02_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 91fe0b4c95f1..437322ffd88d 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -60,6 +60,8 @@
 
 #include <sound/s3c24xx_uda134x.h>
 
+#include "common.h"
+
 #define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
 
 static struct map_desc mini2440_iodesc[] __initdata = {
@@ -681,4 +683,5 @@ MACHINE_START(MINI2440, "MINI2440")
         .init_machine   = mini2440_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 61c0bf148165..40eaf844bc1f 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -47,6 +47,8 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 
+#include "common.h"
+
 static struct map_desc nexcoder_iodesc[] __initdata = {
         /* nothing here yet */
 };
@@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
         .init_machine   = nexcoder_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index dc142ebf8cba..e795715fba30 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -54,6 +54,8 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 
+#include "common.h"
+
 /* onboard perihperal map */
 
 static struct map_desc osiris_iodesc[] __initdata = {
@@ -452,4 +454,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = osiris_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 0d3453bf567c..332d7533bd96 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -24,7 +24,7 @@
 #include <linux/serial_core.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/pda_power.h>
 #include <linux/pwm_backlight.h>
 #include <linux/pwm.h>
@@ -62,6 +62,8 @@
 
 #include <sound/uda1380.h>
 
+#include "common.h"
+
 #define LCD_PWM_PERIOD 192960
 #define LCD_PWM_DUTY 127353
 
@@ -832,4 +834,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
         .init_irq = s3c24xx_init_irq,
         .init_machine = rx1950_init_machine,
         .timer = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index e19499c2f909..80a0972873c2 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -20,7 +20,7 @@
 #include <linux/init.h>
 #include <linux/tty.h>
 #include <linux/console.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
 #include <linux/serial.h>
@@ -51,6 +51,8 @@
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
+#include "common.h"
+
 static struct map_desc rx3715_iodesc[] __initdata = {
         /* dump ISA space somewhere unused */
 
@@ -224,4 +226,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
         .init_irq       = rx3715_init_irq,
         .init_machine   = rx3715_init_machine,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 36eeb4197a84..1deb60d12a60 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -47,6 +47,8 @@
 
 #include <plat/common-smdk.h>
 
+#include "common.h"
+
 static struct map_desc smdk2440_iodesc[] __initdata = {
         /* ISA IO Space map (memory space selected by A24) */
 
@@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
         .map_io         = smdk2440_map_io,
         .init_machine   = smdk2440_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440-cpufreq.c b/arch/arm/mach-s3c2440/s3c2440-cpufreq.c
index 976002fb1b8f..cf7596694efe 100644
--- a/arch/arm/mach-s3c2440/s3c2440-cpufreq.c
+++ b/arch/arm/mach-s3c2440/s3c2440-cpufreq.c
@@ -17,7 +17,7 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -270,7 +270,7 @@ struct s3c_cpufreq_info s3c2440_cpufreq_info = {
         .debug_io_show  = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
 };
 
-static int s3c2440_cpufreq_add(struct sys_device *sysdev)
+static int s3c2440_cpufreq_add(struct device *dev)
 {
         xtal = s3c_cpufreq_clk_get(NULL, "xtal");
         hclk = s3c_cpufreq_clk_get(NULL, "hclk");
@@ -285,27 +285,29 @@ static int s3c2440_cpufreq_add(struct sys_device *sysdev)
         return s3c_cpufreq_register(&s3c2440_cpufreq_info);
 }
 
-static struct sysdev_driver s3c2440_cpufreq_driver = {
-        .add            = s3c2440_cpufreq_add,
+static struct subsys_interface s3c2440_cpufreq_interface = {
+        .name           = "s3c2440_cpufreq",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2440_cpufreq_add,
 };
 
 static int s3c2440_cpufreq_init(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass,
-                                      &s3c2440_cpufreq_driver);
+        return subsys_interface_register(&s3c2440_cpufreq_interface);
 }
 
 /* arch_initcall adds the clocks we need, so use subsys_initcall. */
 subsys_initcall(s3c2440_cpufreq_init);
 
-static struct sysdev_driver s3c2442_cpufreq_driver = {
-        .add            = s3c2440_cpufreq_add,
+static struct subsys_interface s3c2442_cpufreq_interface = {
+        .name           = "s3c2442_cpufreq",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c2440_cpufreq_add,
 };
 
 static int s3c2442_cpufreq_init(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass,
-                                      &s3c2442_cpufreq_driver);
+        return subsys_interface_register(&s3c2442_cpufreq_interface);
 }
 
 subsys_initcall(s3c2442_cpufreq_init);
diff --git a/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
index f105d5e8c477..b5368ae8d7fe 100644
--- a/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
@@ -14,7 +14,7 @@
 
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 
@@ -51,7 +51,7 @@ static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
         { .frequency = 400000000,       .index = PLLVAL(0x5c, 1, 1),  },        /* FVco 800.000000 */
 };
 
-static int s3c2440_plls12_add(struct sys_device *dev)
+static int s3c2440_plls12_add(struct device *dev)
 {
         struct clk *xtal_clk;
         unsigned long xtal;
@@ -72,25 +72,29 @@ static int s3c2440_plls12_add(struct sys_device *dev)
         return 0;
 }
 
-static struct sysdev_driver s3c2440_plls12_drv = {
-        .add    = s3c2440_plls12_add,
+static struct subsys_interface s3c2440_plls12_interface = {
+        .name           = "s3c2440_plls12",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2440_plls12_add,
 };
 
 static int __init s3c2440_pll_12mhz(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_plls12_drv);
+        return subsys_interface_register(&s3c2440_plls12_interface);
 
 }
 
 arch_initcall(s3c2440_pll_12mhz);
 
-static struct sysdev_driver s3c2442_plls12_drv = {
-        .add    = s3c2440_plls12_add,
+static struct subsys_interface s3c2442_plls12_interface = {
+        .name           = "s3c2442_plls12",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c2440_plls12_add,
 };
 
 static int __init s3c2442_pll_12mhz(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_plls12_drv);
+        return subsys_interface_register(&s3c2442_plls12_interface);
 
 }
 
diff --git a/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
index c8a8f90ef382..42f2b5cd2399 100644
--- a/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
+++ b/arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
@@ -14,7 +14,7 @@
 
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 
@@ -79,7 +79,7 @@ static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
         { .frequency = 402192000,       .index = PLLVAL(87, 2, 1),      },      /* FVco 804.384000 */
 };
 
-static int s3c2440_plls169344_add(struct sys_device *dev)
+static int s3c2440_plls169344_add(struct device *dev)
 {
         struct clk *xtal_clk;
         unsigned long xtal;
@@ -100,28 +100,28 @@ static int s3c2440_plls169344_add(struct sys_device *dev)
         return 0;
 }
 
-static struct sysdev_driver s3c2440_plls169344_drv = {
-        .add    = s3c2440_plls169344_add,
+static struct subsys_interface s3c2440_plls169344_interface = {
+        .name           = "s3c2440_plls169344",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c2440_plls169344_add,
 };
 
 static int __init s3c2440_pll_16934400(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass,
-                                      &s3c2440_plls169344_drv);
-
+        return subsys_interface_register(&s3c2440_plls169344_interface);
 }
 
 arch_initcall(s3c2440_pll_16934400);
 
-static struct sysdev_driver s3c2442_plls169344_drv = {
-        .add    = s3c2440_plls169344_add,
+static struct subsys_interface s3c2442_plls169344_interface = {
+        .name           = "s3c2442_plls169344",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c2440_plls169344_add,
 };
 
 static int __init s3c2442_pll_16934400(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass,
-                                      &s3c2442_plls169344_drv);
-
+        return subsys_interface_register(&s3c2442_plls169344_interface);
 }
 
 arch_initcall(s3c2442_pll_16934400);
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 37f8cc6aabd4..517623a09fc5 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -18,7 +18,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/gpio.h>
 #include <linux/clk.h>
@@ -35,13 +35,14 @@
 #include <plat/cpu.h>
 #include <plat/s3c244x.h>
 #include <plat/pm.h>
+#include <plat/watchdog-reset.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
 
-static struct sys_device s3c2440_sysdev = {
-        .cls            = &s3c2440_sysclass,
+static struct device s3c2440_dev = {
+        .bus            = &s3c2440_subsys,
 };
 
 int __init s3c2440_init(void)
@@ -63,7 +64,7 @@ int __init s3c2440_init(void)
 
         /* register our system device for everything else */
 
-        return sysdev_register(&s3c2440_sysdev);
+        return device_register(&s3c2440_dev);
 }
 
 void __init s3c2440_map_io(void)
@@ -73,3 +74,15 @@ void __init s3c2440_map_io(void)
         s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
         s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
 }
+
+void s3c2440_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                soft_restart(0);
+        }
+
+        arch_wdt_reset();
+
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index 2c822e09392f..8004e0497bf4 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -28,7 +28,6 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/syscore_ops.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
@@ -123,7 +122,7 @@ static struct clk s3c2442_clk_cam_upll = {
         },
 };
 
-static int s3c2442_clk_add(struct sys_device *sysdev)
+static int s3c2442_clk_add(struct device *dev)
 {
         struct clk *clock_upll;
         struct clk *clock_h;
@@ -149,20 +148,22 @@ static int s3c2442_clk_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2442_clk_driver = {
-        .add    = s3c2442_clk_add,
+static struct subsys_interface s3c2442_clk_interface = {
+        .name           = "s3c2442_clk",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c2442_clk_add,
 };
 
 static __init int s3c2442_clk_init(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
+        return subsys_interface_register(&s3c2442_clk_interface);
 }
 
 arch_initcall(s3c2442_clk_init);
 
 
-static struct sys_device s3c2442_sysdev = {
-        .cls            = &s3c2442_sysclass,
+static struct device s3c2442_dev = {
+        .bus            = &s3c2442_subsys,
 };
 
 int __init s3c2442_init(void)
@@ -175,7 +176,7 @@ int __init s3c2442_init(void)
         register_syscore_ops(&s3c244x_pm_syscore_ops);
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
-        return sysdev_register(&s3c2442_sysdev);
+        return device_register(&s3c2442_dev);
 }
 
 void __init s3c2442_map_io(void)
diff --git a/arch/arm/mach-s3c2440/s3c244x-clock.c b/arch/arm/mach-s3c2440/s3c244x-clock.c
index 7f5ea0a169a5..b3fdbdda3d5f 100644
--- a/arch/arm/mach-s3c2440/s3c244x-clock.c
+++ b/arch/arm/mach-s3c2440/s3c244x-clock.c
@@ -28,7 +28,6 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/clk.h>
@@ -73,7 +72,7 @@ static struct clk clk_arm = {
         },
 };
 
-static int s3c244x_clk_add(struct sys_device *sysdev)
+static int s3c244x_clk_add(struct device *dev)
 {
         unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
         unsigned long clkdivn;
@@ -115,24 +114,28 @@ static int s3c244x_clk_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2440_clk_driver = {
-        .add            = s3c244x_clk_add,
+static struct subsys_interface s3c2440_clk_interface = {
+        .name           = "s3c2440_clk",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c244x_clk_add,
 };
 
 static int s3c2440_clk_init(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
+        return subsys_interface_register(&s3c2440_clk_interface);
 }
 
 arch_initcall(s3c2440_clk_init);
 
-static struct sysdev_driver s3c2442_clk_driver = {
-        .add            = s3c244x_clk_add,
+static struct subsys_interface s3c2442_clk_interface = {
+        .name           = "s3c2442_clk",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c244x_clk_add,
 };
 
 static int s3c2442_clk_init(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
+        return subsys_interface_register(&s3c2442_clk_interface);
 }
 
 arch_initcall(s3c2442_clk_init);
diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index c63e8f26d901..74d3dcf46a48 100644
--- a/arch/arm/mach-s3c2440/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -91,7 +91,7 @@ static struct irq_chip s3c_irq_cam = {
         .irq_ack        = s3c_irq_cam_ack,
 };
 
-static int s3c244x_irq_add(struct sys_device *sysdev)
+static int s3c244x_irq_add(struct device *dev)
 {
         unsigned int irqno;
 
@@ -114,25 +114,29 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2440_irq_driver = {
-        .add            = s3c244x_irq_add,
+static struct subsys_interface s3c2440_irq_interface = {
+        .name           = "s3c2440_irq",
+        .subsys         = &s3c2440_subsys,
+        .add_dev        = s3c244x_irq_add,
 };
 
 static int s3c2440_irq_init(void)
 {
-        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
+        return subsys_interface_register(&s3c2440_irq_interface);
 }
 
 arch_initcall(s3c2440_irq_init);
 
-static struct sysdev_driver s3c2442_irq_driver = {
-        .add            = s3c244x_irq_add,
+static struct subsys_interface s3c2442_irq_interface = {
+        .name           = "s3c2442_irq",
+        .subsys         = &s3c2442_subsys,
+        .add_dev        = s3c244x_irq_add,
 };
 
 
 static int s3c2442_irq_init(void)
 {
-        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_irq_driver);
+        return subsys_interface_register(&s3c2442_irq_interface);
 }
 
 arch_initcall(s3c2442_irq_init);
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 7e8a23d2098a..36bc60f61d0a 100644
--- a/arch/arm/mach-s3c2440/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -18,7 +18,7 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/clk.h>
 #include <linux/io.h>
@@ -135,17 +135,19 @@ void __init s3c244x_init_clocks(int xtal)
         s3c2410_baseclk_add();
 }
 
-/* Since the S3C2442 and S3C2440 share  items, put both sysclasses here */
+/* Since the S3C2442 and S3C2440 share items, put both subsystems here */
 
-struct sysdev_class s3c2440_sysclass = {
+struct bus_type s3c2440_subsys = {
         .name           = "s3c2440-core",
+        .dev_name       = "s3c2440-core",
 };
 
-struct sysdev_class s3c2442_sysclass = {
+struct bus_type s3c2442_subsys = {
         .name           = "s3c2442-core",
+        .dev_name       = "s3c2442-core",
 };
 
-/* need to register class before we actually register the device, and
+/* need to register the subsystem before we actually register the device, and
  * we also need to ensure that it has been initialised before any of the
  * drivers even try to use it (even if not on an s3c2440 based system)
  * as a driver which may support both 2410 and 2440 may try and use it.
@@ -153,14 +155,14 @@ struct sysdev_class s3c2442_sysclass = {
 
 static int __init s3c2440_core_init(void)
 {
-        return sysdev_class_register(&s3c2440_sysclass);
+        return subsys_system_register(&s3c2440_subsys, NULL);
 }
 
 core_initcall(s3c2440_core_init);
 
 static int __init s3c2442_core_init(void)
 {
-        return sysdev_class_register(&s3c2442_sysclass);
+        return subsys_system_register(&s3c2442_subsys, NULL);
 }
 
 core_initcall(s3c2442_core_init);
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 1c2c088aa2e8..6dde2696f8f0 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -27,7 +27,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 #include <linux/serial_core.h>
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index fe52151d2e84..de6b4a23c9ed 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -14,7 +14,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
@@ -135,19 +135,21 @@ static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
         .map_size       = ARRAY_SIZE(s3c2443_dma_mappings),
 };
 
-static int __init s3c2443_dma_add(struct sys_device *sysdev)
+static int __init s3c2443_dma_add(struct device *dev)
 {
         s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
         return s3c24xx_dma_init_map(&s3c2443_dma_sel);
 }
 
-static struct sysdev_driver s3c2443_dma_driver = {
-        .add    = s3c2443_dma_add,
+static struct subsys_interface s3c2443_dma_interface = {
+        .name           = "s3c2443_dma",
+        .subsys         = &s3c2443_subsys,
+        .add_dev        = s3c2443_dma_add,
 };
 
 static int __init s3c2443_dma_init(void)
 {
-        return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_dma_driver);
+        return subsys_interface_register(&s3c2443_dma_interface);
 }
 
 arch_initcall(s3c2443_dma_init);
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index 83ecb1173fb1..35e4ff24fb43 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -23,7 +23,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -241,7 +241,7 @@ static int __init s3c2443_add_sub(unsigned int base,
         return 0;
 }
 
-static int __init s3c2443_irq_add(struct sys_device *sysdev)
+static int __init s3c2443_irq_add(struct device *dev)
 {
         printk("S3C2443: IRQ Support\n");
 
@@ -265,13 +265,15 @@ static int __init s3c2443_irq_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s3c2443_irq_driver = {
-        .add            = s3c2443_irq_add,
+static struct subsys_interface s3c2443_irq_interface = {
+        .name           = "s3c2443_irq",
+        .subsys         = &s3c2443_subsys,
+        .add_dev        = s3c2443_irq_add,
 };
 
 static int __init s3c2443_irq_init(void)
 {
-        return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver);
+        return subsys_interface_register(&s3c2443_irq_interface);
 }
 
 arch_initcall(s3c2443_irq_init);
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index bec107e00441..209236956222 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -145,4 +145,5 @@ MACHINE_START(SMDK2443, "SMDK2443")
         .map_io         = smdk2443_map_io,
         .init_machine   = smdk2443_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2443_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index a22b771b0f36..b9deaeb0dfff 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -19,7 +19,7 @@
 #include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
 
@@ -31,7 +31,6 @@
 #include <asm/irq.h>
 
 #include <mach/regs-s3c2443-clock.h>
-#include <mach/reset.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -49,16 +48,20 @@ static struct map_desc s3c2443_iodesc[] __initdata = {
         IODESC_ENT(TIMER),
 };
 
-struct sysdev_class s3c2443_sysclass = {
+struct bus_type s3c2443_subsys = {
         .name = "s3c2443-core",
+        .dev_name = "s3c2443-core",
 };
 
-static struct sys_device s3c2443_sysdev = {
-        .cls            = &s3c2443_sysclass,
+static struct device s3c2443_dev = {
+        .bus            = &s3c2443_subsys,
 };
 
-static void s3c2443_hard_reset(void)
+void s3c2443_restart(char mode, const char *cmd)
 {
+        if (mode == 's')
+                soft_restart(0);
+
         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
 }
 
@@ -66,8 +69,6 @@ int __init s3c2443_init(void)
 {
         printk("S3C2443: Initialising architecture\n");
 
-        s3c24xx_reset_hook = s3c2443_hard_reset;
-
         s3c_nand_setname("s3c2412-nand");
         s3c_fb_setname("s3c2443-fb");
 
@@ -77,7 +78,7 @@ int __init s3c2443_init(void)
         s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
         s3c_device_wdt.resource[1].end   = IRQ_S3C2443_WDT;
 
-        return sysdev_register(&s3c2443_sysdev);
+        return device_register(&s3c2443_dev);
 }
 
 void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no)
@@ -99,7 +100,7 @@ void __init s3c2443_map_io(void)
         iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc));
 }
 
-/* need to register class before we actually register the device, and
+/* need to register the subsystem before we actually register the device, and
  * we also need to ensure that it has been initialised before any of the
  * drivers even try to use it (even if not on an s3c2443 based system)
  * as a driver which may support both 2443 and 2440 may try and use it.
@@ -107,7 +108,7 @@ void __init s3c2443_map_io(void)
 
 static int __init s3c2443_core_init(void)
 {
-        return sysdev_class_register(&s3c2443_sysclass);
+        return subsys_system_register(&s3c2443_subsys, NULL);
 }
 
 core_initcall(s3c2443_core_init);
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 5552e048c2be..381586c7b1b2 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -8,6 +8,7 @@ config PLAT_S3C64XX
         bool
         depends on ARCH_S3C64XX
         select SAMSUNG_WAKEMASK
+        select PM_GENERIC_DOMAINS
         default y
         help
           Base platform code for any Samsung S3C64XX device
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index cfc0b9941808..f37016cebbe3 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -10,54 +10,49 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core files
-obj-y                           += cpu.o
-obj-y                           += clock.o
+# Core
 
-# Core support for S3C6400 system
+obj-y                           += common.o clock.o
+
+# Core support
 
 obj-$(CONFIG_CPU_S3C6400)       += s3c6400.o
 obj-$(CONFIG_CPU_S3C6410)       += s3c6410.o
 
-obj-y                           += irq.o
-obj-y                           += irq-eint.o
+# PM
+
+obj-$(CONFIG_PM)                += pm.o irq-pm.o sleep.o
 
 # DMA support
 
 obj-$(CONFIG_S3C64XX_DMA)       += dma.o
 
-# Device setup
+# Device support
 
-obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
-obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
-obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
-obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
-obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
-obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
-obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
+obj-y                           += dev-uart.o
+obj-y                           += dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
 
-# PM
+# Device setup
 
-obj-$(CONFIG_PM)                += pm.o
-obj-$(CONFIG_PM)                += sleep.o
-obj-$(CONFIG_PM)                += irq-pm.o
+obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP)    += setup-fb-24bpp.o
+obj-$(CONFIG_S3C64XX_SETUP_I2C0)        += setup-i2c0.o
+obj-$(CONFIG_S3C64XX_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_IDE)         += setup-ide.o
+obj-$(CONFIG_S3C64XX_SETUP_KEYPAD)      += setup-keypad.o
+obj-$(CONFIG_S3C64XX_SETUP_SDHCI)       += setup-sdhci.o
+obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
 
 # Machine support
 
-obj-$(CONFIG_MACH_ANW6410)      += mach-anw6410.o
-obj-$(CONFIG_MACH_SMDK6400)     += mach-smdk6400.o
-obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
-obj-$(CONFIG_MACH_REAL6410)     += mach-real6410.o
-obj-$(CONFIG_MACH_MINI6410)     += mach-mini6410.o
-obj-$(CONFIG_MACH_NCP)          += mach-ncp.o
-obj-$(CONFIG_MACH_HMT)          += mach-hmt.o
-obj-$(CONFIG_MACH_SMARTQ)       += mach-smartq.o
-obj-$(CONFIG_MACH_SMARTQ5)      += mach-smartq5.o
-obj-$(CONFIG_MACH_SMARTQ7)      += mach-smartq7.o
-obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
-
-# device support
-
-obj-y                           += dev-uart.o
-obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
+obj-$(CONFIG_MACH_ANW6410)              += mach-anw6410.o
+obj-$(CONFIG_MACH_HMT)                  += mach-hmt.o
+obj-$(CONFIG_MACH_MINI6410)             += mach-mini6410.o
+obj-$(CONFIG_MACH_NCP)                  += mach-ncp.o
+obj-$(CONFIG_MACH_REAL6410)             += mach-real6410.o
+obj-$(CONFIG_MACH_SMARTQ)               += mach-smartq.o
+obj-$(CONFIG_MACH_SMARTQ5)              += mach-smartq5.o
+obj-$(CONFIG_MACH_SMARTQ7)              += mach-smartq7.o
+obj-$(CONFIG_MACH_SMDK6400)             += mach-smdk6400.o
+obj-$(CONFIG_MACH_SMDK6410)             += mach-smdk6410.o
+obj-$(CONFIG_MACH_WLF_CRAGG_6410)       += mach-crag6410.o mach-crag6410-module.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 39c238d7a3dc..625219b9cefc 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -705,7 +705,7 @@ static struct clksrc_clk *init_parents[] = {
 
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
 
-void __init_or_cpufreq s3c6400_setup_clocks(void)
+void __init_or_cpufreq s3c64xx_setup_clocks(void)
 {
         struct clk *xtal_clk;
         unsigned long xtal;
@@ -804,7 +804,7 @@ static struct clk *clks[] __initdata = {
  * as ARMCLK as well as the necessary parent clocks.
  *
  * This call does not setup the clocks, which is left to the
- * s3c6400_setup_clocks() call which may be needed by the cpufreq
+ * s3c64xx_setup_clocks() call which may be needed by the cpufreq
  * or resume code to re-set the clocks if the bootloader has changed
  * them.
  */
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
new file mode 100644
index 000000000000..4a7394d4bd9e
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -0,0 +1,385 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Common Codes for S3C64XX machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/vic.h>
+
+#include <mach/map.h>
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/pm.h>
+#include <plat/gpio-cfg.h>
+#include <plat/irq-uart.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/regs-irqtype.h>
+#include <plat/regs-serial.h>
+#include <plat/watchdog-reset.h>
+
+#include "common.h"
+
+/* uart registration process */
+
+void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
+}
+
+/* table of supported CPUs */
+
+static const char name_s3c6400[] = "S3C6400";
+static const char name_s3c6410[] = "S3C6410";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S3C6400_CPU_ID,
+                .idmask         = S3C64XX_CPU_MASK,
+                .map_io         = s3c6400_map_io,
+                .init_clocks    = s3c6400_init_clocks,
+                .init_uarts     = s3c64xx_init_uarts,
+                .init           = s3c6400_init,
+                .name           = name_s3c6400,
+        }, {
+                .idcode         = S3C6410_CPU_ID,
+                .idmask         = S3C64XX_CPU_MASK,
+                .map_io         = s3c6410_map_io,
+                .init_clocks    = s3c6410_init_clocks,
+                .init_uarts     = s3c64xx_init_uarts,
+                .init           = s3c6410_init,
+                .name           = name_s3c6410,
+        },
+};
+
+/* minimal IO mapping */
+
+/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */
+#define UART_OFFS (S3C_PA_UART & 0xfffff)
+
+static struct map_desc s3c_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SYSCON),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_MEM,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SROM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
+                .pfn            = __phys_to_pfn(S3C_PA_UART),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC0,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC1,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S3C_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C64XX_VA_GPIO,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C64XX_VA_MODEM,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_MODEM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
+                .length         = SZ_1K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct bus_type s3c64xx_subsys = {
+        .name           = "s3c64xx-core",
+        .dev_name       = "s3c64xx-core",
+};
+
+static struct device s3c64xx_dev = {
+        .bus    = &s3c64xx_subsys,
+};
+
+/* read cpu identification code */
+
+void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
+{
+        /* initialise the io descriptors we need for initialisation */
+        iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
+        iotable_init(mach_desc, size);
+        init_consistent_dma_size(SZ_8M);
+
+        /* detect cpu id */
+        s3c64xx_init_cpu();
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+static __init int s3c64xx_dev_init(void)
+{
+        subsys_system_register(&s3c64xx_subsys, NULL);
+        return device_register(&s3c64xx_dev);
+}
+core_initcall(s3c64xx_dev_init);
+
+/*
+ * setup the sources the vic should advertise resume
+ * for, even though it is not doing the wake
+ * (set_irq_wake needs to be valid)
+ */
+#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
+#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
+                         1 << (IRQ_PENDN - IRQ_VIC1_BASE) |     \
+                         1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) |    \
+                         1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) |    \
+                         1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
+
+void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
+{
+        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
+
+        /* initialise the pair of VICs */
+        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
+        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
+
+        /* add the timer sub-irqs */
+        s3c_init_vic_timer_irq(5, IRQ_TIMER0);
+}
+
+#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
+#define eint_irq_to_bit(irq)    ((u32)(1 << eint_offset(irq)))
+
+static inline void s3c_irq_eint_mask(struct irq_data *data)
+{
+        u32 mask;
+
+        mask = __raw_readl(S3C64XX_EINT0MASK);
+        mask |= (u32)data->chip_data;
+        __raw_writel(mask, S3C64XX_EINT0MASK);
+}
+
+static void s3c_irq_eint_unmask(struct irq_data *data)
+{
+        u32 mask;
+
+        mask = __raw_readl(S3C64XX_EINT0MASK);
+        mask &= ~((u32)data->chip_data);
+        __raw_writel(mask, S3C64XX_EINT0MASK);
+}
+
+static inline void s3c_irq_eint_ack(struct irq_data *data)
+{
+        __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND);
+}
+
+static void s3c_irq_eint_maskack(struct irq_data *data)
+{
+        /* compiler should in-line these */
+        s3c_irq_eint_mask(data);
+        s3c_irq_eint_ack(data);
+}
+
+static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+        int offs = eint_offset(data->irq);
+        int pin, pin_val;
+        int shift;
+        u32 ctrl, mask;
+        u32 newvalue = 0;
+        void __iomem *reg;
+
+        if (offs > 27)
+                return -EINVAL;
+
+        if (offs <= 15)
+                reg = S3C64XX_EINT0CON0;
+        else
+                reg = S3C64XX_EINT0CON1;
+
+        switch (type) {
+        case IRQ_TYPE_NONE:
+                printk(KERN_WARNING "No edge setting!\n");
+                break;
+
+        case IRQ_TYPE_EDGE_RISING:
+                newvalue = S3C2410_EXTINT_RISEEDGE;
+                break;
+
+        case IRQ_TYPE_EDGE_FALLING:
+                newvalue = S3C2410_EXTINT_FALLEDGE;
+                break;
+
+        case IRQ_TYPE_EDGE_BOTH:
+                newvalue = S3C2410_EXTINT_BOTHEDGE;
+                break;
+
+        case IRQ_TYPE_LEVEL_LOW:
+                newvalue = S3C2410_EXTINT_LOWLEV;
+                break;
+
+        case IRQ_TYPE_LEVEL_HIGH:
+                newvalue = S3C2410_EXTINT_HILEV;
+                break;
+
+        default:
+                printk(KERN_ERR "No such irq type %d", type);
+                return -1;
+        }
+
+        if (offs <= 15)
+                shift = (offs / 2) * 4;
+        else
+                shift = ((offs - 16) / 2) * 4;
+        mask = 0x7 << shift;
+
+        ctrl = __raw_readl(reg);
+        ctrl &= ~mask;
+        ctrl |= newvalue << shift;
+        __raw_writel(ctrl, reg);
+
+        /* set the GPIO pin appropriately */
+
+        if (offs < 16) {
+                pin = S3C64XX_GPN(offs);
+                pin_val = S3C_GPIO_SFN(2);
+        } else if (offs < 23) {
+                pin = S3C64XX_GPL(offs + 8 - 16);
+                pin_val = S3C_GPIO_SFN(3);
+        } else {
+                pin = S3C64XX_GPM(offs - 23);
+                pin_val = S3C_GPIO_SFN(3);
+        }
+
+        s3c_gpio_cfgpin(pin, pin_val);
+
+        return 0;
+}
+
+static struct irq_chip s3c_irq_eint = {
+        .name           = "s3c-eint",
+        .irq_mask       = s3c_irq_eint_mask,
+        .irq_unmask     = s3c_irq_eint_unmask,
+        .irq_mask_ack   = s3c_irq_eint_maskack,
+        .irq_ack        = s3c_irq_eint_ack,
+        .irq_set_type   = s3c_irq_eint_set_type,
+        .irq_set_wake   = s3c_irqext_wake,
+};
+
+/* s3c_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(27). It is designed to be inlined into
+ * the specific handlers s3c_irq_demux_eintX_Y.
+ */
+static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end)
+{
+        u32 status = __raw_readl(S3C64XX_EINT0PEND);
+        u32 mask = __raw_readl(S3C64XX_EINT0MASK);
+        unsigned int irq;
+
+        status &= ~mask;
+        status >>= start;
+        status &= (1 << (end - start + 1)) - 1;
+
+        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+                if (status & 1)
+                        generic_handle_irq(irq);
+
+                status >>= 1;
+        }
+}
+
+static void s3c_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(0, 3);
+}
+
+static void s3c_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(4, 11);
+}
+
+static void s3c_irq_demux_eint12_19(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(12, 19);
+}
+
+static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
+{
+        s3c_irq_demux_eint(20, 27);
+}
+
+static int __init s3c64xx_init_irq_eint(void)
+{
+        int irq;
+
+        for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
+                irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
+                irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
+                set_irq_flags(irq, IRQF_VALID);
+        }
+
+        irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
+        irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
+        irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
+        irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
+
+        return 0;
+}
+arch_initcall(s3c64xx_init_irq_eint);
+
+void s3c64xx_restart(char mode, const char *cmd)
+{
+        if (mode != 's')
+                arch_wdt_reset();
+
+        /* if all else fails, or mode was for soft, jump to 0 */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
new file mode 100644
index 000000000000..5eb9c9a7d73b
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Common Header for S3C64XX machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
+#define __ARCH_ARM_MACH_S3C64XX_COMMON_H
+
+void s3c64xx_init_irq(u32 vic0, u32 vic1);
+void s3c64xx_init_io(struct map_desc *mach_desc, int size);
+
+void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
+void s3c64xx_setup_clocks(void);
+
+void s3c64xx_restart(char mode, const char *cmd);
+
+extern struct syscore_ops s3c64xx_irq_syscore_ops;
+
+#ifdef CONFIG_CPU_S3C6400
+
+extern  int s3c6400_init(void);
+extern void s3c6400_init_irq(void);
+extern void s3c6400_map_io(void);
+extern void s3c6400_init_clocks(int xtal);
+
+#else
+#define s3c6400_init_clocks NULL
+#define s3c6400_map_io NULL
+#define s3c6400_init NULL
+#endif
+
+#ifdef CONFIG_CPU_S3C6410
+
+extern  int s3c6410_init(void);
+extern void s3c6410_init_irq(void);
+extern void s3c6410_map_io(void);
+extern void s3c6410_init_clocks(int xtal);
+
+#else
+#define s3c6410_init_clocks NULL
+#define s3c6410_map_io NULL
+#define s3c6410_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
deleted file mode 100644
index de085b798aa4..000000000000
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/cpu.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX CPU Support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/dma-mapping.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <plat/regs-serial.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
-
-/* table of supported CPUs */
-
-static const char name_s3c6400[] = "S3C6400";
-static const char name_s3c6410[] = "S3C6410";
-
-static struct cpu_table cpu_ids[] __initdata = {
-        {
-                .idcode         = S3C6400_CPU_ID,
-                .idmask         = S3C64XX_CPU_MASK,
-                .map_io         = s3c6400_map_io,
-                .init_clocks    = s3c6400_init_clocks,
-                .init_uarts     = s3c6400_init_uarts,
-                .init           = s3c6400_init,
-                .name           = name_s3c6400,
-        }, {
-                .idcode         = S3C6410_CPU_ID,
-                .idmask         = S3C64XX_CPU_MASK,
-                .map_io         = s3c6410_map_io,
-                .init_clocks    = s3c6410_init_clocks,
-                .init_uarts     = s3c6410_init_uarts,
-                .init           = s3c6410_init,
-                .name           = name_s3c6410,
-        },
-};
-
-/* minimal IO mapping */
-
-/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
-#define UART_OFFS (S3C_PA_UART & 0xfffff)
-
-static struct map_desc s3c_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_SYS,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_SYSCON),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_MEM,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_SROM),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
-                .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC0,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC1,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_TIMER,
-                .pfn            = __phys_to_pfn(S3C_PA_TIMER),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C64XX_VA_GPIO,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_GPIO),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C64XX_VA_MODEM,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_MODEM),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
-                .length         = SZ_1K,
-                .type           = MT_DEVICE,
-        },
-};
-
-
-struct sysdev_class s3c64xx_sysclass = {
-        .name   = "s3c64xx-core",
-};
-
-static struct sys_device s3c64xx_sysdev = {
-        .cls    = &s3c64xx_sysclass,
-};
-
-/* uart registration process */
-
-void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
-}
-
-/* read cpu identification code */
-
-void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
-{
-        /* initialise the io descriptors we need for initialisation */
-        iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
-        iotable_init(mach_desc, size);
-        init_consistent_dma_size(SZ_8M);
-
-        /* detect cpu id */
-        s3c64xx_init_cpu();
-
-        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
-}
-
-static __init int s3c64xx_sysdev_init(void)
-{
-        sysdev_class_register(&s3c64xx_sysclass);
-        return sysdev_register(&s3c64xx_sysdev);
-}
-
-core_initcall(s3c64xx_sysdev_init);
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b42089eb4..3341fd118723 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -10,6 +10,7 @@
 
 #include <linux/kernel.h>
 #include <linux/string.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 17d62f4f8204..f2a7a1725596 100644
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -16,7 +16,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/dmapool.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/errno.h>
 #include <linux/slab.h>
 #include <linux/delay.h>
@@ -35,7 +35,7 @@
 /* dma channel state information */
 
 struct s3c64xx_dmac {
-        struct sys_device        sysdev;
+        struct device           dev;
         struct clk              *clk;
         void __iomem            *regs;
         struct s3c2410_dma_chan *channels;
@@ -631,8 +631,9 @@ static irqreturn_t s3c64xx_dma_irq(int irq, void *pw)
         return IRQ_HANDLED;
 }
 
-static struct sysdev_class dma_sysclass = {
+static struct bus_type dma_subsys = {
         .name           = "s3c64xx-dma",
+        .dev_name       = "s3c64xx-dma",
 };
 
 static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
@@ -651,12 +652,12 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
                 return -ENOMEM;
         }
 
-        dmac->sysdev.id = chno / 8;
-        dmac->sysdev.cls = &dma_sysclass;
+        dmac->dev.id = chno / 8;
+        dmac->dev.bus = &dma_subsys;
 
-        err = sysdev_register(&dmac->sysdev);
+        err = device_register(&dmac->dev);
         if (err) {
-                printk(KERN_ERR "%s: failed to register sysdevice\n", __func__);
+                printk(KERN_ERR "%s: failed to register device\n", __func__);
                 goto err_alloc;
         }
 
@@ -667,7 +668,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
                 goto err_dev;
         }
 
-        snprintf(clkname, sizeof(clkname), "dma%d", dmac->sysdev.id);
+        snprintf(clkname, sizeof(clkname), "dma%d", dmac->dev.id);
 
         dmac->clk = clk_get(NULL, clkname);
         if (IS_ERR(dmac->clk)) {
@@ -715,7 +716,7 @@ err_clk:
 err_map:
         iounmap(regs);
 err_dev:
-        sysdev_unregister(&dmac->sysdev);
+        device_unregister(&dmac->dev);
 err_alloc:
         kfree(dmac);
         return err;
@@ -733,9 +734,9 @@ static int __init s3c64xx_dma_init(void)
                 return -ENOMEM;
         }
 
-        ret = sysdev_class_register(&dma_sysclass);
+        ret = subsys_system_register(&dma_subsys, NULL);
         if (ret) {
-                printk(KERN_ERR "%s: failed to create sysclass\n", __func__);
+                printk(KERN_ERR "%s: failed to create subsys\n", __func__);
                 return -ENOMEM;
         }
 
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index dd362604dcce..dc2bc15142ce 100644
--- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -12,7 +12,8 @@
  * warranty of any kind, whether express or implied.
 */
 
-#include <mach/map.h>
-#include <mach/irqs.h>
+                .macro  disable_fiq
+                .endm
 
-#include <asm/entry-macro-vic2.S>
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a7147..353ed4389ae7 100644
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
@@ -11,20 +11,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/watchdog-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
 }
 
-static void arch_reset(char mode, const char *cmd)
-{
-        if (mode != 's')
-                arch_wdt_reset();
-
-        /* if all else fails, or mode was for soft, jump to 0 */
-        cpu_reset(0);
-}
-
 #endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
deleted file mode 100644
index 23f75e556a30..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
- *
- * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- *                    http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C6400 vmalloc definition
-*/
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     0xF6000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
deleted file mode 100644
index 4d203be1f4c3..000000000000
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/* arch/arm/plat-s3c64xx/irq-eint.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling for IRQ_EINT(x)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/sysdev.h>
-#include <linux/gpio.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/hardware/vic.h>
-
-#include <plat/regs-irqtype.h>
-#include <mach/regs-gpio.h>
-#include <plat/gpio-cfg.h>
-
-#include <mach/map.h>
-#include <plat/cpu.h>
-#include <plat/pm.h>
-
-#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
-#define eint_irq_to_bit(irq)    ((u32)(1 << eint_offset(irq)))
-
-static inline void s3c_irq_eint_mask(struct irq_data *data)
-{
-        u32 mask;
-
-        mask = __raw_readl(S3C64XX_EINT0MASK);
-        mask |= (u32)data->chip_data;
-        __raw_writel(mask, S3C64XX_EINT0MASK);
-}
-
-static void s3c_irq_eint_unmask(struct irq_data *data)
-{
-        u32 mask;
-
-        mask = __raw_readl(S3C64XX_EINT0MASK);
-        mask &= ~((u32)data->chip_data);
-        __raw_writel(mask, S3C64XX_EINT0MASK);
-}
-
-static inline void s3c_irq_eint_ack(struct irq_data *data)
-{
-        __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND);
-}
-
-static void s3c_irq_eint_maskack(struct irq_data *data)
-{
-        /* compiler should in-line these */
-        s3c_irq_eint_mask(data);
-        s3c_irq_eint_ack(data);
-}
-
-static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-        int offs = eint_offset(data->irq);
-        int pin, pin_val;
-        int shift;
-        u32 ctrl, mask;
-        u32 newvalue = 0;
-        void __iomem *reg;
-
-        if (offs > 27)
-                return -EINVAL;
-
-        if (offs <= 15)
-                reg = S3C64XX_EINT0CON0;
-        else
-                reg = S3C64XX_EINT0CON1;
-
-        switch (type) {
-        case IRQ_TYPE_NONE:
-                printk(KERN_WARNING "No edge setting!\n");
-                break;
-
-        case IRQ_TYPE_EDGE_RISING:
-                newvalue = S3C2410_EXTINT_RISEEDGE;
-                break;
-
-        case IRQ_TYPE_EDGE_FALLING:
-                newvalue = S3C2410_EXTINT_FALLEDGE;
-                break;
-
-        case IRQ_TYPE_EDGE_BOTH:
-                newvalue = S3C2410_EXTINT_BOTHEDGE;
-                break;
-
-        case IRQ_TYPE_LEVEL_LOW:
-                newvalue = S3C2410_EXTINT_LOWLEV;
-                break;
-
-        case IRQ_TYPE_LEVEL_HIGH:
-                newvalue = S3C2410_EXTINT_HILEV;
-                break;
-
-        default:
-                printk(KERN_ERR "No such irq type %d", type);
-                return -1;
-        }
-
-        if (offs <= 15)
-                shift = (offs / 2) * 4;
-        else
-                shift = ((offs - 16) / 2) * 4;
-        mask = 0x7 << shift;
-
-        ctrl = __raw_readl(reg);
-        ctrl &= ~mask;
-        ctrl |= newvalue << shift;
-        __raw_writel(ctrl, reg);
-
-        /* set the GPIO pin appropriately */
-
-        if (offs < 16) {
-                pin = S3C64XX_GPN(offs);
-                pin_val = S3C_GPIO_SFN(2);
-        } else if (offs < 23) {
-                pin = S3C64XX_GPL(offs + 8 - 16);
-                pin_val = S3C_GPIO_SFN(3);
-        } else {
-                pin = S3C64XX_GPM(offs - 23);
-                pin_val = S3C_GPIO_SFN(3);
-        }
-
-        s3c_gpio_cfgpin(pin, pin_val);
-
-        return 0;
-}
-
-static struct irq_chip s3c_irq_eint = {
-        .name           = "s3c-eint",
-        .irq_mask       = s3c_irq_eint_mask,
-        .irq_unmask     = s3c_irq_eint_unmask,
-        .irq_mask_ack   = s3c_irq_eint_maskack,
-        .irq_ack        = s3c_irq_eint_ack,
-        .irq_set_type   = s3c_irq_eint_set_type,
-        .irq_set_wake   = s3c_irqext_wake,
-};
-
-/* s3c_irq_demux_eint
- *
- * This function demuxes the IRQ from the group0 external interrupts,
- * from IRQ_EINT(0) to IRQ_EINT(27). It is designed to be inlined into
- * the specific handlers s3c_irq_demux_eintX_Y.
- */
-static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end)
-{
-        u32 status = __raw_readl(S3C64XX_EINT0PEND);
-        u32 mask = __raw_readl(S3C64XX_EINT0MASK);
-        unsigned int irq;
-
-        status &= ~mask;
-        status >>= start;
-        status &= (1 << (end - start + 1)) - 1;
-
-        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
-                if (status & 1)
-                        generic_handle_irq(irq);
-
-                status >>= 1;
-        }
-}
-
-static void s3c_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_eint(0, 3);
-}
-
-static void s3c_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_eint(4, 11);
-}
-
-static void s3c_irq_demux_eint12_19(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_eint(12, 19);
-}
-
-static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
-{
-        s3c_irq_demux_eint(20, 27);
-}
-
-static int __init s3c64xx_init_irq_eint(void)
-{
-        int irq;
-
-        for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
-                irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
-                irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
-                set_irq_flags(irq, IRQF_VALID);
-        }
-
-        irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
-        irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
-        irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
-        irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
-
-        return 0;
-}
-
-arch_initcall(s3c64xx_init_irq_eint);
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
deleted file mode 100644
index b07357e94958..000000000000
--- a/arch/arm/mach-s3c64xx/irq.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/* arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/serial_core.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/hardware/vic.h>
-
-#include <mach/map.h>
-#include <plat/irq-vic-timer.h>
-#include <plat/irq-uart.h>
-#include <plat/cpu.h>
-
-/* setup the sources the vic should advertise resume for, even though it
- * is not doing the wake (set_irq_wake needs to be valid) */
-#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
-#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
-                         1 << (IRQ_PENDN - IRQ_VIC1_BASE) |     \
-                         1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) |    \
-                         1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) |    \
-                         1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
-
-void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
-{
-        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
-
-        /* initialise the pair of VICs */
-        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
-        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
-        /* add the timer sub-irqs */
-        s3c_init_vic_timer_irq(5, IRQ_TIMER0);
-}
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 8eba88e7209e..b86f2779e4e6 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -30,6 +30,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -45,13 +46,14 @@
 #include <plat/fb.h>
 #include <plat/regs-fb-v4.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-modem.h>
 
+#include "common.h"
+
 /* DM9000 */
 #define ANW6410_PA_DM9000       (0x18000000)
 
@@ -236,7 +238,9 @@ MACHINE_START(ANW6410, "A&W6410")
         .atag_offset    = 0x100,
 
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = anw6410_map_io,
         .init_machine   = anw6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 66668565ee75..f208154b1382 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -8,7 +8,7 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/i2c.h>
 
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index d04b65448510..fb786b6a2eae 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -37,6 +37,7 @@
 #include <linux/mfd/wm831x/irq.h>
 #include <linux/mfd/wm831x/gpio.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
@@ -50,7 +51,6 @@
 
 #include <mach/regs-gpio-memport.h>
 
-#include <plat/s3c6410.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-fb-v4.h>
 #include <plat/fb.h>
@@ -66,6 +66,8 @@
 #include <plat/iic.h>
 #include <plat/pm.h>
 
+#include "common.h"
+
 /* serial port setup */
 
 #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
@@ -704,14 +706,16 @@ static void __init crag6410_machine_init(void)
 
         regulator_has_full_constraints();
 
-        s3c_pm_init();
+        s3c64xx_pm_init();
 }
 
 MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
         /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
         .atag_offset    = 0x100,
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = crag6410_map_io,
         .init_machine   = crag6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 952f75ff5deb..521e07b8501b 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -29,6 +29,7 @@
 #include <mach/hardware.h>
 #include <mach/map.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 
@@ -37,12 +38,13 @@
 #include <plat/fb.h>
 #include <plat/nand.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -267,7 +269,9 @@ MACHINE_START(HMT, "Airgoo-HMT")
         /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */
         .atag_offset    = 0x100,
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = hmt_map_io,
         .init_machine   = hmt_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 1bc85c359498..c34c2ab22ead 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -24,6 +24,7 @@
 #include <linux/serial_core.h>
 #include <linux/types.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -33,7 +34,6 @@
 #include <mach/regs-modem.h>
 #include <mach/regs-srom.h>
 
-#include <plat/s3c6410.h>
 #include <plat/adc.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
@@ -45,6 +45,8 @@
 
 #include <video/platform_lcd.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -345,7 +347,9 @@ MACHINE_START(MINI6410, "MINI6410")
         /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
         .atag_offset    = 0x100,
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = mini6410_map_io,
         .init_machine   = mini6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index cb13cba98b3d..0efa2ba783b2 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -25,6 +25,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -39,12 +40,13 @@
 #include <plat/iic.h>
 #include <plat/fb.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -99,7 +101,9 @@ MACHINE_START(NCP, "NCP")
         /* Maintainer: Samsung Electronics */
         .atag_offset    = 0x100,
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = ncp_map_io,
         .init_machine   = ncp_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 87281e4b8471..be2a9a22ab74 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -25,6 +25,7 @@
 #include <linux/serial_core.h>
 #include <linux/types.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -34,7 +35,6 @@
 #include <mach/regs-modem.h>
 #include <mach/regs-srom.h>
 
-#include <plat/s3c6410.h>
 #include <plat/adc.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
@@ -46,6 +46,8 @@
 
 #include <video/platform_lcd.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -326,7 +328,9 @@ MACHINE_START(REAL6410, "REAL6410")
         .atag_offset    = 0x100,
 
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = real6410_map_io,
         .init_machine   = real6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index cb1ebeb08763..ce31db136231 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -40,6 +40,8 @@
 
 #include <video/platform_lcd.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 94c831d88365..3f42431d4dda 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -17,19 +17,20 @@
 #include <linux/leds.h>
 #include <linux/platform_device.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
 
-#include <plat/s3c6410.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
 #include "mach-smartq.h"
 
 static struct gpio_led smartq5_leds[] = {
@@ -148,7 +149,9 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
         /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
         .atag_offset    = 0x100,
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smartq_map_io,
         .init_machine   = smartq5_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index f112547ce80a..e5c09b6db967 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -17,19 +17,20 @@
 #include <linux/leds.h>
 #include <linux/platform_device.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
 
-#include <plat/s3c6410.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
 #include "mach-smartq.h"
 
 static struct gpio_led smartq7_leds[] = {
@@ -164,7 +165,9 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
         /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
         .atag_offset    = 0x100,
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smartq_map_io,
         .init_machine   = smartq7_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 73450c2b530a..5f096534f4c4 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -22,6 +22,7 @@
 
 #include <asm/mach-types.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -31,12 +32,13 @@
 
 #include <plat/regs-serial.h>
 
-#include <plat/s3c6400.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/iic.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -88,7 +90,9 @@ MACHINE_START(SMDK6400, "SMDK6400")
         .atag_offset    = 0x100,
 
         .init_irq       = s3c6400_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdk6400_map_io,
         .init_machine   = smdk6400_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 8bc8edd85e5a..ca6fc204f0ea 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -63,7 +64,6 @@
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -73,6 +73,8 @@
 #include <plat/backlight.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -700,7 +702,9 @@ MACHINE_START(SMDK6410, "SMDK6410")
         .atag_offset    = 0x100,
 
         .init_irq       = s3c6410_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdk6410_map_io,
         .init_machine   = smdk6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index b375cd5c47cb..7d3e81b9dd06 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -17,10 +17,12 @@
 #include <linux/serial_core.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
+#include <linux/pm_domain.h>
 
 #include <mach/map.h>
 #include <mach/irqs.h>
 
+#include <plat/devs.h>
 #include <plat/pm.h>
 #include <plat/wakeup-mask.h>
 
@@ -31,6 +33,148 @@
 #include <mach/regs-gpio-memport.h>
 #include <mach/regs-modem.h>
 
+struct s3c64xx_pm_domain {
+        char *const name;
+        u32 ena;
+        u32 pwr_stat;
+        struct generic_pm_domain pd;
+};
+
+static int s3c64xx_pd_off(struct generic_pm_domain *domain)
+{
+        struct s3c64xx_pm_domain *pd;
+        u32 val;
+
+        pd = container_of(domain, struct s3c64xx_pm_domain, pd);
+
+        val = __raw_readl(S3C64XX_NORMAL_CFG);
+        val &= ~(pd->ena);
+        __raw_writel(val, S3C64XX_NORMAL_CFG);
+
+        return 0;
+}
+
+static int s3c64xx_pd_on(struct generic_pm_domain *domain)
+{
+        struct s3c64xx_pm_domain *pd;
+        u32 val;
+        long retry = 1000000L;
+
+        pd = container_of(domain, struct s3c64xx_pm_domain, pd);
+
+        val = __raw_readl(S3C64XX_NORMAL_CFG);
+        val |= pd->ena;
+        __raw_writel(val, S3C64XX_NORMAL_CFG);
+
+        /* Not all domains provide power status readback */
+        if (pd->pwr_stat) {
+                do {
+                        cpu_relax();
+                        if (__raw_readl(S3C64XX_BLK_PWR_STAT) & pd->pwr_stat)
+                                break;
+                } while (retry--);
+
+                if (!retry) {
+                        pr_err("Failed to start domain %s\n", pd->name);
+                        return -EBUSY;
+                }
+        }
+
+        return 0;
+}
+
+static struct s3c64xx_pm_domain s3c64xx_pm_irom = {
+        .name = "IROM",
+        .ena = S3C64XX_NORMALCFG_IROM_ON,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_etm = {
+        .name = "ETM",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_ETM_ON,
+        .pwr_stat = S3C64XX_BLKPWRSTAT_ETM,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_s = {
+        .name = "S",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_S_ON,
+        .pwr_stat = S3C64XX_BLKPWRSTAT_S,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_f = {
+        .name = "F",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_F_ON,
+        .pwr_stat = S3C64XX_BLKPWRSTAT_F,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_p = {
+        .name = "P",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_P_ON,
+        .pwr_stat = S3C64XX_BLKPWRSTAT_P,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_i = {
+        .name = "I",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_I_ON,
+        .pwr_stat = S3C64XX_BLKPWRSTAT_I,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_g = {
+        .name = "G",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_G_ON,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain s3c64xx_pm_v = {
+        .name = "V",
+        .ena = S3C64XX_NORMALCFG_DOMAIN_V_ON,
+        .pwr_stat = S3C64XX_BLKPWRSTAT_V,
+        .pd = {
+                .power_off = s3c64xx_pd_off,
+                .power_on = s3c64xx_pd_on,
+        },
+};
+
+static struct s3c64xx_pm_domain *s3c64xx_always_on_pm_domains[] = {
+        &s3c64xx_pm_irom,
+};
+
+static struct s3c64xx_pm_domain *s3c64xx_pm_domains[] = {
+        &s3c64xx_pm_etm,
+        &s3c64xx_pm_g,
+        &s3c64xx_pm_v,
+        &s3c64xx_pm_i,
+        &s3c64xx_pm_p,
+        &s3c64xx_pm_s,
+        &s3c64xx_pm_f,
+};
+
 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
 void s3c_pm_debug_smdkled(u32 set, u32 clear)
 {
@@ -89,6 +233,8 @@ static struct sleep_save misc_save[] = {
 
         SAVE_ITEM(S3C64XX_SDMA_SEL),
         SAVE_ITEM(S3C64XX_MODEM_MIFPCON),
+
+        SAVE_ITEM(S3C64XX_NORMAL_CFG),
 };
 
 void s3c_pm_configure_extint(void)
@@ -179,7 +325,26 @@ static void s3c64xx_pm_prepare(void)
         __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
 }
 
-static int s3c64xx_pm_init(void)
+int __init s3c64xx_pm_init(void)
+{
+        int i;
+
+        s3c_pm_init();
+
+        for (i = 0; i < ARRAY_SIZE(s3c64xx_always_on_pm_domains); i++)
+                pm_genpd_init(&s3c64xx_always_on_pm_domains[i]->pd,
+                              &pm_domain_always_on_gov, false);
+
+        for (i = 0; i < ARRAY_SIZE(s3c64xx_pm_domains); i++)
+                pm_genpd_init(&s3c64xx_pm_domains[i]->pd, NULL, false);
+
+        if (dev_get_platdata(&s3c_device_fb.dev))
+                pm_genpd_add_device(&s3c64xx_pm_f.pd, &s3c_device_fb.dev);
+
+        return 0;
+}
+
+static __init int s3c64xx_pm_initcall(void)
 {
         pm_cpu_prep = s3c64xx_pm_prepare;
         pm_cpu_sleep = s3c64xx_cpu_suspend;
@@ -198,5 +363,12 @@ static int s3c64xx_pm_init(void)
 
         return 0;
 }
+arch_initcall(s3c64xx_pm_initcall);
+
+static __init int s3c64xx_pm_late_initcall(void)
+{
+        pm_genpd_poweroff_unused();
 
-arch_initcall(s3c64xx_pm_init);
+        return 0;
+}
+late_initcall(s3c64xx_pm_late_initcall);
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 7a3bc32df425..4869714c6f1b 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -17,7 +17,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 
@@ -38,7 +38,8 @@
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
-#include <plat/s3c6400.h>
+
+#include "common.h"
 
 void __init s3c6400_map_io(void)
 {
@@ -60,7 +61,7 @@ void __init s3c6400_map_io(void)
 void __init s3c6400_init_clocks(int xtal)
 {
         s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
-        s3c6400_setup_clocks();
+        s3c64xx_setup_clocks();
 }
 
 void __init s3c6400_init_irq(void)
@@ -70,17 +71,18 @@ void __init s3c6400_init_irq(void)
         s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
 }
 
-struct sysdev_class s3c6400_sysclass = {
-        .name   = "s3c6400-core",
+static struct bus_type s3c6400_subsys = {
+        .name           = "s3c6400-core",
+        .dev_name       = "s3c6400-core",
 };
 
-static struct sys_device s3c6400_sysdev = {
-        .cls    = &s3c6400_sysclass,
+static struct device s3c6400_dev = {
+        .bus    = &s3c6400_subsys,
 };
 
 static int __init s3c6400_core_init(void)
 {
-        return sysdev_class_register(&s3c6400_sysclass);
+        return subsys_system_register(&s3c6400_subsys, NULL);
 }
 
 core_initcall(s3c6400_core_init);
@@ -89,5 +91,5 @@ int __init s3c6400_init(void)
 {
         printk("S3C6400: Initialising architecture\n");
 
-        return sysdev_register(&s3c6400_sysdev);
+        return device_register(&s3c6400_dev);
 }
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 4117003464ad..31c29fdf1800 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -18,7 +18,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 
@@ -41,8 +41,8 @@
 #include <plat/adc-core.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
+
+#include "common.h"
 
 void __init s3c6410_map_io(void)
 {
@@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
         s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
-        s3c6400_setup_clocks();
+        s3c64xx_setup_clocks();
 }
 
 void __init s3c6410_init_irq(void)
@@ -75,17 +75,18 @@ void __init s3c6410_init_irq(void)
         s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
 }
 
-struct sysdev_class s3c6410_sysclass = {
-        .name   = "s3c6410-core",
+struct bus_type s3c6410_subsys = {
+        .name           = "s3c6410-core",
+        .dev_name       = "s3c6410-core",
 };
 
-static struct sys_device s3c6410_sysdev = {
-        .cls    = &s3c6410_sysclass,
+static struct device s3c6410_dev = {
+        .bus    = &s3c6410_subsys,
 };
 
 static int __init s3c6410_core_init(void)
 {
-        return sysdev_class_register(&s3c6410_sysclass);
+        return subsys_system_register(&s3c6410_subsys, NULL);
 }
 
 core_initcall(s3c6410_core_init);
@@ -94,5 +95,5 @@ int __init s3c6410_init(void)
 {
         printk("S3C6410: Initialising architecture\n");
 
-        return sysdev_register(&s3c6410_sysdev);
+        return device_register(&s3c6410_dev);
 }
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 83d2afb79e9f..2cf80026c58d 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -20,7 +20,7 @@
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
-extern void s3c64xx_fb_gpio_setup_24bpp(void)
+void s3c64xx_fb_gpio_setup_24bpp(void)
 {
         s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
         s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index a1324d8dc4e0..d3f7409999f2 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -10,14 +10,16 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for S5P64X0 system
+# Core
 
-obj-$(CONFIG_ARCH_S5P64X0)      += cpu.o init.o clock.o dma.o
-obj-$(CONFIG_ARCH_S5P64X0)      += setup-i2c0.o irq-eint.o
+obj-y                           += common.o clock.o
 obj-$(CONFIG_CPU_S5P6440)       += clock-s5p6440.o
 obj-$(CONFIG_CPU_S5P6450)       += clock-s5p6450.o
+
 obj-$(CONFIG_PM)                += pm.o irq-pm.o
 
+obj-y                           += dma.o
+
 # machine support
 
 obj-$(CONFIG_MACH_SMDK6440)     += mach-smdk6440.o
@@ -28,5 +30,6 @@ obj-$(CONFIG_MACH_SMDK6450)	+= mach-smdk6450.o
 obj-y                           += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
 
+obj-y                                   += setup-i2c0.o
 obj-$(CONFIG_S5P64X0_SETUP_I2C1)        += setup-i2c1.o
 obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP)    += setup-fb-24bpp.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index c54c65d511f0..eb4ffe331e1a 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -17,7 +17,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -31,7 +31,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5p6440.h>
+
+#include "common.h"
 
 static u32 epll_div[][5] = {
         { 36000000,     0,      48, 1, 4 },
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 2d04abfba12e..bb7ee912090b 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -17,7 +17,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -31,7 +31,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5p6450.h>
+
+#include "common.h"
 
 static struct clksrc_clk clk_mout_dpll = {
         .clk    = {
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
index b52c6e2f37a6..241d0e645c85 100644
--- a/arch/arm/mach-s5p64x0/clock.c
+++ b/arch/arm/mach-s5p64x0/clock.c
@@ -17,7 +17,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -30,8 +30,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
+
+#include "common.h"
 
 struct clksrc_clk clk_mout_apll = {
         .clk    = {
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
new file mode 100644
index 000000000000..28d0b918cd4b
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -0,0 +1,469 @@
+/*
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Codes for S5P64X0 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+
+#include <asm/irq.h>
+#include <asm/proc-fns.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/map.h>
+#include <mach/hardware.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/pm.h>
+#include <plat/adc-core.h>
+#include <plat/fb-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/regs-irqtype.h>
+#include <plat/regs-serial.h>
+#include <plat/watchdog-reset.h>
+
+#include "common.h"
+
+static const char name_s5p6440[] = "S5P6440";
+static const char name_s5p6450[] = "S5P6450";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S5P6440_CPU_ID,
+                .idmask         = S5P64XX_CPU_MASK,
+                .map_io         = s5p6440_map_io,
+                .init_clocks    = s5p6440_init_clocks,
+                .init_uarts     = s5p6440_init_uarts,
+                .init           = s5p64x0_init,
+                .name           = name_s5p6440,
+        }, {
+                .idcode         = S5P6450_CPU_ID,
+                .idmask         = S5P64XX_CPU_MASK,
+                .map_io         = s5p6450_map_io,
+                .init_clocks    = s5p6450_init_clocks,
+                .init_uarts     = s5p6450_init_uarts,
+                .init           = s5p64x0_init,
+                .name           = name_s5p6450,
+        },
+};
+
+/* Initial IO mappings */
+
+static struct map_desc s5p64x0_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_WDT),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC0,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC1,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc s5p6440_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(S5P6440_PA_UART(0)),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc s5p6450_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(S5P6450_PA_UART(0)),
+                .length         = SZ_512K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART + SZ_512K,
+                .pfn            = __phys_to_pfn(S5P6450_PA_UART(5)),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static void s5p64x0_idle(void)
+{
+        unsigned long val;
+
+        if (!need_resched()) {
+                val = __raw_readl(S5P64X0_PWR_CFG);
+                val &= ~(0x3 << 5);
+                val |= (0x1 << 5);
+                __raw_writel(val, S5P64X0_PWR_CFG);
+
+                cpu_do_idle();
+        }
+        local_irq_enable();
+}
+
+/*
+ * s5p64x0_map_io
+ *
+ * register the standard CPU IO areas
+ */
+
+void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
+{
+        /* initialize the io descriptors we need for initialization */
+        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P64X0_SYS_ID);
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init s5p6440_map_io(void)
+{
+        /* initialize any device information early */
+        s3c_adc_setname("s3c64xx-adc");
+        s3c_fb_setname("s5p64x0-fb");
+
+        iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+        init_consistent_dma_size(SZ_8M);
+}
+
+void __init s5p6450_map_io(void)
+{
+        /* initialize any device information early */
+        s3c_adc_setname("s3c64xx-adc");
+        s3c_fb_setname("s5p64x0-fb");
+
+        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
+        init_consistent_dma_size(SZ_8M);
+}
+
+/*
+ * s5p64x0_init_clocks
+ *
+ * register and setup the CPU clocks
+ */
+
+void __init s5p6440_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6440_register_clocks();
+        s5p6440_setup_clocks();
+}
+
+void __init s5p6450_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6450_register_clocks();
+        s5p6450_setup_clocks();
+}
+
+/*
+ * s5p64x0_init_irq
+ *
+ * register the CPU interrupts
+ */
+
+void __init s5p6440_init_irq(void)
+{
+        /* S5P6440 supports 2 VIC */
+        u32 vic[2];
+
+        /*
+         * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
+         * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
+         */
+        vic[0] = 0xff800ae7;
+        vic[1] = 0xffbf23e5;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+void __init s5p6450_init_irq(void)
+{
+        /* S5P6450 supports only 2 VIC */
+        u32 vic[2];
+
+        /*
+         * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
+         * VIC1 is missing IRQ VIC1[12, 14, 23]
+         */
+        vic[0] = 0xff9f1fff;
+        vic[1] = 0xff7fafff;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+struct bus_type s5p64x0_subsys = {
+        .name           = "s5p64x0-core",
+        .dev_name       = "s5p64x0-core",
+};
+
+static struct device s5p64x0_dev = {
+        .bus    = &s5p64x0_subsys,
+};
+
+static int __init s5p64x0_core_init(void)
+{
+        return subsys_system_register(&s5p64x0_subsys, NULL);
+}
+core_initcall(s5p64x0_core_init);
+
+int __init s5p64x0_init(void)
+{
+        printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5p64x0_idle;
+
+        return device_register(&s5p64x0_dev);
+}
+
+static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk_low",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+        [1] = {
+                .name           = "uclk1",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+
+void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5p64x0_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
+                }
+        }
+}
+
+void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        int uart;
+
+        for (uart = 0; uart < no; uart++) {
+                s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
+                s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
+        }
+
+        s5p64x0_common_init_uarts(cfg, no);
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s5p64x0_common_init_uarts(cfg, no);
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
+
+static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+        int offs = eint_offset(data->irq);
+        int shift;
+        u32 ctrl, mask;
+        u32 newvalue = 0;
+
+        if (offs > 15)
+                return -EINVAL;
+
+        switch (type) {
+        case IRQ_TYPE_NONE:
+                printk(KERN_WARNING "No edge setting!\n");
+                break;
+        case IRQ_TYPE_EDGE_RISING:
+                newvalue = S3C2410_EXTINT_RISEEDGE;
+                break;
+        case IRQ_TYPE_EDGE_FALLING:
+                newvalue = S3C2410_EXTINT_FALLEDGE;
+                break;
+        case IRQ_TYPE_EDGE_BOTH:
+                newvalue = S3C2410_EXTINT_BOTHEDGE;
+                break;
+        case IRQ_TYPE_LEVEL_LOW:
+                newvalue = S3C2410_EXTINT_LOWLEV;
+                break;
+        case IRQ_TYPE_LEVEL_HIGH:
+                newvalue = S3C2410_EXTINT_HILEV;
+                break;
+        default:
+                printk(KERN_ERR "No such irq type %d", type);
+                return -EINVAL;
+        }
+
+        shift = (offs / 2) * 4;
+        mask = 0x7 << shift;
+
+        ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
+        ctrl |= newvalue << shift;
+        __raw_writel(ctrl, S5P64X0_EINT0CON0);
+
+        /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
+        if (soc_is_s5p6450())
+                s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
+        else
+                s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
+
+        return 0;
+}
+
+/*
+ * s5p64x0_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
+ * the specific handlers s5p64x0_irq_demux_eintX_Y.
+ */
+static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
+{
+        u32 status = __raw_readl(S5P64X0_EINT0PEND);
+        u32 mask = __raw_readl(S5P64X0_EINT0MASK);
+        unsigned int irq;
+
+        status &= ~mask;
+        status >>= start;
+        status &= (1 << (end - start + 1)) - 1;
+
+        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+                if (status & 1)
+                        generic_handle_irq(irq);
+                status >>= 1;
+        }
+}
+
+static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
+{
+        s5p64x0_irq_demux_eint(0, 3);
+}
+
+static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
+{
+        s5p64x0_irq_demux_eint(4, 11);
+}
+
+static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
+                                        struct irq_desc *desc)
+{
+        s5p64x0_irq_demux_eint(12, 15);
+}
+
+static int s5p64x0_alloc_gc(void)
+{
+        struct irq_chip_generic *gc;
+        struct irq_chip_type *ct;
+
+        gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
+                                    S5P_VA_GPIO, handle_level_irq);
+        if (!gc) {
+                printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
+                        "external interrupts failed\n", __func__);
+                return -EINVAL;
+        }
+
+        ct = gc->chip_types;
+        ct->chip.irq_ack = irq_gc_ack_set_bit;
+        ct->chip.irq_mask = irq_gc_mask_set_bit;
+        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
+        ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
+        ct->chip.irq_set_wake = s3c_irqext_wake;
+        ct->regs.ack = EINT0PEND_OFFSET;
+        ct->regs.mask = EINT0MASK_OFFSET;
+        irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
+                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
+        return 0;
+}
+
+static int __init s5p64x0_init_irq_eint(void)
+{
+        int ret = s5p64x0_alloc_gc();
+        irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
+        irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
+        irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
+
+        return ret;
+}
+arch_initcall(s5p64x0_init_irq_eint);
+
+void s5p64x0_restart(char mode, const char *cmd)
+{
+        if (mode != 's')
+                arch_wdt_reset();
+
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
new file mode 100644
index 000000000000..f8a60fdc5884
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S5P64X0 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
+#define __ARCH_ARM_MACH_S5P64X0_COMMON_H
+
+void s5p6440_init_irq(void);
+void s5p6450_init_irq(void);
+void s5p64x0_init_io(struct map_desc *mach_desc, int size);
+
+void s5p6440_register_clocks(void);
+void s5p6440_setup_clocks(void);
+
+void s5p6450_register_clocks(void);
+void s5p6450_setup_clocks(void);
+
+void s5p64x0_restart(char mode, const char *cmd);
+
+#ifdef CONFIG_CPU_S5P6440
+
+extern  int s5p64x0_init(void);
+extern void s5p6440_map_io(void);
+extern void s5p6440_init_clocks(int xtal);
+
+extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5p6440_init_clocks NULL
+#define s5p6440_init_uarts NULL
+#define s5p6440_map_io NULL
+#define s5p64x0_init NULL
+#endif
+
+#ifdef CONFIG_CPU_S5P6450
+
+extern  int s5p64x0_init(void);
+extern void s5p6450_map_io(void);
+extern void s5p6450_init_clocks(int xtal);
+
+extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5p6450_init_clocks NULL
+#define s5p6450_init_uarts NULL
+#define s5p6450_map_io NULL
+#define s5p64x0_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
deleted file mode 100644
index ecab40cf19ab..000000000000
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/cpu.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/proc-fns.h>
-#include <asm/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/regs-serial.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
-#include <plat/adc-core.h>
-#include <plat/fb-core.h>
-
-/* Initial IO mappings */
-
-static struct map_desc s5p64x0_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_GPIO,
-                .pfn            = __phys_to_pfn(S5P64X0_PA_GPIO),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC0,
-                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC0),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC1,
-                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC1),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc s5p6440_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S5P6440_PA_UART(0)),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc s5p6450_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S5P6450_PA_UART(0)),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART + SZ_512K,
-                .pfn            = __phys_to_pfn(S5P6450_PA_UART(5)),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static void s5p64x0_idle(void)
-{
-        unsigned long val;
-
-        if (!need_resched()) {
-                val = __raw_readl(S5P64X0_PWR_CFG);
-                val &= ~(0x3 << 5);
-                val |= (0x1 << 5);
-                __raw_writel(val, S5P64X0_PWR_CFG);
-
-                cpu_do_idle();
-        }
-        local_irq_enable();
-}
-
-/*
- * s5p64x0_map_io
- *
- * register the standard CPU IO areas
- */
-
-void __init s5p6440_map_io(void)
-{
-        /* initialize any device information early */
-        s3c_adc_setname("s3c64xx-adc");
-        s3c_fb_setname("s5p64x0-fb");
-
-        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-        iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-        init_consistent_dma_size(SZ_8M);
-}
-
-void __init s5p6450_map_io(void)
-{
-        /* initialize any device information early */
-        s3c_adc_setname("s3c64xx-adc");
-        s3c_fb_setname("s5p64x0-fb");
-
-        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-        init_consistent_dma_size(SZ_8M);
-}
-
-/*
- * s5p64x0_init_clocks
- *
- * register and setup the CPU clocks
- */
-
-void __init s5p6440_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-        s5p6440_register_clocks();
-        s5p6440_setup_clocks();
-}
-
-void __init s5p6450_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-        s5p6450_register_clocks();
-        s5p6450_setup_clocks();
-}
-
-/*
- * s5p64x0_init_irq
- *
- * register the CPU interrupts
- */
-
-void __init s5p6440_init_irq(void)
-{
-        /* S5P6440 supports 2 VIC */
-        u32 vic[2];
-
-        /*
-         * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
-         * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
-         */
-        vic[0] = 0xff800ae7;
-        vic[1] = 0xffbf23e5;
-
-        s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-
-void __init s5p6450_init_irq(void)
-{
-        /* S5P6450 supports only 2 VIC */
-        u32 vic[2];
-
-        /*
-         * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
-         * VIC1 is missing IRQ VIC1[12, 14, 23]
-         */
-        vic[0] = 0xff9f1fff;
-        vic[1] = 0xff7fafff;
-
-        s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-
-struct sysdev_class s5p64x0_sysclass = {
-        .name   = "s5p64x0-core",
-};
-
-static struct sys_device s5p64x0_sysdev = {
-        .cls    = &s5p64x0_sysclass,
-};
-
-static int __init s5p64x0_core_init(void)
-{
-        return sysdev_class_register(&s5p64x0_sysclass);
-}
-core_initcall(s5p64x0_core_init);
-
-int __init s5p64x0_init(void)
-{
-        printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = s5p64x0_idle;
-
-        return sysdev_register(&s5p64x0_sysdev);
-}
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index 10b62b4f8211..fbb246d0a3df 100644
--- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -10,7 +10,8 @@
  * published by the Free Software Foundation.
 */
 
-#include <mach/map.h>
-#include <plat/irqs.h>
+                .macro  disable_fiq
+                .endm
 
-#include <asm/entry-macro-vic2.S>
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
index 60f57532c970..cf26e0954a2f 100644
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
deleted file mode 100644
index 38dcc71a03cc..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C6400 vmalloc definition
-*/
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     0xF6000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
deleted file mode 100644
index 79833caf8165..000000000000
--- a/arch/arm/mach-s5p64x0/init.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/init.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P64X0 - Init support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-
-#include <mach/map.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
-        [0] = {
-                .name           = "pclk_low",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "uclk1",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-
-/* uart registration process */
-
-void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->clocks = s5p64x0_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
-                }
-        }
-}
-
-void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        int uart;
-
-        for (uart = 0; uart < no; uart++) {
-                s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
-                s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
-        }
-
-        s5p64x0_common_init_uarts(cfg, no);
-        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
-
-void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s5p64x0_common_init_uarts(cfg, no);
-        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
deleted file mode 100644
index 275dc74f4a7b..000000000000
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/* arch/arm/mach-s5p64x0/irq-eint.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd
- *              http://www.samsung.com/
- *
- * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
- *
- * S5P64X0 - Interrupt handling for External Interrupts.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <plat/cpu.h>
-#include <plat/regs-irqtype.h>
-#include <plat/gpio-cfg.h>
-#include <plat/pm.h>
-
-#include <mach/regs-gpio.h>
-#include <mach/regs-clock.h>
-
-#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
-
-static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-        int offs = eint_offset(data->irq);
-        int shift;
-        u32 ctrl, mask;
-        u32 newvalue = 0;
-
-        if (offs > 15)
-                return -EINVAL;
-
-        switch (type) {
-        case IRQ_TYPE_NONE:
-                printk(KERN_WARNING "No edge setting!\n");
-                break;
-        case IRQ_TYPE_EDGE_RISING:
-                newvalue = S3C2410_EXTINT_RISEEDGE;
-                break;
-        case IRQ_TYPE_EDGE_FALLING:
-                newvalue = S3C2410_EXTINT_FALLEDGE;
-                break;
-        case IRQ_TYPE_EDGE_BOTH:
-                newvalue = S3C2410_EXTINT_BOTHEDGE;
-                break;
-        case IRQ_TYPE_LEVEL_LOW:
-                newvalue = S3C2410_EXTINT_LOWLEV;
-                break;
-        case IRQ_TYPE_LEVEL_HIGH:
-                newvalue = S3C2410_EXTINT_HILEV;
-                break;
-        default:
-                printk(KERN_ERR "No such irq type %d", type);
-                return -EINVAL;
-        }
-
-        shift = (offs / 2) * 4;
-        mask = 0x7 << shift;
-
-        ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
-        ctrl |= newvalue << shift;
-        __raw_writel(ctrl, S5P64X0_EINT0CON0);
-
-        /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
-        if (soc_is_s5p6450())
-                s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
-        else
-                s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-/*
- * s5p64x0_irq_demux_eint
- *
- * This function demuxes the IRQ from the group0 external interrupts,
- * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
- * the specific handlers s5p64x0_irq_demux_eintX_Y.
- */
-static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
-{
-        u32 status = __raw_readl(S5P64X0_EINT0PEND);
-        u32 mask = __raw_readl(S5P64X0_EINT0MASK);
-        unsigned int irq;
-
-        status &= ~mask;
-        status >>= start;
-        status &= (1 << (end - start + 1)) - 1;
-
-        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
-                if (status & 1)
-                        generic_handle_irq(irq);
-                status >>= 1;
-        }
-}
-
-static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
-{
-        s5p64x0_irq_demux_eint(0, 3);
-}
-
-static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
-{
-        s5p64x0_irq_demux_eint(4, 11);
-}
-
-static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
-                                        struct irq_desc *desc)
-{
-        s5p64x0_irq_demux_eint(12, 15);
-}
-
-static int s5p64x0_alloc_gc(void)
-{
-        struct irq_chip_generic *gc;
-        struct irq_chip_type *ct;
-
-        gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
-                                    S5P_VA_GPIO, handle_level_irq);
-        if (!gc) {
-                printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
-                        "external interrupts failed\n", __func__);
-                return -EINVAL;
-        }
-
-        ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack_set_bit;
-        ct->chip.irq_mask = irq_gc_mask_set_bit;
-        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
-        ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
-        ct->chip.irq_set_wake = s3c_irqext_wake;
-        ct->regs.ack = EINT0PEND_OFFSET;
-        ct->regs.mask = EINT0MASK_OFFSET;
-        irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
-                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
-        return 0;
-}
-
-static int __init s5p64x0_init_irq_eint(void)
-{
-        int ret = s5p64x0_alloc_gc();
-        irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
-        irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
-        irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
-
-        return ret;
-}
-arch_initcall(s5p64x0_init_irq_eint);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 4a1250cd1356..34d98a1dae57 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -27,6 +27,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/irq.h>
@@ -40,7 +41,6 @@
 
 #include <plat/regs-serial.h>
 #include <plat/gpio-cfg.h>
-#include <plat/s5p6440.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -53,6 +53,8 @@
 #include <plat/fb.h>
 #include <plat/regs-fb.h>
 
+#include "common.h"
+
 #define SMDK6440_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
                                 S3C2410_UCON_TXIRQMODE |        \
@@ -201,7 +203,7 @@ static struct platform_pwm_backlight_data smdk6440_bl_data = {
 
 static void __init smdk6440_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
+        s5p64x0_init_io(NULL, 0);
         s3c24xx_init_clocks(12000000);
         s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -242,7 +244,9 @@ MACHINE_START(SMDK6440, "SMDK6440")
         .atag_offset    = 0x100,
 
         .init_irq       = s5p6440_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdk6440_map_io,
         .init_machine   = smdk6440_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5p64x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 0ab129ecf009..135cf5d84737 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -27,6 +27,7 @@
 
 #include <video/platform_lcd.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/irq.h>
@@ -40,7 +41,6 @@
 
 #include <plat/regs-serial.h>
 #include <plat/gpio-cfg.h>
-#include <plat/s5p6450.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -53,6 +53,8 @@
 #include <plat/fb.h>
 #include <plat/regs-fb.h>
 
+#include "common.h"
+
 #define SMDK6450_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
                                 S3C2410_UCON_TXIRQMODE |        \
@@ -221,7 +223,7 @@ static struct platform_pwm_backlight_data smdk6450_bl_data = {
 
 static void __init smdk6450_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
+        s5p64x0_init_io(NULL, 0);
         s3c24xx_init_clocks(19200000);
         s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -262,7 +264,9 @@ MACHINE_START(SMDK6450, "SMDK6450")
         .atag_offset    = 0x100,
 
         .init_irq       = s5p6450_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdk6450_map_io,
         .init_machine   = smdk6450_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5p64x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/pm.c b/arch/arm/mach-s5p64x0/pm.c
index 69927243d25f..23f9b22439c9 100644
--- a/arch/arm/mach-s5p64x0/pm.c
+++ b/arch/arm/mach-s5p64x0/pm.c
@@ -160,7 +160,7 @@ static void s5p64x0_pm_prepare(void)
 
 }
 
-static int s5p64x0_pm_add(struct sys_device *sysdev)
+static int s5p64x0_pm_add(struct device *dev)
 {
         pm_cpu_prep = s5p64x0_pm_prepare;
         pm_cpu_sleep = s5p64x0_cpu_suspend;
@@ -169,15 +169,17 @@ static int s5p64x0_pm_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s5p64x0_pm_driver = {
-        .add            = s5p64x0_pm_add,
+static struct subsys_interface s5p64x0_pm_interface = {
+        .name           = "s5p64x0_pm",
+        .subsys         = &s5p64x0_subsys,
+        .add_dev        = s5p64x0_pm_add,
 };
 
 static __init int s5p64x0_pm_drvinit(void)
 {
         s3c_pm_init();
 
-        return sysdev_driver_register(&s5p64x0_sysclass, &s5p64x0_pm_driver);
+        return subsys_interface_register(&s5p64x0_pm_interface);
 }
 arch_initcall(s5p64x0_pm_drvinit);
 
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index a5e6e608b498..c3166c4d2ace 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -9,28 +9,25 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for S5PC100 system
+# Core
 
-obj-$(CONFIG_CPU_S5PC100)       += cpu.o init.o clock.o
-obj-$(CONFIG_CPU_S5PC100)       += setup-i2c0.o
-obj-$(CONFIG_CPU_S5PC100)       += dma.o
+obj-y                           += common.o clock.o
 
-# Helper and device support
-
-obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)    += setup-fb-24bpp.o
-obj-$(CONFIG_S5PC100_SETUP_I2C1)        += setup-i2c1.o
-obj-$(CONFIG_S5PC100_SETUP_IDE)         += setup-ide.o
-obj-$(CONFIG_S5PC100_SETUP_KEYPAD)      += setup-keypad.o
-obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
-obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
-
-# device support
-obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
+obj-y                           += dma.o
 
 # machine support
 
 obj-$(CONFIG_MACH_SMDKC100)     += mach-smdkc100.o
 
 # device support
+
 obj-y                           += dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
+
+obj-y                                   += setup-i2c0.o
+obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)    += setup-fb-24bpp.o
+obj-$(CONFIG_S5PC100_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PC100_SETUP_IDE)         += setup-ide.o
+obj-$(CONFIG_S5PC100_SETUP_KEYPAD)      += setup-keypad.o
+obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
+obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 8d47709da713..c4c74893f53c 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -27,7 +27,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5pc100.h>
+
+#include "common.h"
 
 static struct clk s5p_clk_otgphy = {
         .name           = "otg_phy",
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/common.c
index fd2708e7d8a9..c9095730a7f5 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -1,17 +1,16 @@
-/* linux/arch/arm/mach-s5pc100/cpu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * Based on mach-s3c6410/cpu.c
+ * Common Codes for S5PC100
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
-*/
+ */
 
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -21,40 +20,78 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 
+#include <asm/irq.h>
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include <asm/proc-fns.h>
-
-#include <mach/hardware.h>
 #include <mach/map.h>
-#include <asm/irq.h>
-
-#include <plat/regs-serial.h>
+#include <mach/hardware.h>
 #include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
-#include <plat/ata-core.h>
-#include <plat/iic-core.h>
 #include <plat/sdhci.h>
 #include <plat/adc-core.h>
-#include <plat/onenand-core.h>
+#include <plat/ata-core.h>
 #include <plat/fb-core.h>
+#include <plat/iic-core.h>
+#include <plat/onenand-core.h>
+#include <plat/regs-serial.h>
+#include <plat/watchdog-reset.h>
+
+#include "common.h"
+
+static const char name_s5pc100[] = "S5PC100";
 
-#include <plat/s5pc100.h>
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S5PC100_CPU_ID,
+                .idmask         = S5PC100_CPU_MASK,
+                .map_io         = s5pc100_map_io,
+                .init_clocks    = s5pc100_init_clocks,
+                .init_uarts     = s5pc100_init_uarts,
+                .init           = s5pc100_init,
+                .name           = name_s5pc100,
+        },
+};
 
 /* Initial IO mappings */
 
 static struct map_desc s5pc100_iodesc[] __initdata = {
         {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5PC100_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5PC100_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5PC100_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S5PC100_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5PC100_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
                 .virtual        = (unsigned long)S5P_VA_SYSTIMER,
                 .pfn            = __phys_to_pfn(S5PC100_PA_SYSTIMER),
                 .length         = SZ_16K,
@@ -100,15 +137,27 @@ static void s5pc100_idle(void)
         local_irq_enable();
 }
 
-/* s5pc100_map_io
+/*
+ * s5pc100_map_io
  *
- * register the standard cpu IO areas
-*/
+ * register the standard CPU IO areas
+ */
 
-void __init s5pc100_map_io(void)
+void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
 {
+        /* initialize the io descriptors we need for initialization */
         iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P_VA_CHIPID);
 
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init s5pc100_map_io(void)
+{
         /* initialise device information early */
         s5pc100_default_sdhci0();
         s5pc100_default_sdhci1();
@@ -143,19 +192,19 @@ void __init s5pc100_init_irq(void)
         s5p_init_irq(vic, ARRAY_SIZE(vic));
 }
 
-static struct sysdev_class s5pc100_sysclass = {
-        .name   = "s5pc100-core",
+static struct bus_type s5pc100_subsys = {
+        .name           = "s5pc100-core",
+        .dev_name       = "s5pc100-core",
 };
 
-static struct sys_device s5pc100_sysdev = {
-        .cls    = &s5pc100_sysclass,
+static struct device s5pc100_dev = {
+        .bus    = &s5pc100_subsys,
 };
 
 static int __init s5pc100_core_init(void)
 {
-        return sysdev_class_register(&s5pc100_sysclass);
+        return subsys_system_register(&s5pc100_subsys, NULL);
 }
-
 core_initcall(s5pc100_core_init);
 
 int __init s5pc100_init(void)
@@ -165,5 +214,20 @@ int __init s5pc100_init(void)
         /* set idle function */
         pm_idle = s5pc100_idle;
 
-        return sysdev_register(&s5pc100_sysdev);
+        return device_register(&s5pc100_dev);
+}
+
+/* uart registration process */
+
+void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+void s5pc100_restart(char mode, const char *cmd)
+{
+        if (mode != 's')
+                arch_wdt_reset();
+
+        soft_restart(0);
 }
diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h
new file mode 100644
index 000000000000..9fbd3ae2b401
--- /dev/null
+++ b/arch/arm/mach-s5pc100/common.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S5PC100 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H
+#define __ARCH_ARM_MACH_S5PC100_COMMON_H
+
+void s5pc100_init_io(struct map_desc *mach_desc, int size);
+void s5pc100_init_irq(void);
+
+void s5pc100_register_clocks(void);
+void s5pc100_setup_clocks(void);
+
+void s5pc100_restart(char mode, const char *cmd);
+
+#ifdef CONFIG_CPU_S5PC100
+
+extern  int s5pc100_init(void);
+extern void s5pc100_map_io(void);
+extern void s5pc100_init_clocks(int xtal);
+extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5pc100_init_clocks NULL
+#define s5pc100_init_uarts NULL
+#define s5pc100_map_io NULL
+#define s5pc100_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
index ba76af052c81..b8c242edfa22 100644
--- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S
@@ -12,39 +12,14 @@
  * warranty of any kind, whether express or implied.
 */
 
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-
         .macro  disable_fiq
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-        @ check the vic0
-        mov     \irqnr, # S5P_IRQ_OFFSET + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-
-        @ otherwise try vic2
-        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
         .endm
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index a9ea57c06600..afc96c298518 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
deleted file mode 100644
index 44c8e5726d9d..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C6400 vmalloc definition
-*/
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END     0xF6000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pc100/init.c b/arch/arm/mach-s5pc100/init.c
deleted file mode 100644
index 19d7b523c137..000000000000
--- a/arch/arm/mach-s5pc100/init.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/plat-s5pc100/s5pc100-init.c
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5pc100.h>
-
-/* uart registration process */
-void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 26f5c91c9427..674d22992f3c 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -25,6 +25,7 @@
 #include <linux/input.h>
 #include <linux/pwm_backlight.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
@@ -42,7 +43,6 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/s5pc100.h>
 #include <plat/fb.h>
 #include <plat/iic.h>
 #include <plat/ata.h>
@@ -53,6 +53,8 @@
 #include <plat/backlight.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -215,7 +217,7 @@ static struct platform_pwm_backlight_data smdkc100_bl_data = {
 
 static void __init smdkc100_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pc100_init_io(NULL, 0);
         s3c24xx_init_clocks(12000000);
         s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs));
 }
@@ -250,7 +252,9 @@ MACHINE_START(SMDKC100, "SMDKC100")
         /* Maintainer: Byungho Min <bhmin@samsung.com> */
         .atag_offset    = 0x100,
         .init_irq       = s5pc100_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdkc100_map_io,
         .init_machine   = smdkc100_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s5pc100_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 009fbe53df96..4c59186de957 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -10,18 +10,20 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for S5PV210 system
+# Core
+
+obj-y                           += common.o clock.o
 
-obj-$(CONFIG_CPU_S5PV210)       += cpu.o init.o clock.o dma.o
-obj-$(CONFIG_CPU_S5PV210)       += setup-i2c0.o
 obj-$(CONFIG_PM)                += pm.o
 
+obj-y                           += dma.o
+
 # machine support
 
 obj-$(CONFIG_MACH_AQUILA)       += mach-aquila.o
-obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
-obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
 obj-$(CONFIG_MACH_GONI)         += mach-goni.o
+obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
+obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
 obj-$(CONFIG_MACH_TORBRECK)     += mach-torbreck.o
 
 # device support
@@ -29,11 +31,12 @@ obj-$(CONFIG_MACH_TORBRECK)	+= mach-torbreck.o
 obj-y                           += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
 
+obj-y                                   += setup-i2c0.o
 obj-$(CONFIG_S5PV210_SETUP_FB_24BPP)    += setup-fb-24bpp.o
 obj-$(CONFIG_S5PV210_SETUP_FIMC)        += setup-fimc.o
-obj-$(CONFIG_S5PV210_SETUP_I2C1)        += setup-i2c1.o
-obj-$(CONFIG_S5PV210_SETUP_I2C2)        += setup-i2c2.o
+obj-$(CONFIG_S5PV210_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PV210_SETUP_I2C2)        += setup-i2c2.o
 obj-$(CONFIG_S5PV210_SETUP_IDE)         += setup-ide.o
 obj-$(CONFIG_S5PV210_SETUP_KEYPAD)      += setup-keypad.o
-obj-$(CONFIG_S5PV210_SETUP_SDHCI)       += setup-sdhci.o
+obj-$(CONFIG_S5PV210_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 4c5ac7a69e9e..04c9b578e626 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -17,7 +17,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <mach/map.h>
@@ -29,7 +29,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5pv210.h>
+
+#include "common.h"
 
 static unsigned long xtal;
 
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/common.c
index 84ec74633232..0ec393305d7c 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -1,12 +1,13 @@
-/* linux/arch/arm/mach-s5pv210/cpu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
+ * Common Codes for S5PV210
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
-*/
+ */
 
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -17,37 +18,78 @@
 #include <linux/module.h>
 #include <linux/clk.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/dma-mapping.h>
+#include <linux/serial_core.h>
 
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include <asm/proc-fns.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
-#include <plat/devs.h>
 #include <plat/clock.h>
-#include <plat/fb-core.h>
-#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/sdhci.h>
 #include <plat/adc-core.h>
 #include <plat/ata-core.h>
+#include <plat/fb-core.h>
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
 #include <plat/keypad-core.h>
-#include <plat/sdhci.h>
-#include <plat/reset.h>
 #include <plat/tv-core.h>
+#include <plat/regs-serial.h>
+
+#include "common.h"
+
+static const char name_s5pv210[] = "S5PV210/S5PC110";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S5PV210_CPU_ID,
+                .idmask         = S5PV210_CPU_MASK,
+                .map_io         = s5pv210_map_io,
+                .init_clocks    = s5pv210_init_clocks,
+                .init_uarts     = s5pv210_init_uarts,
+                .init           = s5pv210_init,
+                .name           = name_s5pv210,
+        },
+};
 
 /* Initial IO mappings */
 
 static struct map_desc s5pv210_iodesc[] __initdata = {
         {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5PV210_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5PV210_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S5PV210_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
                 .virtual        = (unsigned long)S5P_VA_SYSTIMER,
                 .pfn            = __phys_to_pfn(S5PV210_PA_SYSTIMER),
                 .length         = SZ_4K,
@@ -108,19 +150,32 @@ static void s5pv210_idle(void)
         local_irq_enable();
 }
 
-static void s5pv210_sw_reset(void)
+void s5pv210_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
 }
 
-/* s5pv210_map_io
+/*
+ * s5pv210_map_io
  *
  * register the standard cpu IO areas
-*/
+ */
 
-void __init s5pv210_map_io(void)
+void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 {
+        /* initialize the io descriptors we need for initialization */
         iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P_VA_CHIPID);
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init s5pv210_map_io(void)
+{
         init_consistent_dma_size(14 << 20);
 
         /* initialise device information early */
@@ -174,19 +229,19 @@ void __init s5pv210_init_irq(void)
         s5p_init_irq(vic, ARRAY_SIZE(vic));
 }
 
-struct sysdev_class s5pv210_sysclass = {
-        .name   = "s5pv210-core",
+struct bus_type s5pv210_subsys = {
+        .name           = "s5pv210-core",
+        .dev_name       = "s5pv210-core",
 };
 
-static struct sys_device s5pv210_sysdev = {
-        .cls    = &s5pv210_sysclass,
+static struct device s5pv210_dev = {
+        .bus    = &s5pv210_subsys,
 };
 
 static int __init s5pv210_core_init(void)
 {
-        return sysdev_class_register(&s5pv210_sysclass);
+        return subsys_system_register(&s5pv210_subsys, NULL);
 }
-
 core_initcall(s5pv210_core_init);
 
 int __init s5pv210_init(void)
@@ -196,8 +251,31 @@ int __init s5pv210_init(void)
         /* set idle function */
         pm_idle = s5pv210_idle;
 
-        /* set sw_reset function */
-        s5p_reset_hook = s5pv210_sw_reset;
+        return device_register(&s5pv210_dev);
+}
+
+static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
+        [0] = {
+                .name           = "pclk",
+                .divisor        = 1,
+                .min_baud       = 0,
+                .max_baud       = 0,
+        },
+};
+
+/* uart registration process */
+
+void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+                if (!tcfg->clocks) {
+                        tcfg->clocks = s5pv210_serial_clocks;
+                        tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
+                }
+        }
 
-        return sysdev_register(&s5pv210_sysdev);
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
 }
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
new file mode 100644
index 000000000000..6ed2af5c7518
--- /dev/null
+++ b/arch/arm/mach-s5pv210/common.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S5PV210 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
+#define __ARCH_ARM_MACH_S5PV210_COMMON_H
+
+void s5pv210_init_io(struct map_desc *mach_desc, int size);
+void s5pv210_init_irq(void);
+
+void s5pv210_register_clocks(void);
+void s5pv210_setup_clocks(void);
+
+void s5pv210_restart(char mode, const char *cmd);
+
+#ifdef CONFIG_CPU_S5PV210
+
+extern  int s5pv210_init(void);
+extern void s5pv210_map_io(void);
+extern void s5pv210_init_clocks(int xtal);
+extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5pv210_init_clocks NULL
+#define s5pv210_init_uarts NULL
+#define s5pv210_map_io NULL
+#define s5pv210_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
index 3aa41ac59f07..bebca1b5d0b1 100644
--- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -10,45 +10,8 @@
  * published by the Free Software Foundation.
 */
 
-#include <asm/hardware/vic.h>
-#include <mach/map.h>
-#include <plat/irqs.h>
-
         .macro  disable_fiq
         .endm
 
-        .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =VA_VIC0
-        .endm
-
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-        @ check the vic0
-        mov     \irqnr, # S5P_IRQ_OFFSET + 31
-        ldr     \irqstat, [ \base, # VIC_IRQ_STATUS ]
-        teq     \irqstat, #0
-
-        @ otherwise try vic1
-        addeq   \tmp, \base, #(VA_VIC1 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-
-        @ otherwise try vic2
-        addeq   \tmp, \base, #(VA_VIC2 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-
-        @ otherwise try vic3
-        addeq   \tmp, \base, #(VA_VIC3 - VA_VIC0)
-        addeq   \irqnr, \irqnr, #32
-        ldreq   \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
-        teqeq   \irqstat, #0
-
-        clzne   \irqstat, \irqstat
-        subne   \irqnr, \irqnr, \irqstat
-        .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
index af8a200b2135..bf288ced860a 100644
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
deleted file mode 100644
index a6c659d68a5d..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
- *
- * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
- *
- * S5PV210 vmalloc definition
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H __FILE__
-
-#define VMALLOC_END     0xF6000000UL
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
deleted file mode 100644
index 4865ae2c475a..000000000000
--- a/arch/arm/mach-s5pv210/init.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/init.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5pv210.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
-        [0] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-
-/* uart registration process */
-void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->clocks = s5pv210_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
-                }
-        }
-
-        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 5811a96125f0..6f7dfe993c12 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -22,6 +22,7 @@
 #include <linux/input.h>
 #include <linux/gpio.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -32,7 +33,6 @@
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/fb.h>
@@ -41,6 +41,8 @@
 #include <plat/s5p-time.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define AQUILA_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -644,7 +646,7 @@ static void __init aquila_sound_init(void)
 
 static void __init aquila_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -680,7 +682,9 @@ MACHINE_START(AQUILA, "Aquila")
            Kyungmin Park <kyungmin.park@samsung.com> */
         .atag_offset    = 0x100,
         .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = aquila_map_io,
         .init_machine   = aquila_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 15edcae448b9..12c693717398 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -27,6 +27,7 @@
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -37,7 +38,6 @@
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/fb.h>
@@ -54,6 +54,8 @@
 #include <media/s5p_fimc.h>
 #include <media/noon010pc30.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define GONI_UCON_DEFAULT       (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -890,7 +892,7 @@ static void __init goni_sound_init(void)
 
 static void __init goni_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -956,8 +958,10 @@ MACHINE_START(GONI, "GONI")
         /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */
         .atag_offset    = 0x100,
         .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = goni_map_io,
         .init_machine   = goni_machine_init,
         .timer          = &s5p_timer,
         .reserve        = &goni_reserve,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index f7266bb0cac8..b323983b2c54 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -13,8 +13,9 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 #include <linux/i2c.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -24,7 +25,6 @@
 #include <mach/regs-clock.h>
 
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/ata.h>
@@ -32,6 +32,8 @@
 #include <plat/pm.h>
 #include <plat/s5p-time.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKC110_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -109,7 +111,7 @@ static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
 
 static void __init smdkc110_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -138,7 +140,9 @@ MACHINE_START(SMDKC110, "SMDKC110")
         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
         .atag_offset    = 0x100,
         .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdkc110_map_io,
         .init_machine   = smdkc110_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index a9106c392398..b4021dd802a8 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -13,13 +13,14 @@
 #include <linux/i2c.h>
 #include <linux/init.h>
 #include <linux/serial_core.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/dm9000.h>
 #include <linux/fb.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
 #include <linux/pwm_backlight.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -33,7 +34,6 @@
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
 #include <plat/gpio-cfg.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/adc.h>
@@ -47,6 +47,8 @@
 #include <plat/backlight.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -273,11 +275,12 @@ static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
 
 static struct platform_pwm_backlight_data smdkv210_bl_data = {
         .pwm_id = 3,
+        .pwm_period_ns = 1000,
 };
 
 static void __init smdkv210_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
         s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
@@ -315,7 +318,9 @@ MACHINE_START(SMDKV210, "SMDKV210")
         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
         .atag_offset    = 0x100,
         .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = smdkv210_map_io,
         .init_machine   = smdkv210_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 97cc066c5369..74e99bc0dc9b 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/serial_core.h>
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
@@ -23,12 +24,13 @@
 #include <mach/regs-clock.h>
 
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/iic.h>
 #include <plat/s5p-time.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define TORBRECK_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -102,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = {
 
 static void __init torbreck_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -127,7 +129,9 @@ MACHINE_START(TORBRECK, "TORBRECK")
         /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
         .atag_offset    = 0x100,
         .init_irq       = s5pv210_init_irq,
+        .handle_irq     = vic_handle_irq,
         .map_io         = torbreck_map_io,
         .init_machine   = torbreck_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index f149d278377b..677c71c41e50 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -133,7 +133,7 @@ static void s5pv210_pm_prepare(void)
         s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
 }
 
-static int s5pv210_pm_add(struct sys_device *sysdev)
+static int s5pv210_pm_add(struct device *dev)
 {
         pm_cpu_prep = s5pv210_pm_prepare;
         pm_cpu_sleep = s5pv210_cpu_suspend;
@@ -141,13 +141,15 @@ static int s5pv210_pm_add(struct sys_device *sysdev)
         return 0;
 }
 
-static struct sysdev_driver s5pv210_pm_driver = {
-        .add            = s5pv210_pm_add,
+static struct subsys_interface s5pv210_pm_interface = {
+        .name           = "s5pv210_pm",
+        .subsys         = &s5pv210_subsys,
+        .add_dev        = s5pv210_pm_add,
 };
 
 static __init int s5pv210_pm_drvinit(void)
 {
-        return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);
+        return subsys_interface_register(&s5pv210_pm_interface);
 }
 arch_initcall(s5pv210_pm_drvinit);
 
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot
index 5a616f6e5612..f7951aa04562 100644
--- a/arch/arm/mach-sa1100/Makefile.boot
+++ b/arch/arm/mach-sa1100/Makefile.boot
@@ -1,5 +1,5 @@
-ifeq ($(CONFIG_ARCH_SA1100),y)
-   zreladdr-$(CONFIG_SA1111)            += 0xc0208000
+ifeq ($(CONFIG_SA1111),y)
+   zreladdr-y   += 0xc0208000
 else
    zreladdr-y   += 0xc0008000
 endif
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 3dd133f18415..6b93e200bcac 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -455,4 +455,5 @@ MACHINE_START(ASSABET, "Intel-Assabet")
 #ifdef CONFIG_SA1111
         .dma_zone_size  = SZ_1M,
 #endif
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index bda83e1ab078..b07a2c024cb7 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -309,4 +309,5 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
 #ifdef CONFIG_SA1111
         .dma_zone_size  = SZ_1M,
 #endif
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 7f3da4b11ec9..11bb6d0b9be3 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -139,4 +139,5 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
         .init_irq       = cerf_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = cerf_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 2965cc9d424e..b9060e236def 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -387,4 +387,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = collie_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 5fa5ae1f39e1..bb10ee2cb89f 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -126,6 +126,17 @@ static void sa1100_power_off(void)
         PMCR = PMCR_SF;
 }
 
+void sa11x0_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                /* Use on-chip reset capability */
+                RSRR = RSRR_SWR;
+        }
+}
+
 static void sa11x0_register_device(struct platform_device *dev, void *data)
 {
         int err;
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index b7a9a601c2d1..33268cf6be36 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -10,6 +10,7 @@ extern struct sys_timer sa1100_timer;
 extern void __init sa1100_map_io(void);
 extern void __init sa1100_init_irq(void);
 extern void __init sa1100_init_gpio(void);
+extern void sa11x0_restart(char, const char *);
 
 #define SET_BANK(__nr,__start,__size) \
         mi->bank[__nr].start = (__start), \
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index b30733a2b82e..1e6b3c105ba6 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -89,5 +89,6 @@ MACHINE_START(H3100, "Compaq iPAQ H3100")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = h3100_mach_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index 6fd324d92389..6b58e7460ecf 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -130,5 +130,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = h3600_mach_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 30f4a551b8e5..c01bb36db940 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -200,4 +200,5 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = hackkit_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index ba9da9f7f183..e17b208f76d4 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -3,20 +3,7 @@
  *
  * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
  */
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /* Jump into ROM at address 0 */
-                cpu_reset(0);
-        } else {
-                /* Use on-chip reset capability */
-                RSRR = RSRR_SWR;
-        }
-}
diff --git a/arch/arm/mach-sa1100/include/mach/vmalloc.h b/arch/arm/mach-sa1100/include/mach/vmalloc.h
deleted file mode 100644
index b3d002398480..000000000000
--- a/arch/arm/mach-sa1100/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (0xe8000000UL)
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 77198fe02bc5..ee121d6f0480 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -373,4 +373,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
 #ifdef CONFIG_SA1111
         .dma_zone_size  = SZ_1M,
 #endif
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index 5bc59d0947ba..af4e2761f3db 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -66,4 +66,5 @@ MACHINE_START(LART, "LART")
         .init_irq       = sa1100_init_irq,
         .init_machine   = lart_init,
         .timer          = &sa1100_timer,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index 032f3881d145..85f6ee672225 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -19,6 +19,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/setup.h>
+#include <asm/page.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
@@ -116,4 +117,5 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = nanoengine_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 65161f2bea29..9307df053533 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -150,4 +150,5 @@ MACHINE_START(PLEB, "PLEB")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = pleb_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 1cccbf5b9e9a..318b2b766a0b 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -87,4 +87,5 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = shannon_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 4790f3f3d008..e17c04d6e324 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -396,4 +396,5 @@ MACHINE_START(SIMPAD, "Simpad")
         .map_io         = simpad_map_io,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fa6602491d54..69e33535dee6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -12,7 +12,6 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/sched.h>        /* just for sched_clock() - funny that */
 #include <linux/timex.h>
 #include <linux/clockchips.h>
 
@@ -20,29 +19,9 @@
 #include <asm/sched_clock.h>
 #include <mach/hardware.h>
 
-/*
- * This is the SA11x0 sched_clock implementation.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
- * NSEC_PER_SEC, 60).
- * This gives a resolution of about 271ns and a wrap period of about 19min.
- */
-#define SC_MULT         2275555556u
-#define SC_SHIFT        23
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = OSCR;
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-static void notrace sa1100_update_sched_clock(void)
+static u32 notrace sa1100_read_sched_clock(void)
 {
-        u32 cyc = OSCR;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return OSCR;
 }
 
 #define MIN_OSCR_DELTA 2
@@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void)
         OIER = 0;
         OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-        init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
-                               3686400, SC_MULT, SC_SHIFT);
+        setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
 
         clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
         ckevt_sa1100_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index feda3ca7fc95..a851c254ad6c 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -26,10 +26,9 @@
 #define ROMCARD_SIZE            0x08000000
 #define ROMCARD_START           0x10000000
 
-void arch_reset(char mode, const char *cmd)
+static void shark_restart(char mode, const char *cmd)
 {
         short temp;
-        local_irq_disable();
         /* Reset the Machine via pc[3] of the sequoia chipset */
         outw(0x09,0x24);
         temp=inw(0x26);
@@ -157,4 +156,5 @@ MACHINE_START(SHARK, "Shark")
         .init_irq       = shark_init_irq,
         .timer          = &shark_timer,
         .dma_zone_size  = SZ_4M,
+        .restart        = shark_restart,
 MACHINE_END
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
index 21c373b30bbc..1b2f2c5050a8 100644
--- a/arch/arm/mach-shark/include/mach/system.h
+++ b/arch/arm/mach-shark/include/mach/system.h
@@ -6,9 +6,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-/* Found in arch/mach-shark/core.c */
-extern void arch_reset(char mode, const char *cmd);
-
 static inline void arch_idle(void)
 {
 }
diff --git a/arch/arm/mach-shark/include/mach/vmalloc.h b/arch/arm/mach-shark/include/mach/vmalloc.h
deleted file mode 100644
index b10df988526d..000000000000
--- a/arch/arm/mach-shark/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-shark/include/mach/vmalloc.h
- */
-#define VMALLOC_END       0xd0000000UL
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 5ee604dcaf57..83e35f254bff 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -30,7 +30,6 @@ pfc-$(CONFIG_ARCH_R8A7740)	+= pfc-r8a7740.o
 obj-$(CONFIG_ARCH_SH7367)       += entry-intc.o
 obj-$(CONFIG_ARCH_SH7377)       += entry-intc.o
 obj-$(CONFIG_ARCH_SH7372)       += entry-intc.o
-obj-$(CONFIG_ARCH_SH73A0)       += entry-gic.o
 obj-$(CONFIG_ARCH_R8A7740)      += entry-intc.o
 
 # PM objects
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 7119b87cbfa0..a4e6ca04e319 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -466,8 +466,6 @@ static struct map_desc ag5evm_io_desc[] __initdata = {
 static void __init ag5evm_map_io(void)
 {
         iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh73a0_add_early_devices();
@@ -609,7 +607,7 @@ MACHINE_START(AG5EVM, "ag5evm")
         .map_io         = ag5evm_map_io,
         .nr_irqs        = NR_IRQS_LEGACY,
         .init_irq       = sh73a0_init_irq,
-        .handle_irq     = shmobile_handle_irq_gic,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = ag5evm_init,
         .timer          = &ag5evm_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 4c865ece9ac4..6a6f9f7568c2 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1172,8 +1172,6 @@ static struct map_desc ap4evb_io_desc[] __initdata = {
 static void __init ap4evb_map_io(void)
 {
         iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 8b620bf06221..72d557281b1f 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -261,8 +261,6 @@ static struct map_desc g3evm_io_desc[] __initdata = {
 static void __init g3evm_map_io(void)
 {
         iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7367_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 7719ddc5f591..2220b885cff5 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -275,8 +275,6 @@ static struct map_desc g4evm_io_desc[] __initdata = {
 static void __init g4evm_map_io(void)
 {
         iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7377_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index f44150b5ae46..857ceeec1bb0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -551,7 +551,7 @@ MACHINE_START(KOTA2, "kota2")
         .map_io         = kota2_map_io,
         .nr_irqs        = NR_IRQS_LEGACY,
         .init_irq       = sh73a0_init_irq,
-        .handle_irq     = shmobile_handle_irq_gic,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = kota2_init,
         .timer          = &kota2_timer,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9c5e598e0e3d..ed5256687397 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1390,8 +1390,6 @@ static struct map_desc mackerel_io_desc[] __initdata = {
 static void __init mackerel_map_io(void)
 {
         iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/entry-gic.S b/arch/arm/mach-shmobile/entry-gic.S
deleted file mode 100644
index e20239b08c83..000000000000
--- a/arch/arm/mach-shmobile/entry-gic.S
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * ARM Interrupt demux handler using GIC
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2011 Paul Mundt
- * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/assembler.h>
-#include <asm/entry-macro-multi.S>
-#include <asm/hardware/gic.h>
-#include <asm/hardware/entry-macro-gic.S>
-
-        arch_irq_handler shmobile_handle_irq_gic
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 5055a00a83d4..3a9250bb6d05 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -7,7 +7,6 @@ extern void shmobile_secondary_vector(void);
 struct clk;
 extern int clk_init(void);
 extern void shmobile_handle_irq_intc(struct pt_regs *);
-extern void shmobile_handle_irq_gic(struct pt_regs *);
 extern struct platform_suspend_ops shmobile_suspend_ops;
 struct cpuidle_driver;
 extern void (*shmobile_cpuidle_modes[])(void);
@@ -35,8 +34,8 @@ extern void sh7372_add_standard_devices(void);
 extern void sh7372_clock_init(void);
 extern void sh7372_pinmux_init(void);
 extern void sh7372_pm_init(void);
-extern void sh7372_resume_core_standby_a3sm(void);
-extern int sh7372_do_idle_a3sm(unsigned long unused);
+extern void sh7372_resume_core_standby_sysc(void);
+extern int sh7372_do_idle_sysc(unsigned long sleep_mode);
 extern struct clk sh7372_extal1_clk;
 extern struct clk sh7372_extal2_clk;
 
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index 8d4a416d4285..2a57b2964ee9 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -18,14 +18,5 @@
         .macro  disable_fiq
         .endm
 
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        .endm
-
-        .macro  test_for_ipi, irqnr, irqstat, base, tmp
-        .endm
-
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 7bf0890e16ba..de795b42232a 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -12,8 +12,6 @@
 
 #include <linux/kernel.h>
 #include <linux/errno.h>
-
-#define ARCH_NR_GPIOS 1024
 #include <linux/sh_pfc.h>
 
 #ifdef CONFIG_GPIOLIB
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 84532f9629b2..8254ab86f6cd 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -480,11 +480,10 @@ struct platform_device;
 struct sh7372_pm_domain {
         struct generic_pm_domain genpd;
         struct dev_power_governor *gov;
-        void (*suspend)(void);
+        int (*suspend)(void);
         void (*resume)(void);
         unsigned int bit_shift;
         bool no_debug;
-        bool stay_on;
 };
 
 static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d)
@@ -499,6 +498,7 @@ extern struct sh7372_pm_domain sh7372_d4;
 extern struct sh7372_pm_domain sh7372_a4r;
 extern struct sh7372_pm_domain sh7372_a3rv;
 extern struct sh7372_pm_domain sh7372_a3ri;
+extern struct sh7372_pm_domain sh7372_a4s;
 extern struct sh7372_pm_domain sh7372_a3sp;
 extern struct sh7372_pm_domain sh7372_a3sg;
 
@@ -515,5 +515,7 @@ extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
 
 extern void sh7372_intcs_suspend(void);
 extern void sh7372_intcs_resume(void);
+extern void sh7372_intca_suspend(void);
+extern void sh7372_intca_resume(void);
 
 #endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 76a687eeaa22..956ac18ddbf9 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -8,7 +8,7 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode, const char *cmd)
 {
-        cpu_reset(0);
+        soft_restart(0);
 }
 
 #endif
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
deleted file mode 100644
index 2b8fd8b942fe..000000000000
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __ASM_MACH_VMALLOC_H
-#define __ASM_MACH_VMALLOC_H
-
-/* Vmalloc at ... - 0xe5ffffff */
-#define VMALLOC_END 0xe6000000UL
-
-#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 2d8856df80e2..89afcaba99a1 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -535,6 +535,7 @@ static struct resource intcs_resources[] __initdata = {
 static struct intc_desc intcs_desc __initdata = {
         .name = "sh7372-intcs",
         .force_enable = ENABLED_INTCS,
+        .skip_syscore_suspend = true,
         .resource = intcs_resources,
         .num_resources = ARRAY_SIZE(intcs_resources),
         .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
@@ -611,3 +612,52 @@ void sh7372_intcs_resume(void)
         for (k = 0x80; k <= 0x9c; k += 4)
                 __raw_writeb(ffd5[k], intcs_ffd5 + k);
 }
+
+static unsigned short e694[0x200];
+static unsigned short e695[0x200];
+
+void sh7372_intca_suspend(void)
+{
+        int k;
+
+        for (k = 0x00; k <= 0x38; k += 4)
+                e694[k] = __raw_readw(0xe6940000 + k);
+
+        for (k = 0x80; k <= 0xb4; k += 4)
+                e694[k] = __raw_readb(0xe6940000 + k);
+
+        for (k = 0x180; k <= 0x1b4; k += 4)
+                e694[k] = __raw_readb(0xe6940000 + k);
+
+        for (k = 0x00; k <= 0x50; k += 4)
+                e695[k] = __raw_readw(0xe6950000 + k);
+
+        for (k = 0x80; k <= 0xa8; k += 4)
+                e695[k] = __raw_readb(0xe6950000 + k);
+
+        for (k = 0x180; k <= 0x1a8; k += 4)
+                e695[k] = __raw_readb(0xe6950000 + k);
+}
+
+void sh7372_intca_resume(void)
+{
+        int k;
+
+        for (k = 0x00; k <= 0x38; k += 4)
+                __raw_writew(e694[k], 0xe6940000 + k);
+
+        for (k = 0x80; k <= 0xb4; k += 4)
+                __raw_writeb(e694[k], 0xe6940000 + k);
+
+        for (k = 0x180; k <= 0x1b4; k += 4)
+                __raw_writeb(e694[k], 0xe6940000 + k);
+
+        for (k = 0x00; k <= 0x50; k += 4)
+                __raw_writew(e695[k], 0xe6950000 + k);
+
+        for (k = 0x80; k <= 0xa8; k += 4)
+                __raw_writeb(e695[k], 0xe6950000 + k);
+
+        for (k = 0x180; k <= 0x1a8; k += 4)
+                __raw_writeb(e695[k], 0xe6950000 + k);
+}
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 0a5b22942fd3..77b8fc12fc2f 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/irq.h>
 #include <linux/bitrev.h>
+#include <linux/console.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/tlbflush.h>
@@ -81,11 +82,12 @@ static int pd_power_down(struct generic_pm_domain *genpd)
         struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
         unsigned int mask = 1 << sh7372_pd->bit_shift;
 
-        if (sh7372_pd->suspend)
-                sh7372_pd->suspend();
+        if (sh7372_pd->suspend) {
+                int ret = sh7372_pd->suspend();
 
-        if (sh7372_pd->stay_on)
-                return 0;
+                if (ret)
+                        return ret;
+        }
 
         if (__raw_readl(PSTR) & mask) {
                 unsigned int retry_count;
@@ -100,22 +102,18 @@ static int pd_power_down(struct generic_pm_domain *genpd)
         }
 
         if (!sh7372_pd->no_debug)
-                pr_debug("sh7372 power domain down 0x%08x -> PSTR = 0x%08x\n",
-                         mask, __raw_readl(PSTR));
+                pr_debug("%s: Power off, 0x%08x -> PSTR = 0x%08x\n",
+                         genpd->name, mask, __raw_readl(PSTR));
 
         return 0;
 }
 
-static int pd_power_up(struct generic_pm_domain *genpd)
+static int __pd_power_up(struct sh7372_pm_domain *sh7372_pd, bool do_resume)
 {
-        struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
         unsigned int mask = 1 << sh7372_pd->bit_shift;
         unsigned int retry_count;
         int ret = 0;
 
-        if (sh7372_pd->stay_on)
-                goto out;
-
         if (__raw_readl(PSTR) & mask)
                 goto out;
 
@@ -123,58 +121,88 @@ static int pd_power_up(struct generic_pm_domain *genpd)
 
         for (retry_count = 2 * PSTR_RETRIES; retry_count; retry_count--) {
                 if (!(__raw_readl(SWUCR) & mask))
-                        goto out;
+                        break;
                 if (retry_count > PSTR_RETRIES)
                         udelay(PSTR_DELAY_US);
                 else
                         cpu_relax();
         }
-        if (__raw_readl(SWUCR) & mask)
+        if (!retry_count)
                 ret = -EIO;
 
         if (!sh7372_pd->no_debug)
-                pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n",
-                         mask, __raw_readl(PSTR));
+                pr_debug("%s: Power on, 0x%08x -> PSTR = 0x%08x\n",
+                         sh7372_pd->genpd.name, mask, __raw_readl(PSTR));
 
  out:
-        if (ret == 0 && sh7372_pd->resume)
+        if (ret == 0 && sh7372_pd->resume && do_resume)
                 sh7372_pd->resume();
 
         return ret;
 }
 
-static void sh7372_a4r_suspend(void)
+static int pd_power_up(struct generic_pm_domain *genpd)
+{
+         return __pd_power_up(to_sh7372_pd(genpd), true);
+}
+
+static int sh7372_a4r_suspend(void)
 {
         sh7372_intcs_suspend();
         __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
+        return 0;
 }
 
 static bool pd_active_wakeup(struct device *dev)
 {
-        return true;
+        bool (*active_wakeup)(struct device *dev);
+
+        active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
+        return active_wakeup ? active_wakeup(dev) : true;
 }
 
-static bool sh7372_power_down_forbidden(struct dev_pm_domain *domain)
+static int sh7372_stop_dev(struct device *dev)
 {
-        return false;
+        int (*stop)(struct device *dev);
+
+        stop = dev_gpd_data(dev)->ops.stop;
+        if (stop) {
+                int ret = stop(dev);
+                if (ret)
+                        return ret;
+        }
+        return pm_clk_suspend(dev);
 }
 
-struct dev_power_governor sh7372_always_on_gov = {
-        .power_down_ok = sh7372_power_down_forbidden,
-};
+static int sh7372_start_dev(struct device *dev)
+{
+        int (*start)(struct device *dev);
+        int ret;
+
+        ret = pm_clk_resume(dev);
+        if (ret)
+                return ret;
+
+        start = dev_gpd_data(dev)->ops.start;
+        if (start)
+                ret = start(dev);
+
+        return ret;
+}
 
 void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
 {
         struct generic_pm_domain *genpd = &sh7372_pd->genpd;
+        struct dev_power_governor *gov = sh7372_pd->gov;
 
-        pm_genpd_init(genpd, sh7372_pd->gov, false);
-        genpd->stop_device = pm_clk_suspend;
-        genpd->start_device = pm_clk_resume;
+        pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
+        genpd->dev_ops.stop = sh7372_stop_dev;
+        genpd->dev_ops.start = sh7372_start_dev;
+        genpd->dev_ops.active_wakeup = pd_active_wakeup;
         genpd->dev_irq_safe = true;
-        genpd->active_wakeup = pd_active_wakeup;
         genpd->power_off = pd_power_down;
         genpd->power_on = pd_power_up;
-        genpd->power_on(&sh7372_pd->genpd);
+        __pd_power_up(sh7372_pd, false);
 }
 
 void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
@@ -194,44 +222,81 @@ void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
 }
 
 struct sh7372_pm_domain sh7372_a4lc = {
+        .genpd.name = "A4LC",
         .bit_shift = 1,
 };
 
 struct sh7372_pm_domain sh7372_a4mp = {
+        .genpd.name = "A4MP",
         .bit_shift = 2,
 };
 
 struct sh7372_pm_domain sh7372_d4 = {
+        .genpd.name = "D4",
         .bit_shift = 3,
 };
 
 struct sh7372_pm_domain sh7372_a4r = {
+        .genpd.name = "A4R",
         .bit_shift = 5,
-        .gov = &sh7372_always_on_gov,
         .suspend = sh7372_a4r_suspend,
         .resume = sh7372_intcs_resume,
-        .stay_on = true,
 };
 
 struct sh7372_pm_domain sh7372_a3rv = {
+        .genpd.name = "A3RV",
         .bit_shift = 6,
 };
 
 struct sh7372_pm_domain sh7372_a3ri = {
+        .genpd.name = "A3RI",
         .bit_shift = 8,
 };
 
+static int sh7372_a4s_suspend(void)
+{
+        /*
+         * The A4S domain contains the CPU core and therefore it should
+         * only be turned off if the CPU is in use.
+         */
+        return -EBUSY;
+}
+
+struct sh7372_pm_domain sh7372_a4s = {
+        .genpd.name = "A4S",
+        .bit_shift = 10,
+        .gov = &pm_domain_always_on_gov,
+        .no_debug = true,
+        .suspend = sh7372_a4s_suspend,
+};
+
+static int sh7372_a3sp_suspend(void)
+{
+        /*
+         * Serial consoles make use of SCIF hardware located in A3SP,
+         * keep such power domain on if "no_console_suspend" is set.
+         */
+        return console_suspend_enabled ? -EBUSY : 0;
+}
+
 struct sh7372_pm_domain sh7372_a3sp = {
+        .genpd.name = "A3SP",
         .bit_shift = 11,
-        .gov = &sh7372_always_on_gov,
+        .gov = &pm_domain_always_on_gov,
         .no_debug = true,
+        .suspend = sh7372_a3sp_suspend,
 };
 
 struct sh7372_pm_domain sh7372_a3sg = {
+        .genpd.name = "A3SG",
         .bit_shift = 13,
 };
 
-#endif /* CONFIG_PM */
+#else /* !CONFIG_PM */
+
+static inline void sh7372_a3sp_init(void) {}
+
+#endif /* !CONFIG_PM */
 
 #if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
 static int sh7372_do_idle_core_standby(unsigned long unused)
@@ -240,11 +305,16 @@ static int sh7372_do_idle_core_standby(unsigned long unused)
         return 0;
 }
 
-static void sh7372_enter_core_standby(void)
+static void sh7372_set_reset_vector(unsigned long address)
 {
         /* set reset vector, translate 4k */
-        __raw_writel(__pa(sh7372_resume_core_standby_a3sm), SBAR);
+        __raw_writel(address, SBAR);
         __raw_writel(0, APARMBAREA);
+}
+
+static void sh7372_enter_core_standby(void)
+{
+        sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
 
         /* enter sleep mode with SYSTBCR to 0x10 */
         __raw_writel(0x10, SYSTBCR);
@@ -257,27 +327,22 @@ static void sh7372_enter_core_standby(void)
 #endif
 
 #ifdef CONFIG_SUSPEND
-static void sh7372_enter_a3sm_common(int pllc0_on)
+static void sh7372_enter_sysc(int pllc0_on, unsigned long sleep_mode)
 {
-        /* set reset vector, translate 4k */
-        __raw_writel(__pa(sh7372_resume_core_standby_a3sm), SBAR);
-        __raw_writel(0, APARMBAREA);
-
         if (pllc0_on)
                 __raw_writel(0, PLLC01STPCR);
         else
                 __raw_writel(1 << 28, PLLC01STPCR);
 
-        __raw_writel(0, PDNSEL); /* power-down A3SM only, not A4S */
         __raw_readl(WUPSFAC); /* read wakeup int. factor before sleep */
-        cpu_suspend(0, sh7372_do_idle_a3sm);
+        cpu_suspend(sleep_mode, sh7372_do_idle_sysc);
         __raw_readl(WUPSFAC); /* read wakeup int. factor after wakeup */
 
          /* disable reset vector translation */
         __raw_writel(0, SBAR);
 }
 
-static int sh7372_a3sm_valid(unsigned long *mskp, unsigned long *msk2p)
+static int sh7372_sysc_valid(unsigned long *mskp, unsigned long *msk2p)
 {
         unsigned long mstpsr0, mstpsr1, mstpsr2, mstpsr3, mstpsr4;
         unsigned long msk, msk2;
@@ -365,7 +430,7 @@ static void sh7372_icr_to_irqcr(unsigned long icr, u16 *irqcr1p, u16 *irqcr2p)
         *irqcr2p = irqcr2;
 }
 
-static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
+static void sh7372_setup_sysc(unsigned long msk, unsigned long msk2)
 {
         u16 irqcrx_low, irqcrx_high, irqcry_low, irqcry_high;
         unsigned long tmp;
@@ -398,6 +463,22 @@ static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
         __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3);
         __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4);
 }
+
+static void sh7372_enter_a3sm_common(int pllc0_on)
+{
+        sh7372_set_reset_vector(__pa(sh7372_resume_core_standby_sysc));
+        sh7372_enter_sysc(pllc0_on, 1 << 12);
+}
+
+static void sh7372_enter_a4s_common(int pllc0_on)
+{
+        sh7372_intca_suspend();
+        memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
+        sh7372_set_reset_vector(SMFRAM);
+        sh7372_enter_sysc(pllc0_on, 1 << 10);
+        sh7372_intca_resume();
+}
+
 #endif
 
 #ifdef CONFIG_CPU_IDLE
@@ -431,14 +512,20 @@ static int sh7372_enter_suspend(suspend_state_t suspend_state)
         unsigned long msk, msk2;
 
         /* check active clocks to determine potential wakeup sources */
-        if (sh7372_a3sm_valid(&msk, &msk2)) {
-
+        if (sh7372_sysc_valid(&msk, &msk2)) {
                 /* convert INTC mask and sense to SYSC mask and sense */
-                sh7372_setup_a3sm(msk, msk2);
-
-                /* enter A3SM sleep with PLLC0 off */
-                pr_debug("entering A3SM\n");
-                sh7372_enter_a3sm_common(0);
+                sh7372_setup_sysc(msk, msk2);
+
+                if (!console_suspend_enabled &&
+                    sh7372_a4s.genpd.status == GPD_STATE_POWER_OFF) {
+                        /* enter A4S sleep with PLLC0 off */
+                        pr_debug("entering A4S\n");
+                        sh7372_enter_a4s_common(0);
+                } else {
+                        /* enter A3SM sleep with PLLC0 off */
+                        pr_debug("entering A3SM\n");
+                        sh7372_enter_a3sm_common(0);
+                }
         } else {
                 /* default to Core Standby that supports all wakeup sources */
                 pr_debug("entering Core Standby\n");
@@ -447,9 +534,37 @@ static int sh7372_enter_suspend(suspend_state_t suspend_state)
         return 0;
 }
 
+/**
+ * sh7372_pm_notifier_fn - SH7372 PM notifier routine.
+ * @notifier: Unused.
+ * @pm_event: Event being handled.
+ * @unused: Unused.
+ */
+static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
+                                 unsigned long pm_event, void *unused)
+{
+        switch (pm_event) {
+        case PM_SUSPEND_PREPARE:
+                /*
+                 * This is necessary, because the A4R domain has to be "on"
+                 * when suspend_device_irqs() and resume_device_irqs() are
+                 * executed during system suspend and resume, respectively, so
+                 * that those functions don't crash while accessing the INTCS.
+                 */
+                pm_genpd_poweron(&sh7372_a4r.genpd);
+                break;
+        case PM_POST_SUSPEND:
+                pm_genpd_poweroff_unused();
+                break;
+        }
+
+        return NOTIFY_DONE;
+}
+
 static void sh7372_suspend_init(void)
 {
         shmobile_suspend_ops.enter = sh7372_enter_suspend;
+        pm_notifier(sh7372_pm_notifier_fn, 0);
 }
 #else
 static void sh7372_suspend_init(void) {}
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 2380389e6ac5..c197f9d29d04 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -994,12 +994,16 @@ void __init sh7372_add_standard_devices(void)
         sh7372_init_pm_domain(&sh7372_a4r);
         sh7372_init_pm_domain(&sh7372_a3rv);
         sh7372_init_pm_domain(&sh7372_a3ri);
-        sh7372_init_pm_domain(&sh7372_a3sg);
+        sh7372_init_pm_domain(&sh7372_a4s);
         sh7372_init_pm_domain(&sh7372_a3sp);
+        sh7372_init_pm_domain(&sh7372_a3sg);
 
         sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv);
         sh7372_pm_add_subdomain(&sh7372_a4r, &sh7372_a4lc);
 
+        sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sg);
+        sh7372_pm_add_subdomain(&sh7372_a4s, &sh7372_a3sp);
+
         platform_add_devices(sh7372_early_devices,
                             ARRAY_SIZE(sh7372_early_devices));
 
diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
index f3ab3c5810ea..1d564674451d 100644
--- a/arch/arm/mach-shmobile/sleep-sh7372.S
+++ b/arch/arm/mach-shmobile/sleep-sh7372.S
@@ -37,13 +37,18 @@
 #if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
         .align  12
         .text
-        .global sh7372_resume_core_standby_a3sm
-sh7372_resume_core_standby_a3sm:
+        .global sh7372_resume_core_standby_sysc
+sh7372_resume_core_standby_sysc:
         ldr     pc, 1f
 1:      .long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
 
-        .global sh7372_do_idle_a3sm
-sh7372_do_idle_a3sm:
+#define SPDCR 0xe6180008
+
+        /* A3SM & A4S power down */
+        .global sh7372_do_idle_sysc
+sh7372_do_idle_sysc:
+        mov     r8, r0 /* sleep mode passed in r0 */
+
         /*
          * Clear the SCTLR.C bit to prevent further data cache
          * allocation. Clearing SCTLR.C would make all the data accesses
@@ -80,13 +85,9 @@ sh7372_do_idle_a3sm:
         dsb
         dmb
 
-#define SPDCR 0xe6180008
-#define A3SM (1 << 12)
-
-        /* A3SM power down */
+        /* SYSC power down */
         ldr     r0, =SPDCR
-        ldr     r1, =A3SM
-        str     r1, [r0]
+        str     r8, [r0]
 1:
         b      1b
 
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da4224ba3d..de3bb41c8e9e 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =VA_SPEAR3XX_ML1_VIC_BASE
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
-                teq     \irqstat, #0
-                beq     1001f                           @ this will set/reset
-                                                        @ zero register
-                /*
-                 * Following code will find bit position of least significang
-                 * bit set in irqstat, using following equation
-                 * least significant bit set in n = (n & ~(n-1))
-                 */
-                sub     \tmp, \irqstat, #1              @ tmp = irqstat - 1
-                mvn     \tmp, \tmp                      @ tmp = ~tmp
-                and     \irqstat, \irqstat, \tmp        @ irqstat &= tmp
-                /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-                clz     \tmp, \irqstat                  @ tmp = leading zeros
-                rsb     \irqnr, \tmp, #0x1F             @ irqnr = 32 - tmp - 1
-
-1001:           /* EQ will be set if no irqs pending */
-                .endm
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index b8f31c3935f7..14276e5a98d2 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -42,6 +42,8 @@ void __init spear3xx_map_io(void);
 void __init spear3xx_init_irq(void);
 void __init spear3xx_init(void);
 
+void spear_restart(char, const char *);
+
 /* pad mux declarations */
 #define PMX_FIRDA_MASK          (1 << 14)
 #define PMX_I2C_MASK            (1 << 13)
diff --git a/arch/arm/mach-spear3xx/include/mach/vmalloc.h b/arch/arm/mach-spear3xx/include/mach/vmalloc.h
deleted file mode 100644
index df977b3c9a63..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/vmalloc.h
- *
- * Defining Vmalloc area for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
-
-#include <plat/vmalloc.h>
-
-#endif /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index a5ff98eed1db..3462ab9d6122 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -67,6 +68,8 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
         .atag_offset    =       0x100,
         .map_io         =       spear3xx_map_io,
         .init_irq       =       spear3xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
         .timer          =       &spear3xx_timer,
         .init_machine   =       spear300_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 45d180d59362..f92c4993f65a 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -73,6 +74,8 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
         .atag_offset    =       0x100,
         .map_io         =       spear3xx_map_io,
         .init_irq       =       spear3xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
         .timer          =       &spear3xx_timer,
         .init_machine   =       spear310_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 22879848d73a..105334ab7021 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -71,6 +72,8 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
         .atag_offset    =       0x100,
         .map_io         =       spear3xx_map_io,
         .init_irq       =       spear3xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
         .timer          =       &spear3xx_timer,
         .init_machine   =       spear320_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed7b203..d490a910d925 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
  * warranty of any kind, whether express or implied.
  */
 
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
-                mov     \irqnr, #0
-                teq     \irqstat, #0
-                bne     1001f
-                ldr     \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
-                teq     \irqstat, #0
-                beq     1002f                           @ this will set/reset
-                                                        @ zero register
-                mov     \irqnr, #32
-1001:
-                /*
-                 * Following code will find bit position of least significang
-                 * bit set in irqstat, using following equation
-                 * least significant bit set in n = (n & ~(n-1))
-                 */
-                sub     \tmp, \irqstat, #1              @ tmp = irqstat - 1
-                mvn     \tmp, \tmp                      @ tmp = ~tmp
-                and     \irqstat, \irqstat, \tmp        @ irqstat &= tmp
-                /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
-                clz     \tmp, \irqstat                  @ tmp = leading zeros
-
-                rsb     \tmp, \tmp, #0x1F               @ tmp = 32 - tmp - 1
-                add     \irqnr, \irqnr, \tmp
-
-1002:           /* EQ will be set if no irqs pending */
-                .endm
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 183f0238c5e2..116b99301cf5 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -41,6 +41,8 @@ void __init spear6xx_init(void);
 void __init spear600_init(void);
 void __init spear6xx_clk_init(void);
 
+void spear_restart(char, const char *);
+
 /* Add spear600 machine device structure declarations here */
 
 #endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/include/mach/vmalloc.h b/arch/arm/mach-spear6xx/include/mach/vmalloc.h
deleted file mode 100644
index 4a0b56cb2a91..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/vmalloc.h
- *
- * Defining Vmalloc area for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_VMALLOC_H
-#define __MACH_VMALLOC_H
-
-#include <plat/vmalloc.h>
-
-#endif  /* __MACH_VMALLOC_H */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index 8238fe38e713..c6e4254741cc 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <mach/generic.h>
@@ -46,6 +47,8 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
         .atag_offset    =       0x100,
         .map_io         =       spear6xx_map_io,
         .init_irq       =       spear6xx_init_irq,
+        .handle_irq     =       vic_handle_irq,
         .timer          =       &spear6xx_timer,
         .init_machine   =       spear600_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig
deleted file mode 100644
index ad86415d1577..000000000000
--- a/arch/arm/mach-tcc8k/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if ARCH_TCC8K
-
-comment "TCC8000 systems:"
-
-config MACH_TCC8000_SDK
-        bool "Telechips TCC8000-SDK development kit"
-        default y
-        help
-          Support for the Telechips TCC8000-SDK board.
-
-endif
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile
deleted file mode 100644
index 9bacf31e49ba..000000000000
--- a/arch/arm/mach-tcc8k/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for TCC8K boards and common files.
-#
-
-# Common support
-obj-y += clock.o irq.o time.o io.o devices.o
-
-# Board specific support
-obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
deleted file mode 100644
index 5e02d4156b04..000000000000
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
-   zreladdr-y           += 0x20008000
-params_phys-y           := 0x20000100
-initrd_phys-y           := 0x20800000
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
deleted file mode 100644
index 777a5bb9eed2..000000000000
--- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/time.h>
-
-#include <mach/clock.h>
-#include <mach/tcc-nand.h>
-#include <mach/tcc8k-regs.h>
-
-#include "common.h"
-
-#define XI_FREQUENCY    12000000
-#define XTI_FREQUENCY   32768
-
-#ifdef CONFIG_MTD_NAND_TCC
-/* NAND */
-static struct tcc_nand_platform_data tcc8k_sdk_nand_data = {
-        .width = 1,
-        .hw_ecc = 0,
-};
-#endif
-
-static void __init tcc8k_init(void)
-{
-#ifdef CONFIG_MTD_NAND_TCC
-        tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data;
-        platform_device_register(&tcc_nand_device);
-#endif
-}
-
-static void __init tcc8k_init_timer(void)
-{
-        tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY);
-}
-
-static struct sys_timer tcc8k_timer = {
-        .init   = tcc8k_init_timer,
-};
-
-static void __init tcc8k_map_io(void)
-{
-        tcc8k_map_common_io();
-
-        /* set PLL0 clock to 96MHz, adapt UART0 divisor */
-        __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS);
-        __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS);
-
-        /* set PLL1 clock to 192MHz */
-        __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS);
-
-        /* set PLL2 clock to 48MHz */
-        __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS);
-
-        /* with CPU freq higher than 150 MHz, need extra DTCM wait */
-        __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS);
-
-        /* PLL locking time as specified */
-        udelay(300);
-}
-
-MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
-        .atag_offset    = 0x100,
-        .map_io         = tcc8k_map_io,
-        .init_irq       = tcc8k_init_irq,
-        .init_machine   = tcc8k_init,
-        .timer          = &tcc8k_timer,
-MACHINE_END
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
deleted file mode 100644
index e7cdae5c77a4..000000000000
--- a/arch/arm/mach-tcc8k/clock.c
+++ /dev/null
@@ -1,580 +0,0 @@
-/*
- * Lowlevel clock handling for Telechips TCC8xxx SoCs
- *
- * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2
- */
-
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <linux/clkdev.h>
-
-#include <mach/clock.h>
-#include <mach/irqs.h>
-#include <mach/tcc8k-regs.h>
-
-#include "common.h"
-
-#define BCLKCTR0        (CKC_BASE + BCLKCTR0_OFFS)
-#define BCLKCTR1        (CKC_BASE + BCLKCTR1_OFFS)
-
-#define ACLKREF         (CKC_BASE + ACLKREF_OFFS)
-#define ACLKUART0       (CKC_BASE + ACLKUART0_OFFS)
-#define ACLKUART1       (CKC_BASE + ACLKUART1_OFFS)
-#define ACLKUART2       (CKC_BASE + ACLKUART2_OFFS)
-#define ACLKUART3       (CKC_BASE + ACLKUART3_OFFS)
-#define ACLKUART4       (CKC_BASE + ACLKUART4_OFFS)
-#define ACLKI2C         (CKC_BASE + ACLKI2C_OFFS)
-#define ACLKADC         (CKC_BASE + ACLKADC_OFFS)
-#define ACLKUSBH        (CKC_BASE + ACLKUSBH_OFFS)
-#define ACLKLCD         (CKC_BASE + ACLKLCD_OFFS)
-#define ACLKSDH0        (CKC_BASE + ACLKSDH0_OFFS)
-#define ACLKSDH1        (CKC_BASE + ACLKSDH1_OFFS)
-#define ACLKSPI0        (CKC_BASE + ACLKSPI0_OFFS)
-#define ACLKSPI1        (CKC_BASE + ACLKSPI1_OFFS)
-#define ACLKSPDIF       (CKC_BASE + ACLKSPDIF_OFFS)
-#define ACLKC3DEC       (CKC_BASE + ACLKC3DEC_OFFS)
-#define ACLKCAN0        (CKC_BASE + ACLKCAN0_OFFS)
-#define ACLKCAN1        (CKC_BASE + ACLKCAN1_OFFS)
-#define ACLKGSB0        (CKC_BASE + ACLKGSB0_OFFS)
-#define ACLKGSB1        (CKC_BASE + ACLKGSB1_OFFS)
-#define ACLKGSB2        (CKC_BASE + ACLKGSB2_OFFS)
-#define ACLKGSB3        (CKC_BASE + ACLKGSB3_OFFS)
-#define ACLKTCT         (CKC_BASE + ACLKTCT_OFFS)
-#define ACLKTCX         (CKC_BASE + ACLKTCX_OFFS)
-#define ACLKTCZ         (CKC_BASE + ACLKTCZ_OFFS)
-
-#define ACLK_MAX_DIV    (0xfff + 1)
-
-/* Crystal frequencies */
-static unsigned long xi_rate, xti_rate;
-
-static void __iomem *pll_cfg_addr(int pll)
-{
-        switch (pll) {
-        case 0: return (CKC_BASE + PLL0CFG_OFFS);
-        case 1: return (CKC_BASE + PLL1CFG_OFFS);
-        case 2: return (CKC_BASE + PLL2CFG_OFFS);
-        default:
-                BUG();
-        }
-}
-
-static int pll_enable(int pll, int enable)
-{
-        u32 reg;
-        void __iomem *addr = pll_cfg_addr(pll);
-
-        reg = __raw_readl(addr);
-        if (enable)
-                reg &= ~PLLxCFG_PD;
-        else
-                reg |= PLLxCFG_PD;
-
-        __raw_writel(reg, addr);
-        return 0;
-}
-
-static int xi_enable(int enable)
-{
-        u32 reg;
-
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        if (enable)
-                reg |= CLKCTRL_XE;
-        else
-                reg &= ~CLKCTRL_XE;
-
-        __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS);
-        return 0;
-}
-
-static int root_clk_enable(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return pll_enable(0, 1);
-        case CLK_SRC_PLL1: return pll_enable(1, 1);
-        case CLK_SRC_PLL2: return pll_enable(2, 1);
-        case CLK_SRC_XI: return xi_enable(1);
-        default:
-                BUG();
-        }
-        return 0;
-}
-
-static int root_clk_disable(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return pll_enable(0, 0);
-        case CLK_SRC_PLL1: return pll_enable(1, 0);
-        case CLK_SRC_PLL2: return pll_enable(2, 0);
-        case CLK_SRC_XI: return xi_enable(0);
-        default:
-                BUG();
-        }
-        return 0;
-}
-
-static int enable_clk(struct clk *clk)
-{
-        u32 reg;
-
-        if (clk->root_id != CLK_SRC_NOROOT)
-                return root_clk_enable(clk->root_id);
-
-        if (clk->aclkreg) {
-                reg = __raw_readl(clk->aclkreg);
-                reg |= ACLK_EN;
-                __raw_writel(reg, clk->aclkreg);
-        }
-        if (clk->bclkctr) {
-                reg = __raw_readl(clk->bclkctr);
-                reg |= 1 << clk->bclk_shift;
-                __raw_writel(reg, clk->bclkctr);
-        }
-        return 0;
-}
-
-static void disable_clk(struct clk *clk)
-{
-        u32 reg;
-
-        if (clk->root_id != CLK_SRC_NOROOT) {
-                root_clk_disable(clk->root_id);
-                return;
-        }
-
-        if (clk->bclkctr) {
-                reg = __raw_readl(clk->bclkctr);
-                reg &= ~(1 << clk->bclk_shift);
-                __raw_writel(reg, clk->bclkctr);
-        }
-        if (clk->aclkreg) {
-                reg = __raw_readl(clk->aclkreg);
-                reg &= ~ACLK_EN;
-                __raw_writel(reg, clk->aclkreg);
-        }
-}
-
-static unsigned long get_rate_pll(int pll)
-{
-        u32 reg;
-        unsigned long s, m, p;
-        void __iomem *addr = pll_cfg_addr(pll);
-
-        reg = __raw_readl(addr);
-        s = (reg >> 16) & 0x07;
-        m = (reg >> 8) & 0xff;
-        p = reg & 0x3f;
-
-        return (m * xi_rate) / (p * (1 << s));
-}
-
-static unsigned long get_rate_pll_div(int pll)
-{
-        u32 reg;
-        unsigned long div = 0;
-        void __iomem *addr;
-
-        switch (pll) {
-        case 0:
-                addr = CKC_BASE + CLKDIVC0_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC0_P0E)
-                        div = (reg >> 24) & 0x3f;
-                break;
-        case 1:
-                addr = CKC_BASE + CLKDIVC0_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC0_P1E)
-                        div = (reg >> 16) & 0x3f;
-                break;
-        case 2:
-                addr = CKC_BASE + CLKDIVC1_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC1_P2E)
-                        div = reg & 0x3f;
-                break;
-        }
-        return get_rate_pll(pll) / (div + 1);
-}
-
-static unsigned long get_rate_xi_div(void)
-{
-        unsigned long div = 0;
-        u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
-
-        if (reg & CLKDIVC0_XE)
-                div = (reg >> 8) & 0x3f;
-
-        return xi_rate / (div + 1);
-}
-
-static unsigned long get_rate_xti_div(void)
-{
-        unsigned long div = 0;
-        u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
-
-        if (reg & CLKDIVC0_XTE)
-                div = reg & 0x3f;
-
-        return xti_rate / (div + 1);
-}
-
-static unsigned long root_clk_get_rate(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return get_rate_pll(0);
-        case CLK_SRC_PLL1: return get_rate_pll(1);
-        case CLK_SRC_PLL2: return get_rate_pll(2);
-        case CLK_SRC_PLL0DIV: return get_rate_pll_div(0);
-        case CLK_SRC_PLL1DIV: return get_rate_pll_div(1);
-        case CLK_SRC_PLL2DIV: return get_rate_pll_div(2);
-        case CLK_SRC_XI: return xi_rate;
-        case CLK_SRC_XTI: return xti_rate;
-        case CLK_SRC_XIDIV: return get_rate_xi_div();
-        case CLK_SRC_XTIDIV: return get_rate_xti_div();
-        default: return 0;
-        }
-}
-
-static unsigned long aclk_get_rate(struct clk *clk)
-{
-        u32 reg;
-        unsigned long div;
-        unsigned int src;
-
-        reg = __raw_readl(clk->aclkreg);
-        div = reg & 0x0fff;
-        src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK;
-        return root_clk_get_rate(src) / (div + 1);
-}
-
-static unsigned long aclk_best_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long div, src, freq, r1, r2;
-
-        if (!rate)
-                return ACLK_MAX_DIV;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-        freq = root_clk_get_rate(src);
-        div = freq / rate;
-        if (!div)
-                return 1;
-        if (div >= ACLK_MAX_DIV)
-                return ACLK_MAX_DIV;
-        r1 = freq / div;
-        r2 = freq / (div + 1);
-        if ((rate - r2) < (r1 - rate))
-                return div + 1;
-
-        return div;
-}
-
-static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned int src;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-
-        return root_clk_get_rate(src) / aclk_best_div(clk, rate);
-}
-
-static int aclk_set_rate(struct clk *clk, unsigned long rate)
-{
-        u32 reg;
-
-        reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK;
-        reg |= aclk_best_div(clk, rate) - 1;
-        __raw_writel(reg, clk->aclkreg);
-        return 0;
-}
-
-static unsigned long get_rate_sys(struct clk *clk)
-{
-        unsigned int src;
-
-        src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK;
-        return root_clk_get_rate(src);
-}
-
-static unsigned long get_rate_bus(struct clk *clk)
-{
-        unsigned int reg, sdiv, bdiv, rate;
-
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        rate = get_rate_sys(clk);
-        sdiv = (reg >> 20) & 3;
-        if (sdiv)
-                rate /= sdiv + 1;
-        bdiv = (reg >> 4) & 0xff;
-        if (bdiv)
-                rate /= bdiv + 1;
-        return rate;
-}
-
-static unsigned long get_rate_cpu(struct clk *clk)
-{
-        unsigned int reg, div, fsys, fbus;
-
-        fbus = get_rate_bus(clk);
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        if (reg & (1 << 29))
-                return fbus;
-        fsys = get_rate_sys(clk);
-        div = (reg >> 16) & 0x0f;
-        return fbus + ((fsys - fbus) * (div + 1)) / 16;
-}
-
-static unsigned long get_rate_root(struct clk *clk)
-{
-        return root_clk_get_rate(clk->root_id);
-}
-
-static int aclk_set_parent(struct clk *clock, struct clk *parent)
-{
-        u32 reg;
-
-        if (clock->parent == parent)
-                return 0;
-
-        clock->parent = parent;
-
-        if (!parent)
-                return 0;
-
-        if (parent->root_id == CLK_SRC_NOROOT)
-                return 0;
-        reg = __raw_readl(clock->aclkreg);
-        reg &= ~ACLK_SEL_MASK;
-        reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK;
-        __raw_writel(reg, clock->aclkreg);
-
-        return 0;
-}
-
-#define DEFINE_ROOT_CLOCK(name, ri, p)  \
-        static struct clk name = {              \
-                .root_id = ri,                  \
-                .get_rate = get_rate_root,                      \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .parent = p,                    \
-        };
-
-#define DEFINE_SPECIAL_CLOCK(name, gr, p)       \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .get_rate = gr,                 \
-                .parent = p,                    \
-        };
-
-#define DEFINE_ACLOCK(name, bc, bs, ar)         \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .bclkctr = bc,                  \
-                .bclk_shift = bs,               \
-                .aclkreg = ar,                  \
-                .get_rate = aclk_get_rate,      \
-                .set_rate = aclk_set_rate,      \
-                .round_rate = aclk_round_rate,  \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .set_parent = aclk_set_parent,  \
-        };
-
-#define DEFINE_BCLOCK(name, bc, bs, gr, p)      \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .bclkctr = bc,                  \
-                .bclk_shift = bs,               \
-                .get_rate = gr,                 \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .parent = p,                    \
-        };
-
-DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL)
-DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL)
-DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi)
-DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti)
-DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi)
-DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi)
-DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi)
-DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
-DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1)
-DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2)
-
-/* The following 3 clocks are special and are initialized explicitly later */
-DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL)
-DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys)
-DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys)
-
-DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT)
-DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX)
-DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ)
-DEFINE_ACLOCK(ref, NULL, 0, ACLKREF)
-DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0)
-DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1)
-DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2)
-DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3)
-DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4)
-DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C)
-DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC)
-DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH)
-DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD)
-DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0)
-DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1)
-DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0)
-DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1)
-DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF)
-DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC)
-DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0)
-DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1)
-DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0)
-DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1)
-DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2)
-DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3)
-DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH)
-
-DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL)
-DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL)
-DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL)
-DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL)
-DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL)
-DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL)
-DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL)
-DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL)
-DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL)
-DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL)
-DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL)
-DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL)
-DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL)
-DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL)
-DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL)
-DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL)
-DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL)
-DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL)
-DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL)
-DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
-DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
-DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
-
-#define _REGISTER_CLOCK(d, n, c) \
-        { \
-                .dev_id = d, \
-                .con_id = n, \
-                .clk = &c, \
-        },
-
-static struct clk_lookup lookups[] = {
-        _REGISTER_CLOCK(NULL, "bus", bus)
-        _REGISTER_CLOCK(NULL, "cpu", cpu)
-        _REGISTER_CLOCK(NULL, "tct", tct)
-        _REGISTER_CLOCK(NULL, "tcx", tcx)
-        _REGISTER_CLOCK(NULL, "tcz", tcz)
-        _REGISTER_CLOCK(NULL, "ref", ref)
-        _REGISTER_CLOCK(NULL, "dai0", dai0)
-        _REGISTER_CLOCK(NULL, "pic", pic)
-        _REGISTER_CLOCK(NULL, "tc", tc)
-        _REGISTER_CLOCK(NULL, "gpio", gpio)
-        _REGISTER_CLOCK(NULL, "usbd", usbd)
-        _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
-        _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
-        _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
-        _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
-        _REGISTER_CLOCK(NULL, "ecc", ecc)
-        _REGISTER_CLOCK(NULL, "adc", adc)
-        _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
-        _REGISTER_CLOCK(NULL, "gdma0", gdma0)
-        _REGISTER_CLOCK(NULL, "lcd", lcd)
-        _REGISTER_CLOCK(NULL, "rtc", rtc)
-        _REGISTER_CLOCK(NULL, "nfc", nfc)
-        _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
-        _REGISTER_CLOCK(NULL, "g2d", g2d)
-        _REGISTER_CLOCK(NULL, "gdma1", gdma1)
-        _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
-        _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
-        _REGISTER_CLOCK(NULL, "mscl", mscl)
-        _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
-        _REGISTER_CLOCK(NULL, "bdma", bdma)
-        _REGISTER_CLOCK(NULL, "adma0", adma0)
-        _REGISTER_CLOCK(NULL, "spdif", spdif)
-        _REGISTER_CLOCK(NULL, "scfg", scfg)
-        _REGISTER_CLOCK(NULL, "cid", cid)
-        _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
-        _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
-        _REGISTER_CLOCK(NULL, "dai1", dai1)
-        _REGISTER_CLOCK(NULL, "adma1", adma1)
-        _REGISTER_CLOCK(NULL, "c3dec", c3dec)
-        _REGISTER_CLOCK("tcc-can.0", NULL, can0)
-        _REGISTER_CLOCK("tcc-can.1", NULL, can1)
-        _REGISTER_CLOCK(NULL, "gps", gps)
-        _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
-        _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
-        _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
-        _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
-        _REGISTER_CLOCK(NULL, "gdma2", gdma2)
-        _REGISTER_CLOCK(NULL, "gdma3", gdma3)
-        _REGISTER_CLOCK(NULL, "ddrc", ddrc)
-        _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
-};
-
-static struct clk *root_clk_by_index(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return &pll0;
-        case CLK_SRC_PLL1: return &pll1;
-        case CLK_SRC_PLL2: return &pll2;
-        case CLK_SRC_PLL0DIV: return &pll0div;
-        case CLK_SRC_PLL1DIV: return &pll1div;
-        case CLK_SRC_PLL2DIV: return &pll2div;
-        case CLK_SRC_XI: return &xi;
-        case CLK_SRC_XTI: return &xti;
-        case CLK_SRC_XIDIV: return &xidiv;
-        case CLK_SRC_XTIDIV: return &xtidiv;
-        default: return NULL;
-        }
-}
-
-static void find_aclk_parent(struct clk *clk)
-{
-        unsigned int src;
-        struct clk *clock;
-
-        if (!clk->aclkreg)
-                return;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-
-        clock = root_clk_by_index(src);
-        if (!clock)
-                return;
-
-        clk->parent = clock;
-        clk->set_parent = aclk_set_parent;
-}
-
-void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq)
-{
-        int i;
-
-        xi_rate = xi_freq;
-        xti_rate = xti_freq;
-
-        /* fixup parents and add the clock */
-        for (i = 0; i < ARRAY_SIZE(lookups); i++) {
-                find_aclk_parent(lookups[i].clk);
-                clkdev_add(&lookups[i]);
-        }
-        tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32);
-}
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h
deleted file mode 100644
index 705690add395..000000000000
--- a/arch/arm/mach-tcc8k/common.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef MACH_TCC8K_COMMON_H
-#define MACH_TCC8K_COMMON_H
-
-#include <linux/platform_device.h>
-
-extern struct platform_device tcc_nand_device;
-
-struct clk;
-
-extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq);
-extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq);
-extern void tcc8k_init_irq(void);
-extern void tcc8k_map_common_io(void);
-
-#endif
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c
deleted file mode 100644
index 6722ad7c2836..000000000000
--- a/arch/arm/mach-tcc8k/devices.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/*
- * linux/arch/arm/mach-tcc8k/devices.c
- *
- * Copyright (C) Telechips, Inc.
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of GPL v2.
- *
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-static u64 tcc8k_dmamask = DMA_BIT_MASK(32);
-
-#ifdef CONFIG_MTD_NAND_TCC
-/* NAND controller */
-static struct resource tcc_nand_resources[] = {
-        {
-                .start  = (resource_size_t)NFC_BASE,
-                .end    = (resource_size_t)NFC_BASE + 0x7f,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = INT_NFC,
-                .end    = INT_NFC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device tcc_nand_device = {
-        .name = "tcc_nand",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(tcc_nand_resources),
-        .resource = tcc_nand_resources,
-};
-#endif
-
-#ifdef CONFIG_MMC_TCC8K
-/* MMC controller */
-static struct resource tcc8k_mmc0_resource[] = {
-        {
-                .start = INT_SD0,
-                .end   = INT_SD0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct resource tcc8k_mmc1_resource[] = {
-        {
-                .start = INT_SD1,
-                .end   = INT_SD1,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device tcc8k_mmc0_device = {
-        .name           = "tcc-mmc",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(tcc8k_mmc0_resource),
-        .resource       = tcc8k_mmc0_resource,
-        .dev            = {
-                .dma_mask               = &tcc8k_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
-
-struct platform_device tcc8k_mmc1_device = {
-        .name           = "tcc-mmc",
-        .id             = 1,
-        .num_resources  = ARRAY_SIZE(tcc8k_mmc1_resource),
-        .resource       = tcc8k_mmc1_resource,
-        .dev            = {
-                .dma_mask               = &tcc8k_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
-
-static inline void tcc8k_init_mmc(void)
-{
-        u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS);
-
-        reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS;
-        __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS);
-
-        platform_device_register(&tcc8k_mmc0_device);
-        platform_device_register(&tcc8k_mmc1_device);
-}
-#else
-static inline void tcc8k_init_mmc(void) { }
-#endif
-
-#ifdef CONFIG_USB_OHCI_HCD
-static int tcc8k_ohci_init(struct device *dev)
-{
-        u32 reg;
-
-        /* Use GPIO PK19 as VBUS control output */
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS);
-        reg &= ~(1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS);
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS);
-        reg &= ~(1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS);
-
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS);
-        reg |= (1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS);
-        /* Turn on VBUS */
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS);
-        reg |= (1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS);
-
-        return 0;
-}
-
-static struct resource tcc8k_ohci0_resources[] = {
-        [0] = {
-                .start = (resource_size_t)USBH0_BASE,
-                .end   = (resource_size_t)USBH0_BASE + 0x5c,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = INT_USBH0,
-                .end   = INT_USBH0,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static struct resource tcc8k_ohci1_resources[] = {
-        [0] = {
-                .start = (resource_size_t)USBH1_BASE,
-                .end   = (resource_size_t)USBH1_BASE + 0x5c,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = INT_USBH1,
-                .end   = INT_USBH1,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static struct tccohci_platform_data tcc8k_ohci0_platform_data = {
-        .controller     = 0,
-        .port_mode      = PMM_PERPORT_MODE,
-        .init           = tcc8k_ohci_init,
-};
-
-static struct tccohci_platform_data tcc8k_ohci1_platform_data = {
-        .controller     = 1,
-        .port_mode      = PMM_PERPORT_MODE,
-        .init           = tcc8k_ohci_init,
-};
-
-static struct platform_device ohci0_device = {
-        .name = "tcc-ohci",
-        .id = 0,
-        .dev = {
-                .dma_mask = &tcc8k_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &tcc8k_ohci0_platform_data,
-        },
-        .num_resources  = ARRAY_SIZE(tcc8k_ohci0_resources),
-        .resource       = tcc8k_ohci0_resources,
-};
-
-static struct platform_device ohci1_device = {
-        .name = "tcc-ohci",
-        .id = 1,
-        .dev = {
-                .dma_mask = &tcc8k_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &tcc8k_ohci1_platform_data,
-        },
-        .num_resources  = ARRAY_SIZE(tcc8k_ohci1_resources),
-        .resource       = tcc8k_ohci1_resources,
-};
-
-static void __init tcc8k_init_usbhost(void)
-{
-        platform_device_register(&ohci0_device);
-        platform_device_register(&ohci1_device);
-}
-#else
-static void __init tcc8k_init_usbhost(void) { }
-#endif
-
-/* USB device controller*/
-#ifdef CONFIG_USB_GADGET_TCC8K
-static struct resource udc_resources[] = {
-        [0] = {
-                .start = INT_USBD,
-                .end   = INT_USBD,
-                .flags = IORESOURCE_IRQ,
-        },
-        [1] = {
-                .start = INT_UDMA,
-                .end   = INT_UDMA,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tcc8k_udc_device = {
-        .name = "tcc-udc",
-        .id = 0,
-        .resource = udc_resources,
-        .num_resources = ARRAY_SIZE(udc_resources),
-        .dev = {
-                 .dma_mask = &tcc8k_dmamask,
-                 .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-};
-
-static void __init tcc8k_init_usb_gadget(void)
-{
-        platform_device_register(&tcc8k_udc_device);
-}
-#else
-static void __init tcc8k_init_usb_gadget(void) { }
-#endif  /* CONFIG_USB_GADGET_TCC83X */
-
-static int __init tcc8k_init_devices(void)
-{
-        tcc8k_init_mmc();
-        tcc8k_init_usbhost();
-        tcc8k_init_usb_gadget();
-        return 0;
-}
-
-arch_initcall(tcc8k_init_devices);
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c
deleted file mode 100644
index 9b39d7fa658f..000000000000
--- a/arch/arm/mach-tcc8k/io.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * linux/arch/arm/mach-tcc8k/io.c
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * derived from TCC83xx io.c
- * Copyright (C) Telechips, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/tcc8k-regs.h>
-
-/*
- * The machine specific code may provide the extra mapping besides the
- * default mapping provided here.
- */
-static struct map_desc tcc8k_io_desc[] __initdata = {
-        {
-                .virtual        = (unsigned long)CS1_BASE_VIRT,
-                .pfn            = __phys_to_pfn(CS1_BASE),
-                .length         = CS1_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)AHB_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(AHB_PERI_BASE),
-                .length         = AHB_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)APB0_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(APB0_PERI_BASE),
-                .length         = APB0_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)APB1_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(APB1_PERI_BASE),
-                .length         = APB1_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)EXT_MEM_CTRL_BASE_VIRT,
-                .pfn            = __phys_to_pfn(EXT_MEM_CTRL_BASE),
-                .length         = EXT_MEM_CTRL_SIZE,
-                .type           = MT_DEVICE,
-        },
-};
-
-/*
- * Maps common IO regions for tcc8k.
- *
- */
-void __init tcc8k_map_common_io(void)
-{
-        iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc));
-}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
deleted file mode 100644
index 209fa5c65d4c..000000000000
--- a/arch/arm/mach-tcc8k/irq.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (C) Telechips, Inc.
- * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU GPL version 2.
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-/* Disable IRQ */
-static void tcc8000_mask_ack_irq0(struct irq_data *d)
-{
-        PIC0_IEN &= ~(1 << d->irq);
-        PIC0_CREQ |=  (1 << d->irq);
-}
-
-static void tcc8000_mask_ack_irq1(struct irq_data *d)
-{
-        PIC1_IEN &= ~(1 << (d->irq - 32));
-        PIC1_CREQ |= (1 << (d->irq - 32));
-}
-
-static void tcc8000_mask_irq0(struct irq_data *d)
-{
-        PIC0_IEN &= ~(1 << d->irq);
-}
-
-static void tcc8000_mask_irq1(struct irq_data *d)
-{
-        PIC1_IEN &= ~(1 << (d->irq - 32));
-}
-
-static void tcc8000_ack_irq0(struct irq_data *d)
-{
-        PIC0_CREQ |=  (1 << d->irq);
-}
-
-static void tcc8000_ack_irq1(struct irq_data *d)
-{
-        PIC1_CREQ |= (1 << (d->irq - 32));
-}
-
-/* Enable IRQ */
-static void tcc8000_unmask_irq0(struct irq_data *d)
-{
-        PIC0_IEN |= (1 << d->irq);
-        PIC0_INTOEN |= (1 << d->irq);
-}
-
-static void tcc8000_unmask_irq1(struct irq_data *d)
-{
-        PIC1_IEN |= (1 << (d->irq - 32));
-        PIC1_INTOEN |= (1 << (d->irq - 32));
-}
-
-static struct irq_chip tcc8000_irq_chip0 = {
-        .name           = "tcc_irq0",
-        .irq_mask       = tcc8000_mask_irq0,
-        .irq_ack        = tcc8000_ack_irq0,
-        .irq_mask_ack   = tcc8000_mask_ack_irq0,
-        .irq_unmask     = tcc8000_unmask_irq0,
-};
-
-static struct irq_chip tcc8000_irq_chip1 = {
-        .name           = "tcc_irq1",
-        .irq_mask       = tcc8000_mask_irq1,
-        .irq_ack        = tcc8000_ack_irq1,
-        .irq_mask_ack   = tcc8000_mask_ack_irq1,
-        .irq_unmask     = tcc8000_unmask_irq1,
-};
-
-void __init tcc8k_init_irq(void)
-{
-        int irqno;
-
-        /* Mask and clear all interrupts */
-        PIC0_IEN = 0x00000000;
-        PIC0_CREQ = 0xffffffff;
-        PIC1_IEN = 0x00000000;
-        PIC1_CREQ = 0xffffffff;
-
-        PIC0_MEN0 = 0x00000003;
-        PIC1_MEN1 = 0x00000003;
-        PIC1_MEN = 0x00000003;
-
-        /* let all IRQs be level triggered */
-        PIC0_TMODE = 0xffffffff;
-        PIC1_TMODE = 0xffffffff;
-        /* all IRQs are IRQs (not FIQs) */
-        PIC0_IRQSEL = 0xffffffff;
-        PIC1_IRQSEL = 0xffffffff;
-
-        for (irqno = 0; irqno < NR_IRQS; irqno++) {
-                if (irqno < 32)
-                        irq_set_chip(irqno, &tcc8000_irq_chip0);
-                else
-                        irq_set_chip(irqno, &tcc8000_irq_chip1);
-                irq_set_handler(irqno, handle_level_irq);
-                set_irq_flags(irqno, IRQF_VALID);
-        }
-}
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c
deleted file mode 100644
index a96babe83771..000000000000
--- a/arch/arm/mach-tcc8k/time.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * TCC8000 system timer setup
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL version 2.
- *
- */
-
-#include <linux/clk.h>
-#include <linux/clockchips.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-
-#include <asm/mach/time.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-static void __iomem *timer_base;
-
-static int tcc_set_next_event(unsigned long evt,
-                              struct clock_event_device *unused)
-{
-        unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS);
-
-        __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS);
-        return 0;
-}
-
-static void tcc_set_mode(enum clock_event_mode mode,
-                                struct clock_event_device *evt)
-{
-        unsigned long tc32irq;
-
-        switch (mode) {
-        case CLOCK_EVT_MODE_ONESHOT:
-                tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
-                tc32irq |= TC32IRQ_IRQEN0;
-                __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
-                break;
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_UNUSED:
-                tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
-                tc32irq &= ~TC32IRQ_IRQEN0;
-                __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
-                break;
-        case CLOCK_EVT_MODE_PERIODIC:
-        case CLOCK_EVT_MODE_RESUME:
-                break;
-        }
-}
-
-static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id)
-{
-        struct clock_event_device *evt = dev_id;
-
-        /* Acknowledge TC32 interrupt by reading TC32IRQ */
-        __raw_readl(timer_base + TC32IRQ_OFFS);
-
-        evt->event_handler(evt);
-
-        return IRQ_HANDLED;
-}
-
-static struct clock_event_device clockevent_tcc = {
-        .name           = "tcc_timer1",
-        .features       = CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
-        .set_mode       = tcc_set_mode,
-        .set_next_event = tcc_set_next_event,
-        .rating         = 200,
-};
-
-static struct irqaction tcc8k_timer_irq = {
-        .name           = "TC32_timer",
-        .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .handler        = tcc8k_timer_interrupt,
-        .dev_id         = &clockevent_tcc,
-};
-
-static int __init tcc_clockevent_init(struct clk *clock)
-{
-        unsigned int c = clk_get_rate(clock);
-
-        clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c,
-                200, 32, clocksource_mmio_readl_up);
-
-        clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC,
-                                        clockevent_tcc.shift);
-        clockevent_tcc.max_delta_ns =
-                        clockevent_delta2ns(0xfffffffe, &clockevent_tcc);
-        clockevent_tcc.min_delta_ns =
-                        clockevent_delta2ns(0xff, &clockevent_tcc);
-
-        clockevent_tcc.cpumask = cpumask_of(0);
-
-        clockevents_register_device(&clockevent_tcc);
-
-        return 0;
-}
-
-void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq)
-{
-        u32 reg;
-
-        timer_base = base;
-        tcc8k_timer_irq.irq = irq;
-
-        /* Enable clocks */
-        clk_enable(clock);
-
-        /* Initialize 32-bit timer */
-        reg = __raw_readl(timer_base + TC32EN_OFFS);
-        reg &= ~TC32EN_ENABLE; /* Disable timer */
-        __raw_writel(reg, timer_base + TC32EN_OFFS);
-        /* Free running timer, counting from 0 to 0xffffffff */
-        __raw_writel(0, timer_base + TC32EN_OFFS);
-        __raw_writel(0, timer_base + TC32LDV_OFFS);
-        reg = __raw_readl(timer_base + TC32IRQ_OFFS);
-        reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */
-        __raw_writel(reg, timer_base + TC32IRQ_OFFS);
-
-        __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS);
-
-        tcc_clockevent_init(clock);
-        setup_irq(irq, &tcc8k_timer_irq);
-}
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index 74743ad3d2d3..e417a8383dbb 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -32,6 +32,7 @@
 #include <linux/i2c.h>
 #include <linux/i2c-tegra.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -130,7 +131,9 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_dt_init,
+        .restart        = tegra_assert_system_reset,
         .dt_compat      = tegra_dt_board_compat,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index f0bdc5e3fe52..70ee674131f9 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -31,6 +31,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
+#include <asm/hardware/gic.h>
 #include <asm/setup.h>
 
 #include <mach/tegra_wm8903_pdata.h>
@@ -187,6 +188,8 @@ MACHINE_START(HARMONY, "harmony")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_harmony_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 55c55ba89f1e..33d6205ad307 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -29,6 +29,7 @@
 #include <linux/gpio.h>
 #include <linux/rfkill-gpio.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -190,6 +191,8 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_paz00_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index bf13ea355efc..c1599eb8e0cb 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -34,6 +34,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 
 #include "board.h"
 #include "board-seaboard.h"
@@ -284,8 +285,10 @@ MACHINE_START(SEABOARD, "seaboard")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_seaboard_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
 
 MACHINE_START(KAEN, "kaen")
@@ -293,8 +296,10 @@ MACHINE_START(KAEN, "kaen")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_kaen_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
 
 MACHINE_START(WARIO, "wario")
@@ -302,6 +307,8 @@ MACHINE_START(WARIO, "wario")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_wario_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 1a6617b7806f..c242314a1db5 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -26,6 +26,7 @@
 #include <linux/i2c.h>
 #include <linux/gpio.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
@@ -176,6 +177,8 @@ MACHINE_START(TRIMSLICE, "trimslice")
         .map_io         = tegra_map_common_io,
         .init_early     = tegra_init_early,
         .init_irq       = tegra_init_irq,
+        .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_trimslice_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 690b888be506..20f396d740fa 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -31,8 +31,6 @@
 #include "clock.h"
 #include "fuse.h"
 
-void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
-
 void tegra_assert_system_reset(char mode, const char *cmd)
 {
         void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c53889d..ac11262149c7 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -12,30 +12,15 @@
  * GNU General Public License for more details.
  *
  */
-#include <mach/iomap.h>
-#include <mach/io.h>
-
-#if defined(CONFIG_ARM_GIC)
-#define HAVE_GET_IRQNR_PREAMBLE
-#include <asm/hardware/entry-macro-gic.S>
-
-        /* Uses the GIC interrupt controller built into the cpu */
-#define ICTRL_BASE (IO_CPU_VIRT + 0x100)
 
         .macro  disable_fiq
         .endm
 
-        .macro  get_irqnr_preamble, base, tmp
-        movw \base, #(ICTRL_BASE & 0x0000ffff)
-        movt \base, #((ICTRL_BASE & 0xffff0000) >> 16)
+        .macro  arch_ret_to_user, tmp1, tmp2
         .endm
 
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-#else
+#if !defined(CONFIG_ARM_GIC)
         /* legacy interrupt controller for AP16 */
-        .macro  disable_fiq
-        .endm
 
         .macro  get_irqnr_preamble, base, tmp
         @ enable imprecise aborts
@@ -46,9 +31,6 @@
         orr \base, #0x0000f000
         .endm
 
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
         ldr \irqnr, [\base, #0x20]      @ EVT_IRQ_STS
         cmp \irqnr, #0x80
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 35a011fbc42d..f15defffb5d2 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -71,12 +71,6 @@
 
 #ifndef __ASSEMBLER__
 
-#define __arch_ioremap          tegra_ioremap
-#define __arch_iounmap          tegra_iounmap
-
-void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
-void tegra_iounmap(volatile void __iomem *addr);
-
 #define IO_ADDRESS(n) (IO_TO_VIRT(n))
 
 #ifdef CONFIG_TEGRA_PCI
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
index 027c4215d313..a312988bf6f8 100644
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ b/arch/arm/mach-tegra/include/mach/system.h
@@ -21,10 +21,6 @@
 #ifndef __MACH_TEGRA_SYSTEM_H
 #define __MACH_TEGRA_SYSTEM_H
 
-#include <mach/iomap.h>
-
-extern void (*arch_reset)(char mode, const char *cmd);
-
 static inline void arch_idle(void)
 {
 }
diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h
deleted file mode 100644
index fd6aa65b2dc6..000000000000
--- a/arch/arm/mach-tegra/include/mach/vmalloc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/vmalloc.h
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Erik Gilling <konkers@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_TEGRA_VMALLOC_H
-#define __MACH_TEGRA_VMALLOC_H
-
-#include <asm/sizes.h>
-
-#define VMALLOC_END        0xFE000000UL
-
-#endif
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 5489f8b5d6ad..d23ee2db2827 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -60,24 +60,3 @@ void __init tegra_map_common_io(void)
 {
         iotable_init(tegra_io_desc, ARRAY_SIZE(tegra_io_desc));
 }
-
-/*
- * Intercept ioremap() requests for addresses in our fixed mapping regions.
- */
-void __iomem *tegra_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-        void __iomem *v = IO_ADDRESS(p);
-        if (v == NULL)
-                v = __arm_ioremap(p, size, type);
-        return v;
-}
-EXPORT_SYMBOL(tegra_ioremap);
-
-void tegra_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(tegra_iounmap);
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e2272d263a83..732c724008b1 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -19,7 +19,6 @@
 
 #include <linux/init.h>
 #include <linux/err.h>
-#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = {
         .set_mode       = tegra_timer_set_mode,
 };
 
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 1us and a wrap period of about 1h11min.
- */
-#define SC_MULT         4194304000u
-#define SC_SHIFT        22
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-static void notrace tegra_update_sched_clock(void)
+static u32 notrace tegra_read_sched_clock(void)
 {
-        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return timer_readl(TIMERUS_CNTR_1US);
 }
 
 /*
@@ -218,8 +201,7 @@ static void __init tegra_init_timer(void)
                 WARN(1, "Unknown clock rate");
         }
 
-        init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
-                               1000000, SC_MULT, SC_SHIFT);
+        setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
 
         if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
                 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index ac0791e924bc..697930761b3e 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1888,3 +1888,23 @@ static int core_module_init(void)
         return mmc_init(&mmcsd_device);
 }
 module_init(core_module_init);
+
+/* Forward declare this function from the watchdog */
+void coh901327_watchdog_reset(void);
+
+void u300_restart(char mode, const char *cmd)
+{
+        switch (mode) {
+        case 's':
+        case 'h':
+#ifdef CONFIG_COH901327_WATCHDOG
+                coh901327_watchdog_reset();
+#endif
+                break;
+        default:
+                /* Do nothing */
+                break;
+        }
+        /* Wait for system do die/reset. */
+        while (1);
+}
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S
index 20731ae39d38..7181d6ac6651 100644
--- a/arch/arm/mach-u300/include/mach/entry-macro.S
+++ b/arch/arm/mach-u300/include/mach/entry-macro.S
@@ -8,33 +8,9 @@
  * Low-level IRQ helper macros for ST-Ericsson U300
  * Author: Linus Walleij <linus.walleij@stericsson.com>
  */
-#include <mach/hardware.h>
-#include <asm/hardware/vic.h>
 
         .macro  disable_fiq
         .endm
 
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON0_BASE
-        ldr     \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
-        mov     \irqnr, #0
-        teq     \irqstat, #0
-        bne     1002f
-1001:   ldr     \base, = U300_AHB_PER_VIRT_BASE-U300_AHB_PER_PHYS_BASE+U300_INTCON1_BASE
-        ldr     \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
-        mov     \irqnr, #32
-        teq     \irqstat, #0
-        beq     1003f
-1002:   tst     \irqstat, #1
-        bne     1003f
-        add     \irqnr, \irqnr, #1
-        movs    \irqstat, \irqstat, lsr #1
-        bne     1002b
-1003:           /* EQ will be set if no irqs pending */
-        .endm
diff --git a/arch/arm/mach-u300/include/mach/platform.h b/arch/arm/mach-u300/include/mach/platform.h
index 77d9210a82e2..096333f32fc3 100644
--- a/arch/arm/mach-u300/include/mach/platform.h
+++ b/arch/arm/mach-u300/include/mach/platform.h
@@ -14,6 +14,7 @@
 void u300_map_io(void);
 void u300_init_irq(void);
 void u300_init_devices(void);
+void u300_restart(char, const char *);
 extern struct sys_timer u300_timer;
 
 #endif
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
index 8daf13634ce0..574d46e38290 100644
--- a/arch/arm/mach-u300/include/mach/system.h
+++ b/arch/arm/mach-u300/include/mach/system.h
@@ -8,35 +8,7 @@
  * System shutdown and reset functions.
  * Author: Linus Walleij <linus.walleij@stericsson.com>
  */
-#include <mach/hardware.h>
-#include <asm/io.h>
-#include <asm/hardware/vic.h>
-#include <asm/irq.h>
-
-/* Forward declare this function from the watchdog */
-void coh901327_watchdog_reset(void);
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static void arch_reset(char mode, const char *cmd)
-{
-        switch (mode) {
-        case 's':
-        case 'h':
-                printk(KERN_CRIT "RESET: shutting down/rebooting system\n");
-                /* Disable interrupts */
-                local_irq_disable();
-#ifdef CONFIG_COH901327_WATCHDOG
-                coh901327_watchdog_reset();
-#endif
-                break;
-        default:
-                /* Do nothing */
-                break;
-        }
-        /* Wait for system do die/reset. */
-        while (1);
-}
diff --git a/arch/arm/mach-u300/include/mach/vmalloc.h b/arch/arm/mach-u300/include/mach/vmalloc.h
deleted file mode 100644
index ec423b92b81d..000000000000
--- a/arch/arm/mach-u300/include/mach/vmalloc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/vmalloc.h
- *
- *
- * Copyright (C) 2006-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * Virtual memory allocations
- * End must be above the I/O registers and on an even 2MiB boundary.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#define VMALLOC_END     0xfe800000UL
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 5f51bdeef0ef..bc1c7897e82d 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -9,7 +9,6 @@
  * Author: Linus Walleij <linus.walleij@stericsson.com>
  */
 #include <linux/interrupt.h>
-#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/timex.h>
 #include <linux/clockchips.h>
@@ -337,18 +336,10 @@ static struct irqaction u300_timer_irq = {
  * this wraps around for now, since it is just a relative time
  * stamp. (Inspired by OMAP implementation.)
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace u300_read_sched_clock(void)
 {
-        u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace u300_update_sched_clock(void)
-{
-        u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
 }
 
 
@@ -366,7 +357,7 @@ static void __init u300_timer_init(void)
         clk_enable(clk);
         rate = clk_get_rate(clk);
 
-        init_sched_clock(&cd, u300_update_sched_clock, 32, rate);
+        setup_sched_clock(u300_read_sched_clock, 32, rate);
 
         /*
          * Disable the "OS" and "DD" timers - these are designed for Symbian!
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 89422ee7f3a8..def45bda2932 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/memory.h>
@@ -49,6 +50,8 @@ MACHINE_START(U300, MACH_U300_STRING)
         .atag_offset    = BOOT_PARAMS_OFFSET,
         .map_io         = u300_map_io,
         .init_irq       = u300_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &u300_timer,
         .init_machine   = u300_init_machine,
+        .restart        = u300_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bdd7b80dd7ad..de1f5f8f7330 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -33,6 +33,7 @@
 #include <linux/leds.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 
 #include <plat/i2c.h>
 #include <plat/ste_dma40.h>
@@ -695,6 +696,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
         .init_irq       = ux500_init_irq,
         /* we re-use nomadik timer here */
         .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = mop500_init_machine,
 MACHINE_END
 
@@ -703,6 +705,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
         .map_io         = u8500_map_io,
         .init_irq       = ux500_init_irq,
         .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = hrefv60_init_machine,
 MACHINE_END
 
@@ -712,5 +715,6 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
         .init_irq       = ux500_init_irq,
         /* we re-use nomadik timer here */
         .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = snowball_init_machine,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 82025ba70c03..fe1569b67c91 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -12,6 +12,7 @@
 #include <linux/i2c.h>
 #include <linux/mfd/ab5500/ab5500.h>
 
+#include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
@@ -149,5 +150,6 @@ MACHINE_START(U5500, "ST-Ericsson U5500 Platform")
         .map_io         = u5500_map_io,
         .init_irq       = ux500_init_irq,
         .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = u5500_init_machine,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 9de1af008094..5323286b265e 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = {
 };
 
 static struct map_desc u5500_io_desc[] __initdata = {
-        __IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K),
+        /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+        __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),
-        __IO_DEV_DESC(U5500_TWD_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),
-        __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),
 
         __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 13e8890a8b8a..7f2729c05db3 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = {
 };
 
 static struct map_desc u8500_io_desc[] __initdata = {
-        __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
+        /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+        __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
-        __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
-        __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
 
         __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index 071bba94f727..e16299e1020a 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -10,8 +10,6 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
 
                 .macro  disable_fiq
                 .endm
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h
index 7389df911b1a..c01ef66537f3 100644
--- a/arch/arm/mach-ux500/include/mach/gpio.h
+++ b/arch/arm/mach-ux500/include/mach/gpio.h
@@ -1,10 +1,5 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H
 
-/*
- * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough
- * room for a couple of GPIO expanders.
- */
-#define ARCH_NR_GPIOS   350
 
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
index c0cd8006f1a2..258e5c919c24 100644
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ b/arch/arm/mach-ux500/include/mach/system.h
@@ -17,9 +17,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* yet to be implemented - TODO */
-}
-
 #endif
diff --git a/arch/arm/mach-ux500/include/mach/vmalloc.h b/arch/arm/mach-ux500/include/mach/vmalloc.h
deleted file mode 100644
index a4945cb41172..000000000000
--- a/arch/arm/mach-ux500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- *  Copyright (C) 2009 ST-Ericsson
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END     0xf0000000UL
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index e340a54251df..02b7b9303f3b 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -22,7 +22,6 @@
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
 #include <linux/interrupt.h>
 #include <linux/irqdomain.h>
 #include <linux/of_address.h>
@@ -141,11 +140,6 @@ static struct map_desc versatile_io_desc[] __initdata = {
         },
 #ifdef CONFIG_MACH_VERSATILE_AB
         {
-                .virtual        =  IO_ADDRESS(VERSATILE_GPIO0_BASE),
-                .pfn            = __phys_to_pfn(VERSATILE_GPIO0_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        =  IO_ADDRESS(VERSATILE_IB2_BASE),
                 .pfn            = __phys_to_pfn(VERSATILE_IB2_BASE),
                 .length         = SZ_64M,
@@ -745,6 +739,19 @@ static void versatile_leds_event(led_event_t ledevt)
 }
 #endif  /* CONFIG_LEDS */
 
+void versatile_restart(char mode, const char *cmd)
+{
+        void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
+        u32 val;
+
+        val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET);
+        val |= 0x105;
+
+        __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET);
+        __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET);
+        __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET);
+}
+
 /* Early initializations */
 void __init versatile_init_early(void)
 {
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index e01422700ebb..2ef2f555f315 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -30,6 +30,7 @@ extern void __init versatile_init_early(void);
 extern void __init versatile_init_irq(void);
 extern void __init versatile_map_io(void);
 extern struct sys_timer versatile_timer;
+extern void versatile_restart(char, const char *);
 extern unsigned int mmc_status(struct device *dev);
 #ifdef CONFIG_OF
 extern struct of_dev_auxdata versatile_auxdata_lookup[];
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S
index e6f7c1663160..b6f0dbf122ee 100644
--- a/arch/arm/mach-versatile/include/mach/entry-macro.S
+++ b/arch/arm/mach-versatile/include/mach/entry-macro.S
@@ -7,39 +7,9 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include <asm/hardware/vic.h>
 
                 .macro  disable_fiq
                 .endm
 
-                .macro  get_irqnr_preamble, base, tmp
-                ldr     \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
-                .endm
-
                 .macro  arch_ret_to_user, tmp1, tmp2
                 .endm
-
-                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get masked status
-                mov     \irqnr, #0
-                teq     \irqstat, #0
-                beq     1003f
-
-1001:           tst     \irqstat, #15
-                bne     1002f
-                add     \irqnr, \irqnr, #4
-                movs    \irqstat, \irqstat, lsr #4
-                bne     1001b
-1002:           tst     \irqstat, #1
-                bne     1003f
-                add     \irqnr, \irqnr, #1
-                movs    \irqstat, \irqstat, lsr #1
-                bne     1002b
-1003:           /* EQ will be set if no irqs pending */
-
-@               clz     \irqnr, \irqstat
-@1003:          /* EQ will be set if we reach MAXIRQNUM */
-                .endm
-
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
index 8ffc12a7cb25..f3fa347895f0 100644
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ b/arch/arm/mach-versatile/include/mach/system.h
@@ -21,10 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -34,16 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        u32 val;
-
-        val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
-        val |= 0x105;
-
-        __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
-        __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
-        __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
-}
-
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/vmalloc.h b/arch/arm/mach-versatile/include/mach/vmalloc.h
deleted file mode 100644
index 7d8e069ad51b..000000000000
--- a/arch/arm/mach-versatile/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END             0xd8000000UL
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index fda4866703cd..98f65493177a 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -21,12 +21,12 @@
 
 #include <linux/init.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 
 #include <asm/mach/arch.h>
@@ -39,6 +39,8 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
         .map_io         = versatile_map_io,
         .init_early     = versatile_init_early,
         .init_irq       = versatile_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &versatile_timer,
         .init_machine   = versatile_init,
+        .restart        = versatile_restart,
 MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 54e037c090f5..ae5ad3c8f3dd 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -24,6 +24,7 @@
 #include <linux/init.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
+#include <asm/hardware/vic.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -45,7 +46,9 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
         .map_io         = versatile_map_io,
         .init_early     = versatile_init_early,
         .init_irq       = versatile_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &versatile_timer,
         .init_machine   = versatile_dt_init,
         .dt_compat      = versatile_dt_match,
+        .restart        = versatile_restart,
 MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index feaf9cbe60f6..9581c197500c 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -21,13 +21,13 @@
 
 #include <linux/init.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
+#include <asm/hardware/vic.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 
@@ -107,6 +107,8 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
         .map_io         = versatile_map_io,
         .init_early     = versatile_init_early,
         .init_irq       = versatile_init_irq,
+        .handle_irq     = vic_handle_irq,
         .timer          = &versatile_timer,
         .init_machine   = versatile_pb_init,
+        .restart        = versatile_restart,
 MACHINE_END
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 931148487f0b..9b3d0fbaee72 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -8,5 +8,7 @@ config ARCH_VEXPRESS_CA9X4
         select ARM_ERRATA_720789
         select ARM_ERRATA_751472
         select ARM_ERRATA_753970
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
 
 endmenu
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S
index 73c11297509e..a14f9e62ca92 100644
--- a/arch/arm/mach-vexpress/include/mach/entry-macro.S
+++ b/arch/arm/mach-vexpress/include/mach/entry-macro.S
@@ -1,5 +1,3 @@
-#include <asm/hardware/entry-macro-gic.S>
-
         .macro  disable_fiq
         .endm
 
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
index 899a4e628a4c..f653a8e265bd 100644
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ b/arch/arm/mach-vexpress/include/mach/system.h
@@ -30,8 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-}
-
 #endif
diff --git a/arch/arm/mach-vexpress/include/mach/vmalloc.h b/arch/arm/mach-vexpress/include/mach/vmalloc.h
deleted file mode 100644
index f43a36ef678b..000000000000
--- a/arch/arm/mach-vexpress/include/mach/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/vmalloc.h
- *
- *  Copyright (C) 2003 ARM Limited
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END             0xf8000000UL
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 1fafc3244607..b4a28ca0e50a 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -10,7 +10,7 @@
 #include <linux/ata_platform.h>
 #include <linux/smsc911x.h>
 #include <linux/spinlock.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/usb/isp1760.h>
 #include <linux/clkdev.h>
 #include <linux/mtd/physmap.h>
@@ -23,6 +23,7 @@
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
 #include <asm/hardware/sp810.h>
+#include <asm/hardware/gic.h>
 
 #include <mach/ct-ca9x4.h>
 #include <mach/motherboard.h>
@@ -437,7 +438,6 @@ static void __init v2m_init(void)
                 amba_device_register(v2m_amba_devs[i], &iomem_resource);
 
         pm_power_off = v2m_power_off;
-        arm_pm_restart = v2m_restart;
 
         ct_desc->init_tile();
 }
@@ -448,5 +448,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
         .init_early     = v2m_init_early,
         .init_irq       = v2m_init_irq,
         .timer          = &v2m_timer,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = v2m_init,
+        .restart        = v2m_restart,
 MACHINE_END
diff --git a/arch/arm/mach-vt8500/include/mach/vmalloc.h b/arch/arm/mach-vt8500/include/mach/vmalloc.h
deleted file mode 100644
index 4642290ce416..000000000000
--- a/arch/arm/mach-vt8500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-vt8500/include/mach/vmalloc.h
- *
- *  Copyright (C) 2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define VMALLOC_END     0xd0000000UL
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 0a235e502330..604e1db266e8 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -33,9 +33,11 @@
 #include <mach/regs-serial.h>
 #include <mach/regs-clock.h>
 #include <mach/regs-ebi.h>
+#include <mach/regs-timer.h>
 
 #include "cpu.h"
 #include "clock.h"
+#include "nuc9xx.h"
 
 /* Initial IO mappings */
 
@@ -222,3 +224,17 @@ void __init nuc900_init_clocks(void)
         clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
 }
 
+#define WTCR    (TMR_BA + 0x1C)
+#define WTCLK   (1 << 10)
+#define WTE     (1 << 7)
+#define WTRE    (1 << 1)
+
+void nuc9xx_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                __raw_writel(WTE | WTRE | WTCLK, WTCR);
+        }
+}
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 7a1fa6adb7c3..5b0c38abacc1 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -422,7 +422,7 @@ struct platform_device nuc900_device_kpi = {
 
 /* LCD controller*/
 
-static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
+static struct nuc900fb_display nuc900_lcd_info[] = {
         /* Giantplus Technology GPM1040A0 320x240 Color TFT LCD */
         [0] = {
                 .type           = LCM_DCCS_VA_SRC_RGB565,
@@ -445,7 +445,7 @@ static struct nuc900fb_display __initdata nuc900_lcd_info[] = {
         },
 };
 
-static struct nuc900fb_mach_info nuc900_fb_info __initdata = {
+static struct nuc900fb_mach_info nuc900_fb_info = {
 #if defined(CONFIG_GPM1040A0_320X240)
         .displays               = &nuc900_lcd_info[0],
 #else
diff --git a/arch/arm/mach-w90x900/include/mach/mfp.h b/arch/arm/mach-w90x900/include/mach/mfp.h
index 94c0e71617c6..23ef1f573abd 100644
--- a/arch/arm/mach-w90x900/include/mach/mfp.h
+++ b/arch/arm/mach-w90x900/include/mach/mfp.h
@@ -19,6 +19,7 @@
 extern void mfp_set_groupf(struct device *dev);
 extern void mfp_set_groupc(struct device *dev);
 extern void mfp_set_groupi(struct device *dev);
-extern void mfp_set_groupg(struct device *dev);
+extern void mfp_set_groupg(struct device *dev, const char *subname);
+extern void mfp_set_groupd(struct device *dev, const char *subname);
 
 #endif /* __ASM_ARCH_MFP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
index bd94819e314f..2c4e0c128501 100644
--- a/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
+++ b/arch/arm/mach-w90x900/include/mach/nuc900_spi.h
@@ -14,7 +14,7 @@
 #ifndef __ASM_ARCH_SPI_H
 #define __ASM_ARCH_SPI_H
 
-extern void mfp_set_groupg(struct device *dev);
+extern void mfp_set_groupg(struct device *dev, const char *subname);
 
 struct nuc900_spi_info {
         unsigned int num_cs;
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index ce228bdc66dd..2aaeb9311619 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -14,28 +14,6 @@
  * (at your option) any later version.
  *
  */
-
-#include <linux/io.h>
-#include <asm/proc-fns.h>
-#include <mach/map.h>
-#include <mach/regs-timer.h>
-
-#define WTCR    (TMR_BA + 0x1C)
-#define WTCLK   (1 << 10)
-#define WTE     (1 << 7)
-#define WTRE    (1 << 1)
-
 static void arch_idle(void)
 {
 }
-
-static void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /* Jump into ROM at address 0 */
-                cpu_reset(0);
-        } else {
-                __raw_writel(WTE | WTRE | WTCLK, WTCR);
-        }
-}
-
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
deleted file mode 100644
index b067e44500a4..000000000000
--- a/arch/arm/mach-w90x900/include/mach/vmalloc.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/vmalloc.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#ifndef __ASM_ARCH_VMALLOC_H
-#define __ASM_ARCH_VMALLOC_H
-
-#define VMALLOC_END       (0xe0000000UL)
-
-#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index 7bf143c443f1..d66d43ae8df5 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -19,7 +19,7 @@
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/ptrace.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <asm/irq.h>
@@ -28,6 +28,8 @@
 #include <mach/hardware.h>
 #include <mach/regs-irq.h>
 
+#include "nuc9xx.h"
+
 struct group_irq {
         unsigned long           gpen;
         unsigned int            enabled;
diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c
index 31c109018228..b4243e4f1565 100644
--- a/arch/arm/mach-w90x900/mach-nuc910evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc910evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90P910EVB, "W90P910EVB")
         .init_irq       = nuc900_init_irq,
         .init_machine   = nuc910evb_init,
         .timer          = &nuc900_timer,
+        .restart        = nuc9xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index 4062e55a57d8..067d8f9166dc 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -41,4 +41,5 @@ MACHINE_START(W90P950EVB, "W90P950EVB")
         .init_irq       = nuc900_init_irq,
         .init_machine   = nuc950evb_init,
         .timer          = &nuc900_timer,
+        .restart        = nuc9xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c
index 0ab9995d5b58..cbb3adc3db10 100644
--- a/arch/arm/mach-w90x900/mach-nuc960evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc960evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90N960EVB, "W90N960EVB")
         .init_irq       = nuc900_init_irq,
         .init_machine   = nuc960evb_init,
         .timer          = &nuc900_timer,
+        .restart        = nuc9xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/mfp.c b/arch/arm/mach-w90x900/mfp.c
index fb7fb627b1a5..9dd74612bb87 100644
--- a/arch/arm/mach-w90x900/mfp.c
+++ b/arch/arm/mach-w90x900/mfp.c
@@ -26,10 +26,8 @@
 #define REG_MFSEL       (W90X900_VA_GCR + 0xC)
 
 #define GPSELF          (0x01 << 1)
-
 #define GPSELC          (0x03 << 2)
-#define ENKPI           (0x02 << 2)
-#define ENNAND          (0x01 << 2)
+#define GPSELD          (0x0f << 4)
 
 #define GPSELEI0        (0x01 << 26)
 #define GPSELEI1        (0x01 << 27)
@@ -37,11 +35,16 @@
 #define GPIOG0TO1       (0x03 << 14)
 #define GPIOG2TO3       (0x03 << 16)
 #define GPIOG22TO23     (0x03 << 22)
+#define GPIOG18TO20     (0x07 << 18)
 
 #define ENSPI           (0x0a << 14)
 #define ENI2C0          (0x01 << 14)
 #define ENI2C1          (0x01 << 16)
 #define ENAC97          (0x02 << 22)
+#define ENSD1           (0x02 << 18)
+#define ENSD0           (0x0a << 4)
+#define ENKPI           (0x02 << 2)
+#define ENNAND          (0x01 << 2)
 
 static DEFINE_MUTEX(mfp_mutex);
 
@@ -127,16 +130,19 @@ void mfp_set_groupi(struct device *dev)
 }
 EXPORT_SYMBOL(mfp_set_groupi);
 
-void mfp_set_groupg(struct device *dev)
+void mfp_set_groupg(struct device *dev, const char *subname)
 {
         unsigned long mfpen;
         const char *dev_id;
 
-        BUG_ON(!dev);
+        BUG_ON((!dev) && (!subname));
 
         mutex_lock(&mfp_mutex);
 
-        dev_id = dev_name(dev);
+        if (subname != NULL)
+                dev_id = subname;
+        else
+                dev_id = dev_name(dev);
 
         mfpen = __raw_readl(REG_MFSEL);
 
@@ -152,6 +158,9 @@ void mfp_set_groupg(struct device *dev)
         } else if (strcmp(dev_id, "nuc900-audio") == 0) {
                 mfpen &= ~(GPIOG22TO23);
                 mfpen |= ENAC97;/*enable AC97*/
+        } else if (strcmp(dev_id, "nuc900-mmc-port1") == 0) {
+                mfpen &= ~(GPIOG18TO20);
+                mfpen |= (ENSD1 | 0x01);/*enable sd1*/
         } else {
                 mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/
         }
@@ -162,3 +171,30 @@ void mfp_set_groupg(struct device *dev)
 }
 EXPORT_SYMBOL(mfp_set_groupg);
 
+void mfp_set_groupd(struct device *dev, const char *subname)
+{
+        unsigned long mfpen;
+        const char *dev_id;
+
+        BUG_ON((!dev) && (!subname));
+
+        mutex_lock(&mfp_mutex);
+
+        if (subname != NULL)
+                dev_id = subname;
+        else
+                dev_id = dev_name(dev);
+
+        mfpen = __raw_readl(REG_MFSEL);
+
+        if (strcmp(dev_id, "nuc900-mmc-port0") == 0) {
+                mfpen &= ~GPSELD;/*enable sd0*/
+                mfpen |= ENSD0;
+        } else
+                mfpen &= (~GPSELD);
+
+        __raw_writel(mfpen, REG_MFSEL);
+
+        mutex_unlock(&mfp_mutex);
+}
+EXPORT_SYMBOL(mfp_set_groupd);
diff --git a/arch/arm/mach-w90x900/nuc910.h b/arch/arm/mach-w90x900/nuc910.h
index 83e9ba5fc26c..b14c71a9e683 100644
--- a/arch/arm/mach-w90x900/nuc910.h
+++ b/arch/arm/mach-w90x900/nuc910.h
@@ -12,14 +12,7 @@
  * published by the Free Software Foundation.
  *
  */
-
-struct map_desc;
-struct sys_timer;
-
-/* core initialisation functions */
-
-extern void nuc900_init_irq(void);
-extern struct sys_timer nuc900_timer;
+#include "nuc9xx.h"
 
 /* extern file from nuc910.c */
 
diff --git a/arch/arm/mach-w90x900/nuc950.h b/arch/arm/mach-w90x900/nuc950.h
index 98a1148bc5ae..6e9de3051cd4 100644
--- a/arch/arm/mach-w90x900/nuc950.h
+++ b/arch/arm/mach-w90x900/nuc950.h
@@ -12,14 +12,7 @@
  * published by the Free Software Foundation.
  *
  */
-
-struct map_desc;
-struct sys_timer;
-
-/* core initialisation functions */
-
-extern void nuc900_init_irq(void);
-extern struct sys_timer nuc900_timer;
+#include "nuc9xx.h"
 
 /* extern file from nuc950.c */
 
diff --git a/arch/arm/mach-w90x900/nuc960.h b/arch/arm/mach-w90x900/nuc960.h
index f0c07cbe3a82..9f6df9a00286 100644
--- a/arch/arm/mach-w90x900/nuc960.h
+++ b/arch/arm/mach-w90x900/nuc960.h
@@ -12,14 +12,7 @@
  * published by the Free Software Foundation.
  *
  */
-
-struct map_desc;
-struct sys_timer;
-
-/* core initialisation functions */
-
-extern void nuc900_init_irq(void);
-extern struct sys_timer nuc900_timer;
+#include "nuc9xx.h"
 
 /* extern file from nuc960.c */
 
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
new file mode 100644
index 000000000000..91acb4047793
--- /dev/null
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-w90x900/nuc9xx.h
+ *
+ * Copied from nuc910.h, which had:
+ *
+ * Copyright (c) 2008 Nuvoton corporation
+ *
+ * Header file for NUC900 CPU support
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+struct map_desc;
+struct sys_timer;
+
+/* core initialisation functions */
+
+extern void nuc900_init_irq(void);
+extern struct sys_timer nuc900_timer;
+extern void nuc9xx_restart(char, const char *);
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index a2c4e2d0a0d4..fa27c498ac09 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -33,6 +33,8 @@
 #include <mach/map.h>
 #include <mach/regs-timer.h>
 
+#include "nuc9xx.h"
+
 #define RESETINT        0x1f
 #define PERIOD          (0x01 << 27)
 #define ONESHOT         (0x00 << 27)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 73e93687b81a..ab5cfddc0d7b 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -112,6 +112,7 @@ static const char *xilinx_dt_match[] = {
 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
         .map_io         = xilinx_map_io,
         .init_irq       = xilinx_irq_init,
+        .handle_irq     = gic_handle_irq,
         .init_machine   = xilinx_init_machine,
         .timer          = &xttcpss_sys_timer,
         .dt_compat      = xilinx_dt_match,
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S
index 3cfc01b37461..d621fb732569 100644
--- a/arch/arm/mach-zynq/include/mach/entry-macro.S
+++ b/arch/arm/mach-zynq/include/mach/entry-macro.S
@@ -20,9 +20,6 @@
  * GNU General Public License for more details.
  */
 
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-gic.S>
-
                 .macro  disable_fiq
                 .endm
 
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
index 1b84d705c675..8e88e0b8d2ba 100644
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ b/arch/arm/mach-zynq/include/mach/system.h
@@ -20,9 +20,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* Add architecture specific reset processing here */
-}
-
 #endif
diff --git a/arch/arm/mach-zynq/include/mach/vmalloc.h b/arch/arm/mach-zynq/include/mach/vmalloc.h
deleted file mode 100644
index 2398eff1e8b8..000000000000
--- a/arch/arm/mach-zynq/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/vmalloc.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_VMALLOC_H__
-#define __MACH_VMALLOC_H__
-
-#define VMALLOC_END       0xE0000000UL
-
-#endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 67f75a0b66d6..4cefb57d9ed2 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -629,6 +629,23 @@ config IO_36
 
 comment "Processor Features"
 
+config ARM_LPAE
+        bool "Support for the Large Physical Address Extension"
+        depends on MMU && CPU_V7
+        help
+          Say Y if you have an ARMv7 processor supporting the LPAE page
+          table format and you would like to access memory beyond the
+          4GB limit. The resulting kernel image will not run on
+          processors without the LPA extension.
+
+          If unsure, say N.
+
+config ARCH_PHYS_ADDR_T_64BIT
+        def_bool ARM_LPAE
+
+config ARCH_DMA_ADDR_T_64BIT
+        bool
+
 config ARM_THUMB
         bool "Support Thumb user binaries"
         depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V6K || CPU_V7 || CPU_FEROCEON
@@ -816,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
           Say Y here to use the Feroceon L2 cache in writethrough mode.
           Unless you specifically require this, say N for writeback mode.
 
+config MIGHT_HAVE_CACHE_L2X0
+        bool
+        help
+          This option should be selected by machines which have a L2x0
+          or PL310 cache controller, but where its use is optional.
+
+          The only effect of this option is to make CACHE_L2X0 and
+          related options available to the user for configuration.
+
+          Boards or SoCs which always require the cache controller
+          support to be present should select CACHE_L2X0 directly
+          instead of this option, thus preventing the user from
+          inadvertently configuring a broken kernel.
+
 config CACHE_L2X0
-        bool "Enable the L2x0 outer cache controller"
-        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-                   REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
-                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
-                   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
-                   ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
-        default y
+        bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
+        default MIGHT_HAVE_CACHE_L2X0
         select OUTER_CACHE
         select OUTER_CACHE_SYNC
         help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index c335c76e0d88..caf14dc059e5 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -968,7 +968,7 @@ static int __init alignment_init(void)
                 ai_usermode = safe_usermode(ai_usermode, false);
         }
 
-        hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
+        hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN,
                         "alignment exception");
 
         /*
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 8ac9e9f84790..b1e192ba8c24 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -61,7 +61,7 @@ static inline void cache_sync(void)
 {
         void __iomem *base = l2x0_base;
 
-#ifdef CONFIG_ARM_ERRATA_753970
+#ifdef CONFIG_PL310_ERRATA_753970
         /* write to an unmmapped register */
         writel_relaxed(0, base + L2X0_DUMMY_REG);
 #else
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 93aac068da94..ee9bb363d606 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -22,6 +22,21 @@ unsigned int cpu_last_asid = ASID_FIRST_VERSION;
 DEFINE_PER_CPU(struct mm_struct *, current_mm);
 #endif
 
+#ifdef CONFIG_ARM_LPAE
+#define cpu_set_asid(asid) {                                            \
+        unsigned long ttbl, ttbh;                                       \
+        asm volatile(                                                   \
+        "       mrrc    p15, 0, %0, %1, c2              @ read TTBR0\n" \
+        "       mov     %1, %2, lsl #(48 - 32)          @ set ASID\n"   \
+        "       mcrr    p15, 0, %0, %1, c2              @ set TTBR0\n"  \
+        : "=&r" (ttbl), "=&r" (ttbh)                                    \
+        : "r" (asid & ~ASID_MASK));                                     \
+}
+#else
+#define cpu_set_asid(asid) \
+        asm("   mcr     p15, 0, %0, c13, c0, 1\n" : : "r" (asid))
+#endif
+
 /*
  * We fork()ed a process, and we need a new context for the child
  * to run in.  We reserve version 0 for initial tasks so we will
@@ -37,7 +52,7 @@ void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 static void flush_context(void)
 {
         /* set the reserved ASID before flushing the TLB */
-        asm("mcr        p15, 0, %0, c13, c0, 1\n" : : "r" (0));
+        cpu_set_asid(0);
         isb();
         local_flush_tlb_all();
         if (icache_is_vivt_asid_tagged()) {
@@ -99,7 +114,7 @@ static void reset_context(void *info)
         set_mm_context(mm, asid);
 
         /* set the new ASID */
-        asm("mcr        p15, 0, %0, c13, c0, 1\n" : : "r" (mm->context.id));
+        cpu_set_asid(mm->context.id);
         isb();
 }
 
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e4e7f6cba1ab..1aa664a1999f 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -168,7 +168,7 @@ static int __init consistent_init(void)
         pte_t *pte;
         int i = 0;
         unsigned long base = consistent_base;
-        unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT;
+        unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
 
         consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
         if (!consistent_pte) {
@@ -332,6 +332,15 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
         struct page *page;
         void *addr;
 
+        /*
+         * Following is a work-around (a.k.a. hack) to prevent pages
+         * with __GFP_COMP being passed to split_page() which cannot
+         * handle them.  The real problem is that this flag probably
+         * should be 0 on ARM as it is not supported on this
+         * platform; see CONFIG_HUGETLBFS.
+         */
+        gfp &= ~(__GFP_COMP);
+
         *handle = ~0;
         size = PAGE_ALIGN(size);
 
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index aa33949fef60..bb7eac381a8e 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -27,19 +27,6 @@
 
 #include "fault.h"
 
-/*
- * Fault status register encodings.  We steal bit 31 for our own purposes.
- */
-#define FSR_LNX_PF              (1 << 31)
-#define FSR_WRITE               (1 << 11)
-#define FSR_FS4                 (1 << 10)
-#define FSR_FS3_0               (15)
-
-static inline int fsr_fs(unsigned int fsr)
-{
-        return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
-}
-
 #ifdef CONFIG_MMU
 
 #ifdef CONFIG_KPROBES
@@ -123,8 +110,10 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
 
                 pte = pte_offset_map(pmd, addr);
                 printk(", *pte=%08llx", (long long)pte_val(*pte));
+#ifndef CONFIG_ARM_LPAE
                 printk(", *ppte=%08llx",
                        (long long)pte_val(pte[PTE_HWTABLE_PTRS]));
+#endif
                 pte_unmap(pte);
         } while(0);
 
@@ -231,7 +220,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
 
 static int __kprobes
 __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
-                struct task_struct *tsk)
+                unsigned int flags, struct task_struct *tsk)
 {
         struct vm_area_struct *vma;
         int fault;
@@ -253,18 +242,7 @@ good_area:
                 goto out;
         }
 
-        /*
-         * If for any reason at all we couldn't handle the fault, make
-         * sure we exit gracefully rather than endlessly redo the fault.
-         */
-        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0);
-        if (unlikely(fault & VM_FAULT_ERROR))
-                return fault;
-        if (fault & VM_FAULT_MAJOR)
-                tsk->maj_flt++;
-        else
-                tsk->min_flt++;
-        return fault;
+        return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
 
 check_stack:
         if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
@@ -279,6 +257,9 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         struct task_struct *tsk;
         struct mm_struct *mm;
         int fault, sig, code;
+        int write = fsr & FSR_WRITE;
+        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+                                (write ? FAULT_FLAG_WRITE : 0);
 
         if (notify_page_fault(regs, fsr))
                 return 0;
@@ -305,6 +286,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         if (!down_read_trylock(&mm->mmap_sem)) {
                 if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc))
                         goto no_context;
+retry:
                 down_read(&mm->mmap_sem);
         } else {
                 /*
@@ -320,14 +302,41 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 #endif
         }
 
-        fault = __do_page_fault(mm, addr, fsr, tsk);
-        up_read(&mm->mmap_sem);
+        fault = __do_page_fault(mm, addr, fsr, flags, tsk);
+
+        /* If we need to retry but a fatal signal is pending, handle the
+         * signal first. We do not need to release the mmap_sem because
+         * it would already be released in __lock_page_or_retry in
+         * mm/filemap.c. */
+        if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+                return 0;
+
+        /*
+         * Major/minor page fault accounting is only done on the
+         * initial attempt. If we go through a retry, it is extremely
+         * likely that the page will be found in page cache at that point.
+         */
 
         perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
-        if (fault & VM_FAULT_MAJOR)
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr);
-        else if (fault & VM_FAULT_MINOR)
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr);
+        if (flags & FAULT_FLAG_ALLOW_RETRY) {
+                if (fault & VM_FAULT_MAJOR) {
+                        tsk->maj_flt++;
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
+                                        regs, addr);
+                } else {
+                        tsk->min_flt++;
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+                                        regs, addr);
+                }
+                if (fault & VM_FAULT_RETRY) {
+                        /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
+                        * of starvation. */
+                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+                        goto retry;
+                }
+        }
+
+        up_read(&mm->mmap_sem);
 
         /*
          * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR
@@ -441,6 +450,12 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
         pmd = pmd_offset(pud, addr);
         pmd_k = pmd_offset(pud_k, addr);
 
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Only one hardware entry per PMD with LPAE.
+         */
+        index = 0;
+#else
         /*
          * On ARM one Linux PGD entry contains two hardware entries (see page
          * tables layout in pgtable.h). We normally guarantee that we always
@@ -450,6 +465,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
          * for the first of pair.
          */
         index = (addr >> SECTION_SHIFT) & 1;
+#endif
         if (pmd_none(pmd_k[index]))
                 goto bad_area;
 
@@ -489,55 +505,20 @@ do_bad(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         return 1;
 }
 
-static struct fsr_info {
+struct fsr_info {
         int     (*fn)(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
         int     sig;
         int     code;
         const char *name;
-} fsr_info[] = {
-        /*
-         * The following are the standard ARMv3 and ARMv4 aborts.  ARMv5
-         * defines these to be "precise" aborts.
-         */
-        { do_bad,               SIGSEGV, 0,             "vector exception"                 },
-        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
-        { do_bad,               SIGKILL, 0,             "terminal exception"               },
-        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
-        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
-        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
-        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
-        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
-        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
-        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
-        /*
-         * The following are "imprecise" aborts, which are signalled by bit
-         * 10 of the FSR, and may not be recoverable.  These are only
-         * supported if the CPU abort handler supports bit 10.
-         */
-        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
-        { do_bad,               SIGBUS,  0,             "lock abort"                       }, /* xscale */
-        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
-        { do_bad,               SIGBUS,  BUS_OBJERR,    "imprecise external abort"         }, /* xscale */
-        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
-        { do_bad,               SIGBUS,  0,             "dcache parity error"              }, /* xscale */
-        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 31"                       }
 };
 
+/* FSR definition */
+#ifdef CONFIG_ARM_LPAE
+#include "fsr-3level.c"
+#else
+#include "fsr-2level.c"
+#endif
+
 void __init
 hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
                 int sig, int code, const char *name)
@@ -573,42 +554,6 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         arm_notify_die("", regs, &info, fsr, 0);
 }
 
-
-static struct fsr_info ifsr_info[] = {
-        { do_bad,               SIGBUS,  0,             "unknown 0"                        },
-        { do_bad,               SIGBUS,  0,             "unknown 1"                        },
-        { do_bad,               SIGBUS,  0,             "debug event"                      },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section access flag fault"        },
-        { do_bad,               SIGBUS,  0,             "unknown 4"                        },
-        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page access flag fault"           },
-        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
-        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
-        { do_bad,               SIGBUS,  0,             "unknown 10"                       },
-        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
-        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
-        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
-        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 20"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 22"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 24"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
-        { do_bad,               SIGBUS,  0,             "unknown 31"                       },
-};
-
 void __init
 hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
                  int sig, int code, const char *name)
@@ -641,6 +586,7 @@ do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs)
         arm_notify_die("", regs, &info, ifsr, 0);
 }
 
+#ifndef CONFIG_ARM_LPAE
 static int __init exceptions_init(void)
 {
         if (cpu_architecture() >= CPU_ARCH_ARMv6) {
@@ -663,3 +609,4 @@ static int __init exceptions_init(void)
 }
 
 arch_initcall(exceptions_init);
+#endif
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index 49e9e3804de4..cf08bdfbe0d6 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -1,3 +1,28 @@
-void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
+#ifndef __ARCH_ARM_FAULT_H
+#define __ARCH_ARM_FAULT_H
+
+/*
+ * Fault status register encodings.  We steal bit 31 for our own purposes.
+ */
+#define FSR_LNX_PF              (1 << 31)
+#define FSR_WRITE               (1 << 11)
+#define FSR_FS4                 (1 << 10)
+#define FSR_FS3_0               (15)
+#define FSR_FS5_0               (0x3f)
+
+#ifdef CONFIG_ARM_LPAE
+static inline int fsr_fs(unsigned int fsr)
+{
+        return fsr & FSR_FS5_0;
+}
+#else
+static inline int fsr_fs(unsigned int fsr)
+{
+        return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
+}
+#endif
 
+void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
 unsigned long search_exception_table(unsigned long addr);
+
+#endif  /* __ARCH_ARM_FAULT_H */
diff --git a/arch/arm/mm/fsr-2level.c b/arch/arm/mm/fsr-2level.c
new file mode 100644
index 000000000000..18ca74c0f341
--- /dev/null
+++ b/arch/arm/mm/fsr-2level.c
@@ -0,0 +1,78 @@
+static struct fsr_info fsr_info[] = {
+        /*
+         * The following are the standard ARMv3 and ARMv4 aborts.  ARMv5
+         * defines these to be "precise" aborts.
+         */
+        { do_bad,               SIGSEGV, 0,             "vector exception"                 },
+        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
+        { do_bad,               SIGKILL, 0,             "terminal exception"               },
+        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment exception"              },
+        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
+        { do_bad,               SIGBUS,  0,             "external abort on linefetch"      },
+        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
+        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
+        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
+        /*
+         * The following are "imprecise" aborts, which are signalled by bit
+         * 10 of the FSR, and may not be recoverable.  These are only
+         * supported if the CPU abort handler supports bit 10.
+         */
+        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
+        { do_bad,               SIGBUS,  0,             "lock abort"                       }, /* xscale */
+        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
+        { do_bad,               SIGBUS,  BUS_OBJERR,    "imprecise external abort"         }, /* xscale */
+        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
+        { do_bad,               SIGBUS,  0,             "dcache parity error"              }, /* xscale */
+        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 31"                       },
+};
+
+static struct fsr_info ifsr_info[] = {
+        { do_bad,               SIGBUS,  0,             "unknown 0"                        },
+        { do_bad,               SIGBUS,  0,             "unknown 1"                        },
+        { do_bad,               SIGBUS,  0,             "debug event"                      },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section access flag fault"        },
+        { do_bad,               SIGBUS,  0,             "unknown 4"                        },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "section translation fault"        },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page access flag fault"           },
+        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "page translation fault"           },
+        { do_bad,               SIGBUS,  0,             "external abort on non-linefetch"  },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "section domain fault"             },
+        { do_bad,               SIGBUS,  0,             "unknown 10"                       },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "page domain fault"                },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "section permission fault"         },
+        { do_bad,               SIGBUS,  0,             "external abort on translation"    },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "page permission fault"            },
+        { do_bad,               SIGBUS,  0,             "unknown 16"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 17"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 18"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 19"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 20"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 21"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 22"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 23"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 24"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 25"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 26"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 27"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 28"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 29"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 30"                       },
+        { do_bad,               SIGBUS,  0,             "unknown 31"                       },
+};
diff --git a/arch/arm/mm/fsr-3level.c b/arch/arm/mm/fsr-3level.c
new file mode 100644
index 000000000000..05a4e9431836
--- /dev/null
+++ b/arch/arm/mm/fsr-3level.c
@@ -0,0 +1,68 @@
+static struct fsr_info fsr_info[] = {
+        { do_bad,               SIGBUS,  0,             "unknown 0"                     },
+        { do_bad,               SIGBUS,  0,             "unknown 1"                     },
+        { do_bad,               SIGBUS,  0,             "unknown 2"                     },
+        { do_bad,               SIGBUS,  0,             "unknown 3"                     },
+        { do_bad,               SIGBUS,  0,             "reserved translation fault"    },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 1 translation fault"     },
+        { do_translation_fault, SIGSEGV, SEGV_MAPERR,   "level 2 translation fault"     },
+        { do_page_fault,        SIGSEGV, SEGV_MAPERR,   "level 3 translation fault"     },
+        { do_bad,               SIGBUS,  0,             "reserved access flag fault"    },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "level 1 access flag fault"     },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "level 2 access flag fault"     },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 3 access flag fault"     },
+        { do_bad,               SIGBUS,  0,             "reserved permission fault"     },
+        { do_bad,               SIGSEGV, SEGV_ACCERR,   "level 1 permission fault"      },
+        { do_sect_fault,        SIGSEGV, SEGV_ACCERR,   "level 2 permission fault"      },
+        { do_page_fault,        SIGSEGV, SEGV_ACCERR,   "level 3 permission fault"      },
+        { do_bad,               SIGBUS,  0,             "synchronous external abort"    },
+        { do_bad,               SIGBUS,  0,             "asynchronous external abort"   },
+        { do_bad,               SIGBUS,  0,             "unknown 18"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 19"                    },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous abort (translation table walk)" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error"      },
+        { do_bad,               SIGBUS,  0,             "asynchronous parity error"     },
+        { do_bad,               SIGBUS,  0,             "unknown 26"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 27"                    },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "synchronous parity error (translation table walk" },
+        { do_bad,               SIGBUS,  0,             "unknown 32"                    },
+        { do_bad,               SIGBUS,  BUS_ADRALN,    "alignment fault"               },
+        { do_bad,               SIGBUS,  0,             "debug event"                   },
+        { do_bad,               SIGBUS,  0,             "unknown 35"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 36"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 37"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 38"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 39"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 40"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 41"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 42"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 43"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 44"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 45"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 46"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 47"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 48"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 49"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 50"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 51"                    },
+        { do_bad,               SIGBUS,  0,             "implementation fault (lockdown abort)" },
+        { do_bad,               SIGBUS,  0,             "unknown 53"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 54"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 55"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 56"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 57"                    },
+        { do_bad,               SIGBUS,  0,             "implementation fault (coprocessor abort)" },
+        { do_bad,               SIGBUS,  0,             "unknown 59"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 60"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 61"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 62"                    },
+        { do_bad,               SIGBUS,  0,             "unknown 63"                    },
+};
+
+#define ifsr_info       fsr_info
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 2be9139a4ef3..feacf4c76712 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -1,9 +1,38 @@
 #include <linux/kernel.h>
 
 #include <asm/cputype.h>
+#include <asm/idmap.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
+#include <asm/sections.h>
 
+pgd_t *idmap_pgd;
+
+#ifdef CONFIG_ARM_LPAE
+static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
+        unsigned long prot)
+{
+        pmd_t *pmd;
+        unsigned long next;
+
+        if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
+                pmd = pmd_alloc_one(&init_mm, addr);
+                if (!pmd) {
+                        pr_warning("Failed to allocate identity pmd.\n");
+                        return;
+                }
+                pud_populate(&init_mm, pud, pmd);
+                pmd += pmd_index(addr);
+        } else
+                pmd = pmd_offset(pud, addr);
+
+        do {
+                next = pmd_addr_end(addr, end);
+                *pmd = __pmd((addr & PMD_MASK) | prot);
+                flush_pmd_entry(pmd);
+        } while (pmd++, addr = next, addr != end);
+}
+#else   /* !CONFIG_ARM_LPAE */
 static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
         unsigned long prot)
 {
@@ -15,6 +44,7 @@ static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
         pmd[1] = __pmd(addr);
         flush_pmd_entry(pmd);
 }
+#endif  /* CONFIG_ARM_LPAE */
 
 static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
         unsigned long prot)
@@ -28,11 +58,11 @@ static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
         } while (pud++, addr = next, addr != end);
 }
 
-void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
+static void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
 {
         unsigned long prot, next;
 
-        prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE;
+        prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
         if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
                 prot |= PMD_BIT4;
 
@@ -43,48 +73,41 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end)
         } while (pgd++, addr = next, addr != end);
 }
 
-#ifdef CONFIG_SMP
-static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end)
-{
-        pmd_t *pmd = pmd_offset(pud, addr);
-        pmd_clear(pmd);
-}
+extern char  __idmap_text_start[], __idmap_text_end[];
 
-static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end)
+static int __init init_static_idmap(void)
 {
-        pud_t *pud = pud_offset(pgd, addr);
-        unsigned long next;
+        phys_addr_t idmap_start, idmap_end;
 
-        do {
-                next = pud_addr_end(addr, end);
-                idmap_del_pmd(pud, addr, next);
-        } while (pud++, addr = next, addr != end);
-}
+        idmap_pgd = pgd_alloc(&init_mm);
+        if (!idmap_pgd)
+                return -ENOMEM;
 
-void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end)
-{
-        unsigned long next;
+        /* Add an identity mapping for the physical address of the section. */
+        idmap_start = virt_to_phys((void *)__idmap_text_start);
+        idmap_end = virt_to_phys((void *)__idmap_text_end);
 
-        pgd += pgd_index(addr);
-        do {
-                next = pgd_addr_end(addr, end);
-                idmap_del_pud(pgd, addr, next);
-        } while (pgd++, addr = next, addr != end);
+        pr_info("Setting up static identity map for 0x%llx - 0x%llx\n",
+                (long long)idmap_start, (long long)idmap_end);
+        identity_mapping_add(idmap_pgd, idmap_start, idmap_end);
+
+        return 0;
 }
-#endif
+early_initcall(init_static_idmap);
 
 /*
- * In order to soft-boot, we need to insert a 1:1 mapping in place of
- * the user-mode pages.  This will then ensure that we have predictable
- * results when turning the mmu off
+ * In order to soft-boot, we need to switch to a 1:1 mapping for the
+ * cpu_reset functions. This will then ensure that we have predictable
+ * results when turning off the mmu.
  */
-void setup_mm_for_reboot(char mode)
+void setup_mm_for_reboot(void)
 {
-        /*
-         * We need to access to user-mode page tables here. For kernel threads
-         * we don't have any user-mode mappings so we use the context that we
-         * "borrowed".
-         */
-        identity_mapping_add(current->active_mm->pgd, 0, TASK_SIZE);
+        /* Clean and invalidate L1. */
+        flush_cache_all();
+
+        /* Switch to the identity mapping. */
+        cpu_switch_mm(idmap_pgd, &init_mm);
+
+        /* Flush the TLB. */
         local_flush_tlb_all();
 }
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index fbdd12ea3a58..e34ea8adc1f9 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -20,7 +20,6 @@
 #include <linux/highmem.h>
 #include <linux/gfp.h>
 #include <linux/memblock.h>
-#include <linux/sort.h>
 
 #include <asm/mach-types.h>
 #include <asm/prom.h>
@@ -32,6 +31,7 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/memblock.h>
 
 #include "mm.h"
 
@@ -134,30 +134,18 @@ void show_mem(unsigned int filter)
 }
 
 static void __init find_limits(unsigned long *min, unsigned long *max_low,
-        unsigned long *max_high)
+                               unsigned long *max_high)
 {
         struct meminfo *mi = &meminfo;
         int i;
 
-        *min = -1UL;
-        *max_low = *max_high = 0;
-
-        for_each_bank (i, mi) {
-                struct membank *bank = &mi->bank[i];
-                unsigned long start, end;
-
-                start = bank_pfn_start(bank);
-                end = bank_pfn_end(bank);
-
-                if (*min > start)
-                        *min = start;
-                if (*max_high < end)
-                        *max_high = end;
-                if (bank->highmem)
-                        continue;
-                if (*max_low < end)
-                        *max_low = end;
-        }
+        /* This assumes the meminfo array is properly sorted */
+        *min = bank_pfn_start(&mi->bank[0]);
+        for_each_bank (i, mi)
+                if (mi->bank[i].highmem)
+                                break;
+        *max_low = bank_pfn_end(&mi->bank[i - 1]);
+        *max_high = bank_pfn_end(&mi->bank[mi->nr_banks - 1]);
 }
 
 static void __init arm_bootmem_init(unsigned long start_pfn,
@@ -319,20 +307,10 @@ static void arm_memory_present(void)
 }
 #endif
 
-static int __init meminfo_cmp(const void *_a, const void *_b)
-{
-        const struct membank *a = _a, *b = _b;
-        long cmp = bank_pfn_start(a) - bank_pfn_start(b);
-        return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
-}
-
 void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
 {
         int i;
 
-        sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
-
-        memblock_init();
         for (i = 0; i < mi->nr_banks; i++)
                 memblock_add(mi->bank[i].start, mi->bank[i].size);
 
@@ -371,7 +349,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
         if (mdesc->reserve)
                 mdesc->reserve();
 
-        memblock_analyze();
+        memblock_allow_resize();
         memblock_dump_all();
 }
 
@@ -403,8 +381,6 @@ void __init bootmem_init(void)
          */
         arm_bootmem_free(min, max_low, max_high);
 
-        high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1;
-
         /*
          * This doesn't seem to be used by the Linux memory manager any
          * more, but is used by ll_rw_block.  If we can get rid of it, we
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index bdb248c4f55c..80632e8d7538 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -36,12 +36,6 @@
 #include <asm/mach/map.h>
 #include "mm.h"
 
-/*
- * Used by ioremap() and iounmap() code to mark (super)section-mapped
- * I/O regions in vm_struct->flags field.
- */
-#define VM_ARM_SECTION_MAPPING  0x80000000
-
 int ioremap_page(unsigned long virt, unsigned long phys,
                  const struct mem_type *mtype)
 {
@@ -64,7 +58,7 @@ void __check_kvm_seq(struct mm_struct *mm)
         } while (seq != init_mm.context.kvm_seq);
 }
 
-#ifndef CONFIG_SMP
+#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
 /*
  * Section support is unsafe on SMP - If you iounmap and ioremap a region,
  * the other CPUs will not see this change until their next context switch.
@@ -79,13 +73,16 @@ static void unmap_area_sections(unsigned long virt, unsigned long size)
 {
         unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1));
         pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmdp;
 
         flush_cache_vunmap(addr, end);
         pgd = pgd_offset_k(addr);
+        pud = pud_offset(pgd, addr);
+        pmdp = pmd_offset(pud, addr);
         do {
-                pmd_t pmd, *pmdp = pmd_offset(pgd, addr);
+                pmd_t pmd = *pmdp;
 
-                pmd = *pmdp;
                 if (!pmd_none(pmd)) {
                         /*
                          * Clear the PMD from the page table, and
@@ -104,8 +101,8 @@ static void unmap_area_sections(unsigned long virt, unsigned long size)
                                 pte_free_kernel(&init_mm, pmd_page_vaddr(pmd));
                 }
 
-                addr += PGDIR_SIZE;
-                pgd++;
+                addr += PMD_SIZE;
+                pmdp += 2;
         } while (addr < end);
 
         /*
@@ -124,6 +121,8 @@ remap_area_sections(unsigned long virt, unsigned long pfn,
 {
         unsigned long addr = virt, end = virt + size;
         pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
 
         /*
          * Remove and free any PTE-based mapping, and
@@ -132,17 +131,17 @@ remap_area_sections(unsigned long virt, unsigned long pfn,
         unmap_area_sections(virt, size);
 
         pgd = pgd_offset_k(addr);
+        pud = pud_offset(pgd, addr);
+        pmd = pmd_offset(pud, addr);
         do {
-                pmd_t *pmd = pmd_offset(pgd, addr);
-
                 pmd[0] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
                 pfn += SZ_1M >> PAGE_SHIFT;
                 pmd[1] = __pmd(__pfn_to_phys(pfn) | type->prot_sect);
                 pfn += SZ_1M >> PAGE_SHIFT;
                 flush_pmd_entry(pmd);
 
-                addr += PGDIR_SIZE;
-                pgd++;
+                addr += PMD_SIZE;
+                pmd += 2;
         } while (addr < end);
 
         return 0;
@@ -154,6 +153,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
 {
         unsigned long addr = virt, end = virt + size;
         pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
 
         /*
          * Remove and free any PTE-based mapping, and
@@ -162,6 +163,8 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
         unmap_area_sections(virt, size);
 
         pgd = pgd_offset_k(virt);
+        pud = pud_offset(pgd, addr);
+        pmd = pmd_offset(pud, addr);
         do {
                 unsigned long super_pmd_val, i;
 
@@ -170,14 +173,12 @@ remap_area_supersections(unsigned long virt, unsigned long pfn,
                 super_pmd_val |= ((pfn >> (32 - PAGE_SHIFT)) & 0xf) << 20;
 
                 for (i = 0; i < 8; i++) {
-                        pmd_t *pmd = pmd_offset(pgd, addr);
-
                         pmd[0] = __pmd(super_pmd_val);
                         pmd[1] = __pmd(super_pmd_val);
                         flush_pmd_entry(pmd);
 
-                        addr += PGDIR_SIZE;
-                        pgd++;
+                        addr += PMD_SIZE;
+                        pmd += 2;
                 }
 
                 pfn += SUPERSECTION_SIZE >> PAGE_SHIFT;
@@ -195,17 +196,13 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
         unsigned long addr;
         struct vm_struct * area;
 
+#ifndef CONFIG_ARM_LPAE
         /*
          * High mappings must be supersection aligned
          */
         if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SUPERSECTION_MASK))
                 return NULL;
-
-        /*
-         * Don't allow RAM to be mapped - this causes problems with ARMv6+
-         */
-        if (WARN_ON(pfn_valid(pfn)))
-                return NULL;
+#endif
 
         type = get_mem_type(mtype);
         if (!type)
@@ -216,12 +213,40 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
          */
         size = PAGE_ALIGN(offset + size);
 
+        /*
+         * Try to reuse one of the static mapping whenever possible.
+         */
+        read_lock(&vmlist_lock);
+        for (area = vmlist; area; area = area->next) {
+                if (!size || (sizeof(phys_addr_t) == 4 && pfn >= 0x100000))
+                        break;
+                if (!(area->flags & VM_ARM_STATIC_MAPPING))
+                        continue;
+                if ((area->flags & VM_ARM_MTYPE_MASK) != VM_ARM_MTYPE(mtype))
+                        continue;
+                if (__phys_to_pfn(area->phys_addr) > pfn ||
+                    __pfn_to_phys(pfn) + size-1 > area->phys_addr + area->size-1)
+                        continue;
+                /* we can drop the lock here as we know *area is static */
+                read_unlock(&vmlist_lock);
+                addr = (unsigned long)area->addr;
+                addr += __pfn_to_phys(pfn) - area->phys_addr;
+                return (void __iomem *) (offset + addr);
+        }
+        read_unlock(&vmlist_lock);
+
+        /*
+         * Don't allow RAM to be mapped - this causes problems with ARMv6+
+         */
+        if (WARN_ON(pfn_valid(pfn)))
+                return NULL;
+
         area = get_vm_area_caller(size, VM_IOREMAP, caller);
         if (!area)
                 return NULL;
         addr = (unsigned long)area->addr;
 
-#ifndef CONFIG_SMP
+#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
         if (DOMAIN_IO == 0 &&
             (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) ||
                cpu_is_xsc3()) && pfn >= 0x100000 &&
@@ -313,28 +338,34 @@ __arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached)
 void __iounmap(volatile void __iomem *io_addr)
 {
         void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
-#ifndef CONFIG_SMP
-        struct vm_struct **p, *tmp;
+        struct vm_struct *vm;
 
-        /*
-         * If this is a section based mapping we need to handle it
-         * specially as the VM subsystem does not know how to handle
-         * such a beast. We need the lock here b/c we need to clear
-         * all the mappings before the area can be reclaimed
-         * by someone else.
-         */
-        write_lock(&vmlist_lock);
-        for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
-                if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
-                        if (tmp->flags & VM_ARM_SECTION_MAPPING) {
-                                unmap_area_sections((unsigned long)tmp->addr,
-                                                    tmp->size);
-                        }
+        read_lock(&vmlist_lock);
+        for (vm = vmlist; vm; vm = vm->next) {
+                if (vm->addr > addr)
+                        break;
+                if (!(vm->flags & VM_IOREMAP))
+                        continue;
+                /* If this is a static mapping we must leave it alone */
+                if ((vm->flags & VM_ARM_STATIC_MAPPING) &&
+                    (vm->addr <= addr) && (vm->addr + vm->size > addr)) {
+                        read_unlock(&vmlist_lock);
+                        return;
+                }
+#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
+                /*
+                 * If this is a section based mapping we need to handle it
+                 * specially as the VM subsystem does not know how to handle
+                 * such a beast.
+                 */
+                if ((vm->addr == addr) &&
+                    (vm->flags & VM_ARM_SECTION_MAPPING)) {
+                        unmap_area_sections((unsigned long)vm->addr, vm->size);
                         break;
                 }
-        }
-        write_unlock(&vmlist_lock);
 #endif
+        }
+        read_unlock(&vmlist_lock);
 
         vunmap(addr);
 }
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index ad7cce3bc431..70f6d3ea4834 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -21,6 +21,20 @@ const struct mem_type *get_mem_type(unsigned int type);
 
 extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
 
+/*
+ * ARM specific vm_struct->flags bits.
+ */
+
+/* (super)section-mapped I/O regions used by ioremap()/iounmap() */
+#define VM_ARM_SECTION_MAPPING  0x80000000
+
+/* permanent static mappings from iotable_init() */
+#define VM_ARM_STATIC_MAPPING   0x40000000
+
+/* mapping type (attributes) for permanent static mappings */
+#define VM_ARM_MTYPE(mt)                ((mt) << 20)
+#define VM_ARM_MTYPE_MASK       (0x1f << 20)
+
 #endif
 
 #ifdef CONFIG_ZONE_DMA
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 74be05f3e03a..ce8cb1970d7a 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -9,13 +9,51 @@
 #include <linux/io.h>
 #include <linux/personality.h>
 #include <linux/random.h>
-#include <asm/cputype.h>
-#include <asm/system.h>
+#include <asm/cachetype.h>
+
+static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
+                                              unsigned long pgoff)
+{
+        unsigned long base = addr & ~(SHMLBA-1);
+        unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);
+
+        if (base + off <= addr)
+                return base + off;
+
+        return base - off;
+}
 
 #define COLOUR_ALIGN(addr,pgoff)                \
         ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +      \
          (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
 
+/* gap between mmap and stack */
+#define MIN_GAP (128*1024*1024UL)
+#define MAX_GAP ((TASK_SIZE)/6*5)
+
+static int mmap_is_legacy(void)
+{
+        if (current->personality & ADDR_COMPAT_LAYOUT)
+                return 1;
+
+        if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
+                return 1;
+
+        return sysctl_legacy_va_layout;
+}
+
+static unsigned long mmap_base(unsigned long rnd)
+{
+        unsigned long gap = rlimit(RLIMIT_STACK);
+
+        if (gap < MIN_GAP)
+                gap = MIN_GAP;
+        else if (gap > MAX_GAP)
+                gap = MAX_GAP;
+
+        return PAGE_ALIGN(TASK_SIZE - gap - rnd);
+}
+
 /*
  * We need to ensure that shared mappings are correctly aligned to
  * avoid aliasing issues with VIPT caches.  We need to ensure that
@@ -32,25 +70,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
         struct mm_struct *mm = current->mm;
         struct vm_area_struct *vma;
         unsigned long start_addr;
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
-        unsigned int cache_type;
-        int do_align = 0, aliasing = 0;
+        int do_align = 0;
+        int aliasing = cache_is_vipt_aliasing();
 
         /*
          * We only need to do colour alignment if either the I or D
-         * caches alias.  This is indicated by bits 9 and 21 of the
-         * cache type register.
+         * caches alias.
          */
-        cache_type = read_cpuid_cachetype();
-        if (cache_type != read_cpuid_id()) {
-                aliasing = (cache_type | cache_type >> 12) & (1 << 11);
-                if (aliasing)
-                        do_align = filp || flags & MAP_SHARED;
-        }
-#else
-#define do_align 0
-#define aliasing 0
-#endif
+        if (aliasing)
+                do_align = filp || (flags & MAP_SHARED);
 
         /*
          * We enforce the MAP_FIXED case.
@@ -79,13 +107,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
         if (len > mm->cached_hole_size) {
                 start_addr = addr = mm->free_area_cache;
         } else {
-                start_addr = addr = TASK_UNMAPPED_BASE;
+                start_addr = addr = mm->mmap_base;
                 mm->cached_hole_size = 0;
         }
-        /* 8 bits of randomness in 20 address space bits */
-        if ((current->flags & PF_RANDOMIZE) &&
-            !(current->personality & ADDR_NO_RANDOMIZE))
-                addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT;
 
 full_search:
         if (do_align)
@@ -122,6 +146,134 @@ full_search:
         }
 }
 
+unsigned long
+arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
+                        const unsigned long len, const unsigned long pgoff,
+                        const unsigned long flags)
+{
+        struct vm_area_struct *vma;
+        struct mm_struct *mm = current->mm;
+        unsigned long addr = addr0;
+        int do_align = 0;
+        int aliasing = cache_is_vipt_aliasing();
+
+        /*
+         * We only need to do colour alignment if either the I or D
+         * caches alias.
+         */
+        if (aliasing)
+                do_align = filp || (flags & MAP_SHARED);
+
+        /* requested length too big for entire address space */
+        if (len > TASK_SIZE)
+                return -ENOMEM;
+
+        if (flags & MAP_FIXED) {
+                if (aliasing && flags & MAP_SHARED &&
+                    (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
+                        return -EINVAL;
+                return addr;
+        }
+
+        /* requesting a specific address */
+        if (addr) {
+                if (do_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+                else
+                        addr = PAGE_ALIGN(addr);
+                vma = find_vma(mm, addr);
+                if (TASK_SIZE - len >= addr &&
+                                (!vma || addr + len <= vma->vm_start))
+                        return addr;
+        }
+
+        /* check if free_area_cache is useful for us */
+        if (len <= mm->cached_hole_size) {
+                mm->cached_hole_size = 0;
+                mm->free_area_cache = mm->mmap_base;
+        }
+
+        /* either no address requested or can't fit in requested address hole */
+        addr = mm->free_area_cache;
+        if (do_align) {
+                unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff);
+                addr = base + len;
+        }
+
+        /* make sure it can fit in the remaining address space */
+        if (addr > len) {
+                vma = find_vma(mm, addr-len);
+                if (!vma || addr <= vma->vm_start)
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr-len);
+        }
+
+        if (mm->mmap_base < len)
+                goto bottomup;
+
+        addr = mm->mmap_base - len;
+        if (do_align)
+                addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+
+        do {
+                /*
+                 * Lookup failure means no vma is above this address,
+                 * else if new region fits below vma->vm_start,
+                 * return with success:
+                 */
+                vma = find_vma(mm, addr);
+                if (!vma || addr+len <= vma->vm_start)
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr);
+
+                /* remember the largest hole we saw so far */
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+
+                /* try just below the current vma->vm_start */
+                addr = vma->vm_start - len;
+                if (do_align)
+                        addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+        } while (len < vma->vm_start);
+
+bottomup:
+        /*
+         * A failed mmap() very likely causes application failure,
+         * so fall back to the bottom-up function here. This scenario
+         * can happen with large stack limits and large mmap()
+         * allocations.
+         */
+        mm->cached_hole_size = ~0UL;
+        mm->free_area_cache = TASK_UNMAPPED_BASE;
+        addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
+        /*
+         * Restore the topdown base:
+         */
+        mm->free_area_cache = mm->mmap_base;
+        mm->cached_hole_size = ~0UL;
+
+        return addr;
+}
+
+void arch_pick_mmap_layout(struct mm_struct *mm)
+{
+        unsigned long random_factor = 0UL;
+
+        /* 8 bits of randomness in 20 address space bits */
+        if ((current->flags & PF_RANDOMIZE) &&
+            !(current->personality & ADDR_NO_RANDOMIZE))
+                random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT;
+
+        if (mmap_is_legacy()) {
+                mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
+                mm->get_unmapped_area = arch_get_unmapped_area;
+                mm->unmap_area = arch_unmap_area;
+        } else {
+                mm->mmap_base = mmap_base(random_factor);
+                mm->get_unmapped_area = arch_get_unmapped_area_topdown;
+                mm->unmap_area = arch_unmap_area_topdown;
+        }
+}
 
 /*
  * You really shouldn't be using read() or write() on /dev/mem.  This
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index dc8c550e6cbd..94c5a0c94f5e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -15,6 +15,7 @@
 #include <linux/nodemask.h>
 #include <linux/memblock.h>
 #include <linux/fs.h>
+#include <linux/vmalloc.h>
 
 #include <asm/cputype.h>
 #include <asm/sections.h>
@@ -150,6 +151,7 @@ static int __init early_nowrite(char *__unused)
 }
 early_param("nowb", early_nowrite);
 
+#ifndef CONFIG_ARM_LPAE
 static int __init early_ecc(char *p)
 {
         if (memcmp(p, "on", 2) == 0)
@@ -159,6 +161,7 @@ static int __init early_ecc(char *p)
         return 0;
 }
 early_param("ecc", early_ecc);
+#endif
 
 static int __init noalign_setup(char *__unused)
 {
@@ -228,10 +231,12 @@ static struct mem_type mem_types[] = {
                 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
                 .domain    = DOMAIN_KERNEL,
         },
+#ifndef CONFIG_ARM_LPAE
         [MT_MINICLEAN] = {
                 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_MINICACHE,
                 .domain    = DOMAIN_KERNEL,
         },
+#endif
         [MT_LOW_VECTORS] = {
                 .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
                                 L_PTE_RDONLY,
@@ -429,6 +434,7 @@ static void __init build_mem_type_table(void)
          * ARMv6 and above have extended page tables.
          */
         if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) {
+#ifndef CONFIG_ARM_LPAE
                 /*
                  * Mark cache clean areas and XIP ROM read only
                  * from SVC mode and no access from userspace.
@@ -436,6 +442,7 @@ static void __init build_mem_type_table(void)
                 mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
+#endif
 
                 if (is_smp()) {
                         /*
@@ -474,6 +481,18 @@ static void __init build_mem_type_table(void)
                 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE;
         }
 
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Do not generate access flag faults for the kernel mappings.
+         */
+        for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
+                mem_types[i].prot_pte |= PTE_EXT_AF;
+                mem_types[i].prot_sect |= PMD_SECT_AF;
+        }
+        kern_pgprot |= PTE_EXT_AF;
+        vecs_pgprot |= PTE_EXT_AF;
+#endif
+
         for (i = 0; i < 16; i++) {
                 unsigned long v = pgprot_val(protection_map[i]);
                 protection_map[i] = __pgprot(v | user_pgprot);
@@ -529,13 +548,18 @@ EXPORT_SYMBOL(phys_mem_access_prot);
 
 #define vectors_base()  (vectors_high() ? 0xffff0000 : 0)
 
-static void __init *early_alloc(unsigned long sz)
+static void __init *early_alloc_aligned(unsigned long sz, unsigned long align)
 {
-        void *ptr = __va(memblock_alloc(sz, sz));
+        void *ptr = __va(memblock_alloc(sz, align));
         memset(ptr, 0, sz);
         return ptr;
 }
 
+static void __init *early_alloc(unsigned long sz)
+{
+        return early_alloc_aligned(sz, sz);
+}
+
 static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot)
 {
         if (pmd_none(*pmd)) {
@@ -572,8 +596,10 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
         if (((addr | end | phys) & ~SECTION_MASK) == 0) {
                 pmd_t *p = pmd;
 
+#ifndef CONFIG_ARM_LPAE
                 if (addr & SECTION_SIZE)
                         pmd++;
+#endif
 
                 do {
                         *pmd = __pmd(phys | type->prot_sect);
@@ -603,6 +629,7 @@ static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
         } while (pud++, addr = next, addr != end);
 }
 
+#ifndef CONFIG_ARM_LPAE
 static void __init create_36bit_mapping(struct map_desc *md,
                                         const struct mem_type *type)
 {
@@ -662,6 +689,7 @@ static void __init create_36bit_mapping(struct map_desc *md,
                 pgd += SUPERSECTION_SIZE >> PGDIR_SHIFT;
         } while (addr != end);
 }
+#endif  /* !CONFIG_ARM_LPAE */
 
 /*
  * Create the page directory entries and any necessary
@@ -685,14 +713,16 @@ static void __init create_mapping(struct map_desc *md)
         }
 
         if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
-            md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) {
+            md->virtual >= PAGE_OFFSET &&
+            (md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) {
                 printk(KERN_WARNING "BUG: mapping for 0x%08llx"
-                       " at 0x%08lx overlaps vmalloc space\n",
+                       " at 0x%08lx out of vmalloc space\n",
                        (long long)__pfn_to_phys((u64)md->pfn), md->virtual);
         }
 
         type = &mem_types[md->type];
 
+#ifndef CONFIG_ARM_LPAE
         /*
          * Catch 36-bit addresses
          */
@@ -700,6 +730,7 @@ static void __init create_mapping(struct map_desc *md)
                 create_36bit_mapping(md, type);
                 return;
         }
+#endif
 
         addr = md->virtual & PAGE_MASK;
         phys = __pfn_to_phys(md->pfn);
@@ -729,18 +760,33 @@ static void __init create_mapping(struct map_desc *md)
  */
 void __init iotable_init(struct map_desc *io_desc, int nr)
 {
-        int i;
+        struct map_desc *md;
+        struct vm_struct *vm;
+
+        if (!nr)
+                return;
 
-        for (i = 0; i < nr; i++)
-                create_mapping(io_desc + i);
+        vm = early_alloc_aligned(sizeof(*vm) * nr, __alignof__(*vm));
+
+        for (md = io_desc; nr; md++, nr--) {
+                create_mapping(md);
+                vm->addr = (void *)(md->virtual & PAGE_MASK);
+                vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
+                vm->phys_addr = __pfn_to_phys(md->pfn); 
+                vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; 
+                vm->flags |= VM_ARM_MTYPE(md->type);
+                vm->caller = iotable_init;
+                vm_area_add_early(vm++);
+        }
 }
 
-static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M);
+static void * __initdata vmalloc_min =
+        (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
 
 /*
  * vmalloc=size forces the vmalloc area to be exactly 'size'
  * bytes. This can be used to increase (or decrease) the vmalloc
- * area - the default is 128m.
+ * area - the default is 240m.
  */
 static int __init early_vmalloc(char *arg)
 {
@@ -775,6 +821,9 @@ void __init sanity_check_meminfo(void)
                 struct membank *bank = &meminfo.bank[j];
                 *bank = meminfo.bank[i];
 
+                if (bank->start > ULONG_MAX)
+                        highmem = 1;
+
 #ifdef CONFIG_HIGHMEM
                 if (__va(bank->start) >= vmalloc_min ||
                     __va(bank->start) < (void *)PAGE_OFFSET)
@@ -786,7 +835,7 @@ void __init sanity_check_meminfo(void)
                  * Split those memory banks which are partially overlapping
                  * the vmalloc area greatly simplifying things later.
                  */
-                if (__va(bank->start) < vmalloc_min &&
+                if (!highmem && __va(bank->start) < vmalloc_min &&
                     bank->size > vmalloc_min - __va(bank->start)) {
                         if (meminfo.nr_banks >= NR_BANKS) {
                                 printk(KERN_CRIT "NR_BANKS too low, "
@@ -807,6 +856,17 @@ void __init sanity_check_meminfo(void)
                 bank->highmem = highmem;
 
                 /*
+                 * Highmem banks not allowed with !CONFIG_HIGHMEM.
+                 */
+                if (highmem) {
+                        printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx "
+                               "(!CONFIG_HIGHMEM).\n",
+                               (unsigned long long)bank->start,
+                               (unsigned long long)bank->start + bank->size - 1);
+                        continue;
+                }
+
+                /*
                  * Check whether this memory bank would entirely overlap
                  * the vmalloc area.
                  */
@@ -860,6 +920,7 @@ void __init sanity_check_meminfo(void)
         }
 #endif
         meminfo.nr_banks = j;
+        high_memory = __va(lowmem_limit - 1) + 1;
         memblock_set_current_limit(lowmem_limit);
 }
 
@@ -890,14 +951,20 @@ static inline void prepare_page_table(void)
 
         /*
          * Clear out all the kernel space mappings, except for the first
-         * memory bank, up to the end of the vmalloc region.
+         * memory bank, up to the vmalloc region.
          */
         for (addr = __phys_to_virt(end);
-             addr < VMALLOC_END; addr += PMD_SIZE)
+             addr < VMALLOC_START; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
 }
 
+#ifdef CONFIG_ARM_LPAE
+/* the first page is reserved for pgd */
+#define SWAPPER_PG_DIR_SIZE     (PAGE_SIZE + \
+                                 PTRS_PER_PGD * PTRS_PER_PMD * sizeof(pmd_t))
+#else
 #define SWAPPER_PG_DIR_SIZE     (PTRS_PER_PGD * sizeof(pgd_t))
+#endif
 
 /*
  * Reserve the special regions of memory
@@ -920,8 +987,8 @@ void __init arm_mm_memblock_reserve(void)
 }
 
 /*
- * Set up device the mappings.  Since we clear out the page tables for all
- * mappings above VMALLOC_END, we will remove any debug device mappings.
+ * Set up the device mappings.  Since we clear out the page tables for all
+ * mappings above VMALLOC_START, we will remove any debug device mappings.
  * This means you have to be careful how you debug this function, or any
  * called function.  This means you can't use any function or debugging
  * method which may touch any device, otherwise the kernel _will_ crash.
@@ -936,7 +1003,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
          */
         vectors_page = early_alloc(PAGE_SIZE);
 
-        for (addr = VMALLOC_END; addr; addr += PMD_SIZE)
+        for (addr = VMALLOC_START; addr; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
 
         /*
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 941a98c9e8aa..4fc6794cca4b 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -29,6 +29,8 @@ void __init arm_mm_memblock_reserve(void)
 
 void __init sanity_check_meminfo(void)
 {
+        phys_addr_t end = bank_phys_end(&meminfo.bank[meminfo.nr_banks - 1]);
+        high_memory = __va(end - 1) + 1;
 }
 
 /*
@@ -43,7 +45,7 @@ void __init paging_init(struct machine_desc *mdesc)
 /*
  * We don't need to do anything here for nommu machines.
  */
-void setup_mm_for_reboot(char mode)
+void setup_mm_for_reboot(void)
 {
 }
 
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index b2027c154b2a..a3e78ccabd65 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -10,6 +10,7 @@
 #include <linux/mm.h>
 #include <linux/gfp.h>
 #include <linux/highmem.h>
+#include <linux/slab.h>
 
 #include <asm/pgalloc.h>
 #include <asm/page.h>
@@ -17,6 +18,14 @@
 
 #include "mm.h"
 
+#ifdef CONFIG_ARM_LPAE
+#define __pgd_alloc()   kmalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL)
+#define __pgd_free(pgd) kfree(pgd)
+#else
+#define __pgd_alloc()   (pgd_t *)__get_free_pages(GFP_KERNEL, 2)
+#define __pgd_free(pgd) free_pages((unsigned long)pgd, 2)
+#endif
+
 /*
  * need to get a 16k page for level 1
  */
@@ -27,7 +36,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
         pmd_t *new_pmd, *init_pmd;
         pte_t *new_pte, *init_pte;
 
-        new_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL, 2);
+        new_pgd = __pgd_alloc();
         if (!new_pgd)
                 goto no_pgd;
 
@@ -42,10 +51,25 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
 
         clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t));
 
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Allocate PMD table for modules and pkmap mappings.
+         */
+        new_pud = pud_alloc(mm, new_pgd + pgd_index(MODULES_VADDR),
+                            MODULES_VADDR);
+        if (!new_pud)
+                goto no_pud;
+
+        new_pmd = pmd_alloc(mm, new_pud, 0);
+        if (!new_pmd)
+                goto no_pmd;
+#endif
+
         if (!vectors_high()) {
                 /*
                  * On ARM, first page must always be allocated since it
-                 * contains the machine vectors.
+                 * contains the machine vectors. The vectors are always high
+                 * with LPAE.
                  */
                 new_pud = pud_alloc(mm, new_pgd, 0);
                 if (!new_pud)
@@ -74,7 +98,7 @@ no_pte:
 no_pmd:
         pud_free(mm, new_pud);
 no_pud:
-        free_pages((unsigned long)new_pgd, 2);
+        __pgd_free(new_pgd);
 no_pgd:
         return NULL;
 }
@@ -111,5 +135,24 @@ no_pud:
         pgd_clear(pgd);
         pud_free(mm, pud);
 no_pgd:
-        free_pages((unsigned long) pgd_base, 2);
+#ifdef CONFIG_ARM_LPAE
+        /*
+         * Free modules/pkmap or identity pmd tables.
+         */
+        for (pgd = pgd_base; pgd < pgd_base + PTRS_PER_PGD; pgd++) {
+                if (pgd_none_or_clear_bad(pgd))
+                        continue;
+                if (pgd_val(*pgd) & L_PGD_SWAPPER)
+                        continue;
+                pud = pud_offset(pgd, 0);
+                if (pud_none_or_clear_bad(pud))
+                        continue;
+                pmd = pmd_offset(pud, 0);
+                pud_clear(pud);
+                pmd_free(mm, pmd);
+                pgd_clear(pgd);
+                pud_free(mm, pud);
+        }
+#endif
+        __pgd_free(pgd_base);
 }
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 67469665d47a..234951345eb3 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -95,6 +95,7 @@ ENTRY(cpu_arm1020_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1020_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -107,6 +108,8 @@ ENTRY(cpu_arm1020_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm1020_reset)
+        .popsection
 
 /*
  * cpu_arm1020_do_idle()
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 4251421c0ed5..c244b06caac9 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -95,6 +95,7 @@ ENTRY(cpu_arm1020e_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1020e_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -107,6 +108,8 @@ ENTRY(cpu_arm1020e_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm1020e_reset)
+        .popsection
 
 /*
  * cpu_arm1020e_do_idle()
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index d283cf3d06e3..38fe22efd18f 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1022_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1022_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1022_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm1022_reset)
+        .popsection
 
 /*
  * cpu_arm1022_do_idle()
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 678a1ceafed2..3eb9c3c26c75 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -84,6 +84,7 @@ ENTRY(cpu_arm1026_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm1026_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -96,6 +97,8 @@ ENTRY(cpu_arm1026_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm1026_reset)
+        .popsection
 
 /*
  * cpu_arm1026_do_idle()
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index e5b974cddac3..4fbeb5b8e6c2 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -225,6 +225,7 @@ ENTRY(cpu_arm7_set_pte_ext)
  * Params  : r0 = address to jump to
  * Notes   : This sets up everything for a reset
  */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm6_reset)
 ENTRY(cpu_arm7_reset)
                 mov     r1, #0
@@ -235,6 +236,9 @@ ENTRY(cpu_arm7_reset)
                 mov     r1, #0x30
                 mcr     p15, 0, r1, c1, c0, 0           @ turn off MMU etc
                 mov     pc, r0
+ENDPROC(cpu_arm6_reset)
+ENDPROC(cpu_arm7_reset)
+                .popsection
 
                 __CPUINIT
 
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 55f4e290665a..0ac908c7ade1 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -101,6 +101,7 @@ ENTRY(cpu_arm720_set_pte_ext)
  * Params  : r0 = address to jump to
  * Notes   : This sets up everything for a reset
  */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm720_reset)
                 mov     ip, #0
                 mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
@@ -112,6 +113,8 @@ ENTRY(cpu_arm720_reset)
                 bic     ip, ip, #0x2100                 @ ..v....s........
                 mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
                 mov     pc, r0
+ENDPROC(cpu_arm720_reset)
+                .popsection
 
         __CPUINIT
 
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 4506be3adda6..dc5de5d53f20 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -49,6 +49,7 @@ ENTRY(cpu_arm740_proc_fin)
  * Params  : r0 = address to jump to
  * Notes   : This sets up everything for a reset
  */
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm740_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c0, 0           @ invalidate cache
@@ -56,6 +57,8 @@ ENTRY(cpu_arm740_reset)
         bic     ip, ip, #0x0000000c             @ ............wc..
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm740_reset)
+        .popsection
 
         __CPUINIT
 
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 7e0e1fe4ed4d..6ddea3e464bd 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -45,8 +45,11 @@ ENTRY(cpu_arm7tdmi_proc_fin)
  * Params  : loc(r0)    address to jump to
  * Purpose : Sets up everything for a reset and jump to the location for soft reset.
  */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm7tdmi_reset)
                 mov     pc, r0
+ENDPROC(cpu_arm7tdmi_reset)
+                .popsection
 
                 __CPUINIT
 
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 88fb3d9e0640..cb941ae95f66 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -85,6 +85,7 @@ ENTRY(cpu_arm920_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm920_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -97,6 +98,8 @@ ENTRY(cpu_arm920_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm920_reset)
+        .popsection
 
 /*
  * cpu_arm920_do_idle()
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 490e18833857..4ec0e074dd55 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -87,6 +87,7 @@ ENTRY(cpu_arm922_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm922_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -99,6 +100,8 @@ ENTRY(cpu_arm922_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm922_reset)
+        .popsection
 
 /*
  * cpu_arm922_do_idle()
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 51d494be057e..9dccd9a365b3 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -108,6 +108,7 @@ ENTRY(cpu_arm925_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm925_reset)
         /* Send software reset to MPU and DSP */
         mov     ip, #0xff000000
@@ -115,6 +116,8 @@ ENTRY(cpu_arm925_reset)
         orr     ip, ip, #0x0000ce00
         mov     r4, #1
         strh    r4, [ip, #0x10]
+ENDPROC(cpu_arm925_reset)
+        .popsection
 
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 9f8fd91f918a..820259b81a1f 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -77,6 +77,7 @@ ENTRY(cpu_arm926_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm926_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -89,6 +90,8 @@ ENTRY(cpu_arm926_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm926_reset)
+        .popsection
 
 /*
  * cpu_arm926_do_idle()
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index ac750d506153..9fdc0a170974 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -48,6 +48,7 @@ ENTRY(cpu_arm940_proc_fin)
  * Params  : r0 = address to jump to
  * Notes   : This sets up everything for a reset
  */
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm940_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c5, 0           @ flush I cache
@@ -58,6 +59,8 @@ ENTRY(cpu_arm940_reset)
         bic     ip, ip, #0x00001000             @ i-cache
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm940_reset)
+        .popsection
 
 /*
  * cpu_arm940_do_idle()
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 683af3a182b7..f684cfedcca9 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -55,6 +55,7 @@ ENTRY(cpu_arm946_proc_fin)
  * Params  : r0 = address to jump to
  * Notes   : This sets up everything for a reset
  */
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm946_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c5, 0           @ flush I cache
@@ -65,6 +66,8 @@ ENTRY(cpu_arm946_reset)
         bic     ip, ip, #0x00001000             @ i-cache
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_arm946_reset)
+        .popsection
 
 /*
  * cpu_arm946_do_idle()
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 2120f9e2af7f..8881391dfb9e 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -45,8 +45,11 @@ ENTRY(cpu_arm9tdmi_proc_fin)
  * Params  : loc(r0)    address to jump to
  * Purpose : Sets up everything for a reset and jump to the location for soft reset.
  */
+                .pushsection    .idmap.text, "ax"
 ENTRY(cpu_arm9tdmi_reset)
                 mov     pc, r0
+ENDPROC(cpu_arm9tdmi_reset)
+                .popsection
 
                 __CPUINIT
 
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index 4c7a5710472b..272558a133a3 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -57,6 +57,7 @@ ENTRY(cpu_fa526_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  4
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_fa526_reset)
 /* TODO: Use CP8 if possible... */
         mov     ip, #0
@@ -73,6 +74,8 @@ ENTRY(cpu_fa526_reset)
         nop
         nop
         mov     pc, r0
+ENDPROC(cpu_fa526_reset)
+        .popsection
 
 /*
  * cpu_fa526_do_idle()
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 8a6c2f78c1c3..ba3c500584ac 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -98,6 +98,7 @@ ENTRY(cpu_feroceon_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_feroceon_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -110,6 +111,8 @@ ENTRY(cpu_feroceon_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_feroceon_reset)
+        .popsection
 
 /*
  * cpu_feroceon_do_idle()
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 307a4def8d3a..2d8ff3ad86d3 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -91,8 +91,9 @@
 #if L_PTE_SHARED != PTE_EXT_SHARED
 #error PTE shared bit mismatch
 #endif
-#if (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\
-     L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
+#if !defined (CONFIG_ARM_LPAE) && \
+        (L_PTE_XN+L_PTE_USER+L_PTE_RDONLY+L_PTE_DIRTY+L_PTE_YOUNG+\
+         L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
 #error Invalid Linux PTE bit settings
 #endif
 #endif  /* CONFIG_MMU */
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index db52b0fb14a0..cdfedc5b8ad8 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -69,6 +69,7 @@ ENTRY(cpu_mohawk_proc_fin)
  * (same as arm926)
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_mohawk_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -79,6 +80,8 @@ ENTRY(cpu_mohawk_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_mohawk_reset)
+        .popsection
 
 /*
  * cpu_mohawk_do_idle()
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index d50ada26edd6..775d70fba937 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -62,6 +62,7 @@ ENTRY(cpu_sa110_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_sa110_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -74,6 +75,8 @@ ENTRY(cpu_sa110_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_sa110_reset)
+        .popsection
 
 /*
  * cpu_sa110_do_idle(type)
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 7d91545d089b..3aa0da11fd84 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -70,6 +70,7 @@ ENTRY(cpu_sa1100_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_sa1100_reset)
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
@@ -82,6 +83,8 @@ ENTRY(cpu_sa1100_reset)
         bic     ip, ip, #0x1100                 @ ...i...s........
         mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
         mov     pc, r0
+ENDPROC(cpu_sa1100_reset)
+        .popsection
 
 /*
  * cpu_sa1100_do_idle(type)
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index d061d2fa5506..5900cd520e84 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -55,6 +55,7 @@ ENTRY(cpu_v6_proc_fin)
  *      - loc   - location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_v6_reset)
         mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
         bic     r1, r1, #0x1                    @ ...............m
@@ -62,6 +63,8 @@ ENTRY(cpu_v6_reset)
         mov     r1, #0
         mcr     p15, 0, r1, c7, c5, 4           @ ISB
         mov     pc, r0
+ENDPROC(cpu_v6_reset)
+        .popsection
 
 /*
  *      cpu_v6_do_idle()
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
new file mode 100644
index 000000000000..3a4b3e7b888c
--- /dev/null
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -0,0 +1,171 @@
+/*
+ * arch/arm/mm/proc-v7-2level.S
+ *
+ * Copyright (C) 2001 Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define TTB_S           (1 << 1)
+#define TTB_RGN_NC      (0 << 3)
+#define TTB_RGN_OC_WBWA (1 << 3)
+#define TTB_RGN_OC_WT   (2 << 3)
+#define TTB_RGN_OC_WB   (3 << 3)
+#define TTB_NOS         (1 << 5)
+#define TTB_IRGN_NC     ((0 << 0) | (0 << 6))
+#define TTB_IRGN_WBWA   ((0 << 0) | (1 << 6))
+#define TTB_IRGN_WT     ((1 << 0) | (0 << 6))
+#define TTB_IRGN_WB     ((1 << 0) | (1 << 6))
+
+/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
+#define TTB_FLAGS_UP    TTB_IRGN_WB|TTB_RGN_OC_WB
+#define PMD_FLAGS_UP    PMD_SECT_WB
+
+/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
+#define TTB_FLAGS_SMP   TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
+#define PMD_FLAGS_SMP   PMD_SECT_WBWA|PMD_SECT_S
+
+/*
+ *      cpu_v7_switch_mm(pgd_phys, tsk)
+ *
+ *      Set the translation table base pointer to be pgd_phys
+ *
+ *      - pgd_phys - physical address of new TTB
+ *
+ *      It is assumed that:
+ *      - we are not using split page tables
+ */
+ENTRY(cpu_v7_switch_mm)
+#ifdef CONFIG_MMU
+        mov     r2, #0
+        ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
+        ALT_SMP(orr     r0, r0, #TTB_FLAGS_SMP)
+        ALT_UP(orr      r0, r0, #TTB_FLAGS_UP)
+#ifdef CONFIG_ARM_ERRATA_430973
+        mcr     p15, 0, r2, c7, c5, 6           @ flush BTAC/BTB
+#endif
+#ifdef CONFIG_ARM_ERRATA_754322
+        dsb
+#endif
+        mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
+        isb
+1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
+        isb
+#ifdef CONFIG_ARM_ERRATA_754322
+        dsb
+#endif
+        mcr     p15, 0, r1, c13, c0, 1          @ set context ID
+        isb
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_switch_mm)
+
+/*
+ *      cpu_v7_set_pte_ext(ptep, pte)
+ *
+ *      Set a level 2 translation table entry.
+ *
+ *      - ptep  - pointer to level 2 translation table entry
+ *                (hardware version is stored at +2048 bytes)
+ *      - pte   - PTE value to store
+ *      - ext   - value for extended PTE bits
+ */
+ENTRY(cpu_v7_set_pte_ext)
+#ifdef CONFIG_MMU
+        str     r1, [r0]                        @ linux version
+
+        bic     r3, r1, #0x000003f0
+        bic     r3, r3, #PTE_TYPE_MASK
+        orr     r3, r3, r2
+        orr     r3, r3, #PTE_EXT_AP0 | 2
+
+        tst     r1, #1 << 4
+        orrne   r3, r3, #PTE_EXT_TEX(1)
+
+        eor     r1, r1, #L_PTE_DIRTY
+        tst     r1, #L_PTE_RDONLY | L_PTE_DIRTY
+        orrne   r3, r3, #PTE_EXT_APX
+
+        tst     r1, #L_PTE_USER
+        orrne   r3, r3, #PTE_EXT_AP1
+#ifdef CONFIG_CPU_USE_DOMAINS
+        @ allow kernel read/write access to read-only user pages
+        tstne   r3, #PTE_EXT_APX
+        bicne   r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
+#endif
+
+        tst     r1, #L_PTE_XN
+        orrne   r3, r3, #PTE_EXT_XN
+
+        tst     r1, #L_PTE_YOUNG
+        tstne   r1, #L_PTE_PRESENT
+        moveq   r3, #0
+
+ ARM(   str     r3, [r0, #2048]! )
+ THUMB( add     r0, r0, #2048 )
+ THUMB( str     r3, [r0] )
+        mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_set_pte_ext)
+
+        /*
+         * Memory region attributes with SCTLR.TRE=1
+         *
+         *   n = TEX[0],C,B
+         *   TR = PRRR[2n+1:2n]         - memory type
+         *   IR = NMRR[2n+1:2n]         - inner cacheable property
+         *   OR = NMRR[2n+17:2n+16]     - outer cacheable property
+         *
+         *                      n       TR      IR      OR
+         *   UNCACHED           000     00
+         *   BUFFERABLE         001     10      00      00
+         *   WRITETHROUGH       010     10      10      10
+         *   WRITEBACK          011     10      11      11
+         *   reserved           110
+         *   WRITEALLOC         111     10      01      01
+         *   DEV_SHARED         100     01
+         *   DEV_NONSHARED      100     01
+         *   DEV_WC             001     10
+         *   DEV_CACHED         011     10
+         *
+         * Other attributes:
+         *
+         *   DS0 = PRRR[16] = 0         - device shareable property
+         *   DS1 = PRRR[17] = 1         - device shareable property
+         *   NS0 = PRRR[18] = 0         - normal shareable property
+         *   NS1 = PRRR[19] = 1         - normal shareable property
+         *   NOS = PRRR[24+n] = 1       - not outer shareable
+         */
+.equ    PRRR,   0xff0a81a8
+.equ    NMRR,   0x40e040e0
+
+        /*
+         * Macro for setting up the TTBRx and TTBCR registers.
+         * - \ttb0 and \ttb1 updated with the corresponding flags.
+         */
+        .macro  v7_ttb_setup, zero, ttbr0, ttbr1, tmp
+        mcr     p15, 0, \zero, c2, c0, 2        @ TTB control register
+        ALT_SMP(orr     \ttbr0, \ttbr0, #TTB_FLAGS_SMP)
+        ALT_UP(orr      \ttbr0, \ttbr0, #TTB_FLAGS_UP)
+        ALT_SMP(orr     \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
+        ALT_UP(orr      \ttbr1, \ttbr1, #TTB_FLAGS_UP)
+        mcr     p15, 0, \ttbr1, c2, c0, 1       @ load TTB1
+        .endm
+
+        __CPUINIT
+
+        /*   AT
+         *  TFR   EV X F   I D LR    S
+         * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
+         * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
+         *    1    0 110       0011 1100 .111 1101 < we want
+         */
+        .align  2
+        .type   v7_crval, #object
+v7_crval:
+        crval   clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
+
+        .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
new file mode 100644
index 000000000000..8de0f1dd1549
--- /dev/null
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -0,0 +1,150 @@
+/*
+ * arch/arm/mm/proc-v7-3level.S
+ *
+ * Copyright (C) 2001 Deep Blue Solutions Ltd.
+ * Copyright (C) 2011 ARM Ltd.
+ * Author: Catalin Marinas <catalin.marinas@arm.com>
+ *   based on arch/arm/mm/proc-v7-2level.S
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#define TTB_IRGN_NC     (0 << 8)
+#define TTB_IRGN_WBWA   (1 << 8)
+#define TTB_IRGN_WT     (2 << 8)
+#define TTB_IRGN_WB     (3 << 8)
+#define TTB_RGN_NC      (0 << 10)
+#define TTB_RGN_OC_WBWA (1 << 10)
+#define TTB_RGN_OC_WT   (2 << 10)
+#define TTB_RGN_OC_WB   (3 << 10)
+#define TTB_S           (3 << 12)
+#define TTB_EAE         (1 << 31)
+
+/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
+#define TTB_FLAGS_UP    (TTB_IRGN_WB|TTB_RGN_OC_WB)
+#define PMD_FLAGS_UP    (PMD_SECT_WB)
+
+/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
+#define TTB_FLAGS_SMP   (TTB_IRGN_WBWA|TTB_S|TTB_RGN_OC_WBWA)
+#define PMD_FLAGS_SMP   (PMD_SECT_WBWA|PMD_SECT_S)
+
+/*
+ * cpu_v7_switch_mm(pgd_phys, tsk)
+ *
+ * Set the translation table base pointer to be pgd_phys (physical address of
+ * the new TTB).
+ */
+ENTRY(cpu_v7_switch_mm)
+#ifdef CONFIG_MMU
+        ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
+        and     r3, r1, #0xff
+        mov     r3, r3, lsl #(48 - 32)          @ ASID
+        mcrr    p15, 0, r0, r3, c2              @ set TTB 0
+        isb
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_switch_mm)
+
+/*
+ * cpu_v7_set_pte_ext(ptep, pte)
+ *
+ * Set a level 2 translation table entry.
+ * - ptep - pointer to level 3 translation table entry
+ * - pte - PTE value to store (64-bit in r2 and r3)
+ */
+ENTRY(cpu_v7_set_pte_ext)
+#ifdef CONFIG_MMU
+        tst     r2, #L_PTE_PRESENT
+        beq     1f
+        tst     r3, #1 << (55 - 32)             @ L_PTE_DIRTY
+        orreq   r2, #L_PTE_RDONLY
+1:      strd    r2, r3, [r0]
+        mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
+#endif
+        mov     pc, lr
+ENDPROC(cpu_v7_set_pte_ext)
+
+        /*
+         * Memory region attributes for LPAE (defined in pgtable-3level.h):
+         *
+         *   n = AttrIndx[2:0]
+         *
+         *                      n       MAIR
+         *   UNCACHED           000     00000000
+         *   BUFFERABLE         001     01000100
+         *   DEV_WC             001     01000100
+         *   WRITETHROUGH       010     10101010
+         *   WRITEBACK          011     11101110
+         *   DEV_CACHED         011     11101110
+         *   DEV_SHARED         100     00000100
+         *   DEV_NONSHARED      100     00000100
+         *   unused             101
+         *   unused             110
+         *   WRITEALLOC         111     11111111
+         */
+.equ    PRRR,   0xeeaa4400                      @ MAIR0
+.equ    NMRR,   0xff000004                      @ MAIR1
+
+        /*
+         * Macro for setting up the TTBRx and TTBCR registers.
+         * - \ttbr1 updated.
+         */
+        .macro  v7_ttb_setup, zero, ttbr0, ttbr1, tmp
+        ldr     \tmp, =swapper_pg_dir           @ swapper_pg_dir virtual address
+        cmp     \ttbr1, \tmp                    @ PHYS_OFFSET > PAGE_OFFSET? (branch below)
+        mrc     p15, 0, \tmp, c2, c0, 2         @ TTB control register
+        orr     \tmp, \tmp, #TTB_EAE
+        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP)
+        ALT_UP(orr      \tmp, \tmp, #TTB_FLAGS_UP)
+        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP << 16)
+        ALT_UP(orr      \tmp, \tmp, #TTB_FLAGS_UP << 16)
+        /*
+         * TTBR0/TTBR1 split (PAGE_OFFSET):
+         *   0x40000000: T0SZ = 2, T1SZ = 0 (not used)
+         *   0x80000000: T0SZ = 0, T1SZ = 1
+         *   0xc0000000: T0SZ = 0, T1SZ = 2
+         *
+         * Only use this feature if PHYS_OFFSET <= PAGE_OFFSET, otherwise
+         * booting secondary CPUs would end up using TTBR1 for the identity
+         * mapping set up in TTBR0.
+         */
+        bhi     9001f                           @ PHYS_OFFSET > PAGE_OFFSET?
+        orr     \tmp, \tmp, #(((PAGE_OFFSET >> 30) - 1) << 16) @ TTBCR.T1SZ
+#if defined CONFIG_VMSPLIT_2G
+        /* PAGE_OFFSET == 0x80000000, T1SZ == 1 */
+        add     \ttbr1, \ttbr1, #1 << 4         @ skip two L1 entries
+#elif defined CONFIG_VMSPLIT_3G
+        /* PAGE_OFFSET == 0xc0000000, T1SZ == 2 */
+        add     \ttbr1, \ttbr1, #4096 * (1 + 3) @ only L2 used, skip pgd+3*pmd
+#endif
+        /* CONFIG_VMSPLIT_1G does not need TTBR1 adjustment */
+9001:   mcr     p15, 0, \tmp, c2, c0, 2         @ TTB control register
+        mcrr    p15, 1, \ttbr1, \zero, c2       @ load TTBR1
+        .endm
+
+        __CPUINIT
+
+        /*
+         *   AT
+         *  TFR   EV X F   IHD LR    S
+         * .EEE ..EE PUI. .TAT 4RVI ZWRS BLDP WCAM
+         * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
+         *   11    0 110    1  0011 1100 .111 1101 < we want
+         */
+        .align  2
+        .type   v7_crval, #object
+v7_crval:
+        crval   clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
+
+        .previous
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 2c559ac38142..7e9b5bf910c1 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -19,24 +19,11 @@
 
 #include "proc-macros.S"
 
-#define TTB_S           (1 << 1)
-#define TTB_RGN_NC      (0 << 3)
-#define TTB_RGN_OC_WBWA (1 << 3)
-#define TTB_RGN_OC_WT   (2 << 3)
-#define TTB_RGN_OC_WB   (3 << 3)
-#define TTB_NOS         (1 << 5)
-#define TTB_IRGN_NC     ((0 << 0) | (0 << 6))
-#define TTB_IRGN_WBWA   ((0 << 0) | (1 << 6))
-#define TTB_IRGN_WT     ((1 << 0) | (0 << 6))
-#define TTB_IRGN_WB     ((1 << 0) | (1 << 6))
-
-/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
-#define TTB_FLAGS_UP    TTB_IRGN_WB|TTB_RGN_OC_WB
-#define PMD_FLAGS_UP    PMD_SECT_WB
-
-/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
-#define TTB_FLAGS_SMP   TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
-#define PMD_FLAGS_SMP   PMD_SECT_WBWA|PMD_SECT_S
+#ifdef CONFIG_ARM_LPAE
+#include "proc-v7-3level.S"
+#else
+#include "proc-v7-2level.S"
+#endif
 
 ENTRY(cpu_v7_proc_init)
         mov     pc, lr
@@ -63,6 +50,7 @@ ENDPROC(cpu_v7_proc_fin)
  *      caches disabled.
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_v7_reset)
         mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
         bic     r1, r1, #0x1                    @ ...............m
@@ -71,6 +59,7 @@ ENTRY(cpu_v7_reset)
         isb
         mov     pc, r0
 ENDPROC(cpu_v7_reset)
+        .popsection
 
 /*
  *      cpu_v7_do_idle()
@@ -97,127 +86,12 @@ ENTRY(cpu_v7_dcache_clean_area)
         mov     pc, lr
 ENDPROC(cpu_v7_dcache_clean_area)
 
-/*
- *      cpu_v7_switch_mm(pgd_phys, tsk)
- *
- *      Set the translation table base pointer to be pgd_phys
- *
- *      - pgd_phys - physical address of new TTB
- *
- *      It is assumed that:
- *      - we are not using split page tables
- */
-ENTRY(cpu_v7_switch_mm)
-#ifdef CONFIG_MMU
-        mov     r2, #0
-        ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
-        ALT_SMP(orr     r0, r0, #TTB_FLAGS_SMP)
-        ALT_UP(orr      r0, r0, #TTB_FLAGS_UP)
-#ifdef CONFIG_ARM_ERRATA_430973
-        mcr     p15, 0, r2, c7, c5, 6           @ flush BTAC/BTB
-#endif
-#ifdef CONFIG_ARM_ERRATA_754322
-        dsb
-#endif
-        mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
-        isb
-1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
-        isb
-#ifdef CONFIG_ARM_ERRATA_754322
-        dsb
-#endif
-        mcr     p15, 0, r1, c13, c0, 1          @ set context ID
-        isb
-#endif
-        mov     pc, lr
-ENDPROC(cpu_v7_switch_mm)
-
-/*
- *      cpu_v7_set_pte_ext(ptep, pte)
- *
- *      Set a level 2 translation table entry.
- *
- *      - ptep  - pointer to level 2 translation table entry
- *                (hardware version is stored at +2048 bytes)
- *      - pte   - PTE value to store
- *      - ext   - value for extended PTE bits
- */
-ENTRY(cpu_v7_set_pte_ext)
-#ifdef CONFIG_MMU
-        str     r1, [r0]                        @ linux version
-
-        bic     r3, r1, #0x000003f0
-        bic     r3, r3, #PTE_TYPE_MASK
-        orr     r3, r3, r2
-        orr     r3, r3, #PTE_EXT_AP0 | 2
-
-        tst     r1, #1 << 4
-        orrne   r3, r3, #PTE_EXT_TEX(1)
-
-        eor     r1, r1, #L_PTE_DIRTY
-        tst     r1, #L_PTE_RDONLY | L_PTE_DIRTY
-        orrne   r3, r3, #PTE_EXT_APX
-
-        tst     r1, #L_PTE_USER
-        orrne   r3, r3, #PTE_EXT_AP1
-#ifdef CONFIG_CPU_USE_DOMAINS
-        @ allow kernel read/write access to read-only user pages
-        tstne   r3, #PTE_EXT_APX
-        bicne   r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
-#endif
-
-        tst     r1, #L_PTE_XN
-        orrne   r3, r3, #PTE_EXT_XN
-
-        tst     r1, #L_PTE_YOUNG
-        tstne   r1, #L_PTE_PRESENT
-        moveq   r3, #0
-
- ARM(   str     r3, [r0, #2048]! )
- THUMB( add     r0, r0, #2048 )
- THUMB( str     r3, [r0] )
-        mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
-#endif
-        mov     pc, lr
-ENDPROC(cpu_v7_set_pte_ext)
-
         string  cpu_v7_name, "ARMv7 Processor"
         .align
 
-        /*
-         * Memory region attributes with SCTLR.TRE=1
-         *
-         *   n = TEX[0],C,B
-         *   TR = PRRR[2n+1:2n]         - memory type
-         *   IR = NMRR[2n+1:2n]         - inner cacheable property
-         *   OR = NMRR[2n+17:2n+16]     - outer cacheable property
-         *
-         *                      n       TR      IR      OR
-         *   UNCACHED           000     00
-         *   BUFFERABLE         001     10      00      00
-         *   WRITETHROUGH       010     10      10      10
-         *   WRITEBACK          011     10      11      11
-         *   reserved           110
-         *   WRITEALLOC         111     10      01      01
-         *   DEV_SHARED         100     01
-         *   DEV_NONSHARED      100     01
-         *   DEV_WC             001     10
-         *   DEV_CACHED         011     10
-         *
-         * Other attributes:
-         *
-         *   DS0 = PRRR[16] = 0         - device shareable property
-         *   DS1 = PRRR[17] = 1         - device shareable property
-         *   NS0 = PRRR[18] = 0         - normal shareable property
-         *   NS1 = PRRR[19] = 1         - normal shareable property
-         *   NOS = PRRR[24+n] = 1       - not outer shareable
-         */
-.equ    PRRR,   0xff0a81a8
-.equ    NMRR,   0x40e040e0
-
 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
 .globl  cpu_v7_suspend_size
-.equ    cpu_v7_suspend_size, 4 * 7
+.equ    cpu_v7_suspend_size, 4 * 8
 #ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v7_do_suspend)
         stmfd   sp!, {r4 - r10, lr}
@@ -226,10 +100,11 @@ ENTRY(cpu_v7_do_suspend)
         stmia   r0!, {r4 - r5}
         mrc     p15, 0, r6, c3, c0, 0   @ Domain ID
         mrc     p15, 0, r7, c2, c0, 1   @ TTB 1
+        mrc     p15, 0, r11, c2, c0, 2  @ TTB control register
         mrc     p15, 0, r8, c1, c0, 0   @ Control register
         mrc     p15, 0, r9, c1, c0, 1   @ Auxiliary control register
         mrc     p15, 0, r10, c1, c0, 2  @ Co-processor access control
-        stmia   r0, {r6 - r10}
+        stmia   r0, {r6 - r11}
         ldmfd   sp!, {r4 - r10, pc}
 ENDPROC(cpu_v7_do_suspend)
 
@@ -241,13 +116,15 @@ ENTRY(cpu_v7_do_resume)
         ldmia   r0!, {r4 - r5}
         mcr     p15, 0, r4, c13, c0, 0  @ FCSE/PID
         mcr     p15, 0, r5, c13, c0, 3  @ User r/o thread ID
-        ldmia   r0, {r6 - r10}
+        ldmia   r0, {r6 - r11}
         mcr     p15, 0, r6, c3, c0, 0   @ Domain ID
+#ifndef CONFIG_ARM_LPAE
         ALT_SMP(orr     r1, r1, #TTB_FLAGS_SMP)
         ALT_UP(orr      r1, r1, #TTB_FLAGS_UP)
+#endif
         mcr     p15, 0, r1, c2, c0, 0   @ TTB 0
         mcr     p15, 0, r7, c2, c0, 1   @ TTB 1
-        mcr     p15, 0, ip, c2, c0, 2   @ TTB control register
+        mcr     p15, 0, r11, c2, c0, 2  @ TTB control register
         mrc     p15, 0, r4, c1, c0, 1   @ Read Auxiliary control register
         teq     r4, r9                  @ Is it already set?
         mcrne   p15, 0, r9, c1, c0, 1   @ No, so write it
@@ -284,6 +161,7 @@ __v7_ca5mp_setup:
 __v7_ca9mp_setup:
         mov     r10, #(1 << 0)                  @ TLB ops broadcasting
         b       1f
+__v7_ca7mp_setup:
 __v7_ca15mp_setup:
         mov     r10, #0
 1:
@@ -363,11 +241,13 @@ __v7_setup:
         orreq   r10, r10, #1 << 6               @ set bit #6
         mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
 #endif
-#ifdef CONFIG_ARM_ERRATA_751472
-        cmp     r6, #0x30                       @ present prior to r3p0
+#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
+        ALT_SMP(cmp r6, #0x30)                  @ present prior to r3p0
+        ALT_UP_B(1f)
         mrclt   p15, 0, r10, c15, c0, 1         @ read diagnostic register
         orrlt   r10, r10, #1 << 11              @ set bit #11
         mcrlt   p15, 0, r10, c15, c0, 1         @ write diagnostic register
+1:
 #endif
 
 3:      mov     r10, #0
@@ -377,12 +257,7 @@ __v7_setup:
         dsb
 #ifdef CONFIG_MMU
         mcr     p15, 0, r10, c8, c7, 0          @ invalidate I + D TLBs
-        mcr     p15, 0, r10, c2, c0, 2          @ TTB control register
-        ALT_SMP(orr     r4, r4, #TTB_FLAGS_SMP)
-        ALT_UP(orr      r4, r4, #TTB_FLAGS_UP)
-        ALT_SMP(orr     r8, r8, #TTB_FLAGS_SMP)
-        ALT_UP(orr      r8, r8, #TTB_FLAGS_UP)
-        mcr     p15, 0, r8, c2, c0, 1           @ load TTB1
+        v7_ttb_setup r10, r4, r8, r5            @ TTBCR, TTBRx setup
         ldr     r5, =PRRR                       @ PRRR
         ldr     r6, =NMRR                       @ NMRR
         mcr     p15, 0, r5, c10, c2, 0          @ write PRRR
@@ -404,16 +279,7 @@ __v7_setup:
         mov     pc, lr                          @ return to head.S:__ret
 ENDPROC(__v7_setup)
 
-        /*   AT
-         *  TFR   EV X F   I D LR    S
-         * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
-         * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
-         *    1    0 110       0011 1100 .111 1101 < we want
-         */
-        .type   v7_crval, #object
-v7_crval:
-        crval   clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
-
+        .align  2
 __v7_setup_stack:
         .space  4 * 11                          @ 11 registers
 
@@ -435,11 +301,11 @@ __v7_setup_stack:
          */
 .macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0
         ALT_SMP(.long   PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
-                        PMD_FLAGS_SMP | \mm_mmuflags)
+                        PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags)
         ALT_UP(.long    PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \
-                        PMD_FLAGS_UP | \mm_mmuflags)
-        .long   PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_AP_WRITE | \
-                PMD_SECT_AP_READ | \io_mmuflags
+                        PMD_SECT_AF | PMD_FLAGS_UP | \mm_mmuflags)
+        .long   PMD_TYPE_SECT | PMD_SECT_AP_WRITE | \
+                PMD_SECT_AP_READ | PMD_SECT_AF | \io_mmuflags
         W(b)    \initfunc
         .long   cpu_arch_name
         .long   cpu_elf_name
@@ -452,6 +318,7 @@ __v7_setup_stack:
         .long   v7_cache_fns
 .endm
 
+#ifndef CONFIG_ARM_LPAE
         /*
          * ARM Ltd. Cortex A5 processor.
          */
@@ -463,6 +330,16 @@ __v7_ca5mp_proc_info:
         .size   __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
 
         /*
+         * ARM Ltd. Cortex A7 processor.
+         */
+        .type   __v7_ca7mp_proc_info, #object
+__v7_ca7mp_proc_info:
+        .long   0x410fc070
+        .long   0xff0ffff0
+        __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
+        .size   __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
+
+        /*
          * ARM Ltd. Cortex A9 processor.
          */
         .type   __v7_ca9mp_proc_info, #object
@@ -471,6 +348,7 @@ __v7_ca9mp_proc_info:
         .long   0xff0ffff0
         __v7_proc __v7_ca9mp_setup
         .size   __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
+#endif  /* CONFIG_ARM_LPAE */
 
         /*
          * ARM Ltd. Cortex A15 processor.
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index abf0507a08ae..b0d57869da2d 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -105,6 +105,7 @@ ENTRY(cpu_xsc3_proc_fin)
  * loc: location to jump to for soft reset
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_xsc3_reset)
         mov     r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
         msr     cpsr_c, r1                      @ reset CPSR
@@ -119,6 +120,8 @@ ENTRY(cpu_xsc3_reset)
         @ already containing those two last instructions to survive.
         mcr     p15, 0, ip, c8, c7, 0           @ invalidate I and D TLBs
         mov     pc, r0
+ENDPROC(cpu_xsc3_reset)
+        .popsection
 
 /*
  * cpu_xsc3_do_idle()
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 3277904bebaf..4ffebaa595ee 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -142,6 +142,7 @@ ENTRY(cpu_xscale_proc_fin)
  * Beware PXA270 erratum E7.
  */
         .align  5
+        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_xscale_reset)
         mov     r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
         msr     cpsr_c, r1                      @ reset CPSR
@@ -160,6 +161,8 @@ ENTRY(cpu_xscale_reset)
         @ already containing those two last instructions to survive.
         mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
         mov     pc, r0
+ENDPROC(cpu_xscale_reset)
+        .popsection
 
 /*
  * cpu_xscale_do_idle()
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index cafa18354339..d18dde95b8aa 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -20,6 +20,8 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include <asm/opcodes.h>
+
 /* This is the kernel's entry point into the floating point emulator.
 It is called from the kernel with code similar to this:
 
@@ -81,11 +83,11 @@ nwfpe_enter:
         mov     r6, r0                  @ save the opcode
 emulate:
         ldr     r1, [sp, #S_PSR]        @ fetch the PSR
-        bl      checkCondition          @ check the condition
-        cmp     r0, #0                  @ r0 = 0 ==> condition failed
+        bl      arm_check_condition     @ check the condition
+        cmp     r0, #ARM_OPCODE_CONDTEST_PASS   @ condition passed?
 
         @ if condition code failed to match, next insn
-        beq     next                    @ get the next instruction;
+        bne     next                    @ get the next instruction;
 
         mov     r0, r6                  @ prepare for EmulateAll()
         bl      EmulateAll              @ emulate the instruction
diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c
index 922b81107585..ff9834673085 100644
--- a/arch/arm/nwfpe/fpopcode.c
+++ b/arch/arm/nwfpe/fpopcode.c
@@ -61,29 +61,3 @@ const float32 float32Constant[] = {
         0x41200000              /* single 10.0 */
 };
 
-/* condition code lookup table
- index into the table is test code: EQ, NE, ... LT, GT, AL, NV
- bit position in short is condition code: NZCV */
-static const unsigned short aCC[16] = {
-        0xF0F0,                 // EQ == Z set
-        0x0F0F,                 // NE
-        0xCCCC,                 // CS == C set
-        0x3333,                 // CC
-        0xFF00,                 // MI == N set
-        0x00FF,                 // PL
-        0xAAAA,                 // VS == V set
-        0x5555,                 // VC
-        0x0C0C,                 // HI == C set && Z clear
-        0xF3F3,                 // LS == C clear || Z set
-        0xAA55,                 // GE == (N==V)
-        0x55AA,                 // LT == (N!=V)
-        0x0A05,                 // GT == (!Z && (N==V))
-        0xF5FA,                 // LE == (Z || (N!=V))
-        0xFFFF,                 // AL always
-        0                       // NV
-};
-
-unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes)
-{
-        return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1;
-}
diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h
index 786e4c96156d..78f02dbfaa8f 100644
--- a/arch/arm/nwfpe/fpopcode.h
+++ b/arch/arm/nwfpe/fpopcode.h
@@ -475,9 +475,6 @@ static inline unsigned int getDestinationSize(const unsigned int opcode)
         return (nRc);
 }
 
-extern unsigned int checkCondition(const unsigned int opcode,
-                                   const unsigned int ccodes);
-
 extern const float64 float64Constant[];
 extern const float32 float32Constant[];
 
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index c074e66ad224..4e0a371630b3 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -116,7 +116,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         return oprofile_perf_init(ops);
 }
 
-void __exit oprofile_arch_exit(void)
+void oprofile_arch_exit(void)
 {
         oprofile_perf_exit();
 }
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 69b09c1cec8b..a99dc15a70f7 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -10,10 +10,10 @@ obj-$(CONFIG_ARCH_IOP32X) += i2c.o
 obj-$(CONFIG_ARCH_IOP32X) += pci.o
 obj-$(CONFIG_ARCH_IOP32X) += setup.o
 obj-$(CONFIG_ARCH_IOP32X) += time.o
-obj-$(CONFIG_ARCH_IOP32X) += io.o
 obj-$(CONFIG_ARCH_IOP32X) += cp6.o
 obj-$(CONFIG_ARCH_IOP32X) += adma.o
 obj-$(CONFIG_ARCH_IOP32X) += pmu.o
+obj-$(CONFIG_ARCH_IOP32X) += restart.o
 
 # IOP33X
 obj-$(CONFIG_ARCH_IOP33X) += gpio.o
@@ -21,10 +21,10 @@ obj-$(CONFIG_ARCH_IOP33X) += i2c.o
 obj-$(CONFIG_ARCH_IOP33X) += pci.o
 obj-$(CONFIG_ARCH_IOP33X) += setup.o
 obj-$(CONFIG_ARCH_IOP33X) += time.o
-obj-$(CONFIG_ARCH_IOP33X) += io.o
 obj-$(CONFIG_ARCH_IOP33X) += cp6.o
 obj-$(CONFIG_ARCH_IOP33X) += adma.o
 obj-$(CONFIG_ARCH_IOP33X) += pmu.o
+obj-$(CONFIG_ARCH_IOP33X) += restart.o
 
 # IOP13XX
 obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
diff --git a/arch/arm/plat-iop/io.c b/arch/arm/plat-iop/io.c
deleted file mode 100644
index e15bc17db90b..000000000000
--- a/arch/arm/plat-iop/io.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * iop3xx custom ioremap implementation
- * Copyright (c) 2006, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
- * Place - Suite 330, Boston, MA 02111-1307 USA.
- *
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-
-void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype)
-{
-        void __iomem * retval;
-
-        switch (cookie) {
-        case IOP3XX_PCI_LOWER_IO_PA ... IOP3XX_PCI_UPPER_IO_PA:
-                retval = (void *) IOP3XX_PCI_IO_PHYS_TO_VIRT(cookie);
-                break;
-        case IOP3XX_PERIPHERAL_PHYS_BASE ... IOP3XX_PERIPHERAL_UPPER_PA:
-                retval = (void *) IOP3XX_PMMR_PHYS_TO_VIRT(cookie);
-                break;
-        default:
-                retval = __arm_ioremap_caller(cookie, size, mtype,
-                                __builtin_return_address(0));
-        }
-
-        return retval;
-}
-EXPORT_SYMBOL(__iop3xx_ioremap);
-
-void __iop3xx_iounmap(void __iomem *addr)
-{
-        extern void __iounmap(volatile void __iomem *addr);
-
-        switch ((u32) addr) {
-        case IOP3XX_PCI_LOWER_IO_VA ... IOP3XX_PCI_UPPER_IO_VA:
-        case IOP3XX_PERIPHERAL_VIRT_BASE ... IOP3XX_PERIPHERAL_UPPER_VA:
-                goto skip;
-        }
-        __iounmap(addr);
-
-skip:
-        return;
-}
-EXPORT_SYMBOL(__iop3xx_iounmap);
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c
new file mode 100644
index 000000000000..6a85a0c502e6
--- /dev/null
+++ b/arch/arm/plat-iop/restart.c
@@ -0,0 +1,19 @@
+/*
+ * restart.c
+ *
+ * Copyright (C) 2001 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/hardware/iop3xx.h>
+#include <mach/hardware.h>
+
+void iop3xx_restart(char mode, const char *cmd)
+{
+        *IOP3XX_PCSR = 0x30;
+
+        /* Jump into ROM at address 0 */
+        soft_restart(0);
+}
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 568dd0223d17..cbfbbe461788 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -18,7 +18,6 @@
 #include <linux/time.h>
 #include <linux/init.h>
 #include <linux/timex.h>
-#include <linux/sched.h>
 #include <linux/io.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
@@ -52,21 +51,12 @@ static struct clocksource iop_clocksource = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static DEFINE_CLOCK_DATA(cd);
-
 /*
  * IOP sched_clock() implementation via its clocksource.
  */
-unsigned long long notrace sched_clock(void)
+static u32 notrace iop_read_sched_clock(void)
 {
-        u32 cyc = 0xffffffffu - read_tcr1();
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace iop_update_sched_clock(void)
-{
-        u32 cyc = 0xffffffffu - read_tcr1();
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return 0xffffffffu - read_tcr1();
 }
 
 /*
@@ -152,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
 {
         u32 timer_ctl;
 
-        init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate);
+        setup_sched_clock(iop_read_sched_clock, 32, tick_rate);
 
         ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
         iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b3a1f2b3ada3..b30708e28c1d 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7
         bool "i.MX3, i.MX6"
         select AUTO_ZRELADDR if !ZBOOT_ROM
         select ARM_PATCH_PHYS_VIRT
+        select MIGHT_HAVE_CACHE_L2X0
         help
           This enables support for systems based on the Freescale i.MX3 and i.MX6
           family.
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
index b9f0f5f499a4..076db84f3e31 100644
--- a/arch/arm/plat-mxc/Makefile
+++ b/arch/arm/plat-mxc/Makefile
@@ -5,7 +5,6 @@
 # Common support
 obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
 
-obj-$(CONFIG_ARM_GIC) += gic.o
 obj-$(CONFIG_MXC_TZIC) += tzic.o
 obj-$(CONFIG_MXC_AVIC) += avic.o
 
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 74aac96cda20..73db34bf588a 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -17,6 +17,7 @@
  * the CPU clock speed on the fly.
  */
 
+#include <linux/module.h>
 #include <linux/cpufreq.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -97,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
         return ret;
 }
 
-static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
+static int mxc_cpufreq_init(struct cpufreq_policy *policy)
 {
         int ret;
         int i;
diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c
deleted file mode 100644
index 12f8f8109010..000000000000
--- a/arch/arm/plat-mxc/gic.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-#include <linux/io.h>
-#include <asm/exception.h>
-#include <asm/localtimer.h>
-#include <asm/hardware/gic.h>
-#ifdef CONFIG_SMP
-#include <asm/smp.h>
-#endif
-
-asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
-{
-        u32 irqstat, irqnr;
-
-        do {
-                irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
-                irqnr = irqstat & 0x3ff;
-                if (irqnr == 1023)
-                        break;
-
-                if (irqnr > 15 && irqnr < 1021)
-                        handle_IRQ(irqnr, regs);
-#ifdef CONFIG_SMP
-                else {
-                        writel_relaxed(irqstat, gic_cpu_base_addr +
-                                                GIC_CPU_EOI);
-                        handle_IPI(irqnr, regs);
-                }
-#endif
-        } while (1);
-}
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83b745a5e1b7..83cca9bcfc97 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -71,8 +71,8 @@ extern int mx6q_clocks_init(void);
 extern struct platform_device *mxc_register_gpio(char *name, int id,
         resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
 extern void mxc_set_cpu_type(unsigned int type);
+extern void mxc_restart(char, const char *);
 extern void mxc_arch_reset_init(void __iomem *);
-extern void mx51_efikamx_reset(void);
 extern int mx53_revision(void);
 extern int mx53_display_revision(void);
 
@@ -85,12 +85,10 @@ enum mxc_cpu_pwr_mode {
 };
 
 extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
-extern void (*imx_idle)(void);
 extern void imx_print_silicon_rev(const char *cpu, int srev);
 
 void avic_handle_irq(struct pt_regs *);
 void tzic_handle_irq(struct pt_regs *);
-void gic_handle_irq(struct pt_regs *);
 
 #define imx1_handle_irq avic_handle_irq
 #define imx21_handle_irq avic_handle_irq
@@ -123,6 +121,7 @@ static inline void imx_smp_prepare(void) {}
 extern void imx_enable_cpu(int cpu, bool enable);
 extern void imx_set_cpu_jump(int cpu, void *jump_addr);
 extern void imx_src_init(void);
+extern void imx_src_prepare_restart(void);
 extern void imx_gpc_init(void);
 extern void imx_gpc_pre_suspend(void);
 extern void imx_gpc_post_resume(void);
@@ -133,4 +132,5 @@ extern void imx53_qsb_common_init(void);
 extern void imx53_smd_common_init(void);
 extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
 extern void imx6q_pm_init(void);
+extern void imx6q_clock_map_io(void);
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S
index ca5cf26a04b1..def5d30cb67e 100644
--- a/arch/arm/plat-mxc/include/mach/entry-macro.S
+++ b/arch/arm/plat-mxc/include/mach/entry-macro.S
@@ -9,19 +9,8 @@
  * published by the Free Software Foundation.
  */
 
-/* Unused, we use CONFIG_MULTI_IRQ_HANDLER */
-
         .macro  disable_fiq
         .endm
 
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        .endm
-
-        .macro test_for_ipi, irqnr, irqstat, base, tmp
-        .endm
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h
index 97b19e7800bc..2b7c08d13e89 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/plat-mxc/include/mach/mx1.h
@@ -12,8 +12,6 @@
 #ifndef __MACH_MX1_H__
 #define __MACH_MX1_H__
 
-#include <mach/vmalloc.h>
-
 /*
  * Memory map
  */
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 00a78193c681..a4d36d601d55 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -50,20 +50,6 @@
 #define IMX_CHIP_REVISION_3_3           0x33
 #define IMX_CHIP_REVISION_UNKNOWN       0xff
 
-#define IMX_CHIP_REVISION_1_0_STRING            "1.0"
-#define IMX_CHIP_REVISION_1_1_STRING            "1.1"
-#define IMX_CHIP_REVISION_1_2_STRING            "1.2"
-#define IMX_CHIP_REVISION_1_3_STRING            "1.3"
-#define IMX_CHIP_REVISION_2_0_STRING            "2.0"
-#define IMX_CHIP_REVISION_2_1_STRING            "2.1"
-#define IMX_CHIP_REVISION_2_2_STRING            "2.2"
-#define IMX_CHIP_REVISION_2_3_STRING            "2.3"
-#define IMX_CHIP_REVISION_3_0_STRING            "3.0"
-#define IMX_CHIP_REVISION_3_1_STRING            "3.1"
-#define IMX_CHIP_REVISION_3_2_STRING            "3.2"
-#define IMX_CHIP_REVISION_3_3_STRING            "3.3"
-#define IMX_CHIP_REVISION_UNKNOWN_STRING        "unknown"
-
 #ifndef __ASSEMBLY__
 extern unsigned int __mxc_cpu_type;
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index cf88b3593fba..13ad0df2e860 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,16 +17,9 @@
 #ifndef __ASM_ARCH_MXC_SYSTEM_H__
 #define __ASM_ARCH_MXC_SYSTEM_H__
 
-extern void (*imx_idle)(void);
-
 static inline void arch_idle(void)
 {
-        if (imx_idle != NULL)
-                (imx_idle)();
-        else
-                cpu_do_idle();
+        cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
-
 #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 88fd40452567..477971b00930 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
         case MACH_TYPE_PCM043:
         case MACH_TYPE_LILLY1131:
         case MACH_TYPE_VPR200:
+        case MACH_TYPE_EUKREA_CPUIMX35SD:
                 uart_base = MX3X_UART1_BASE_ADDR;
                 break;
         case MACH_TYPE_MAGX_ZN5:
diff --git a/arch/arm/plat-mxc/include/mach/vmalloc.h b/arch/arm/plat-mxc/include/mach/vmalloc.h
deleted file mode 100644
index ef6379c474be..000000000000
--- a/arch/arm/plat-mxc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 2000 Russell King.
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MXC_VMALLOC_H__
-#define __ASM_ARCH_MXC_VMALLOC_H__
-
-/* vmalloc ending address */
-#define VMALLOC_END       0xf4000000UL
-
-#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42d74ea59084..e032717f7d02 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,9 @@
 #define MX3_PWMSAR                0x0C    /* PWM Sample Register */
 #define MX3_PWMPR                 0x10    /* PWM Period Register */
 #define MX3_PWMCR_PRESCALER(x)    (((x - 1) & 0xFFF) << 4)
+#define MX3_PWMCR_DOZEEN                (1 << 24)
+#define MX3_PWMCR_WAITEN                (1 << 23)
+#define MX3_PWMCR_DBGEN                 (1 << 22)
 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
 #define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
 #define MX3_PWMCR_EN              (1 << 0)
@@ -74,10 +77,21 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
                 do_div(c, period_ns);
                 duty_cycles = c;
 
+                /*
+                 * according to imx pwm RM, the real period value should be
+                 * PERIOD value in PWMPR plus 2.
+                 */
+                if (period_cycles > 2)
+                        period_cycles -= 2;
+                else
+                        period_cycles = 0;
+
                 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
                 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
 
-                cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN;
+                cr = MX3_PWMCR_PRESCALER(prescale) |
+                        MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
+                        MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
 
                 if (cpu_is_mx25())
                         cr |= MX3_PWMCR_CLKSRC_IPG;
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 9dad8dcc2ea9..3599bf2cfd4f 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -21,6 +21,7 @@
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/delay.h>
+#include <linux/module.h>
 
 #include <mach/hardware.h>
 #include <mach/common.h>
@@ -28,25 +29,18 @@
 #include <asm/system.h>
 #include <asm/mach-types.h>
 
-void (*imx_idle)(void) = NULL;
 void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
+EXPORT_SYMBOL_GPL(imx_ioremap);
 
 static void __iomem *wdog_base;
 
 /*
  * Reset the system. It is called by machine_restart().
  */
-void arch_reset(char mode, const char *cmd)
+void mxc_restart(char mode, const char *cmd)
 {
         unsigned int wcr_enable;
 
-#ifdef CONFIG_MACH_MX51_EFIKAMX
-        if (machine_is_mx51_efikamx()) {
-                mx51_efikamx_reset();
-                return;
-        }
-#endif
-
         if (cpu_is_mx1()) {
                 wcr_enable = (1 << 0);
         } else {
@@ -70,7 +64,7 @@ void arch_reset(char mode, const char *cmd)
         mdelay(50);
 
         /* we'll take a jump through zero as a poor second */
-        cpu_reset(0);
+        soft_restart(0);
 }
 
 void mxc_arch_reset_init(void __iomem *base)
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 4b0fe285e83c..1c96cdb4c35e 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void)
 
 static void __iomem *sched_clock_reg;
 
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace mxc_read_sched_clock(void)
 {
-        cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace mxc_update_sched_clock(void)
-{
-        cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
 }
 
 static int __init mxc_clocksource_init(struct clk *timer_clk)
@@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 
         sched_clock_reg = reg;
 
-        init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
+        setup_sched_clock(mxc_read_sched_clock, 32, c);
         return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
                         clocksource_mmio_readl_up);
 }
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 30b6433d910d..ad1b45b605a4 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -17,7 +17,6 @@
 #include <linux/clk.h>
 #include <linux/jiffies.h>
 #include <linux/err.h>
-#include <linux/sched.h>
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 
@@ -79,23 +78,12 @@ void __iomem *mtu_base; /* Assigned by machine code */
  * local implementation which uses the clocksource to get some
  * better resolution when scheduling the kernel.
  */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace nomadik_read_sched_clock(void)
 {
-        u32 cyc;
-
         if (unlikely(!mtu_base))
                 return 0;
 
-        cyc = -readl(mtu_base + MTU_VAL(0));
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace nomadik_update_sched_clock(void)
-{
-        u32 cyc = -readl(mtu_base + MTU_VAL(0));
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return -readl(mtu_base + MTU_VAL(0));
 }
 #endif
 
@@ -231,9 +219,11 @@ void __init nmdk_timer_init(void)
                         rate, 200, 32, clocksource_mmio_readl_down))
                 pr_err("timer: failed to initialize clock source %s\n",
                        "mtu_0");
+
 #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
-        init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
+        setup_sched_clock(nomadik_read_sched_clock, 32, rate);
 #endif
+
         /* Timer 1 is used for events */
 
         clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 985262242f25..3df04d944e4d 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
-         usb.o fb.o io.o counter_32k.o
+         usb.o fb.o counter_32k.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index d9f10a31e604..2ee6341fffdb 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/dma-mapping.h>
 #include <linux/omapfb.h>
 
 #include <plat/common.h>
@@ -66,3 +67,10 @@ void __init omap_reserve(void)
         omap_vram_reserve_sdram_memblock();
         omap_dsp_reserve_sdram_memblock();
 }
+
+void __init omap_init_consistent_dma_size(void)
+{
+#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
+        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
+#endif
+}
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index a6cbb712da51..5f0f2292b7fb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -17,7 +17,6 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
-#include <linux/sched.h>
 #include <linux/clocksource.h>
 
 #include <asm/sched_clock.h>
@@ -37,41 +36,9 @@ static void __iomem *timer_32k_base;
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
 
-/*
- * Returns current time from boot in nsecs. It's OK for this to wrap
- * around for now, as it's just a relative time stamp.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
- * This gives a resolution of about 30us and a wrap period of about 36hrs.
- */
-#define SC_MULT         4000000000u
-#define SC_SHIFT        17
-
-static inline unsigned long long notrace _omap_32k_sched_clock(void)
-{
-        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
-unsigned long long notrace sched_clock(void)
-{
-        return _omap_32k_sched_clock();
-}
-#else
-unsigned long long notrace omap_32k_sched_clock(void)
-{
-        return _omap_32k_sched_clock();
-}
-#endif
-
-static void notrace omap_update_sched_clock(void)
+static u32 notrace omap_32k_read_sched_clock(void)
 {
-        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
 }
 
 /**
@@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void)
                                           clocksource_mmio_readl_up))
                         printk(err, "32k_counter");
 
-                init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
-                                       32768, SC_MULT, SC_SHIFT);
+                setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
         }
         return 0;
 }
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 197ca03c3f7d..eb73ab40e955 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -165,8 +165,8 @@ struct dpll_data {
         u8                      auto_recal_bit;
         u8                      recal_en_bit;
         u8                      recal_st_bit;
-        u8                      flags;
 #  endif
+        u8                      flags;
 };
 
 #endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index c50df4814f6f..b4d7ec3fbfbe 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -27,94 +27,14 @@
 #ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
 #define __ARCH_ARM_MACH_OMAP_COMMON_H
 
-#include <linux/delay.h>
-
 #include <plat/i2c.h>
+#include <plat/omap_hwmod.h>
 
-struct sys_timer;
-
-extern void omap_map_common_io(void);
-extern struct sys_timer omap1_timer;
-extern struct sys_timer omap2_timer;
-extern struct sys_timer omap3_timer;
-extern struct sys_timer omap3_secure_timer;
-extern struct sys_timer omap4_timer;
-extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
-extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
-
-void omap2420_init_early(void);
-void omap2430_init_early(void);
-void omap3430_init_early(void);
-void omap35xx_init_early(void);
-void omap3630_init_early(void);
-void omap3_init_early(void);    /* Do not use this one */
-void am35xx_init_early(void);
-void ti816x_init_early(void);
-void omap4430_init_early(void);
+extern int omap_dss_reset(struct omap_hwmod *);
 
 void omap_sram_init(void);
 
-/*
- * IO bases for various OMAP processors
- * Except the tap base, rest all the io bases
- * listed are physical addresses.
- */
-struct omap_globals {
-        u32             class;          /* OMAP class to detect */
-        void __iomem    *tap;           /* Control module ID code */
-        void __iomem    *sdrc;           /* SDRAM Controller */
-        void __iomem    *sms;            /* SDRAM Memory Scheduler */
-        void __iomem    *ctrl;           /* System Control Module */
-        void __iomem    *ctrl_pad;      /* PAD Control Module */
-        void __iomem    *prm;            /* Power and Reset Management */
-        void __iomem    *cm;             /* Clock Management */
-        void __iomem    *cm2;
-};
-
-void omap2_set_globals_242x(void);
-void omap2_set_globals_243x(void);
-void omap2_set_globals_3xxx(void);
-void omap2_set_globals_443x(void);
-void omap2_set_globals_ti816x(void);
-
-/* These get called from omap2_set_globals_xxxx(), do not call these */
-void omap2_set_globals_tap(struct omap_globals *);
-void omap2_set_globals_sdrc(struct omap_globals *);
-void omap2_set_globals_control(struct omap_globals *);
-void omap2_set_globals_prcm(struct omap_globals *);
-
-void omap242x_map_io(void);
-void omap243x_map_io(void);
-void omap3_map_io(void);
-void omap4_map_io(void);
-
-
-/**
- * omap_test_timeout - busy-loop, testing a condition
- * @cond: condition to test until it evaluates to true
- * @timeout: maximum number of microseconds in the timeout
- * @index: loop index (integer)
- *
- * Loop waiting for @cond to become true or until at least @timeout
- * microseconds have passed.  To use, define some integer @index in the
- * calling code.  After running, if @index == @timeout, then the loop has
- * timed out.
- */
-#define omap_test_timeout(cond, timeout, index)                 \
-({                                                              \
-        for (index = 0; index < timeout; index++) {             \
-                if (cond)                                       \
-                        break;                                  \
-                udelay(1);                                      \
-        }                                                       \
-})
-
-extern struct device *omap2_get_mpuss_device(void);
-extern struct device *omap2_get_iva_device(void);
-extern struct device *omap2_get_l3_device(void);
-extern struct device *omap4_get_dsp_device(void);
-
 #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 7f2969eadb85..1234944a4da0 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -247,8 +247,6 @@
  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
  */
 
-void omap_ioremap_init(void);
-
 extern u8 omap_readb(u32 pa);
 extern u16 omap_readw(u32 pa);
 extern u32 omap_readl(u32 pa);
@@ -257,83 +255,9 @@ extern void omap_writew(u16 v, u32 pa);
 extern void omap_writel(u32 v, u32 pa);
 
 struct omap_sdrc_params;
-
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-void omap7xx_map_io(void);
-#else
-static inline void omap_map_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP15XX
-void omap15xx_map_io(void);
-#else
-static inline void omap15xx_map_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP16XX
-void omap16xx_map_io(void);
-#else
-static inline void omap16xx_map_io(void)
-{
-}
-#endif
-
-void omap1_init_early(void);
-
-#ifdef CONFIG_SOC_OMAP2420
-extern void omap242x_map_common_io(void);
-#else
-static inline void omap242x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-extern void omap243x_map_common_io(void);
-#else
-static inline void omap243x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-extern void omap34xx_map_common_io(void);
-#else
-static inline void omap34xx_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAPTI816X
-extern void omapti816x_map_common_io(void);
-#else
-static inline void omapti816x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-extern void omap44xx_map_common_io(void);
-#else
-static inline void omap44xx_map_common_io(void)
-{
-}
-#endif
-
-extern void omap2_init_common_infrastructure(void);
 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                                       struct omap_sdrc_params *sdrc_cs1);
 
-#define __arch_ioremap  omap_ioremap
-#define __arch_iounmap  omap_iounmap
-
-void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
-void omap_iounmap(volatile void __iomem *addr);
-
 extern void __init omap_init_consistent_dma_size(void);
 
 #endif
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 30e10719b774..ebda7382c65b 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -436,20 +436,6 @@
 #define INTCPS_NR_MIR_REGS      3
 #define INTCPS_NR_IRQS          96
 
-#ifndef __ASSEMBLY__
-extern void __iomem *omap_irq_base;
-void omap1_init_irq(void);
-void omap2_init_irq(void);
-void omap3_init_irq(void);
-void ti816x_init_irq(void);
-extern int omap_irq_pending(void);
-void omap_intc_save_context(void);
-void omap_intc_restore_context(void);
-void omap3_intc_suspend(void);
-void omap3_intc_prepare_idle(void);
-void omap3_intc_resume_idle(void);
-#endif
-
 #include <mach/hardware.h>
 
 #ifdef CONFIG_FIQ
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 1ab9fd6abe6d..ac44bde5d36d 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -2,7 +2,7 @@
  * arch/arm/plat-omap/include/mach/serial.h
  *
  * Copyright (C) 2009 Texas Instruments
- * Addded OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
index c5fa9e929009..8e5ebd74b129 100644
--- a/arch/arm/plat-omap/include/plat/system.h
+++ b/arch/arm/plat-omap/include/plat/system.h
@@ -12,6 +12,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-extern void (*arch_reset)(char, const char *);
-
 #endif
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
deleted file mode 100644
index 333871f59995..000000000000
--- a/arch/arm/plat-omap/io.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Common io.c file
- * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/dma-mapping.h>
-
-#include <plat/omap7xx.h>
-#include <plat/omap1510.h>
-#include <plat/omap16xx.h>
-#include <plat/omap24xx.h>
-#include <plat/omap34xx.h>
-#include <plat/omap44xx.h>
-
-#define BETWEEN(p,st,sz)        ((p) >= (st) && (p) < ((st) + (sz)))
-#define XLATE(p,pst,vst)        ((void __iomem *)((p) - (pst) + (vst)))
-
-static int initialized;
-
-/*
- * Intercept ioremap() requests for addresses in our fixed mapping regions.
- */
-void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
-{
-
-        WARN(!initialized, "Do not use ioremap before init_early\n");
-
-#ifdef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap1()) {
-                if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
-                        return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
-        }
-        if (cpu_is_omap7xx()) {
-                if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE))
-                        return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START);
-
-                if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE))
-                        return XLATE(p, OMAP7XX_DSPREG_BASE,
-                                        OMAP7XX_DSPREG_START);
-        }
-        if (cpu_is_omap15xx()) {
-                if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
-                        return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
-
-                if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
-                        return XLATE(p, OMAP1510_DSPREG_BASE,
-                                        OMAP1510_DSPREG_START);
-        }
-        if (cpu_is_omap16xx()) {
-                if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
-                        return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
-
-                if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
-                        return XLATE(p, OMAP16XX_DSPREG_BASE,
-                                        OMAP16XX_DSPREG_START);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP2
-        if (cpu_is_omap24xx()) {
-                if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
-                        return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
-                if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
-                        return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
-        }
-        if (cpu_is_omap2420()) {
-                if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
-                        return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
-                if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
-                        return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
-                if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
-                        return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
-        }
-        if (cpu_is_omap2430()) {
-                if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
-                        return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
-                if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
-                        return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
-                if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
-                        return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
-                if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
-                        return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP3
-        if (cpu_is_ti816x()) {
-                if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
-                        return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
-        } else if (cpu_is_omap34xx()) {
-                if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
-                        return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
-                if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
-                        return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
-                if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
-                        return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
-                if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
-                        return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
-                if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
-                        return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
-                if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
-                        return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
-                if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
-                        return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
-        }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-        if (cpu_is_omap44xx()) {
-                if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
-                        return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
-                if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
-                        return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
-                if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
-                        return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
-                if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
-                        return XLATE(p, OMAP44XX_EMIF1_PHYS,            \
-                                                        OMAP44XX_EMIF1_VIRT);
-                if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
-                        return XLATE(p, OMAP44XX_EMIF2_PHYS,            \
-                                                        OMAP44XX_EMIF2_VIRT);
-                if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
-                        return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
-                if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
-                        return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
-                if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
-                        return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
-        }
-#endif
-        return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
-}
-EXPORT_SYMBOL(omap_ioremap);
-
-void omap_iounmap(volatile void __iomem *addr)
-{
-        unsigned long virt = (unsigned long)addr;
-
-        if (virt >= VMALLOC_START && virt < VMALLOC_END)
-                __iounmap(addr);
-}
-EXPORT_SYMBOL(omap_iounmap);
-
-void __init omap_init_consistent_dma_size(void)
-{
-#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
-        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
-#endif
-}
-
-void __init omap_ioremap_init(void)
-{
-        initialized++;
-}
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 41ab97ebe4cf..10d160888133 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
         struct orion_gpio_chip *ochip;
         struct irq_chip_generic *gc;
         struct irq_chip_type *ct;
+        char gc_label[16];
 
         if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
                 return;
 
+        snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
+                orion_gpio_chip_count);
+
         ochip = orion_gpio_chips + orion_gpio_chip_count;
-        ochip->chip.label = "orion_gpio";
+        ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
         ochip->chip.request = orion_gpio_request;
         ochip->chip.direction_input = orion_gpio_direction_input;
         ochip->chip.get = orion_gpio_get;
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 69a61367e4b8..1ed8d1397fcf 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -12,7 +12,6 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/sched.h>
 #include <linux/timer.h>
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy;
  * Orion's sched_clock implementation. It has a resolution of
  * at least 7.5ns (133MHz TCLK).
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace orion_read_sched_clock(void)
 {
-        u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-
-static void notrace orion_update_sched_clock(void)
-{
-        u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void __init setup_sched_clock(unsigned long tclk)
-{
-        init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
+        return ~readl(timer_base + TIMER0_VAL_OFF);
 }
 
 /*
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
         /*
          * Set scale and timer for sched_clock.
          */
-        setup_sched_clock(tclk);
+        setup_sched_clock(orion_read_sched_clock, 32, tclk);
 
         /*
          * Setup free-running clocksource timer (interrupts
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index bcc43f346272..084604be6ad1 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -19,7 +19,7 @@
 #include <linux/timer.h>
 #include <linux/init.h>
 #include <linux/gpio.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/platform_device.h>
 
 #include <linux/mtd/mtd.h>
diff --git a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
index a9276667c2fb..c7adad0e8de0 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
@@ -12,7 +12,7 @@
 */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
diff --git a/arch/arm/plat-s3c24xx/cpu-freq.c b/arch/arm/plat-s3c24xx/cpu-freq.c
index b3d3d0278997..468079938884 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq.c
@@ -20,7 +20,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/sysfs.h>
 #include <linux/slab.h>
 
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 3c6335307fb1..1121df13e15f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void)
         return __raw_readl(S3C2410_GSTATUS1);
 }
 
-/* Hook for arm_pm_restart to ensure we execute the reset code
- * with the caches enabled. It seems at least the S3C2440 has a problem
- * resetting if there is bus activity interrupted by the reset.
- */
-static void s3c24xx_pm_restart(char mode, const char *cmd)
-{
-        if (mode != 's') {
-                unsigned long flags;
-
-                local_irq_save(flags);
-                __cpuc_flush_kern_all();
-                __cpuc_flush_user_all();
-
-                arch_reset(mode, cmd);
-                local_irq_restore(flags);
-        }
-
-        /* fallback, or unhandled */
-        arm_machine_restart(mode, cmd);
-}
-
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
         /* initialise the io descriptors we need for initialisation */
@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
         }
         s3c24xx_init_cpu();
 
-        arm_pm_restart = s3c24xx_pm_restart;
-
         s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
 }
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fc8c5f89954d..bc42c04091fd 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -22,7 +22,7 @@
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 
 #include <asm/irq.h>
diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c
index 663b280d65da..68296b1fe7e5 100644
--- a/arch/arm/plat-s3c24xx/pm-simtec.c
+++ b/arch/arm/plat-s3c24xx/pm-simtec.c
@@ -18,7 +18,6 @@
 #include <linux/list.h>
 #include <linux/timer.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
 #include <linux/device.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/plat-s3c24xx/s3c2410-clock.c b/arch/arm/plat-s3c24xx/s3c2410-clock.c
index def76aa3825a..25dc4d4397b1 100644
--- a/arch/arm/plat-s3c24xx/s3c2410-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2410-clock.c
@@ -26,7 +26,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
diff --git a/arch/arm/plat-s3c24xx/s3c2412-iotiming.c b/arch/arm/plat-s3c24xx/s3c2412-iotiming.c
index 0b46d3895d62..48eee39ab369 100644
--- a/arch/arm/plat-s3c24xx/s3c2412-iotiming.c
+++ b/arch/arm/plat-s3c24xx/s3c2412-iotiming.c
@@ -17,7 +17,7 @@
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
 #include <linux/seq_file.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/err.h>
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9b9968fa8695..8167ce66188c 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -11,6 +11,7 @@ config PLAT_S5P
         default y
         select ARM_VIC if !ARCH_EXYNOS4
         select ARM_GIC if ARCH_EXYNOS4
+        select GIC_NON_BANKED if ARCH_EXYNOS4
         select NO_IOPORT
         select ARCH_REQUIRE_GPIOLIB
         select S3C_GPIO_TRACK
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 876344038b8d..30d8c3016e6b 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -13,7 +13,6 @@ obj-				:=
 # Core files
 
 obj-y                           += dev-uart.o
-obj-y                           += cpu.o
 obj-y                           += clock.o
 obj-y                           += irq.o
 obj-$(CONFIG_S5P_EXT_INT)       += irq-eint.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 5f84a3f13ef9..963edea7f7e7 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -17,7 +17,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 #include <asm/div64.h>
 
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
deleted file mode 100644
index a56959e83516..000000000000
--- a/arch/arm/plat-s5p/cpu.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* linux/arch/arm/plat-s5p/cpu.c
- *
- * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P CPU Support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
-#include <plat/s5pc100.h>
-#include <plat/s5pv210.h>
-#include <plat/exynos4.h>
-
-/* table of supported CPUs */
-
-static const char name_s5p6440[] = "S5P6440";
-static const char name_s5p6450[] = "S5P6450";
-static const char name_s5pc100[] = "S5PC100";
-static const char name_s5pv210[] = "S5PV210/S5PC110";
-static const char name_exynos4210[] = "EXYNOS4210";
-static const char name_exynos4212[] = "EXYNOS4212";
-static const char name_exynos4412[] = "EXYNOS4412";
-
-static struct cpu_table cpu_ids[] __initdata = {
-        {
-                .idcode         = S5P6440_CPU_ID,
-                .idmask         = S5P64XX_CPU_MASK,
-                .map_io         = s5p6440_map_io,
-                .init_clocks    = s5p6440_init_clocks,
-                .init_uarts     = s5p6440_init_uarts,
-                .init           = s5p64x0_init,
-                .name           = name_s5p6440,
-        }, {
-                .idcode         = S5P6450_CPU_ID,
-                .idmask         = S5P64XX_CPU_MASK,
-                .map_io         = s5p6450_map_io,
-                .init_clocks    = s5p6450_init_clocks,
-                .init_uarts     = s5p6450_init_uarts,
-                .init           = s5p64x0_init,
-                .name           = name_s5p6450,
-        }, {
-                .idcode         = S5PC100_CPU_ID,
-                .idmask         = S5PC100_CPU_MASK,
-                .map_io         = s5pc100_map_io,
-                .init_clocks    = s5pc100_init_clocks,
-                .init_uarts     = s5pc100_init_uarts,
-                .init           = s5pc100_init,
-                .name           = name_s5pc100,
-        }, {
-                .idcode         = S5PV210_CPU_ID,
-                .idmask         = S5PV210_CPU_MASK,
-                .map_io         = s5pv210_map_io,
-                .init_clocks    = s5pv210_init_clocks,
-                .init_uarts     = s5pv210_init_uarts,
-                .init           = s5pv210_init,
-                .name           = name_s5pv210,
-        }, {
-                .idcode         = EXYNOS4210_CPU_ID,
-                .idmask         = EXYNOS4_CPU_MASK,
-                .map_io         = exynos4_map_io,
-                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
-                .init           = exynos_init,
-                .name           = name_exynos4210,
-        }, {
-                .idcode         = EXYNOS4212_CPU_ID,
-                .idmask         = EXYNOS4_CPU_MASK,
-                .map_io         = exynos4_map_io,
-                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
-                .init           = exynos_init,
-                .name           = name_exynos4212,
-        }, {
-                .idcode         = EXYNOS4412_CPU_ID,
-                .idmask         = EXYNOS4_CPU_MASK,
-                .map_io         = exynos4_map_io,
-                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
-                .init           = exynos_init,
-                .name           = name_exynos4412,
-        },
-};
-
-/* minimal IO mapping */
-
-static struct map_desc s5p_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_CHIPID,
-                .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_SYS,
-                .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_TIMER,
-                .pfn            = __phys_to_pfn(S5P_PA_TIMER),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
-                .pfn            = __phys_to_pfn(S3C_PA_WDT),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_SROMC,
-                .pfn            = __phys_to_pfn(S5P_PA_SROMC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-/* read cpu identification code */
-
-void __init s5p_init_io(struct map_desc *mach_desc,
-                        int size, void __iomem *cpuid_addr)
-{
-        /* initialize the io descriptors we need for initialization */
-        iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
-        if (mach_desc)
-                iotable_init(mach_desc, size);
-
-        /* detect cpu id and rev. */
-        s5p_init_cpu(cpuid_addr);
-
-        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
-}
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index b5bb774985b0..c496b359c371 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -14,7 +14,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/gpio.h>
 
 #include <asm/hardware/vic.h>
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index c833e7b57599..17c0a2c58dfd 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -10,7 +10,6 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/err.h>
@@ -321,26 +320,14 @@ static void __iomem *s5p_timer_reg(void)
  * this wraps around for now, since it is just a relative time
  * stamp. (Inspired by U300 implementation.)
  */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace s5p_read_sched_clock(void)
 {
         void __iomem *reg = s5p_timer_reg();
 
         if (!reg)
                 return 0;
 
-        return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
-}
-
-static void notrace s5p_update_sched_clock(void)
-{
-        void __iomem *reg = s5p_timer_reg();
-
-        if (!reg)
-                return;
-
-        update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
+        return ~__raw_readl(reg);
 }
 
 static void __init s5p_clocksource_init(void)
@@ -358,7 +345,7 @@ static void __init s5p_clocksource_init(void)
         s5p_time_setup(timer_source.source_id, TCNT_MAX);
         s5p_time_start(timer_source.source_id, PERIODIC);
 
-        init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
+        setup_sched_clock(s5p_read_sched_clock, 32, clock_rate);
 
         if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
                         clock_rate, 250, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index e1cbc728c775..c8bec9c7655d 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -11,6 +11,7 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/export.h>
 
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c
index ae8b8507663f..786a4107a157 100644
--- a/arch/arm/plat-samsung/clock-clksrc.c
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -16,7 +16,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/io.h>
 
 #include <plat/clock.h>
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 3b4451979d1b..10f71179071f 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -33,7 +33,7 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/clk.h>
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index e657305644cc..a976c023b286 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -15,7 +15,6 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/pwm_backlight.h>
-#include <linux/slab.h>
 
 #include <plat/devs.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index dac4760c0f0a..95509d8eb140 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
 extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
 extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
 
-extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
-                                     struct s3c_cpufreq_config *cfg,
-                                     union s3c_iobank *iob);
-
-extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
-                                     struct s3c_cpufreq_config *cfg,
-                                     union s3c_iobank *iob);
-
 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
 #define s3c_cpufreq_debugfs_call(x) x
 #else
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
 extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
 
 #ifdef CONFIG_S3C2410_IOTIMING
+extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
+                                     struct s3c_cpufreq_config *cfg,
+                                     union s3c_iobank *iob);
+
 extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
                                  struct s3c_iotimings *iot);
 
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
 extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
                                  struct s3c_iotimings *iot);
 #else
+#define s3c2410_iotiming_debugfs NULL
 #define s3c2410_iotiming_calc NULL
 #define s3c2410_iotiming_get NULL
 #define s3c2410_iotiming_set NULL
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
 
 /* S3C2412 compatible routines */
 
-extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
-                                struct s3c_iotimings *timings);
+#ifdef CONFIG_S3C2412_IOTIMING
+extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
+                                     struct s3c_cpufreq_config *cfg,
+                                     union s3c_iobank *iob);
 
 extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
                                 struct s3c_iotimings *timings);
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
 
 extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
                                  struct s3c_iotimings *iot);
+#else
+#define s3c2412_iotiming_debugfs NULL
+#define s3c2412_iotiming_calc NULL
+#define s3c2412_iotiming_get NULL
+#define s3c2412_iotiming_set NULL
+#endif /* CONFIG_S3C2412_IOTIMING */
 
 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
 #define s3c_freq_dbg(x...) printk(KERN_INFO x)
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 40fd7b6b5e66..73cb3cfd0685 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode,
 /* core initialisation functions */
 
 extern void s3c24xx_init_irq(void);
-extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
 extern void s5p_init_irq(u32 *vic, u32 num_vic);
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
-extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
-extern void s5p_init_io(struct map_desc *mach_desc,
-                        int size, void __iomem *cpuid_addr);
 
 extern void s3c24xx_init_cpu(void);
 extern void s3c64xx_init_cpu(void);
@@ -183,22 +179,20 @@ extern struct syscore_ops s3c2410_pm_syscore_ops;
 extern struct syscore_ops s3c2412_pm_syscore_ops;
 extern struct syscore_ops s3c2416_pm_syscore_ops;
 extern struct syscore_ops s3c244x_pm_syscore_ops;
-extern struct syscore_ops s3c64xx_irq_syscore_ops;
-
-/* system device classes */
-
-extern struct sysdev_class s3c2410_sysclass;
-extern struct sysdev_class s3c2410a_sysclass;
-extern struct sysdev_class s3c2412_sysclass;
-extern struct sysdev_class s3c2416_sysclass;
-extern struct sysdev_class s3c2440_sysclass;
-extern struct sysdev_class s3c2442_sysclass;
-extern struct sysdev_class s3c2443_sysclass;
-extern struct sysdev_class s3c6410_sysclass;
-extern struct sysdev_class s3c64xx_sysclass;
-extern struct sysdev_class s5p64x0_sysclass;
-extern struct sysdev_class s5pv210_sysclass;
-extern struct sysdev_class exynos4_sysclass;
+
+/* system device subsystems */
+
+extern struct bus_type s3c2410_subsys;
+extern struct bus_type s3c2410a_subsys;
+extern struct bus_type s3c2412_subsys;
+extern struct bus_type s3c2416_subsys;
+extern struct bus_type s3c2440_subsys;
+extern struct bus_type s3c2442_subsys;
+extern struct bus_type s3c2443_subsys;
+extern struct bus_type s3c6410_subsys;
+extern struct bus_type s5p64x0_subsys;
+extern struct bus_type s5pv210_subsys;
+extern struct bus_type exynos4_subsys;
 
 extern void (*s5pc1xx_idle)(void);
 
diff --git a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 1c1ed5481253..d01576318b2c 100644
--- a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -12,7 +12,7 @@
 
 #include <plat/dma-core.h>
 
-extern struct sysdev_class dma_sysclass;
+extern struct bus_type dma_subsys;
 extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
 
 #define DMA_CH_VALID            (1<<31)
diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h
deleted file mode 100644
index f546e88ebc94..000000000000
--- a/arch/arm/plat-samsung/include/plat/exynos4.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/exynos4.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Header file for exynos4 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for EXYNOS4 related SoCs */
-
-extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void exynos4_register_clocks(void);
-extern void exynos4210_register_clocks(void);
-extern void exynos4212_register_clocks(void);
-extern void exynos4_setup_clocks(void);
-
-#ifdef CONFIG_ARCH_EXYNOS
-extern  int exynos_init(void);
-extern void exynos4_init_irq(void);
-extern void exynos4_map_io(void);
-extern void exynos4_init_clocks(int xtal);
-extern struct sys_timer exynos4_timer;
-
-#define exynos4_init_uarts exynos4_common_init_uarts
-
-#else
-#define exynos4_init_clocks NULL
-#define exynos4_init_uarts NULL
-#define exynos4_map_io NULL
-#define exynos_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index d48245bb02b3..df8155b9d4d1 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -24,6 +24,8 @@
 #ifndef __PLAT_GPIO_CFG_H
 #define __PLAT_GPIO_CFG_H __FILE__
 
+#include<linux/types.h>
+
 typedef unsigned int __bitwise__ samsung_gpio_pull_t;
 typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
 
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index dcf68709f9cf..61fc53740fbd 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -17,11 +17,12 @@
 
 #include <linux/irq.h>
 
-struct sys_device;
+struct device;
 
 #ifdef CONFIG_PM
 
 extern __init int s3c_pm_init(void);
+extern __init int s3c64xx_pm_init(void);
 
 #else
 
@@ -29,6 +30,11 @@ static inline int s3c_pm_init(void)
 {
         return 0;
 }
+
+static inline int s3c64xx_pm_init(void)
+{
+        return 0;
+}
 #endif
 
 /* configuration for the IRQ mask over sleep */
diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h
deleted file mode 100644
index 32ca5179c6e1..000000000000
--- a/arch/arm/plat-samsung/include/plat/reset.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/reset.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_SAMSUNG_RESET_H
-#define __PLAT_SAMSUNG_RESET_H __FILE__
-
-extern void (*s5p_reset_hook)(void);
-
-#endif /* __PLAT_SAMSUNG_RESET_H */
diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h
index 5bcfd143ba16..cbae50ddacc8 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2412.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2412.h
@@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c2412_init_clocks(int xtal);
 
 extern  int s3c2412_baseclk_add(void);
+
+extern void s3c2412_restart(char mode, const char *cmd);
 #else
 #define s3c2412_init_clocks NULL
 #define s3c2412_init_uarts NULL
 #define s3c2412_map_io NULL
 #define s3c2412_init NULL
+#define s3c2412_restart NULL
 #endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h
index a764f8503f52..de2b5bdc5ebd 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2416.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2416.h
@@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal);
 
 extern  int s3c2416_baseclk_add(void);
 
+extern void s3c2416_restart(char mode, const char *cmd);
 #else
 #define s3c2416_init_clocks NULL
 #define s3c2416_init_uarts NULL
 #define s3c2416_map_io NULL
 #define s3c2416_init NULL
+#define s3c2416_restart NULL
 #endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h
index 7fae1a050694..dce05b43d51c 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2443.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2443.h
@@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal);
 
 extern  int s3c2443_baseclk_add(void);
 
+extern void s3c2443_restart(char mode, const char *cmd);
 #else
 #define s3c2443_init_clocks NULL
 #define s3c2443_init_uarts NULL
 #define s3c2443_map_io NULL
 #define s3c2443_init NULL
+#define s3c2443_restart NULL
 #endif
 
 /* common code used by s3c2443 and others.
diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h
deleted file mode 100644
index 37d428aaaebb..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6400.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Header file for s3c6400 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S3C6400 related SoCs */
-
-extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s3c6400_setup_clocks(void);
-
-extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
-
-#ifdef CONFIG_CPU_S3C6400
-
-extern  int s3c6400_init(void);
-extern void s3c6400_init_irq(void);
-extern void s3c6400_map_io(void);
-extern void s3c6400_init_clocks(int xtal);
-
-#define s3c6400_init_uarts s3c6400_common_init_uarts
-
-#else
-#define s3c6400_init_clocks NULL
-#define s3c6400_init_uarts NULL
-#define s3c6400_map_io NULL
-#define s3c6400_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h
deleted file mode 100644
index 20a6675b9d17..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6410.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s3c6410.h
- *
- * Copyright 2008 Openmoko,  Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Header file for s3c6410 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifdef CONFIG_CPU_S3C6410
-
-extern  int s3c6410_init(void);
-extern void s3c6410_init_irq(void);
-extern void s3c6410_map_io(void);
-extern void s3c6410_init_clocks(int xtal);
-
-#define s3c6410_init_uarts s3c6400_common_init_uarts
-
-#else
-#define s3c6410_init_clocks NULL
-#define s3c6410_init_uarts NULL
-#define s3c6410_map_io NULL
-#define s3c6410_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h
deleted file mode 100644
index bf85ebbb4fbc..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6440.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5p6440.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5p6440 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
- /* Common init code for S5P6440 related SoCs */
-
-extern void s5p6440_register_clocks(void);
-extern void s5p6440_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5P6440
-
-extern  int s5p64x0_init(void);
-extern void s5p6440_init_irq(void);
-extern void s5p6440_map_io(void);
-extern void s5p6440_init_clocks(int xtal);
-
-extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-
-#else
-#define s5p6440_init_clocks NULL
-#define s5p6440_init_uarts NULL
-#define s5p6440_map_io NULL
-#define s5p64x0_init NULL
-#endif
-
-/* S5P6440 timer */
-
-extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h
deleted file mode 100644
index da25f9a1c54a..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6450.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5p6450.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Header file for s5p6450 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5P6450 related SoCs */
-
-extern void s5p6450_register_clocks(void);
-extern void s5p6450_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5P6450
-
-extern  int s5p64x0_init(void);
-extern void s5p6450_init_irq(void);
-extern void s5p6450_map_io(void);
-extern void s5p6450_init_clocks(int xtal);
-
-extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-
-#else
-#define s5p6450_init_clocks NULL
-#define s5p6450_init_uarts NULL
-#define s5p6450_map_io NULL
-#define s5p64x0_init NULL
-#endif
-
-/* S5P6450 timer */
-
-extern struct sys_timer s5p6450_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h
deleted file mode 100644
index 9a21aeaaf452..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pc100.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5pc100.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5pc100 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5PC100 related SoCs */
-
-extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5pc100_register_clocks(void);
-extern void s5pc100_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5PC100
-
-extern  int s5pc100_init(void);
-extern void s5pc100_init_irq(void);
-extern void s5pc100_map_io(void);
-extern void s5pc100_init_clocks(int xtal);
-
-#define s5pc100_init_uarts s5pc100_common_init_uarts
-
-#else
-#define s5pc100_init_clocks NULL
-#define s5pc100_init_uarts NULL
-#define s5pc100_map_io NULL
-#define s5pc100_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h
deleted file mode 100644
index b4bc6be77072..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pv210.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5pv210.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5pv210 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5PV210 related SoCs */
-
-extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5pv210_register_clocks(void);
-extern void s5pv210_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5PV210
-
-extern  int s5pv210_init(void);
-extern void s5pv210_init_irq(void);
-extern void s5pv210_map_io(void);
-extern void s5pv210_init_clocks(int xtal);
-
-#define s5pv210_init_uarts s5pv210_common_init_uarts
-
-#else
-#define s5pv210_init_clocks NULL
-#define s5pv210_init_uarts NULL
-#define s5pv210_map_io NULL
-#define s5pv210_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h
deleted file mode 100644
index a448e990964d..000000000000
--- a/arch/arm/plat-samsung/include/plat/system-reset.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/system-reset.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
- *
- * S5P - System define for arch_reset()
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <plat/watchdog-reset.h>
-
-void (*s5p_reset_hook)(void);
-
-static void arch_reset(char mode, const char *cmd)
-{
-        /* SWRESET support in s5p_reset_hook() */
-
-        if (s5p_reset_hook)
-                s5p_reset_hook();
-
-        /* Perform reset using Watchdog reset
-         * if there is no s5p_reset_hook()
-         */
-
-        arch_wdt_reset();
-}
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 40dbb2b0ae22..f19aff19205c 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -17,6 +17,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/delay.h>
 
 static inline void arch_wdt_reset(void)
 {
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c
index efe1d564473e..312b510d86b7 100644
--- a/arch/arm/plat-samsung/pd.c
+++ b/arch/arm/plat-samsung/pd.c
@@ -11,7 +11,7 @@
 */
 
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/err.h>
 #include <linux/pm_runtime.h>
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index 4be016eaa6db..c2ff92c30bdf 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -14,7 +14,7 @@
 */
 
 #include <linux/kernel.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index dc1185dcf80d..c559d8438c70 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -11,7 +11,7 @@
  * the Free Software Foundation; either version 2 of the License.
 */
 
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c
index dc814037297b..20c3d9117cc2 100644
--- a/arch/arm/plat-samsung/wakeup-mask.c
+++ b/arch/arm/plat-samsung/wakeup-mask.c
@@ -11,7 +11,7 @@
 
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/types.h>
 #include <linux/irq.h>
 #include <linux/io.h>
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
index b4f340b8f1f1..e0f2e5b9530c 100644
--- a/arch/arm/plat-spear/Makefile
+++ b/arch/arm/plat-spear/Makefile
@@ -3,6 +3,6 @@
 #
 
 # Common support
-obj-y   := clock.o time.o
+obj-y   := clock.o restart.o time.o
 
 obj-$(CONFIG_ARCH_SPEAR3XX)     += shirq.o padmux.o
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index a235fa0ca777..86c6f83b44cc 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -14,10 +14,6 @@
 #ifndef __PLAT_SYSTEM_H
 #define __PLAT_SYSTEM_H
 
-#include <linux/io.h>
-#include <asm/hardware/sp810.h>
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -27,15 +23,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /* software reset, Jump into ROM at address 0 */
-                cpu_reset(0);
-        } else {
-                /* hardware reset, Use on-chip reset capability */
-                sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
-        }
-}
-
 #endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-spear/include/plat/vmalloc.h b/arch/arm/plat-spear/include/plat/vmalloc.h
deleted file mode 100644
index 8c8b24d07046..000000000000
--- a/arch/arm/plat-spear/include/plat/vmalloc.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/vmalloc.h
- *
- * Defining Vmalloc area for SPEAr platform
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_VMALLOC_H
-#define __PLAT_VMALLOC_H
-
-#define VMALLOC_END             0xF0000000UL
-
-#endif /* __PLAT_VMALLOC_H */
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
new file mode 100644
index 000000000000..2b4e3d82957c
--- /dev/null
+++ b/arch/arm/plat-spear/restart.c
@@ -0,0 +1,27 @@
+/*
+ * arch/arm/plat-spear/restart.c
+ *
+ * SPEAr platform specific restart functions
+ *
+ * Copyright (C) 2009 ST Microelectronics
+ * Viresh Kumar<viresh.kumar@st.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/io.h>
+#include <asm/hardware/sp810.h>
+#include <mach/hardware.h>
+#include <mach/generic.h>
+
+void spear_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* software reset, Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                /* hardware reset, Use on-chip reset capability */
+                sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
+        }
+}
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig
deleted file mode 100644
index 1bf499570f42..000000000000
--- a/arch/arm/plat-tcc/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
-if ARCH_TCC_926
-
-menu "Telechips ARM926-based CPUs"
-
-choice
-        prompt "Telechips CPU type:"
-        default ARCH_TCC8K
-
-config ARCH_TCC8K
-        bool TCC8000
-        select USB_ARCH_HAS_OHCI
-        help
-          Support for Telechips TCC8000 systems
-
-endchoice
-
-source "arch/arm/mach-tcc8k/Kconfig"
-
-endmenu
-endif
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile
deleted file mode 100644
index eceabc869b8f..000000000000
--- a/arch/arm/plat-tcc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# "Telechips Platform Common Modules"
-
-obj-y := clock.o system.o
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c
deleted file mode 100644
index f3ced10d5271..000000000000
--- a/arch/arm/plat-tcc/clock.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Clock framework for Telechips SoCs
- * Based on arch/arm/plat-mxc/clock.c
- *
- * Copyright (C) 2004 - 2005 Nokia corporation
- * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- * Copyright 2010 Hans J. Koch, hjk@linutronix.de
- *
- * Licensed under the terms of the GPL v2.
- */
-
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/string.h>
-
-#include <mach/clock.h>
-#include <mach/hardware.h>
-
-static DEFINE_MUTEX(clocks_mutex);
-
-/*-------------------------------------------------------------------------
- * Standard clock functions defined in include/linux/clk.h
- *-------------------------------------------------------------------------*/
-
-static void __clk_disable(struct clk *clk)
-{
-        BUG_ON(clk->refcount == 0);
-
-        if (!(--clk->refcount) && clk->disable) {
-                /* Unconditionally disable the clock in hardware */
-                clk->disable(clk);
-                /* recursively disable parents */
-                if (clk->parent)
-                        __clk_disable(clk->parent);
-        }
-}
-
-static int __clk_enable(struct clk *clk)
-{
-        int ret = 0;
-
-        if (clk->refcount++ == 0 && clk->enable) {
-                if (clk->parent)
-                        ret = __clk_enable(clk->parent);
-                if (ret)
-                        return ret;
-                else
-                        return clk->enable(clk);
-        }
-
-        return 0;
-}
-
-/* This function increments the reference count on the clock and enables the
- * clock if not already enabled. The parent clock tree is recursively enabled
- */
-int clk_enable(struct clk *clk)
-{
-        int ret = 0;
-
-        if (!clk)
-                return -EINVAL;
-
-        mutex_lock(&clocks_mutex);
-        ret = __clk_enable(clk);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_enable);
-
-/* This function decrements the reference count on the clock and disables
- * the clock when reference count is 0. The parent clock tree is
- * recursively disabled
- */
-void clk_disable(struct clk *clk)
-{
-        if (!clk)
-                return;
-
-        mutex_lock(&clocks_mutex);
-        __clk_disable(clk);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL_GPL(clk_disable);
-
-/* Retrieve the *current* clock rate. If the clock itself
- * does not provide a special calculation routine, ask
- * its parent and so on, until one is able to return
- * a valid clock rate
- */
-unsigned long clk_get_rate(struct clk *clk)
-{
-        if (!clk)
-                return 0UL;
-
-        if (clk->get_rate)
-                return clk->get_rate(clk);
-
-        return clk_get_rate(clk->parent);
-}
-EXPORT_SYMBOL_GPL(clk_get_rate);
-
-/* Round the requested clock rate to the nearest supported
- * rate that is less than or equal to the requested rate.
- * This is dependent on the clock's current parent.
- */
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        if (!clk)
-                return 0;
-        if (!clk->round_rate)
-                return 0;
-
-        return clk->round_rate(clk, rate);
-}
-EXPORT_SYMBOL_GPL(clk_round_rate);
-
-/* Set the clock to the requested clock rate. The rate must
- * match a supported rate exactly based on what clk_round_rate returns
- */
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        int ret = -EINVAL;
-
-        if (!clk)
-                return ret;
-        if (!clk->set_rate || !rate)
-                return ret;
-
-        mutex_lock(&clocks_mutex);
-        ret = clk->set_rate(clk, rate);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_rate);
-
-/* Set the clock's parent to another clock source */
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-        struct clk *old;
-        int ret = -EINVAL;
-
-        if (!clk)
-                return ret;
-        if (!clk->set_parent || !parent)
-                return ret;
-
-        mutex_lock(&clocks_mutex);
-        old = clk->parent;
-        if (clk->refcount)
-                __clk_enable(parent);
-        ret = clk->set_parent(clk, parent);
-        if (ret)
-                old = parent;
-        if (clk->refcount)
-                __clk_disable(old);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_parent);
-
-/* Retrieve the clock's parent clock source */
-struct clk *clk_get_parent(struct clk *clk)
-{
-        if (!clk)
-                return NULL;
-
-        return clk->parent;
-}
-EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h
deleted file mode 100644
index a12f58ad71a8..000000000000
--- a/arch/arm/plat-tcc/include/mach/clock.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Low level clock header file for Telechips TCC architecture
- * (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the GPL v2.
- */
-
-#ifndef __ASM_ARCH_TCC_CLOCK_H__
-#define __ASM_ARCH_TCC_CLOCK_H__
-
-#ifndef __ASSEMBLY__
-
-struct clk {
-        struct clk *parent;
-        /* id number of a root clock, 0 for normal clocks */
-        int root_id;
-        /* Reference count of clock enable/disable */
-        int refcount;
-        /* Address of associated BCLKCTRx register. Must be set. */
-        void __iomem *bclkctr;
-        /* Bit position for BCLKCTRx. Must be set. */
-        int bclk_shift;
-        /* Address of ACLKxxx register, if any. */
-        void __iomem *aclkreg;
-        /* get the current clock rate (always a fresh value) */
-        unsigned long (*get_rate) (struct clk *);
-        /* Function ptr to set the clock to a new rate. The rate must match a
-           supported rate returned from round_rate. Leave blank if clock is not
-           programmable */
-        int (*set_rate) (struct clk *, unsigned long);
-        /* Function ptr to round the requested clock rate to the nearest
-           supported rate that is less than or equal to the requested rate. */
-        unsigned long (*round_rate) (struct clk *, unsigned long);
-        /* Function ptr to enable the clock. Leave blank if clock can not
-           be gated. */
-        int (*enable) (struct clk *);
-        /* Function ptr to disable the clock. Leave blank if clock can not
-           be gated. */
-        void (*disable) (struct clk *);
-        /* Function ptr to set the parent clock of the clock. */
-        int (*set_parent) (struct clk *, struct clk *);
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
deleted file mode 100644
index cf17d04ec30d..000000000000
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 1994-1999 Russell King
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-                .macro  addruart, rp, rv, tmp
-                moveq   \rp, #0x90000000        @ physical base address
-                movne   \rv, #0xF1000000        @ virtual base
-                orr     \rp, \rp, #0x00007000   @ UART0
-                orr     \rv, \rv, #0x00007000   @ UART0
-                .endm
-
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx, #0x44]
-                .endm
-
-                .macro  waituart,rd,rx
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:
-                ldr \rd, [\rx, #0x14]
-                tst \rd, #0x20
-
-                beq 1001b
-                .endm
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S
deleted file mode 100644
index 748f401e4b6d..000000000000
--- a/arch/arm/plat-tcc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * include/asm-arm/arch-tcc83x/entry-macro.S
- *
- * Author : <linux@telechips.com>
- * Created: June 10, 2008
- * Description: Low-level IRQ helper macros for Telechips-based platforms
- *
- * Copyright (C) 2008-2009 Telechips
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
-        .macro  disable_fiq
-        .endm
-
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-                ldr     \base, =0xF2003000 @ base address of PIC registers
-
-                @@ read MREQ register of PIC0
-
-                mov     \irqnr, #0
-                ldr     \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
-                cmp     \irqstat, #0
-                bne     1001f
-
-                @@ read MREQ register of PIC1
-
-                ldr     \irqstat, [\base, #0x00000094]  @ upper 32 interrupts
-                cmp     \irqstat, #0
-                beq     1002f
-                mov     \irqnr, #0x20
-
-1001:
-                movs    \tmp, \irqstat, lsl #16
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #16
-
-                movs    \tmp, \irqstat, lsl #8
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #8
-
-                movs    \tmp, \irqstat, lsl #4
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #4
-
-                movs    \tmp, \irqstat, lsl #2
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #2
-
-                movs    \tmp, \irqstat, lsl #1
-                addeq   \irqnr, \irqnr, #1
-                orrs    \base, \base, #1
-1002:
-                @@ exit here, Z flag unset if IRQ
-
-        .endm
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf3..000000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
- * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
- *                          and Dirk Behme <dirk.behme@de.bosch.com>
- * Rewritten by:    <linux@telechips.com>
- * Description: Hardware definitions for TCC8300 processors and boards
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Copyright (C) 2008-2009 Telechips
- *
- * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Pulic License version 2.
- */
-
-#ifndef __ASM_ARCH_TCC_HARDWARE_H
-#define __ASM_ARCH_TCC_HARDWARE_H
-
-#include <asm/sizes.h>
-#ifndef __ASSEMBLER__
-#include <asm/types.h>
-#endif
-#include <mach/io.h>
-
-/*
- * ----------------------------------------------------------------------------
- * Clocks
- * ----------------------------------------------------------------------------
- */
-#define CLKGEN_REG_BASE         0xfffece00
-#define ARM_CKCTL               (CLKGEN_REG_BASE + 0x0)
-#define ARM_IDLECT1             (CLKGEN_REG_BASE + 0x4)
-#define ARM_IDLECT2             (CLKGEN_REG_BASE + 0x8)
-#define ARM_EWUPCT              (CLKGEN_REG_BASE + 0xC)
-#define ARM_RSTCT1              (CLKGEN_REG_BASE + 0x10)
-#define ARM_RSTCT2              (CLKGEN_REG_BASE + 0x14)
-#define ARM_SYSST               (CLKGEN_REG_BASE + 0x18)
-#define ARM_IDLECT3             (CLKGEN_REG_BASE + 0x24)
-
-/* DPLL control registers */
-#define DPLL_CTL                0xfffecf00
-
-#endif  /* __ASM_ARCH_TCC_HARDWARE_H */
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h
deleted file mode 100644
index 3e911d3ea0f1..000000000000
--- a/arch/arm/plat-tcc/include/mach/io.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * IO definitions for TCC8000 processors and boards
- *
- * Copyright (C) 1997-1999 Russell King
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Public License version 2.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h
deleted file mode 100644
index da863894d498..000000000000
--- a/arch/arm/plat-tcc/include/mach/irqs.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * IRQ definitions for TCC8xxx
- *
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#ifndef __ASM_ARCH_TCC_IRQS_H
-#define __ASM_ARCH_TCC_IRQS_H
-
-#define NR_IRQS 64
-
-/* PIC0 interrupts */
-#define INT_ADMA1       0
-#define INT_BDMA        1
-#define INT_ADMA0       2
-#define INT_GDMA1       3
-#define INT_I2S0RX      4
-#define INT_I2S0TX      5
-#define INT_TC          6
-#define INT_UART0       7
-#define INT_USBD        8
-#define INT_SPI0TX      9
-#define INT_UDMA        10
-#define INT_LIRQ        11
-#define INT_GDMA2       12
-#define INT_GDMA0       13
-#define INT_TC32        14
-#define INT_LCD         15
-#define INT_ADC         16
-#define INT_I2C         17
-#define INT_RTCP        18
-#define INT_RTCA        19
-#define INT_NFC         20
-#define INT_SD0         21
-#define INT_GSB0        22
-#define INT_PK          23
-#define INT_USBH0       24
-#define INT_USBH1       25
-#define INT_G2D         26
-#define INT_ECC         27
-#define INT_SPI0RX      28
-#define INT_UART1       29
-#define INT_MSCL        30
-#define INT_GSB1        31
-/* PIC1 interrupts */
-#define INT_E0          32
-#define INT_E1          33
-#define INT_E2          34
-#define INT_E3          35
-#define INT_E4          36
-#define INT_E5          37
-#define INT_E6          38
-#define INT_E7          39
-#define INT_UART2       40
-#define INT_UART3       41
-#define INT_SPI1TX      42
-#define INT_SPI1RX      43
-#define INT_GSB2        44
-#define INT_SPDIF       45
-#define INT_CDIF        46
-#define INT_VBON        47
-#define INT_VBOFF       48
-#define INT_SD1         49
-#define INT_UART4       50
-#define INT_GDMA3       51
-#define INT_I2S1RX      52
-#define INT_I2S1TX      53
-#define INT_CAN0        54
-#define INT_CAN1        55
-#define INT_GSB3        56
-#define INT_KRST        57
-#define INT_UNUSED      58
-#define INT_SD0D3       59
-#define INT_SD1D3       60
-#define INT_GPS0        61
-#define INT_GPS1        62
-#define INT_GPS2        63
-
-#endif  /* ASM_ARCH_TCC_IRQS_H */
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h
deleted file mode 100644
index 909e6035d843..000000000000
--- a/arch/arm/plat-tcc/include/mach/system.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Author: <linux@telechips.com>
- * Created: June 10, 2008
- * Description: LINUX SYSTEM FUNCTIONS for TCC83x
- *
- * Copyright (C) 2008-2009 Telechips
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-#include <linux/clk.h>
-
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-
-extern void plat_tcc_reboot(void);
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        plat_tcc_reboot();
-}
-
-#endif
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
deleted file mode 100644
index 1d9428295332..000000000000
--- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
+++ /dev/null
@@ -1,807 +0,0 @@
-/*
- * Telechips TCC8000 register definitions
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPLv2.
- */
-
-#ifndef TCC8K_REGS_H
-#define TCC8K_REGS_H
-
-#include <linux/types.h>
-
-#define EXT_SDRAM_BASE          0x20000000
-#define INT_SRAM_BASE           0x30000000
-#define INT_SRAM_SIZE           SZ_32K
-#define CS0_BASE                0x40000000
-#define CS1_BASE                0x50000000
-#define CS1_SIZE                SZ_64K
-#define CS2_BASE                0x60000000
-#define CS3_BASE                0x70000000
-#define AHB_PERI_BASE           0x80000000
-#define AHB_PERI_SIZE           SZ_64K
-#define APB0_PERI_BASE          0x90000000
-#define APB0_PERI_SIZE          SZ_128K
-#define APB1_PERI_BASE          0x98000000
-#define APB1_PERI_SIZE          SZ_128K
-#define DATA_TCM_BASE           0xa0000000
-#define DATA_TCM_SIZE           SZ_8K
-#define EXT_MEM_CTRL_BASE       0xf0000000
-#define EXT_MEM_CTRL_SIZE       SZ_4K
-
-#define CS1_BASE_VIRT           (void __iomem *)0xf7000000
-#define AHB_PERI_BASE_VIRT      (void __iomem *)0xf4000000
-#define APB0_PERI_BASE_VIRT     (void __iomem *)0xf1000000
-#define APB1_PERI_BASE_VIRT     (void __iomem *)0xf2000000
-#define EXT_MEM_CTRL_BASE_VIRT  (void __iomem *)0xf3000000
-#define INT_SRAM_BASE_VIRT      (void __iomem *)0xf5000000
-#define DATA_TCM_BASE_VIRT      (void __iomem *)0xf6000000
-
-#define __REG(x)     (*((volatile u32 *)(x)))
-
-/* USB Device Controller Registers */
-#define UDC_BASE        (AHB_PERI_BASE_VIRT + 0x8000)
-#define UDC_BASE_PHYS   (AHB_PERI_BASE + 0x8000)
-
-#define UDC_IR_OFFS             0x00
-#define UDC_EIR_OFFS            0x04
-#define UDC_EIER_OFFS           0x08
-#define UDC_FAR_OFFS            0x0c
-#define UDC_FNR_OFFS            0x10
-#define UDC_EDR_OFFS            0x14
-#define UDC_RT_OFFS             0x18
-#define UDC_SSR_OFFS            0x1c
-#define UDC_SCR_OFFS            0x20
-#define UDC_EP0SR_OFFS          0x24
-#define UDC_EP0CR_OFFS          0x28
-
-#define UDC_ESR_OFFS            0x2c
-#define UDC_ECR_OFFS            0x30
-#define UDC_BRCR_OFFS           0x34
-#define UDC_BWCR_OFFS           0x38
-#define UDC_MPR_OFFS            0x3c
-#define UDC_DCR_OFFS            0x40
-#define UDC_DTCR_OFFS           0x44
-#define UDC_DFCR_OFFS           0x48
-#define UDC_DTTCR1_OFFS         0x4c
-#define UDC_DTTCR2_OFFS         0x50
-#define UDC_ESR2_OFFS           0x54
-
-#define UDC_SCR2_OFFS           0x58
-#define UDC_EP0BUF_OFFS         0x60
-#define UDC_EP1BUF_OFFS         0x64
-#define UDC_EP2BUF_OFFS         0x68
-#define UDC_EP3BUF_OFFS         0x6c
-#define UDC_PLICR_OFFS          0xa0
-#define UDC_PCR_OFFS            0xa4
-
-#define UDC_UPCR0_OFFS          0xc8
-#define UDC_UPCR1_OFFS          0xcc
-#define UDC_UPCR2_OFFS          0xd0
-#define UDC_UPCR3_OFFS          0xd4
-
-/* Bits in UDC_EIR */
-#define UDC_EIR_EP0I            (1 << 0)
-#define UDC_EIR_EP1I            (1 << 1)
-#define UDC_EIR_EP2I            (1 << 2)
-#define UDC_EIR_EP3I            (1 << 3)
-#define UDC_EIR_EPI_MASK        0x0f
-
-/* Bits in UDC_EIER */
-#define UDC_EIER_EP0IE          (1 << 0)
-#define UDC_EIER_EP1IE          (1 << 1)
-#define UDC_EIER_EP2IE          (1 << 2)
-#define UDC_EIER_EP3IE          (1 << 3)
-
-/* Bits in UDC_FNR */
-#define UDC_FNR_FN_MASK         0x7ff
-#define UDC_FNR_SM              (1 << 13)
-#define UDC_FNR_FTL             (1 << 14)
-
-/* Bits in UDC_SSR */
-#define UDC_SSR_HFRES           (1 << 0)
-#define UDC_SSR_HFSUSP          (1 << 1)
-#define UDC_SSR_HFRM            (1 << 2)
-#define UDC_SSR_SDE             (1 << 3)
-#define UDC_SSR_HSP             (1 << 4)
-#define UDC_SSR_DM              (1 << 5)
-#define UDC_SSR_DP              (1 << 6)
-#define UDC_SSR_TBM             (1 << 7)
-#define UDC_SSR_VBON            (1 << 8)
-#define UDC_SSR_VBOFF           (1 << 9)
-#define UDC_SSR_EOERR           (1 << 10)
-#define UDC_SSR_DCERR           (1 << 11)
-#define UDC_SSR_TCERR           (1 << 12)
-#define UDC_SSR_BSERR           (1 << 13)
-#define UDC_SSR_TMERR           (1 << 14)
-#define UDC_SSR_BAERR           (1 << 15)
-
-/* Bits in UDC_SCR */
-#define UDC_SCR_HRESE           (1 << 0)
-#define UDC_SCR_HSSPE           (1 << 1)
-#define UDC_SCR_RRDE            (1 << 5)
-#define UDC_SCR_SPDEN           (1 << 6)
-#define UDC_SCR_DIEN            (1 << 12)
-
-/* Bits in UDC_EP0SR */
-#define UDC_EP0SR_RSR           (1 << 0)
-#define UDC_EP0SR_TST           (1 << 1)
-#define UDC_EP0SR_SHT           (1 << 4)
-#define UDC_EP0SR_LWO           (1 << 6)
-
-/* Bits in UDC_EP0CR */
-#define UDC_EP0CR_ESS           (1 << 1)
-
-/* Bits in UDC_ESR */
-#define UDC_ESR_RPS             (1 << 0)
-#define UDC_ESR_TPS             (1 << 1)
-#define UDC_ESR_LWO             (1 << 4)
-#define UDC_ESR_FFS             (1 << 6)
-
-/* Bits in UDC_ECR */
-#define UDC_ECR_ESS             (1 << 1)
-#define UDC_ECR_CDP             (1 << 2)
-
-#define UDC_ECR_FLUSH           (1 << 6)
-#define UDC_ECR_DUEN            (1 << 7)
-
-/* Bits in UDC_UPCR0 */
-#define UDC_UPCR0_VBD           (1 << 1)
-#define UDC_UPCR0_VBDS          (1 << 6)
-#define UDC_UPCR0_RCD_12        (0x0 << 9)
-#define UDC_UPCR0_RCD_24        (0x1 << 9)
-#define UDC_UPCR0_RCD_48        (0x2 << 9)
-#define UDC_UPCR0_RCS_EXT       (0x1 << 11)
-#define UDC_UPCR0_RCS_XTAL      (0x0 << 11)
-
-/* Bits in UDC_UPCR1 */
-#define UDC_UPCR1_CDT(x)        ((x) << 0)
-#define UDC_UPCR1_OTGT(x)       ((x) << 3)
-#define UDC_UPCR1_SQRXT(x)      ((x) << 8)
-#define UDC_UPCR1_TXFSLST(x)    ((x) << 12)
-
-/* Bits in UDC_UPCR2 */
-#define UDC_UPCR2_TP            (1 << 0)
-#define UDC_UPCR2_TXRT(x)       ((x) << 2)
-#define UDC_UPCR2_TXVRT(x)      ((x) << 5)
-#define UDC_UPCR2_OPMODE(x)     ((x) << 9)
-#define UDC_UPCR2_XCVRSEL(x)    ((x) << 12)
-#define UDC_UPCR2_TM            (1 << 14)
-
-/* USB Host Controller registers */
-#define USBH0_BASE      (AHB_PERI_BASE_VIRT + 0xb000)
-#define USBH1_BASE      (AHB_PERI_BASE_VIRT + 0xb800)
-
-#define OHCI_INT_ENABLE_OFFS    0x10
-
-#define RH_DESCRIPTOR_A_OFFS    0x48
-#define RH_DESCRIPTOR_B_OFFS    0x4c
-
-#define USBHTCFG0_OFFS          0x100
-#define USBHHCFG0_OFFS          0x104
-#define USBHHCFG1_OFFS          0x104
-
-/* DMA controller registers */
-#define DMAC0_BASE      (AHB_PERI_BASE + 0x4000)
-#define DMAC1_BASE      (AHB_PERI_BASE + 0xa000)
-#define DMAC2_BASE      (AHB_PERI_BASE + 0x4800)
-#define DMAC3_BASE      (AHB_PERI_BASE + 0xa800)
-
-#define DMAC_CH_OFFSET(ch)      (ch * 0x30)
-
-#define ST_SADR_OFFS            0x00
-#define SPARAM_OFFS             0x04
-#define C_SADR_OFFS             0x0c
-#define ST_DADR_OFFS            0x10
-#define DPARAM_OFFS             0x14
-#define C_DADR_OFFS             0x1c
-#define HCOUNT_OFFS             0x20
-#define CHCTRL_OFFS             0x24
-#define RPTCTRL_OFFS            0x28
-#define EXTREQ_A_OFFS           0x2c
-
-/* Bits in CHCTRL register */
-#define CHCTRL_EN               (1 << 0)
-
-#define CHCTRL_IEN              (1 << 2)
-#define CHCTRL_FLAG             (1 << 3)
-#define CHCTRL_WSIZE8           (0 << 4)
-#define CHCTRL_WSIZE16          (1 << 4)
-#define CHCTRL_WSIZE32          (2 << 4)
-
-#define CHCTRL_BSIZE1           (0 << 6)
-#define CHCTRL_BSIZE2           (1 << 6)
-#define CHCTRL_BSIZE4           (2 << 6)
-#define CHCTRL_BSIZE8           (3 << 6)
-
-#define CHCTRL_TYPE_SINGLE_E    (0 << 8)
-#define CHCTRL_TYPE_HW          (1 << 8)
-#define CHCTRL_TYPE_SW          (2 << 8)
-#define CHCTRL_TYPE_SINGLE_L    (3 << 8)
-
-#define CHCTRL_BST              (1 << 10)
-
-/* Use DMA controller 0, channel 2 for USB */
-#define USB_DMA_BASE            (DMAC0_BASE + DMAC_CH_OFFSET(2))
-
-/* NAND flash controller registers */
-#define NFC_BASE        (AHB_PERI_BASE_VIRT + 0xd000)
-#define NFC_BASE_PHYS   (AHB_PERI_BASE + 0xd000)
-
-#define NFC_CMD_OFFS            0x00
-#define NFC_LADDR_OFFS          0x04
-#define NFC_BADDR_OFFS          0x08
-#define NFC_SADDR_OFFS          0x0c
-#define NFC_WDATA_OFFS          0x10
-#define NFC_LDATA_OFFS          0x20
-#define NFC_SDATA_OFFS          0x40
-#define NFC_CTRL_OFFS           0x50
-#define NFC_PSTART_OFFS         0x54
-#define NFC_RSTART_OFFS         0x58
-#define NFC_DSIZE_OFFS          0x5c
-#define NFC_IREQ_OFFS           0x60
-#define NFC_RST_OFFS            0x64
-#define NFC_CTRL1_OFFS          0x68
-#define NFC_MDATA_OFFS          0x70
-
-#define NFC_WDATA_PHYS_ADDR     (NFC_BASE_PHYS + NFC_WDATA_OFFS)
-
-/* Bits in NFC_CTRL */
-#define NFC_CTRL_BHLD_MASK      (0xf << 0)
-#define NFC_CTRL_BPW_MASK       (0xf << 4)
-#define NFC_CTRL_BSTP_MASK      (0xf << 8)
-#define NFC_CTRL_CADDR_MASK     (0x7 << 12)
-#define NFC_CTRL_CADDR_1        (0x0 << 12)
-#define NFC_CTRL_CADDR_2        (0x1 << 12)
-#define NFC_CTRL_CADDR_3        (0x2 << 12)
-#define NFC_CTRL_CADDR_4        (0x3 << 12)
-#define NFC_CTRL_CADDR_5        (0x4 << 12)
-#define NFC_CTRL_MSK            (1 << 15)
-#define NFC_CTRL_PSIZE256       (0 << 16)
-#define NFC_CTRL_PSIZE512       (1 << 16)
-#define NFC_CTRL_PSIZE1024      (2 << 16)
-#define NFC_CTRL_PSIZE2048      (3 << 16)
-#define NFC_CTRL_PSIZE4096      (4 << 16)
-#define NFC_CTRL_PSIZE_MASK     (7 << 16)
-#define NFC_CTRL_BSIZE1         (0 << 19)
-#define NFC_CTRL_BSIZE2         (1 << 19)
-#define NFC_CTRL_BSIZE4         (2 << 19)
-#define NFC_CTRL_BSIZE8         (3 << 19)
-#define NFC_CTRL_BSIZE_MASK     (3 << 19)
-#define NFC_CTRL_RDY            (1 << 21)
-#define NFC_CTRL_CS0SEL         (1 << 22)
-#define NFC_CTRL_CS1SEL         (1 << 23)
-#define NFC_CTRL_CS2SEL         (1 << 24)
-#define NFC_CTRL_CS3SEL         (1 << 25)
-#define NFC_CTRL_CSMASK         (0xf << 22)
-#define NFC_CTRL_BW             (1 << 26)
-#define NFC_CTRL_FS             (1 << 27)
-#define NFC_CTRL_DEN            (1 << 28)
-#define NFC_CTRL_READ_IEN       (1 << 29)
-#define NFC_CTRL_PROG_IEN       (1 << 30)
-#define NFC_CTRL_RDY_IEN        (1 << 31)
-
-/* Bits in NFC_IREQ */
-#define NFC_IREQ_IRQ0           (1 << 0)
-#define NFC_IREQ_IRQ1           (1 << 1)
-#define NFC_IREQ_IRQ2           (1 << 2)
-
-#define NFC_IREQ_FLAG0          (1 << 4)
-#define NFC_IREQ_FLAG1          (1 << 5)
-#define NFC_IREQ_FLAG2          (1 << 6)
-
-/* MMC controller registers */
-#define MMC0_BASE       (AHB_PERI_BASE_VIRT + 0xe000)
-#define MMC1_BASE       (AHB_PERI_BASE_VIRT + 0xe800)
-
-/* UART base addresses */
-
-#define UART0_BASE      (APB0_PERI_BASE_VIRT + 0x07000)
-#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000)
-#define UART1_BASE      (APB0_PERI_BASE_VIRT + 0x08000)
-#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000)
-#define UART2_BASE      (APB0_PERI_BASE_VIRT + 0x09000)
-#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000)
-#define UART3_BASE      (APB0_PERI_BASE_VIRT + 0x0a000)
-#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000)
-#define UART4_BASE      (APB0_PERI_BASE_VIRT + 0x15000)
-#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000)
-
-#define UART_BASE       UART0_BASE
-#define UART_BASE_PHYS  UART0_BASE_PHYS
-
-/* ECC controller */
-#define ECC_CTR_BASE    (APB0_PERI_BASE_VIRT + 0xd000)
-
-#define ECC_CTRL_OFFS           0x00
-#define ECC_BASE_OFFS           0x04
-#define ECC_MASK_OFFS           0x08
-#define ECC_CLEAR_OFFS          0x0c
-#define ECC4_0_OFFS             0x10
-#define ECC4_1_OFFS             0x14
-
-#define ECC_EADDR0_OFFS         0x50
-
-#define ECC_ERRNUM_OFFS         0x90
-#define ECC_IREQ_OFFS           0x94
-
-/* Bits in ECC_CTRL */
-#define ECC_CTRL_ECC4_DIEN      (1 << 28)
-#define ECC_CTRL_ECC8_DIEN      (1 << 29)
-#define ECC_CTRL_ECC12_DIEN     (1 << 30)
-#define ECC_CTRL_ECC_DISABLE    0x0
-#define ECC_CTRL_ECC_SLC_ENC    0x8
-#define ECC_CTRL_ECC_SLC_DEC    0x9
-#define ECC_CTRL_ECC4_ENC       0xa
-#define ECC_CTRL_ECC4_DEC       0xb
-#define ECC_CTRL_ECC8_ENC       0xc
-#define ECC_CTRL_ECC8_DEC       0xd
-#define ECC_CTRL_ECC12_ENC      0xe
-#define ECC_CTRL_ECC12_DEC      0xf
-
-/* Bits in ECC_IREQ */
-#define ECC_IREQ_E4DI           (1 << 4)
-
-#define ECC_IREQ_E4DF           (1 << 20)
-#define ECC_IREQ_E4EF           (1 << 21)
-
-/* Interrupt controller */
-
-#define PIC0_BASE       (APB1_PERI_BASE_VIRT + 0x3000)
-#define PIC0_BASE_PHYS  (APB1_PERI_BASE + 0x3000)
-
-#define PIC0_IEN_OFFS           0x00
-#define PIC0_CREQ_OFFS          0x04
-#define PIC0_IREQ_OFFS          0x08
-#define PIC0_IRQSEL_OFFS        0x0c
-#define PIC0_SRC_OFFS           0x10
-#define PIC0_MREQ_OFFS          0x14
-#define PIC0_TSTREQ_OFFS        0x18
-#define PIC0_POL_OFFS           0x1c
-#define PIC0_IRQ_OFFS           0x20
-#define PIC0_FIQ_OFFS           0x24
-#define PIC0_MIRQ_OFFS          0x28
-#define PIC0_MFIQ_OFFS          0x2c
-#define PIC0_TMODE_OFFS         0x30
-#define PIC0_SYNC_OFFS          0x34
-#define PIC0_WKUP_OFFS          0x38
-#define PIC0_TMODEA_OFFS        0x3c
-#define PIC0_INTOEN_OFFS        0x40
-#define PIC0_MEN0_OFFS          0x44
-#define PIC0_MEN_OFFS           0x48
-
-#define PIC0_IEN                __REG(PIC0_BASE + PIC0_IEN_OFFS)
-#define PIC0_IEN_PHYS           __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS)
-#define PIC0_CREQ               __REG(PIC0_BASE + PIC0_CREQ_OFFS)
-#define PIC0_CREQ_PHYS          __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS)
-#define PIC0_IREQ               __REG(PIC0_BASE + PIC0_IREQ_OFFS)
-#define PIC0_IRQSEL             __REG(PIC0_BASE + PIC0_IRQSEL_OFFS)
-#define PIC0_IRQSEL_PHYS        __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS)
-#define PIC0_SRC                __REG(PIC0_BASE + PIC0_SRC_OFFS)
-#define PIC0_MREQ               __REG(PIC0_BASE + PIC0_MREQ_OFFS)
-#define PIC0_TSTREQ             __REG(PIC0_BASE + PIC0_TSTREQ_OFFS)
-#define PIC0_POL                __REG(PIC0_BASE + PIC0_POL_OFFS)
-#define PIC0_IRQ                __REG(PIC0_BASE + PIC0_IRQ_OFFS)
-#define PIC0_FIQ                __REG(PIC0_BASE + PIC0_FIQ_OFFS)
-#define PIC0_MIRQ               __REG(PIC0_BASE + PIC0_MIRQ_OFFS)
-#define PIC0_MFIQ               __REG(PIC0_BASE + PIC0_MFIQ_OFFS)
-#define PIC0_TMODE              __REG(PIC0_BASE + PIC0_TMODE_OFFS)
-#define PIC0_TMODE_PHYS         __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS)
-#define PIC0_SYNC               __REG(PIC0_BASE + PIC0_SYNC_OFFS)
-#define PIC0_WKUP               __REG(PIC0_BASE + PIC0_WKUP_OFFS)
-#define PIC0_TMODEA             __REG(PIC0_BASE + PIC0_TMODEA_OFFS)
-#define PIC0_INTOEN             __REG(PIC0_BASE + PIC0_INTOEN_OFFS)
-#define PIC0_MEN0               __REG(PIC0_BASE + PIC0_MEN0_OFFS)
-#define PIC0_MEN                __REG(PIC0_BASE + PIC0_MEN_OFFS)
-
-#define PIC1_BASE       (APB1_PERI_BASE_VIRT + 0x3080)
-
-#define PIC1_IEN_OFFS           0x00
-#define PIC1_CREQ_OFFS          0x04
-#define PIC1_IREQ_OFFS          0x08
-#define PIC1_IRQSEL_OFFS        0x0c
-#define PIC1_SRC_OFFS           0x10
-#define PIC1_MREQ_OFFS          0x14
-#define PIC1_TSTREQ_OFFS        0x18
-#define PIC1_POL_OFFS           0x1c
-#define PIC1_IRQ_OFFS           0x20
-#define PIC1_FIQ_OFFS           0x24
-#define PIC1_MIRQ_OFFS          0x28
-#define PIC1_MFIQ_OFFS          0x2c
-#define PIC1_TMODE_OFFS         0x30
-#define PIC1_SYNC_OFFS          0x34
-#define PIC1_WKUP_OFFS          0x38
-#define PIC1_TMODEA_OFFS        0x3c
-#define PIC1_INTOEN_OFFS        0x40
-#define PIC1_MEN1_OFFS          0x44
-#define PIC1_MEN_OFFS           0x48
-
-#define PIC1_IEN        __REG(PIC1_BASE + PIC1_IEN_OFFS)
-#define PIC1_CREQ       __REG(PIC1_BASE + PIC1_CREQ_OFFS)
-#define PIC1_IREQ       __REG(PIC1_BASE + PIC1_IREQ_OFFS)
-#define PIC1_IRQSEL     __REG(PIC1_BASE + PIC1_IRQSEL_OFFS)
-#define PIC1_SRC        __REG(PIC1_BASE + PIC1_SRC_OFFS)
-#define PIC1_MREQ       __REG(PIC1_BASE + PIC1_MREQ_OFFS)
-#define PIC1_TSTREQ     __REG(PIC1_BASE + PIC1_TSTREQ_OFFS)
-#define PIC1_POL        __REG(PIC1_BASE + PIC1_POL_OFFS)
-#define PIC1_IRQ        __REG(PIC1_BASE + PIC1_IRQ_OFFS)
-#define PIC1_FIQ        __REG(PIC1_BASE + PIC1_FIQ_OFFS)
-#define PIC1_MIRQ       __REG(PIC1_BASE + PIC1_MIRQ_OFFS)
-#define PIC1_MFIQ       __REG(PIC1_BASE + PIC1_MFIQ_OFFS)
-#define PIC1_TMODE      __REG(PIC1_BASE + PIC1_TMODE_OFFS)
-#define PIC1_SYNC       __REG(PIC1_BASE + PIC1_SYNC_OFFS)
-#define PIC1_WKUP       __REG(PIC1_BASE + PIC1_WKUP_OFFS)
-#define PIC1_TMODEA     __REG(PIC1_BASE + PIC1_TMODEA_OFFS)
-#define PIC1_INTOEN     __REG(PIC1_BASE + PIC1_INTOEN_OFFS)
-#define PIC1_MEN1       __REG(PIC1_BASE + PIC1_MEN1_OFFS)
-#define PIC1_MEN        __REG(PIC1_BASE + PIC1_MEN_OFFS)
-
-/* Timer registers */
-#define TIMER_BASE              (APB1_PERI_BASE_VIRT + 0x4000)
-#define TIMER_BASE_PHYS         (APB1_PERI_BASE + 0x4000)
-
-#define TWDCFG_OFFS             0x70
-
-#define TC32EN_OFFS             0x80
-#define TC32LDV_OFFS            0x84
-#define TC32CMP0_OFFS           0x88
-#define TC32CMP1_OFFS           0x8c
-#define TC32PCNT_OFFS           0x90
-#define TC32MCNT_OFFS           0x94
-#define TC32IRQ_OFFS            0x98
-
-/* Bits in TC32EN */
-#define TC32EN_PRESCALE_MASK    0x00ffffff
-#define TC32EN_ENABLE           (1 << 24)
-#define TC32EN_LOADZERO         (1 << 25)
-#define TC32EN_STOPMODE         (1 << 26)
-#define TC32EN_LDM0             (1 << 28)
-#define TC32EN_LDM1             (1 << 29)
-
-/* Bits in TC32IRQ */
-#define TC32IRQ_MSTAT_MASK      0x0000001f
-#define TC32IRQ_RSTAT_MASK      (0x1f << 8)
-#define TC32IRQ_IRQEN0          (1 << 16)
-#define TC32IRQ_IRQEN1          (1 << 17)
-#define TC32IRQ_IRQEN2          (1 << 18)
-#define TC32IRQ_IRQEN3          (1 << 19)
-#define TC32IRQ_IRQEN4          (1 << 20)
-#define TC32IRQ_RSYNC           (1 << 30)
-#define TC32IRQ_IRQCLR          (1 << 31)
-
-/* GPIO registers */
-#define GPIOPD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPD_DAT_OFFS         0x00
-#define GPIOPD_DOE_OFFS         0x04
-#define GPIOPD_FS0_OFFS         0x08
-#define GPIOPD_FS1_OFFS         0x0c
-#define GPIOPD_FS2_OFFS         0x10
-#define GPIOPD_RPU_OFFS         0x30
-#define GPIOPD_RPD_OFFS         0x34
-#define GPIOPD_DV0_OFFS         0x38
-#define GPIOPD_DV1_OFFS         0x3c
-
-#define GPIOPS_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPS_DAT_OFFS         0x40
-#define GPIOPS_DOE_OFFS         0x44
-#define GPIOPS_FS0_OFFS         0x48
-#define GPIOPS_FS1_OFFS         0x4c
-#define GPIOPS_FS2_OFFS         0x50
-#define GPIOPS_FS3_OFFS         0x54
-#define GPIOPS_RPU_OFFS         0x70
-#define GPIOPS_RPD_OFFS         0x74
-#define GPIOPS_DV0_OFFS         0x78
-#define GPIOPS_DV1_OFFS         0x7c
-
-#define GPIOPS_FS1_SDH0_BITS    0x000000ff
-#define GPIOPS_FS1_SDH1_BITS    0x0000ff00
-
-#define GPIOPU_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPU_DAT_OFFS         0x80
-#define GPIOPU_DOE_OFFS         0x84
-#define GPIOPU_FS0_OFFS         0x88
-#define GPIOPU_FS1_OFFS         0x8c
-#define GPIOPU_FS2_OFFS         0x90
-#define GPIOPU_RPU_OFFS         0xb0
-#define GPIOPU_RPD_OFFS         0xb4
-#define GPIOPU_DV0_OFFS         0xb8
-#define GPIOPU_DV1_OFFS         0xbc
-
-#define GPIOPU_FS0_TXD0         (1 << 0)
-#define GPIOPU_FS0_RXD0         (1 << 1)
-#define GPIOPU_FS0_CTS0         (1 << 2)
-#define GPIOPU_FS0_RTS0         (1 << 3)
-#define GPIOPU_FS0_TXD1         (1 << 4)
-#define GPIOPU_FS0_RXD1         (1 << 5)
-#define GPIOPU_FS0_CTS1         (1 << 6)
-#define GPIOPU_FS0_RTS1         (1 << 7)
-#define GPIOPU_FS0_TXD2         (1 << 8)
-#define GPIOPU_FS0_RXD2         (1 << 9)
-#define GPIOPU_FS0_CTS2         (1 << 10)
-#define GPIOPU_FS0_RTS2         (1 << 11)
-#define GPIOPU_FS0_TXD3         (1 << 12)
-#define GPIOPU_FS0_RXD3         (1 << 13)
-#define GPIOPU_FS0_CTS3         (1 << 14)
-#define GPIOPU_FS0_RTS3         (1 << 15)
-#define GPIOPU_FS0_TXD4         (1 << 16)
-#define GPIOPU_FS0_RXD4         (1 << 17)
-#define GPIOPU_FS0_CTS4         (1 << 18)
-#define GPIOPU_FS0_RTS4         (1 << 19)
-
-#define GPIOFC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOFC_DAT_OFFS         0xc0
-#define GPIOFC_DOE_OFFS         0xc4
-#define GPIOFC_FS0_OFFS         0xc8
-#define GPIOFC_FS1_OFFS         0xcc
-#define GPIOFC_FS2_OFFS         0xd0
-#define GPIOFC_FS3_OFFS         0xd4
-#define GPIOFC_RPU_OFFS         0xf0
-#define GPIOFC_RPD_OFFS         0xf4
-#define GPIOFC_DV0_OFFS         0xf8
-#define GPIOFC_DV1_OFFS         0xfc
-
-#define GPIOFD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOFD_DAT_OFFS         0x100
-#define GPIOFD_DOE_OFFS         0x104
-#define GPIOFD_FS0_OFFS         0x108
-#define GPIOFD_FS1_OFFS         0x10c
-#define GPIOFD_FS2_OFFS         0x110
-#define GPIOFD_RPU_OFFS         0x130
-#define GPIOFD_RPD_OFFS         0x134
-#define GPIOFD_DV0_OFFS         0x138
-#define GPIOFD_DV1_OFFS         0x13c
-
-#define GPIOLC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOLC_DAT_OFFS         0x140
-#define GPIOLC_DOE_OFFS         0x144
-#define GPIOLC_FS0_OFFS         0x148
-#define GPIOLC_FS1_OFFS         0x14c
-#define GPIOLC_RPU_OFFS         0x170
-#define GPIOLC_RPD_OFFS         0x174
-#define GPIOLC_DV0_OFFS         0x178
-#define GPIOLC_DV1_OFFS         0x17c
-
-#define GPIOLD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOLD_DAT_OFFS         0x180
-#define GPIOLD_DOE_OFFS         0x184
-#define GPIOLD_FS0_OFFS         0x188
-#define GPIOLD_FS1_OFFS         0x18c
-#define GPIOLD_FS2_OFFS         0x190
-#define GPIOLD_RPU_OFFS         0x1b0
-#define GPIOLD_RPD_OFFS         0x1b4
-#define GPIOLD_DV0_OFFS         0x1b8
-#define GPIOLD_DV1_OFFS         0x1bc
-
-#define GPIOAD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOAD_DAT_OFFS         0x1c0
-#define GPIOAD_DOE_OFFS         0x1c4
-#define GPIOAD_FS0_OFFS         0x1c8
-#define GPIOAD_RPU_OFFS         0x1f0
-#define GPIOAD_RPD_OFFS         0x1f4
-#define GPIOAD_DV0_OFFS         0x1f8
-#define GPIOAD_DV1_OFFS         0x1fc
-
-#define GPIOXC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOXC_DAT_OFFS         0x200
-#define GPIOXC_DOE_OFFS         0x204
-#define GPIOXC_FS0_OFFS         0x208
-#define GPIOXC_RPU_OFFS         0x230
-#define GPIOXC_RPD_OFFS         0x234
-#define GPIOXC_DV0_OFFS         0x238
-#define GPIOXC_DV1_OFFS         0x23c
-
-#define GPIOXC_FS0              __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS)
-
-#define GPIOXC_FS0_CS0          (1 << 26)
-#define GPIOXC_FS0_CS1          (1 << 27)
-
-#define GPIOXD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOXD_DAT_OFFS         0x240
-#define GPIOXD_FS0_OFFS         0x248
-#define GPIOXD_RPU_OFFS         0x270
-#define GPIOXD_RPD_OFFS         0x274
-#define GPIOXD_DV0_OFFS         0x278
-#define GPIOXD_DV1_OFFS         0x27c
-
-#define GPIOPK_BASE             (APB1_PERI_BASE_VIRT + 0x1c000)
-
-#define GPIOPK_RST_OFFS         0x008
-#define GPIOPK_DAT_OFFS         0x100
-#define GPIOPK_DOE_OFFS         0x104
-#define GPIOPK_FS0_OFFS         0x108
-#define GPIOPK_FS1_OFFS         0x10c
-#define GPIOPK_FS2_OFFS         0x110
-#define GPIOPK_IRQST_OFFS       0x210
-#define GPIOPK_IRQEN_OFFS       0x214
-#define GPIOPK_IRQPOL_OFFS      0x218
-#define GPIOPK_IRQTM0_OFFS      0x21c
-#define GPIOPK_IRQTM1_OFFS      0x220
-#define GPIOPK_CTL_OFFS         0x22c
-
-#define PMGPIO_BASE             (APB1_PERI_BASE_VIRT + 0x10000)
-#define BACKUP_RAM_BASE         PMGPIO_BASE
-
-#define PMGPIO_DAT_OFFS         0x800
-#define PMGPIO_DOE_OFFS         0x804
-#define PMGPIO_FS0_OFFS         0x808
-#define PMGPIO_RPU_OFFS         0x810
-#define PMGPIO_RPD_OFFS         0x814
-#define PMGPIO_DV0_OFFS         0x818
-#define PMGPIO_DV1_OFFS         0x81c
-#define PMGPIO_EE0_OFFS         0x820
-#define PMGPIO_EE1_OFFS         0x824
-#define PMGPIO_CTL_OFFS         0x828
-#define PMGPIO_DI_OFFS          0x82c
-#define PMGPIO_STR_OFFS         0x830
-#define PMGPIO_STF_OFFS         0x834
-#define PMGPIO_POL_OFFS         0x838
-#define PMGPIO_APB_OFFS         0x800
-
-/* Clock controller registers */
-#define CKC_BASE        ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000))
-
-#define CLKCTRL_OFFS            0x00
-#define PLL0CFG_OFFS            0x04
-#define PLL1CFG_OFFS            0x08
-#define CLKDIVC0_OFFS           0x0c
-
-#define BCLKCTR0_OFFS           0x14
-#define SWRESET0_OFFS           0x18
-
-#define BCLKCTR1_OFFS           0x60
-#define SWRESET1_OFFS           0x64
-#define PWDCTL_OFFS             0x68
-#define PLL2CFG_OFFS            0x6c
-#define CLKDIVC1_OFFS           0x70
-
-#define ACLKREF_OFFS            0x80
-#define ACLKI2C_OFFS            0x84
-#define ACLKSPI0_OFFS           0x88
-#define ACLKSPI1_OFFS           0x8c
-#define ACLKUART0_OFFS          0x90
-#define ACLKUART1_OFFS          0x94
-#define ACLKUART2_OFFS          0x98
-#define ACLKUART3_OFFS          0x9c
-#define ACLKUART4_OFFS          0xa0
-#define ACLKTCT_OFFS            0xa4
-#define ACLKTCX_OFFS            0xa8
-#define ACLKTCZ_OFFS            0xac
-#define ACLKADC_OFFS            0xb0
-#define ACLKDAI0_OFFS           0xb4
-#define ACLKDAI1_OFFS           0xb8
-#define ACLKLCD_OFFS            0xbc
-#define ACLKSPDIF_OFFS          0xc0
-#define ACLKUSBH_OFFS           0xc4
-#define ACLKSDH0_OFFS           0xc8
-#define ACLKSDH1_OFFS           0xcc
-#define ACLKC3DEC_OFFS          0xd0
-#define ACLKEXT_OFFS            0xd4
-#define ACLKCAN0_OFFS           0xd8
-#define ACLKCAN1_OFFS           0xdc
-#define ACLKGSB0_OFFS           0xe0
-#define ACLKGSB1_OFFS           0xe4
-#define ACLKGSB2_OFFS           0xe8
-#define ACLKGSB3_OFFS           0xec
-
-#define PLLxCFG_PD              (1 << 31)
-
-/* CLKCTRL bits */
-#define CLKCTRL_XE              (1 << 31)
-
-/* CLKDIVCx bits */
-#define CLKDIVC0_XTE            (1 << 7)
-#define CLKDIVC0_XE             (1 << 15)
-#define CLKDIVC0_P1E            (1 << 23)
-#define CLKDIVC0_P0E            (1 << 31)
-
-#define CLKDIVC1_P2E            (1 << 7)
-
-/* BCLKCTR0 clock bits */
-#define BCLKCTR0_USBD           (1 << 4)
-#define BCLKCTR0_ECC            (1 << 9)
-#define BCLKCTR0_USBH0          (1 << 11)
-#define BCLKCTR0_NFC            (1 << 16)
-
-/* BCLKCTR1 clock bits */
-#define BCLKCTR1_USBH1          (1 << 20)
-
-/* SWRESET0 bits */
-#define SWRESET0_USBD           (1 << 4)
-#define SWRESET0_USBH0          (1 << 11)
-
-/* SWRESET1 bits */
-#define SWRESET1_USBH1          (1 << 20)
-
-/* System clock sources.
- * Note: These are the clock sources that serve as parents for
- * all other clocks. They have no parents themselves.
- *
- * These values are used for struct clk->root_id. All clocks
- * that are not system clock sources have this value set to
- * CLK_SRC_NOROOT.
- * The values for system clocks start with CLK_SRC_PLL0 == 0
- * because this gives us exactly the values needed for the lower
- * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is
- * defined as -1 to not disturb the order.
- */
-enum root_clks {
-        CLK_SRC_NOROOT = -1,
-        CLK_SRC_PLL0 = 0,
-        CLK_SRC_PLL1,
-        CLK_SRC_PLL0DIV,
-        CLK_SRC_PLL1DIV,
-        CLK_SRC_XI,
-        CLK_SRC_XIDIV,
-        CLK_SRC_XTI,
-        CLK_SRC_XTIDIV,
-        CLK_SRC_PLL2,
-        CLK_SRC_PLL2DIV,
-        CLK_SRC_PK0,
-        CLK_SRC_PK1,
-        CLK_SRC_PK2,
-        CLK_SRC_PK3,
-        CLK_SRC_PK4,
-        CLK_SRC_48MHZ
-};
-
-#define CLK_SRC_MASK            0xf
-
-/* Bits in ACLK* registers */
-#define ACLK_EN         (1 << 28)
-#define ACLK_SEL_SHIFT          24
-#define ACLK_SEL_MASK           0x0f000000
-#define ACLK_DIV_MASK           0x00000fff
-
-/* System configuration registers */
-
-#define SCFG_BASE               (APB1_PERI_BASE_VIRT + 0x13000)
-
-#define BMI_OFFS                0x00
-#define AHBCON0_OFFS            0x04
-#define APBPWE_OFFS             0x08
-#define DTCMWAIT_OFFS           0x0c
-#define ECCSEL_OFFS             0x10
-#define AHBCON1_OFFS            0x14
-#define SDHCFG_OFFS             0x18
-#define REMAP_OFFS              0x20
-#define LCDSIAE_OFFS            0x24
-#define XMCCFG_OFFS             0xe0
-#define IMCCFG_OFFS             0xe4
-
-/* Values for ECCSEL */
-#define ECCSEL_EXTMEM           0x0
-#define ECCSEL_DTCM             0x1
-#define ECCSEL_INT_SRAM         0x2
-#define ECCSEL_AHB              0x3
-
-/* Bits in XMCCFG */
-#define XMCCFG_NFCE             (1 << 1)
-#define XMCCFG_FDXD             (1 << 2)
-
-/* External memory controller registers */
-
-#define EMC_BASE                EXT_MEM_CTRL_BASE
-
-#define SDCFG_OFFS              0x00
-#define SDFSM_OFFS              0x04
-#define MCFG_OFFS               0x08
-
-#define CSCFG0_OFFS             0x10
-#define CSCFG1_OFFS             0x14
-#define CSCFG2_OFFS             0x18
-#define CSCFG3_OFFS             0x1c
-
-#define MCFG_SDEN               (1 << 4)
-
-#endif /* TCC8K_REGS_H */
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h
deleted file mode 100644
index 057acbe651d9..000000000000
--- a/arch/arm/plat-tcc/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * A definition needed by arch core code.
- *
- */
-#define CLOCK_TICK_RATE         (HZ * 100000UL)
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h
deleted file mode 100644
index 7a3e33a27a30..000000000000
--- a/arch/arm/plat-tcc/include/mach/uncompress.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This file is licensed under the terms of the GPL version 2.
- */
-
-#include <linux/serial_reg.h>
-#include <linux/types.h>
-
-#include <mach/tcc8k-regs.h>
-
-unsigned int system_rev;
-
-#define ID_MASK                 0x7fff
-
-static void putc(int c)
-{
-        u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
-        u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
-
-        while (!(*uart_lsr & UART_LSR_THRE))
-                barrier();
-        *uart_tx = c;
-}
-
-static inline void flush(void)
-{
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
-#define arch_decomp_wdog()
diff --git a/arch/arm/plat-tcc/include/mach/vmalloc.h b/arch/arm/plat-tcc/include/mach/vmalloc.h
deleted file mode 100644
index 99414d9c2b94..000000000000
--- a/arch/arm/plat-tcc/include/mach/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * Author: <linux@telechips.com>
- * Created: June 10, 2008
- *
- * Copyright (C) 2000 Russell King.
- * Copyright (C) 2008-2009 Telechips
- *
- * Licensed under the terms of the GPL v2.
- */
-#define VMALLOC_END     0xf0000000UL
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c
deleted file mode 100644
index cc208fae3e7a..000000000000
--- a/arch/arm/plat-tcc/system.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * System functions for Telechips TCCxxxx SoCs
- *
- * Copyright (C) Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#include <linux/io.h>
-
-#include <mach/tcc8k-regs.h>
-
-/* System reboot */
-void plat_tcc_reboot(void)
-{
-        /* Make sure clocks are on */
-        __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
-
-        /* Enable watchdog reset */
-        __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
-        /* Wait for reset */
-        while(1)
-                ;
-}
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 3d6a4c292cab..b33b74c87232 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -18,41 +18,24 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+#include <linux/kernel.h>
 #include <linux/io.h>
-#include <linux/sched.h>
 
 #include <asm/sched_clock.h>
 #include <plat/sched_clock.h>
 
-static DEFINE_CLOCK_DATA(cd);
 static void __iomem *ctr;
 
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 41ns and a wrap period of about 178s.
- */
-#define SC_MULT         2796202667u
-#define SC_SHIFT        26
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace versatile_read_sched_clock(void)
 {
-        if (ctr) {
-                u32 cyc = readl(ctr);
-                return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
-                                                SC_MULT, SC_SHIFT);
-        } else
-                return 0;
-}
+        if (ctr)
+                return readl(ctr);
 
-static void notrace versatile_update_sched_clock(void)
-{
-        u32 cyc = readl(ctr);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return 0;
 }
 
 void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
 {
         ctr = reg;
-        init_fixed_sched_clock(&cd, versatile_update_sched_clock,
-                               32, rate, SC_MULT, SC_SHIFT);
+        setup_sched_clock(versatile_read_sched_clock, 32, rate);
 }
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 5bdeef969847..f9c9f33f8cbe 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -16,7 +16,7 @@
 # are merged into mainline or have been edited in the machine database
 # within the last 12 months.  References to machine_is_NAME() do not count!
 #
-# Last update: Sat May 7 08:48:24 2011
+# Last update: Tue Dec 6 11:07:38 2011
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -269,7 +269,7 @@ dns323			MACH_DNS323		DNS323			1542
 omap3_beagle            MACH_OMAP3_BEAGLE       OMAP3_BEAGLE            1546
 nokia_n810              MACH_NOKIA_N810         NOKIA_N810              1548
 pcm038                  MACH_PCM038             PCM038                  1551
-ts_x09                  MACH_TS209              TS209                   1565
+ts209                   MACH_TS209              TS209                   1565
 at91cap9adk             MACH_AT91CAP9ADK        AT91CAP9ADK             1566
 mx31moboard             MACH_MX31MOBOARD        MX31MOBOARD             1574
 vision_ep9307           MACH_VISION_EP9307      VISION_EP9307           1578
@@ -321,7 +321,6 @@ lb88rc8480		MACH_LB88RC8480		LB88RC8480		1769
 mx25_3ds                MACH_MX25_3DS           MX25_3DS                1771
 omap3530_lv_som         MACH_OMAP3530_LV_SOM    OMAP3530_LV_SOM         1773
 davinci_da830_evm       MACH_DAVINCI_DA830_EVM  DAVINCI_DA830_EVM       1781
-at572d940hfek           MACH_AT572D940HFEB      AT572D940HFEB           1783
 dove_db                 MACH_DOVE_DB            DOVE_DB                 1788
 overo                   MACH_OVERO              OVERO                   1798
 at2440evb               MACH_AT2440EVB          AT2440EVB               1799
@@ -459,7 +458,7 @@ guruplug		MACH_GURUPLUG		GURUPLUG		2659
 spear310                MACH_SPEAR310           SPEAR310                2660
 spear320                MACH_SPEAR320           SPEAR320                2661
 aquila                  MACH_AQUILA             AQUILA                  2676
-sheeva_esata            MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
+esata_sheevaplug        MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
 msm7x30_surf            MACH_MSM7X30_SURF       MSM7X30_SURF            2679
 ea2478devkit            MACH_EA2478DEVKIT       EA2478DEVKIT            2683
 terastation_wxl         MACH_TERASTATION_WXL    TERASTATION_WXL         2697
@@ -491,380 +490,53 @@ eukrea_cpuimx35sd	MACH_EUKREA_CPUIMX35SD	EUKREA_CPUIMX35SD	2821
 eukrea_cpuimx51sd       MACH_EUKREA_CPUIMX51SD  EUKREA_CPUIMX51SD       2822
 eukrea_cpuimx51         MACH_EUKREA_CPUIMX51    EUKREA_CPUIMX51         2823
 smdkc210                MACH_SMDKC210           SMDKC210                2838
-omap3_braillo           MACH_OMAP3_BRAILLO      OMAP3_BRAILLO           2839
-spyplug                 MACH_SPYPLUG            SPYPLUG                 2840
-ginger                  MACH_GINGER             GINGER                  2841
-tny_t3530               MACH_TNY_T3530          TNY_T3530               2842
 pca102                  MACH_PCA102             PCA102                  2843
-spade                   MACH_SPADE              SPADE                   2844
-mxc25_topaz             MACH_MXC25_TOPAZ        MXC25_TOPAZ             2845
 t5325                   MACH_T5325              T5325                   2846
-gw2361                  MACH_GW2361             GW2361                  2847
-elog                    MACH_ELOG               ELOG                    2848
 income                  MACH_INCOME             INCOME                  2849
-bcm589x                 MACH_BCM589X            BCM589X                 2850
-etna                    MACH_ETNA               ETNA                    2851
-hawks                   MACH_HAWKS              HAWKS                   2852
-meson                   MACH_MESON              MESON                   2853
-xsbase255               MACH_XSBASE255          XSBASE255               2854
-pvm2030                 MACH_PVM2030            PVM2030                 2855
-mioa502                 MACH_MIOA502            MIOA502                 2856
 vvbox_sdorig2           MACH_VVBOX_SDORIG2      VVBOX_SDORIG2           2857
 vvbox_sdlite2           MACH_VVBOX_SDLITE2      VVBOX_SDLITE2           2858
 vvbox_sdpro4            MACH_VVBOX_SDPRO4       VVBOX_SDPRO4            2859
-htc_spv_m700            MACH_HTC_SPV_M700       HTC_SPV_M700            2860
 mx257sx                 MACH_MX257SX            MX257SX                 2861
 goni                    MACH_GONI               GONI                    2862
-msm8x55_svlte_ffa       MACH_MSM8X55_SVLTE_FFA  MSM8X55_SVLTE_FFA       2863
-msm8x55_svlte_surf      MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF      2864
-quickstep               MACH_QUICKSTEP          QUICKSTEP               2865
-dmw96                   MACH_DMW96              DMW96                   2866
-hammerhead              MACH_HAMMERHEAD         HAMMERHEAD              2867
-trident                 MACH_TRIDENT            TRIDENT                 2868
-lightning               MACH_LIGHTNING          LIGHTNING               2869
-iconnect                MACH_ICONNECT           ICONNECT                2870
-autobot                 MACH_AUTOBOT            AUTOBOT                 2871
-coconut                 MACH_COCONUT            COCONUT                 2872
-durian                  MACH_DURIAN             DURIAN                  2873
-cayenne                 MACH_CAYENNE            CAYENNE                 2874
-fuji                    MACH_FUJI               FUJI                    2875
-synology_6282           MACH_SYNOLOGY_6282      SYNOLOGY_6282           2876
-em1sy                   MACH_EM1SY              EM1SY                   2877
-m502                    MACH_M502               M502                    2878
-matrix518               MACH_MATRIX518          MATRIX518               2879
-tiny_gurnard            MACH_TINY_GURNARD       TINY_GURNARD            2880
-spear1310               MACH_SPEAR1310          SPEAR1310               2881
 bv07                    MACH_BV07               BV07                    2882
-mxt_td61                MACH_MXT_TD61           MXT_TD61                2883
 openrd_ultimate         MACH_OPENRD_ULTIMATE    OPENRD_ULTIMATE         2884
 devixp                  MACH_DEVIXP             DEVIXP                  2885
 miccpt                  MACH_MICCPT             MICCPT                  2886
 mic256                  MACH_MIC256             MIC256                  2887
-as1167                  MACH_AS1167             AS1167                  2888
-omap3_ibiza             MACH_OMAP3_IBIZA        OMAP3_IBIZA             2889
 u5500                   MACH_U5500              U5500                   2890
-davinci_picto           MACH_DAVINCI_PICTO      DAVINCI_PICTO           2891
-mecha                   MACH_MECHA              MECHA                   2892
-bubba3                  MACH_BUBBA3             BUBBA3                  2893
-pupitre                 MACH_PUPITRE            PUPITRE                 2894
-tegra_vogue             MACH_TEGRA_VOGUE        TEGRA_VOGUE             2896
-tegra_e1165             MACH_TEGRA_E1165        TEGRA_E1165             2897
-simplenet               MACH_SIMPLENET          SIMPLENET               2898
-ec4350tbm               MACH_EC4350TBM          EC4350TBM               2899
-pec_tc                  MACH_PEC_TC             PEC_TC                  2900
-pec_hc2                 MACH_PEC_HC2            PEC_HC2                 2901
-esl_mobilis_a           MACH_ESL_MOBILIS_A      ESL_MOBILIS_A           2902
-esl_mobilis_b           MACH_ESL_MOBILIS_B      ESL_MOBILIS_B           2903
-esl_wave_a              MACH_ESL_WAVE_A         ESL_WAVE_A              2904
-esl_wave_b              MACH_ESL_WAVE_B         ESL_WAVE_B              2905
-unisense_mmm            MACH_UNISENSE_MMM       UNISENSE_MMM            2906
-blueshark               MACH_BLUESHARK          BLUESHARK               2907
-e10                     MACH_E10                E10                     2908
-app3k_robin             MACH_APP3K_ROBIN        APP3K_ROBIN             2909
-pov15hd                 MACH_POV15HD            POV15HD                 2910
-stella                  MACH_STELLA             STELLA                  2911
 linkstation_lschl       MACH_LINKSTATION_LSCHL  LINKSTATION_LSCHL       2913
-netwalker               MACH_NETWALKER          NETWALKER               2914
-acsx106                 MACH_ACSX106            ACSX106                 2915
-atlas5_c1               MACH_ATLAS5_C1          ATLAS5_C1               2916
-nsb3ast                 MACH_NSB3AST            NSB3AST                 2917
-gnet_slc                MACH_GNET_SLC           GNET_SLC                2918
-af4000                  MACH_AF4000             AF4000                  2919
-ark9431                 MACH_ARK9431            ARK9431                 2920
-fs_s5pc100              MACH_FS_S5PC100         FS_S5PC100              2921
-omap3505nova8           MACH_OMAP3505NOVA8      OMAP3505NOVA8           2922
-omap3621_edp1           MACH_OMAP3621_EDP1      OMAP3621_EDP1           2923
-oratisaes               MACH_ORATISAES          ORATISAES               2924
 smdkv310                MACH_SMDKV310           SMDKV310                2925
-siemens_l0              MACH_SIEMENS_L0         SIEMENS_L0              2926
-ventana                 MACH_VENTANA            VENTANA                 2927
 wm8505_7in_netbook      MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK      2928
-ec4350sdb               MACH_EC4350SDB          EC4350SDB               2929
-mimas                   MACH_MIMAS              MIMAS                   2930
-titan                   MACH_TITAN              TITAN                   2931
 craneboard              MACH_CRANEBOARD         CRANEBOARD              2932
-es2440                  MACH_ES2440             ES2440                  2933
-najay_a9263             MACH_NAJAY_A9263        NAJAY_A9263             2934
-htctornado              MACH_HTCTORNADO         HTCTORNADO              2935
-dimm_mx257              MACH_DIMM_MX257         DIMM_MX257              2936
-jigen301                MACH_JIGEN              JIGEN                   2937
 smdk6450                MACH_SMDK6450           SMDK6450                2938
-meno_qng                MACH_MENO_QNG           MENO_QNG                2939
-ns2416                  MACH_NS2416             NS2416                  2940
-rpc353                  MACH_RPC353             RPC353                  2941
-tq6410                  MACH_TQ6410             TQ6410                  2942
-sky6410                 MACH_SKY6410            SKY6410                 2943
-dynasty                 MACH_DYNASTY            DYNASTY                 2944
-vivo                    MACH_VIVO               VIVO                    2945
-bury_bl7582             MACH_BURY_BL7582        BURY_BL7582             2946
-bury_bps5270            MACH_BURY_BPS5270       BURY_BPS5270            2947
-basi                    MACH_BASI               BASI                    2948
-tn200                   MACH_TN200              TN200                   2949
-c2mmi                   MACH_C2MMI              C2MMI                   2950
-meson_6236m             MACH_MESON_6236M        MESON_6236M             2951
-meson_8626m             MACH_MESON_8626M        MESON_8626M             2952
-tube                    MACH_TUBE               TUBE                    2953
-messina                 MACH_MESSINA            MESSINA                 2954
-mx50_arm2               MACH_MX50_ARM2          MX50_ARM2               2955
-cetus9263               MACH_CETUS9263          CETUS9263               2956
 brownstone              MACH_BROWNSTONE         BROWNSTONE              2957
-vmx25                   MACH_VMX25              VMX25                   2958
-vmx51                   MACH_VMX51              VMX51                   2959
-abacus                  MACH_ABACUS             ABACUS                  2960
-cm4745                  MACH_CM4745             CM4745                  2961
-oratislink              MACH_ORATISLINK         ORATISLINK              2962
-davinci_dm365_dvr       MACH_DAVINCI_DM365_DVR  DAVINCI_DM365_DVR       2963
-netviz                  MACH_NETVIZ             NETVIZ                  2964
 flexibity               MACH_FLEXIBITY          FLEXIBITY               2965
-wlan_computer           MACH_WLAN_COMPUTER      WLAN_COMPUTER           2966
-lpc24xx                 MACH_LPC24XX            LPC24XX                 2967
-spica                   MACH_SPICA              SPICA                   2968
-gpsdisplay              MACH_GPSDISPLAY         GPSDISPLAY              2969
-bipnet                  MACH_BIPNET             BIPNET                  2970
-overo_ctu_inertial      MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL      2971
-davinci_dm355_mmm       MACH_DAVINCI_DM355_MMM  DAVINCI_DM355_MMM       2972
-pc9260_v2               MACH_PC9260_V2          PC9260_V2               2973
-ptx7545                 MACH_PTX7545            PTX7545                 2974
-tm_efdc                 MACH_TM_EFDC            TM_EFDC                 2975
-omap3_waldo1            MACH_OMAP3_WALDO1       OMAP3_WALDO1            2977
-flyer                   MACH_FLYER              FLYER                   2978
-tornado3240             MACH_TORNADO3240        TORNADO3240             2979
-soli_01                 MACH_SOLI_01            SOLI_01                 2980
-omapl138_europalc       MACH_OMAPL138_EUROPALC  OMAPL138_EUROPALC       2981
-helios_v1               MACH_HELIOS_V1          HELIOS_V1               2982
-netspace_lite_v2        MACH_NETSPACE_LITE_V2   NETSPACE_LITE_V2        2983
-ssc                     MACH_SSC                SSC                     2984
-premierwave_en          MACH_PREMIERWAVE_EN     PREMIERWAVE_EN          2985
-wasabi                  MACH_WASABI             WASABI                  2986
 mx50_rdp                MACH_MX50_RDP           MX50_RDP                2988
 universal_c210          MACH_UNIVERSAL_C210     UNIVERSAL_C210          2989
 real6410                MACH_REAL6410           REAL6410                2990
-spx_sakura              MACH_SPX_SAKURA         SPX_SAKURA              2991
-ij3k_2440               MACH_IJ3K_2440          IJ3K_2440               2992
-omap3_bc10              MACH_OMAP3_BC10         OMAP3_BC10              2993
-thebe                   MACH_THEBE              THEBE                   2994
-rv082                   MACH_RV082              RV082                   2995
-armlguest               MACH_ARMLGUEST          ARMLGUEST               2996
-tjinc1000               MACH_TJINC1000          TJINC1000               2997
 dockstar                MACH_DOCKSTAR           DOCKSTAR                2998
-ax8008                  MACH_AX8008             AX8008                  2999
-gnet_sgce               MACH_GNET_SGCE          GNET_SGCE               3000
-pxwnas_500_1000         MACH_PXWNAS_500_1000    PXWNAS_500_1000         3001
-ea20                    MACH_EA20               EA20                    3002
-awm2                    MACH_AWM2               AWM2                    3003
 ti8148evm               MACH_TI8148EVM          TI8148EVM               3004
 seaboard                MACH_SEABOARD           SEABOARD                3005
-linkstation_chlv2       MACH_LINKSTATION_CHLV2  LINKSTATION_CHLV2       3006
-tera_pro2_rack          MACH_TERA_PRO2_RACK     TERA_PRO2_RACK          3007
-rubys                   MACH_RUBYS              RUBYS                   3008
-aquarius                MACH_AQUARIUS           AQUARIUS                3009
 mx53_ard                MACH_MX53_ARD           MX53_ARD                3010
 mx53_smd                MACH_MX53_SMD           MX53_SMD                3011
-lswxl                   MACH_LSWXL              LSWXL                   3012
-dove_avng_v3            MACH_DOVE_AVNG_V3       DOVE_AVNG_V3            3013
-sdi_ess_9263            MACH_SDI_ESS_9263       SDI_ESS_9263            3014
-jocpu550                MACH_JOCPU550           JOCPU550                3015
 msm8x60_rumi3           MACH_MSM8X60_RUMI3      MSM8X60_RUMI3           3016
 msm8x60_ffa             MACH_MSM8X60_FFA        MSM8X60_FFA             3017
-yanomami                MACH_YANOMAMI           YANOMAMI                3018
-gta04                   MACH_GTA04              GTA04                   3019
 cm_a510                 MACH_CM_A510            CM_A510                 3020
-omap3_rfs200            MACH_OMAP3_RFS200       OMAP3_RFS200            3021
-kx33xx                  MACH_KX33XX             KX33XX                  3022
-ptx7510                 MACH_PTX7510            PTX7510                 3023
-top9000                 MACH_TOP9000            TOP9000                 3024
-teenote                 MACH_TEENOTE            TEENOTE                 3025
-ts3                     MACH_TS3                TS3                     3026
-a0                      MACH_A0                 A0                      3027
-fsm9xxx_surf            MACH_FSM9XXX_SURF       FSM9XXX_SURF            3028
-fsm9xxx_ffa             MACH_FSM9XXX_FFA        FSM9XXX_FFA             3029
-frrhwcdma60w            MACH_FRRHWCDMA60W       FRRHWCDMA60W            3030
-remus                   MACH_REMUS              REMUS                   3031
-at91cap7xdk             MACH_AT91CAP7XDK        AT91CAP7XDK             3032
-at91cap7stk             MACH_AT91CAP7STK        AT91CAP7STK             3033
-kt_sbc_sam9_1           MACH_KT_SBC_SAM9_1      KT_SBC_SAM9_1           3034
-armada_xp_db            MACH_ARMADA_XP_DB       ARMADA_XP_DB            3036
-spdm                    MACH_SPDM               SPDM                    3037
-gtib                    MACH_GTIB               GTIB                    3038
-dgm3240                 MACH_DGM3240            DGM3240                 3039
-htcmega                 MACH_HTCMEGA            HTCMEGA                 3041
-tricorder               MACH_TRICORDER          TRICORDER               3042
 tx28                    MACH_TX28               TX28                    3043
-bstbrd                  MACH_BSTBRD             BSTBRD                  3044
-pwb3090                 MACH_PWB3090            PWB3090                 3045
-idea6410                MACH_IDEA6410           IDEA6410                3046
-qbc9263                 MACH_QBC9263            QBC9263                 3047
-borabora                MACH_BORABORA           BORABORA                3048
-valdez                  MACH_VALDEZ             VALDEZ                  3049
-ls9g20                  MACH_LS9G20             LS9G20                  3050
-mios_v1                 MACH_MIOS_V1            MIOS_V1                 3051
-s5pc110_crespo          MACH_S5PC110_CRESPO     S5PC110_CRESPO          3052
-controltek9g20          MACH_CONTROLTEK9G20     CONTROLTEK9G20          3053
-tin307                  MACH_TIN307             TIN307                  3054
-tin510                  MACH_TIN510             TIN510                  3055
-bluecheese              MACH_BLUECHEESE         BLUECHEESE              3057
-tem3x30                 MACH_TEM3X30            TEM3X30                 3058
-harvest_desoto          MACH_HARVEST_DESOTO     HARVEST_DESOTO          3059
-msm8x60_qrdc            MACH_MSM8X60_QRDC       MSM8X60_QRDC            3060
-spear900                MACH_SPEAR900           SPEAR900                3061
 pcontrol_g20            MACH_PCONTROL_G20       PCONTROL_G20            3062
-rdstor                  MACH_RDSTOR             RDSTOR                  3063
-usdloader               MACH_USDLOADER          USDLOADER               3064
-tsoploader              MACH_TSOPLOADER         TSOPLOADER              3065
-kronos                  MACH_KRONOS             KRONOS                  3066
-ffcore                  MACH_FFCORE             FFCORE                  3067
-mone                    MACH_MONE               MONE                    3068
-unit2s                  MACH_UNIT2S             UNIT2S                  3069
-acer_a5                 MACH_ACER_A5            ACER_A5                 3070
-etherpro_isp            MACH_ETHERPRO_ISP       ETHERPRO_ISP            3071
-stretchs7000            MACH_STRETCHS7000       STRETCHS7000            3072
-p87_smartsim            MACH_P87_SMARTSIM       P87_SMARTSIM            3073
-tulip                   MACH_TULIP              TULIP                   3074
-sunflower               MACH_SUNFLOWER          SUNFLOWER               3075
-rib                     MACH_RIB                RIB                     3076
-clod                    MACH_CLOD               CLOD                    3077
-rump                    MACH_RUMP               RUMP                    3078
-tenderloin              MACH_TENDERLOIN         TENDERLOIN              3079
-shortloin               MACH_SHORTLOIN          SHORTLOIN               3080
-antares                 MACH_ANTARES            ANTARES                 3082
-wb40n                   MACH_WB40N              WB40N                   3083
-herring                 MACH_HERRING            HERRING                 3084
-naxy400                 MACH_NAXY400            NAXY400                 3085
-naxy1200                MACH_NAXY1200           NAXY1200                3086
 vpr200                  MACH_VPR200             VPR200                  3087
-bug20                   MACH_BUG20              BUG20                   3088
-goflexnet               MACH_GOFLEXNET          GOFLEXNET               3089
 torbreck                MACH_TORBRECK           TORBRECK                3090
-saarb_mg1               MACH_SAARB_MG1          SAARB_MG1               3091
-callisto                MACH_CALLISTO           CALLISTO                3092
-multhsu                 MACH_MULTHSU            MULTHSU                 3093
-saluda                  MACH_SALUDA             SALUDA                  3094
-pemp_omap3_apollo       MACH_PEMP_OMAP3_APOLLO  PEMP_OMAP3_APOLLO       3095
-vc0718                  MACH_VC0718             VC0718                  3096
-mvblx                   MACH_MVBLX              MVBLX                   3097
-inhand_apeiron          MACH_INHAND_APEIRON     INHAND_APEIRON          3098
-inhand_fury             MACH_INHAND_FURY        INHAND_FURY             3099
-inhand_siren            MACH_INHAND_SIREN       INHAND_SIREN            3100
-hdnvp                   MACH_HDNVP              HDNVP                   3101
-softwinner              MACH_SOFTWINNER         SOFTWINNER              3102
 prima2_evb              MACH_PRIMA2_EVB         PRIMA2_EVB              3103
-nas6210                 MACH_NAS6210            NAS6210                 3104
-unisdev                 MACH_UNISDEV            UNISDEV                 3105
-sbca11                  MACH_SBCA11             SBCA11                  3106
-saga                    MACH_SAGA               SAGA                    3107
-ns_k330                 MACH_NS_K330            NS_K330                 3108
-tanna                   MACH_TANNA              TANNA                   3109
-imate8502               MACH_IMATE8502          IMATE8502               3110
-aspen                   MACH_ASPEN              ASPEN                   3111
-daintree_cwac           MACH_DAINTREE_CWAC      DAINTREE_CWAC           3112
-zmx25                   MACH_ZMX25              ZMX25                   3113
-maple1                  MACH_MAPLE1             MAPLE1                  3114
-qsd8x72_surf            MACH_QSD8X72_SURF       QSD8X72_SURF            3115
-qsd8x72_ffa             MACH_QSD8X72_FFA        QSD8X72_FFA             3116
-abilene                 MACH_ABILENE            ABILENE                 3117
-eigen_ttr               MACH_EIGEN_TTR          EIGEN_TTR               3118
-iomega_ix2_200          MACH_IOMEGA_IX2_200     IOMEGA_IX2_200          3119
-coretec_vcx7400         MACH_CORETEC_VCX7400    CORETEC_VCX7400         3120
-santiago                MACH_SANTIAGO           SANTIAGO                3121
-mx257sol                MACH_MX257SOL           MX257SOL                3122
-strasbourg              MACH_STRASBOURG         STRASBOURG              3123
-msm8x60_fluid           MACH_MSM8X60_FLUID      MSM8X60_FLUID           3124
-smartqv5                MACH_SMARTQV5           SMARTQV5                3125
-smartqv3                MACH_SMARTQV3           SMARTQV3                3126
-smartqv7                MACH_SMARTQV7           SMARTQV7                3127
 paz00                   MACH_PAZ00              PAZ00                   3128
 acmenetusfoxg20         MACH_ACMENETUSFOXG20    ACMENETUSFOXG20         3129
-fwbd_0404               MACH_FWBD_0404          FWBD_0404               3131
-hdgu                    MACH_HDGU               HDGU                    3132
-pyramid                 MACH_PYRAMID            PYRAMID                 3133
-epiphan                 MACH_EPIPHAN            EPIPHAN                 3134
-omap_bender             MACH_OMAP_BENDER        OMAP_BENDER             3135
-gurnard                 MACH_GURNARD            GURNARD                 3136
-gtl_it5100              MACH_GTL_IT5100         GTL_IT5100              3137
-bcm2708                 MACH_BCM2708            BCM2708                 3138
-mx51_ggc                MACH_MX51_GGC           MX51_GGC                3139
-sharespace              MACH_SHARESPACE         SHARESPACE              3140
-haba_knx_explorer       MACH_HABA_KNX_EXPLORER  HABA_KNX_EXPLORER       3141
-simtec_kirkmod          MACH_SIMTEC_KIRKMOD     SIMTEC_KIRKMOD          3142
-crux                    MACH_CRUX               CRUX                    3143
-mx51_bravo              MACH_MX51_BRAVO         MX51_BRAVO              3144
-charon                  MACH_CHARON             CHARON                  3145
-picocom3                MACH_PICOCOM3           PICOCOM3                3146
-picocom4                MACH_PICOCOM4           PICOCOM4                3147
-serrano                 MACH_SERRANO            SERRANO                 3148
-doubleshot              MACH_DOUBLESHOT         DOUBLESHOT              3149
-evsy                    MACH_EVSY               EVSY                    3150
-huashan                 MACH_HUASHAN            HUASHAN                 3151
-lausanne                MACH_LAUSANNE           LAUSANNE                3152
-emerald                 MACH_EMERALD            EMERALD                 3153
-tqma35                  MACH_TQMA35             TQMA35                  3154
-marvel                  MACH_MARVEL             MARVEL                  3155
-manuae                  MACH_MANUAE             MANUAE                  3156
-chacha                  MACH_CHACHA             CHACHA                  3157
-lemon                   MACH_LEMON              LEMON                   3158
-csc                     MACH_CSC                CSC                     3159
-gira_knxip_router       MACH_GIRA_KNXIP_ROUTER  GIRA_KNXIP_ROUTER       3160
-t20                     MACH_T20                T20                     3161
-hdmini                  MACH_HDMINI             HDMINI                  3162
-sciphone_g2             MACH_SCIPHONE_G2        SCIPHONE_G2             3163
-express                 MACH_EXPRESS            EXPRESS                 3164
-express_kt              MACH_EXPRESS_KT         EXPRESS_KT              3165
-maximasp                MACH_MAXIMASP           MAXIMASP                3166
-nitrogen_imx51          MACH_NITROGEN_IMX51     NITROGEN_IMX51          3167
-nitrogen_imx53          MACH_NITROGEN_IMX53     NITROGEN_IMX53          3168
-sunfire                 MACH_SUNFIRE            SUNFIRE                 3169
-arowana                 MACH_AROWANA            AROWANA                 3170
-tegra_daytona           MACH_TEGRA_DAYTONA      TEGRA_DAYTONA           3171
-tegra_swordfish         MACH_TEGRA_SWORDFISH    TEGRA_SWORDFISH         3172
-edison                  MACH_EDISON             EDISON                  3173
-svp8500v1               MACH_SVP8500V1          SVP8500V1               3174
-svp8500v2               MACH_SVP8500V2          SVP8500V2               3175
-svp5500                 MACH_SVP5500            SVP5500                 3176
-b5500                   MACH_B5500              B5500                   3177
-s5500                   MACH_S5500              S5500                   3178
-icon                    MACH_ICON               ICON                    3179
-elephant                MACH_ELEPHANT           ELEPHANT                3180
-shooter                 MACH_SHOOTER            SHOOTER                 3182
-spade_lte               MACH_SPADE_LTE          SPADE_LTE               3183
-philhwani               MACH_PHILHWANI          PHILHWANI               3184
-gsncomm                 MACH_GSNCOMM            GSNCOMM                 3185
-strasbourg_a2           MACH_STRASBOURG_A2      STRASBOURG_A2           3186
-mmm                     MACH_MMM                MMM                     3187
-davinci_dm365_bv        MACH_DAVINCI_DM365_BV   DAVINCI_DM365_BV        3188
 ag5evm                  MACH_AG5EVM             AG5EVM                  3189
-sc575plc                MACH_SC575PLC           SC575PLC                3190
-sc575hmi                MACH_SC575IPC           SC575IPC                3191
-omap3_tdm3730           MACH_OMAP3_TDM3730      OMAP3_TDM3730           3192
-top9000_eval            MACH_TOP9000_EVAL       TOP9000_EVAL            3194
-top9000_su              MACH_TOP9000_SU         TOP9000_SU              3195
-utm300                  MACH_UTM300             UTM300                  3196
 tsunagi                 MACH_TSUNAGI            TSUNAGI                 3197
-ts75xx                  MACH_TS75XX             TS75XX                  3198
-ts47xx                  MACH_TS47XX             TS47XX                  3200
-da850_k5                MACH_DA850_K5           DA850_K5                3201
-ax502                   MACH_AX502              AX502                   3202
-igep0032                MACH_IGEP0032           IGEP0032                3203
-antero                  MACH_ANTERO             ANTERO                  3204
-synergy                 MACH_SYNERGY            SYNERGY                 3205
 ics_if_voip             MACH_ICS_IF_VOIP        ICS_IF_VOIP             3206
 wlf_cragg_6410          MACH_WLF_CRAGG_6410     WLF_CRAGG_6410          3207
-punica                  MACH_PUNICA             PUNICA                  3208
 trimslice               MACH_TRIMSLICE          TRIMSLICE               3209
-mx27_wmultra            MACH_MX27_WMULTRA       MX27_WMULTRA            3210
 mackerel                MACH_MACKEREL           MACKEREL                3211
-fa9x27                  MACH_FA9X27             FA9X27                  3213
-ns2816tb                MACH_NS2816TB           NS2816TB                3214
-ns2816_ntpad            MACH_NS2816_NTPAD       NS2816_NTPAD            3215
-ns2816_ntnb             MACH_NS2816_NTNB        NS2816_NTNB             3216
 kaen                    MACH_KAEN               KAEN                    3217
-nv1000                  MACH_NV1000             NV1000                  3218
-nuc950ts                MACH_NUC950TS           NUC950TS                3219
 nokia_rm680             MACH_NOKIA_RM680        NOKIA_RM680             3220
-ast2200                 MACH_AST2200            AST2200                 3221
-lead                    MACH_LEAD               LEAD                    3222
-unino1                  MACH_UNINO1             UNINO1                  3223
-greeco                  MACH_GREECO             GREECO                  3224
-verdi                   MACH_VERDI              VERDI                   3225
 dm6446_adbox            MACH_DM6446_ADBOX       DM6446_ADBOX            3226
 quad_salsa              MACH_QUAD_SALSA         QUAD_SALSA              3227
 abb_gma_1_1             MACH_ABB_GMA_1_1        ABB_GMA_1_1             3228
@@ -949,13 +621,11 @@ koi			MACH_KOI		KOI			3312
 ts4800                  MACH_TS4800             TS4800                  3313
 tqma9263                MACH_TQMA9263           TQMA9263                3314
 holiday                 MACH_HOLIDAY            HOLIDAY                 3315
-dma_6410                MACH_DMA6410            DMA6410                 3316
 pcats_overlay           MACH_PCATS_OVERLAY      PCATS_OVERLAY           3317
 hwgw6410                MACH_HWGW6410           HWGW6410                3318
 shenzhou                MACH_SHENZHOU           SHENZHOU                3319
 cwme9210                MACH_CWME9210           CWME9210                3320
 cwme9210js              MACH_CWME9210JS         CWME9210JS              3321
-pgs_v1                  MACH_PGS_SITARA         PGS_SITARA              3322
 colibri_tegra2          MACH_COLIBRI_TEGRA2     COLIBRI_TEGRA2          3323
 w21                     MACH_W21                W21                     3324
 polysat1                MACH_POLYSAT1           POLYSAT1                3325
@@ -1021,13 +691,11 @@ viprinet		MACH_VIPRINET		VIPRINET		3385
 bockw                   MACH_BOCKW              BOCKW                   3386
 eva2000                 MACH_EVA2000            EVA2000                 3387
 steelyard               MACH_STEELYARD          STEELYARD               3388
-sdh001                  MACH_MACH_SDH001        MACH_SDH001             3390
 nsslsboard              MACH_NSSLSBOARD         NSSLSBOARD              3392
 geneva_b5               MACH_GENEVA_B5          GENEVA_B5               3393
 spear1340               MACH_SPEAR1340          SPEAR1340               3394
 rexmas                  MACH_REXMAS             REXMAS                  3395
 msm8960_cdp             MACH_MSM8960_CDP        MSM8960_CDP             3396
-msm8960_mdp             MACH_MSM8960_MDP        MSM8960_MDP             3397
 msm8960_fluid           MACH_MSM8960_FLUID      MSM8960_FLUID           3398
 msm8960_apq             MACH_MSM8960_APQ        MSM8960_APQ             3399
 helios_v2               MACH_HELIOS_V2          HELIOS_V2               3400
@@ -1123,5 +791,381 @@ blissc			MACH_BLISSC		BLISSC			3491
 thales_adc              MACH_THALES_ADC         THALES_ADC              3492
 ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
 atdgp318                MACH_ATDGP318           ATDGP318                3494
+dma210u                 MACH_DMA210U            DMA210U                 3495
+em_t3                   MACH_EM_T3              EM_T3                   3496
+htx3250                 MACH_HTX3250            HTX3250                 3497
+g50                     MACH_G50                G50                     3498
+eco5                    MACH_ECO5               ECO5                    3499
+wintergrasp             MACH_WINTERGRASP        WINTERGRASP             3500
+puro                    MACH_PURO               PURO                    3501
+shooter_k               MACH_SHOOTER_K          SHOOTER_K               3502
+nspire                  MACH_NSPIRE             NSPIRE                  3503
+mickxx                  MACH_MICKXX             MICKXX                  3504
+lxmb                    MACH_LXMB               LXMB                    3505
+adam                    MACH_ADAM               ADAM                    3507
+b1004                   MACH_B1004              B1004                   3508
+oboea                   MACH_OBOEA              OBOEA                   3509
+a1015                   MACH_A1015              A1015                   3510
+robin_vbdt30            MACH_ROBIN_VBDT30       ROBIN_VBDT30            3511
+tegra_enterprise        MACH_TEGRA_ENTERPRISE   TEGRA_ENTERPRISE        3512
+rfl108200_mk10          MACH_RFL108200_MK10     RFL108200_MK10          3513
+rfl108300_mk16          MACH_RFL108300_MK16     RFL108300_MK16          3514
+rover_v7                MACH_ROVER_V7           ROVER_V7                3515
+miphone                 MACH_MIPHONE            MIPHONE                 3516
+femtobts                MACH_FEMTOBTS           FEMTOBTS                3517
+monopoli                MACH_MONOPOLI           MONOPOLI                3518
+boss                    MACH_BOSS               BOSS                    3519
+davinci_dm368_vtam      MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM      3520
+clcon                   MACH_CLCON              CLCON                   3521
+nokia_rm696             MACH_NOKIA_RM696        NOKIA_RM696             3522
+tahiti                  MACH_TAHITI             TAHITI                  3523
+fighter                 MACH_FIGHTER            FIGHTER                 3524
+sgh_i710                MACH_SGH_I710           SGH_I710                3525
+integreproscb           MACH_INTEGREPROSCB      INTEGREPROSCB           3526
+monza                   MACH_MONZA              MONZA                   3527
+calimain                MACH_CALIMAIN           CALIMAIN                3528
+mx6q_sabreauto          MACH_MX6Q_SABREAUTO     MX6Q_SABREAUTO          3529
+gma01x                  MACH_GMA01X             GMA01X                  3530
+sbc51                   MACH_SBC51              SBC51                   3531
+fit                     MACH_FIT                FIT                     3532
+steelhead               MACH_STEELHEAD          STEELHEAD               3533
+panther                 MACH_PANTHER            PANTHER                 3534
+msm8960_liquid          MACH_MSM8960_LIQUID     MSM8960_LIQUID          3535
+lexikonct               MACH_LEXIKONCT          LEXIKONCT               3536
+ns2816_stb              MACH_NS2816_STB         NS2816_STB              3537
+sei_mm2_lpc3250         MACH_SEI_MM2_LPC3250    SEI_MM2_LPC3250         3538
+cmimx53                 MACH_CMIMX53            CMIMX53                 3539
+sandwich                MACH_SANDWICH           SANDWICH                3540
+chief                   MACH_CHIEF              CHIEF                   3541
+pogo_e02                MACH_POGO_E02           POGO_E02                3542
+mikrap_x168             MACH_MIKRAP_X168        MIKRAP_X168             3543
+htcmozart               MACH_HTCMOZART          HTCMOZART               3544
+htcgold                 MACH_HTCGOLD            HTCGOLD                 3545
+mt72xx                  MACH_MT72XX             MT72XX                  3546
+mx51_ivy                MACH_MX51_IVY           MX51_IVY                3547
+mx51_lvd                MACH_MX51_LVD           MX51_LVD                3548
+omap3_wiser2            MACH_OMAP3_WISER2       OMAP3_WISER2            3549
+dreamplug               MACH_DREAMPLUG          DREAMPLUG               3550
+cobas_c_111             MACH_COBAS_C_111        COBAS_C_111             3551
+cobas_u_411             MACH_COBAS_U_411        COBAS_U_411             3552
+hssd                    MACH_HSSD               HSSD                    3553
+iom35x                  MACH_IOM35X             IOM35X                  3554
+psom_omap               MACH_PSOM_OMAP          PSOM_OMAP               3555
+iphone_2g               MACH_IPHONE_2G          IPHONE_2G               3556
+iphone_3g               MACH_IPHONE_3G          IPHONE_3G               3557
+ipod_touch_1g           MACH_IPOD_TOUCH_1G      IPOD_TOUCH_1G           3558
+pharos_tpc              MACH_PHAROS_TPC         PHAROS_TPC              3559
+mx53_hydra              MACH_MX53_HYDRA         MX53_HYDRA              3560
+ns2816_dev_board        MACH_NS2816_DEV_BOARD   NS2816_DEV_BOARD        3561
+iphone_3gs              MACH_IPHONE_3GS         IPHONE_3GS              3562
+iphone_4                MACH_IPHONE_4           IPHONE_4                3563
+ipod_touch_4g           MACH_IPOD_TOUCH_4G      IPOD_TOUCH_4G           3564
+dragon_e1100            MACH_DRAGON_E1100       DRAGON_E1100            3565
+topside                 MACH_TOPSIDE            TOPSIDE                 3566
+irisiii                 MACH_IRISIII            IRISIII                 3567
+deto_macarm9            MACH_DETO_MACARM9       DETO_MACARM9            3568
+eti_d1                  MACH_ETI_D1             ETI_D1                  3569
+som3530sdk              MACH_SOM3530SDK         SOM3530SDK              3570
+oc_engine               MACH_OC_ENGINE          OC_ENGINE               3571
+apq8064_sim             MACH_APQ8064_SIM        APQ8064_SIM             3572
+alps                    MACH_ALPS               ALPS                    3575
+tny_t3730               MACH_TNY_T3730          TNY_T3730               3576
+geryon_nfe              MACH_GERYON_NFE         GERYON_NFE              3577
+ns2816_ref_board        MACH_NS2816_REF_BOARD   NS2816_REF_BOARD        3578
+silverstone             MACH_SILVERSTONE        SILVERSTONE             3579
+mtt2440                 MACH_MTT2440            MTT2440                 3580
+ynicdb                  MACH_YNICDB             YNICDB                  3581
+bct                     MACH_BCT                BCT                     3582
+tuscan                  MACH_TUSCAN             TUSCAN                  3583
+xbt_sam9g45             MACH_XBT_SAM9G45        XBT_SAM9G45             3584
+enbw_cmc                MACH_ENBW_CMC           ENBW_CMC                3585
+ch104mx257              MACH_CH104MX257         CH104MX257              3587
+openpri                 MACH_OPENPRI            OPENPRI                 3588
+am335xevm               MACH_AM335XEVM          AM335XEVM               3589
+picodmb                 MACH_PICODMB            PICODMB                 3590
+waluigi                 MACH_WALUIGI            WALUIGI                 3591
+punicag7                MACH_PUNICAG7           PUNICAG7                3592
+ipad_1g                 MACH_IPAD_1G            IPAD_1G                 3593
+appletv_2g              MACH_APPLETV_2G         APPLETV_2G              3594
+mach_ecog45             MACH_MACH_ECOG45        MACH_ECOG45             3595
+ait_cam_enc_4xx         MACH_AIT_CAM_ENC_4XX    AIT_CAM_ENC_4XX         3596
+runnymede               MACH_RUNNYMEDE          RUNNYMEDE               3597
+play                    MACH_PLAY               PLAY                    3598
+hw90260                 MACH_HW90260            HW90260                 3599
+tagh                    MACH_TAGH               TAGH                    3600
+filbert                 MACH_FILBERT            FILBERT                 3601
+getinge_netcomv3        MACH_GETINGE_NETCOMV3   GETINGE_NETCOMV3        3602
+cw20                    MACH_CW20               CW20                    3603
+cinema                  MACH_CINEMA             CINEMA                  3604
+cinema_tea              MACH_CINEMA_TEA         CINEMA_TEA              3605
+cinema_coffee           MACH_CINEMA_COFFEE      CINEMA_COFFEE           3606
+cinema_juice            MACH_CINEMA_JUICE       CINEMA_JUICE            3607
+mx53_mirage2            MACH_MX53_MIRAGE2       MX53_MIRAGE2            3609
+mx53_efikasb            MACH_MX53_EFIKASB       MX53_EFIKASB            3610
+stm_b2000               MACH_STM_B2000          STM_B2000               3612
+m28evk                  MACH_M28EVK             M28EVK                  3613
+pda                     MACH_PDA                PDA                     3614
+meraki_mr58             MACH_MERAKI_MR58        MERAKI_MR58             3615
+kota2                   MACH_KOTA2              KOTA2                   3616
+letcool                 MACH_LETCOOL            LETCOOL                 3617
+mx27iat                 MACH_MX27IAT            MX27IAT                 3618
+apollo_td               MACH_APOLLO_TD          APOLLO_TD               3619
+arena                   MACH_ARENA              ARENA                   3620
+gsngateway              MACH_GSNGATEWAY         GSNGATEWAY              3621
+lf2000                  MACH_LF2000             LF2000                  3622
+bonito                  MACH_BONITO             BONITO                  3623
+asymptote               MACH_ASYMPTOTE          ASYMPTOTE               3624
+bst2brd                 MACH_BST2BRD            BST2BRD                 3625
+tx335s                  MACH_TX335S             TX335S                  3626
+pelco_tesla             MACH_PELCO_TESLA        PELCO_TESLA             3627
+rrhtestplat             MACH_RRHTESTPLAT        RRHTESTPLAT             3628
+vidtonic_pro            MACH_VIDTONIC_PRO       VIDTONIC_PRO            3629
+pl_apollo               MACH_PL_APOLLO          PL_APOLLO               3630
+pl_phoenix              MACH_PL_PHOENIX         PL_PHOENIX              3631
+m28cu3                  MACH_M28CU3             M28CU3                  3632
+vvbox_hd                MACH_VVBOX_HD           VVBOX_HD                3633
+coreware_sam9260_       MACH_COREWARE_SAM9260_  COREWARE_SAM9260_       3634
+marmaduke               MACH_MARMADUKE          MARMADUKE               3635
+amg_xlcore_camera       MACH_AMG_XLCORE_CAMERA  AMG_XLCORE_CAMERA       3636
+omap3_egf               MACH_OMAP3_EGF          OMAP3_EGF               3637
 smdk4212                MACH_SMDK4212           SMDK4212                3638
+dnp9200                 MACH_DNP9200            DNP9200                 3639
+tf101                   MACH_TF101              TF101                   3640
+omap3silvio             MACH_OMAP3SILVIO        OMAP3SILVIO             3641
+picasso2                MACH_PICASSO2           PICASSO2                3642
+vangogh2                MACH_VANGOGH2           VANGOGH2                3643
+olpc_xo_1_75            MACH_OLPC_XO_1_75       OLPC_XO_1_75            3644
+gx400                   MACH_GX400              GX400                   3645
+gs300                   MACH_GS300              GS300                   3646
+acer_a9                 MACH_ACER_A9            ACER_A9                 3647
+vivow_evm               MACH_VIVOW_EVM          VIVOW_EVM               3648
+veloce_cxq              MACH_VELOCE_CXQ         VELOCE_CXQ              3649
+veloce_cxm              MACH_VELOCE_CXM         VELOCE_CXM              3650
+p1852                   MACH_P1852              P1852                   3651
+naxy100                 MACH_NAXY100            NAXY100                 3652
+taishan                 MACH_TAISHAN            TAISHAN                 3653
+touchlink               MACH_TOUCHLINK          TOUCHLINK               3654
+stm32f103ze             MACH_STM32F103ZE        STM32F103ZE             3655
+mcx                     MACH_MCX                MCX                     3656
+stm_nmhdk_fli7610       MACH_STM_NMHDK_FLI7610  STM_NMHDK_FLI7610       3657
+top28x                  MACH_TOP28X             TOP28X                  3658
+okl4vp_microvisor       MACH_OKL4VP_MICROVISOR  OKL4VP_MICROVISOR       3659
+pop                     MACH_POP                POP                     3660
+layer                   MACH_LAYER              LAYER                   3661
+trondheim               MACH_TRONDHEIM          TRONDHEIM               3662
+eva                     MACH_EVA                EVA                     3663
+trust_taurus            MACH_TRUST_TAURUS       TRUST_TAURUS            3664
+ns2816_huashan          MACH_NS2816_HUASHAN     NS2816_HUASHAN          3665
+ns2816_yangcheng        MACH_NS2816_YANGCHENG   NS2816_YANGCHENG        3666
+p852                    MACH_P852               P852                    3667
+flea3                   MACH_FLEA3              FLEA3                   3668
+bowfin                  MACH_BOWFIN             BOWFIN                  3669
+mv88de3100              MACH_MV88DE3100         MV88DE3100              3670
+pia_am35x               MACH_PIA_AM35X          PIA_AM35X               3671
+cedar                   MACH_CEDAR              CEDAR                   3672
+picasso_e               MACH_PICASSO_E          PICASSO_E               3673
+samsung_e60             MACH_SAMSUNG_E60        SAMSUNG_E60             3674
+sdvr_mini               MACH_SDVR_MINI          SDVR_MINI               3676
+omap3_ij3k              MACH_OMAP3_IJ3K         OMAP3_IJ3K              3677
+modasmc1                MACH_MODASMC1           MODASMC1                3678
+apq8064_rumi3           MACH_APQ8064_RUMI3      APQ8064_RUMI3           3679
+matrix506               MACH_MATRIX506          MATRIX506               3680
+msm9615_mtp             MACH_MSM9615_MTP        MSM9615_MTP             3681
+dm36x_spawndc           MACH_DM36X_SPAWNDC      DM36X_SPAWNDC           3682
+sff792                  MACH_SFF792             SFF792                  3683
+am335xiaevm             MACH_AM335XIAEVM        AM335XIAEVM             3684
+g3c2440                 MACH_G3C2440            G3C2440                 3685
+tion270                 MACH_TION270            TION270                 3686
+w22q7arm02              MACH_W22Q7ARM02         W22Q7ARM02              3687
+omap_cat                MACH_OMAP_CAT           OMAP_CAT                3688
+at91sam9n12ek           MACH_AT91SAM9N12EK      AT91SAM9N12EK           3689
+morrison                MACH_MORRISON           MORRISON                3690
+svdu                    MACH_SVDU               SVDU                    3691
+lpp01                   MACH_LPP01              LPP01                   3692
+ubc283                  MACH_UBC283             UBC283                  3693
+zeppelin                MACH_ZEPPELIN           ZEPPELIN                3694
+motus                   MACH_MOTUS              MOTUS                   3695
+neomainboard            MACH_NEOMAINBOARD       NEOMAINBOARD            3696
+devkit3250              MACH_DEVKIT3250         DEVKIT3250              3697
+devkit7000              MACH_DEVKIT7000         DEVKIT7000              3698
+fmc_uic                 MACH_FMC_UIC            FMC_UIC                 3699
+fmc_dcm                 MACH_FMC_DCM            FMC_DCM                 3700
+batwm                   MACH_BATWM              BATWM                   3701
+atlas6cb                MACH_ATLAS6CB           ATLAS6CB                3702
+blue                    MACH_BLUE               BLUE                    3705
+colorado                MACH_COLORADO           COLORADO                3706
+popc                    MACH_POPC               POPC                    3707
+promwad_jade            MACH_PROMWAD_JADE       PROMWAD_JADE            3708
+amp                     MACH_AMP                AMP                     3709
+gnet_amp                MACH_GNET_AMP           GNET_AMP                3710
+toques                  MACH_TOQUES             TOQUES                  3711
+dct_storm               MACH_DCT_STORM          DCT_STORM               3713
+owl                     MACH_OWL                OWL                     3715
+cogent_csb1741          MACH_COGENT_CSB1741     COGENT_CSB1741          3716
+adillustra610           MACH_ADILLUSTRA610      ADILLUSTRA610           3718
+ecafe_na04              MACH_ECAFE_NA04         ECAFE_NA04              3719
+popct                   MACH_POPCT              POPCT                   3720
+omap3_helena            MACH_OMAP3_HELENA       OMAP3_HELENA            3721
+ach                     MACH_ACH                ACH                     3722
+module_dtb              MACH_MODULE_DTB         MODULE_DTB              3723
+oslo_elisabeth          MACH_OSLO_ELISABETH     OSLO_ELISABETH          3725
+tt01                    MACH_TT01               TT01                    3726
+msm8930_cdp             MACH_MSM8930_CDP        MSM8930_CDP             3727
+msm8930_mtp             MACH_MSM8930_MTP        MSM8930_MTP             3728
+msm8930_fluid           MACH_MSM8930_FLUID      MSM8930_FLUID           3729
+ltu11                   MACH_LTU11              LTU11                   3730
+am1808_spawnco          MACH_AM1808_SPAWNCO     AM1808_SPAWNCO          3731
+flx6410                 MACH_FLX6410            FLX6410                 3732
+mx6q_qsb                MACH_MX6Q_QSB           MX6Q_QSB                3733
+mx53_plt424             MACH_MX53_PLT424        MX53_PLT424             3734
+jasmine                 MACH_JASMINE            JASMINE                 3735
+l138_owlboard_plus      MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS      3736
+wr21                    MACH_WR21               WR21                    3737
+peaboy                  MACH_PEABOY             PEABOY                  3739
+mx28_plato              MACH_MX28_PLATO         MX28_PLATO              3740
+kacom2                  MACH_KACOM2             KACOM2                  3741
+slco                    MACH_SLCO               SLCO                    3742
+imx51pico               MACH_IMX51PICO          IMX51PICO               3743
+glink1                  MACH_GLINK1             GLINK1                  3744
+diamond                 MACH_DIAMOND            DIAMOND                 3745
+d9000                   MACH_D9000              D9000                   3746
+w5300e01                MACH_W5300E01           W5300E01                3747
+im6000                  MACH_IM6000             IM6000                  3748
+mx51_fred51             MACH_MX51_FRED51        MX51_FRED51             3749
+stm32f2                 MACH_STM32F2            STM32F2                 3750
+ville                   MACH_VILLE              VILLE                   3751
+ptip_murnau             MACH_PTIP_MURNAU        PTIP_MURNAU             3752
+ptip_classic            MACH_PTIP_CLASSIC       PTIP_CLASSIC            3753
+mx53grb                 MACH_MX53GRB            MX53GRB                 3754
+gagarin                 MACH_GAGARIN            GAGARIN                 3755
+nas2big                 MACH_NAS2BIG            NAS2BIG                 3757
+superfemto              MACH_SUPERFEMTO         SUPERFEMTO              3758
+teufel                  MACH_TEUFEL             TEUFEL                  3759
+dinara                  MACH_DINARA             DINARA                  3760
+vanquish                MACH_VANQUISH           VANQUISH                3761
+zipabox1                MACH_ZIPABOX1           ZIPABOX1                3762
+u9540                   MACH_U9540              U9540                   3763
+jet                     MACH_JET                JET                     3764
 smdk4412                MACH_SMDK4412           SMDK4412                3765
+elite                   MACH_ELITE              ELITE                   3766
+spear320_hmi            MACH_SPEAR320_HMI       SPEAR320_HMI            3767
+ontario                 MACH_ONTARIO            ONTARIO                 3768
+mx6q_sabrelite          MACH_MX6Q_SABRELITE     MX6Q_SABRELITE          3769
+vc200                   MACH_VC200              VC200                   3770
+msm7625a_ffa            MACH_MSM7625A_FFA       MSM7625A_FFA            3771
+msm7625a_surf           MACH_MSM7625A_SURF      MSM7625A_SURF           3772
+benthossbp              MACH_BENTHOSSBP         BENTHOSSBP              3773
+smdk5210                MACH_SMDK5210           SMDK5210                3774
+empq2300                MACH_EMPQ2300           EMPQ2300                3775
+minipos                 MACH_MINIPOS            MINIPOS                 3776
+omap5_sevm              MACH_OMAP5_SEVM         OMAP5_SEVM              3777
+shelter                 MACH_SHELTER            SHELTER                 3778
+omap3_devkit8500        MACH_OMAP3_DEVKIT8500   OMAP3_DEVKIT8500        3779
+edgetd                  MACH_EDGETD             EDGETD                  3780
+copperyard              MACH_COPPERYARD         COPPERYARD              3781
+edge                    MACH_EDGE               EDGE                    3782
+edge_u                  MACH_EDGE_U             EDGE_U                  3783
+edge_td                 MACH_EDGE_TD            EDGE_TD                 3784
+wdss                    MACH_WDSS               WDSS                    3785
+dl_pb25                 MACH_DL_PB25            DL_PB25                 3786
+dss11                   MACH_DSS11              DSS11                   3787
+cpa                     MACH_CPA                CPA                     3788
+aptp2000                MACH_APTP2000           APTP2000                3789
+marzen                  MACH_MARZEN             MARZEN                  3790
+st_turbine              MACH_ST_TURBINE         ST_TURBINE              3791
+gtl_it3300              MACH_GTL_IT3300         GTL_IT3300              3792
+mx6_mule                MACH_MX6_MULE           MX6_MULE                3793
+v7pxa_dt                MACH_V7PXA_DT           V7PXA_DT                3794
+v7mmp_dt                MACH_V7MMP_DT           V7MMP_DT                3795
+dragon7                 MACH_DRAGON7            DRAGON7                 3796
+krome                   MACH_KROME              KROME                   3797
+oratisdante             MACH_ORATISDANTE        ORATISDANTE             3798
+fathom                  MACH_FATHOM             FATHOM                  3799
+dns325                  MACH_DNS325             DNS325                  3800
+sarnen                  MACH_SARNEN             SARNEN                  3801
+ubisys_g1               MACH_UBISYS_G1          UBISYS_G1               3802
+mx53_pf1                MACH_MX53_PF1           MX53_PF1                3803
+asanti                  MACH_ASANTI             ASANTI                  3804
+volta                   MACH_VOLTA              VOLTA                   3805
+knight                  MACH_KNIGHT             KNIGHT                  3807
+beaglebone              MACH_BEAGLEBONE         BEAGLEBONE              3808
+becker                  MACH_BECKER             BECKER                  3809
+fc360                   MACH_FC360              FC360                   3810
+pmi2_xls                MACH_PMI2_XLS           PMI2_XLS                3811
+taranto                 MACH_TARANTO            TARANTO                 3812
+plutux                  MACH_PLUTUX             PLUTUX                  3813
+ipmp_medcom             MACH_IPMP_MEDCOM        IPMP_MEDCOM             3814
+absolut                 MACH_ABSOLUT            ABSOLUT                 3815
+awpb3                   MACH_AWPB3              AWPB3                   3816
+nfp32xx_dt              MACH_NFP32XX_DT         NFP32XX_DT              3817
+dl_pb53                 MACH_DL_PB53            DL_PB53                 3818
+acu_ii                  MACH_ACU_II             ACU_II                  3819
+avalon                  MACH_AVALON             AVALON                  3820
+sphinx                  MACH_SPHINX             SPHINX                  3821
+titan_t                 MACH_TITAN_T            TITAN_T                 3822
+harvest_boris           MACH_HARVEST_BORIS      HARVEST_BORIS           3823
+mach_msm7x30_m3s        MACH_MACH_MSM7X30_M3S   MACH_MSM7X30_M3S        3824
+smdk5250                MACH_SMDK5250           SMDK5250                3825
+imxt_lite               MACH_IMXT_LITE          IMXT_LITE               3826
+imxt_std                MACH_IMXT_STD           IMXT_STD                3827
+imxt_log                MACH_IMXT_LOG           IMXT_LOG                3828
+imxt_nav                MACH_IMXT_NAV           IMXT_NAV                3829
+imxt_full               MACH_IMXT_FULL          IMXT_FULL               3830
+ag09015                 MACH_AG09015            AG09015                 3831
+am3517_mt_ventoux       MACH_AM3517_MT_VENTOUX  AM3517_MT_VENTOUX       3832
+dp1arm9                 MACH_DP1ARM9            DP1ARM9                 3833
+picasso_m               MACH_PICASSO_M          PICASSO_M               3834
+video_gadget            MACH_VIDEO_GADGET       VIDEO_GADGET            3835
+mtt_om3x                MACH_MTT_OM3X           MTT_OM3X                3836
+mx6q_arm2               MACH_MX6Q_ARM2          MX6Q_ARM2               3837
+picosam9g45             MACH_PICOSAM9G45        PICOSAM9G45             3838
+vpm_dm365               MACH_VPM_DM365          VPM_DM365               3839
+bonfire                 MACH_BONFIRE            BONFIRE                 3840
+mt2p2d                  MACH_MT2P2D             MT2P2D                  3841
+sigpda01                MACH_SIGPDA01           SIGPDA01                3842
+cn27                    MACH_CN27               CN27                    3843
+mx25_cwtap              MACH_MX25_CWTAP         MX25_CWTAP              3844
+apf28                   MACH_APF28              APF28                   3845
+pelco_maxwell           MACH_PELCO_MAXWELL      PELCO_MAXWELL           3846
+ge_phoenix              MACH_GE_PHOENIX         GE_PHOENIX              3847
+empc_a500               MACH_EMPC_A500          EMPC_A500               3848
+ims_arm9                MACH_IMS_ARM9           IMS_ARM9                3849
+mini2416                MACH_MINI2416           MINI2416                3850
+mini2450                MACH_MINI2450           MINI2450                3851
+mini310                 MACH_MINI310            MINI310                 3852
+spear_hurricane         MACH_SPEAR_HURRICANE    SPEAR_HURRICANE         3853
+mt7208                  MACH_MT7208             MT7208                  3854
+lpc178x                 MACH_LPC178X            LPC178X                 3855
+farleys                 MACH_FARLEYS            FARLEYS                 3856
+efm32gg_dk3750          MACH_EFM32GG_DK3750     EFM32GG_DK3750          3857
+zeus_board              MACH_ZEUS_BOARD         ZEUS_BOARD              3858
+cc51                    MACH_CC51               CC51                    3859
+fxi_c210                MACH_FXI_C210           FXI_C210                3860
+msm8627_cdp             MACH_MSM8627_CDP        MSM8627_CDP             3861
+msm8627_mtp             MACH_MSM8627_MTP        MSM8627_MTP             3862
+armadillo800eva         MACH_ARMADILLO800EVA    ARMADILLO800EVA         3863
+primou                  MACH_PRIMOU             PRIMOU                  3864
+primoc                  MACH_PRIMOC             PRIMOC                  3865
+primoct                 MACH_PRIMOCT            PRIMOCT                 3866
+a9500                   MACH_A9500              A9500                   3867
+pluto                   MACH_PLUTO              PLUTO                   3869
+acfx100                 MACH_ACFX100            ACFX100                 3870
+msm8625_rumi3           MACH_MSM8625_RUMI3      MSM8625_RUMI3           3871
+valente                 MACH_VALENTE            VALENTE                 3872
+crfs_rfeye              MACH_CRFS_RFEYE         CRFS_RFEYE              3873
+rfeye                   MACH_RFEYE              RFEYE                   3874
+phidget_sbc3            MACH_PHIDGET_SBC3       PHIDGET_SBC3            3875
+tcw_mika                MACH_TCW_MIKA           TCW_MIKA                3876
+imx28_egf               MACH_IMX28_EGF          IMX28_EGF               3877
+valente_wx              MACH_VALENTE_WX         VALENTE_WX              3878
+huangshans              MACH_HUANGSHANS         HUANGSHANS              3879
+bosphorus1              MACH_BOSPHORUS1         BOSPHORUS1              3880
+prima                   MACH_PRIMA              PRIMA                   3881
+evita_ulk               MACH_EVITA_ULK          EVITA_ULK               3884
+merisc600               MACH_MERISC600          MERISC600               3885
+dolak                   MACH_DOLAK              DOLAK                   3886
+sbc53                   MACH_SBC53              SBC53                   3887
+elite_ulk               MACH_ELITE_ULK          ELITE_ULK               3888
+pov2                    MACH_POV2               POV2                    3889
+ipod_touch_2g           MACH_IPOD_TOUCH_2G      IPOD_TOUCH_2G           3890
+da850_pqab              MACH_DA850_PQAB         DA850_PQAB              3891
diff --git a/arch/avr32/boards/merisc/merisc_sysfs.c b/arch/avr32/boards/merisc/merisc_sysfs.c
index df431fdba9ad..5a252318f4bd 100644
--- a/arch/avr32/boards/merisc/merisc_sysfs.c
+++ b/arch/avr32/boards/merisc/merisc_sysfs.c
@@ -13,7 +13,6 @@
 #include <linux/list.h>
 #include <linux/spinlock.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/timer.h>
 #include <linux/err.h>
 #include <linux/ctype.h>
diff --git a/arch/avr32/include/asm/ipcbuf.h b/arch/avr32/include/asm/ipcbuf.h
index 1552c9698f5e..84c7e51cb6d0 100644
--- a/arch/avr32/include/asm/ipcbuf.h
+++ b/arch/avr32/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef __ASM_AVR32_IPCBUF_H
-#define __ASM_AVR32_IPCBUF_H
-
-/*
-* The user_ipc_perm structure for AVR32 architecture.
-* Note extra padding because this structure is passed back and forth
-* between kernel and user space.
-*
-* Pad space is left for:
-* - 32-bit mode_t and seq
-* - 2 miscellaneous 32-bit values
-*/
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* __ASM_AVR32_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/avr32/include/asm/socket.h b/arch/avr32/include/asm/socket.h
index c8d1fae49476..247b88c760be 100644
--- a/arch/avr32/include/asm/socket.h
+++ b/arch/avr32/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* __ASM_AVR32_SOCKET_H */
diff --git a/arch/avr32/include/asm/thread_info.h b/arch/avr32/include/asm/thread_info.h
index 7a9c03dcb0b6..e5deda4691db 100644
--- a/arch/avr32/include/asm/thread_info.h
+++ b/arch/avr32/include/asm/thread_info.h
@@ -85,7 +85,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_RESTORE_SIGMASK     7       /* restore signal mask in do_signal */
 #define TIF_CPU_GOING_TO_SLEEP  8       /* CPU is entering sleep 0 mode */
 #define TIF_NOTIFY_RESUME       9       /* callback before returning to user */
-#define TIF_FREEZE              29
 #define TIF_DEBUG               30      /* debugging enabled */
 #define TIF_USERSPACE           31      /* true if FS sets userspace */
 
@@ -98,7 +97,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
 #define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 
 /* Note: The masks below must never span more than 16 bits! */
 
diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h
index 72667a3b1af7..9bb2d8b2e6ca 100644
--- a/arch/avr32/include/asm/types.h
+++ b/arch/avr32/include/asm/types.h
@@ -10,12 +10,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c
index e84faffbbeca..2233be71e2e8 100644
--- a/arch/avr32/kernel/cpu.c
+++ b/arch/avr32/kernel/cpu.c
@@ -6,7 +6,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/seq_file.h>
 #include <linux/cpu.h>
 #include <linux/module.h>
@@ -26,16 +26,16 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
  * XXX: If/when a SMP-capable implementation of AVR32 will ever be
  * made, we must make sure that the code executes on the correct CPU.
  */
-static ssize_t show_pc0event(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t show_pc0event(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         unsigned long pccr;
 
         pccr = sysreg_read(PCCR);
         return sprintf(buf, "0x%lx\n", (pccr >> 12) & 0x3f);
 }
-static ssize_t store_pc0event(struct sys_device *dev,
-                        struct sysdev_attribute *attr, const char *buf,
+static ssize_t store_pc0event(struct device *dev,
+                        struct device_attribute *attr, const char *buf,
                               size_t count)
 {
         unsigned long val;
@@ -48,16 +48,16 @@ static ssize_t store_pc0event(struct sys_device *dev,
         sysreg_write(PCCR, val);
         return count;
 }
-static ssize_t show_pc0count(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t show_pc0count(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         unsigned long pcnt0;
 
         pcnt0 = sysreg_read(PCNT0);
         return sprintf(buf, "%lu\n", pcnt0);
 }
-static ssize_t store_pc0count(struct sys_device *dev,
-                                struct sysdev_attribute *attr,
+static ssize_t store_pc0count(struct device *dev,
+                                struct device_attribute *attr,
                                 const char *buf, size_t count)
 {
         unsigned long val;
@@ -71,16 +71,16 @@ static ssize_t store_pc0count(struct sys_device *dev,
         return count;
 }
 
-static ssize_t show_pc1event(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_pc1event(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         unsigned long pccr;
 
         pccr = sysreg_read(PCCR);
         return sprintf(buf, "0x%lx\n", (pccr >> 18) & 0x3f);
 }
-static ssize_t store_pc1event(struct sys_device *dev,
-                              struct sysdev_attribute *attr, const char *buf,
+static ssize_t store_pc1event(struct device *dev,
+                              struct device_attribute *attr, const char *buf,
                               size_t count)
 {
         unsigned long val;
@@ -93,16 +93,16 @@ static ssize_t store_pc1event(struct sys_device *dev,
         sysreg_write(PCCR, val);
         return count;
 }
-static ssize_t show_pc1count(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_pc1count(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         unsigned long pcnt1;
 
         pcnt1 = sysreg_read(PCNT1);
         return sprintf(buf, "%lu\n", pcnt1);
 }
-static ssize_t store_pc1count(struct sys_device *dev,
-                                struct sysdev_attribute *attr, const char *buf,
+static ssize_t store_pc1count(struct device *dev,
+                                struct device_attribute *attr, const char *buf,
                               size_t count)
 {
         unsigned long val;
@@ -116,16 +116,16 @@ static ssize_t store_pc1count(struct sys_device *dev,
         return count;
 }
 
-static ssize_t show_pccycles(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_pccycles(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         unsigned long pccnt;
 
         pccnt = sysreg_read(PCCNT);
         return sprintf(buf, "%lu\n", pccnt);
 }
-static ssize_t store_pccycles(struct sys_device *dev,
-                                struct sysdev_attribute *attr, const char *buf,
+static ssize_t store_pccycles(struct device *dev,
+                                struct device_attribute *attr, const char *buf,
                               size_t count)
 {
         unsigned long val;
@@ -139,16 +139,16 @@ static ssize_t store_pccycles(struct sys_device *dev,
         return count;
 }
 
-static ssize_t show_pcenable(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t show_pcenable(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         unsigned long pccr;
 
         pccr = sysreg_read(PCCR);
         return sprintf(buf, "%c\n", (pccr & 1)?'1':'0');
 }
-static ssize_t store_pcenable(struct sys_device *dev,
-                              struct sysdev_attribute *attr, const char *buf,
+static ssize_t store_pcenable(struct device *dev,
+                              struct device_attribute *attr, const char *buf,
                               size_t count)
 {
         unsigned long pccr, val;
@@ -167,12 +167,12 @@ static ssize_t store_pcenable(struct sys_device *dev,
         return count;
 }
 
-static SYSDEV_ATTR(pc0event, 0600, show_pc0event, store_pc0event);
-static SYSDEV_ATTR(pc0count, 0600, show_pc0count, store_pc0count);
-static SYSDEV_ATTR(pc1event, 0600, show_pc1event, store_pc1event);
-static SYSDEV_ATTR(pc1count, 0600, show_pc1count, store_pc1count);
-static SYSDEV_ATTR(pccycles, 0600, show_pccycles, store_pccycles);
-static SYSDEV_ATTR(pcenable, 0600, show_pcenable, store_pcenable);
+static DEVICE_ATTR(pc0event, 0600, show_pc0event, store_pc0event);
+static DEVICE_ATTR(pc0count, 0600, show_pc0count, store_pc0count);
+static DEVICE_ATTR(pc1event, 0600, show_pc1event, store_pc1event);
+static DEVICE_ATTR(pc1count, 0600, show_pc1count, store_pc1count);
+static DEVICE_ATTR(pccycles, 0600, show_pccycles, store_pccycles);
+static DEVICE_ATTR(pcenable, 0600, show_pcenable, store_pcenable);
 
 #endif /* CONFIG_PERFORMANCE_COUNTERS */
 
@@ -186,12 +186,12 @@ static int __init topology_init(void)
                 register_cpu(c, cpu);
 
 #ifdef CONFIG_PERFORMANCE_COUNTERS
-                sysdev_create_file(&c->sysdev, &attr_pc0event);
-                sysdev_create_file(&c->sysdev, &attr_pc0count);
-                sysdev_create_file(&c->sysdev, &attr_pc1event);
-                sysdev_create_file(&c->sysdev, &attr_pc1count);
-                sysdev_create_file(&c->sysdev, &attr_pccycles);
-                sysdev_create_file(&c->sysdev, &attr_pcenable);
+                device_create_file(&c->dev, &dev_attr_pc0event);
+                device_create_file(&c->dev, &dev_attr_pc0count);
+                device_create_file(&c->dev, &dev_attr_pc1event);
+                device_create_file(&c->dev, &dev_attr_pc1count);
+                device_create_file(&c->dev, &dev_attr_pccycles);
+                device_create_file(&c->dev, &dev_attr_pcenable);
 #endif
         }
 
diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c
index bc3aa18293df..900e49b2258b 100644
--- a/arch/avr32/kernel/irq.c
+++ b/arch/avr32/kernel/irq.c
@@ -14,7 +14,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 
 /* May be overridden by platform code */
 int __weak nmi_enable(void)
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index ef5a2a08fcca..ea3395750324 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -34,10 +34,12 @@ void cpu_idle(void)
 {
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched())
                         cpu_idle_sleep();
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index 02560fd8a121..53ad10005ae3 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -100,7 +100,6 @@ static inline struct thread_info *current_thread_info(void)
                                            TIF_NEED_RESCHED */
 #define TIF_MEMDIE              4       /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
-#define TIF_FREEZE              6       /* is freezing for suspend */
 #define TIF_IRQ_SYNC            7       /* sync pipeline stage */
 #define TIF_NOTIFY_RESUME       8       /* callback before returning to user */
 #define TIF_SINGLESTEP          9
@@ -111,7 +110,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 #define _TIF_IRQ_SYNC           (1<<TIF_IRQ_SYNC)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 6a80a9e9fc4a..8dd0416673cb 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -88,10 +88,12 @@ void cpu_idle(void)
 #endif
                 if (!idle)
                         idle = default_idle;
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched())
                         idle();
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/cris/Kconfig.debug b/arch/cris/Kconfig.debug
index 0b9a630dc812..14881e81e8a3 100644
--- a/arch/cris/Kconfig.debug
+++ b/arch/cris/Kconfig.debug
@@ -1,6 +1,5 @@
 menu "Kernel hacking"
 
-#bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC
 config PROFILING
         bool "Kernel profiling support"
 
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig
index 32d90867a984..5f2cdb3e428c 100644
--- a/arch/cris/arch-v10/drivers/Kconfig
+++ b/arch/cris/arch-v10/drivers/Kconfig
@@ -3,7 +3,7 @@ if ETRAX_ARCH_V10
 config ETRAX_ETHERNET
         bool "Ethernet support"
         depends on ETRAX_ARCH_V10
-        select NET_ETHERNET
+        select ETHERNET
         select NET_CORE
         select MII
         help
diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig
index e47e9c3401b0..de43aadcdbc4 100644
--- a/arch/cris/arch-v32/drivers/Kconfig
+++ b/arch/cris/arch-v32/drivers/Kconfig
@@ -3,7 +3,7 @@ if ETRAX_ARCH_V32
 config ETRAX_ETHERNET
         bool "Ethernet support"
         depends on ETRAX_ARCH_V32
-        select NET_ETHERNET
+        select ETHERNET
         select NET_CORE
         select MII
         help
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index bb978ede8985..6773fc83a670 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -47,14 +47,12 @@ static struct clocksource cont_rotime = {
         .rating = 300,
         .read   = read_cont_rotime,
         .mask   = CLOCKSOURCE_MASK(32),
-        .shift  = 10,
         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
 static int __init etrax_init_cont_rotime(void)
 {
-        cont_rotime.mult = clocksource_khz2mult(100000, cont_rotime.shift);
-        clocksource_register(&cont_rotime);
+        clocksource_register_khz(&cont_rotime, 100000);
         return 0;
 }
 arch_initcall(etrax_init_cont_rotime);
diff --git a/arch/cris/include/asm/ipcbuf.h b/arch/cris/include/asm/ipcbuf.h
index 8b0c18b02844..84c7e51cb6d0 100644
--- a/arch/cris/include/asm/ipcbuf.h
+++ b/arch/cris/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef __CRIS_IPCBUF_H__
-#define __CRIS_IPCBUF_H__
-
-/*
- * The user_ipc_perm structure for CRIS architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* __CRIS_IPCBUF_H__ */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/cris/include/asm/socket.h b/arch/cris/include/asm/socket.h
index 1a4a61909ca8..e269264df7c4 100644
--- a/arch/cris/include/asm/socket.h
+++ b/arch/cris/include/asm/socket.h
@@ -64,6 +64,9 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
 
 
diff --git a/arch/cris/include/asm/thread_info.h b/arch/cris/include/asm/thread_info.h
index 332f19c54557..29b92884d793 100644
--- a/arch/cris/include/asm/thread_info.h
+++ b/arch/cris/include/asm/thread_info.h
@@ -86,7 +86,6 @@ struct thread_info {
 #define TIF_RESTORE_SIGMASK     9       /* restore signal mask in do_signal() */
 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              17      /* is terminating due to OOM killer */
-#define TIF_FREEZE              18      /* is freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
@@ -94,7 +93,6 @@ struct thread_info {
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
diff --git a/arch/cris/include/asm/types.h b/arch/cris/include/asm/types.h
index 551a12c0aa01..adaf82780bb4 100644
--- a/arch/cris/include/asm/types.h
+++ b/arch/cris/include/asm/types.h
@@ -3,12 +3,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index bad27a6ff407..c5e69abb4889 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -341,16 +341,6 @@ source "drivers/pci/Kconfig"
 
 source "drivers/pcmcia/Kconfig"
 
-#config MATH_EMULATION
-#       bool "Math emulation support (EXPERIMENTAL)"
-#       depends on EXPERIMENTAL
-#       help
-#         At some point in the future, this will cause floating-point math
-#         instructions to be emulated by the kernel on machines that lack a
-#         floating-point math coprocessor.  Thrill-seekers and chronically
-#         sleep-deprived psychotic hacker types can say Y now, everyone else
-#         should probably wait a while.
-
 menu "Power management options"
 
 config ARCH_SUSPEND_POSSIBLE
diff --git a/arch/frv/include/asm/ipcbuf.h b/arch/frv/include/asm/ipcbuf.h
index b546f67e455f..84c7e51cb6d0 100644
--- a/arch/frv/include/asm/ipcbuf.h
+++ b/arch/frv/include/asm/ipcbuf.h
@@ -1,30 +1 @@
-#ifndef __ASM_IPCBUF_H__
-#define __ASM_IPCBUF_H__
-
-/*
- * The user_ipc_perm structure for FR-V architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* __ASM_IPCBUF_H__ */
-
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/frv/include/asm/socket.h b/arch/frv/include/asm/socket.h
index a6b26880c1ec..ce80fdadcce5 100644
--- a/arch/frv/include/asm/socket.h
+++ b/arch/frv/include/asm/socket.h
@@ -62,5 +62,8 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
 
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h
index cefbe73dc119..92d83ea99ae5 100644
--- a/arch/frv/include/asm/thread_info.h
+++ b/arch/frv/include/asm/thread_info.h
@@ -111,7 +111,6 @@ register struct thread_info *__current_thread_info asm("gr15");
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              17      /* is terminating due to OOM killer */
-#define TIF_FREEZE              18      /* freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
@@ -120,7 +119,6 @@ register struct thread_info *__current_thread_info asm("gr15");
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h
index aa3e7fdc7f29..390a612f3a58 100644
--- a/arch/frv/include/asm/types.h
+++ b/arch/frv/include/asm/types.h
@@ -14,12 +14,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/h8300/include/asm/ipcbuf.h b/arch/h8300/include/asm/ipcbuf.h
index 2cd1ebcc109d..84c7e51cb6d0 100644
--- a/arch/h8300/include/asm/ipcbuf.h
+++ b/arch/h8300/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef __H8300_IPCBUF_H__
-#define __H8300_IPCBUF_H__
-
-/*
- * The user_ipc_perm structure for H8/300 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* __H8300_IPCBUF_H__ */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/h8300/include/asm/socket.h b/arch/h8300/include/asm/socket.h
index 04c0f4596eb5..cf1daab6f27e 100644
--- a/arch/h8300/include/asm/socket.h
+++ b/arch/h8300/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/h8300/include/asm/thread_info.h b/arch/h8300/include/asm/thread_info.h
index d6f1784bfdee..9c126e0c09aa 100644
--- a/arch/h8300/include/asm/thread_info.h
+++ b/arch/h8300/include/asm/thread_info.h
@@ -90,7 +90,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_MEMDIE              4       /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
 #define TIF_NOTIFY_RESUME       6       /* callback before returning to user */
-#define TIF_FREEZE              16      /* is freezing for suspend */
 
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
@@ -99,7 +98,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 
diff --git a/arch/h8300/include/asm/types.h b/arch/h8300/include/asm/types.h
index bb2c91a3522e..07257d9487d8 100644
--- a/arch/h8300/include/asm/types.h
+++ b/arch/h8300/include/asm/types.h
@@ -3,27 +3,10 @@
 
 #include <asm-generic/int-ll64.h>
 
-#if !defined(__ASSEMBLY__)
-
-/*
- * This file is never included by application software unless
- * explicitly requested (e.g., via linux/types.h) in which case the
- * application is Linux specific so (user-) name space pollution is
- * not a major issue.  However, for interoperability, libraries still
- * need to be careful to avoid a name clashes.
- */
-
-typedef unsigned short umode_t;
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
 #ifdef __KERNEL__
 
 #define BITS_PER_LONG 32
 
 #endif /* __KERNEL__ */
 
-#endif /* __ASSEMBLY__ */
-
 #endif /* _H8300_TYPES_H */
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 27489b6dd533..3b7a7c483785 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -23,6 +23,9 @@ config IA64
         select HAVE_ARCH_TRACEHOOK
         select HAVE_DMA_API_DEBUG
         select HAVE_GENERIC_HARDIRQS
+        select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
+        select ARCH_DISCARD_MEMBLOCK
         select GENERIC_IRQ_PROBE
         select GENERIC_PENDING_IRQ if SMP
         select IRQ_PER_CPU
@@ -474,9 +477,6 @@ config NODES_SHIFT
           MAX_NUMNODES will be 2^(This value).
           If in doubt, use the default.
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 # VIRTUAL_MEM_MAP and FLAT_NODE_MEM_MAP are functionally equivalent.
 # VIRTUAL_MEM_MAP has been retained for historical reasons.
 config VIRTUAL_MEM_MAP
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index 6073b187528a..3deac956d325 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -26,59 +26,53 @@
 #include <linux/jiffies.h>
 #include <asm/processor.h>
 
-typedef u64 cputime_t;
-typedef u64 cputime64_t;
+typedef u64 __nocast cputime_t;
+typedef u64 __nocast cputime64_t;
 
-#define cputime_zero                    ((cputime_t)0)
 #define cputime_one_jiffy               jiffies_to_cputime(1)
-#define cputime_max                     ((~((cputime_t)0) >> 1) - 1)
-#define cputime_add(__a, __b)           ((__a) +  (__b))
-#define cputime_sub(__a, __b)           ((__a) -  (__b))
-#define cputime_div(__a, __n)           ((__a) /  (__n))
-#define cputime_halve(__a)              ((__a) >> 1)
-#define cputime_eq(__a, __b)            ((__a) == (__b))
-#define cputime_gt(__a, __b)            ((__a) >  (__b))
-#define cputime_ge(__a, __b)            ((__a) >= (__b))
-#define cputime_lt(__a, __b)            ((__a) <  (__b))
-#define cputime_le(__a, __b)            ((__a) <= (__b))
-
-#define cputime64_zero                  ((cputime64_t)0)
-#define cputime64_add(__a, __b)         ((__a) + (__b))
-#define cputime64_sub(__a, __b)         ((__a) - (__b))
-#define cputime_to_cputime64(__ct)      (__ct)
 
 /*
  * Convert cputime <-> jiffies (HZ)
  */
-#define cputime_to_jiffies(__ct)        ((__ct) / (NSEC_PER_SEC / HZ))
-#define jiffies_to_cputime(__jif)       ((__jif) * (NSEC_PER_SEC / HZ))
-#define cputime64_to_jiffies64(__ct)    ((__ct) / (NSEC_PER_SEC / HZ))
-#define jiffies64_to_cputime64(__jif)   ((__jif) * (NSEC_PER_SEC / HZ))
+#define cputime_to_jiffies(__ct)        \
+        ((__force u64)(__ct) / (NSEC_PER_SEC / HZ))
+#define jiffies_to_cputime(__jif)       \
+        (__force cputime_t)((__jif) * (NSEC_PER_SEC / HZ))
+#define cputime64_to_jiffies64(__ct)    \
+        ((__force u64)(__ct) / (NSEC_PER_SEC / HZ))
+#define jiffies64_to_cputime64(__jif)   \
+        (__force cputime64_t)((__jif) * (NSEC_PER_SEC / HZ))
 
 /*
  * Convert cputime <-> microseconds
  */
-#define cputime_to_usecs(__ct)          ((__ct) / NSEC_PER_USEC)
-#define usecs_to_cputime(__usecs)       ((__usecs) * NSEC_PER_USEC)
+#define cputime_to_usecs(__ct)          \
+        ((__force u64)(__ct) / NSEC_PER_USEC)
+#define usecs_to_cputime(__usecs)       \
+        (__force cputime_t)((__usecs) * NSEC_PER_USEC)
+#define usecs_to_cputime64(__usecs)     \
+        (__force cputime64_t)((__usecs) * NSEC_PER_USEC)
 
 /*
  * Convert cputime <-> seconds
  */
-#define cputime_to_secs(__ct)           ((__ct) / NSEC_PER_SEC)
-#define secs_to_cputime(__secs)         ((__secs) * NSEC_PER_SEC)
+#define cputime_to_secs(__ct)           \
+        ((__force u64)(__ct) / NSEC_PER_SEC)
+#define secs_to_cputime(__secs)         \
+        (__force cputime_t)((__secs) * NSEC_PER_SEC)
 
 /*
  * Convert cputime <-> timespec (nsec)
  */
 static inline cputime_t timespec_to_cputime(const struct timespec *val)
 {
-        cputime_t ret = val->tv_sec * NSEC_PER_SEC;
-        return (ret + val->tv_nsec);
+        u64 ret = val->tv_sec * NSEC_PER_SEC + val->tv_nsec;
+        return (__force cputime_t) ret;
 }
 static inline void cputime_to_timespec(const cputime_t ct, struct timespec *val)
 {
-        val->tv_sec  = ct / NSEC_PER_SEC;
-        val->tv_nsec = ct % NSEC_PER_SEC;
+        val->tv_sec  = (__force u64) ct / NSEC_PER_SEC;
+        val->tv_nsec = (__force u64) ct % NSEC_PER_SEC;
 }
 
 /*
@@ -86,25 +80,28 @@ static inline void cputime_to_timespec(const cputime_t ct, struct timespec *val)
  */
 static inline cputime_t timeval_to_cputime(struct timeval *val)
 {
-        cputime_t ret = val->tv_sec * NSEC_PER_SEC;
-        return (ret + val->tv_usec * NSEC_PER_USEC);
+        u64 ret = val->tv_sec * NSEC_PER_SEC + val->tv_usec * NSEC_PER_USEC;
+        return (__force cputime_t) ret;
 }
 static inline void cputime_to_timeval(const cputime_t ct, struct timeval *val)
 {
-        val->tv_sec = ct / NSEC_PER_SEC;
-        val->tv_usec = (ct % NSEC_PER_SEC) / NSEC_PER_USEC;
+        val->tv_sec = (__force u64) ct / NSEC_PER_SEC;
+        val->tv_usec = ((__force u64) ct % NSEC_PER_SEC) / NSEC_PER_USEC;
 }
 
 /*
  * Convert cputime <-> clock (USER_HZ)
  */
-#define cputime_to_clock_t(__ct)        ((__ct) / (NSEC_PER_SEC / USER_HZ))
-#define clock_t_to_cputime(__x)         ((__x) * (NSEC_PER_SEC / USER_HZ))
+#define cputime_to_clock_t(__ct)        \
+        ((__force u64)(__ct) / (NSEC_PER_SEC / USER_HZ))
+#define clock_t_to_cputime(__x)         \
+        (__force cputime_t)((__x) * (NSEC_PER_SEC / USER_HZ))
 
 /*
  * Convert cputime64 to clock.
  */
-#define cputime64_to_clock_t(__ct)      cputime_to_clock_t((cputime_t)__ct)
+#define cputime64_to_clock_t(__ct)      \
+        cputime_to_clock_t((__force cputime_t)__ct)
 
 #endif /* CONFIG_VIRT_CPU_ACCOUNTING */
 #endif /* __IA64_CPUTIME_H */
diff --git a/arch/ia64/include/asm/ipcbuf.h b/arch/ia64/include/asm/ipcbuf.h
index 079899ae7d32..84c7e51cb6d0 100644
--- a/arch/ia64/include/asm/ipcbuf.h
+++ b/arch/ia64/include/asm/ipcbuf.h
@@ -1,28 +1 @@
-#ifndef _ASM_IA64_IPCBUF_H
-#define _ASM_IA64_IPCBUF_H
-
-/*
- * The ipc64_perm structure for IA-64 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t  key;
-        __kernel_uid_t  uid;
-        __kernel_gid_t  gid;
-        __kernel_uid_t  cuid;
-        __kernel_gid_t  cgid;
-        __kernel_mode_t mode;
-        unsigned short  seq;
-        unsigned short  __pad1;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-
-#endif /* _ASM_IA64_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/ia64/include/asm/socket.h b/arch/ia64/include/asm/socket.h
index 51427eaa51ba..4b03664e3fb5 100644
--- a/arch/ia64/include/asm/socket.h
+++ b/arch/ia64/include/asm/socket.h
@@ -71,4 +71,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_IA64_SOCKET_H */
diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h
index ff0cc84e7bcc..e054bcc4273c 100644
--- a/arch/ia64/include/asm/thread_info.h
+++ b/arch/ia64/include/asm/thread_info.h
@@ -113,7 +113,6 @@ struct thread_info {
 #define TIF_MEMDIE              17      /* is terminating due to OOM killer */
 #define TIF_MCA_INIT            18      /* this task is processing MCA or INIT */
 #define TIF_DB_DISABLED         19      /* debug trap disabled for fsyscall */
-#define TIF_FREEZE              20      /* is freezing for suspend */
 #define TIF_RESTORE_RSE         21      /* user RBS is newer than kernel RBS */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
@@ -126,7 +125,6 @@ struct thread_info {
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_MCA_INIT           (1 << TIF_MCA_INIT)
 #define _TIF_DB_DISABLED        (1 << TIF_DB_DISABLED)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_RESTORE_RSE        (1 << TIF_RESTORE_RSE)
 
 /* "work to do on user-return" bits */
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index 82b3939d2718..3f5b122d9975 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -28,8 +28,6 @@
 # define __IA64_UL(x)           ((unsigned long)(x))
 # define __IA64_UL_CONST(x)     x##UL
 
-typedef unsigned int umode_t;
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/ia64/kernel/err_inject.c b/arch/ia64/kernel/err_inject.c
index c539c689493b..2d67317a1ec2 100644
--- a/arch/ia64/kernel/err_inject.c
+++ b/arch/ia64/kernel/err_inject.c
@@ -24,7 +24,7 @@
  * Copyright (C) 2006, Intel Corp.  All rights reserved.
  *
  */
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/init.h>
 #include <linux/mm.h>
 #include <linux/cpu.h>
@@ -35,10 +35,10 @@
 #define ERR_DATA_BUFFER_SIZE 3          // Three 8-byte;
 
 #define define_one_ro(name)                                             \
-static SYSDEV_ATTR(name, 0444, show_##name, NULL)
+static DEVICE_ATTR(name, 0444, show_##name, NULL)
 
 #define define_one_rw(name)                                             \
-static SYSDEV_ATTR(name, 0644, show_##name, store_##name)
+static DEVICE_ATTR(name, 0644, show_##name, store_##name)
 
 static u64 call_start[NR_CPUS];
 static u64 phys_addr[NR_CPUS];
@@ -55,7 +55,7 @@ static u64 resources[NR_CPUS];
 
 #define show(name)                                                      \
 static ssize_t                                                          \
-show_##name(struct sys_device *dev, struct sysdev_attribute *attr,      \
+show_##name(struct device *dev, struct device_attribute *attr,  \
                 char *buf)                                              \
 {                                                                       \
         u32 cpu=dev->id;                                                \
@@ -64,7 +64,7 @@ show_##name(struct sys_device *dev, struct sysdev_attribute *attr,	\
 
 #define store(name)                                                     \
 static ssize_t                                                          \
-store_##name(struct sys_device *dev, struct sysdev_attribute *attr,     \
+store_##name(struct device *dev, struct device_attribute *attr, \
                                         const char *buf, size_t size)   \
 {                                                                       \
         unsigned int cpu=dev->id;                                       \
@@ -78,7 +78,7 @@ show(call_start)
  * processor. The cpu number in driver is only used for storing data.
  */
 static ssize_t
-store_call_start(struct sys_device *dev, struct sysdev_attribute *attr,
+store_call_start(struct device *dev, struct device_attribute *attr,
                 const char *buf, size_t size)
 {
         unsigned int cpu=dev->id;
@@ -127,7 +127,7 @@ show(err_type_info)
 store(err_type_info)
 
 static ssize_t
-show_virtual_to_phys(struct sys_device *dev, struct sysdev_attribute *attr,
+show_virtual_to_phys(struct device *dev, struct device_attribute *attr,
                         char *buf)
 {
         unsigned int cpu=dev->id;
@@ -135,7 +135,7 @@ show_virtual_to_phys(struct sys_device *dev, struct sysdev_attribute *attr,
 }
 
 static ssize_t
-store_virtual_to_phys(struct sys_device *dev, struct sysdev_attribute *attr,
+store_virtual_to_phys(struct device *dev, struct device_attribute *attr,
                         const char *buf, size_t size)
 {
         unsigned int cpu=dev->id;
@@ -159,8 +159,8 @@ show(err_struct_info)
 store(err_struct_info)
 
 static ssize_t
-show_err_data_buffer(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+show_err_data_buffer(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         unsigned int cpu=dev->id;
 
@@ -171,8 +171,8 @@ show_err_data_buffer(struct sys_device *dev,
 }
 
 static ssize_t
-store_err_data_buffer(struct sys_device *dev,
-                        struct sysdev_attribute *attr,
+store_err_data_buffer(struct device *dev,
+                        struct device_attribute *attr,
                         const char *buf, size_t size)
 {
         unsigned int cpu=dev->id;
@@ -209,14 +209,14 @@ define_one_ro(capabilities);
 define_one_ro(resources);
 
 static struct attribute *default_attrs[] = {
-        &attr_call_start.attr,
-        &attr_virtual_to_phys.attr,
-        &attr_err_type_info.attr,
-        &attr_err_struct_info.attr,
-        &attr_err_data_buffer.attr,
-        &attr_status.attr,
-        &attr_capabilities.attr,
-        &attr_resources.attr,
+        &dev_attr_call_start.attr,
+        &dev_attr_virtual_to_phys.attr,
+        &dev_attr_err_type_info.attr,
+        &dev_attr_err_struct_info.attr,
+        &dev_attr_err_data_buffer.attr,
+        &dev_attr_status.attr,
+        &dev_attr_capabilities.attr,
+        &dev_attr_resources.attr,
         NULL
 };
 
@@ -225,12 +225,12 @@ static struct attribute_group err_inject_attr_group = {
         .name = "err_inject"
 };
 /* Add/Remove err_inject interface for CPU device */
-static int __cpuinit err_inject_add_dev(struct sys_device * sys_dev)
+static int __cpuinit err_inject_add_dev(struct device * sys_dev)
 {
         return sysfs_create_group(&sys_dev->kobj, &err_inject_attr_group);
 }
 
-static int __cpuinit err_inject_remove_dev(struct sys_device * sys_dev)
+static int __cpuinit err_inject_remove_dev(struct device * sys_dev)
 {
         sysfs_remove_group(&sys_dev->kobj, &err_inject_attr_group);
         return 0;
@@ -239,9 +239,9 @@ static int __cpuinit err_inject_cpu_callback(struct notifier_block *nfb,
                 unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
-        struct sys_device *sys_dev;
+        struct device *sys_dev;
 
-        sys_dev = get_cpu_sysdev(cpu);
+        sys_dev = get_cpu_device(cpu);
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
@@ -283,13 +283,13 @@ static void __exit
 err_inject_exit(void)
 {
         int i;
-        struct sys_device *sys_dev;
+        struct device *sys_dev;
 
 #ifdef ERR_INJ_DEBUG
         printk(KERN_INFO "Exit error injection driver.\n");
 #endif
         for_each_online_cpu(i) {
-                sys_dev = get_cpu_sysdev(i);
+                sys_dev = get_cpu_device(i);
                 sysfs_remove_group(&sys_dev->kobj, &err_inject_attr_group);
         }
         unregister_hotcpu_notifier(&err_inject_cpu_notifier);
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 89accc626b86..b2c65e034f5d 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2228,7 +2228,7 @@ pfm_alloc_file(pfm_context_t *ctx)
         /*
          * allocate a new dcache entry
          */
-        path.dentry = d_alloc(pfmfs_mnt->mnt_sb->s_root, &this);
+        path.dentry = d_alloc(pfmfs_mnt->mnt_root, &this);
         if (!path.dentry) {
                 iput(inode);
                 return ERR_PTR(-ENOMEM);
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 5e2c72498c51..cd57d7312de0 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -220,6 +220,23 @@ sort_regions (struct rsvd_region *rsvd_region, int max)
         }
 }
 
+/* merge overlaps */
+static int __init
+merge_regions (struct rsvd_region *rsvd_region, int max)
+{
+        int i;
+        for (i = 1; i < max; ++i) {
+                if (rsvd_region[i].start >= rsvd_region[i-1].end)
+                        continue;
+                if (rsvd_region[i].end > rsvd_region[i-1].end)
+                        rsvd_region[i-1].end = rsvd_region[i].end;
+                --max;
+                memmove(&rsvd_region[i], &rsvd_region[i+1],
+                        (max - i) * sizeof(struct rsvd_region));
+        }
+        return max;
+}
+
 /*
  * Request address space for all standard resources
  */
@@ -270,6 +287,7 @@ static void __init setup_crashkernel(unsigned long total, int *n)
         if (ret == 0 && size > 0) {
                 if (!base) {
                         sort_regions(rsvd_region, *n);
+                        *n = merge_regions(rsvd_region, *n);
                         base = kdump_find_rsvd_region(size,
                                         rsvd_region, *n);
                 }
@@ -373,6 +391,7 @@ reserve_memory (void)
         BUG_ON(IA64_MAX_RSVD_REGIONS + 1 < n);
 
         sort_regions(rsvd_region, num_rsvd_regions);
+        num_rsvd_regions = merge_regions(rsvd_region, num_rsvd_regions);
 }
 
 
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 9be1f11a01d9..9deb21dbf629 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -350,7 +350,7 @@ static int __cpuinit cpu_cache_sysfs_init(unsigned int cpu)
 }
 
 /* Add cache interface for CPU device */
-static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
+static int __cpuinit cache_add_dev(struct device * sys_dev)
 {
         unsigned int cpu = sys_dev->id;
         unsigned long i, j;
@@ -400,7 +400,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
 }
 
 /* Remove cache interface for CPU device */
-static int __cpuinit cache_remove_dev(struct sys_device * sys_dev)
+static int __cpuinit cache_remove_dev(struct device * sys_dev)
 {
         unsigned int cpu = sys_dev->id;
         unsigned long i;
@@ -428,9 +428,9 @@ static int __cpuinit cache_cpu_callback(struct notifier_block *nfb,
                 unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
-        struct sys_device *sys_dev;
+        struct device *sys_dev;
 
-        sys_dev = get_cpu_sysdev(cpu);
+        sys_dev = get_cpu_device(cpu);
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
@@ -454,7 +454,7 @@ static int __init cache_sysfs_init(void)
         int i;
 
         for_each_online_cpu(i) {
-                struct sys_device *sys_dev = get_cpu_sysdev((unsigned int)i);
+                struct device *sys_dev = get_cpu_device((unsigned int)i);
                 cache_add_dev(sys_dev);
         }
 
diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c
index f114a3b14c6a..1516d1dc11fd 100644
--- a/arch/ia64/mm/contig.c
+++ b/arch/ia64/mm/contig.c
@@ -16,6 +16,7 @@
  */
 #include <linux/bootmem.h>
 #include <linux/efi.h>
+#include <linux/memblock.h>
 #include <linux/mm.h>
 #include <linux/nmi.h>
 #include <linux/swap.h>
@@ -348,7 +349,7 @@ paging_init (void)
                 printk("Virtual mem_map starts at 0x%p\n", mem_map);
         }
 #else /* !CONFIG_VIRTUAL_MEM_MAP */
-        add_active_range(0, 0, max_low_pfn);
+        memblock_add_node(0, PFN_PHYS(max_low_pfn), 0);
         free_area_init_nodes(max_zone_pfns);
 #endif /* !CONFIG_VIRTUAL_MEM_MAP */
         zero_page_memmap_ptr = virt_to_page(ia64_imva(empty_zero_page));
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 00cb0e26c64e..13df239dbed1 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -10,6 +10,7 @@
 #include <linux/bootmem.h>
 #include <linux/efi.h>
 #include <linux/elf.h>
+#include <linux/memblock.h>
 #include <linux/mm.h>
 #include <linux/mmzone.h>
 #include <linux/module.h>
@@ -557,8 +558,7 @@ int __init register_active_ranges(u64 start, u64 len, int nid)
 #endif
 
         if (start < end)
-                add_active_range(nid, __pa(start) >> PAGE_SHIFT,
-                        __pa(end) >> PAGE_SHIFT);
+                memblock_add_node(__pa(start), end - start, nid);
         return 0;
 }
 
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 485c42d97e83..dfac09ab027a 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -150,12 +150,11 @@ struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
          * PROM does not support SAL_INTR_REDIRECT, or it failed.
          * Revert to old method.
          */
-        new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
+        new_irq_info = kmemdup(sn_irq_info, sizeof(struct sn_irq_info),
+                               GFP_ATOMIC);
         if (new_irq_info == NULL)
                 return NULL;
 
-        memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
-
         /* Free the old PROM new_irq_info structure */
         sn_intr_free(local_nasid, local_widget, new_irq_info);
         unregister_intr_pda(new_irq_info);
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index 5698f29d5add..8886a0bc4a11 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -127,12 +127,11 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
          * Allocate kernel bus soft and copy from prom.
          */
 
-        soft = kmalloc(sizeof(struct pcibus_info), GFP_KERNEL);
+        soft = kmemdup(prom_bussoft, sizeof(struct pcibus_info), GFP_KERNEL);
         if (!soft) {
                 return NULL;
         }
 
-        memcpy(soft, prom_bussoft, sizeof(struct pcibus_info));
         soft->pbi_buscommon.bs_base = (unsigned long)
                 ioremap(REGION_OFFSET(soft->pbi_buscommon.bs_base),
                         sizeof(struct pic));
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 642451e770ea..e77c477245fd 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -600,11 +600,11 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
          * Allocate kernel bus soft and copy from prom.
          */
 
-        tioca_common = kzalloc(sizeof(struct tioca_common), GFP_KERNEL);
+        tioca_common = kmemdup(prom_bussoft, sizeof(struct tioca_common),
+                               GFP_KERNEL);
         if (!tioca_common)
                 return NULL;
 
-        memcpy(tioca_common, prom_bussoft, sizeof(struct tioca_common));
         tioca_common->ca_common.bs_base = (unsigned long)
                 ioremap(REGION_OFFSET(tioca_common->ca_common.bs_base),
                         sizeof(struct tioca_common));
diff --git a/arch/m32r/include/asm/ipcbuf.h b/arch/m32r/include/asm/ipcbuf.h
index 8d2d7c8ffdb0..84c7e51cb6d0 100644
--- a/arch/m32r/include/asm/ipcbuf.h
+++ b/arch/m32r/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef _ASM_M32R_IPCBUF_H
-#define _ASM_M32R_IPCBUF_H
-
-/*
- * The ipc64_perm structure for m32r architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* _ASM_M32R_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/m32r/include/asm/socket.h b/arch/m32r/include/asm/socket.h
index 469787c30098..e8b8c5bb053c 100644
--- a/arch/m32r/include/asm/socket.h
+++ b/arch/m32r/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_M32R_SOCKET_H */
diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h
index 0227dba44068..bf8fa3c06f4e 100644
--- a/arch/m32r/include/asm/thread_info.h
+++ b/arch/m32r/include/asm/thread_info.h
@@ -138,7 +138,6 @@ static inline unsigned int get_thread_fault_code(void)
 #define TIF_USEDFPU             16      /* FPU was used by this task this quantum (SMP) */
 #define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
-#define TIF_FREEZE              19      /* is freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
@@ -149,7 +148,6 @@ static inline unsigned int get_thread_fault_code(void)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_USEDFPU            (1<<TIF_USEDFPU)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
diff --git a/arch/m32r/include/asm/types.h b/arch/m32r/include/asm/types.h
index bd0035597b3b..bb2eeadecf99 100644
--- a/arch/m32r/include/asm/types.h
+++ b/arch/m32r/include/asm/types.h
@@ -3,12 +3,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 361d54019bb0..81fdaa72c540 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -3,7 +3,6 @@ config M68K
         default y
         select HAVE_IDE
         select HAVE_AOUT if MMU
-        select GENERIC_ATOMIC64 if MMU
         select HAVE_GENERIC_HARDIRQS
         select GENERIC_IRQ_SHOW
         select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
@@ -41,12 +40,15 @@ config GENERIC_CALIBRATE_DELAY
 config GENERIC_IOMAP
         def_bool MMU
 
+config GENERIC_CSUM
+        bool
+
 config TIME_LOW_RES
         bool
         default y
 
 config ARCH_USES_GETTIMEOFFSET
-        def_bool MMU
+        def_bool MMU && !COLDFIRE
 
 config NO_IOPORT
         def_bool y
@@ -61,6 +63,12 @@ config ZONE_DMA
 config CPU_HAS_NO_BITFIELDS
         bool
 
+config CPU_HAS_NO_MULDIV64
+        bool
+
+config CPU_HAS_ADDRESS_SPACES
+        bool
+
 config HZ
         int
         default 1000 if CLEOPATRA
@@ -80,9 +88,12 @@ config MMU
 config MMU_MOTOROLA
         bool
 
+config MMU_COLDFIRE
+        bool
+
 config MMU_SUN3
         bool
-        depends on MMU && !MMU_MOTOROLA
+        depends on MMU && !MMU_MOTOROLA && !MMU_COLDFIRE
 
 menu "Platform setup"
 
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index e632b2d12106..8a9c767125a4 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -1,8 +1,42 @@
 comment "Processor Type"
 
+choice
+        prompt "CPU family support"
+        default M68KCLASSIC if MMU
+        default COLDFIRE if !MMU
+        help
+          The Freescale (was Motorola) M68K family of processors implements
+          the full 68000 processor instruction set.
+          The Freescale ColdFire family of processors is a modern derivitive
+          of the 68000 processor family. They are mainly targeted at embedded
+          applications, and are all System-On-Chip (SOC) devices, as opposed
+          to stand alone CPUs. They implement a subset of the original 68000
+          processor instruction set.
+          If you anticipate running this kernel on a computer with a classic
+          MC68xxx processor, select M68KCLASSIC.
+          If you anticipate running this kernel on a computer with a ColdFire
+          processor, select COLDFIRE.
+
+config M68KCLASSIC
+        bool "Classic M68K CPU family support"
+
+config COLDFIRE
+        bool "Coldfire CPU family support"
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
+        select CPU_HAS_NO_BITFIELDS
+        select CPU_HAS_NO_MULDIV64
+        select GENERIC_CSUM
+
+endchoice
+
+if M68KCLASSIC
+
 config M68000
         bool
         select CPU_HAS_NO_BITFIELDS
+        select CPU_HAS_NO_MULDIV64
+        select GENERIC_CSUM
         help
           The Freescale (was Motorola) 68000 CPU is the first generation of
           the well known M68K family of processors. The CPU core as well as
@@ -18,21 +52,11 @@ config MCPU32
           based on the 68020 processor. For the most part it is used in
           System-On-Chip parts, and does not contain a paging MMU.
 
-config COLDFIRE
-        bool
-        select GENERIC_GPIO
-        select ARCH_REQUIRE_GPIOLIB
-        select CPU_HAS_NO_BITFIELDS
-        help
-          The Freescale ColdFire family of processors is a modern derivitive
-          of the 68000 processor family. They are mainly targeted at embedded
-          applications, and are all System-On-Chip (SOC) devices, as opposed
-          to stand alone CPUs. They implement a subset of the original 68000
-          processor instruction set.
-
 config M68020
         bool "68020 support"
         depends on MMU
+        select GENERIC_ATOMIC64
+        select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68020
           processor, say Y. Otherwise, say N. Note that the 68020 requires a
@@ -42,6 +66,8 @@ config M68020
 config M68030
         bool "68030 support"
         depends on MMU && !MMU_SUN3
+        select GENERIC_ATOMIC64
+        select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68030
           processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
@@ -50,6 +76,8 @@ config M68030
 config M68040
         bool "68040 support"
         depends on MMU && !MMU_SUN3
+        select GENERIC_ATOMIC64
+        select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68LC040
           or MC68040 processor, say Y. Otherwise, say N. Note that an
@@ -59,6 +87,8 @@ config M68040
 config M68060
         bool "68060 support"
         depends on MMU && !MMU_SUN3
+        select GENERIC_ATOMIC64
+        select CPU_HAS_ADDRESS_SPACES
         help
           If you anticipate running this kernel on a computer with a MC68060
           processor, say Y. Otherwise, say N.
@@ -91,10 +121,13 @@ config M68360
         help
           Motorola 68360 processor support.
 
+endif # M68KCLASSIC
+
+if COLDFIRE
+
 config M5206
         bool "MCF5206"
         depends on !MMU
-        select COLDFIRE
         select COLDFIRE_SW_A7
         select HAVE_MBAR
         help
@@ -103,7 +136,6 @@ config M5206
 config M5206e
         bool "MCF5206e"
         depends on !MMU
-        select COLDFIRE
         select COLDFIRE_SW_A7
         select HAVE_MBAR
         help
@@ -112,7 +144,6 @@ config M5206e
 config M520x
         bool "MCF520x"
         depends on !MMU
-        select COLDFIRE
         select GENERIC_CLOCKEVENTS
         select HAVE_CACHE_SPLIT
         help
@@ -121,7 +152,6 @@ config M520x
 config M523x
         bool "MCF523x"
         depends on !MMU
-        select COLDFIRE
         select GENERIC_CLOCKEVENTS
         select HAVE_CACHE_SPLIT
         select HAVE_IPSBAR
@@ -131,7 +161,6 @@ config M523x
 config M5249
         bool "MCF5249"
         depends on !MMU
-        select COLDFIRE
         select COLDFIRE_SW_A7
         select HAVE_MBAR
         help
@@ -143,7 +172,6 @@ config M527x
 config M5271
         bool "MCF5271"
         depends on !MMU
-        select COLDFIRE
         select M527x
         select HAVE_CACHE_SPLIT
         select HAVE_IPSBAR
@@ -154,7 +182,6 @@ config M5271
 config M5272
         bool "MCF5272"
         depends on !MMU
-        select COLDFIRE
         select COLDFIRE_SW_A7
         select HAVE_MBAR
         help
@@ -163,7 +190,6 @@ config M5272
 config M5275
         bool "MCF5275"
         depends on !MMU
-        select COLDFIRE
         select M527x
         select HAVE_CACHE_SPLIT
         select HAVE_IPSBAR
@@ -174,7 +200,6 @@ config M5275
 config M528x
         bool "MCF528x"
         depends on !MMU
-        select COLDFIRE
         select GENERIC_CLOCKEVENTS
         select HAVE_CACHE_SPLIT
         select HAVE_IPSBAR
@@ -184,7 +209,6 @@ config M528x
 config M5307
         bool "MCF5307"
         depends on !MMU
-        select COLDFIRE
         select COLDFIRE_SW_A7
         select HAVE_CACHE_CB
         select HAVE_MBAR
@@ -194,7 +218,6 @@ config M5307
 config M532x
         bool "MCF532x"
         depends on !MMU
-        select COLDFIRE
         select HAVE_CACHE_CB
         help
           Freescale (Motorola) ColdFire 532x processor support.
@@ -202,7 +225,6 @@ config M532x
 config M5407
         bool "MCF5407"
         depends on !MMU
-        select COLDFIRE
         select COLDFIRE_SW_A7
         select HAVE_CACHE_CB
         select HAVE_MBAR
@@ -214,9 +236,8 @@ config M54xx
 
 config M547x
         bool "MCF547x"
-        depends on !MMU
-        select COLDFIRE
         select M54xx
+        select MMU_COLDFIRE if MMU
         select HAVE_CACHE_CB
         select HAVE_MBAR
         help
@@ -224,14 +245,15 @@ config M547x
 
 config M548x
         bool "MCF548x"
-        depends on !MMU
-        select COLDFIRE
+        select MMU_COLDFIRE if MMU
         select M54xx
         select HAVE_CACHE_CB
         select HAVE_MBAR
         help
           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 
+endif # COLDFIRE
+
 
 comment "Processor Specific Options"
 
diff --git a/arch/m68k/Kconfig.debug b/arch/m68k/Kconfig.debug
index 2bdb1b01115c..87233acef18b 100644
--- a/arch/m68k/Kconfig.debug
+++ b/arch/m68k/Kconfig.debug
@@ -2,6 +2,25 @@ menu "Kernel hacking"
 
 source "lib/Kconfig.debug"
 
+config BOOTPARAM
+        bool 'Compiled-in Kernel Boot Parameter'
+
+config BOOTPARAM_STRING
+        string 'Kernel Boot Parameter'
+        default 'console=ttyS0,19200'
+        depends on BOOTPARAM
+
+config EARLY_PRINTK
+        bool "Early printk" if EMBEDDED
+        depends on MVME16x || MAC
+        default y
+        help
+          Write kernel log output directly to a serial port.
+
+          This is useful for kernel debugging when your machine crashes very
+          early before the console code is initialized.
+          You should normally say N here, unless you want to debug such a crash.
+
 if !MMU
 
 config FULLDEBUG
@@ -15,14 +34,6 @@ config HIGHPROFILE
         help
           Use a fast secondary clock to produce profiling information.
 
-config BOOTPARAM
-        bool 'Compiled-in Kernel Boot Parameter'
-
-config BOOTPARAM_STRING
-        string 'Kernel Boot Parameter'
-        default 'console=ttyS0,19200'
-        depends on BOOTPARAM
-
 config NO_KERNEL_MSG
         bool "Suppress Kernel BUG Messages"
         help
diff --git a/arch/m68k/Kconfig.devices b/arch/m68k/Kconfig.devices
index 6033f5d4e67e..04a3d9be90e9 100644
--- a/arch/m68k/Kconfig.devices
+++ b/arch/m68k/Kconfig.devices
@@ -8,8 +8,8 @@ config ARCH_MAY_HAVE_PC_FDC
 menu "Platform devices"
 
 config HEARTBEAT
-        bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || MAC ||Q40
-        default y if !AMIGA && !APOLLO && !ATARI && !MAC && !Q40 && HP300
+        bool "Use power LED as a heartbeat" if AMIGA || APOLLO || ATARI || Q40
+        default y if !AMIGA && !APOLLO && !ATARI && !Q40 && HP300
         help
           Use the power-on LED on your machine as a load meter.  The exact
           behavior is platform-dependent, but normally the flash frequency is
@@ -59,27 +59,6 @@ endmenu
 
 menu "Character devices"
 
-config ATARI_MFPSER
-        tristate "Atari MFP serial support"
-        depends on ATARI
-        ---help---
-          If you like to use the MFP serial ports ("Modem1", "Serial1") under
-          Linux, say Y. The driver equally supports all kinds of MFP serial
-          ports and automatically detects whether Serial1 is available.
-
-          To compile this driver as a module, choose M here.
-
-          Note for Falcon users: You also have an MFP port, it's just not
-          wired to the outside... But you could use the port under Linux.
-
-config ATARI_MIDI
-        tristate "Atari MIDI serial support"
-        depends on ATARI
-        help
-          If you want to use your Atari's MIDI port in Linux, say Y.
-
-          To compile this driver as a module, choose M here.
-
 config ATARI_DSP56K
         tristate "Atari DSP56k support (EXPERIMENTAL)"
         depends on ATARI && EXPERIMENTAL
@@ -99,15 +78,6 @@ config AMIGA_BUILTIN_SERIAL
 
           To compile this driver as a module, choose M here.
 
-config MULTIFACE_III_TTY
-        tristate "Multiface Card III serial support"
-        depends on AMIGA
-        help
-          If you want to use a Multiface III card's serial port in Linux,
-          answer Y.
-
-          To compile this driver as a module, choose M here.
-
 config HPDCA
         tristate "HP DCA serial support"
         depends on DIO && SERIAL_8250
@@ -122,13 +92,9 @@ config HPAPCI
           If you want to use the internal "APCI" serial ports on an HP400
           machine, say Y here.
 
-config DN_SERIAL
-        bool "Support for DN serial port (dummy)"
-        depends on APOLLO
-
 config SERIAL_CONSOLE
         bool "Support for serial port console"
-        depends on (AMIGA || ATARI || SUN3 || SUN3X || VME || APOLLO) && (ATARI_MFPSER=y || ATARI_MIDI=y || AMIGA_BUILTIN_SERIAL=y || MULTIFACE_III_TTY=y || SERIAL=y || SERIAL167 || DN_SERIAL)
+        depends on AMIGA_BUILTIN_SERIAL=y
         ---help---
           If you say Y here, it will be possible to use a serial port as the
           system console (the system console is the device which receives all
@@ -140,10 +106,10 @@ config SERIAL_CONSOLE
           (/dev/tty0) will still be used as the system console by default, but
           you can alter that using a kernel command line option such as
           "console=ttyS1". (Try "man bootparam" or see the documentation of
-          your boot loader (lilo or loadlin) about how to pass options to the
-          kernel at boot time.)
+          your boot loader about how to pass options to the kernel at boot
+          time.)
 
-          If you don't have a VGA card installed and you say Y here, the
+          If you don't have a graphical console and you say Y here, the
           kernel will automatically use the first serial line, /dev/ttyS0, as
           system console.
 
diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine
index ef4a26aff780..7cdf6b010381 100644
--- a/arch/m68k/Kconfig.machine
+++ b/arch/m68k/Kconfig.machine
@@ -1,5 +1,7 @@
 comment "Machine Types"
 
+if M68KCLASSIC
+
 config AMIGA
         bool "Amiga support"
         depends on MMU
@@ -130,6 +132,8 @@ config SUN3
 
           If you don't want to compile a kernel exclusively for a Sun 3, say N.
 
+endif # M68KCLASSIC
+
 config PILOT
         bool
 
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 6d196dadfdbc..8048e1b7e552 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -82,8 +82,6 @@ __ALIGN_STR "\n\t"
 
 extern void atari_microwire_cmd(int cmd);
 
-extern int atari_SCC_reset_done;
-
 static unsigned int atari_irq_startup(struct irq_data *data)
 {
         unsigned int irq = data->irq;
diff --git a/arch/m68k/atari/debug.c b/arch/m68k/atari/debug.c
index 5a484247e493..a547ba9683d1 100644
--- a/arch/m68k/atari/debug.c
+++ b/arch/m68k/atari/debug.c
@@ -202,7 +202,6 @@ static void __init atari_init_mfp_port(int cflag)
 
 static void __init atari_init_scc_port(int cflag)
 {
-        extern int atari_SCC_reset_done;
         static int clksrc_table[9] =
                 /* reg 11: 0x50 = BRG, 0x00 = RTxC, 0x28 = TRxC */
                 { 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x00 };
diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig
index dbb49fc6463b..e93fdae10b23 100644
--- a/arch/m68k/configs/amiga_defconfig
+++ b/arch/m68k/configs/amiga_defconfig
@@ -255,7 +255,6 @@ CONFIG_HID=m
 CONFIG_HIDRAW=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_AMIGA_BUILTIN_SERIAL=y
-CONFIG_MULTIFACE_III_TTY=m
 CONFIG_SERIAL_CONSOLE=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig
index 562b221f6951..66b26c1e848c 100644
--- a/arch/m68k/configs/apollo_defconfig
+++ b/arch/m68k/configs/apollo_defconfig
@@ -223,8 +223,6 @@ CONFIG_LOGO=y
 CONFIG_HID=m
 CONFIG_HIDRAW=y
 # CONFIG_USB_SUPPORT is not set
-CONFIG_DN_SERIAL=y
-CONFIG_SERIAL_CONSOLE=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig
index 82978df637fa..151332515980 100644
--- a/arch/m68k/configs/atari_defconfig
+++ b/arch/m68k/configs/atari_defconfig
@@ -235,10 +235,7 @@ CONFIG_DMASOUND_ATARI=m
 CONFIG_HID=m
 CONFIG_HIDRAW=y
 # CONFIG_USB_SUPPORT is not set
-CONFIG_ATARI_MFPSER=y
-CONFIG_ATARI_MIDI=y
 CONFIG_ATARI_DSP56K=m
-CONFIG_SERIAL_CONSOLE=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig
index ad9e85760e34..55d394edf633 100644
--- a/arch/m68k/configs/multi_defconfig
+++ b/arch/m68k/configs/multi_defconfig
@@ -318,13 +318,8 @@ CONFIG_DMASOUND_Q40=m
 CONFIG_HID=m
 CONFIG_HIDRAW=y
 # CONFIG_USB_SUPPORT is not set
-CONFIG_ATARI_MFPSER=y
-CONFIG_ATARI_MIDI=y
 CONFIG_ATARI_DSP56K=m
 CONFIG_AMIGA_BUILTIN_SERIAL=y
-CONFIG_MULTIFACE_III_TTY=m
-CONFIG_SERIAL167=y
-CONFIG_DN_SERIAL=y
 CONFIG_SERIAL_CONSOLE=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig
index c45aaf3b816f..cdb70d66e535 100644
--- a/arch/m68k/configs/mvme16x_defconfig
+++ b/arch/m68k/configs/mvme16x_defconfig
@@ -218,8 +218,6 @@ CONFIG_GEN_RTC_X=y
 CONFIG_HID=m
 CONFIG_HIDRAW=y
 # CONFIG_USB_SUPPORT is not set
-CONFIG_SERIAL167=y
-CONFIG_SERIAL_CONSOLE=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/m68k/emu/nfeth.c b/arch/m68k/emu/nfeth.c
index c5748bb4ea71..a985a7e87d45 100644
--- a/arch/m68k/emu/nfeth.c
+++ b/arch/m68k/emu/nfeth.c
@@ -39,7 +39,7 @@ enum {
 #define MAX_UNIT        8
 
 /* These identify the driver base version and may not be removed. */
-static const char version[] __devinitdata =
+static const char version[] __devinitconst =
         KERN_INFO KBUILD_MODNAME ".c:v" DRV_VERSION " " DRV_RELDATE
         " S.Opichal, M.Jurik, P.Stehlik\n"
         KERN_INFO " http://aranym.org/\n";
diff --git a/arch/m68k/hp300/config.c b/arch/m68k/hp300/config.c
index 1c05a6260546..bf16af1edacf 100644
--- a/arch/m68k/hp300/config.c
+++ b/arch/m68k/hp300/config.c
@@ -24,7 +24,8 @@
 
 unsigned long hp300_model;
 unsigned long hp300_uart_scode = -1;
-unsigned char ledstate;
+unsigned char hp300_ledstate;
+EXPORT_SYMBOL(hp300_ledstate);
 
 static char s_hp330[] __initdata = "330";
 static char s_hp340[] __initdata = "340";
diff --git a/arch/m68k/include/asm/anchor.h b/arch/m68k/include/asm/anchor.h
deleted file mode 100644
index 871c0d5cfc3d..000000000000
--- a/arch/m68k/include/asm/anchor.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/****************************************************************************/
-
-/*
- *      anchor.h -- Anchor CO-MEM Lite PCI host bridge part.
- *
- *      (C) Copyright 2000, Moreton Bay (www.moreton.com.au)
- */
-
-/****************************************************************************/
-#ifndef anchor_h
-#define anchor_h
-/****************************************************************************/
-
-/*
- *      Define basic addressing info.
- */
-#if defined(CONFIG_M5407C3)
-#define COMEM_BASE      0xFFFF0000      /* Base of CO-MEM address space */
-#define COMEM_IRQ       25              /* IRQ of anchor part */
-#else
-#define COMEM_BASE      0x80000000      /* Base of CO-MEM address space */
-#define COMEM_IRQ       25              /* IRQ of anchor part */
-#endif
-
-/****************************************************************************/
-
-/*
- *      4-byte registers of CO-MEM, so adjust register addresses for
- *      easy access. Handy macro for word access too.
- */
-#define LREG(a)         ((a) >> 2)
-#define WREG(a)         ((a) >> 1)
-
-
-/*
- *      Define base addresses within CO-MEM Lite register address space.
- */
-#define COMEM_I2O       0x0000          /* I2O registers */
-#define COMEM_OPREGS    0x0400          /* Operation registers */
-#define COMEM_PCIBUS    0x2000          /* Direct access to PCI bus */
-#define COMEM_SHMEM     0x4000          /* Shared memory region */
-
-#define COMEM_SHMEMSIZE 0x4000          /* Size of shared memory */
-
-
-/*
- *      Define CO-MEM Registers.
- */
-#define COMEM_I2OHISR   0x0030          /* I2O host interrupt status */
-#define COMEM_I2OHIMR   0x0034          /* I2O host interrupt mask */
-#define COMEM_I2OLISR   0x0038          /* I2O local interrupt status */
-#define COMEM_I2OLIMR   0x003c          /* I2O local interrupt mask */
-#define COMEM_IBFPFIFO  0x0040          /* I2O inbound free/post FIFO */
-#define COMEM_OBPFFIFO  0x0044          /* I2O outbound post/free FIFO */
-#define COMEM_IBPFFIFO  0x0048          /* I2O inbound post/free FIFO */
-#define COMEM_OBFPFIFO  0x004c          /* I2O outbound free/post FIFO */
-
-#define COMEM_DAHBASE   0x0460          /* Direct access base address */
-
-#define COMEM_NVCMD     0x04a0          /* I2C serial command */
-#define COMEM_NVREAD    0x04a4          /* I2C serial read */
-#define COMEM_NVSTAT    0x04a8          /* I2C status */
-
-#define COMEM_DMALBASE  0x04b0          /* DMA local base address */
-#define COMEM_DMAHBASE  0x04b4          /* DMA host base address */
-#define COMEM_DMASIZE   0x04b8          /* DMA size */
-#define COMEM_DMACTL    0x04bc          /* DMA control */
-
-#define COMEM_HCTL      0x04e0          /* Host control */
-#define COMEM_HINT      0x04e4          /* Host interrupt control/status */
-#define COMEM_HLDATA    0x04e8          /* Host to local data mailbox */
-#define COMEM_LINT      0x04f4          /* Local interrupt contole status */
-#define COMEM_LHDATA    0x04f8          /* Local to host data mailbox */
-
-#define COMEM_LBUSCFG   0x04fc          /* Local bus configuration */
-
-
-/*
- *      Commands and flags for use with Direct Access Register.
- */
-#define COMEM_DA_IACK   0x00000000      /* Interrupt acknowledge (read) */
-#define COMEM_DA_SPCL   0x00000010      /* Special cycle (write) */
-#define COMEM_DA_MEMRD  0x00000004      /* Memory read cycle */
-#define COMEM_DA_MEMWR  0x00000004      /* Memory write cycle */
-#define COMEM_DA_IORD   0x00000002      /* I/O read cycle */
-#define COMEM_DA_IOWR   0x00000002      /* I/O write cycle */
-#define COMEM_DA_CFGRD  0x00000006      /* Configuration read cycle */
-#define COMEM_DA_CFGWR  0x00000006      /* Configuration write cycle */
-
-#define COMEM_DA_ADDR(a)        ((a) & 0xffffe000)
-
-#define COMEM_DA_OFFSET(a)      ((a) & 0x00001fff)
-
-
-/*
- *      The PCI bus will be limited in what slots will actually be used.
- *      Define valid device numbers for different boards.
- */
-#if defined(CONFIG_M5407C3)
-#define COMEM_MINDEV    14              /* Minimum valid DEVICE */
-#define COMEM_MAXDEV    14              /* Maximum valid DEVICE */
-#define COMEM_BRIDGEDEV 15              /* Slot bridge is in */
-#else
-#define COMEM_MINDEV    0               /* Minimum valid DEVICE */
-#define COMEM_MAXDEV    3               /* Maximum valid DEVICE */
-#endif
-
-#define COMEM_MAXPCI    (COMEM_MAXDEV+1)        /* Maximum PCI devices */
-
-
-/****************************************************************************/
-#endif  /* anchor_h */
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h
index 0392b28656ab..c0cb36350775 100644
--- a/arch/m68k/include/asm/atarihw.h
+++ b/arch/m68k/include/asm/atarihw.h
@@ -30,6 +30,8 @@ extern u_long atari_switches;
 extern int atari_rtc_year_offset;
 extern int atari_dont_touch_floppy_select;
 
+extern int atari_SCC_reset_done;
+
 /* convenience macros for testing machine type */
 #define MACH_IS_ST      ((atari_mch_cookie >> 16) == ATARI_MCH_ST)
 #define MACH_IS_STE     ((atari_mch_cookie >> 16) == ATARI_MCH_STE && \
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h
index 65c6be6c8180..4eba796c00d4 100644
--- a/arch/m68k/include/asm/atomic.h
+++ b/arch/m68k/include/asm/atomic.h
@@ -55,6 +55,16 @@ static inline int atomic_dec_and_test(atomic_t *v)
         return c != 0;
 }
 
+static inline int atomic_dec_and_test_lt(atomic_t *v)
+{
+        char c;
+        __asm__ __volatile__(
+                "subql #1,%1; slt %0"
+                : "=d" (c), "=m" (*v)
+                : "m" (*v));
+        return c != 0;
+}
+
 static inline int atomic_inc_and_test(atomic_t *v)
 {
         char c;
diff --git a/arch/m68k/include/asm/blinken.h b/arch/m68k/include/asm/blinken.h
index 1a749cf7b06d..0626582a7db4 100644
--- a/arch/m68k/include/asm/blinken.h
+++ b/arch/m68k/include/asm/blinken.h
@@ -17,15 +17,15 @@
 
 #define HP300_LEDS              0xf001ffff
 
-extern unsigned char ledstate;
+extern unsigned char hp300_ledstate;
 
 static __inline__ void blinken_leds(int on, int off)
 {
         if (MACH_IS_HP300)
         {
-                ledstate |= on;
-                ledstate &= ~off;
-                out_8(HP300_LEDS, ~ledstate);
+                hp300_ledstate |= on;
+                hp300_ledstate &= ~off;
+                out_8(HP300_LEDS, ~hp300_ledstate);
         }
 }
 
diff --git a/arch/m68k/include/asm/cacheflush_mm.h b/arch/m68k/include/asm/cacheflush_mm.h
index 73de7c89d8e0..8104bd874649 100644
--- a/arch/m68k/include/asm/cacheflush_mm.h
+++ b/arch/m68k/include/asm/cacheflush_mm.h
@@ -2,23 +2,89 @@
 #define _M68K_CACHEFLUSH_H
 
 #include <linux/mm.h>
+#ifdef CONFIG_COLDFIRE
+#include <asm/mcfsim.h>
+#endif
 
 /* cache code */
 #define FLUSH_I_AND_D   (0x00000808)
 #define FLUSH_I         (0x00000008)
 
+#ifndef ICACHE_MAX_ADDR
+#define ICACHE_MAX_ADDR 0
+#define ICACHE_SET_MASK 0
+#define DCACHE_MAX_ADDR 0
+#define DCACHE_SETMASK  0
+#endif
+
+static inline void flush_cf_icache(unsigned long start, unsigned long end)
+{
+        unsigned long set;
+
+        for (set = start; set <= end; set += (0x10 - 3)) {
+                __asm__ __volatile__ (
+                        "cpushl %%ic,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%ic,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%ic,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%ic,(%0)"
+                        : "=a" (set)
+                        : "a" (set));
+        }
+}
+
+static inline void flush_cf_dcache(unsigned long start, unsigned long end)
+{
+        unsigned long set;
+
+        for (set = start; set <= end; set += (0x10 - 3)) {
+                __asm__ __volatile__ (
+                        "cpushl %%dc,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%dc,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%dc,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%dc,(%0)"
+                        : "=a" (set)
+                        : "a" (set));
+        }
+}
+
+static inline void flush_cf_bcache(unsigned long start, unsigned long end)
+{
+        unsigned long set;
+
+        for (set = start; set <= end; set += (0x10 - 3)) {
+                __asm__ __volatile__ (
+                        "cpushl %%bc,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%bc,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%bc,(%0)\n\t"
+                        "addq%.l #1,%0\n\t"
+                        "cpushl %%bc,(%0)"
+                        : "=a" (set)
+                        : "a" (set));
+        }
+}
+
 /*
  * Cache handling functions
  */
 
 static inline void flush_icache(void)
 {
-        if (CPU_IS_040_OR_060)
+        if (CPU_IS_COLDFIRE) {
+                flush_cf_icache(0, ICACHE_MAX_ADDR);
+        } else if (CPU_IS_040_OR_060) {
                 asm volatile (  "nop\n"
                         "       .chip   68040\n"
                         "       cpusha  %bc\n"
                         "       .chip   68k");
-        else {
+        } else {
                 unsigned long tmp;
                 asm volatile (  "movec  %%cacr,%0\n"
                         "       or.w    %1,%0\n"
@@ -51,12 +117,14 @@ extern void cache_push_v(unsigned long vaddr, int len);
    process changes.  */
 #define __flush_cache_all()                                     \
 ({                                                              \
-        if (CPU_IS_040_OR_060)                                  \
+        if (CPU_IS_COLDFIRE) {                                  \
+                flush_cf_dcache(0, DCACHE_MAX_ADDR);            \
+        } else if (CPU_IS_040_OR_060) {                         \
                 __asm__ __volatile__("nop\n\t"                  \
                                      ".chip 68040\n\t"          \
                                      "cpusha %dc\n\t"           \
                                      ".chip 68k");              \
-        else {                                                  \
+        } else {                                                \
                 unsigned long _tmp;                             \
                 __asm__ __volatile__("movec %%cacr,%0\n\t"      \
                                      "orw %1,%0\n\t"            \
@@ -112,7 +180,17 @@ static inline void flush_cache_page(struct vm_area_struct *vma, unsigned long vm
 /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
 static inline void __flush_page_to_ram(void *vaddr)
 {
-        if (CPU_IS_040_OR_060) {
+        if (CPU_IS_COLDFIRE) {
+                unsigned long addr, start, end;
+                addr = ((unsigned long) vaddr) & ~(PAGE_SIZE - 1);
+                start = addr & ICACHE_SET_MASK;
+                end = (addr + PAGE_SIZE - 1) & ICACHE_SET_MASK;
+                if (start > end) {
+                        flush_cf_bcache(0, end);
+                        end = ICACHE_MAX_ADDR;
+                }
+                flush_cf_bcache(start, end);
+        } else if (CPU_IS_040_OR_060) {
                 __asm__ __volatile__("nop\n\t"
                                      ".chip 68040\n\t"
                                      "cpushp %%bc,(%0)\n\t"
diff --git a/arch/m68k/include/asm/checksum.h b/arch/m68k/include/asm/checksum.h
index ec514485c8b6..2f88d867c711 100644
--- a/arch/m68k/include/asm/checksum.h
+++ b/arch/m68k/include/asm/checksum.h
@@ -3,6 +3,10 @@
 
 #include <linux/in6.h>
 
+#ifdef CONFIG_GENERIC_CSUM
+#include <asm-generic/checksum.h>
+#else
+
 /*
  * computes the checksum of a memory block at buff, length len,
  * and adds in "sum" (32-bit)
@@ -34,30 +38,6 @@ extern __wsum csum_partial_copy_nocheck(const void *src,
                                               void *dst, int len,
                                               __wsum sum);
 
-
-#ifdef CONFIG_COLDFIRE
-
-/*
- *      The ColdFire cores don't support all the 68k instructions used
- *      in the optimized checksum code below. So it reverts back to using
- *      more standard C coded checksums. The fast checksum code is
- *      significantly larger than the optimized version, so it is not
- *      inlined here.
- */
-__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
-
-static inline __sum16 csum_fold(__wsum sum)
-{
-        unsigned int tmp = (__force u32)sum;
-
-        tmp = (tmp & 0xffff) + (tmp >> 16);
-        tmp = (tmp & 0xffff) + (tmp >> 16);
-
-        return (__force __sum16)~tmp;
-}
-
-#else
-
 /*
  *      This is a version of ip_fast_csum() optimized for IP headers,
  *      which always checksum on 4 octet boundaries.
@@ -97,8 +77,6 @@ static inline __sum16 csum_fold(__wsum sum)
         return (__force __sum16)~sum;
 }
 
-#endif /* CONFIG_COLDFIRE */
-
 static inline __wsum
 csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
                   unsigned short proto, __wsum sum)
@@ -167,4 +145,5 @@ csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
         return csum_fold(sum);
 }
 
+#endif /* CONFIG_GENERIC_CSUM */
 #endif /* _M68K_CHECKSUM_H */
diff --git a/arch/m68k/include/asm/div64.h b/arch/m68k/include/asm/div64.h
index edb66148a71d..444ea8a09e9f 100644
--- a/arch/m68k/include/asm/div64.h
+++ b/arch/m68k/include/asm/div64.h
@@ -1,7 +1,9 @@
 #ifndef _M68K_DIV64_H
 #define _M68K_DIV64_H
 
-#ifdef CONFIG_MMU
+#ifdef CONFIG_CPU_HAS_NO_MULDIV64
+#include <asm-generic/div64.h>
+#else
 
 #include <linux/types.h>
 
@@ -27,8 +29,6 @@
         __rem;                                                  \
 })
 
-#else
-#include <asm-generic/div64.h>
-#endif /* CONFIG_MMU */
+#endif /* CONFIG_CPU_HAS_NO_MULDIV64 */
 
 #endif /* _M68K_DIV64_H */
diff --git a/arch/m68k/include/asm/elf.h b/arch/m68k/include/asm/elf.h
index 01c193d91412..e9b7cda59744 100644
--- a/arch/m68k/include/asm/elf.h
+++ b/arch/m68k/include/asm/elf.h
@@ -59,10 +59,10 @@ typedef struct user_m68kfp_struct elf_fpregset_t;
    is actually used on ASV.  */
 #define ELF_PLAT_INIT(_r, load_addr)    _r->a1 = 0
 
-#ifndef CONFIG_SUN3
-#define ELF_EXEC_PAGESIZE       4096
-#else
+#if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE)
 #define ELF_EXEC_PAGESIZE       8192
+#else
+#define ELF_EXEC_PAGESIZE       4096
 #endif
 
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
diff --git a/arch/m68k/include/asm/entry.h b/arch/m68k/include/asm/entry.h
index c3c5a8643e15..622138dc7288 100644
--- a/arch/m68k/include/asm/entry.h
+++ b/arch/m68k/include/asm/entry.h
@@ -222,16 +222,24 @@
  * Non-MMU systems do not reserve %a2 in this way, and this definition is
  * not used for them.
  */
+#ifdef CONFIG_MMU
+
 #define curptr a2
 
 #define GET_CURRENT(tmp) get_current tmp
 .macro get_current reg=%d0
         movel   %sp,\reg
-        andw    #-THREAD_SIZE,\reg
+        andl    #-THREAD_SIZE,\reg
         movel   \reg,%curptr
         movel   %curptr@,%curptr
 .endm
 
+#else
+
+#define GET_CURRENT(tmp)
+
+#endif /* CONFIG_MMU */
+
 #else /* C source */
 
 #define STR(X) STR1(X)
diff --git a/arch/m68k/include/asm/fpu.h b/arch/m68k/include/asm/fpu.h
index ffb6b8cfc6d5..526db9da9e43 100644
--- a/arch/m68k/include/asm/fpu.h
+++ b/arch/m68k/include/asm/fpu.h
@@ -12,6 +12,8 @@
 #define FPSTATESIZE (96)
 #elif defined(CONFIG_M68KFPU_EMU)
 #define FPSTATESIZE (28)
+#elif defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
+#define FPSTATESIZE (16)
 #elif defined(CONFIG_M68060)
 #define FPSTATESIZE (12)
 #else
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
index b2046839f4b2..00d0071de4c3 100644
--- a/arch/m68k/include/asm/gpio.h
+++ b/arch/m68k/include/asm/gpio.h
@@ -225,7 +225,8 @@ static inline void gpio_set_value(unsigned gpio, int value)
 
 static inline int gpio_to_irq(unsigned gpio)
 {
-        return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE : -EINVAL;
+        return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE
+                : __gpio_to_irq(gpio);
 }
 
 static inline int irq_to_gpio(unsigned irq)
diff --git a/arch/m68k/include/asm/ipcbuf.h b/arch/m68k/include/asm/ipcbuf.h
index a623ea3f0955..84c7e51cb6d0 100644
--- a/arch/m68k/include/asm/ipcbuf.h
+++ b/arch/m68k/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef __m68k_IPCBUF_H__
-#define __m68k_IPCBUF_H__
-
-/*
- * The user_ipc_perm structure for m68k architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* __m68k_IPCBUF_H__ */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index 6198df5ff245..0e89fa05de0e 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -25,7 +25,8 @@
 #define NR_IRQS 0
 #endif
 
-#ifdef CONFIG_MMU
+#if defined(CONFIG_M68020) || defined(CONFIG_M68030) || \
+    defined(CONFIG_M68040) || defined(CONFIG_M68060)
 
 /*
  * Interrupt source definitions
@@ -80,7 +81,7 @@ extern unsigned int irq_canonicalize(unsigned int irq);
 
 #else
 #define irq_canonicalize(irq)  (irq)
-#endif /* CONFIG_MMU */
+#endif /* !(CONFIG_M68020 || CONFIG_M68030 || CONFIG_M68040 || CONFIG_M68060) */
 
 asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
 extern atomic_t irq_err_count;
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 16a1835f9b2a..47906aafbf67 100644
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -39,8 +39,12 @@
 #define ACR_CM_OFF_PRE  0x00000040      /* No cache, precise */
 #define ACR_CM_OFF_IMP  0x00000060      /* No cache, imprecise */
 #define ACR_CM          0x00000060      /* Cache mode mask */
+#define ACR_SP          0x00000008      /* Supervisor protect */
 #define ACR_WPROTECT    0x00000004      /* Write protect */
 
+#define ACR_BA(x)       ((x) & 0xff000000)
+#define ACR_ADMSK(x)    ((((x) - 1) & 0xff000000) >> 8)
+
 #if defined(CONFIG_M5407)
 
 #define ICACHE_SIZE 0x4000      /* instruction - 16k */
@@ -56,6 +60,11 @@
 #define CACHE_LINE_SIZE 0x0010  /* 16 bytes */
 #define CACHE_WAYS 4            /* 4 ways */
 
+#define ICACHE_SET_MASK ((ICACHE_SIZE / 64 - 1) << CACHE_WAYS)
+#define DCACHE_SET_MASK ((DCACHE_SIZE / 64 - 1) << CACHE_WAYS)
+#define ICACHE_MAX_ADDR ICACHE_SET_MASK
+#define DCACHE_MAX_ADDR DCACHE_SET_MASK
+
 /*
  *      Version 4 cores have a true harvard style separate instruction
  *      and data cache. Enable data and instruction caches, also enable write
@@ -73,6 +82,27 @@
 #else
 #define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
 #endif
+#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
+
+#if defined(CONFIG_MMU)
+/*
+ *      If running with the MMU enabled then we need to map the internal
+ *      register region as non-cacheable. And then we map all our RAM as
+ *      cacheable and supervisor access only.
+ */
+#define ACR0_MODE       (ACR_BA(CONFIG_MBAR)+ACR_ADMSK(0x1000000)+ \
+                         ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP)
+#define ACR1_MODE       (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \
+                         ACR_ENABLE+ACR_SUPER+ACR_SP)
+#define ACR2_MODE       0
+#define ACR3_MODE       (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \
+                         ACR_ENABLE+ACR_SUPER+ACR_SP)
+
+#else
+
+/*
+ *      For the non-MMU enabled case we map all of RAM as cacheable.
+ */
 #if defined(CONFIG_CACHE_COPYBACK)
 #define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
 #else
@@ -80,7 +110,6 @@
 #endif
 #define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
 
-#define CACHE_INIT      (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
 #define CACHE_INVALIDATE  (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
 #define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA)
 #define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA)
@@ -94,4 +123,5 @@
 #define CACHE_PUSH
 #endif
 
+#endif /* CONFIG_MMU */
 #endif  /* m54xxacr_h */
diff --git a/arch/m68k/include/asm/mac_baboon.h b/arch/m68k/include/asm/mac_baboon.h
index c2a042b8c349..a2d32f6589f9 100644
--- a/arch/m68k/include/asm/mac_baboon.h
+++ b/arch/m68k/include/asm/mac_baboon.h
@@ -29,4 +29,10 @@ struct baboon {
                                  */
 };
 
+extern int baboon_present;
+
+extern void baboon_register_interrupts(void);
+extern void baboon_irq_enable(int);
+extern void baboon_irq_disable(int);
+
 #endif /* __ASSEMBLY **/
diff --git a/arch/m68k/include/asm/mac_iop.h b/arch/m68k/include/asm/mac_iop.h
index a2c7e6fcca38..fde874a01e20 100644
--- a/arch/m68k/include/asm/mac_iop.h
+++ b/arch/m68k/include/asm/mac_iop.h
@@ -159,4 +159,6 @@ extern void iop_upload_code(uint, __u8 *, uint, __u16);
 extern void iop_download_code(uint, __u8 *, uint, __u16);
 extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16);
 
+extern void iop_register_interrupts(void);
+
 #endif /* __ASSEMBLY__ */
diff --git a/arch/m68k/include/asm/mac_oss.h b/arch/m68k/include/asm/mac_oss.h
index 3cf2b6ed685a..425fbff4f4d8 100644
--- a/arch/m68k/include/asm/mac_oss.h
+++ b/arch/m68k/include/asm/mac_oss.h
@@ -58,25 +58,6 @@
 
 #define OSS_POWEROFF    0x80
 
-/*
- * OSS Interrupt levels for various sub-systems
- *
- * This mapping is laid out with two things in mind: first, we try to keep
- * things on their own levels to avoid having to do double-dispatches. Second,
- * the levels match as closely as possible the alternate IRQ mapping mode (aka
- * "A/UX mode") available on some VIA machines.
- */
-
-#define OSS_IRQLEV_DISABLED     0
-#define OSS_IRQLEV_IOPISM       1       /* ADB? */
-#define OSS_IRQLEV_SCSI         IRQ_AUTO_2
-#define OSS_IRQLEV_NUBUS        IRQ_AUTO_3      /* keep this on its own level */
-#define OSS_IRQLEV_IOPSCC       IRQ_AUTO_4      /* matches VIA alternate mapping */
-#define OSS_IRQLEV_SOUND        IRQ_AUTO_5      /* matches VIA alternate mapping */
-#define OSS_IRQLEV_60HZ         6       /* matches VIA alternate mapping */
-#define OSS_IRQLEV_VIA1         IRQ_AUTO_6      /* matches VIA alternate mapping */
-#define OSS_IRQLEV_PARITY       7       /* matches VIA alternate mapping */
-
 #ifndef __ASSEMBLY__
 
 struct mac_oss {
@@ -91,4 +72,8 @@ struct mac_oss {
 extern volatile struct mac_oss *oss;
 extern int oss_present;
 
+extern void oss_register_interrupts(void);
+extern void oss_irq_enable(int);
+extern void oss_irq_disable(int);
+
 #endif /* __ASSEMBLY__ */
diff --git a/arch/m68k/include/asm/mac_psc.h b/arch/m68k/include/asm/mac_psc.h
index 7808bb0b2323..e5c0d71d1543 100644
--- a/arch/m68k/include/asm/mac_psc.h
+++ b/arch/m68k/include/asm/mac_psc.h
@@ -211,6 +211,10 @@
 extern volatile __u8 *psc;
 extern int psc_present;
 
+extern void psc_register_interrupts(void);
+extern void psc_irq_enable(int);
+extern void psc_irq_disable(int);
+
 /*
  *      Access functions
  */
diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h
index a59665e1d41b..aeeedf8b2d25 100644
--- a/arch/m68k/include/asm/mac_via.h
+++ b/arch/m68k/include/asm/mac_via.h
@@ -254,6 +254,15 @@
 extern volatile __u8 *via1,*via2;
 extern int rbv_present,via_alt_mapping;
 
+extern void via_register_interrupts(void);
+extern void via_irq_enable(int);
+extern void via_irq_disable(int);
+extern void via_nubus_irq_startup(int irq);
+extern void via_nubus_irq_shutdown(int irq);
+extern void via1_irq(unsigned int irq, struct irq_desc *desc);
+extern void via1_set_head(int);
+extern int via2_scsi_drq_pending(void);
+
 static inline int rbv_set_video_bpp(int bpp)
 {
         char val = (bpp==1)?0:(bpp==2)?1:(bpp==4)?2:(bpp==8)?3:-1;
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index 12ebe43b008b..682a1a2ff55f 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -11,17 +11,11 @@
 extern void mac_reset(void);
 extern void mac_poweroff(void);
 extern void mac_init_IRQ(void);
-extern int mac_irq_pending(unsigned int);
+
 extern void mac_irq_enable(struct irq_data *data);
 extern void mac_irq_disable(struct irq_data *data);
 
 /*
- *      Floppy driver magic hook - probably shouldn't be here
- */
-
-extern void via1_set_head(int);
-
-/*
  *      Macintosh Table
  */
 
@@ -48,7 +42,7 @@ struct mac_model
 #define MAC_ADB_IOP             6
 
 #define MAC_VIA_II              1
-#define MAC_VIA_IIci            2
+#define MAC_VIA_IICI            2
 #define MAC_VIA_QUADRA          3
 
 #define MAC_SCSI_NONE           0
diff --git a/arch/m68k/include/asm/macints.h b/arch/m68k/include/asm/macints.h
index ebe1b70fe90c..92aa8a4c2d03 100644
--- a/arch/m68k/include/asm/macints.h
+++ b/arch/m68k/include/asm/macints.h
@@ -104,6 +104,9 @@
 #define IRQ_PSC4_3        (35)
 #define IRQ_MAC_MACE_DMA  IRQ_PSC4_3
 
+/* OSS Level 4 interrupts */
+#define IRQ_MAC_SCC       (33)
+
 /* Level 5 (PSC, AV Macs only) interrupts */
 #define IRQ_PSC5_0        (40)
 #define IRQ_PSC5_1        (41)
@@ -131,9 +134,6 @@
 #define IRQ_BABOON_2      (66)
 #define IRQ_BABOON_3      (67)
 
-/* On non-PSC machines, the serial ports share an IRQ */
-#define IRQ_MAC_SCC       IRQ_AUTO_4
-
 #define SLOT2IRQ(x)       (x + 47)
 #define IRQ2SLOT(x)       (x - 47)
 
diff --git a/arch/m68k/include/asm/mcf_pgalloc.h b/arch/m68k/include/asm/mcf_pgalloc.h
new file mode 100644
index 000000000000..313f3dd23cdc
--- /dev/null
+++ b/arch/m68k/include/asm/mcf_pgalloc.h
@@ -0,0 +1,102 @@
+#ifndef M68K_MCF_PGALLOC_H
+#define M68K_MCF_PGALLOC_H
+
+#include <asm/tlb.h>
+#include <asm/tlbflush.h>
+
+extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        free_page((unsigned long) pte);
+}
+
+extern const char bad_pmd_string[];
+
+extern inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+        unsigned long address)
+{
+        unsigned long page = __get_free_page(GFP_DMA|__GFP_REPEAT);
+
+        if (!page)
+                return NULL;
+
+        memset((void *)page, 0, PAGE_SIZE);
+        return (pte_t *) (page);
+}
+
+extern inline pmd_t *pmd_alloc_kernel(pgd_t *pgd, unsigned long address)
+{
+        return (pmd_t *) pgd;
+}
+
+#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); })
+#define pmd_alloc_one(mm, address)      ({ BUG(); ((pmd_t *)2); })
+
+#define pte_alloc_one_fast(mm, addr) pte_alloc_one(mm, addr)
+
+#define pmd_populate(mm, pmd, page) (pmd_val(*pmd) = \
+        (unsigned long)(page_address(page)))
+
+#define pmd_populate_kernel(mm, pmd, pte) (pmd_val(*pmd) = (unsigned long)(pte))
+
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
+static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page,
+                                  unsigned long address)
+{
+        __free_page(page);
+}
+
+#define __pmd_free_tlb(tlb, pmd, address) do { } while (0)
+
+static inline struct page *pte_alloc_one(struct mm_struct *mm,
+        unsigned long address)
+{
+        struct page *page = alloc_pages(GFP_DMA|__GFP_REPEAT, 0);
+        pte_t *pte;
+
+        if (!page)
+                return NULL;
+
+        pte = kmap(page);
+        if (pte) {
+                clear_page(pte);
+                __flush_page_to_ram(pte);
+                flush_tlb_kernel_page(pte);
+                nocache_page(pte);
+        }
+        kunmap(page);
+
+        return page;
+}
+
+extern inline void pte_free(struct mm_struct *mm, struct page *page)
+{
+        __free_page(page);
+}
+
+/*
+ * In our implementation, each pgd entry contains 1 pmd that is never allocated
+ * or freed.  pgd_present is always 1, so this should never be called. -NL
+ */
+#define pmd_free(mm, pmd) BUG()
+
+static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
+{
+        free_page((unsigned long) pgd);
+}
+
+static inline pgd_t *pgd_alloc(struct mm_struct *mm)
+{
+        pgd_t *new_pgd;
+
+        new_pgd = (pgd_t *)__get_free_page(GFP_DMA | __GFP_NOWARN);
+        if (!new_pgd)
+                return NULL;
+        memcpy(new_pgd, swapper_pg_dir, PAGE_SIZE);
+        memset(new_pgd, 0, PAGE_OFFSET >> PGDIR_SHIFT);
+        return new_pgd;
+}
+
+#define pgd_populate(mm, pmd, pte) BUG()
+
+#endif /* M68K_MCF_PGALLOC_H */
diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h
new file mode 100644
index 000000000000..756bde4fb4f8
--- /dev/null
+++ b/arch/m68k/include/asm/mcf_pgtable.h
@@ -0,0 +1,425 @@
+#ifndef _MCF_PGTABLE_H
+#define _MCF_PGTABLE_H
+
+#include <asm/mcfmmu.h>
+#include <asm/page.h>
+
+/*
+ * MMUDR bits, in proper place. We write these directly into the MMUDR
+ * after masking from the pte.
+ */
+#define CF_PAGE_LOCKED          MMUDR_LK        /* 0x00000002 */
+#define CF_PAGE_EXEC            MMUDR_X         /* 0x00000004 */
+#define CF_PAGE_WRITABLE        MMUDR_W         /* 0x00000008 */
+#define CF_PAGE_READABLE        MMUDR_R         /* 0x00000010 */
+#define CF_PAGE_SYSTEM          MMUDR_SP        /* 0x00000020 */
+#define CF_PAGE_COPYBACK        MMUDR_CM_CCB    /* 0x00000040 */
+#define CF_PAGE_NOCACHE         MMUDR_CM_NCP    /* 0x00000080 */
+
+#define CF_CACHEMASK            (~MMUDR_CM_CCB)
+#define CF_PAGE_MMUDR_MASK      0x000000fe
+
+#define _PAGE_NOCACHE030        CF_PAGE_NOCACHE
+
+/*
+ * MMUTR bits, need shifting down.
+ */
+#define CF_PAGE_MMUTR_MASK      0x00000c00
+#define CF_PAGE_MMUTR_SHIFT     10
+
+#define CF_PAGE_VALID           (MMUTR_V << CF_PAGE_MMUTR_SHIFT)
+#define CF_PAGE_SHARED          (MMUTR_SG << CF_PAGE_MMUTR_SHIFT)
+
+/*
+ * Fake bits, not implemented in CF, will get masked out before
+ * hitting hardware.
+ */
+#define CF_PAGE_DIRTY           0x00000001
+#define CF_PAGE_FILE            0x00000200
+#define CF_PAGE_ACCESSED        0x00001000
+
+#define _PAGE_CACHE040          0x020   /* 68040 cache mode, cachable, copyback */
+#define _PAGE_NOCACHE_S         0x040   /* 68040 no-cache mode, serialized */
+#define _PAGE_NOCACHE           0x060   /* 68040 cache mode, non-serialized */
+#define _PAGE_CACHE040W         0x000   /* 68040 cache mode, cachable, write-through */
+#define _DESCTYPE_MASK          0x003
+#define _CACHEMASK040           (~0x060)
+#define _PAGE_GLOBAL040         0x400   /* 68040 global bit, used for kva descs */
+
+/*
+ * Externally used page protection values.
+ */
+#define _PAGE_PRESENT   (CF_PAGE_VALID)
+#define _PAGE_ACCESSED  (CF_PAGE_ACCESSED)
+#define _PAGE_DIRTY     (CF_PAGE_DIRTY)
+#define _PAGE_READWRITE (CF_PAGE_READABLE \
+                                | CF_PAGE_WRITABLE \
+                                | CF_PAGE_SYSTEM \
+                                | CF_PAGE_SHARED)
+
+/*
+ * Compound page protection values.
+ */
+#define PAGE_NONE       __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED)
+
+#define PAGE_SHARED     __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_SHARED)
+
+#define PAGE_INIT       __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_WRITABLE \
+                                 | CF_PAGE_EXEC \
+                                 | CF_PAGE_SYSTEM)
+
+#define PAGE_KERNEL     __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_WRITABLE \
+                                 | CF_PAGE_EXEC \
+                                 | CF_PAGE_SYSTEM)
+
+#define PAGE_COPY       __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_DIRTY)
+
+/*
+ * Page protections for initialising protection_map. See mm/mmap.c
+ * for use. In general, the bit positions are xwr, and P-items are
+ * private, the S-items are shared.
+ */
+#define __P000          PAGE_NONE
+#define __P001          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE)
+#define __P010          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_WRITABLE)
+#define __P011          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_WRITABLE)
+#define __P100          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_EXEC)
+#define __P101          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_EXEC)
+#define __P110          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_WRITABLE \
+                                 | CF_PAGE_EXEC)
+#define __P111          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_WRITABLE \
+                                 | CF_PAGE_EXEC)
+
+#define __S000          PAGE_NONE
+#define __S001          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE)
+#define __S010          PAGE_SHARED
+#define __S011          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_SHARED \
+                                 | CF_PAGE_READABLE)
+#define __S100          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_EXEC)
+#define __S101          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_EXEC)
+#define __S110          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_SHARED \
+                                 | CF_PAGE_EXEC)
+#define __S111          __pgprot(CF_PAGE_VALID \
+                                 | CF_PAGE_ACCESSED \
+                                 | CF_PAGE_SHARED \
+                                 | CF_PAGE_READABLE \
+                                 | CF_PAGE_EXEC)
+
+#define PTE_MASK        PAGE_MASK
+#define CF_PAGE_CHG_MASK (PTE_MASK | CF_PAGE_ACCESSED | CF_PAGE_DIRTY)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        pte_val(pte) = (pte_val(pte) & CF_PAGE_CHG_MASK) | pgprot_val(newprot);
+        return pte;
+}
+
+#define pmd_set(pmdp, ptep) do {} while (0)
+
+static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
+{
+        pgd_val(*pgdp) = virt_to_phys(pmdp);
+}
+
+#define __pte_page(pte) ((unsigned long) (pte_val(pte) & PAGE_MASK))
+#define __pmd_page(pmd) ((unsigned long) (pmd_val(pmd)))
+
+static inline int pte_none(pte_t pte)
+{
+        return !pte_val(pte);
+}
+
+static inline int pte_present(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_VALID;
+}
+
+static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
+        pte_t *ptep)
+{
+        pte_val(*ptep) = 0;
+}
+
+#define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
+#define pte_page(pte)   virt_to_page(__pte_page(pte))
+
+static inline int pmd_none2(pmd_t *pmd) { return !pmd_val(*pmd); }
+#define pmd_none(pmd) pmd_none2(&(pmd))
+static inline int pmd_bad2(pmd_t *pmd) { return 0; }
+#define pmd_bad(pmd) pmd_bad2(&(pmd))
+#define pmd_present(pmd) (!pmd_none2(&(pmd)))
+static inline void pmd_clear(pmd_t *pmdp) { pmd_val(*pmdp) = 0; }
+
+static inline int pgd_none(pgd_t pgd) { return 0; }
+static inline int pgd_bad(pgd_t pgd) { return 0; }
+static inline int pgd_present(pgd_t pgd) { return 1; }
+static inline void pgd_clear(pgd_t *pgdp) {}
+
+#define pte_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pte %08lx.\n",      \
+        __FILE__, __LINE__, pte_val(e))
+#define pmd_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pmd %08lx.\n",      \
+        __FILE__, __LINE__, pmd_val(e))
+#define pgd_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pgd %08lx.\n",      \
+        __FILE__, __LINE__, pgd_val(e))
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not...
+ * [we have the full set here even if they don't change from m68k]
+ */
+static inline int pte_read(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_READABLE;
+}
+
+static inline int pte_write(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_WRITABLE;
+}
+
+static inline int pte_exec(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_EXEC;
+}
+
+static inline int pte_dirty(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_DIRTY;
+}
+
+static inline int pte_young(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_ACCESSED;
+}
+
+static inline int pte_file(pte_t pte)
+{
+        return pte_val(pte) & CF_PAGE_FILE;
+}
+
+static inline int pte_special(pte_t pte)
+{
+        return 0;
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        pte_val(pte) &= ~CF_PAGE_WRITABLE;
+        return pte;
+}
+
+static inline pte_t pte_rdprotect(pte_t pte)
+{
+        pte_val(pte) &= ~CF_PAGE_READABLE;
+        return pte;
+}
+
+static inline pte_t pte_exprotect(pte_t pte)
+{
+        pte_val(pte) &= ~CF_PAGE_EXEC;
+        return pte;
+}
+
+static inline pte_t pte_mkclean(pte_t pte)
+{
+        pte_val(pte) &= ~CF_PAGE_DIRTY;
+        return pte;
+}
+
+static inline pte_t pte_mkold(pte_t pte)
+{
+        pte_val(pte) &= ~CF_PAGE_ACCESSED;
+        return pte;
+}
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+        pte_val(pte) |= CF_PAGE_WRITABLE;
+        return pte;
+}
+
+static inline pte_t pte_mkread(pte_t pte)
+{
+        pte_val(pte) |= CF_PAGE_READABLE;
+        return pte;
+}
+
+static inline pte_t pte_mkexec(pte_t pte)
+{
+        pte_val(pte) |= CF_PAGE_EXEC;
+        return pte;
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+        pte_val(pte) |= CF_PAGE_DIRTY;
+        return pte;
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+        pte_val(pte) |= CF_PAGE_ACCESSED;
+        return pte;
+}
+
+static inline pte_t pte_mknocache(pte_t pte)
+{
+        pte_val(pte) |= 0x80 | (pte_val(pte) & ~0x40);
+        return pte;
+}
+
+static inline pte_t pte_mkcache(pte_t pte)
+{
+        pte_val(pte) &= ~CF_PAGE_NOCACHE;
+        return pte;
+}
+
+static inline pte_t pte_mkspecial(pte_t pte)
+{
+        return pte;
+}
+
+#define swapper_pg_dir kernel_pg_dir
+extern pgd_t kernel_pg_dir[PTRS_PER_PGD];
+
+/*
+ * Find an entry in a pagetable directory.
+ */
+#define pgd_index(address)      ((address) >> PGDIR_SHIFT)
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+
+/*
+ * Find an entry in a kernel pagetable directory.
+ */
+#define pgd_offset_k(address)   pgd_offset(&init_mm, address)
+
+/*
+ * Find an entry in the second-level pagetable.
+ */
+static inline pmd_t *pmd_offset(pgd_t *pgd, unsigned long address)
+{
+        return (pmd_t *) pgd;
+}
+
+/*
+ * Find an entry in the third-level pagetable.
+ */
+#define __pte_offset(address)   ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset_kernel(dir, address) \
+        ((pte_t *) __pmd_page(*(dir)) + __pte_offset(address))
+
+/*
+ * Disable caching for page at given kernel virtual address.
+ */
+static inline void nocache_page(void *vaddr)
+{
+        pgd_t *dir;
+        pmd_t *pmdp;
+        pte_t *ptep;
+        unsigned long addr = (unsigned long) vaddr;
+
+        dir = pgd_offset_k(addr);
+        pmdp = pmd_offset(dir, addr);
+        ptep = pte_offset_kernel(pmdp, addr);
+        *ptep = pte_mknocache(*ptep);
+}
+
+/*
+ * Enable caching for page at given kernel virtual address.
+ */
+static inline void cache_page(void *vaddr)
+{
+        pgd_t *dir;
+        pmd_t *pmdp;
+        pte_t *ptep;
+        unsigned long addr = (unsigned long) vaddr;
+
+        dir = pgd_offset_k(addr);
+        pmdp = pmd_offset(dir, addr);
+        ptep = pte_offset_kernel(pmdp, addr);
+        *ptep = pte_mkcache(*ptep);
+}
+
+#define PTE_FILE_MAX_BITS       21
+#define PTE_FILE_SHIFT          11
+
+static inline unsigned long pte_to_pgoff(pte_t pte)
+{
+        return pte_val(pte) >> PTE_FILE_SHIFT;
+}
+
+static inline pte_t pgoff_to_pte(unsigned pgoff)
+{
+        return __pte((pgoff << PTE_FILE_SHIFT) + CF_PAGE_FILE);
+}
+
+/*
+ * Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e))
+ */
+#define __swp_type(x)           ((x).val & 0xFF)
+#define __swp_offset(x)         ((x).val >> PTE_FILE_SHIFT)
+#define __swp_entry(typ, off)   ((swp_entry_t) { (typ) | \
+                                        (off << PTE_FILE_SHIFT) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)   (__pte((x).val))
+
+#define pmd_page(pmd)           (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
+
+#define pte_offset_map(pmdp, addr) ((pte_t *)__pmd_page(*pmdp) + \
+                                       __pte_offset(addr))
+#define pte_unmap(pte)          ((void) 0)
+#define pfn_pte(pfn, prot)      __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+#define pte_pfn(pte)            (pte_val(pte) >> PAGE_SHIFT)
+
+#endif  /* !__ASSEMBLY__ */
+#endif  /* _MCF_PGTABLE_H */
diff --git a/arch/m68k/include/asm/mcfmmu.h b/arch/m68k/include/asm/mcfmmu.h
new file mode 100644
index 000000000000..26cc3d5a63f8
--- /dev/null
+++ b/arch/m68k/include/asm/mcfmmu.h
@@ -0,0 +1,112 @@
+/*
+ *      mcfmmu.h -- definitions for the ColdFire v4e MMU
+ *
+ *      (C) Copyright 2011,  Greg Ungerer <gerg@uclinux.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef MCFMMU_H
+#define MCFMMU_H
+
+/*
+ *      The MMU support registers are mapped into the address space using
+ *      the processor MMUBASE register. We used a fixed address for mapping,
+ *      there doesn't seem any need to make this configurable yet.
+ */
+#define MMUBASE         0xfe000000
+
+/*
+ *      The support registers of the MMU. Names are the sames as those
+ *      used in the Freescale v4e documentation.
+ */
+#define MMUCR           (MMUBASE + 0x00)        /* Control register */
+#define MMUOR           (MMUBASE + 0x04)        /* Operation register */
+#define MMUSR           (MMUBASE + 0x08)        /* Status register */
+#define MMUAR           (MMUBASE + 0x10)        /* TLB Address register */
+#define MMUTR           (MMUBASE + 0x14)        /* TLB Tag register */
+#define MMUDR           (MMUBASE + 0x18)        /* TLB Data register */
+
+/*
+ *      MMU Control register bit flags
+ */
+#define MMUCR_EN        0x00000001              /* Virtual mode enable */
+#define MMUCR_ASM       0x00000002              /* Address space mode */
+
+/*
+ *      MMU Operation register.
+ */
+#define MMUOR_UAA       0x00000001              /* Update allocatiom address */
+#define MMUOR_ACC       0x00000002              /* TLB access */
+#define MMUOR_RD        0x00000004              /* TLB access read */
+#define MMUOR_WR        0x00000000              /* TLB access write */
+#define MMUOR_ADR       0x00000008              /* TLB address select */
+#define MMUOR_ITLB      0x00000010              /* ITLB operation */
+#define MMUOR_CAS       0x00000020              /* Clear non-locked ASID TLBs */
+#define MMUOR_CNL       0x00000040              /* Clear non-locked TLBs */
+#define MMUOR_CA        0x00000080              /* Clear all TLBs */
+#define MMUOR_STLB      0x00000100              /* Search TLBs */
+#define MMUOR_AAN       16                      /* TLB allocation address */
+#define MMUOR_AAMASK    0xffff0000              /* AA mask */
+
+/*
+ *      MMU Status register.
+ */
+#define MMUSR_HIT       0x00000002              /* Search TLB hit */
+#define MMUSR_WF        0x00000008              /* Write access fault */
+#define MMUSR_RF        0x00000010              /* Read access fault */
+#define MMUSR_SPF       0x00000020              /* Supervisor protect fault */
+
+/*
+ *      MMU Read/Write Tag register.
+ */
+#define MMUTR_V         0x00000001              /* Valid */
+#define MMUTR_SG        0x00000002              /* Shared global */
+#define MMUTR_IDN       2                       /* Address Space ID */
+#define MMUTR_IDMASK    0x000003fc              /* ASID mask */
+#define MMUTR_VAN       10                      /* Virtual Address */
+#define MMUTR_VAMASK    0xfffffc00              /* VA mask */
+
+/*
+ *      MMU Read/Write Data register.
+ */
+#define MMUDR_LK        0x00000002              /* Lock entry */
+#define MMUDR_X         0x00000004              /* Execute access enable */
+#define MMUDR_W         0x00000008              /* Write access enable */
+#define MMUDR_R         0x00000010              /* Read access enable */
+#define MMUDR_SP        0x00000020              /* Supervisor access enable */
+#define MMUDR_CM_CWT    0x00000000              /* Cachable write thru */
+#define MMUDR_CM_CCB    0x00000040              /* Cachable copy back */
+#define MMUDR_CM_NCP    0x00000080              /* Non-cachable precise */
+#define MMUDR_CM_NCI    0x000000c0              /* Non-cachable imprecise */
+#define MMUDR_SZ_1MB    0x00000000              /* 1MB page size */
+#define MMUDR_SZ_4KB    0x00000100              /* 4kB page size */
+#define MMUDR_SZ_8KB    0x00000200              /* 8kB page size */
+#define MMUDR_SZ_1KB    0x00000300              /* 1kB page size */
+#define MMUDR_PAN       10                      /* Physical address */
+#define MMUDR_PAMASK    0xfffffc00              /* PA mask */
+
+#ifndef __ASSEMBLY__
+
+/*
+ *      Simple access functions for the MMU registers. Nothing fancy
+ *      currently required, just simple 32bit access.
+ */
+static inline u32 mmu_read(u32 a)
+{
+        return *((volatile u32 *) a);
+}
+
+static inline void mmu_write(u32 a, u32 v)
+{
+        *((volatile u32 *) a) = v;
+        __asm__ __volatile__ ("nop");
+}
+
+int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word);
+
+#endif
+
+#endif  /* MCFMMU_H */
diff --git a/arch/m68k/include/asm/mmu_context.h b/arch/m68k/include/asm/mmu_context.h
index 7d4341e55a99..dc3be991d634 100644
--- a/arch/m68k/include/asm/mmu_context.h
+++ b/arch/m68k/include/asm/mmu_context.h
@@ -8,7 +8,206 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 }
 
 #ifdef CONFIG_MMU
-#ifndef CONFIG_SUN3
+
+#if defined(CONFIG_COLDFIRE)
+
+#include <asm/atomic.h>
+#include <asm/bitops.h>
+#include <asm/mcfmmu.h>
+#include <asm/mmu.h>
+
+#define NO_CONTEXT              256
+#define LAST_CONTEXT            255
+#define FIRST_CONTEXT           1
+
+extern unsigned long context_map[];
+extern mm_context_t next_mmu_context;
+
+extern atomic_t nr_free_contexts;
+extern struct mm_struct *context_mm[LAST_CONTEXT+1];
+extern void steal_context(void);
+
+static inline void get_mmu_context(struct mm_struct *mm)
+{
+        mm_context_t ctx;
+
+        if (mm->context != NO_CONTEXT)
+                return;
+        while (atomic_dec_and_test_lt(&nr_free_contexts)) {
+                atomic_inc(&nr_free_contexts);
+                steal_context();
+        }
+        ctx = next_mmu_context;
+        while (test_and_set_bit(ctx, context_map)) {
+                ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
+                if (ctx > LAST_CONTEXT)
+                        ctx = 0;
+        }
+        next_mmu_context = (ctx + 1) & LAST_CONTEXT;
+        mm->context = ctx;
+        context_mm[ctx] = mm;
+}
+
+/*
+ * Set up the context for a new address space.
+ */
+#define init_new_context(tsk, mm)       (((mm)->context = NO_CONTEXT), 0)
+
+/*
+ * We're finished using the context for an address space.
+ */
+static inline void destroy_context(struct mm_struct *mm)
+{
+        if (mm->context != NO_CONTEXT) {
+                clear_bit(mm->context, context_map);
+                mm->context = NO_CONTEXT;
+                atomic_inc(&nr_free_contexts);
+        }
+}
+
+static inline void set_context(mm_context_t context, pgd_t *pgd)
+{
+        __asm__ __volatile__ ("movec %0,%%asid" : : "d" (context));
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+        struct task_struct *tsk)
+{
+        get_mmu_context(tsk->mm);
+        set_context(tsk->mm->context, next->pgd);
+}
+
+/*
+ * After we have set current->mm to a new value, this activates
+ * the context for the new mm so we see the new mappings.
+ */
+static inline void activate_mm(struct mm_struct *active_mm,
+        struct mm_struct *mm)
+{
+        get_mmu_context(mm);
+        set_context(mm->context, mm->pgd);
+}
+
+#define deactivate_mm(tsk, mm) do { } while (0)
+
+extern void mmu_context_init(void);
+#define prepare_arch_switch(next) load_ksp_mmu(next)
+
+static inline void load_ksp_mmu(struct task_struct *task)
+{
+        unsigned long flags;
+        struct mm_struct *mm;
+        int asid;
+        pgd_t *pgd;
+        pmd_t *pmd;
+        pte_t *pte;
+        unsigned long mmuar;
+
+        local_irq_save(flags);
+        mmuar = task->thread.ksp;
+
+        /* Search for a valid TLB entry, if one is found, don't remap */
+        mmu_write(MMUAR, mmuar);
+        mmu_write(MMUOR, MMUOR_STLB | MMUOR_ADR);
+        if (mmu_read(MMUSR) & MMUSR_HIT)
+                goto end;
+
+        if (mmuar >= PAGE_OFFSET) {
+                mm = &init_mm;
+        } else {
+                pr_info("load_ksp_mmu: non-kernel mm found: 0x%p\n", task->mm);
+                mm = task->mm;
+        }
+
+        if (!mm)
+                goto bug;
+
+        pgd = pgd_offset(mm, mmuar);
+        if (pgd_none(*pgd))
+                goto bug;
+
+        pmd = pmd_offset(pgd, mmuar);
+        if (pmd_none(*pmd))
+                goto bug;
+
+        pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
+                                     : pte_offset_map(pmd, mmuar);
+        if (pte_none(*pte) || !pte_present(*pte))
+                goto bug;
+
+        set_pte(pte, pte_mkyoung(*pte));
+        asid = mm->context & 0xff;
+        if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET)
+                set_pte(pte, pte_wrprotect(*pte));
+
+        mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
+                (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
+                >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
+
+        mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
+                ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
+
+        mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
+
+        goto end;
+
+bug:
+        pr_info("ksp load failed: mm=0x%p ksp=0x08%lx\n", mm, mmuar);
+end:
+        local_irq_restore(flags);
+}
+
+#elif defined(CONFIG_SUN3)
+#include <asm/sun3mmu.h>
+#include <linux/sched.h>
+
+extern unsigned long get_free_context(struct mm_struct *mm);
+extern void clear_context(unsigned long context);
+
+/* set the context for a new task to unmapped */
+static inline int init_new_context(struct task_struct *tsk,
+                                   struct mm_struct *mm)
+{
+        mm->context = SUN3_INVALID_CONTEXT;
+        return 0;
+}
+
+/* find the context given to this process, and if it hasn't already
+   got one, go get one for it. */
+static inline void get_mmu_context(struct mm_struct *mm)
+{
+        if (mm->context == SUN3_INVALID_CONTEXT)
+                mm->context = get_free_context(mm);
+}
+
+/* flush context if allocated... */
+static inline void destroy_context(struct mm_struct *mm)
+{
+        if (mm->context != SUN3_INVALID_CONTEXT)
+                clear_context(mm->context);
+}
+
+static inline void activate_context(struct mm_struct *mm)
+{
+        get_mmu_context(mm);
+        sun3_put_context(mm->context);
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk)
+{
+        activate_context(tsk->mm);
+}
+
+#define deactivate_mm(tsk, mm)  do { } while (0)
+
+static inline void activate_mm(struct mm_struct *prev_mm,
+                               struct mm_struct *next_mm)
+{
+        activate_context(next_mm);
+}
+
+#else
 
 #include <asm/setup.h>
 #include <asm/page.h>
@@ -103,55 +302,8 @@ static inline void activate_mm(struct mm_struct *prev_mm,
                 switch_mm_0460(next_mm);
 }
 
-#else  /* CONFIG_SUN3 */
-#include <asm/sun3mmu.h>
-#include <linux/sched.h>
-
-extern unsigned long get_free_context(struct mm_struct *mm);
-extern void clear_context(unsigned long context);
-
-/* set the context for a new task to unmapped */
-static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
-{
-        mm->context = SUN3_INVALID_CONTEXT;
-        return 0;
-}
-
-/* find the context given to this process, and if it hasn't already
-   got one, go get one for it. */
-static inline void get_mmu_context(struct mm_struct *mm)
-{
-        if(mm->context == SUN3_INVALID_CONTEXT)
-                mm->context = get_free_context(mm);
-}
-
-/* flush context if allocated... */
-static inline void destroy_context(struct mm_struct *mm)
-{
-        if(mm->context != SUN3_INVALID_CONTEXT)
-                clear_context(mm->context);
-}
-
-static inline void activate_context(struct mm_struct *mm)
-{
-        get_mmu_context(mm);
-        sun3_put_context(mm->context);
-}
-
-static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
-{
-        activate_context(tsk->mm);
-}
-
-#define deactivate_mm(tsk,mm)   do { } while (0)
-
-static inline void activate_mm(struct mm_struct *prev_mm,
-                               struct mm_struct *next_mm)
-{
-        activate_context(next_mm);
-}
-
 #endif
+
 #else /* !CONFIG_MMU */
 
 static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include/asm/motorola_pgtable.h
index 45bd3f589bf0..e0fdd4d08075 100644
--- a/arch/m68k/include/asm/motorola_pgtable.h
+++ b/arch/m68k/include/asm/motorola_pgtable.h
@@ -8,6 +8,7 @@
 #define _PAGE_PRESENT   0x001
 #define _PAGE_SHORT     0x002
 #define _PAGE_RONLY     0x004
+#define _PAGE_READWRITE 0x000
 #define _PAGE_ACCESSED  0x008
 #define _PAGE_DIRTY     0x010
 #define _PAGE_SUPER     0x080   /* 68040 supervisor only */
diff --git a/arch/m68k/include/asm/page.h b/arch/m68k/include/asm/page.h
index dfebb7c1e379..98baa82a8615 100644
--- a/arch/m68k/include/asm/page.h
+++ b/arch/m68k/include/asm/page.h
@@ -6,10 +6,10 @@
 #include <asm/page_offset.h>
 
 /* PAGE_SHIFT determines the page size */
-#ifndef CONFIG_SUN3
-#define PAGE_SHIFT      (12)
+#if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE)
+#define PAGE_SHIFT      13
 #else
-#define PAGE_SHIFT      (13)
+#define PAGE_SHIFT      12
 #endif
 #define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
@@ -36,6 +36,10 @@ typedef struct page *pgtable_t;
 #define __pgd(x)        ((pgd_t) { (x) } )
 #define __pgprot(x)     ((pgprot_t) { (x) } )
 
+extern unsigned long _rambase;
+extern unsigned long _ramstart;
+extern unsigned long _ramend;
+
 #endif /* !__ASSEMBLY__ */
 
 #ifdef CONFIG_MMU
diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h
index a8d1c60eb9ce..90595721185f 100644
--- a/arch/m68k/include/asm/page_no.h
+++ b/arch/m68k/include/asm/page_no.h
@@ -5,9 +5,6 @@
  
 extern unsigned long memory_start;
 extern unsigned long memory_end;
-extern unsigned long _rambase;
-extern unsigned long _ramstart;
-extern unsigned long _ramend;
 
 #define get_user_page(vaddr)            __get_free_page(GFP_KERNEL)
 #define free_user_page(page, addr)      free_page(addr)
diff --git a/arch/m68k/include/asm/page_offset.h b/arch/m68k/include/asm/page_offset.h
index 1780152d81da..82626a8f1d0a 100644
--- a/arch/m68k/include/asm/page_offset.h
+++ b/arch/m68k/include/asm/page_offset.h
@@ -1,11 +1,9 @@
 /* This handles the memory map.. */
 
-#ifdef CONFIG_MMU
-#ifndef CONFIG_SUN3
-#define PAGE_OFFSET_RAW         0x00000000
-#else
+#if defined(CONFIG_RAMBASE)
+#define PAGE_OFFSET_RAW         CONFIG_RAMBASE
+#elif defined(CONFIG_SUN3)
 #define PAGE_OFFSET_RAW         0x0E000000
-#endif
 #else
-#define PAGE_OFFSET_RAW         CONFIG_RAMBASE
+#define PAGE_OFFSET_RAW         0x00000000
 #endif
diff --git a/arch/m68k/include/asm/pgalloc.h b/arch/m68k/include/asm/pgalloc.h
index c294aad8a900..37bee7e3223d 100644
--- a/arch/m68k/include/asm/pgalloc.h
+++ b/arch/m68k/include/asm/pgalloc.h
@@ -7,7 +7,9 @@
 
 #ifdef CONFIG_MMU
 #include <asm/virtconvert.h>
-#ifdef CONFIG_SUN3
+#if defined(CONFIG_COLDFIRE)
+#include <asm/mcf_pgalloc.h>
+#elif defined(CONFIG_SUN3)
 #include <asm/sun3_pgalloc.h>
 #else
 #include <asm/motorola_pgalloc.h>
diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h
index 87174c904d2b..dc35e0e106e4 100644
--- a/arch/m68k/include/asm/pgtable_mm.h
+++ b/arch/m68k/include/asm/pgtable_mm.h
@@ -40,6 +40,8 @@
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
 #ifdef CONFIG_SUN3
 #define PGDIR_SHIFT     17
+#elif defined(CONFIG_COLDFIRE)
+#define PGDIR_SHIFT     22
 #else
 #define PGDIR_SHIFT     25
 #endif
@@ -54,6 +56,10 @@
 #define PTRS_PER_PTE   16
 #define PTRS_PER_PMD   1
 #define PTRS_PER_PGD   2048
+#elif defined(CONFIG_COLDFIRE)
+#define PTRS_PER_PTE    512
+#define PTRS_PER_PMD    1
+#define PTRS_PER_PGD    1024
 #else
 #define PTRS_PER_PTE    1024
 #define PTRS_PER_PMD    8
@@ -66,12 +72,22 @@
 #ifdef CONFIG_SUN3
 #define KMAP_START     0x0DC00000
 #define KMAP_END       0x0E000000
+#elif defined(CONFIG_COLDFIRE)
+#define KMAP_START      0xe0000000
+#define KMAP_END        0xf0000000
 #else
 #define KMAP_START      0xd0000000
 #define KMAP_END        0xf0000000
 #endif
 
-#ifndef CONFIG_SUN3
+#ifdef CONFIG_SUN3
+extern unsigned long m68k_vmalloc_end;
+#define VMALLOC_START 0x0f800000
+#define VMALLOC_END m68k_vmalloc_end
+#elif defined(CONFIG_COLDFIRE)
+#define VMALLOC_START   0xd0000000
+#define VMALLOC_END     0xe0000000
+#else
 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  * current 8MB value just means that there will be a 8MB "hole" after the
  * physical memory until the kernel virtual memory starts.  That means that
@@ -82,11 +98,7 @@
 #define VMALLOC_OFFSET  (8*1024*1024)
 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
 #define VMALLOC_END KMAP_START
-#else
-extern unsigned long m68k_vmalloc_end;
-#define VMALLOC_START 0x0f800000
-#define VMALLOC_END m68k_vmalloc_end
-#endif /* CONFIG_SUN3 */
+#endif
 
 /* zero page used for uninitialized stuff */
 extern void *empty_zero_page;
@@ -130,6 +142,8 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
 
 #ifdef CONFIG_SUN3
 #include <asm/sun3_pgtable.h>
+#elif defined(CONFIG_COLDFIRE)
+#include <asm/mcf_pgtable.h>
 #else
 #include <asm/motorola_pgtable.h>
 #endif
@@ -138,6 +152,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
 /*
  * Macro to mark a page protection value as "uncacheable".
  */
+#ifdef CONFIG_COLDFIRE
+# define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | CF_PAGE_NOCACHE))
+#else
 #ifdef SUN3_PAGE_NOCACHE
 # define __SUN3_PAGE_NOCACHE    SUN3_PAGE_NOCACHE
 #else
@@ -152,6 +169,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
             ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S))  \
             : (prot)))
 
+#endif /* CONFIG_COLDFIRE */
 #include <asm-generic/pgtable.h>
 #endif /* !__ASSEMBLY__ */
 
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index 568facf30276..46460fa15d5c 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -48,10 +48,12 @@ static inline void wrusp(unsigned long usp)
  * so don't change it unless you know what you are doing.
  */
 #ifdef CONFIG_MMU
-#ifndef CONFIG_SUN3
-#define TASK_SIZE       (0xF0000000UL)
-#else
+#if defined(CONFIG_COLDFIRE)
+#define TASK_SIZE       (0xC0000000UL)
+#elif defined(CONFIG_SUN3)
 #define TASK_SIZE       (0x0E000000UL)
+#else
+#define TASK_SIZE       (0xF0000000UL)
 #endif
 #else
 #define TASK_SIZE       (0xFFFFFFFFUL)
@@ -66,10 +68,12 @@ static inline void wrusp(unsigned long usp)
  * space during mmap's.
  */
 #ifdef CONFIG_MMU
-#ifndef CONFIG_SUN3
-#define TASK_UNMAPPED_BASE      0xC0000000UL
-#else
+#if defined(CONFIG_COLDFIRE)
+#define TASK_UNMAPPED_BASE      0x60000000UL
+#elif defined(CONFIG_SUN3)
 #define TASK_UNMAPPED_BASE      0x0A000000UL
+#else
+#define TASK_UNMAPPED_BASE      0xC0000000UL
 #endif
 #define TASK_UNMAPPED_ALIGN(addr, off)  PAGE_ALIGN(addr)
 #else
@@ -88,14 +92,12 @@ struct thread_struct {
         unsigned long  fp[8*3];
         unsigned long  fpcntl[3];       /* fp control regs */
         unsigned char  fpstate[FPSTATESIZE];  /* floating point state */
-        struct thread_info info;
 };
 
 #define INIT_THREAD  {                                                  \
         .ksp    = sizeof(init_stack) + (unsigned long) init_stack,      \
         .sr     = PS_S,                                                 \
         .fs     = __KERNEL_DS,                                          \
-        .info   = INIT_THREAD_INFO(init_task),                          \
 }
 
 #ifdef CONFIG_MMU
diff --git a/arch/m68k/include/asm/segment.h b/arch/m68k/include/asm/segment.h
index ee959219fdfe..0fa80e97ed2d 100644
--- a/arch/m68k/include/asm/segment.h
+++ b/arch/m68k/include/asm/segment.h
@@ -22,23 +22,26 @@ typedef struct {
 } mm_segment_t;
 
 #define MAKE_MM_SEG(s)  ((mm_segment_t) { (s) })
-#define USER_DS         MAKE_MM_SEG(__USER_DS)
-#define KERNEL_DS       MAKE_MM_SEG(__KERNEL_DS)
 
+#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES
 /*
  * Get/set the SFC/DFC registers for MOVES instructions
  */
+#define USER_DS         MAKE_MM_SEG(__USER_DS)
+#define KERNEL_DS       MAKE_MM_SEG(__KERNEL_DS)
 
 static inline mm_segment_t get_fs(void)
 {
-#ifdef CONFIG_MMU
         mm_segment_t _v;
         __asm__ ("movec %/dfc,%0":"=r" (_v.seg):);
-
         return _v;
-#else
-        return USER_DS;
-#endif
+}
+
+static inline void set_fs(mm_segment_t val)
+{
+        __asm__ __volatile__ ("movec %0,%/sfc\n\t"
+                              "movec %0,%/dfc\n\t"
+                              : /* no outputs */ : "r" (val.seg) : "memory");
 }
 
 static inline mm_segment_t get_ds(void)
@@ -47,14 +50,13 @@ static inline mm_segment_t get_ds(void)
     return KERNEL_DS;
 }
 
-static inline void set_fs(mm_segment_t val)
-{
-#ifdef CONFIG_MMU
-        __asm__ __volatile__ ("movec %0,%/sfc\n\t"
-                              "movec %0,%/dfc\n\t"
-                              : /* no outputs */ : "r" (val.seg) : "memory");
+#else
+#define USER_DS         MAKE_MM_SEG(TASK_SIZE)
+#define KERNEL_DS       MAKE_MM_SEG(0xFFFFFFFF)
+#define get_ds()        (KERNEL_DS)
+#define get_fs()        (current_thread_info()->addr_limit)
+#define set_fs(x)       (current_thread_info()->addr_limit = (x))
 #endif
-}
 
 #define segment_eq(a,b) ((a).seg == (b).seg)
 
diff --git a/arch/m68k/include/asm/serial.h b/arch/m68k/include/asm/serial.h
index 2b90d6e69070..7267536adbcc 100644
--- a/arch/m68k/include/asm/serial.h
+++ b/arch/m68k/include/asm/serial.h
@@ -25,9 +25,11 @@
 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
 #endif
 
+#ifdef CONFIG_ISA
 #define SERIAL_PORT_DFNS                        \
         /* UART CLK   PORT IRQ     FLAGS        */                      \
         { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },      /* ttyS0 */     \
         { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS },      /* ttyS1 */     \
         { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },      /* ttyS2 */     \
         { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS },     /* ttyS3 */
+#endif
diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h
index 4dfb3952b375..00c2c5397d37 100644
--- a/arch/m68k/include/asm/setup.h
+++ b/arch/m68k/include/asm/setup.h
@@ -40,6 +40,7 @@
 #define MACH_HP300    9
 #define MACH_Q40     10
 #define MACH_SUN3X   11
+#define MACH_M54XX   12
 
 #define COMMAND_LINE_SIZE 256
 
@@ -211,23 +212,27 @@ extern unsigned long m68k_machtype;
 #define CPUB_68030     1
 #define CPUB_68040     2
 #define CPUB_68060     3
+#define CPUB_COLDFIRE  4
 
 #define CPU_68020      (1<<CPUB_68020)
 #define CPU_68030      (1<<CPUB_68030)
 #define CPU_68040      (1<<CPUB_68040)
 #define CPU_68060      (1<<CPUB_68060)
+#define CPU_COLDFIRE   (1<<CPUB_COLDFIRE)
 
 #define FPUB_68881     0
 #define FPUB_68882     1
 #define FPUB_68040     2                       /* Internal FPU */
 #define FPUB_68060     3                       /* Internal FPU */
 #define FPUB_SUNFPA    4                       /* Sun-3 FPA */
+#define FPUB_COLDFIRE  5                       /* ColdFire FPU */
 
 #define FPU_68881      (1<<FPUB_68881)
 #define FPU_68882      (1<<FPUB_68882)
 #define FPU_68040      (1<<FPUB_68040)
 #define FPU_68060      (1<<FPUB_68060)
 #define FPU_SUNFPA     (1<<FPUB_SUNFPA)
+#define FPU_COLDFIRE   (1<<FPUB_COLDFIRE)
 
 #define MMUB_68851     0
 #define MMUB_68030     1                       /* Internal MMU */
@@ -235,6 +240,7 @@ extern unsigned long m68k_machtype;
 #define MMUB_68060     3                       /* Internal MMU */
 #define MMUB_APOLLO    4                       /* Custom Apollo */
 #define MMUB_SUN3      5                       /* Custom Sun-3 */
+#define MMUB_COLDFIRE  6                       /* Internal MMU */
 
 #define MMU_68851      (1<<MMUB_68851)
 #define MMU_68030      (1<<MMUB_68030)
@@ -242,6 +248,7 @@ extern unsigned long m68k_machtype;
 #define MMU_68060      (1<<MMUB_68060)
 #define MMU_SUN3       (1<<MMUB_SUN3)
 #define MMU_APOLLO     (1<<MMUB_APOLLO)
+#define MMU_COLDFIRE   (1<<MMUB_COLDFIRE)
 
 #ifdef __KERNEL__
 
@@ -341,6 +348,13 @@ extern int m68k_is040or060;
 #  endif
 #endif
 
+#if !defined(CONFIG_COLDFIRE)
+#  define CPU_IS_COLDFIRE (0)
+#else
+#  define CPU_IS_COLDFIRE (1)
+#  define MMU_IS_COLDFIRE (1)
+#endif
+
 #define CPU_TYPE (m68k_cputype)
 
 #ifdef CONFIG_M68KFPU_EMU
diff --git a/arch/m68k/include/asm/sigcontext.h b/arch/m68k/include/asm/sigcontext.h
index a29dd74a17cb..523db2a51cf3 100644
--- a/arch/m68k/include/asm/sigcontext.h
+++ b/arch/m68k/include/asm/sigcontext.h
@@ -15,11 +15,7 @@ struct sigcontext {
         unsigned long  sc_pc;
         unsigned short sc_formatvec;
 #ifndef __uClinux__
-# ifdef __mcoldfire__
-        unsigned long  sc_fpregs[2][2]; /* room for two fp registers */
-# else
         unsigned long  sc_fpregs[2*3];  /* room for two fp registers */
-# endif
         unsigned long  sc_fpcntl[3];
         unsigned char  sc_fpstate[216];
 #endif
diff --git a/arch/m68k/include/asm/socket.h b/arch/m68k/include/asm/socket.h
index 9bf49c87d954..d4708ce466e0 100644
--- a/arch/m68k/include/asm/socket.h
+++ b/arch/m68k/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/m68k/include/asm/thread_info.h b/arch/m68k/include/asm/thread_info.h
index 790988967ba7..e8665e6f9464 100644
--- a/arch/m68k/include/asm/thread_info.h
+++ b/arch/m68k/include/asm/thread_info.h
@@ -3,6 +3,7 @@
 
 #include <asm/types.h>
 #include <asm/page.h>
+#include <asm/segment.h>
 
 /*
  * On machines with 4k pages we default to an 8k thread size, though we
@@ -26,6 +27,7 @@ struct thread_info {
         struct task_struct      *task;          /* main task structure */
         unsigned long           flags;
         struct exec_domain      *exec_domain;   /* execution domain */
+        mm_segment_t            addr_limit;     /* thread address space */
         int                     preempt_count;  /* 0 => preemptable, <0 => BUG */
         __u32                   cpu;            /* should always be 0 on m68k */
         unsigned long           tp_value;       /* thread pointer */
@@ -39,6 +41,7 @@ struct thread_info {
 {                                               \
         .task           = &tsk,                 \
         .exec_domain    = &default_exec_domain, \
+        .addr_limit     = KERNEL_DS,            \
         .preempt_count  = INIT_PREEMPT_COUNT,   \
         .restart_block = {                      \
                 .fn = do_no_restart_syscall,    \
@@ -47,34 +50,6 @@ struct thread_info {
 
 #define init_stack              (init_thread_union.stack)
 
-#ifdef CONFIG_MMU
-
-#ifndef __ASSEMBLY__
-#include <asm/current.h>
-#endif
-
-#ifdef ASM_OFFSETS_C
-#define task_thread_info(tsk)   ((struct thread_info *) NULL)
-#else
-#include <asm/asm-offsets.h>
-#define task_thread_info(tsk)   ((struct thread_info *)((char *)tsk+TASK_TINFO))
-#endif
-
-#define init_thread_info        (init_task.thread.info)
-#define task_stack_page(tsk)    ((tsk)->stack)
-#define current_thread_info()   task_thread_info(current)
-
-#define __HAVE_THREAD_FUNCTIONS
-
-#define setup_thread_stack(p, org) ({                   \
-        *(struct task_struct **)(p)->stack = (p);       \
-        task_thread_info(p)->task = (p);                \
-})
-
-#define end_of_stack(p)         ((unsigned long *)(p)->stack + 1)
-
-#else /* !CONFIG_MMU */
-
 #ifndef __ASSEMBLY__
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
@@ -92,8 +67,6 @@ static inline struct thread_info *current_thread_info(void)
 
 #define init_thread_info        (init_thread_union.thread_info)
 
-#endif /* CONFIG_MMU */
-
 /* entry.S relies on these definitions!
  * bits 0-7 are tested at every exception exit
  * bits 8-15 are also tested at syscall exit
@@ -103,7 +76,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_DELAYED_TRACE       14      /* single step a syscall */
 #define TIF_SYSCALL_TRACE       15      /* syscall trace active */
 #define TIF_MEMDIE              16      /* is terminating due to OOM killer */
-#define TIF_FREEZE              17      /* thread is freezing for suspend */
 #define TIF_RESTORE_SIGMASK     18      /* restore signal mask in do_signal */
 
 #endif  /* _ASM_M68K_THREAD_INFO_H */
diff --git a/arch/m68k/include/asm/tlbflush.h b/arch/m68k/include/asm/tlbflush.h
index a6b4ed4fc90f..965ea35c9a40 100644
--- a/arch/m68k/include/asm/tlbflush.h
+++ b/arch/m68k/include/asm/tlbflush.h
@@ -5,10 +5,13 @@
 #ifndef CONFIG_SUN3
 
 #include <asm/current.h>
+#include <asm/mcfmmu.h>
 
 static inline void flush_tlb_kernel_page(void *addr)
 {
-        if (CPU_IS_040_OR_060) {
+        if (CPU_IS_COLDFIRE) {
+                mmu_write(MMUOR, MMUOR_CNL);
+        } else if (CPU_IS_040_OR_060) {
                 mm_segment_t old_fs = get_fs();
                 set_fs(KERNEL_DS);
                 __asm__ __volatile__(".chip 68040\n\t"
@@ -25,12 +28,15 @@ static inline void flush_tlb_kernel_page(void *addr)
  */
 static inline void __flush_tlb(void)
 {
-        if (CPU_IS_040_OR_060)
+        if (CPU_IS_COLDFIRE) {
+                mmu_write(MMUOR, MMUOR_CNL);
+        } else if (CPU_IS_040_OR_060) {
                 __asm__ __volatile__(".chip 68040\n\t"
                                      "pflushan\n\t"
                                      ".chip 68k");
-        else if (CPU_IS_020_OR_030)
+        } else if (CPU_IS_020_OR_030) {
                 __asm__ __volatile__("pflush #0,#4");
+        }
 }
 
 static inline void __flush_tlb040_one(unsigned long addr)
@@ -43,7 +49,9 @@ static inline void __flush_tlb040_one(unsigned long addr)
 
 static inline void __flush_tlb_one(unsigned long addr)
 {
-        if (CPU_IS_040_OR_060)
+        if (CPU_IS_COLDFIRE)
+                mmu_write(MMUOR, MMUOR_CNL);
+        else if (CPU_IS_040_OR_060)
                 __flush_tlb040_one(addr);
         else if (CPU_IS_020_OR_030)
                 __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr));
@@ -56,12 +64,15 @@ static inline void __flush_tlb_one(unsigned long addr)
  */
 static inline void flush_tlb_all(void)
 {
-        if (CPU_IS_040_OR_060)
+        if (CPU_IS_COLDFIRE) {
+                mmu_write(MMUOR, MMUOR_CNL);
+        } else if (CPU_IS_040_OR_060) {
                 __asm__ __volatile__(".chip 68040\n\t"
                                      "pflusha\n\t"
                                      ".chip 68k");
-        else if (CPU_IS_020_OR_030)
+        } else if (CPU_IS_020_OR_030) {
                 __asm__ __volatile__("pflusha");
+        }
 }
 
 static inline void flush_tlb_mm(struct mm_struct *mm)
diff --git a/arch/m68k/include/asm/traps.h b/arch/m68k/include/asm/traps.h
index 151068f64f44..4aff3358fbaf 100644
--- a/arch/m68k/include/asm/traps.h
+++ b/arch/m68k/include/asm/traps.h
@@ -18,6 +18,7 @@
 
 typedef void (*e_vector)(void);
 extern e_vector vectors[];
+extern e_vector *_ramvec;
 
 asmlinkage void auto_inthandler(void);
 asmlinkage void user_inthandler(void);
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
index b17fd115a4e7..89705adcbd52 100644
--- a/arch/m68k/include/asm/types.h
+++ b/arch/m68k/include/asm/types.h
@@ -10,12 +10,6 @@
  */
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/m68k/include/asm/uaccess_mm.h b/arch/m68k/include/asm/uaccess_mm.h
index 7107f3fbdbb6..9c80cd515b20 100644
--- a/arch/m68k/include/asm/uaccess_mm.h
+++ b/arch/m68k/include/asm/uaccess_mm.h
@@ -21,6 +21,22 @@ static inline int access_ok(int type, const void __user *addr,
 }
 
 /*
+ * Not all varients of the 68k family support the notion of address spaces.
+ * The traditional 680x0 parts do, and they use the sfc/dfc registers and
+ * the "moves" instruction to access user space from kernel space. Other
+ * family members like ColdFire don't support this, and only have a single
+ * address space, and use the usual "move" instruction for user space access.
+ *
+ * Outside of this difference the user space access functions are the same.
+ * So lets keep the code simple and just define in what we need to use.
+ */
+#ifdef CONFIG_CPU_HAS_ADDRESS_SPACES
+#define MOVES   "moves"
+#else
+#define MOVES   "move"
+#endif
+
+/*
  * The exception table consists of pairs of addresses: the first is the
  * address of an instruction that is allowed to fault, and the second is
  * the address at which the program should continue.  No registers are
@@ -43,7 +59,7 @@ extern int __get_user_bad(void);
 
 #define __put_user_asm(res, x, ptr, bwl, reg, err)      \
 asm volatile ("\n"                                      \
-        "1:     moves."#bwl"    %2,%1\n"                \
+        "1:     "MOVES"."#bwl"  %2,%1\n"                \
         "2:\n"                                          \
         "       .section .fixup,\"ax\"\n"               \
         "       .even\n"                                \
@@ -83,8 +99,8 @@ asm volatile ("\n"					\
             {                                                           \
                 const void __user *__pu_ptr = (ptr);                    \
                 asm volatile ("\n"                                      \
-                        "1:     moves.l %2,(%1)+\n"                     \
-                        "2:     moves.l %R2,(%1)\n"                     \
+                        "1:     "MOVES".l       %2,(%1)+\n"             \
+                        "2:     "MOVES".l       %R2,(%1)\n"             \
                         "3:\n"                                          \
                         "       .section .fixup,\"ax\"\n"               \
                         "       .even\n"                                \
@@ -115,12 +131,12 @@ asm volatile ("\n"					\
 #define __get_user_asm(res, x, ptr, type, bwl, reg, err) ({     \
         type __gu_val;                                          \
         asm volatile ("\n"                                      \
-                "1:     moves."#bwl"    %2,%1\n"                \
+                "1:     "MOVES"."#bwl"  %2,%1\n"                \
                 "2:\n"                                          \
                 "       .section .fixup,\"ax\"\n"               \
                 "       .even\n"                                \
                 "10:    move.l  %3,%0\n"                        \
-                "       sub."#bwl"      %1,%1\n"                \
+                "       sub.l   %1,%1\n"                        \
                 "       jra     2b\n"                           \
                 "       .previous\n"                            \
                 "\n"                                            \
@@ -152,8 +168,8 @@ asm volatile ("\n"					\
                 const void *__gu_ptr = (ptr);                           \
                 u64 __gu_val;                                           \
                 asm volatile ("\n"                                      \
-                        "1:     moves.l (%2)+,%1\n"                     \
-                        "2:     moves.l (%2),%R1\n"                     \
+                        "1:     "MOVES".l       (%2)+,%1\n"             \
+                        "2:     "MOVES".l       (%2),%R1\n"             \
                         "3:\n"                                          \
                         "       .section .fixup,\"ax\"\n"               \
                         "       .even\n"                                \
@@ -188,12 +204,12 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from, unsigned
 
 #define __constant_copy_from_user_asm(res, to, from, tmp, n, s1, s2, s3)\
         asm volatile ("\n"                                              \
-                "1:     moves."#s1"     (%2)+,%3\n"                     \
+                "1:     "MOVES"."#s1"   (%2)+,%3\n"                     \
                 "       move."#s1"      %3,(%1)+\n"                     \
-                "2:     moves."#s2"     (%2)+,%3\n"                     \
+                "2:     "MOVES"."#s2"   (%2)+,%3\n"                     \
                 "       move."#s2"      %3,(%1)+\n"                     \
                 "       .ifnc   \""#s3"\",\"\"\n"                       \
-                "3:     moves."#s3"     (%2)+,%3\n"                     \
+                "3:     "MOVES"."#s3"   (%2)+,%3\n"                     \
                 "       move."#s3"      %3,(%1)+\n"                     \
                 "       .endif\n"                                       \
                 "4:\n"                                                  \
@@ -269,13 +285,13 @@ __constant_copy_from_user(void *to, const void __user *from, unsigned long n)
 #define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3)  \
         asm volatile ("\n"                                              \
                 "       move."#s1"      (%2)+,%3\n"                     \
-                "11:    moves."#s1"     %3,(%1)+\n"                     \
+                "11:    "MOVES"."#s1"   %3,(%1)+\n"                     \
                 "12:    move."#s2"      (%2)+,%3\n"                     \
-                "21:    moves."#s2"     %3,(%1)+\n"                     \
+                "21:    "MOVES"."#s2"   %3,(%1)+\n"                     \
                 "22:\n"                                                 \
                 "       .ifnc   \""#s3"\",\"\"\n"                       \
                 "       move."#s3"      (%2)+,%3\n"                     \
-                "31:    moves."#s3"     %3,(%1)+\n"                     \
+                "31:    "MOVES"."#s3"   %3,(%1)+\n"                     \
                 "32:\n"                                                 \
                 "       .endif\n"                                       \
                 "4:\n"                                                  \
diff --git a/arch/m68k/include/asm/ucontext.h b/arch/m68k/include/asm/ucontext.h
index 00dcc5176c57..e4e22669edc0 100644
--- a/arch/m68k/include/asm/ucontext.h
+++ b/arch/m68k/include/asm/ucontext.h
@@ -7,11 +7,7 @@ typedef greg_t gregset_t[NGREG];
 
 typedef struct fpregset {
         int f_fpcntl[3];
-#ifdef __mcoldfire__
-        int f_fpregs[8][2];
-#else
         int f_fpregs[8*3];
-#endif
 } fpregset_t;
 
 struct mcontext {
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 43f984e93970..ea0b502f845e 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -132,10 +132,10 @@
 #define __NR_adjtimex           124
 #define __NR_mprotect           125
 #define __NR_sigprocmask        126
-/*#define __NR_create_module    127*/
+#define __NR_create_module      127
 #define __NR_init_module        128
 #define __NR_delete_module      129
-/*#define __NR_get_kernel_syms  130*/
+#define __NR_get_kernel_syms    130
 #define __NR_quotactl           131
 #define __NR_getpgid            132
 #define __NR_fchdir             133
@@ -172,7 +172,7 @@
 #define __NR_setresuid          164
 #define __NR_getresuid          165
 #define __NR_getpagesize        166
-/*#define __NR_query_module     167*/
+#define __NR_query_module       167
 #define __NR_poll               168
 #define __NR_nfsservctl         169
 #define __NR_setresgid          170
@@ -193,8 +193,8 @@
 #define __NR_capset             185
 #define __NR_sigaltstack        186
 #define __NR_sendfile           187
-/*#define __NR_getpmsg          188*/   /* some people actually want streams */
-/*#define __NR_putpmsg          189*/   /* some people actually want streams */
+#define __NR_getpmsg            188     /* some people actually want streams */
+#define __NR_putpmsg            189     /* some people actually want streams */
 #define __NR_vfork              190
 #define __NR_ugetrlimit         191
 #define __NR_mmap2              192
@@ -350,10 +350,12 @@
 #define __NR_clock_adjtime      342
 #define __NR_syncfs             343
 #define __NR_setns              344
+#define __NR_process_vm_readv   345
+#define __NR_process_vm_writev  346
 
 #ifdef __KERNEL__
 
-#define NR_syscalls             345
+#define NR_syscalls             347
 
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index c5696193281a..40d29a788b05 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -2,19 +2,24 @@
 # Makefile for the linux kernel.
 #
 
-extra-$(CONFIG_MMU)     := head.o
+extra-$(CONFIG_AMIGA)   := head.o
+extra-$(CONFIG_ATARI)   := head.o
+extra-$(CONFIG_MAC)     := head.o
+extra-$(CONFIG_APOLLO)  := head.o
+extra-$(CONFIG_VME)     := head.o
+extra-$(CONFIG_HP300)   := head.o
+extra-$(CONFIG_Q40)     := head.o
+extra-$(CONFIG_SUN3X)   := head.o
 extra-$(CONFIG_SUN3)    := sun3-head.o
 extra-y                 += vmlinux.lds
 
-obj-y   := entry.o irq.o m68k_ksyms.o module.o process.o ptrace.o setup.o \
-           signal.o sys_m68k.o syscalltable.o time.o traps.o
+obj-y   := entry.o init_task.o irq.o m68k_ksyms.o module.o process.o ptrace.o
+obj-y   += setup.o signal.o sys_m68k.o syscalltable.o time.o traps.o
 
-obj-$(CONFIG_MMU)       += ints.o vectors.o
+obj-$(CONFIG_MMU_MOTOROLA) += ints.o vectors.o
+obj-$(CONFIG_MMU_SUN3) += ints.o vectors.o
 
 ifndef CONFIG_MMU_SUN3
-obj-y                   += dma.o
-endif
-ifndef CONFIG_MMU
-obj-y                   += init_task.o
+obj-y   += dma.o
 endif
 
diff --git a/arch/m68k/kernel/asm-offsets.c b/arch/m68k/kernel/asm-offsets.c
index 983fed9d469b..a972b00cd77d 100644
--- a/arch/m68k/kernel/asm-offsets.c
+++ b/arch/m68k/kernel/asm-offsets.c
@@ -24,8 +24,7 @@ int main(void)
         /* offsets into the task struct */
         DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
         DEFINE(TASK_MM, offsetof(struct task_struct, mm));
-        DEFINE(TASK_INFO, offsetof(struct task_struct, thread.info));
-        DEFINE(TASK_TINFO, offsetof(struct task_struct, thread.info));
+        DEFINE(TASK_STACK, offsetof(struct task_struct, stack));
 
         /* offsets into the thread struct */
         DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 081cf96f243b..b8daf64e347d 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -1,4 +1,4 @@
-#ifdef CONFIG_MMU
+#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
 #include "entry_mm.S"
 #else
 #include "entry_no.S"
diff --git a/arch/m68k/kernel/entry_mm.S b/arch/m68k/kernel/entry_mm.S
index c713f514843d..675a854966a6 100644
--- a/arch/m68k/kernel/entry_mm.S
+++ b/arch/m68k/kernel/entry_mm.S
@@ -99,7 +99,8 @@ do_trace_exit:
         jra     .Lret_from_exception
 
 ENTRY(ret_from_signal)
-        tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
+        movel   %curptr@(TASK_STACK),%a1
+        tstb    %a1@(TINFO_FLAGS+2)
         jge     1f
         jbsr    syscall_trace
 1:      RESTORE_SWITCH_STACK
@@ -120,11 +121,13 @@ ENTRY(system_call)
         SAVE_ALL_SYS
 
         GET_CURRENT(%d1)
+        movel   %d1,%a1
+
         | save top of frame
         movel   %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
 
         | syscall trace?
-        tstb    %curptr@(TASK_INFO+TINFO_FLAGS+2)
+        tstb    %a1@(TINFO_FLAGS+2)
         jmi     do_trace_entry
         cmpl    #NR_syscalls,%d0
         jcc     badsys
@@ -133,7 +136,8 @@ syscall:
         movel   %d0,%sp@(PT_OFF_D0)     | save the return value
 ret_from_syscall:
         |oriw   #0x0700,%sr
-        movew   %curptr@(TASK_INFO+TINFO_FLAGS+2),%d0
+        movel   %curptr@(TASK_STACK),%a1
+        movew   %a1@(TINFO_FLAGS+2),%d0
         jne     syscall_exit_work
 1:      RESTORE_ALL
 
@@ -159,7 +163,8 @@ ENTRY(ret_from_exception)
         andw    #ALLOWINT,%sr
 
 resume_userspace:
-        moveb   %curptr@(TASK_INFO+TINFO_FLAGS+3),%d0
+        movel   %curptr@(TASK_STACK),%a1
+        moveb   %a1@(TINFO_FLAGS+3),%d0
         jne     exit_work
 1:      RESTORE_ALL
 
@@ -199,7 +204,8 @@ do_delayed_trace:
 ENTRY(auto_inthandler)
         SAVE_ALL_INT
         GET_CURRENT(%d0)
-        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        movel   %d0,%a1
+        addqb   #1,%a1@(TINFO_PREEMPT+1)
                                         |  put exception # in d0
         bfextu  %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
         subw    #VEC_SPUR,%d0
@@ -211,7 +217,8 @@ auto_irqhandler_fixup = . + 2
         addql   #8,%sp                  |  pop parameters off stack
 
 ret_from_interrupt:
-        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        movel   %curptr@(TASK_STACK),%a1
+        subqb   #1,%a1@(TINFO_PREEMPT+1)
         jeq     ret_from_last_interrupt
 2:      RESTORE_ALL
 
@@ -232,7 +239,8 @@ ret_from_last_interrupt:
 ENTRY(user_inthandler)
         SAVE_ALL_INT
         GET_CURRENT(%d0)
-        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        movel   %d0,%a1
+        addqb   #1,%a1@(TINFO_PREEMPT+1)
                                         |  put exception # in d0
         bfextu  %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
 user_irqvec_fixup = . + 2
@@ -243,7 +251,8 @@ user_irqvec_fixup = . + 2
         jsr     do_IRQ                  |  process the IRQ
         addql   #8,%sp                  |  pop parameters off stack
 
-        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        movel   %curptr@(TASK_STACK),%a1
+        subqb   #1,%a1@(TINFO_PREEMPT+1)
         jeq     ret_from_last_interrupt
         RESTORE_ALL
 
@@ -252,13 +261,15 @@ user_irqvec_fixup = . + 2
 ENTRY(bad_inthandler)
         SAVE_ALL_INT
         GET_CURRENT(%d0)
-        addqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        movel   %d0,%a1
+        addqb   #1,%a1@(TINFO_PREEMPT+1)
 
         movel   %sp,%sp@-
         jsr     handle_badint
         addql   #4,%sp
 
-        subqb   #1,%curptr@(TASK_INFO+TINFO_PREEMPT+1)
+        movel   %curptr@(TASK_STACK),%a1
+        subqb   #1,%a1@(TINFO_PREEMPT+1)
         jeq     ret_from_last_interrupt
         RESTORE_ALL
 
diff --git a/arch/m68k/kernel/entry_no.S b/arch/m68k/kernel/entry_no.S
index 1b4289061a64..d80cba45589f 100644
--- a/arch/m68k/kernel/entry_no.S
+++ b/arch/m68k/kernel/entry_no.S
@@ -44,8 +44,7 @@
 
 ENTRY(buserr)
         SAVE_ALL_INT
-        moveq   #-1,%d0
-        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+        GET_CURRENT(%d0)
         movel   %sp,%sp@-               /* stack frame pointer argument */
         jsr     buserr_c
         addql   #4,%sp
@@ -53,8 +52,7 @@ ENTRY(buserr)
 
 ENTRY(trap)
         SAVE_ALL_INT
-        moveq   #-1,%d0
-        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+        GET_CURRENT(%d0)
         movel   %sp,%sp@-               /* stack frame pointer argument */
         jsr     trap_c
         addql   #4,%sp
@@ -65,8 +63,7 @@ ENTRY(trap)
 .globl dbginterrupt
 ENTRY(dbginterrupt)
         SAVE_ALL_INT
-        moveq   #-1,%d0
-        movel   %d0,%sp@(PT_OFF_ORIG_D0)
+        GET_CURRENT(%d0)
         movel   %sp,%sp@-               /* stack frame pointer argument */
         jsr     dbginterrupt_c
         addql   #4,%sp
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index 27622b3273c1..d197e7ff62c5 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@ -250,9 +250,8 @@
  * USE_MFP:     Use the ST-MFP port (Modem1) for serial debug.
  *
  * Macintosh constants:
- * MAC_SERIAL_DEBUG:    Turns on serial debug output for the Macintosh.
- * MAC_USE_SCC_A:       Use the SCC port A (modem) for serial debug.
- * MAC_USE_SCC_B:       Use the SCC port B (printer) for serial debug (default).
+ * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console.
+ * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console.
  */
 
 #include <linux/linkage.h>
@@ -268,33 +267,25 @@
 
 #include <asm/machw.h>
 
-/*
- * Macintosh console support
- */
-
 #ifdef CONFIG_FRAMEBUFFER_CONSOLE
 #define CONSOLE
 #define CONSOLE_PENGUIN
 #endif
 
-/*
- * Macintosh serial debug support; outputs boot info to the printer
- *   and/or modem serial ports
- */
-#undef MAC_SERIAL_DEBUG
+#ifdef CONFIG_EARLY_PRINTK
+#define SERIAL_DEBUG
+#else
+#undef SERIAL_DEBUG
+#endif
 
-/*
- * Macintosh serial debug port selection; define one or both;
- *   requires MAC_SERIAL_DEBUG to be defined
- */
-#define MAC_USE_SCC_A           /* Macintosh modem serial port */
-#define MAC_USE_SCC_B           /* Macintosh printer serial port */
+#else /* !CONFIG_MAC */
 
-#endif  /* CONFIG_MAC */
+#define SERIAL_DEBUG
+
+#endif /* !CONFIG_MAC */
 
 #undef MMU_PRINT
 #undef MMU_NOCACHE_KERNEL
-#define SERIAL_DEBUG
 #undef DEBUG
 
 /*
@@ -655,11 +646,11 @@ ENTRY(__start)
         lea     %pc@(L(mac_rowbytes)),%a1
         movel   %a0@,%a1@
 
-#ifdef MAC_SERIAL_DEBUG
+#ifdef SERIAL_DEBUG
         get_bi_record   BI_MAC_SCCBASE
         lea     %pc@(L(mac_sccbase)),%a1
         movel   %a0@,%a1@
-#endif /* MAC_SERIAL_DEBUG */
+#endif
 
 #if 0
         /*
@@ -1427,7 +1418,7 @@ L(mmu_fixup_done):
         subl    %d0,L(console_font)
         subl    %d0,L(console_font_data)
 #endif
-#ifdef MAC_SERIAL_DEBUG
+#ifdef SERIAL_DEBUG
         orl     #0x50000000,L(mac_sccbase)
 #endif
 1:
@@ -1917,7 +1908,7 @@ mmu_030_print:
         jbne    30b
 
 mmu_print_done:
-        puts    "\n\n"
+        puts    "\n"
 
 func_return     mmu_print
 
@@ -2768,7 +2759,7 @@ L(scc_initable_mac):
         .byte   9,0             /* no interrupts */
         .byte   10,0            /* NRZ */
         .byte   11,0x50         /* use baud rate generator */
-        .byte   12,10,13,0      /* 9600 baud */
+        .byte   12,1,13,0       /* 38400 baud */
         .byte   14,1            /* Baud rate generator enable */
         .byte   3,0xc1          /* enable receiver */
         .byte   5,0xea          /* enable transmitter */
@@ -2906,10 +2897,12 @@ func_start	serial_init,%d0/%d1/%a0/%a1
 #endif
 #ifdef CONFIG_MAC
         is_not_mac(L(serial_init_not_mac))
-#ifdef MAC_SERIAL_DEBUG
-#if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
-#define MAC_USE_SCC_B
-#endif
+
+#ifdef SERIAL_DEBUG
+/* You may define either or both of these. */
+#define MAC_USE_SCC_A /* Modem port */
+#define MAC_USE_SCC_B /* Printer port */
+
 #define mac_scc_cha_b_ctrl_offset       0x0
 #define mac_scc_cha_a_ctrl_offset       0x2
 #define mac_scc_cha_b_data_offset       0x4
@@ -2940,7 +2933,7 @@ func_start	serial_init,%d0/%d1/%a0/%a1
         jra     7b
 8:
 #endif  /* MAC_USE_SCC_B */
-#endif  /* MAC_SERIAL_DEBUG */
+#endif  /* SERIAL_DEBUG */
 
         jra     L(serial_init_done)
 L(serial_init_not_mac):
@@ -3011,7 +3004,7 @@ func_start	serial_putc,%d0/%d1/%a0/%a1
 #ifdef CONFIG_MAC
         is_not_mac(5f)
 
-#ifdef MAC_SERIAL_DEBUG
+#ifdef SERIAL_DEBUG
 
 #ifdef MAC_USE_SCC_A
         movel   %pc@(L(mac_sccbase)),%a1
@@ -3029,7 +3022,7 @@ func_start	serial_putc,%d0/%d1/%a0/%a1
         moveb   %d0,%a1@(mac_scc_cha_b_data_offset)
 #endif  /* MAC_USE_SCC_B */
 
-#endif  /* MAC_SERIAL_DEBUG */
+#endif  /* SERIAL_DEBUG */
 
         jra     L(serial_putc_done)
 5:
@@ -3248,33 +3241,39 @@ func_return	putn
 
 #ifdef CONFIG_MAC
 /*
- *      mac_serial_print
+ *      mac_early_print
  *
  *      This routine takes its parameters on the stack.  It then
- *      turns around and calls the internal routine.  This routine
- *      is used until the Linux console driver initializes itself.
+ *      turns around and calls the internal routines.  This routine
+ *      is used by the boot console.
  *
  *      The calling parameters are:
- *              void mac_serial_print(const char *str);
+ *              void mac_early_print(const char *str, unsigned length);
  *
  *      This routine does NOT understand variable arguments only
  *      simple strings!
  */
-ENTRY(mac_serial_print)
-        moveml  %d0/%a0,%sp@-
-#if 1
-        move    %sr,%sp@-
+ENTRY(mac_early_print)
+        moveml  %d0/%d1/%a0,%sp@-
+        movew   %sr,%sp@-
         ori     #0x0700,%sr
-#endif
-        movel   %sp@(10),%a0            /* fetch parameter */
+        movel   %sp@(18),%a0            /* fetch parameter */
+        movel   %sp@(22),%d1            /* fetch parameter */
         jra     2f
-1:      serial_putc     %d0
-2:      moveb   %a0@+,%d0
-        jne     1b
-#if 1
-        move    %sp@+,%sr
+1:
+#ifdef CONSOLE
+        console_putc    %d0
 #endif
-        moveml  %sp@+,%d0/%a0
+#ifdef SERIAL_DEBUG
+        serial_putc     %d0
+#endif
+        subq    #1,%d1
+2:      jeq     3f
+        moveb   %a0@+,%d0
+        jne     1b
+3:
+        movew   %sp@+,%sr
+        moveml  %sp@+,%d0/%d1/%a0
         rts
 #endif /* CONFIG_MAC */
 
@@ -3409,10 +3408,10 @@ func_start	console_put_stats,%a0/%d7
          *              a0 = pointer to boot_info
          *              d7 = value of boot_info fields
          */
-        puts    "\nMacLinux\n\n"
+        puts    "\nMacLinux\n"
 
 #ifdef SERIAL_DEBUG
-        puts    " vidaddr:"
+        puts    "\n vidaddr:"
         putn    %pc@(L(mac_videobase))          /* video addr. */
 
         puts    "\n  _stext:"
@@ -3423,19 +3422,21 @@ func_start	console_put_stats,%a0/%d7
         lea     %pc@(_end),%a0
         putn    %a0
 
-        puts    "\ncpuid:"
+        puts    "\n   cpuid:"
         putn    %pc@(L(cputype))
-        putc    '\n'
 
-#ifdef MAC_SERIAL_DEBUG
+#  ifdef CONFIG_MAC
+        puts    "\n sccbase:"
         putn    %pc@(L(mac_sccbase))
+#  endif
+#  ifdef MMU_PRINT
         putc    '\n'
-#endif
-#  if defined(MMU_PRINT)
         jbsr    mmu_print_machine_cpu_types
-#  endif /* MMU_PRINT */
+#  endif
 #endif /* SERIAL_DEBUG */
 
+        putc    '\n'
+
 func_return     console_put_stats
 
 #ifdef CONSOLE_PENGUIN
@@ -3896,11 +3897,11 @@ L(mac_dimensions):
         .long   0
 L(mac_rowbytes):
         .long   0
-#ifdef MAC_SERIAL_DEBUG
+#ifdef SERIAL_DEBUG
 L(mac_sccbase):
         .long   0
-#endif /* MAC_SERIAL_DEBUG */
 #endif
+#endif /* CONFIG_MAC */
 
 #if defined (CONFIG_APOLLO)
 LSRB0        = 0x10412
diff --git a/arch/m68k/kernel/init_task.c b/arch/m68k/kernel/init_task.c
index cbf9dc3cc51d..c744cfc6bfa1 100644
--- a/arch/m68k/kernel/init_task.c
+++ b/arch/m68k/kernel/init_task.c
@@ -19,7 +19,6 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  *
  * All other task structs will be allocated on slabs in fork.c
  */
-__asm__(".align 4");
 struct task_struct init_task = INIT_TASK(init_task);
 
 EXPORT_SYMBOL(init_task);
@@ -27,7 +26,7 @@ EXPORT_SYMBOL(init_task);
 /*
  * Initial thread structure.
  *
- * We need to make sure that this is 8192-byte aligned due to the
+ * We need to make sure that this is THREAD size aligned due to the
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
diff --git a/arch/m68k/kernel/m68k_ksyms.c b/arch/m68k/kernel/m68k_ksyms.c
index 1b7a14d1a000..774c1bd59c36 100644
--- a/arch/m68k/kernel/m68k_ksyms.c
+++ b/arch/m68k/kernel/m68k_ksyms.c
@@ -14,7 +14,7 @@ EXPORT_SYMBOL(__ashrdi3);
 EXPORT_SYMBOL(__lshrdi3);
 EXPORT_SYMBOL(__muldi3);
 
-#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
+#if defined(CONFIG_CPU_HAS_NO_MULDIV64)
 /*
  * Simpler 68k and ColdFire parts also need a few other gcc functions.
  */
diff --git a/arch/m68k/kernel/process_mm.c b/arch/m68k/kernel/process_mm.c
index 1bc223aa07ec..125f34e00bf0 100644
--- a/arch/m68k/kernel/process_mm.c
+++ b/arch/m68k/kernel/process_mm.c
@@ -33,22 +33,6 @@
 #include <asm/setup.h>
 #include <asm/pgtable.h>
 
-/*
- * Initial task/thread structure. Make this a per-architecture thing,
- * because different architectures tend to have different
- * alignment requirements and potentially different initial
- * setup.
- */
-static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
-static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
-union thread_union init_thread_union __init_task_data
-        __attribute__((aligned(THREAD_SIZE))) =
-                { INIT_THREAD_INFO(init_task) };
-
-/* initial task structure */
-struct task_struct init_task = INIT_TASK(init_task);
-
-EXPORT_SYMBOL(init_task);
 
 asmlinkage void ret_from_fork(void);
 
@@ -188,9 +172,7 @@ void flush_thread(void)
 
         current->thread.fs = __USER_DS;
         if (!FPU_IS_EMU)
-                asm volatile (".chip 68k/68881\n\t"
-                              "frestore %0@\n\t"
-                              ".chip 68k" : : "a" (&zero));
+                asm volatile ("frestore %0@" : : "a" (&zero) : "memory");
 }
 
 /*
@@ -264,11 +246,28 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
                 /* Copy the current fpu state */
                 asm volatile ("fsave %0" : : "m" (p->thread.fpstate[0]) : "memory");
 
-                if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2])
-                  asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
-                                "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
-                                : : "m" (p->thread.fp[0]), "m" (p->thread.fpcntl[0])
-                                : "memory");
+                if (!CPU_IS_060 ? p->thread.fpstate[0] : p->thread.fpstate[2]) {
+                        if (CPU_IS_COLDFIRE) {
+                                asm volatile ("fmovemd %/fp0-%/fp7,%0\n\t"
+                                              "fmovel %/fpiar,%1\n\t"
+                                              "fmovel %/fpcr,%2\n\t"
+                                              "fmovel %/fpsr,%3"
+                                              :
+                                              : "m" (p->thread.fp[0]),
+                                                "m" (p->thread.fpcntl[0]),
+                                                "m" (p->thread.fpcntl[1]),
+                                                "m" (p->thread.fpcntl[2])
+                                              : "memory");
+                        } else {
+                                asm volatile ("fmovemx %/fp0-%/fp7,%0\n\t"
+                                              "fmoveml %/fpiar/%/fpcr/%/fpsr,%1"
+                                              :
+                                              : "m" (p->thread.fp[0]),
+                                                "m" (p->thread.fpcntl[0])
+                                              : "memory");
+                        }
+                }
+
                 /* Restore the state in case the fpu was busy */
                 asm volatile ("frestore %0" : : "m" (p->thread.fpstate[0]));
         }
@@ -301,12 +300,28 @@ int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
         if (!CPU_IS_060 ? !fpustate[0] : !fpustate[2])
                 return 0;
 
-        asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
-                :: "m" (fpu->fpcntl[0])
-                : "memory");
-        asm volatile ("fmovemx %/fp0-%/fp7,%0"
-                :: "m" (fpu->fpregs[0])
-                : "memory");
+        if (CPU_IS_COLDFIRE) {
+                asm volatile ("fmovel %/fpiar,%0\n\t"
+                              "fmovel %/fpcr,%1\n\t"
+                              "fmovel %/fpsr,%2\n\t"
+                              "fmovemd %/fp0-%/fp7,%3"
+                              :
+                              : "m" (fpu->fpcntl[0]),
+                                "m" (fpu->fpcntl[1]),
+                                "m" (fpu->fpcntl[2]),
+                                "m" (fpu->fpregs[0])
+                              : "memory");
+        } else {
+                asm volatile ("fmovem %/fpiar/%/fpcr/%/fpsr,%0"
+                              :
+                              : "m" (fpu->fpcntl[0])
+                              : "memory");
+                asm volatile ("fmovemx %/fp0-%/fp7,%0"
+                              :
+                              : "m" (fpu->fpregs[0])
+                              : "memory");
+        }
+
         return 1;
 }
 EXPORT_SYMBOL(dump_fpu);
diff --git a/arch/m68k/kernel/ptrace_mm.c b/arch/m68k/kernel/ptrace_mm.c
index 0b252683cefb..7bc999b73529 100644
--- a/arch/m68k/kernel/ptrace_mm.c
+++ b/arch/m68k/kernel/ptrace_mm.c
@@ -18,6 +18,7 @@
 #include <linux/ptrace.h>
 #include <linux/user.h>
 #include <linux/signal.h>
+#include <linux/tracehook.h>
 
 #include <asm/uaccess.h>
 #include <asm/page.h>
@@ -275,3 +276,20 @@ asmlinkage void syscall_trace(void)
                 current->exit_code = 0;
         }
 }
+
+#ifdef CONFIG_COLDFIRE
+asmlinkage int syscall_trace_enter(void)
+{
+        int ret = 0;
+
+        if (test_thread_flag(TIF_SYSCALL_TRACE))
+                ret = tracehook_report_syscall_entry(task_pt_regs(current));
+        return ret;
+}
+
+asmlinkage void syscall_trace_leave(void)
+{
+        if (test_thread_flag(TIF_SYSCALL_TRACE))
+                tracehook_report_syscall_exit(task_pt_regs(current), 0);
+}
+#endif /* CONFIG_COLDFIRE */
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
index c3b45061dd08..d872ce4807c9 100644
--- a/arch/m68k/kernel/setup_mm.c
+++ b/arch/m68k/kernel/setup_mm.c
@@ -221,7 +221,8 @@ void __init setup_arch(char **cmdline_p)
 #endif
 
         /* The bootinfo is located right after the kernel bss */
-        m68k_parse_bootinfo((const struct bi_record *)_end);
+        if (!CPU_IS_COLDFIRE)
+                m68k_parse_bootinfo((const struct bi_record *)_end);
 
         if (CPU_IS_040)
                 m68k_is040or060 = 4;
@@ -235,7 +236,7 @@ void __init setup_arch(char **cmdline_p)
          *  with them, we should add a test to check_bugs() below] */
 #ifndef CONFIG_M68KFPU_EMU_ONLY
         /* clear the fpu if we have one */
-        if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060)) {
+        if (m68k_fputype & (FPU_68881|FPU_68882|FPU_68040|FPU_68060|FPU_COLDFIRE)) {
                 volatile int zero = 0;
                 asm volatile ("frestore %0" : : "m" (zero));
         }
@@ -258,6 +259,10 @@ void __init setup_arch(char **cmdline_p)
         init_mm.end_data = (unsigned long)_edata;
         init_mm.brk = (unsigned long)_end;
 
+#if defined(CONFIG_BOOTPARAM)
+        strncpy(m68k_command_line, CONFIG_BOOTPARAM_STRING, CL_SIZE);
+        m68k_command_line[CL_SIZE - 1] = 0;
+#endif /* CONFIG_BOOTPARAM */
         *cmdline_p = m68k_command_line;
         memcpy(boot_command_line, *cmdline_p, CL_SIZE);
 
@@ -323,6 +328,11 @@ void __init setup_arch(char **cmdline_p)
                 config_sun3x();
                 break;
 #endif
+#ifdef CONFIG_COLDFIRE
+        case MACH_M54XX:
+                config_BSP(NULL, 0);
+                break;
+#endif
         default:
                 panic("No configuration setup");
         }
@@ -384,6 +394,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 #define LOOP_CYCLES_68030       (8)
 #define LOOP_CYCLES_68040       (3)
 #define LOOP_CYCLES_68060       (1)
+#define LOOP_CYCLES_COLDFIRE    (2)
 
         if (CPU_IS_020) {
                 cpu = "68020";
@@ -397,6 +408,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         } else if (CPU_IS_060) {
                 cpu = "68060";
                 clockfactor = LOOP_CYCLES_68060;
+        } else if (CPU_IS_COLDFIRE) {
+                cpu = "ColdFire";
+                clockfactor = LOOP_CYCLES_COLDFIRE;
         } else {
                 cpu = "680x0";
                 clockfactor = 0;
@@ -415,6 +429,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 fpu = "68060";
         else if (m68k_fputype & FPU_SUNFPA)
                 fpu = "Sun FPA";
+        else if (m68k_fputype & FPU_COLDFIRE)
+                fpu = "ColdFire";
         else
                 fpu = "none";
 #endif
@@ -431,6 +447,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 mmu = "Sun-3";
         else if (m68k_mmutype & MMU_APOLLO)
                 mmu = "Apollo";
+        else if (m68k_mmutype & MMU_COLDFIRE)
+                mmu = "ColdFire";
         else
                 mmu = "unknown";
 
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
index 2ed8c0fb1517..ca3df0dc7e88 100644
--- a/arch/m68k/kernel/setup_no.c
+++ b/arch/m68k/kernel/setup_no.c
@@ -47,7 +47,6 @@ EXPORT_SYMBOL(memory_end);
 char __initdata command_line[COMMAND_LINE_SIZE];
 
 /* machine dependent timer functions */
-void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
 int (*mach_set_clock_mmss)(unsigned long);
 
 /* machine dependent reboot functions */
diff --git a/arch/m68k/kernel/signal_mm.c b/arch/m68k/kernel/signal_mm.c
index a0afc239304e..cb856f9da655 100644
--- a/arch/m68k/kernel/signal_mm.c
+++ b/arch/m68k/kernel/signal_mm.c
@@ -56,7 +56,11 @@ static const int frame_extra_sizes[16] = {
   [1]   = -1, /* sizeof(((struct frame *)0)->un.fmt1), */
   [2]   = sizeof(((struct frame *)0)->un.fmt2),
   [3]   = sizeof(((struct frame *)0)->un.fmt3),
+#ifdef CONFIG_COLDFIRE
+  [4]   = 0,
+#else
   [4]   = sizeof(((struct frame *)0)->un.fmt4),
+#endif
   [5]   = -1, /* sizeof(((struct frame *)0)->un.fmt5), */
   [6]   = -1, /* sizeof(((struct frame *)0)->un.fmt6), */
   [7]   = sizeof(((struct frame *)0)->un.fmt7),
@@ -84,7 +88,11 @@ int handle_kernel_fault(struct pt_regs *regs)
         regs->stkadj = frame_extra_sizes[regs->format];
         tregs = (struct pt_regs *)((long)regs + regs->stkadj);
         tregs->vector = regs->vector;
+#ifdef CONFIG_COLDFIRE
+        tregs->format = 4;
+#else
         tregs->format = 0;
+#endif
         tregs->pc = fixup->fixup;
         tregs->sr = regs->sr;
 
@@ -195,7 +203,8 @@ static inline int restore_fpu_state(struct sigcontext *sc)
 
         if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
             /* Verify the frame format.  */
-            if (!CPU_IS_060 && (sc->sc_fpstate[0] != fpu_version))
+            if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
+                 (sc->sc_fpstate[0] != fpu_version))
                 goto out;
             if (CPU_IS_020_OR_030) {
                 if (m68k_fputype & FPU_68881 &&
@@ -214,19 +223,43 @@ static inline int restore_fpu_state(struct sigcontext *sc)
                       sc->sc_fpstate[3] == 0x60 ||
                       sc->sc_fpstate[3] == 0xe0))
                     goto out;
+            } else if (CPU_IS_COLDFIRE) {
+                if (!(sc->sc_fpstate[0] == 0x00 ||
+                      sc->sc_fpstate[0] == 0x05 ||
+                      sc->sc_fpstate[0] == 0xe5))
+                    goto out;
             } else
                 goto out;
 
-            __asm__ volatile (".chip 68k/68881\n\t"
-                              "fmovemx %0,%%fp0-%%fp1\n\t"
-                              "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
-                              ".chip 68k"
-                              : /* no outputs */
-                              : "m" (*sc->sc_fpregs), "m" (*sc->sc_fpcntl));
+            if (CPU_IS_COLDFIRE) {
+                __asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"
+                                  "fmovel %1,%%fpcr\n\t"
+                                  "fmovel %2,%%fpsr\n\t"
+                                  "fmovel %3,%%fpiar"
+                                  : /* no outputs */
+                                  : "m" (sc->sc_fpregs[0]),
+                                    "m" (sc->sc_fpcntl[0]),
+                                    "m" (sc->sc_fpcntl[1]),
+                                    "m" (sc->sc_fpcntl[2]));
+            } else {
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fmovemx %0,%%fp0-%%fp1\n\t"
+                                  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+                                  ".chip 68k"
+                                  : /* no outputs */
+                                  : "m" (*sc->sc_fpregs),
+                                    "m" (*sc->sc_fpcntl));
+            }
+        }
+
+        if (CPU_IS_COLDFIRE) {
+                __asm__ volatile ("frestore %0" : : "m" (*sc->sc_fpstate));
+        } else {
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "frestore %0\n\t"
+                                  ".chip 68k"
+                                  : : "m" (*sc->sc_fpstate));
         }
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "frestore %0\n\t"
-                          ".chip 68k" : : "m" (*sc->sc_fpstate));
         err = 0;
 
 out:
@@ -241,7 +274,7 @@ out:
 static inline int rt_restore_fpu_state(struct ucontext __user *uc)
 {
         unsigned char fpstate[FPCONTEXT_SIZE];
-        int context_size = CPU_IS_060 ? 8 : 0;
+        int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
         fpregset_t fpregs;
         int err = 1;
 
@@ -260,10 +293,11 @@ static inline int rt_restore_fpu_state(struct ucontext __user *uc)
         if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
                 goto out;
         if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
-                if (!CPU_IS_060)
+                if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
                         context_size = fpstate[1];
                 /* Verify the frame format.  */
-                if (!CPU_IS_060 && (fpstate[0] != fpu_version))
+                if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
+                     (fpstate[0] != fpu_version))
                         goto out;
                 if (CPU_IS_020_OR_030) {
                         if (m68k_fputype & FPU_68881 &&
@@ -282,26 +316,50 @@ static inline int rt_restore_fpu_state(struct ucontext __user *uc)
                               fpstate[3] == 0x60 ||
                               fpstate[3] == 0xe0))
                                 goto out;
+                } else if (CPU_IS_COLDFIRE) {
+                        if (!(fpstate[3] == 0x00 ||
+                              fpstate[3] == 0x05 ||
+                              fpstate[3] == 0xe5))
+                                goto out;
                 } else
                         goto out;
                 if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
                                      sizeof(fpregs)))
                         goto out;
-                __asm__ volatile (".chip 68k/68881\n\t"
-                                  "fmovemx %0,%%fp0-%%fp7\n\t"
-                                  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
-                                  ".chip 68k"
-                                  : /* no outputs */
-                                  : "m" (*fpregs.f_fpregs),
-                                    "m" (*fpregs.f_fpcntl));
+
+                if (CPU_IS_COLDFIRE) {
+                        __asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"
+                                          "fmovel %1,%%fpcr\n\t"
+                                          "fmovel %2,%%fpsr\n\t"
+                                          "fmovel %3,%%fpiar"
+                                          : /* no outputs */
+                                          : "m" (fpregs.f_fpregs[0]),
+                                            "m" (fpregs.f_fpcntl[0]),
+                                            "m" (fpregs.f_fpcntl[1]),
+                                            "m" (fpregs.f_fpcntl[2]));
+                } else {
+                        __asm__ volatile (".chip 68k/68881\n\t"
+                                          "fmovemx %0,%%fp0-%%fp7\n\t"
+                                          "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
+                                          ".chip 68k"
+                                          : /* no outputs */
+                                          : "m" (*fpregs.f_fpregs),
+                                            "m" (*fpregs.f_fpcntl));
+                }
         }
         if (context_size &&
             __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
                              context_size))
                 goto out;
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "frestore %0\n\t"
-                          ".chip 68k" : : "m" (*fpstate));
+
+        if (CPU_IS_COLDFIRE) {
+                __asm__ volatile ("frestore %0" : : "m" (*fpstate));
+        } else {
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "frestore %0\n\t"
+                                  ".chip 68k"
+                                  : : "m" (*fpstate));
+        }
         err = 0;
 
 out:
@@ -336,8 +394,12 @@ static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
                 regs->format = formatvec >> 12;
                 regs->vector = formatvec & 0xfff;
 #define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
-                __asm__ __volatile__
-                        ("   movel %0,%/a0\n\t"
+                __asm__ __volatile__ (
+#ifdef CONFIG_COLDFIRE
+                         "   movel %0,%/sp\n\t"
+                         "   bra ret_from_signal\n"
+#else
+                         "   movel %0,%/a0\n\t"
                          "   subl %1,%/a0\n\t"     /* make room on stack */
                          "   movel %/a0,%/sp\n\t"  /* set stack pointer */
                          /* move switch_stack and pt_regs */
@@ -350,6 +412,7 @@ static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
                          "2: movel %4@+,%/a0@+\n\t"
                          "   dbra %1,2b\n\t"
                          "   bral ret_from_signal\n"
+#endif
                          : /* no outputs, it doesn't ever return */
                          : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
                            "n" (frame_offset), "a" (buf + fsize/4)
@@ -516,10 +579,15 @@ static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
                 return;
         }
 
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "fsave %0\n\t"
-                          ".chip 68k"
-                          : : "m" (*sc->sc_fpstate) : "memory");
+        if (CPU_IS_COLDFIRE) {
+                __asm__ volatile ("fsave %0"
+                                  : : "m" (*sc->sc_fpstate) : "memory");
+        } else {
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fsave %0\n\t"
+                                  ".chip 68k"
+                                  : : "m" (*sc->sc_fpstate) : "memory");
+        }
 
         if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
                 fpu_version = sc->sc_fpstate[0];
@@ -530,21 +598,35 @@ static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
                         if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
                                 sc->sc_fpstate[0x38] |= 1 << 3;
                 }
-                __asm__ volatile (".chip 68k/68881\n\t"
-                                  "fmovemx %%fp0-%%fp1,%0\n\t"
-                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
-                                  ".chip 68k"
-                                  : "=m" (*sc->sc_fpregs),
-                                    "=m" (*sc->sc_fpcntl)
-                                  : /* no inputs */
-                                  : "memory");
+
+                if (CPU_IS_COLDFIRE) {
+                        __asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"
+                                          "fmovel %%fpcr,%1\n\t"
+                                          "fmovel %%fpsr,%2\n\t"
+                                          "fmovel %%fpiar,%3"
+                                          : "=m" (sc->sc_fpregs[0]),
+                                            "=m" (sc->sc_fpcntl[0]),
+                                            "=m" (sc->sc_fpcntl[1]),
+                                            "=m" (sc->sc_fpcntl[2])
+                                          : /* no inputs */
+                                          : "memory");
+                } else {
+                        __asm__ volatile (".chip 68k/68881\n\t"
+                                          "fmovemx %%fp0-%%fp1,%0\n\t"
+                                          "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+                                          ".chip 68k"
+                                          : "=m" (*sc->sc_fpregs),
+                                            "=m" (*sc->sc_fpcntl)
+                                          : /* no inputs */
+                                          : "memory");
+                }
         }
 }
 
 static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
 {
         unsigned char fpstate[FPCONTEXT_SIZE];
-        int context_size = CPU_IS_060 ? 8 : 0;
+        int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
         int err = 0;
 
         if (FPU_IS_EMU) {
@@ -557,15 +639,19 @@ static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *
                 return err;
         }
 
-        __asm__ volatile (".chip 68k/68881\n\t"
-                          "fsave %0\n\t"
-                          ".chip 68k"
-                          : : "m" (*fpstate) : "memory");
+        if (CPU_IS_COLDFIRE) {
+                __asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");
+        } else {
+                __asm__ volatile (".chip 68k/68881\n\t"
+                                  "fsave %0\n\t"
+                                  ".chip 68k"
+                                  : : "m" (*fpstate) : "memory");
+        }
 
         err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
         if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
                 fpregset_t fpregs;
-                if (!CPU_IS_060)
+                if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
                         context_size = fpstate[1];
                 fpu_version = fpstate[0];
                 if (CPU_IS_020_OR_030 &&
@@ -575,14 +661,27 @@ static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *
                         if (*(unsigned short *) fpstate == 0x1f38)
                                 fpstate[0x38] |= 1 << 3;
                 }
-                __asm__ volatile (".chip 68k/68881\n\t"
-                                  "fmovemx %%fp0-%%fp7,%0\n\t"
-                                  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
-                                  ".chip 68k"
-                                  : "=m" (*fpregs.f_fpregs),
-                                    "=m" (*fpregs.f_fpcntl)
-                                  : /* no inputs */
-                                  : "memory");
+                if (CPU_IS_COLDFIRE) {
+                        __asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"
+                                          "fmovel %%fpcr,%1\n\t"
+                                          "fmovel %%fpsr,%2\n\t"
+                                          "fmovel %%fpiar,%3"
+                                          : "=m" (fpregs.f_fpregs[0]),
+                                            "=m" (fpregs.f_fpcntl[0]),
+                                            "=m" (fpregs.f_fpcntl[1]),
+                                            "=m" (fpregs.f_fpcntl[2])
+                                          : /* no inputs */
+                                          : "memory");
+                } else {
+                        __asm__ volatile (".chip 68k/68881\n\t"
+                                          "fmovemx %%fp0-%%fp7,%0\n\t"
+                                          "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
+                                          ".chip 68k"
+                                          : "=m" (*fpregs.f_fpregs),
+                                            "=m" (*fpregs.f_fpcntl)
+                                          : /* no inputs */
+                                          : "memory");
+                }
                 err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
                                     sizeof(fpregs));
         }
@@ -679,8 +778,7 @@ static inline void push_cache (unsigned long vaddr)
                                       "cpushl %%bc,(%0)\n\t"
                                       ".chip 68k"
                                       : : "a" (temp));
-        }
-        else {
+        } else if (!CPU_IS_COLDFIRE) {
                 /*
                  * 68030/68020 have no writeback cache;
                  * still need to clear icache.
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index c468f2edaa85..ce827b376110 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -365,4 +365,6 @@ ENTRY(sys_call_table)
         .long sys_clock_adjtime
         .long sys_syncfs
         .long sys_setns
+        .long sys_process_vm_readv      /* 345 */
+        .long sys_process_vm_writev
 
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index a5cf40c26de5..75ab79b3bdeb 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -1,4 +1,4 @@
-#ifdef CONFIG_MMU
+#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
 #include "time_mm.c"
 #else
 #include "time_no.c"
diff --git a/arch/m68k/kernel/time_no.c b/arch/m68k/kernel/time_no.c
index 6623909f70e6..3ef0f7768dcd 100644
--- a/arch/m68k/kernel/time_no.c
+++ b/arch/m68k/kernel/time_no.c
@@ -26,6 +26,9 @@
 
 #define TICK_SIZE (tick_nsec / 1000)
 
+/* machine dependent timer functions */
+void (*mach_gettod)(int*, int*, int*, int*, int*, int*);
+
 static inline int set_rtc_mmss(unsigned long nowtime)
 {
         if (mach_set_clock_mmss)
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index 89362f2bb56a..a76452ca964e 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -706,6 +706,88 @@ create_atc_entry:
 #endif /* CPU_M68020_OR_M68030 */
 #endif /* !CONFIG_SUN3 */
 
+#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
+#include <asm/mcfmmu.h>
+
+/*
+ *      The following table converts the FS encoding of a ColdFire
+ *      exception stack frame into the error_code value needed by
+ *      do_fault.
+*/
+static const unsigned char fs_err_code[] = {
+        0,  /* 0000 */
+        0,  /* 0001 */
+        0,  /* 0010 */
+        0,  /* 0011 */
+        1,  /* 0100 */
+        0,  /* 0101 */
+        0,  /* 0110 */
+        0,  /* 0111 */
+        2,  /* 1000 */
+        3,  /* 1001 */
+        2,  /* 1010 */
+        0,  /* 1011 */
+        1,  /* 1100 */
+        1,  /* 1101 */
+        0,  /* 1110 */
+        0   /* 1111 */
+};
+
+static inline void access_errorcf(unsigned int fs, struct frame *fp)
+{
+        unsigned long mmusr, addr;
+        unsigned int err_code;
+        int need_page_fault;
+
+        mmusr = mmu_read(MMUSR);
+        addr = mmu_read(MMUAR);
+
+        /*
+         * error_code:
+         *      bit 0 == 0 means no page found, 1 means protection fault
+         *      bit 1 == 0 means read, 1 means write
+         */
+        switch (fs) {
+        case  5:  /* 0101 TLB opword X miss */
+                need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 0);
+                addr = fp->ptregs.pc;
+                break;
+        case  6:  /* 0110 TLB extension word X miss */
+                need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 0, 1);
+                addr = fp->ptregs.pc + sizeof(long);
+                break;
+        case 10:  /* 1010 TLB W miss */
+                need_page_fault = cf_tlb_miss(&fp->ptregs, 1, 1, 0);
+                break;
+        case 14: /* 1110 TLB R miss */
+                need_page_fault = cf_tlb_miss(&fp->ptregs, 0, 1, 0);
+                break;
+        default:
+                /* 0000 Normal  */
+                /* 0001 Reserved */
+                /* 0010 Interrupt during debug service routine */
+                /* 0011 Reserved */
+                /* 0100 X Protection */
+                /* 0111 IFP in emulator mode */
+                /* 1000 W Protection*/
+                /* 1001 Write error*/
+                /* 1011 Reserved*/
+                /* 1100 R Protection*/
+                /* 1101 R Protection*/
+                /* 1111 OEP in emulator mode*/
+                need_page_fault = 1;
+                break;
+        }
+
+        if (need_page_fault) {
+                err_code = fs_err_code[fs];
+                if ((fs == 13) && (mmusr & MMUSR_WF)) /* rd-mod-wr access */
+                        err_code |= 2; /* bit1 - write, bit0 - protection */
+                do_page_fault(&fp->ptregs, addr, err_code);
+        }
+}
+#endif /* CONFIG_COLDFIRE CONFIG_MMU */
+
 asmlinkage void buserr_c(struct frame *fp)
 {
         /* Only set esp0 if coming from user mode */
@@ -716,6 +798,28 @@ asmlinkage void buserr_c(struct frame *fp)
         printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
 #endif
 
+#if defined(CONFIG_COLDFIRE) && defined(CONFIG_MMU)
+        if (CPU_IS_COLDFIRE) {
+                unsigned int fs;
+                fs = (fp->ptregs.vector & 0x3) |
+                        ((fp->ptregs.vector & 0xc00) >> 8);
+                switch (fs) {
+                case 0x5:
+                case 0x6:
+                case 0x7:
+                case 0x9:
+                case 0xa:
+                case 0xd:
+                case 0xe:
+                case 0xf:
+                        access_errorcf(fs, fp);
+                        return;
+                default:
+                        break;
+                }
+        }
+#endif /* CONFIG_COLDFIRE && CONFIG_MMU */
+
         switch (fp->ptregs.format) {
 #if defined (CONFIG_M68060)
         case 4:                         /* 68060 access error */
diff --git a/arch/m68k/kernel/vmlinux.lds_no.S b/arch/m68k/kernel/vmlinux-nommu.lds
index 4e2389340837..8e66ccb0935e 100644
--- a/arch/m68k/kernel/vmlinux.lds_no.S
+++ b/arch/m68k/kernel/vmlinux-nommu.lds
@@ -69,6 +69,7 @@ SECTIONS {
                 SCHED_TEXT
                 LOCK_TEXT
                 *(.text..lock)
+                *(.fixup)
 
                 . = ALIGN(16);          /* Exception table              */
                 __start___ex_table = .;
@@ -161,6 +162,13 @@ SECTIONS {
                 _edata = . ;
         } > DATA
 
+        .m68k_fixup : {
+                __start_fixup = .;
+                *(.m68k_fixup)
+                __stop_fixup = .;
+        } > DATA
+        NOTES > DATA
+
         .init.text : {
                 . = ALIGN(PAGE_SIZE);
                 __init_begin = .;
diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds
index d0993594f558..63407c836826 100644
--- a/arch/m68k/kernel/vmlinux-std.lds
+++ b/arch/m68k/kernel/vmlinux-std.lds
@@ -31,7 +31,9 @@ SECTIONS
 
   RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE)
 
+  _sbss = .;
   BSS_SECTION(0, 0, 0)
+  _ebss = .;
 
   _edata = .;                   /* End of data section */
 
diff --git a/arch/m68k/kernel/vmlinux-sun3.lds b/arch/m68k/kernel/vmlinux-sun3.lds
index 8080469ee6c1..ad0f46d64c0b 100644
--- a/arch/m68k/kernel/vmlinux-sun3.lds
+++ b/arch/m68k/kernel/vmlinux-sun3.lds
@@ -44,7 +44,9 @@ __init_begin = .;
         . = ALIGN(PAGE_SIZE);
         __init_end = .;
 
+  _sbss = .;
   BSS_SECTION(0, 0, 0)
+  _ebss = .;
 
   _end = . ;
 
diff --git a/arch/m68k/kernel/vmlinux.lds.S b/arch/m68k/kernel/vmlinux.lds.S
index 030dabf0bc53..69ec79638870 100644
--- a/arch/m68k/kernel/vmlinux.lds.S
+++ b/arch/m68k/kernel/vmlinux.lds.S
@@ -1,5 +1,14 @@
-#ifdef CONFIG_MMU
-#include "vmlinux.lds_mm.S"
+#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
+PHDRS
+{
+  text PT_LOAD FILEHDR PHDRS FLAGS (7);
+  data PT_LOAD FLAGS (7);
+}
+#ifdef CONFIG_SUN3
+#include "vmlinux-sun3.lds"
 #else
-#include "vmlinux.lds_no.S"
+#include "vmlinux-std.lds"
+#endif
+#else
+#include "vmlinux-nommu.lds"
 #endif
diff --git a/arch/m68k/kernel/vmlinux.lds_mm.S b/arch/m68k/kernel/vmlinux.lds_mm.S
deleted file mode 100644
index 99ba315bd0a8..000000000000
--- a/arch/m68k/kernel/vmlinux.lds_mm.S
+++ /dev/null
@@ -1,10 +0,0 @@
-PHDRS
-{
-  text PT_LOAD FILEHDR PHDRS FLAGS (7);
-  data PT_LOAD FLAGS (7);
-}
-#ifdef CONFIG_SUN3
-#include "vmlinux-sun3.lds"
-#else
-#include "vmlinux-std.lds"
-#endif
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index 1a1bd9067e90..a9d782d34276 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -6,9 +6,11 @@
 lib-y   := ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
            memcpy.o memset.o memmove.o
 
-ifdef CONFIG_MMU
-lib-y   += string.o uaccess.o checksum_mm.o
-else
-lib-y   += mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o checksum_no.o
+lib-$(CONFIG_MMU) += string.o uaccess.o
+lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += mulsi3.o divsi3.o udivsi3.o
+lib-$(CONFIG_CPU_HAS_NO_MULDIV64) += modsi3.o umodsi3.o
+
+ifndef CONFIG_GENERIC_CSUM
+lib-y   += checksum.o
 endif
 
diff --git a/arch/m68k/lib/checksum_mm.c b/arch/m68k/lib/checksum.c
index 6216f12a756b..6216f12a756b 100644
--- a/arch/m68k/lib/checksum_mm.c
+++ b/arch/m68k/lib/checksum.c
diff --git a/arch/m68k/lib/checksum_no.c b/arch/m68k/lib/checksum_no.c
deleted file mode 100644
index e4c6354da765..000000000000
--- a/arch/m68k/lib/checksum_no.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * INET         An implementation of the TCP/IP protocol suite for the LINUX
- *              operating system.  INET is implemented using the  BSD Socket
- *              interface as the means of communication with the user level.
- *
- *              IP/TCP/UDP checksumming routines
- *
- * Authors:     Jorge Cwik, <jorge@laser.satlink.net>
- *              Arnt Gulbrandsen, <agulbra@nvg.unit.no>
- *              Tom May, <ftom@netcom.com>
- *              Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
- *              Lots of code moved from tcp.c and ip.c; see those files
- *              for more names.
- *
- * 03/02/96     Jes Sorensen, Andreas Schwab, Roman Hodek:
- *              Fixed some nasty bugs, causing some horrible crashes.
- *              A: At some points, the sum (%0) was used as
- *              length-counter instead of the length counter
- *              (%1). Thanks to Roman Hodek for pointing this out.
- *              B: GCC seems to mess up if one uses too many
- *              data-registers to hold input values and one tries to
- *              specify d0 and d1 as scratch registers. Letting gcc choose these
- *      registers itself solves the problem.
- *
- *              This program is free software; you can redistribute it and/or
- *              modify it under the terms of the GNU General Public License
- *              as published by the Free Software Foundation; either version
- *              2 of the License, or (at your option) any later version.
- */
- 
-/* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access kills, so most
-   of the assembly has to go. */
-
-#include <linux/module.h>
-#include <net/checksum.h>
-
-static inline unsigned short from32to16(unsigned long x)
-{
-        /* add up 16-bit and 16-bit for 16+c bit */
-        x = (x & 0xffff) + (x >> 16);
-        /* add up carry.. */
-        x = (x & 0xffff) + (x >> 16);
-        return x;
-}
-
-static unsigned long do_csum(const unsigned char * buff, int len)
-{
-        int odd, count;
-        unsigned long result = 0;
-
-        if (len <= 0)
-                goto out;
-        odd = 1 & (unsigned long) buff;
-        if (odd) {
-                result = *buff;
-                len--;
-                buff++;
-        }
-        count = len >> 1;               /* nr of 16-bit words.. */
-        if (count) {
-                if (2 & (unsigned long) buff) {
-                        result += *(unsigned short *) buff;
-                        count--;
-                        len -= 2;
-                        buff += 2;
-                }
-                count >>= 1;            /* nr of 32-bit words.. */
-                if (count) {
-                        unsigned long carry = 0;
-                        do {
-                                unsigned long w = *(unsigned long *) buff;
-                                count--;
-                                buff += 4;
-                                result += carry;
-                                result += w;
-                                carry = (w > result);
-                        } while (count);
-                        result += carry;
-                        result = (result & 0xffff) + (result >> 16);
-                }
-                if (len & 2) {
-                        result += *(unsigned short *) buff;
-                        buff += 2;
-                }
-        }
-        if (len & 1)
-                result += (*buff << 8);
-        result = from32to16(result);
-        if (odd)
-                result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
-out:
-        return result;
-}
-
-#ifdef CONFIG_COLDFIRE
-/*
- *      This is a version of ip_compute_csum() optimized for IP headers,
- *      which always checksum on 4 octet boundaries.
- */
-__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-        return (__force __sum16)~do_csum(iph,ihl*4);
-}
-EXPORT_SYMBOL(ip_fast_csum);
-#endif
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum)
-{
-        unsigned int result = do_csum(buff, len);
-
-        /* add in old sum, and carry.. */
-        result += (__force u32)sum;
-        if ((__force u32)sum > result)
-                result += 1;
-        return (__force __wsum)result;
-}
-
-EXPORT_SYMBOL(csum_partial);
-
-/*
- * copy from fs while checksumming, otherwise like csum_partial
- */
-
-__wsum
-csum_partial_copy_from_user(const void __user *src, void *dst,
-                            int len, __wsum sum, int *csum_err)
-{
-        if (csum_err) *csum_err = 0;
-        memcpy(dst, (__force const void *)src, len);
-        return csum_partial(dst, len, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy_from_user);
-
-/*
- * copy from ds while checksumming, otherwise like csum_partial
- */
-
-__wsum
-csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
-{
-        memcpy(dst, src, len);
-        return csum_partial(dst, len, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy_nocheck);
diff --git a/arch/m68k/lib/uaccess.c b/arch/m68k/lib/uaccess.c
index 13854ed8cd9a..5664386338da 100644
--- a/arch/m68k/lib/uaccess.c
+++ b/arch/m68k/lib/uaccess.c
@@ -15,17 +15,17 @@ unsigned long __generic_copy_from_user(void *to, const void __user *from,
         asm volatile ("\n"
                 "       tst.l   %0\n"
                 "       jeq     2f\n"
-                "1:     moves.l (%1)+,%3\n"
+                "1:     "MOVES".l       (%1)+,%3\n"
                 "       move.l  %3,(%2)+\n"
                 "       subq.l  #1,%0\n"
                 "       jne     1b\n"
                 "2:     btst    #1,%5\n"
                 "       jeq     4f\n"
-                "3:     moves.w (%1)+,%3\n"
+                "3:     "MOVES".w       (%1)+,%3\n"
                 "       move.w  %3,(%2)+\n"
                 "4:     btst    #0,%5\n"
                 "       jeq     6f\n"
-                "5:     moves.b (%1)+,%3\n"
+                "5:     "MOVES".b       (%1)+,%3\n"
                 "       move.b  %3,(%2)+\n"
                 "6:\n"
                 "       .section .fixup,\"ax\"\n"
@@ -68,17 +68,17 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from,
                 "       tst.l   %0\n"
                 "       jeq     4f\n"
                 "1:     move.l  (%1)+,%3\n"
-                "2:     moves.l %3,(%2)+\n"
+                "2:     "MOVES".l       %3,(%2)+\n"
                 "3:     subq.l  #1,%0\n"
                 "       jne     1b\n"
                 "4:     btst    #1,%5\n"
                 "       jeq     6f\n"
                 "       move.w  (%1)+,%3\n"
-                "5:     moves.w %3,(%2)+\n"
+                "5:     "MOVES".w       %3,(%2)+\n"
                 "6:     btst    #0,%5\n"
                 "       jeq     8f\n"
                 "       move.b  (%1)+,%3\n"
-                "7:     moves.b  %3,(%2)+\n"
+                "7:     "MOVES".b  %3,(%2)+\n"
                 "8:\n"
                 "       .section .fixup,\"ax\"\n"
                 "       .even\n"
@@ -115,7 +115,7 @@ long strncpy_from_user(char *dst, const char __user *src, long count)
                 return count;
 
         asm volatile ("\n"
-                "1:     moves.b (%2)+,%4\n"
+                "1:     "MOVES".b       (%2)+,%4\n"
                 "       move.b  %4,(%1)+\n"
                 "       jeq     2f\n"
                 "       subq.l  #1,%3\n"
@@ -152,7 +152,7 @@ long strnlen_user(const char __user *src, long n)
         asm volatile ("\n"
                 "1:     subq.l  #1,%1\n"
                 "       jmi     3f\n"
-                "2:     moves.b (%0)+,%2\n"
+                "2:     "MOVES".b       (%0)+,%2\n"
                 "       tst.b   %2\n"
                 "       jne     1b\n"
                 "       jra     4f\n"
@@ -188,15 +188,15 @@ unsigned long __clear_user(void __user *to, unsigned long n)
         asm volatile ("\n"
                 "       tst.l   %0\n"
                 "       jeq     3f\n"
-                "1:     moves.l %2,(%1)+\n"
+                "1:     "MOVES".l       %2,(%1)+\n"
                 "2:     subq.l  #1,%0\n"
                 "       jne     1b\n"
                 "3:     btst    #1,%4\n"
                 "       jeq     5f\n"
-                "4:     moves.w %2,(%1)+\n"
+                "4:     "MOVES".w       %2,(%1)+\n"
                 "5:     btst    #0,%4\n"
                 "       jeq     7f\n"
-                "6:     moves.b %2,(%1)\n"
+                "6:     "MOVES".b       %2,(%1)\n"
                 "7:\n"
                 "       .section .fixup,\"ax\"\n"
                 "       .even\n"
diff --git a/arch/m68k/mac/baboon.c b/arch/m68k/mac/baboon.c
index b403924a1cad..3fe0e43d44f6 100644
--- a/arch/m68k/mac/baboon.c
+++ b/arch/m68k/mac/baboon.c
@@ -8,13 +8,8 @@
 
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/init.h>
 #include <linux/irq.h>
 
-#include <asm/traps.h>
-#include <asm/bootinfo.h>
 #include <asm/macintosh.h>
 #include <asm/macints.h>
 #include <asm/mac_baboon.h>
@@ -23,7 +18,6 @@
 
 int baboon_present;
 static volatile struct baboon *baboon;
-static unsigned char baboon_disabled;
 
 #if 0
 extern int macide_ack_intr(struct ata_channel *);
@@ -89,51 +83,32 @@ static void baboon_irq(unsigned int irq, struct irq_desc *desc)
 
 void __init baboon_register_interrupts(void)
 {
-        baboon_disabled = 0;
         irq_set_chained_handler(IRQ_NUBUS_C, baboon_irq);
 }
 
 /*
- * The means for masking individual baboon interrupts remains a mystery, so
- * enable the umbrella interrupt only when no baboon interrupt is disabled.
+ * The means for masking individual Baboon interrupts remains a mystery.
+ * However, since we only use the IDE IRQ, we can just enable/disable all
+ * Baboon interrupts. If/when we handle more than one Baboon IRQ, we must
+ * either figure out how to mask them individually or else implement the
+ * same workaround that's used for NuBus slots (see nubus_disabled and
+ * via_nubus_irq_shutdown).
  */
 
 void baboon_irq_enable(int irq)
 {
-        int irq_idx = IRQ_IDX(irq);
-
 #ifdef DEBUG_IRQUSE
         printk("baboon_irq_enable(%d)\n", irq);
 #endif
 
-        baboon_disabled &= ~(1 << irq_idx);
-        if (!baboon_disabled)
-                mac_irq_enable(irq_get_irq_data(IRQ_NUBUS_C));
+        mac_irq_enable(irq_get_irq_data(IRQ_NUBUS_C));
 }
 
 void baboon_irq_disable(int irq)
 {
-        int irq_idx = IRQ_IDX(irq);
-
 #ifdef DEBUG_IRQUSE
         printk("baboon_irq_disable(%d)\n", irq);
 #endif
 
-        baboon_disabled |= 1 << irq_idx;
-        if (baboon_disabled)
-                mac_irq_disable(irq_get_irq_data(IRQ_NUBUS_C));
-}
-
-void baboon_irq_clear(int irq)
-{
-        int irq_idx = IRQ_IDX(irq);
-
-        baboon->mb_ifr &= ~(1 << irq_idx);
-}
-
-int baboon_irq_pending(int irq)
-{
-        int irq_idx = IRQ_IDX(irq);
-
-        return baboon->mb_ifr & (1 << irq_idx);
+        mac_irq_disable(irq_get_irq_data(IRQ_NUBUS_C));
 }
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index c247de02bc7e..f60ff5f59205 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -71,6 +71,31 @@ static void mac_get_model(char *str);
 static void mac_identify(void);
 static void mac_report_hardware(void);
 
+#ifdef CONFIG_EARLY_PRINTK
+asmlinkage void __init mac_early_print(const char *s, unsigned n);
+
+static void __init mac_early_cons_write(struct console *con,
+                                 const char *s, unsigned n)
+{
+        mac_early_print(s, n);
+}
+
+static struct console __initdata mac_early_cons = {
+        .name  = "early",
+        .write = mac_early_cons_write,
+        .flags = CON_PRINTBUFFER | CON_BOOT,
+        .index = -1
+};
+
+int __init mac_unregister_early_cons(void)
+{
+        /* mac_early_print can't be used after init sections are discarded */
+        return unregister_console(&mac_early_cons);
+}
+
+late_initcall(mac_unregister_early_cons);
+#endif
+
 static void __init mac_sched_init(irq_handler_t vector)
 {
         via_init_clock(vector);
@@ -164,6 +189,10 @@ void __init config_mac(void)
         mach_beep = mac_mksound;
 #endif
 
+#ifdef CONFIG_EARLY_PRINTK
+        register_console(&mac_early_cons);
+#endif
+
         /*
          * Determine hardware present
          */
@@ -192,7 +221,7 @@ void __init config_mac(void)
  * inaccurate, so look here if a new Mac model won't run. Example: if
  * a Mac crashes immediately after the VIA1 registers have been dumped
  * to the screen, it probably died attempting to read DirB on a RBV.
- * Meaning it should have MAC_VIA_IIci here :-)
+ * Meaning it should have MAC_VIA_IICI here :-)
  */
 
 struct mac_model *macintosh_config;
@@ -267,7 +296,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_IICI,
                 .name           = "IIci",
                 .adb_type       = MAC_ADB_II,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -276,7 +305,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_IIFX,
                 .name           = "IIfx",
                 .adb_type       = MAC_ADB_IOP,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_IOP,
                 .nubus_type     = MAC_NUBUS,
@@ -285,7 +314,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_IISI,
                 .name           = "IIsi",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -294,7 +323,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_IIVI,
                 .name           = "IIvi",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -303,7 +332,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_IIVX,
                 .name           = "IIvx",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -318,7 +347,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_CLII,
                 .name           = "Classic II",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -327,7 +356,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_CCL,
                 .name           = "Color Classic",
                 .adb_type       = MAC_ADB_CUDA,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -336,7 +365,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_CCLII,
                 .name           = "Color Classic II",
                 .adb_type       = MAC_ADB_CUDA,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -351,7 +380,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_LC,
                 .name           = "LC",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -360,7 +389,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_LCII,
                 .name           = "LC II",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -369,7 +398,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_LCIII,
                 .name           = "LC III",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -497,7 +526,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_P460,
                 .name           = "Performa 460",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -524,7 +553,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_P520,
                 .name           = "Performa 520",
                 .adb_type       = MAC_ADB_CUDA,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -533,7 +562,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_P550,
                 .name           = "Performa 550",
                 .adb_type       = MAC_ADB_CUDA,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -565,7 +594,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_TV,
                 .name           = "TV",
                 .adb_type       = MAC_ADB_CUDA,
-                .via_type       = MAC_VIA_QUADRA,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -574,7 +603,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_P600,
                 .name           = "Performa 600",
                 .adb_type       = MAC_ADB_IISI,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
                 .nubus_type     = MAC_NUBUS,
@@ -645,8 +674,8 @@ static struct mac_model mac_data_table[] = {
         }, {
                 .ident          = MAC_MODEL_PB150,
                 .name           = "PowerBook 150",
-                .adb_type       = MAC_ADB_PB1,
-                .via_type       = MAC_VIA_IIci,
+                .adb_type       = MAC_ADB_PB2,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .ide_type       = MAC_IDE_PB,
                 .scc_type       = MAC_SCC_QUADRA,
@@ -732,17 +761,13 @@ static struct mac_model mac_data_table[] = {
          * PowerBook Duos are pretty much like normal PowerBooks
          * All of these probably have onboard SONIC in the Dock which
          * means we'll have to probe for it eventually.
-         *
-         * Are these really MAC_VIA_IIci? The developer notes for the
-         * Duos show pretty much the same custom parts as in most of
-         * the other PowerBooks which would imply MAC_VIA_QUADRA.
          */
 
         {
                 .ident          = MAC_MODEL_PB210,
                 .name           = "PowerBook Duo 210",
                 .adb_type       = MAC_ADB_PB2,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .nubus_type     = MAC_NUBUS,
@@ -751,7 +776,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_PB230,
                 .name           = "PowerBook Duo 230",
                 .adb_type       = MAC_ADB_PB2,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .nubus_type     = MAC_NUBUS,
@@ -760,7 +785,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_PB250,
                 .name           = "PowerBook Duo 250",
                 .adb_type       = MAC_ADB_PB2,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .nubus_type     = MAC_NUBUS,
@@ -769,7 +794,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_PB270C,
                 .name           = "PowerBook Duo 270c",
                 .adb_type       = MAC_ADB_PB2,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .nubus_type     = MAC_NUBUS,
@@ -778,7 +803,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_PB280,
                 .name           = "PowerBook Duo 280",
                 .adb_type       = MAC_ADB_PB2,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .nubus_type     = MAC_NUBUS,
@@ -787,7 +812,7 @@ static struct mac_model mac_data_table[] = {
                 .ident          = MAC_MODEL_PB280C,
                 .name           = "PowerBook Duo 280c",
                 .adb_type       = MAC_ADB_PB2,
-                .via_type       = MAC_VIA_IIci,
+                .via_type       = MAC_VIA_IICI,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .nubus_type     = MAC_NUBUS,
@@ -864,8 +889,14 @@ static void __init mac_identify(void)
                 scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC_B;
                 break;
         default:
-                scc_a_rsrcs[1].start = scc_a_rsrcs[1].end = IRQ_MAC_SCC;
-                scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC;
+                /* On non-PSC machines, the serial ports share an IRQ. */
+                if (macintosh_config->ident == MAC_MODEL_IIFX) {
+                        scc_a_rsrcs[1].start = scc_a_rsrcs[1].end = IRQ_MAC_SCC;
+                        scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_MAC_SCC;
+                } else {
+                        scc_a_rsrcs[1].start = scc_a_rsrcs[1].end = IRQ_AUTO_4;
+                        scc_b_rsrcs[1].start = scc_b_rsrcs[1].end = IRQ_AUTO_4;
+                }
                 break;
         }
 
diff --git a/arch/m68k/mac/iop.c b/arch/m68k/mac/iop.c
index a5462cc0bfd6..7d8d46127ad9 100644
--- a/arch/m68k/mac/iop.c
+++ b/arch/m68k/mac/iop.c
@@ -115,7 +115,6 @@
 #include <asm/macintosh.h>
 #include <asm/macints.h>
 #include <asm/mac_iop.h>
-#include <asm/mac_oss.h>
 
 /*#define DEBUG_IOP*/
 
@@ -149,8 +148,6 @@ static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
 
 irqreturn_t iop_ism_irq(int, void *);
 
-extern void oss_irq_enable(int);
-
 /*
  * Private access functions
  */
@@ -304,11 +301,10 @@ void __init iop_init(void)
 void __init iop_register_interrupts(void)
 {
         if (iop_ism_present) {
-                if (oss_present) {
-                        if (request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq, 0,
+                if (macintosh_config->ident == MAC_MODEL_IIFX) {
+                        if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0,
                                         "ISM IOP", (void *)IOP_NUM_ISM))
                                 pr_err("Couldn't register ISM IOP interrupt\n");
-                        oss_irq_enable(IRQ_MAC_ADB);
                 } else {
                         if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
                                         (void *)IOP_NUM_ISM))
diff --git a/arch/m68k/mac/macints.c b/arch/m68k/mac/macints.c
index ba220b70ab8c..5c1a6b2ff0af 100644
--- a/arch/m68k/mac/macints.c
+++ b/arch/m68k/mac/macints.c
@@ -26,10 +26,6 @@
  *                - slot 6: timer 1 (not on IIci)
  *                - slot 7: status of IRQ; signals 'any enabled int.'
  *
- *      2       - OSS (IIfx only?)
- *                - slot 0: SCSI interrupt
- *                - slot 1: Sound interrupt
- *
  * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
  *
  *      3       - unused (?)
@@ -42,21 +38,30 @@
  *
  *      6       - off switch (?)
  *
- * For OSS Macintoshes (IIfx only at this point):
+ * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
+ * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
+ * sound out to their own autovector IRQs and gives VIA1 a higher priority:
  *
- *      3       - Nubus interrupt
- *                - slot 0: Slot $9
- *                - slot 1: Slot $A
- *                - slot 2: Slot $B
- *                - slot 3: Slot $C
- *                - slot 4: Slot $D
- *                - slot 5: Slot $E
+ *      1       - unused (?)
  *
- *      4       - SCC IOP
+ *      3       - on-board SONIC
+ *
+ *      5       - Apple Sound Chip (ASC)
+ *
+ *      6       - VIA1
+ *
+ * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
+ * the Quadra (A/UX) mapping:
+ *
+ *      1       - ISM IOP (ADB)
  *
- *      5       - ISM IOP (ADB?)
+ *      2       - SCSI
  *
- *      6       - unused
+ *      3       - NuBus
+ *
+ *      4       - SCC IOP
+ *
+ *      6       - VIA1
  *
  * For PSC Macintoshes (660AV, 840AV):
  *
@@ -100,88 +105,29 @@
  *   case. They're hidden behind the Nubus slot $C interrupt thus adding a
  *   third layer of indirection. Why oh why did the Apple engineers do that?
  *
- * - We support "fast" and "slow" handlers, just like the Amiga port. The
- *   fast handlers are called first and with all interrupts disabled. They
- *   are expected to execute quickly (hence the name). The slow handlers are
- *   called last with interrupts enabled and the interrupt level restored.
- *   They must therefore be reentrant.
- *
- *   TODO:
- *
  */
 
-#include <linux/module.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
-#include <linux/kernel_stat.h>
-#include <linux/interrupt.h> /* for intr_count */
+#include <linux/interrupt.h>
+#include <linux/irq.h>
 #include <linux/delay.h>
-#include <linux/seq_file.h>
 
-#include <asm/system.h>
 #include <asm/irq.h>
-#include <asm/traps.h>
-#include <asm/bootinfo.h>
 #include <asm/macintosh.h>
+#include <asm/macints.h>
 #include <asm/mac_via.h>
 #include <asm/mac_psc.h>
+#include <asm/mac_oss.h>
+#include <asm/mac_iop.h>
+#include <asm/mac_baboon.h>
 #include <asm/hwtest.h>
-#include <asm/errno.h>
-#include <asm/macints.h>
 #include <asm/irq_regs.h>
-#include <asm/mac_oss.h>
 
 #define SHUTUP_SONIC
 
 /*
- * VIA/RBV hooks
- */
-
-extern void via_register_interrupts(void);
-extern void via_irq_enable(int);
-extern void via_irq_disable(int);
-extern void via_irq_clear(int);
-extern int  via_irq_pending(int);
-
-/*
- * OSS hooks
- */
-
-extern void oss_register_interrupts(void);
-extern void oss_irq_enable(int);
-extern void oss_irq_disable(int);
-extern void oss_irq_clear(int);
-extern int  oss_irq_pending(int);
-
-/*
- * PSC hooks
- */
-
-extern void psc_register_interrupts(void);
-extern void psc_irq_enable(int);
-extern void psc_irq_disable(int);
-extern void psc_irq_clear(int);
-extern int  psc_irq_pending(int);
-
-/*
- * IOP hooks
- */
-
-extern void iop_register_interrupts(void);
-
-/*
- * Baboon hooks
- */
-
-extern int baboon_present;
-
-extern void baboon_register_interrupts(void);
-extern void baboon_irq_enable(int);
-extern void baboon_irq_disable(int);
-extern void baboon_irq_clear(int);
-
-/*
  * console_loglevel determines NMI handler function
  */
 
@@ -190,10 +136,15 @@ irqreturn_t mac_debug_handler(int, void *);
 
 /* #define DEBUG_MACINTS */
 
+static unsigned int mac_irq_startup(struct irq_data *);
+static void mac_irq_shutdown(struct irq_data *);
+
 static struct irq_chip mac_irq_chip = {
         .name           = "mac",
         .irq_enable     = mac_irq_enable,
         .irq_disable    = mac_irq_disable,
+        .irq_startup    = mac_irq_startup,
+        .irq_shutdown   = mac_irq_shutdown,
 };
 
 void __init mac_init_IRQ(void)
@@ -239,8 +190,6 @@ void __init mac_init_IRQ(void)
 /*
  *  mac_irq_enable - enable an interrupt source
  * mac_irq_disable - disable an interrupt source
- *   mac_clear_irq - clears a pending interrupt
- * mac_irq_pending - returns the pending status of an IRQ (nonzero = pending)
  *
  * These routines are just dispatchers to the VIA/OSS/PSC routines.
  */
@@ -252,8 +201,6 @@ void mac_irq_enable(struct irq_data *data)
 
         switch(irq_src) {
         case 1:
-                via_irq_enable(irq);
-                break;
         case 2:
         case 7:
                 if (oss_present)
@@ -262,6 +209,7 @@ void mac_irq_enable(struct irq_data *data)
                         via_irq_enable(irq);
                 break;
         case 3:
+        case 4:
         case 5:
         case 6:
                 if (psc_present)
@@ -269,10 +217,6 @@ void mac_irq_enable(struct irq_data *data)
                 else if (oss_present)
                         oss_irq_enable(irq);
                 break;
-        case 4:
-                if (psc_present)
-                        psc_irq_enable(irq);
-                break;
         case 8:
                 if (baboon_present)
                         baboon_irq_enable(irq);
@@ -287,8 +231,6 @@ void mac_irq_disable(struct irq_data *data)
 
         switch(irq_src) {
         case 1:
-                via_irq_disable(irq);
-                break;
         case 2:
         case 7:
                 if (oss_present)
@@ -297,6 +239,7 @@ void mac_irq_disable(struct irq_data *data)
                         via_irq_disable(irq);
                 break;
         case 3:
+        case 4:
         case 5:
         case 6:
                 if (psc_present)
@@ -304,10 +247,6 @@ void mac_irq_disable(struct irq_data *data)
                 else if (oss_present)
                         oss_irq_disable(irq);
                 break;
-        case 4:
-                if (psc_present)
-                        psc_irq_disable(irq);
-                break;
         case 8:
                 if (baboon_present)
                         baboon_irq_disable(irq);
@@ -315,65 +254,27 @@ void mac_irq_disable(struct irq_data *data)
         }
 }
 
-void mac_clear_irq(unsigned int irq)
+static unsigned int mac_irq_startup(struct irq_data *data)
 {
-        switch(IRQ_SRC(irq)) {
-        case 1:
-                via_irq_clear(irq);
-                break;
-        case 2:
-        case 7:
-                if (oss_present)
-                        oss_irq_clear(irq);
-                else
-                        via_irq_clear(irq);
-                break;
-        case 3:
-        case 5:
-        case 6:
-                if (psc_present)
-                        psc_irq_clear(irq);
-                else if (oss_present)
-                        oss_irq_clear(irq);
-                break;
-        case 4:
-                if (psc_present)
-                        psc_irq_clear(irq);
-                break;
-        case 8:
-                if (baboon_present)
-                        baboon_irq_clear(irq);
-                break;
-        }
+        int irq = data->irq;
+
+        if (IRQ_SRC(irq) == 7 && !oss_present)
+                via_nubus_irq_startup(irq);
+        else
+                mac_irq_enable(data);
+
+        return 0;
 }
 
-int mac_irq_pending(unsigned int irq)
+static void mac_irq_shutdown(struct irq_data *data)
 {
-        switch(IRQ_SRC(irq)) {
-        case 1:
-                return via_irq_pending(irq);
-        case 2:
-        case 7:
-                if (oss_present)
-                        return oss_irq_pending(irq);
-                else
-                        return via_irq_pending(irq);
-        case 3:
-        case 5:
-        case 6:
-                if (psc_present)
-                        return psc_irq_pending(irq);
-                else if (oss_present)
-                        return oss_irq_pending(irq);
-                break;
-        case 4:
-                if (psc_present)
-                        return psc_irq_pending(irq);
-                break;
-        }
-        return 0;
+        int irq = data->irq;
+
+        if (IRQ_SRC(irq) == 7 && !oss_present)
+                via_nubus_irq_shutdown(irq);
+        else
+                mac_irq_disable(data);
 }
-EXPORT_SYMBOL(mac_irq_pending);
 
 static int num_debug[8];
 
diff --git a/arch/m68k/mac/oss.c b/arch/m68k/mac/oss.c
index a4c82dab9ff1..6c4c882c126e 100644
--- a/arch/m68k/mac/oss.c
+++ b/arch/m68k/mac/oss.c
@@ -1,5 +1,5 @@
 /*
- *      OSS handling
+ *      Operating System Services (OSS) chip handling
  *      Written by Joshua M. Thompson (funaho@jurai.org)
  *
  *
@@ -30,8 +30,6 @@
 int oss_present;
 volatile struct mac_oss *oss;
 
-extern void via1_irq(unsigned int irq, struct irq_desc *desc);
-
 /*
  * Initialize the OSS
  *
@@ -51,10 +49,8 @@ void __init oss_init(void)
         /* do this by setting the source's interrupt level to zero. */
 
         for (i = 0; i <= OSS_NUM_SOURCES; i++) {
-                oss->irq_level[i] = OSS_IRQLEV_DISABLED;
+                oss->irq_level[i] = 0;
         }
-        /* If we disable VIA1 here, we never really handle it... */
-        oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
 }
 
 /*
@@ -66,17 +62,13 @@ void __init oss_nubus_init(void)
 }
 
 /*
- * Handle miscellaneous OSS interrupts. Right now that's just sound
- * and SCSI; everything else is routed to its own autovector IRQ.
+ * Handle miscellaneous OSS interrupts.
  */
 
 static void oss_irq(unsigned int irq, struct irq_desc *desc)
 {
-        int events;
-
-        events = oss->irq_pending & (OSS_IP_SOUND|OSS_IP_SCSI);
-        if (!events)
-                return;
+        int events = oss->irq_pending &
+                     (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM);
 
 #ifdef DEBUG_IRQS
         if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
@@ -84,16 +76,20 @@ static void oss_irq(unsigned int irq, struct irq_desc *desc)
                         (int) oss->irq_pending);
         }
 #endif
-        /* FIXME: how do you clear a pending IRQ?    */
 
-        if (events & OSS_IP_SOUND) {
-                oss->irq_pending &= ~OSS_IP_SOUND;
-                /* FIXME: call sound handler */
-        } else if (events & OSS_IP_SCSI) {
+        if (events & OSS_IP_IOPSCC) {
+                oss->irq_pending &= ~OSS_IP_IOPSCC;
+                generic_handle_irq(IRQ_MAC_SCC);
+        }
+
+        if (events & OSS_IP_SCSI) {
                 oss->irq_pending &= ~OSS_IP_SCSI;
                 generic_handle_irq(IRQ_MAC_SCSI);
-        } else {
-                /* FIXME: error check here? */
+        }
+
+        if (events & OSS_IP_IOPISM) {
+                oss->irq_pending &= ~OSS_IP_IOPISM;
+                generic_handle_irq(IRQ_MAC_ADB);
         }
 }
 
@@ -132,14 +128,29 @@ static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc)
 
 /*
  * Register the OSS and NuBus interrupt dispatchers.
+ *
+ * This IRQ mapping is laid out with two things in mind: first, we try to keep
+ * things on their own levels to avoid having to do double-dispatches. Second,
+ * the levels match as closely as possible the alternate IRQ mapping mode (aka
+ * "A/UX mode") available on some VIA machines.
  */
 
+#define OSS_IRQLEV_IOPISM    IRQ_AUTO_1
+#define OSS_IRQLEV_SCSI      IRQ_AUTO_2
+#define OSS_IRQLEV_NUBUS     IRQ_AUTO_3
+#define OSS_IRQLEV_IOPSCC    IRQ_AUTO_4
+#define OSS_IRQLEV_VIA1      IRQ_AUTO_6
+
 void __init oss_register_interrupts(void)
 {
-        irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq);
-        irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
-        irq_set_chained_handler(OSS_IRQLEV_SOUND, oss_irq);
-        irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
+        irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq);
+        irq_set_chained_handler(OSS_IRQLEV_SCSI,   oss_irq);
+        irq_set_chained_handler(OSS_IRQLEV_NUBUS,  oss_nubus_irq);
+        irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq);
+        irq_set_chained_handler(OSS_IRQLEV_VIA1,   via1_irq);
+
+        /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
+        oss->irq_level[OSS_VIA1] = IRQ_AUTO_6;
 }
 
 /*
@@ -158,13 +169,13 @@ void oss_irq_enable(int irq) {
         switch(irq) {
                 case IRQ_MAC_SCC:
                         oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
-                        break;
+                        return;
                 case IRQ_MAC_ADB:
                         oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
-                        break;
+                        return;
                 case IRQ_MAC_SCSI:
                         oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
-                        break;
+                        return;
                 case IRQ_NUBUS_9:
                 case IRQ_NUBUS_A:
                 case IRQ_NUBUS_B:
@@ -173,13 +184,11 @@ void oss_irq_enable(int irq) {
                 case IRQ_NUBUS_E:
                         irq -= NUBUS_SOURCE_BASE;
                         oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
-                        break;
-#ifdef DEBUG_IRQUSE
-                default:
-                        printk("%s unknown irq %d\n", __func__, irq);
-                        break;
-#endif
+                        return;
         }
+
+        if (IRQ_SRC(irq) == 1)
+                via_irq_enable(irq);
 }
 
 /*
@@ -195,50 +204,14 @@ void oss_irq_disable(int irq) {
 #endif
         switch(irq) {
                 case IRQ_MAC_SCC:
-                        oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_DISABLED;
-                        break;
-                case IRQ_MAC_ADB:
-                        oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_DISABLED;
-                        break;
-                case IRQ_MAC_SCSI:
-                        oss->irq_level[OSS_SCSI] = OSS_IRQLEV_DISABLED;
-                        break;
-                case IRQ_NUBUS_9:
-                case IRQ_NUBUS_A:
-                case IRQ_NUBUS_B:
-                case IRQ_NUBUS_C:
-                case IRQ_NUBUS_D:
-                case IRQ_NUBUS_E:
-                        irq -= NUBUS_SOURCE_BASE;
-                        oss->irq_level[irq] = OSS_IRQLEV_DISABLED;
-                        break;
-#ifdef DEBUG_IRQUSE
-                default:
-                        printk("%s unknown irq %d\n", __func__, irq);
-                        break;
-#endif
-        }
-}
-
-/*
- * Clear an OSS interrupt
- *
- * Not sure if this works or not but it's the only method I could
- * think of based on the contents of the mac_oss structure.
- */
-
-void oss_irq_clear(int irq) {
-        /* FIXME: how to do this on OSS? */
-        switch(irq) {
-                case IRQ_MAC_SCC:
-                        oss->irq_pending &= ~OSS_IP_IOPSCC;
-                        break;
+                        oss->irq_level[OSS_IOPSCC] = 0;
+                        return;
                 case IRQ_MAC_ADB:
-                        oss->irq_pending &= ~OSS_IP_IOPISM;
-                        break;
+                        oss->irq_level[OSS_IOPISM] = 0;
+                        return;
                 case IRQ_MAC_SCSI:
-                        oss->irq_pending &= ~OSS_IP_SCSI;
-                        break;
+                        oss->irq_level[OSS_SCSI] = 0;
+                        return;
                 case IRQ_NUBUS_9:
                 case IRQ_NUBUS_A:
                 case IRQ_NUBUS_B:
@@ -246,36 +219,10 @@ void oss_irq_clear(int irq) {
                 case IRQ_NUBUS_D:
                 case IRQ_NUBUS_E:
                         irq -= NUBUS_SOURCE_BASE;
-                        oss->irq_pending &= ~(1 << irq);
-                        break;
+                        oss->irq_level[irq] = 0;
+                        return;
         }
-}
-
-/*
- * Check to see if a specific OSS interrupt is pending
- */
 
-int oss_irq_pending(int irq)
-{
-        switch(irq) {
-                case IRQ_MAC_SCC:
-                        return oss->irq_pending & OSS_IP_IOPSCC;
-                        break;
-                case IRQ_MAC_ADB:
-                        return oss->irq_pending & OSS_IP_IOPISM;
-                        break;
-                case IRQ_MAC_SCSI:
-                        return oss->irq_pending & OSS_IP_SCSI;
-                        break;
-                case IRQ_NUBUS_9:
-                case IRQ_NUBUS_A:
-                case IRQ_NUBUS_B:
-                case IRQ_NUBUS_C:
-                case IRQ_NUBUS_D:
-                case IRQ_NUBUS_E:
-                        irq -= NUBUS_SOURCE_BASE;
-                        return oss->irq_pending & (1 << irq);
-                        break;
-        }
-        return 0;
+        if (IRQ_SRC(irq) == 1)
+                via_irq_disable(irq);
 }
diff --git a/arch/m68k/mac/psc.c b/arch/m68k/mac/psc.c
index e6c2d20f328d..6f026fc302fa 100644
--- a/arch/m68k/mac/psc.c
+++ b/arch/m68k/mac/psc.c
@@ -180,20 +180,3 @@ void psc_irq_disable(int irq) {
 #endif
         psc_write_byte(pIER, 1 << irq_idx);
 }
-
-void psc_irq_clear(int irq) {
-        int irq_src     = IRQ_SRC(irq);
-        int irq_idx     = IRQ_IDX(irq);
-        int pIFR        = pIERbase + (irq_src << 4);
-
-        psc_write_byte(pIFR, 1 << irq_idx);
-}
-
-int psc_irq_pending(int irq)
-{
-        int irq_src     = IRQ_SRC(irq);
-        int irq_idx     = IRQ_IDX(irq);
-        int pIFR        = pIERbase + (irq_src << 4);
-
-        return psc_read_byte(pIFR) & (1 << irq_idx);
-}
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index f1600ad26621..2d85662715fb 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -63,24 +63,50 @@ static int gIER,gIFR,gBufA,gBufB;
 #define MAC_CLOCK_LOW           (MAC_CLOCK_TICK&0xFF)
 #define MAC_CLOCK_HIGH          (MAC_CLOCK_TICK>>8)
 
-/* To disable a NuBus slot on Quadras we make that slot IRQ line an output set
- * high. On RBV we just use the slot interrupt enable register. On Macs with
- * genuine VIA chips we must use nubus_disabled to keep track of disabled slot
- * interrupts. When any slot IRQ is disabled we mask the (edge triggered) CA1
- * or "SLOTS" interrupt. When no slot is disabled, we unmask the CA1 interrupt.
- * So, on genuine VIAs, having more than one NuBus IRQ can mean trouble,
- * because closing one of those drivers can mask all of the NuBus interrupts.
- * Also, since we can't mask the unregistered slot IRQs on genuine VIAs, it's
- * possible to get interrupts from cards that MacOS or the ROM has configured
- * but we have not. FWIW, "Designing Cards and Drivers for Macintosh II and
- * Macintosh SE", page 9-8, says, a slot IRQ with no driver would crash MacOS.
+
+/*
+ * On Macs with a genuine VIA chip there is no way to mask an individual slot
+ * interrupt. This limitation also seems to apply to VIA clone logic cores in
+ * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.)
+ *
+ * We used to fake it by configuring the relevent VIA pin as an output
+ * (to mask the interrupt) or input (to unmask). That scheme did not work on
+ * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector
+ * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE,
+ * p. 10-11 etc) but VIA outputs are not (see datasheet).
+ *
+ * Driving these outputs high must cause the VIA to source current and the
+ * card to sink current when it asserts /NMRQ. Current will flow but the pin
+ * voltage is uncertain and so the /NMRQ condition may still cause a transition
+ * at the VIA2 CA1 input (which explains the lost interrupts). A side effect
+ * is that a disabled slot IRQ can never be tested as pending or not.
+ *
+ * Driving these outputs low doesn't work either. All the slot /NMRQ lines are
+ * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see
+ * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a
+ * disabled /NMRQ line low, the falling edge immediately triggers a CA1
+ * interrupt and all slot interrupts after that will generate no transition
+ * and therefore no interrupt, even after being re-enabled.
+ *
+ * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep
+ * track of their states. When any slot IRQ becomes disabled we mask the CA1
+ * umbrella interrupt. Only when all slot IRQs become enabled do we unmask
+ * the CA1 interrupt. It must remain enabled even when cards have no interrupt
+ * handler registered. Drivers must therefore disable a slot interrupt at the
+ * device before they call free_irq (like shared and autovector interrupts).
+ *
+ * There is also a related problem when MacOS is used to boot Linux. A network
+ * card brought up by a MacOS driver may raise an interrupt while Linux boots.
+ * This can be fatal since it can't be handled until the right driver loads
+ * (if such a driver exists at all). Apparently related to this hardware
+ * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot
+ * interrupt with no driver would crash MacOS (the book was written before
+ * the appearance of Macs with RBV or OSS).
  */
+
 static u8 nubus_disabled;
 
 void via_debug_dump(void);
-void via_irq_enable(int irq);
-void via_irq_disable(int irq);
-void via_irq_clear(int irq);
 
 /*
  * Initialize the VIAs
@@ -100,7 +126,7 @@ void __init via_init(void)
 
                 /* IIci, IIsi, IIvx, IIvi (P6xx), LC series */
 
-                case MAC_VIA_IIci:
+                case MAC_VIA_IICI:
                         via1 = (void *) VIA1_BASE;
                         if (macintosh_config->ident == MAC_MODEL_IIFX) {
                                 via2 = NULL;
@@ -197,38 +223,17 @@ void __init via_init(void)
         if (oss_present)
                 return;
 
-        /* Some machines support an alternate IRQ mapping that spreads  */
-        /* Ethernet and Sound out to their own autolevel IRQs and moves */
-        /* VIA1 to level 6. A/UX uses this mapping and we do too.  Note */
-        /* that the IIfx emulates this alternate mapping using the OSS. */
-
-        via_alt_mapping = 0;
-        if (macintosh_config->via_type == MAC_VIA_QUADRA)
-                switch (macintosh_config->ident) {
-                case MAC_MODEL_C660:
-                case MAC_MODEL_Q840:
-                        /* not applicable */
-                        break;
-                case MAC_MODEL_P588:
-                case MAC_MODEL_TV:
-                case MAC_MODEL_PB140:
-                case MAC_MODEL_PB145:
-                case MAC_MODEL_PB160:
-                case MAC_MODEL_PB165:
-                case MAC_MODEL_PB165C:
-                case MAC_MODEL_PB170:
-                case MAC_MODEL_PB180:
-                case MAC_MODEL_PB180C:
-                case MAC_MODEL_PB190:
-                case MAC_MODEL_PB520:
-                        /* not yet tested */
-                        break;
-                default:
-                        via_alt_mapping = 1;
-                        via1[vDirB] |= 0x40;
-                        via1[vBufB] &= ~0x40;
-                        break;
-                }
+        if ((macintosh_config->via_type == MAC_VIA_QUADRA) &&
+            (macintosh_config->adb_type != MAC_ADB_PB1) &&
+            (macintosh_config->adb_type != MAC_ADB_PB2) &&
+            (macintosh_config->ident    != MAC_MODEL_C660) &&
+            (macintosh_config->ident    != MAC_MODEL_Q840)) {
+                via_alt_mapping = 1;
+                via1[vDirB] |= 0x40;
+                via1[vBufB] &= ~0x40;
+        } else {
+                via_alt_mapping = 0;
+        }
 
         /*
          * Now initialize VIA2. For RBV we just kill all interrupts;
@@ -248,22 +253,28 @@ void __init via_init(void)
                 via2[vACR] &= ~0x03; /* disable port A & B latches */
         }
 
+        /* Everything below this point is VIA2 only... */
+
+        if (rbv_present)
+                return;
+
         /*
-         * Set vPCR for control line interrupts (but not on RBV)
+         * Set vPCR for control line interrupts.
+         *
+         * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger.
+         *
+         * Macs with ESP SCSI have a negative edge triggered SCSI interrupt.
+         * Testing reveals that PowerBooks do too. However, the SE/30
+         * schematic diagram shows an active high NCR5380 IRQ line.
          */
-        if (!rbv_present) {
-                /* For all VIA types, CA1 (SLOTS IRQ) and CB1 (ASC IRQ)
-                 * are made negative edge triggered here.
-                 */
-                if (macintosh_config->scsi_type == MAC_SCSI_OLD) {
-                        /* CB2 (IRQ) indep. input, positive edge */
-                        /* CA2 (DRQ) indep. input, positive edge */
-                        via2[vPCR] = 0x66;
-                } else {
-                        /* CB2 (IRQ) indep. input, negative edge */
-                        /* CA2 (DRQ) indep. input, negative edge */
-                        via2[vPCR] = 0x22;
-                }
+
+        pr_debug("VIA2 vPCR is 0x%02X\n", via2[vPCR]);
+        if (macintosh_config->via_type == MAC_VIA_II) {
+                /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, pos. edge */
+                via2[vPCR] = 0x66;
+        } else {
+                /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, neg. edge */
+                via2[vPCR] = 0x22;
         }
 }
 
@@ -378,34 +389,55 @@ void __init via_nubus_init(void)
                 via2[gBufB] |= 0x02;
         }
 
-        /* Disable all the slot interrupts (where possible). */
+        /*
+         * Disable the slot interrupts. On some hardware that's not possible.
+         * On some hardware it's unclear what all of these I/O lines do.
+         */
 
         switch (macintosh_config->via_type) {
         case MAC_VIA_II:
-                /* Just make the port A lines inputs. */
-                switch(macintosh_config->ident) {
-                case MAC_MODEL_II:
-                case MAC_MODEL_IIX:
-                case MAC_MODEL_IICX:
-                case MAC_MODEL_SE30:
-                        /* The top two bits are RAM size outputs. */
-                        via2[vDirA] &= 0xC0;
-                        break;
-                default:
-                        via2[vDirA] &= 0x80;
-                }
+        case MAC_VIA_QUADRA:
+                pr_debug("VIA2 vDirA is 0x%02X\n", via2[vDirA]);
                 break;
-        case MAC_VIA_IIci:
+        case MAC_VIA_IICI:
                 /* RBV. Disable all the slot interrupts. SIER works like IER. */
                 via2[rSIER] = 0x7F;
                 break;
+        }
+}
+
+void via_nubus_irq_startup(int irq)
+{
+        int irq_idx = IRQ_IDX(irq);
+
+        switch (macintosh_config->via_type) {
+        case MAC_VIA_II:
         case MAC_VIA_QUADRA:
-                /* Disable the inactive slot interrupts by making those lines outputs. */
-                if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
-                    (macintosh_config->adb_type != MAC_ADB_PB2)) {
-                        via2[vBufA] |= 0x7F;
-                        via2[vDirA] |= 0x7F;
+                /* Make the port A line an input. Probably redundant. */
+                if (macintosh_config->via_type == MAC_VIA_II) {
+                        /* The top two bits are RAM size outputs. */
+                        via2[vDirA] &= 0xC0 | ~(1 << irq_idx);
+                } else {
+                        /* Allow NuBus slots 9 through F. */
+                        via2[vDirA] &= 0x80 | ~(1 << irq_idx);
                 }
+                /* fall through */
+        case MAC_VIA_IICI:
+                via_irq_enable(irq);
+                break;
+        }
+}
+
+void via_nubus_irq_shutdown(int irq)
+{
+        switch (macintosh_config->via_type) {
+        case MAC_VIA_II:
+        case MAC_VIA_QUADRA:
+                /* Ensure that the umbrella CA1 interrupt remains enabled. */
+                via_irq_enable(irq);
+                break;
+        case MAC_VIA_IICI:
+                via_irq_disable(irq);
                 break;
         }
 }
@@ -531,25 +563,18 @@ void via_irq_enable(int irq) {
         } else if (irq_src == 7) {
                 switch (macintosh_config->via_type) {
                 case MAC_VIA_II:
+                case MAC_VIA_QUADRA:
                         nubus_disabled &= ~(1 << irq_idx);
                         /* Enable the CA1 interrupt when no slot is disabled. */
                         if (!nubus_disabled)
                                 via2[gIER] = IER_SET_BIT(1);
                         break;
-                case MAC_VIA_IIci:
+                case MAC_VIA_IICI:
                         /* On RBV, enable the slot interrupt.
                          * SIER works like IER.
                          */
                         via2[rSIER] = IER_SET_BIT(irq_idx);
                         break;
-                case MAC_VIA_QUADRA:
-                        /* Make the port A line an input to enable the slot irq.
-                         * But not on PowerBooks, that's ADB.
-                         */
-                        if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
-                            (macintosh_config->adb_type != MAC_ADB_PB2))
-                                via2[vDirA] &= ~(1 << irq_idx);
-                        break;
                 }
         }
 }
@@ -569,60 +594,18 @@ void via_irq_disable(int irq) {
         } else if (irq_src == 7) {
                 switch (macintosh_config->via_type) {
                 case MAC_VIA_II:
+                case MAC_VIA_QUADRA:
                         nubus_disabled |= 1 << irq_idx;
                         if (nubus_disabled)
                                 via2[gIER] = IER_CLR_BIT(1);
                         break;
-                case MAC_VIA_IIci:
+                case MAC_VIA_IICI:
                         via2[rSIER] = IER_CLR_BIT(irq_idx);
                         break;
-                case MAC_VIA_QUADRA:
-                        if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
-                            (macintosh_config->adb_type != MAC_ADB_PB2))
-                                via2[vDirA] |= 1 << irq_idx;
-                        break;
                 }
         }
 }
 
-void via_irq_clear(int irq) {
-        int irq_src     = IRQ_SRC(irq);
-        int irq_idx     = IRQ_IDX(irq);
-        int irq_bit     = 1 << irq_idx;
-
-        if (irq_src == 1) {
-                via1[vIFR] = irq_bit;
-        } else if (irq_src == 2) {
-                via2[gIFR] = irq_bit | rbv_clear;
-        } else if (irq_src == 7) {
-                /* FIXME: There is no way to clear an individual nubus slot
-                 * IRQ flag, other than getting the device to do it.
-                 */
-        }
-}
-
-/*
- * Returns nonzero if an interrupt is pending on the given
- * VIA/IRQ combination.
- */
-
-int via_irq_pending(int irq)
-{
-        int irq_src     = IRQ_SRC(irq);
-        int irq_idx     = IRQ_IDX(irq);
-        int irq_bit     = 1 << irq_idx;
-
-        if (irq_src == 1) {
-                return via1[vIFR] & irq_bit;
-        } else if (irq_src == 2) {
-                return via2[gIFR] & irq_bit;
-        } else if (irq_src == 7) {
-                /* Always 0 for MAC_VIA_QUADRA if the slot irq is disabled. */
-                return ~via2[gBufA] & irq_bit;
-        }
-        return 0;
-}
-
 void via1_set_head(int head)
 {
         if (head == 0)
@@ -631,3 +614,9 @@ void via1_set_head(int head)
                 via1[vBufA] |= VIA1A_vHeadSel;
 }
 EXPORT_SYMBOL(via1_set_head);
+
+int via2_scsi_drq_pending(void)
+{
+        return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ));
+}
+EXPORT_SYMBOL(via2_scsi_drq_pending);
diff --git a/arch/m68k/mm/Makefile b/arch/m68k/mm/Makefile
index 09cadf1058d5..cfbf3205724a 100644
--- a/arch/m68k/mm/Makefile
+++ b/arch/m68k/mm/Makefile
@@ -4,6 +4,8 @@
 
 obj-y   := init.o
 
-obj-$(CONFIG_MMU)               += cache.o fault.o hwtest.o
-obj-$(CONFIG_MMU_MOTOROLA)      += kmap.o memory.o motorola.o
-obj-$(CONFIG_MMU_SUN3)          += sun3kmap.o sun3mmu.o
+obj-$(CONFIG_MMU)               += cache.o fault.o
+obj-$(CONFIG_MMU_MOTOROLA)      += kmap.o memory.o motorola.o hwtest.o
+obj-$(CONFIG_MMU_SUN3)          += sun3kmap.o sun3mmu.o hwtest.o
+obj-$(CONFIG_MMU_COLDFIRE)      += kmap.o memory.o mcfmmu.o
+
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
index 5437fff5fe07..95d0bf66e2e2 100644
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -74,8 +74,16 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr)
 /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
 void flush_icache_range(unsigned long address, unsigned long endaddr)
 {
-
-        if (CPU_IS_040_OR_060) {
+        if (CPU_IS_COLDFIRE) {
+                unsigned long start, end;
+                start = address & ICACHE_SET_MASK;
+                end = endaddr & ICACHE_SET_MASK;
+                if (start > end) {
+                        flush_cf_icache(0, end);
+                        end = ICACHE_MAX_ADDR;
+                }
+                flush_cf_icache(start, end);
+        } else if (CPU_IS_040_OR_060) {
                 address &= PAGE_MASK;
 
                 do {
@@ -100,7 +108,17 @@ EXPORT_SYMBOL(flush_icache_range);
 void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
                              unsigned long addr, int len)
 {
-        if (CPU_IS_040_OR_060) {
+        if (CPU_IS_COLDFIRE) {
+                unsigned long start, end;
+                start = addr & ICACHE_SET_MASK;
+                end = (addr + len) & ICACHE_SET_MASK;
+                if (start > end) {
+                        flush_cf_icache(0, end);
+                        end = ICACHE_MAX_ADDR;
+                }
+                flush_cf_icache(start, end);
+
+        } else if (CPU_IS_040_OR_060) {
                 asm volatile ("nop\n\t"
                               ".chip 68040\n\t"
                               "cpushp %%bc,(%0)\n\t"
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
index bbe525434ccb..89f3b203814b 100644
--- a/arch/m68k/mm/init_mm.c
+++ b/arch/m68k/mm/init_mm.c
@@ -24,6 +24,7 @@
 #include <asm/page.h>
 #include <asm/pgalloc.h>
 #include <asm/system.h>
+#include <asm/traps.h>
 #include <asm/machdep.h>
 #include <asm/io.h>
 #ifdef CONFIG_ATARI
@@ -75,6 +76,38 @@ extern void init_pointer_table(unsigned long ptable);
 
 extern pmd_t *zero_pgtable;
 
+#if defined(CONFIG_MMU) && !defined(CONFIG_COLDFIRE)
+#define VECTORS &vectors[0]
+#else
+#define VECTORS _ramvec
+#endif
+
+void __init print_memmap(void)
+{
+#define UL(x) ((unsigned long) (x))
+#define MLK(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 10
+#define MLM(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 20
+#define MLK_ROUNDUP(b, t) b, t, DIV_ROUND_UP(((t) - (b)), 1024)
+
+        pr_notice("Virtual kernel memory layout:\n"
+                "    vector  : 0x%08lx - 0x%08lx   (%4ld KiB)\n"
+                "    kmap    : 0x%08lx - 0x%08lx   (%4ld MiB)\n"
+                "    vmalloc : 0x%08lx - 0x%08lx   (%4ld MiB)\n"
+                "    lowmem  : 0x%08lx - 0x%08lx   (%4ld MiB)\n"
+                "      .init : 0x%p" " - 0x%p" "   (%4d KiB)\n"
+                "      .text : 0x%p" " - 0x%p" "   (%4d KiB)\n"
+                "      .data : 0x%p" " - 0x%p" "   (%4d KiB)\n"
+                "      .bss  : 0x%p" " - 0x%p" "   (%4d KiB)\n",
+                MLK(VECTORS, VECTORS + 256),
+                MLM(KMAP_START, KMAP_END),
+                MLM(VMALLOC_START, VMALLOC_END),
+                MLM(PAGE_OFFSET, (unsigned long)high_memory),
+                MLK_ROUNDUP(__init_begin, __init_end),
+                MLK_ROUNDUP(_stext, _etext),
+                MLK_ROUNDUP(_sdata, _edata),
+                MLK_ROUNDUP(_sbss, _ebss));
+}
+
 void __init mem_init(void)
 {
         pg_data_t *pgdat;
@@ -106,7 +139,7 @@ void __init mem_init(void)
                 }
         }
 
-#ifndef CONFIG_SUN3
+#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
         /* insert pointer tables allocated so far into the tablelist */
         init_pointer_table((unsigned long)kernel_pg_dir);
         for (i = 0; i < PTRS_PER_PGD; i++) {
@@ -125,6 +158,7 @@ void __init mem_init(void)
                codepages << (PAGE_SHIFT-10),
                datapages << (PAGE_SHIFT-10),
                initpages << (PAGE_SHIFT-10));
+        print_memmap();
 }
 
 #ifdef CONFIG_BLK_DEV_INITRD
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 69345849454b..1cc2bed4c3dd 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -171,7 +171,8 @@ void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cachefla
                         break;
                 }
         } else {
-                physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
+                physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED |
+                             _PAGE_DIRTY | _PAGE_READWRITE);
                 switch (cacheflag) {
                 case IOMAP_NOCACHE_SER:
                 case IOMAP_NOCACHE_NONSER:
diff --git a/arch/m68k/mm/mcfmmu.c b/arch/m68k/mm/mcfmmu.c
new file mode 100644
index 000000000000..babd5a97cdcb
--- /dev/null
+++ b/arch/m68k/mm/mcfmmu.c
@@ -0,0 +1,198 @@
+/*
+ * Based upon linux/arch/m68k/mm/sun3mmu.c
+ * Based upon linux/arch/ppc/mm/mmu_context.c
+ *
+ * Implementations of mm routines specific to the Coldfire MMU.
+ *
+ * Copyright (c) 2008 Freescale Semiconductor, Inc.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/bootmem.h>
+
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/mmu_context.h>
+#include <asm/mcf_pgalloc.h>
+#include <asm/tlbflush.h>
+
+#define KMAPAREA(x)     ((x >= VMALLOC_START) && (x < KMAP_END))
+
+mm_context_t next_mmu_context;
+unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
+atomic_t nr_free_contexts;
+struct mm_struct *context_mm[LAST_CONTEXT+1];
+extern unsigned long num_pages;
+
+void free_initmem(void)
+{
+}
+
+/*
+ * ColdFire paging_init derived from sun3.
+ */
+void __init paging_init(void)
+{
+        pgd_t *pg_dir;
+        pte_t *pg_table;
+        unsigned long address, size;
+        unsigned long next_pgtable, bootmem_end;
+        unsigned long zones_size[MAX_NR_ZONES];
+        enum zone_type zone;
+        int i;
+
+        empty_zero_page = (void *) alloc_bootmem_pages(PAGE_SIZE);
+        memset((void *) empty_zero_page, 0, PAGE_SIZE);
+
+        pg_dir = swapper_pg_dir;
+        memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
+
+        size = num_pages * sizeof(pte_t);
+        size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
+        next_pgtable = (unsigned long) alloc_bootmem_pages(size);
+
+        bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK;
+        pg_dir += PAGE_OFFSET >> PGDIR_SHIFT;
+
+        address = PAGE_OFFSET;
+        while (address < (unsigned long)high_memory) {
+                pg_table = (pte_t *) next_pgtable;
+                next_pgtable += PTRS_PER_PTE * sizeof(pte_t);
+                pgd_val(*pg_dir) = (unsigned long) pg_table;
+                pg_dir++;
+
+                /* now change pg_table to kernel virtual addresses */
+                for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) {
+                        pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT);
+                        if (address >= (unsigned long) high_memory)
+                                pte_val(pte) = 0;
+
+                        set_pte(pg_table, pte);
+                        address += PAGE_SIZE;
+                }
+        }
+
+        current->mm = NULL;
+
+        for (zone = 0; zone < MAX_NR_ZONES; zone++)
+                zones_size[zone] = 0x0;
+        zones_size[ZONE_DMA] = num_pages;
+        free_area_init(zones_size);
+}
+
+int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word)
+{
+        unsigned long flags, mmuar;
+        struct mm_struct *mm;
+        pgd_t *pgd;
+        pmd_t *pmd;
+        pte_t *pte;
+        int asid;
+
+        local_irq_save(flags);
+
+        mmuar = (dtlb) ? mmu_read(MMUAR) :
+                regs->pc + (extension_word * sizeof(long));
+
+        mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
+        if (!mm) {
+                local_irq_restore(flags);
+                return -1;
+        }
+
+        pgd = pgd_offset(mm, mmuar);
+        if (pgd_none(*pgd))  {
+                local_irq_restore(flags);
+                return -1;
+        }
+
+        pmd = pmd_offset(pgd, mmuar);
+        if (pmd_none(*pmd)) {
+                local_irq_restore(flags);
+                return -1;
+        }
+
+        pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
+                                : pte_offset_map(pmd, mmuar);
+        if (pte_none(*pte) || !pte_present(*pte)) {
+                local_irq_restore(flags);
+                return -1;
+        }
+
+        if (write) {
+                if (!pte_write(*pte)) {
+                        local_irq_restore(flags);
+                        return -1;
+                }
+                set_pte(pte, pte_mkdirty(*pte));
+        }
+
+        set_pte(pte, pte_mkyoung(*pte));
+        asid = mm->context & 0xff;
+        if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
+                set_pte(pte, pte_wrprotect(*pte));
+
+        mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
+                (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
+                >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
+
+        mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
+                ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
+
+        if (dtlb)
+                mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
+        else
+                mmu_write(MMUOR, MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA);
+
+        local_irq_restore(flags);
+        return 0;
+}
+
+/*
+ * Initialize the context management stuff.
+ * The following was taken from arch/ppc/mmu_context.c
+ */
+void __init mmu_context_init(void)
+{
+        /*
+         * Some processors have too few contexts to reserve one for
+         * init_mm, and require using context 0 for a normal task.
+         * Other processors reserve the use of context zero for the kernel.
+         * This code assumes FIRST_CONTEXT < 32.
+         */
+        context_map[0] = (1 << FIRST_CONTEXT) - 1;
+        next_mmu_context = FIRST_CONTEXT;
+        atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
+}
+
+/*
+ * Steal a context from a task that has one at the moment.
+ * This is only used on 8xx and 4xx and we presently assume that
+ * they don't do SMP.  If they do then thicfpgalloc.hs will have to check
+ * whether the MM we steal is in use.
+ * We also assume that this is only used on systems that don't
+ * use an MMU hash table - this is true for 8xx and 4xx.
+ * This isn't an LRU system, it just frees up each context in
+ * turn (sort-of pseudo-random replacement :).  This would be the
+ * place to implement an LRU scheme if anyone was motivated to do it.
+ *  -- paulus
+ */
+void steal_context(void)
+{
+        struct mm_struct *mm;
+        /*
+         * free up context `next_mmu_context'
+         * if we shouldn't free context 0, don't...
+         */
+        if (next_mmu_context < FIRST_CONTEXT)
+                next_mmu_context = FIRST_CONTEXT;
+        mm = context_mm[next_mmu_context];
+        flush_tlb_mm(mm);
+        destroy_context(mm);
+}
+
diff --git a/arch/m68k/mm/memory.c b/arch/m68k/mm/memory.c
index 34c77ce24fba..a5dbb74fe1de 100644
--- a/arch/m68k/mm/memory.c
+++ b/arch/m68k/mm/memory.c
@@ -203,7 +203,9 @@ static inline void pushcl040(unsigned long paddr)
 
 void cache_clear (unsigned long paddr, int len)
 {
-    if (CPU_IS_040_OR_060) {
+    if (CPU_IS_COLDFIRE) {
+        flush_cf_bcache(0, DCACHE_MAX_ADDR);
+    } else if (CPU_IS_040_OR_060) {
         int tmp;
 
         /*
@@ -250,7 +252,9 @@ EXPORT_SYMBOL(cache_clear);
 
 void cache_push (unsigned long paddr, int len)
 {
-    if (CPU_IS_040_OR_060) {
+    if (CPU_IS_COLDFIRE) {
+        flush_cf_bcache(0, DCACHE_MAX_ADDR);
+    } else if (CPU_IS_040_OR_060) {
         int tmp = PAGE_SIZE;
 
         /*
diff --git a/arch/m68k/mvme16x/config.c b/arch/m68k/mvme16x/config.c
index 31a66d99cbca..c3fb3bdd7ed9 100644
--- a/arch/m68k/mvme16x/config.c
+++ b/arch/m68k/mvme16x/config.c
@@ -124,6 +124,163 @@ static void __init mvme16x_init_IRQ (void)
 #define PccSCCMICR      0x1d
 #define PccSCCTICR      0x1e
 #define PccSCCRICR      0x1f
+#define PccTPIACKR      0x25
+
+#ifdef CONFIG_EARLY_PRINTK
+
+/**** cd2401 registers ****/
+#define CD2401_ADDR     (0xfff45000)
+
+#define CyGFRCR         (0x81)
+#define CyCCR           (0x13)
+#define      CyCLR_CHAN         (0x40)
+#define      CyINIT_CHAN        (0x20)
+#define      CyCHIP_RESET       (0x10)
+#define      CyENB_XMTR         (0x08)
+#define      CyDIS_XMTR         (0x04)
+#define      CyENB_RCVR         (0x02)
+#define      CyDIS_RCVR         (0x01)
+#define CyCAR           (0xee)
+#define CyIER           (0x11)
+#define      CyMdmCh            (0x80)
+#define      CyRxExc            (0x20)
+#define      CyRxData           (0x08)
+#define      CyTxMpty           (0x02)
+#define      CyTxRdy            (0x01)
+#define CyLICR          (0x26)
+#define CyRISR          (0x89)
+#define      CyTIMEOUT          (0x80)
+#define      CySPECHAR          (0x70)
+#define      CyOVERRUN          (0x08)
+#define      CyPARITY           (0x04)
+#define      CyFRAME            (0x02)
+#define      CyBREAK            (0x01)
+#define CyREOIR         (0x84)
+#define CyTEOIR         (0x85)
+#define CyMEOIR         (0x86)
+#define      CyNOTRANS          (0x08)
+#define CyRFOC          (0x30)
+#define CyRDR           (0xf8)
+#define CyTDR           (0xf8)
+#define CyMISR          (0x8b)
+#define CyRISR          (0x89)
+#define CyTISR          (0x8a)
+#define CyMSVR1         (0xde)
+#define CyMSVR2         (0xdf)
+#define      CyDSR              (0x80)
+#define      CyDCD              (0x40)
+#define      CyCTS              (0x20)
+#define      CyDTR              (0x02)
+#define      CyRTS              (0x01)
+#define CyRTPRL         (0x25)
+#define CyRTPRH         (0x24)
+#define CyCOR1          (0x10)
+#define      CyPARITY_NONE      (0x00)
+#define      CyPARITY_E         (0x40)
+#define      CyPARITY_O         (0xC0)
+#define      Cy_5_BITS          (0x04)
+#define      Cy_6_BITS          (0x05)
+#define      Cy_7_BITS          (0x06)
+#define      Cy_8_BITS          (0x07)
+#define CyCOR2          (0x17)
+#define      CyETC              (0x20)
+#define      CyCtsAE            (0x02)
+#define CyCOR3          (0x16)
+#define      Cy_1_STOP          (0x02)
+#define      Cy_2_STOP          (0x04)
+#define CyCOR4          (0x15)
+#define      CyREC_FIFO         (0x0F)  /* Receive FIFO threshold */
+#define CyCOR5          (0x14)
+#define CyCOR6          (0x18)
+#define CyCOR7          (0x07)
+#define CyRBPR          (0xcb)
+#define CyRCOR          (0xc8)
+#define CyTBPR          (0xc3)
+#define CyTCOR          (0xc0)
+#define CySCHR1         (0x1f)
+#define CySCHR2         (0x1e)
+#define CyTPR           (0xda)
+#define CyPILR1         (0xe3)
+#define CyPILR2         (0xe0)
+#define CyPILR3         (0xe1)
+#define CyCMR           (0x1b)
+#define      CyASYNC            (0x02)
+#define CyLICR          (0x26)
+#define CyLIVR          (0x09)
+#define CySCRL          (0x23)
+#define CySCRH          (0x22)
+#define CyTFTC          (0x80)
+
+static void cons_write(struct console *co, const char *str, unsigned count)
+{
+        volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
+        volatile u_char sink;
+        u_char ier;
+        int port;
+        u_char do_lf = 0;
+        int i = 0;
+
+        /* Ensure transmitter is enabled! */
+
+        port = 0;
+        base_addr[CyCAR] = (u_char)port;
+        while (base_addr[CyCCR])
+                ;
+        base_addr[CyCCR] = CyENB_XMTR;
+
+        ier = base_addr[CyIER];
+        base_addr[CyIER] = CyTxMpty;
+
+        while (1) {
+                if (pcc2chip[PccSCCTICR] & 0x20)
+                {
+                        /* We have a Tx int. Acknowledge it */
+                        sink = pcc2chip[PccTPIACKR];
+                        if ((base_addr[CyLICR] >> 2) == port) {
+                                if (i == count) {
+                                        /* Last char of string is now output */
+                                        base_addr[CyTEOIR] = CyNOTRANS;
+                                        break;
+                                }
+                                if (do_lf) {
+                                        base_addr[CyTDR] = '\n';
+                                        str++;
+                                        i++;
+                                        do_lf = 0;
+                                }
+                                else if (*str == '\n') {
+                                        base_addr[CyTDR] = '\r';
+                                        do_lf = 1;
+                                }
+                                else {
+                                        base_addr[CyTDR] = *str++;
+                                        i++;
+                                }
+                                base_addr[CyTEOIR] = 0;
+                        }
+                        else
+                                base_addr[CyTEOIR] = CyNOTRANS;
+                }
+        }
+
+        base_addr[CyIER] = ier;
+}
+
+static struct console cons_info =
+{
+        .name   = "sercon",
+        .write  = cons_write,
+        .flags  = CON_PRINTBUFFER | CON_BOOT,
+        .index  = -1,
+};
+
+static void __init mvme16x_early_console(void)
+{
+        register_console(&cons_info);
+
+        printk(KERN_INFO "MVME16x: early console registered\n");
+}
+#endif
 
 void __init config_mvme16x(void)
 {
@@ -183,6 +340,9 @@ void __init config_mvme16x(void)
         pcc2chip[PccSCCMICR] = 0x10;
         pcc2chip[PccSCCTICR] = 0x10;
         pcc2chip[PccSCCRICR] = 0x10;
+#ifdef CONFIG_EARLY_PRINTK
+        mvme16x_early_console();
+#endif
     }
 }
 
diff --git a/arch/m68k/platform/54xx/config.c b/arch/m68k/platform/54xx/config.c
index 78130984db95..ee043540bfa2 100644
--- a/arch/m68k/platform/54xx/config.c
+++ b/arch/m68k/platform/54xx/config.c
@@ -13,11 +13,17 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <asm/pgalloc.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
 #include <asm/m54xxsim.h>
 #include <asm/mcfuart.h>
 #include <asm/m54xxgpt.h>
+#ifdef CONFIG_MMU
+#include <asm/mmu_context.h>
+#endif
 
 /***************************************************************************/
 
@@ -95,8 +101,49 @@ static void mcf54xx_reset(void)
 
 /***************************************************************************/
 
+#ifdef CONFIG_MMU
+
+unsigned long num_pages;
+
+static void __init mcf54xx_bootmem_alloc(void)
+{
+        unsigned long start_pfn;
+        unsigned long memstart;
+
+        /* _rambase and _ramend will be naturally page aligned */
+        m68k_memory[0].addr = _rambase;
+        m68k_memory[0].size = _ramend - _rambase;
+
+        /* compute total pages in system */
+        num_pages = (_ramend - _rambase) >> PAGE_SHIFT;
+
+        /* page numbers */
+        memstart = PAGE_ALIGN(_ramstart);
+        min_low_pfn = _rambase >> PAGE_SHIFT;
+        start_pfn = memstart >> PAGE_SHIFT;
+        max_low_pfn = _ramend >> PAGE_SHIFT;
+        high_memory = (void *)_ramend;
+
+        m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
+        module_fixup(NULL, __start_fixup, __stop_fixup);
+
+        /* setup bootmem data */
+        m68k_setup_node(0);
+        memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
+                min_low_pfn, max_low_pfn);
+        free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
+}
+
+#endif /* CONFIG_MMU */
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
+#ifdef CONFIG_MMU
+        mcf54xx_bootmem_alloc();
+        mmu_context_init();
+#endif
         mach_reset = mcf54xx_reset;
         m54xx_uarts_init();
 }
diff --git a/arch/m68k/platform/68328/Makefile b/arch/m68k/platform/68328/Makefile
index e4dfd8fde068..ee61bf84d4a0 100644
--- a/arch/m68k/platform/68328/Makefile
+++ b/arch/m68k/platform/68328/Makefile
@@ -14,12 +14,8 @@ obj-$(CONFIG_M68328)	+= config.o
 obj-$(CONFIG_ROM)       += romvec.o
 
 extra-y                 := head.o
-extra-$(CONFIG_M68328)  += bootlogo.rh head.o
-
-$(obj)/bootlogo.rh: $(src)/bootlogo.h
-        perl $(src)/bootlogo.pl < $(src)/bootlogo.h > $(obj)/bootlogo.rh
 
 $(obj)/head.o: $(obj)/$(head-y)
         ln -sf $(head-y) $(obj)/head.o
 
-clean-files := $(obj)/bootlogo.rh $(obj)/head.o $(head-y)
+clean-files := $(obj)/head.o $(head-y)
diff --git a/arch/m68k/platform/68328/bootlogo.h b/arch/m68k/platform/68328/bootlogo.h
index 67bc2c17386e..b896c933fafc 100644
--- a/arch/m68k/platform/68328/bootlogo.h
+++ b/arch/m68k/platform/68328/bootlogo.h
@@ -1,6 +1,6 @@
 #define bootlogo_width 160
 #define bootlogo_height 160
-static unsigned char bootlogo_bits[] = {
+unsigned char __attribute__ ((aligned(16))) bootlogo_bits[] = {
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x01, 0x00, 0x00, 0x00,
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
   0x00, 0x00, 0x40, 0x55, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
diff --git a/arch/m68k/platform/68328/bootlogo.pl b/arch/m68k/platform/68328/bootlogo.pl
deleted file mode 100644
index b04ae3f50da5..000000000000
--- a/arch/m68k/platform/68328/bootlogo.pl
+++ /dev/null
@@ -1,10 +0,0 @@
-
-$_ = join("", <>);
-
-s/(0x[0-9a-f]{2})/sprintf("0x%.2x",ord(pack("b8",unpack("B8",chr(hex($1))))))/gei;
-
-s/^ /   .byte /gm;
-s/[,};]+$//gm;
-s/^static.*//gm;
-
-print $_;
diff --git a/arch/m68k/platform/68328/config.c b/arch/m68k/platform/68328/config.c
index a7bd21deb00f..d70bf2623db1 100644
--- a/arch/m68k/platform/68328/config.c
+++ b/arch/m68k/platform/68328/config.c
@@ -20,6 +20,9 @@
 #include <asm/system.h>
 #include <asm/machdep.h>
 #include <asm/MC68328.h>
+#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
+#include "bootlogo.h"
+#endif
 
 /***************************************************************************/
 
diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
index aecff532b343..2ebfd6420818 100644
--- a/arch/m68k/platform/68328/head-pilot.S
+++ b/arch/m68k/platform/68328/head-pilot.S
@@ -24,19 +24,7 @@
 .global _ramstart
 .global _ramend
 
-.global penguin_bits
-
-#ifdef CONFIG_PILOT
-
-#define IMR 0xFFFFF304
-
-        .data
-        .align 16
-
-penguin_bits:   
-#include "bootlogo.rh"
-
-#endif
+.global bootlogo_bits
 
 /*****************************************************************************/
 
@@ -185,9 +173,6 @@ L3:
         moveq   #79, %d7
         movel   %d0, _ramend
 
-        movel   %a3, %d0
-        movel   %d0, rom_length
-
         pea     0
         pea     env
         pea     %sp@(4)
@@ -196,7 +181,7 @@ L3:
         DBG_PUTC('H')
 
 #ifdef CONFIG_PILOT
-        movel   #penguin_bits, 0xFFFFFA00
+        movel   #bootlogo_bits, 0xFFFFFA00
         moveb   #10, 0xFFFFFA05
         movew   #160, 0xFFFFFA08
         movew   #160, 0xFFFFFA0A
diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
index 6ec77d3ea0b3..a5ff96d0295f 100644
--- a/arch/m68k/platform/68328/head-rom.S
+++ b/arch/m68k/platform/68328/head-rom.S
@@ -8,7 +8,7 @@
         .global _ramend
 
 #ifdef CONFIG_INIT_LCD
-        .global splash_bits
+        .global bootlogo_bits
 #endif
 
         .data
@@ -29,16 +29,11 @@ _ramend:
 
 #define RAMEND  (CONFIG_RAMBASE + CONFIG_RAMSIZE)
 
-#ifdef CONFIG_INIT_LCD
-splash_bits:
-#include "bootlogo.rh"
-#endif
-        
         .text
 _start:
 _stext: movew   #0x2700,%sr
 #ifdef CONFIG_INIT_LCD
-        movel   #splash_bits, 0xfffffA00 /* LSSA */
+        movel   #bootlogo_bits, 0xfffffA00 /* LSSA */
         moveb   #0x28,   0xfffffA05     /* LVPW */
         movew   #0x280,  0xFFFFFa08     /* LXMAX */
         movew   #0x1df,  0xFFFFFa0a     /* LYMAX */
diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
index 309f725995bf..f2678866067b 100644
--- a/arch/m68k/platform/68328/timers.c
+++ b/arch/m68k/platform/68328/timers.c
@@ -93,7 +93,6 @@ static struct clocksource m68328_clk = {
         .name   = "timer",
         .rating = 250,
         .read   = m68328_read_clk,
-        .shift  = 20,
         .mask   = CLOCKSOURCE_MASK(32),
         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
@@ -115,8 +114,7 @@ void hw_timer_init(void)
 
         /* Enable timer 1 */
         TCTL |= TCTL_TEN;
-        m68328_clk.mult = clocksource_hz2mult(TICKS_PER_JIFFY*HZ, m68328_clk.shift);
-        clocksource_register(&m68328_clk);
+        clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
 }
 
 /***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/dma_timer.c b/arch/m68k/platform/coldfire/dma_timer.c
index a5f562823d7a..235ad57c4707 100644
--- a/arch/m68k/platform/coldfire/dma_timer.c
+++ b/arch/m68k/platform/coldfire/dma_timer.c
@@ -44,7 +44,6 @@ static struct clocksource clocksource_cf_dt = {
         .rating         = 200,
         .read           = cf_dt_get_cycles,
         .mask           = CLOCKSOURCE_MASK(32),
-        .shift          = 20,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
@@ -60,9 +59,7 @@ static int __init  init_cf_dt_clocksource(void)
         __raw_writeb(0x00, DTER0);
         __raw_writel(0x00000000, DTRR0);
         __raw_writew(DMA_DTMR_CLK_DIV_16 | DMA_DTMR_ENABLE, DTMR0);
-        clocksource_cf_dt.mult = clocksource_hz2mult(DMA_FREQ,
-                                                     clocksource_cf_dt.shift);
-        return clocksource_register(&clocksource_cf_dt);
+        return clocksource_register_hz(&clocksource_cf_dt, DMA_FREQ);
 }
 
 arch_initcall(init_cf_dt_clocksource);
diff --git a/arch/m68k/platform/coldfire/entry.S b/arch/m68k/platform/coldfire/entry.S
index 3157461a8d1d..863889fc31c9 100644
--- a/arch/m68k/platform/coldfire/entry.S
+++ b/arch/m68k/platform/coldfire/entry.S
@@ -54,7 +54,6 @@ sw_usp:
 .globl ret_from_signal
 .globl sys_call_table
 .globl inthandler
-.globl fasthandler
 
 enosys:
         mov.l   #sys_ni_syscall,%d3
@@ -63,6 +62,7 @@ enosys:
 ENTRY(system_call)
         SAVE_ALL_SYS
         move    #0x2000,%sr             /* enable intrs again */
+        GET_CURRENT(%d2)
 
         cmpl    #NR_syscalls,%d0
         jcc     enosys
@@ -166,6 +166,7 @@ Lsignal_return:
  */
 ENTRY(inthandler)
         SAVE_ALL_INT
+        GET_CURRENT(%d2)
 
         movew   %sp@(PT_OFF_FORMATVEC),%d0 /* put exception # in d0 */
         andl    #0x03fc,%d0             /* mask out vector only */
@@ -191,7 +192,9 @@ ENTRY(resume)
         movel   %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */
         RDUSP                                    /* movel %usp,%a3 */
         movel   %a3,%a0@(TASK_THREAD+THREAD_USP) /* save thread user stack */
-
+#ifdef CONFIG_MMU
+        movel   %a1,%a2                          /* set new current */
+#endif
         movel   %a1@(TASK_THREAD+THREAD_USP),%a3 /* restore thread user stack */
         WRUSP                                    /* movel %a3,%usp */
         movel   %a1@(TASK_THREAD+THREAD_KSP),%sp /* restore new kernel stack */
diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
index ff0045793450..292a1a5a2d7c 100644
--- a/arch/m68k/platform/coldfire/gpio.c
+++ b/arch/m68k/platform/coldfire/gpio.c
@@ -15,7 +15,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 
 #include <asm/gpio.h>
 #include <asm/pinmux.h>
@@ -115,13 +115,14 @@ void mcf_gpio_free(struct gpio_chip *chip, unsigned offset)
                 mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0);
 }
 
-struct sysdev_class mcf_gpio_sysclass = {
-        .name   = "gpio",
+struct bus_type mcf_gpio_subsys = {
+        .name           = "gpio",
+        .dev_name       = "gpio",
 };
 
 static int __init mcf_gpio_sysinit(void)
 {
-        return sysdev_class_register(&mcf_gpio_sysclass);
+        return subsys_system_register(&mcf_gpio_subsys, NULL);
 }
 
 core_initcall(mcf_gpio_sysinit);
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
index c33483824a2e..38f04a3f6207 100644
--- a/arch/m68k/platform/coldfire/head.S
+++ b/arch/m68k/platform/coldfire/head.S
@@ -3,7 +3,7 @@
 /*
  *      head.S -- common startup code for ColdFire CPUs.
  *
- *      (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>.
+ *      (C) Copyright 1999-2011, Greg Ungerer <gerg@snapgear.com>.
  */
 
 /*****************************************************************************/
@@ -13,6 +13,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/coldfire.h>
 #include <asm/mcfsim.h>
+#include <asm/mcfmmu.h>
 #include <asm/thread_info.h>
 
 /*****************************************************************************/
@@ -135,6 +136,14 @@ _init_sp:
 
 __HEAD
 
+#ifdef CONFIG_MMU
+_start0:
+        jmp     _start
+.global kernel_pg_dir
+.equ    kernel_pg_dir,_start0
+.equ    .,_start0+0x1000
+#endif
+
 /*
  *      This is the codes first entry point. This is where it all
  *      begins...
@@ -143,6 +152,9 @@ __HEAD
 _start:
         nop                                     /* filler */
         movew   #0x2700, %sr                    /* no interrupts */
+        movel   #CACHE_INIT,%d0                 /* disable cache */
+        movec   %d0,%CACR
+        nop
 #if defined(CONFIG_UBOOT)
         movel   %sp,_init_sp                    /* save initial stack pointer */
 #endif
@@ -176,9 +188,6 @@ _start:
          *      it is very similar. Define the exact settings in the headers
          *      then the code here is the same for all.
          */
-        movel   #CACHE_INIT,%d0                 /* invalidate whole cache */
-        movec   %d0,%CACR
-        nop
         movel   #ACR0_MODE,%d0                  /* set RAM region for caching */
         movec   %d0,%ACR0
         movel   #ACR1_MODE,%d0                  /* anything else to cache? */
@@ -193,6 +202,26 @@ _start:
         movec   %d0,%CACR
         nop
 
+#ifdef CONFIG_MMU
+        /*
+         *      Identity mapping for the kernel region.
+         */
+        movel   #(MMUBASE+1),%d0                /* enable MMUBAR registers */
+        movec   %d0,%MMUBAR
+        movel   #MMUOR_CA,%d0                   /* clear TLB entries */
+        movel   %d0,MMUOR
+        movel   #0,%d0                          /* set ASID to 0 */
+        movec   %d0,%asid
+
+        movel   #MMUCR_EN,%d0                   /* Enable the identity map */
+        movel   %d0,MMUCR
+        nop                                     /* sync i-pipeline */
+
+        movel   #_vstart,%a0                    /* jump to "virtual" space */
+        jmp     %a0@
+_vstart:
+#endif /* CONFIG_MMU */
+
 #ifdef CONFIG_ROMFS_FS
         /*
          *      Move ROM filesystem above bss :-)
@@ -238,6 +267,22 @@ _clear_bss:
         lea     init_thread_union,%a0
         lea     THREAD_SIZE(%a0),%sp
 
+#ifdef CONFIG_MMU
+.global m68k_cputype
+.global m68k_mmutype
+.global m68k_fputype
+.global m68k_machtype
+        movel   #CPU_COLDFIRE,%d0
+        movel   %d0,m68k_cputype                /* Mark us as a ColdFire */
+        movel   #MMU_COLDFIRE,%d0
+        movel   %d0,m68k_mmutype
+        movel   #FPU_COLDFIRE,%d0
+        movel   %d0,m68k_fputype
+        movel   #MACH_M54XX,%d0
+        movel   %d0,m68k_machtype               /* Mark us as a 54xx machine */
+        lea     init_task,%a2                   /* Set "current" init task */
+#endif
+
         /*
          *      Assember start up done, start code proper.
          */
diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c
index c2b980926bec..02663d25822d 100644
--- a/arch/m68k/platform/coldfire/pit.c
+++ b/arch/m68k/platform/coldfire/pit.c
@@ -144,7 +144,6 @@ static struct clocksource pit_clk = {
         .name   = "pit",
         .rating = 100,
         .read   = pit_read_clk,
-        .shift  = 20,
         .mask   = CLOCKSOURCE_MASK(32),
 };
 
@@ -162,8 +161,7 @@ void hw_timer_init(void)
 
         setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
 
-        pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift);
-        clocksource_register(&pit_clk);
+        clocksource_register_hz(&pit_clk, FREQ);
 }
 
 /***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/sltimers.c b/arch/m68k/platform/coldfire/sltimers.c
index 6a85daf9a7fd..54e1452f853a 100644
--- a/arch/m68k/platform/coldfire/sltimers.c
+++ b/arch/m68k/platform/coldfire/sltimers.c
@@ -98,23 +98,25 @@ static struct irqaction mcfslt_timer_irq = {
 static cycle_t mcfslt_read_clk(struct clocksource *cs)
 {
         unsigned long flags;
-        u32 cycles;
-        u16 scnt;
+        u32 cycles, scnt;
 
         local_irq_save(flags);
         scnt = __raw_readl(TA(MCFSLT_SCNT));
         cycles = mcfslt_cnt;
+        if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
+                cycles += mcfslt_cycles_per_jiffy;
+                scnt = __raw_readl(TA(MCFSLT_SCNT));
+        }
         local_irq_restore(flags);
 
         /* subtract because slice timers count down */
-        return cycles - scnt;
+        return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt);
 }
 
 static struct clocksource mcfslt_clk = {
         .name   = "slt",
         .rating = 250,
         .read   = mcfslt_read_clk,
-        .shift  = 20,
         .mask   = CLOCKSOURCE_MASK(32),
         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
@@ -136,8 +138,7 @@ void hw_timer_init(void)
 
         setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
 
-        mcfslt_clk.mult = clocksource_hz2mult(MCF_BUSCLK, mcfslt_clk.shift);
-        clocksource_register(&mcfslt_clk);
+        clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
 
 #ifdef CONFIG_HIGHPROFILE
         mcfslt_profile_init();
diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c
index 60242f65fea9..0d90da32fcdb 100644
--- a/arch/m68k/platform/coldfire/timers.c
+++ b/arch/m68k/platform/coldfire/timers.c
@@ -88,7 +88,6 @@ static struct clocksource mcftmr_clk = {
         .name   = "tmr",
         .rating = 250,
         .read   = mcftmr_read_clk,
-        .shift  = 20,
         .mask   = CLOCKSOURCE_MASK(32),
         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
@@ -109,8 +108,7 @@ void hw_timer_init(void)
         __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
                 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
 
-        mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
-        clocksource_register(&mcftmr_clk);
+        clocksource_register_hz(&mcftmr_clk, FREQ);
 
         setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
 
diff --git a/arch/microblaze/include/asm/memblock.h b/arch/microblaze/include/asm/memblock.h
deleted file mode 100644
index 20a8e257c77f..000000000000
--- a/arch/microblaze/include/asm/memblock.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright (C) 2008 Michal Simek <monstr@monstr.eu>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_MEMBLOCK_H
-#define _ASM_MICROBLAZE_MEMBLOCK_H
-
-#endif /* _ASM_MICROBLAZE_MEMBLOCK_H */
-
-
diff --git a/arch/microblaze/include/asm/namei.h b/arch/microblaze/include/asm/namei.h
deleted file mode 100644
index 61d60b8a07d5..000000000000
--- a/arch/microblaze/include/asm/namei.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_NAMEI_H
-#define _ASM_MICROBLAZE_NAMEI_H
-
-#ifdef __KERNEL__
-
-/* This dummy routine maybe changed to something useful
- * for /usr/gnemul/ emulation stuff.
- * Look at asm-sparc/namei.h for details.
- */
-#define __emul_prefix() NULL
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_MICROBLAZE_NAMEI_H */
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
index b73da2ac21b3..1a8ab6a5c03f 100644
--- a/arch/microblaze/include/asm/thread_info.h
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -125,7 +125,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_MEMDIE              6       /* is terminating due to OOM killer */
 #define TIF_SYSCALL_AUDIT       9       /* syscall auditing active */
 #define TIF_SECCOMP             10      /* secure computing */
-#define TIF_FREEZE              14      /* Freezing for suspend */
 
 /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_POLLING_NRFLAG      16
@@ -137,7 +136,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
 #define _TIF_IRET               (1 << TIF_IRET)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
 
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 95cc295976a7..7dcb5bfffb75 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -103,10 +103,12 @@ void cpu_idle(void)
                 if (!idle)
                         idle = default_idle;
 
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched())
                         idle();
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
 
                 preempt_enable_no_resched();
                 schedule();
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 977484add216..80d314e81901 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -122,7 +122,6 @@ void __init early_init_devtree(void *params)
         of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line);
 
         /* Scan memory nodes and rebuild MEMBLOCKs */
-        memblock_init();
         of_scan_flat_dt(early_init_dt_scan_root, NULL);
         of_scan_flat_dt(early_init_dt_scan_memory, NULL);
 
@@ -130,7 +129,7 @@ void __init early_init_devtree(void *params)
         strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
         parse_early_param();
 
-        memblock_analyze();
+        memblock_allow_resize();
 
         pr_debug("Phys. mem: %lx\n", (unsigned long) memblock_phys_mem_size());
 
diff --git a/arch/microblaze/kernel/reset.c b/arch/microblaze/kernel/reset.c
index bd8ccab5ceff..88a01636f785 100644
--- a/arch/microblaze/kernel/reset.c
+++ b/arch/microblaze/kernel/reset.c
@@ -19,50 +19,11 @@
 static int handle; /* reset pin handle */
 static unsigned int reset_val;
 
-static int of_reset_gpio_handle(void)
-{
-        int ret; /* variable which stored handle reset gpio pin */
-        struct device_node *root; /* root node */
-        struct device_node *gpio; /* gpio node */
-        struct gpio_chip *gc;
-        u32 flags;
-        const void *gpio_spec;
-
-        /* find out root node */
-        root = of_find_node_by_path("/");
-
-        /* give me handle for gpio node to be possible allocate pin */
-        ret = of_parse_phandles_with_args(root, "hard-reset-gpios",
-                                "#gpio-cells", 0, &gpio, &gpio_spec);
-        if (ret) {
-                pr_debug("%s: can't parse gpios property\n", __func__);
-                goto err0;
-        }
-
-        gc = of_node_to_gpiochip(gpio);
-        if (!gc) {
-                pr_debug("%s: gpio controller %s isn't registered\n",
-                         root->full_name, gpio->full_name);
-                ret = -ENODEV;
-                goto err1;
-        }
-
-        ret = gc->of_xlate(gc, root, gpio_spec, &flags);
-        if (ret < 0)
-                goto err1;
-
-        ret += gc->base;
-err1:
-        of_node_put(gpio);
-err0:
-        pr_debug("%s exited with status %d\n", __func__, ret);
-        return ret;
-}
-
 void of_platform_reset_gpio_probe(void)
 {
         int ret;
-        handle = of_reset_gpio_handle();
+        handle = of_get_named_gpio(of_find_node_by_path("/"),
+                                   "hard-reset-gpios", 0);
 
         if (!gpio_is_valid(handle)) {
                 printk(KERN_INFO "Skipping unavailable RESET gpio %d (%s)\n",
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d46f1da18a3c..a7636d3ddc6a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -25,6 +25,9 @@ config MIPS
         select GENERIC_IRQ_SHOW
         select HAVE_ARCH_JUMP_LABEL
         select IRQ_FORCED_THREADING
+        select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
+        select ARCH_DISCARD_MEMBLOCK
 
 menu "Machine selection"
 
@@ -65,7 +68,6 @@ config AR7
         select SYS_SUPPORTS_LITTLE_ENDIAN
         select SYS_SUPPORTS_ZBOOT_UART16550
         select ARCH_REQUIRE_GPIOLIB
-        select GCD
         select VLYNQ
         help
           Support for the Texas Instruments AR7 System-on-a-Chip
@@ -2064,9 +2066,6 @@ config ARCH_DISCONTIGMEM_ENABLE
           or have huge holes in the physical address space for other reasons.
           See <file:Documentation/vm/numa> for more.
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 config ARCH_SPARSEMEM_ENABLE
         bool
         select SPARSEMEM_STATIC
@@ -2369,10 +2368,6 @@ config TC
           Linux driver support status is documented at:
           <http://www.linux-mips.org/wiki/DECstation>
 
-#config ACCESSBUS
-#       bool "Access.Bus support"
-#       depends on TC
-
 config MMU
         bool
         default y
diff --git a/arch/mips/include/asm/ip32/mace.h b/arch/mips/include/asm/ip32/mace.h
index d08d7c672139..c523123df380 100644
--- a/arch/mips/include/asm/ip32/mace.h
+++ b/arch/mips/include/asm/ip32/mace.h
@@ -95,7 +95,7 @@ struct mace_video {
  * Ethernet interface
  */
 struct mace_ethernet {
-        volatile unsigned long mac_ctrl;
+        volatile u64 mac_ctrl;
         volatile unsigned long int_stat;
         volatile unsigned long dma_ctrl;
         volatile unsigned long timer;
diff --git a/arch/mips/include/asm/ipcbuf.h b/arch/mips/include/asm/ipcbuf.h
index d47d08f264e7..84c7e51cb6d0 100644
--- a/arch/mips/include/asm/ipcbuf.h
+++ b/arch/mips/include/asm/ipcbuf.h
@@ -1,28 +1 @@
-#ifndef _ASM_IPCBUF_H
-#define _ASM_IPCBUF_H
-
-/*
- * The ipc64_perm structure for alpha architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit seq
- * - 2 miscellaneous 64-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t  key;
-        __kernel_uid_t  uid;
-        __kernel_gid_t  gid;
-        __kernel_uid_t  cuid;
-        __kernel_gid_t  cgid;
-        __kernel_mode_t mode;
-        unsigned short  seq;
-        unsigned short  __pad1;
-        unsigned long   __unused1;
-        unsigned long   __unused2;
-};
-
-#endif /* _ASM_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h
index 9de5190f2487..ad5c0a7a02a7 100644
--- a/arch/mips/include/asm/socket.h
+++ b/arch/mips/include/asm/socket.h
@@ -82,6 +82,9 @@ To add: #define SO_REUSEPORT 0x0200	/* Allow local address and port reuse.  */
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #ifdef __KERNEL__
 
 /** sock_type - Socket types
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 97f8bf6639e7..0d85d8e440c5 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -117,7 +117,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define TIF_USEDFPU             16      /* FPU was used by this task this quantum (SMP) */
 #define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
-#define TIF_FREEZE              19
 #define TIF_FIXADE              20      /* Fix address errors in software */
 #define TIF_LOGADE              21      /* Log address errors to syslog */
 #define TIF_32BIT_REGS          22      /* also implies 16/32 fprs */
@@ -141,7 +140,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_USEDFPU            (1<<TIF_USEDFPU)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 #define _TIF_FIXADE             (1<<TIF_FIXADE)
 #define _TIF_LOGADE             (1<<TIF_LOGADE)
 #define _TIF_32BIT_REGS         (1<<TIF_32BIT_REGS)
diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index 533812b61881..43bf70ebd3a2 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -21,12 +21,6 @@
 # include <asm-generic/int-ll64.h>
 #endif
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 4f2971bcf8e5..315fc0b250f8 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -623,7 +623,7 @@ static int mipspmu_event_init(struct perf_event *event)
         if (!atomic_inc_not_zero(&active_events)) {
                 if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
                         atomic_dec(&active_events);
-                        return -ENOSPC;
+                        return -EINVAL;
                 }
 
                 mutex_lock(&pmu_reserve_mutex);
@@ -732,15 +732,15 @@ static int validate_group(struct perf_event *event)
         memset(&fake_cpuc, 0, sizeof(fake_cpuc));
 
         if (!validate_event(&fake_cpuc, leader))
-                return -ENOSPC;
+                return -EINVAL;
 
         list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
                 if (!validate_event(&fake_cpuc, sibling))
-                        return -ENOSPC;
+                        return -EINVAL;
         }
 
         if (!validate_event(&fake_cpuc, event))
-                return -ENOSPC;
+                return -EINVAL;
 
         return 0;
 }
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index c47f96e453c0..7955409051c4 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -56,7 +56,8 @@ void __noreturn cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched() && cpu_online(cpu)) {
 #ifdef CONFIG_MIPS_MT_SMTC
                         extern void smtc_idle_loop_hook(void);
@@ -77,7 +78,8 @@ void __noreturn cpu_idle(void)
                      system_state == SYSTEM_BOOTING))
                         play_dead();
 #endif
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 84af26ab2212..b1cb8f87d7b4 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -14,6 +14,7 @@
 #include <linux/ioport.h>
 #include <linux/export.h>
 #include <linux/screen_info.h>
+#include <linux/memblock.h>
 #include <linux/bootmem.h>
 #include <linux/initrd.h>
 #include <linux/root_dev.h>
@@ -352,7 +353,7 @@ static void __init bootmem_init(void)
                         continue;
 #endif
 
-                add_active_range(0, start, end);
+                memblock_add_node(PFN_PHYS(start), PFN_PHYS(end - start), 0);
         }
 
         /*
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
index bc5e9769bb73..4b2ea282b9c7 100644
--- a/arch/mips/sgi-ip27/Kconfig
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -1,9 +1,3 @@
-#config SGI_SN0_XXL
-#       bool "IP27 XXL"
-#       depends on SGI_IP27
-#         This options adds support for userspace processes up to 16TB size.
-#         Normally the limit is just .5TB.
-
 choice
         prompt "Node addressing mode"
         depends on SGI_IP27
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index bc1297109cc5..b105eca3c020 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -12,6 +12,7 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/memblock.h>
 #include <linux/mm.h>
 #include <linux/mmzone.h>
 #include <linux/module.h>
@@ -381,8 +382,8 @@ static void __init szmem(void)
                                 continue;
                         }
                         num_physpages += slot_psize;
-                        add_active_range(node, slot_getbasepfn(node, slot),
-                                         slot_getbasepfn(node, slot) + slot_psize);
+                        memblock_add_node(PFN_PHYS(slot_getbasepfn(node, slot)),
+                                          PFN_PHYS(slot_psize), node);
                 }
         }
 }
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index 3e639bda43f7..3cd937e0e9a3 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -71,7 +71,6 @@ config SIBYTE_SB1xxx_SOC
         bool
         select DMA_COHERENT
         select IRQ_CPU
-        select SIBYTE_CFE
         select SWAP_IO_SPACE
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_64BIT_KERNEL
diff --git a/arch/mips/txx9/generic/7segled.c b/arch/mips/txx9/generic/7segled.c
index 7f8416f86222..8e93b2122524 100644
--- a/arch/mips/txx9/generic/7segled.c
+++ b/arch/mips/txx9/generic/7segled.c
@@ -9,7 +9,7 @@
  * (C) Copyright TOSHIBA CORPORATION 2005-2007
  * All Rights Reserved.
  */
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/slab.h>
 #include <linux/map_to_7segment.h>
 #include <asm/txx9/generic.h>
@@ -37,8 +37,8 @@ int txx9_7segled_putc(unsigned int pos, char c)
         return 0;
 }
 
-static ssize_t ascii_store(struct sys_device *dev,
-                           struct sysdev_attribute *attr,
+static ssize_t ascii_store(struct device *dev,
+                           struct device_attribute *attr,
                            const char *buf, size_t size)
 {
         unsigned int ch = dev->id;
@@ -46,8 +46,8 @@ static ssize_t ascii_store(struct sys_device *dev,
         return size;
 }
 
-static ssize_t raw_store(struct sys_device *dev,
-                         struct sysdev_attribute *attr,
+static ssize_t raw_store(struct device *dev,
+                         struct device_attribute *attr,
                          const char *buf, size_t size)
 {
         unsigned int ch = dev->id;
@@ -55,19 +55,19 @@ static ssize_t raw_store(struct sys_device *dev,
         return size;
 }
 
-static SYSDEV_ATTR(ascii, 0200, NULL, ascii_store);
-static SYSDEV_ATTR(raw, 0200, NULL, raw_store);
+static DEVICE_ATTR(ascii, 0200, NULL, ascii_store);
+static DEVICE_ATTR(raw, 0200, NULL, raw_store);
 
-static ssize_t map_seg7_show(struct sysdev_class *class,
-                             struct sysdev_class_attribute *attr,
+static ssize_t map_seg7_show(struct device *dev,
+                             struct device_attribute *attr,
                              char *buf)
 {
         memcpy(buf, &txx9_seg7map, sizeof(txx9_seg7map));
         return sizeof(txx9_seg7map);
 }
 
-static ssize_t map_seg7_store(struct sysdev_class *class,
-                              struct sysdev_class_attribute *attr,
+static ssize_t map_seg7_store(struct device *dev,
+                              struct device_attribute *attr,
                               const char *buf, size_t size)
 {
         if (size != sizeof(txx9_seg7map))
@@ -76,10 +76,11 @@ static ssize_t map_seg7_store(struct sysdev_class *class,
         return size;
 }
 
-static SYSDEV_CLASS_ATTR(map_seg7, 0600, map_seg7_show, map_seg7_store);
+static DEVICE_ATTR(map_seg7, 0600, map_seg7_show, map_seg7_store);
 
-static struct sysdev_class tx_7segled_sysdev_class = {
-        .name   = "7segled",
+static struct bus_type tx_7segled_subsys = {
+        .name           = "7segled",
+        .dev_name       = "7segled",
 };
 
 static int __init tx_7segled_init_sysfs(void)
@@ -87,26 +88,25 @@ static int __init tx_7segled_init_sysfs(void)
         int error, i;
         if (!tx_7segled_num)
                 return -ENODEV;
-        error = sysdev_class_register(&tx_7segled_sysdev_class);
+        error = subsys_system_register(&tx_7segled_subsys, NULL);
         if (error)
                 return error;
-        error = sysdev_class_create_file(&tx_7segled_sysdev_class,
-                                         &attr_map_seg7);
+        error = device_create_file(tx_7segled_subsys.dev_root, &dev_attr_map_seg7);
         if (error)
                 return error;
         for (i = 0; i < tx_7segled_num; i++) {
-                struct sys_device *dev;
+                struct device *dev;
                 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
                 if (!dev) {
                         error = -ENODEV;
                         break;
                 }
                 dev->id = i;
-                dev->cls = &tx_7segled_sysdev_class;
-                error = sysdev_register(dev);
+                dev->dev = &tx_7segled_subsys;
+                error = device_register(dev);
                 if (!error) {
-                        sysdev_create_file(dev, &attr_ascii);
-                        sysdev_create_file(dev, &attr_raw);
+                        device_create_file(dev, &dev_attr_ascii);
+                        device_create_file(dev, &dev_attr_raw);
                 }
         }
         return error;
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index ec38e00b2559..ae77a7916c03 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -22,7 +22,7 @@
 #include <linux/serial_core.h>
 #include <linux/mtd/physmap.h>
 #include <linux/leds.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/slab.h>
 #include <linux/irq.h>
 #include <asm/bootinfo.h>
@@ -897,10 +897,13 @@ void __init txx9_aclc_init(unsigned long baseaddr, int irq,
 #endif
 }
 
-static struct sysdev_class txx9_sramc_sysdev_class;
+static struct bus_type txx9_sramc_subsys = {
+        .name = "txx9_sram",
+        .dev_name = "txx9_sram",
+};
 
-struct txx9_sramc_sysdev {
-        struct sys_device dev;
+struct txx9_sramc_dev {
+        struct device dev;
         struct bin_attribute bindata_attr;
         void __iomem *base;
 };
@@ -909,7 +912,7 @@ static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
                               struct bin_attribute *bin_attr,
                               char *buf, loff_t pos, size_t size)
 {
-        struct txx9_sramc_sysdev *dev = bin_attr->private;
+        struct txx9_sramc_dev *dev = bin_attr->private;
         size_t ramsize = bin_attr->size;
 
         if (pos >= ramsize)
@@ -924,7 +927,7 @@ static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
                                struct bin_attribute *bin_attr,
                                char *buf, loff_t pos, size_t size)
 {
-        struct txx9_sramc_sysdev *dev = bin_attr->private;
+        struct txx9_sramc_dev *dev = bin_attr->private;
         size_t ramsize = bin_attr->size;
 
         if (pos >= ramsize)
@@ -937,18 +940,13 @@ static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
 
 void __init txx9_sramc_init(struct resource *r)
 {
-        struct txx9_sramc_sysdev *dev;
+        struct txx9_sramc_dev *dev;
         size_t size;
         int err;
 
-        if (!txx9_sramc_sysdev_class.name) {
-                txx9_sramc_sysdev_class.name = "txx9_sram";
-                err = sysdev_class_register(&txx9_sramc_sysdev_class);
-                if (err) {
-                        txx9_sramc_sysdev_class.name = NULL;
-                        return;
-                }
-        }
+        err = subsys_system_register(&txx9_sramc_subsys, NULL);
+        if (err)
+                return;
         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
         if (!dev)
                 return;
@@ -956,7 +954,7 @@ void __init txx9_sramc_init(struct resource *r)
         dev->base = ioremap(r->start, size);
         if (!dev->base)
                 goto exit;
-        dev->dev.cls = &txx9_sramc_sysdev_class;
+        dev->dev.bus = &txx9_sramc_subsys;
         sysfs_bin_attr_init(&dev->bindata_attr);
         dev->bindata_attr.attr.name = "bindata";
         dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
@@ -964,12 +962,12 @@ void __init txx9_sramc_init(struct resource *r)
         dev->bindata_attr.write = txx9_sram_write;
         dev->bindata_attr.size = size;
         dev->bindata_attr.private = dev;
-        err = sysdev_register(&dev->dev);
+        err = device_register(&dev->dev);
         if (err)
                 goto exit;
         err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
         if (err) {
-                sysdev_unregister(&dev->dev);
+                device_unregister(&dev->dev);
                 goto exit;
         }
         return;
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index ba3cec3155df..6567895d1f59 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -15,7 +15,7 @@
 #include <linux/delay.h>
 #include <linux/netdevice.h>
 #include <linux/notifier.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/ethtool.h>
 #include <linux/param.h>
 #include <linux/ptrace.h>
diff --git a/arch/mn10300/include/asm/ipcbuf.h b/arch/mn10300/include/asm/ipcbuf.h
index f6f63d448272..84c7e51cb6d0 100644
--- a/arch/mn10300/include/asm/ipcbuf.h
+++ b/arch/mn10300/include/asm/ipcbuf.h
@@ -1,29 +1 @@
-#ifndef _ASM_IPCBUF_H
-#define _ASM_IPCBUF_H
-
-/*
- * The ipc64_perm structure for MN10300 architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 32-bit mode_t and seq
- * - 2 miscellaneous 32-bit values
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid32_t        uid;
-        __kernel_gid32_t        gid;
-        __kernel_uid32_t        cuid;
-        __kernel_gid32_t        cgid;
-        __kernel_mode_t         mode;
-        unsigned short          __pad1;
-        unsigned short          seq;
-        unsigned short          __pad2;
-        unsigned long           __unused1;
-        unsigned long           __unused2;
-};
-
-#endif /* _ASM_IPCBUF_H */
+#include <asm-generic/ipcbuf.h>
diff --git a/arch/mn10300/include/asm/socket.h b/arch/mn10300/include/asm/socket.h
index 4e60c4281288..876356d78522 100644
--- a/arch/mn10300/include/asm/socket.h
+++ b/arch/mn10300/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
index 87c213002d4c..28cf52100baa 100644
--- a/arch/mn10300/include/asm/thread_info.h
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -165,7 +165,6 @@ extern void free_thread_info(struct thread_info *);
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              17      /* is terminating due to OOM killer */
-#define TIF_FREEZE              18      /* freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      +(1 << TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      +(1 << TIF_NOTIFY_RESUME)
@@ -174,7 +173,6 @@ extern void free_thread_info(struct thread_info *);
 #define _TIF_SINGLESTEP         +(1 << TIF_SINGLESTEP)
 #define _TIF_RESTORE_SIGMASK    +(1 << TIF_RESTORE_SIGMASK)
 #define _TIF_POLLING_NRFLAG     +(1 << TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             +(1 << TIF_FREEZE)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h
index c1833eb192e3..713d4ba108a5 100644
--- a/arch/mn10300/include/asm/types.h
+++ b/arch/mn10300/include/asm/types.h
@@ -13,12 +13,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/openrisc/include/asm/memblock.h b/arch/openrisc/include/asm/memblock.h
deleted file mode 100644
index bbe5a1c788cb..000000000000
--- a/arch/openrisc/include/asm/memblock.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * OpenRISC Linux
- *
- * Linux architectural port borrowing liberally from similar works of
- * others.  All original copyrights apply as per the original source
- * declaration.
- *
- * OpenRISC implementation:
- * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
- * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
- * et al.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __ASM_OPENRISC_MEMBLOCK_H
-#define __ASM_OPENRISC_MEMBLOCK_H
-
-/* empty */
-
-#endif /* __ASM_OPENRISC_MEMBLOCK_H */
diff --git a/arch/openrisc/kernel/idle.c b/arch/openrisc/kernel/idle.c
index d5bc5f813e89..e5fc78877830 100644
--- a/arch/openrisc/kernel/idle.c
+++ b/arch/openrisc/kernel/idle.c
@@ -51,7 +51,8 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
 
                 while (!need_resched()) {
                         check_pgt_cache();
@@ -69,7 +70,8 @@ void cpu_idle(void)
                         set_thread_flag(TIF_POLLING_NRFLAG);
                 }
 
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/openrisc/kernel/prom.c b/arch/openrisc/kernel/prom.c
index 1bb58ba89afa..3d4478f6c942 100644
--- a/arch/openrisc/kernel/prom.c
+++ b/arch/openrisc/kernel/prom.c
@@ -76,14 +76,13 @@ void __init early_init_devtree(void *params)
         of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line);
 
         /* Scan memory nodes and rebuild MEMBLOCKs */
-        memblock_init();
         of_scan_flat_dt(early_init_dt_scan_root, NULL);
         of_scan_flat_dt(early_init_dt_scan_memory, NULL);
 
         /* Save command line for /proc/cmdline and then parse parameters */
         strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
 
-        memblock_analyze();
+        memblock_allow_resize();
 
         /* We must copy the flattend device tree from init memory to regular
          * memory because the device tree references the strings in it
diff --git a/arch/parisc/hpux/sys_hpux.c b/arch/parisc/hpux/sys_hpux.c
index 6ab9580b0b00..d9dc6cd3b7d2 100644
--- a/arch/parisc/hpux/sys_hpux.c
+++ b/arch/parisc/hpux/sys_hpux.c
@@ -136,16 +136,9 @@ struct hpux_ustat {
  */
 static int hpux_ustat(dev_t dev, struct hpux_ustat __user *ubuf)
 {
-        struct super_block *s;
         struct hpux_ustat tmp;  /* Changed to hpux_ustat */
         struct kstatfs sbuf;
-        int err = -EINVAL;
-
-        s = user_get_super(dev);
-        if (s == NULL)
-                goto out;
-        err = statfs_by_dentry(s->s_root, &sbuf);
-        drop_super(s);
+        int err = vfs_ustat(dev, &sbuf);
         if (err)
                 goto out;
 
diff --git a/arch/parisc/include/asm/socket.h b/arch/parisc/include/asm/socket.h
index 225b7d6a1a0a..d28c51b61067 100644
--- a/arch/parisc/include/asm/socket.h
+++ b/arch/parisc/include/asm/socket.h
@@ -61,6 +61,9 @@
 
 #define SO_RXQ_OVFL             0x4021
 
+#define SO_WIFI_STATUS          0x4022
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/parisc/include/asm/thread_info.h b/arch/parisc/include/asm/thread_info.h
index aa8de727e90b..6d9c7c7973d0 100644
--- a/arch/parisc/include/asm/thread_info.h
+++ b/arch/parisc/include/asm/thread_info.h
@@ -58,7 +58,6 @@ struct thread_info {
 #define TIF_32BIT               4       /* 32 bit binary */
 #define TIF_MEMDIE              5       /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     6       /* restore saved signal mask */
-#define TIF_FREEZE              7       /* is freezing for suspend */
 #define TIF_NOTIFY_RESUME       8       /* callback before returning to user */
 #define TIF_SINGLESTEP          9       /* single stepping? */
 #define TIF_BLOCKSTEP           10      /* branch stepping? */
@@ -69,7 +68,6 @@ struct thread_info {
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_32BIT              (1 << TIF_32BIT)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
 #define _TIF_BLOCKSTEP          (1 << TIF_BLOCKSTEP)
diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h
index 80e415c9936d..8866f9bbdeaf 100644
--- a/arch/parisc/include/asm/types.h
+++ b/arch/parisc/include/asm/types.h
@@ -3,10 +3,4 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 #endif
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index 45b7389d77aa..7c0774397b89 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -198,8 +198,6 @@ static struct clocksource clocksource_cr16 = {
         .rating                 = 300,
         .read                   = read_cr16,
         .mask                   = CLOCKSOURCE_MASK(BITS_PER_LONG),
-        .mult                   = 0, /* to be set */
-        .shift                  = 22,
         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
@@ -270,7 +268,5 @@ void __init time_init(void)
 
         /* register at clocksource framework */
         current_cr16_khz = PAGE0->mem_10msec/10;  /* kHz */
-        clocksource_cr16.mult = clocksource_khz2mult(current_cr16_khz,
-                                                clocksource_cr16.shift);
-        clocksource_register(&clocksource_cr16);
+        clocksource_register_khz(&clocksource_cr16, current_cr16_khz);
 }
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index b177caa56d95..692ac7588e20 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -87,6 +87,10 @@ config ARCH_HAS_ILOG2_U64
         bool
         default y if 64BIT
 
+config ARCH_HAS_CPU_IDLE_WAIT
+        bool
+        default y
+
 config GENERIC_HWEIGHT
         bool
         default y
@@ -117,6 +121,7 @@ config PPC
         select HAVE_KRETPROBES
         select HAVE_ARCH_TRACEHOOK
         select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
         select HAVE_DMA_ATTRS
         select HAVE_DMA_API_DEBUG
         select USE_GENERIC_SMP_HELPERS if SMP
@@ -132,6 +137,7 @@ config PPC
         select IRQ_PER_CPU
         select GENERIC_IRQ_SHOW
         select GENERIC_IRQ_SHOW_LEVEL
+        select IRQ_FORCED_THREADING
         select HAVE_RCU_TABLE_FREE if SMP
         select HAVE_SYSCALL_TRACEPOINTS
         select HAVE_BPF_JIT if (PPC64 && NET)
@@ -345,7 +351,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
 
 config KEXEC
         bool "kexec system call (EXPERIMENTAL)"
-        depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !47x)) && EXPERIMENTAL
+        depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !PPC_47x)) && EXPERIMENTAL
         help
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
@@ -362,8 +368,9 @@ config KEXEC
 
 config CRASH_DUMP
         bool "Build a kdump crash kernel"
-        depends on PPC64 || 6xx || FSL_BOOKE
-        select RELOCATABLE if PPC64 || FSL_BOOKE
+        depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP && !PPC_47x)
+        select RELOCATABLE if PPC64 || 44x
+        select DYNAMIC_MEMSTART if FSL_BOOKE
         help
           Build a kernel suitable for use as a kdump capture kernel.
           The same kernel binary can be used as production kernel and dump
@@ -421,9 +428,6 @@ config ARCH_SPARSEMEM_DEFAULT
         def_bool y
         depends on (SMP && PPC_PSERIES) || PPC_PS3
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 config SYS_SUPPORTS_HUGETLBFS
         bool
 
@@ -687,6 +691,10 @@ config FSL_LBC
           controller.  Also contains some common code used by
           drivers for specific local bus peripherals.
 
+config FSL_IFC
+        bool
+        depends on FSL_SOC
+
 config FSL_GTM
         bool
         depends on PPC_83xx || QUICC_ENGINE || CPM2
@@ -772,6 +780,10 @@ source "drivers/rapidio/Kconfig"
 
 endmenu
 
+config NONSTATIC_KERNEL
+        bool
+        default n
+
 menu "Advanced setup"
         depends on PPC32
 
@@ -821,13 +833,32 @@ config LOWMEM_CAM_NUM
         int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
         default 3
 
+config DYNAMIC_MEMSTART
+        bool "Enable page aligned dynamic load address for kernel (EXPERIMENTAL)"
+        depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || 44x)
+        select NONSTATIC_KERNEL
+        help
+          This option enables the kernel to be loaded at any page aligned
+          physical address. The kernel creates a mapping from KERNELBASE to 
+          the address where the kernel is loaded. The page size here implies
+          the TLB page size of the mapping for kernel on the particular platform.
+          Please refer to the init code for finding the TLB page size.
+
+          DYNAMIC_MEMSTART is an easy way of implementing pseudo-RELOCATABLE
+          kernel image, where the only restriction is the page aligned kernel
+          load address. When this option is enabled, the compile time physical 
+          address CONFIG_PHYSICAL_START is ignored.
+
+          This option is overridden by CONFIG_RELOCATABLE
+
 config RELOCATABLE
         bool "Build a relocatable kernel (EXPERIMENTAL)"
-        depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && (FSL_BOOKE || PPC_47x)
+        depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && 44x
+        select NONSTATIC_KERNEL
         help
           This builds a kernel image that is capable of running at the
-          location the kernel is loaded at (some alignment restrictions may
-          exist).
+          location the kernel is loaded at, without any alignment restrictions.
+          This feature is a superset of DYNAMIC_MEMSTART and hence overrides it.
 
           One use is for the kexec on panic case where the recovery kernel
           must live at a different physical address than the primary
@@ -837,7 +868,11 @@ config RELOCATABLE
           it has been loaded at and the compile time physical addresses
           CONFIG_PHYSICAL_START is ignored.  However CONFIG_PHYSICAL_START
           setting can still be useful to bootwrappers that need to know the
-          load location of the kernel (eg. u-boot/mkimage).
+          load address of the kernel (eg. u-boot/mkimage).
+
+config RELOCATABLE_PPC32
+        def_bool y
+        depends on PPC32 && RELOCATABLE
 
 config PAGE_OFFSET_BOOL
         bool "Set custom page offset address"
@@ -867,7 +902,7 @@ config KERNEL_START_BOOL
 config KERNEL_START
         hex "Virtual address of kernel base" if KERNEL_START_BOOL
         default PAGE_OFFSET if PAGE_OFFSET_BOOL
-        default "0xc2000000" if CRASH_DUMP && !RELOCATABLE
+        default "0xc2000000" if CRASH_DUMP && !NONSTATIC_KERNEL
         default "0xc0000000"
 
 config PHYSICAL_START_BOOL
@@ -880,7 +915,7 @@ config PHYSICAL_START_BOOL
 
 config PHYSICAL_START
         hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
-        default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !RELOCATABLE
+        default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !NONSTATIC_KERNEL
         default "0x00000000"
 
 config PHYSICAL_ALIGN
@@ -926,6 +961,7 @@ endmenu
 if PPC64
 config RELOCATABLE
         bool "Build a relocatable kernel"
+        select NONSTATIC_KERNEL
         help
           This builds a kernel image that is capable of running anywhere
           in the RMA (real memory area) at any 16k-aligned base address.
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 1b8a9c905cf7..4ccb2a009f74 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -336,4 +336,16 @@ config PPC_EARLY_DEBUG_CPM_ADDR
           platform probing is done, all platforms selected must
           share the same address.
 
+config STRICT_DEVMEM
+        def_bool y
+        prompt "Filter access to /dev/mem"
+        help
+          This option restricts access to /dev/mem.  If this option is
+          disabled, you allow userspace access to all memory, including
+          kernel and userspace memory. Accidental memory access is likely
+          to be disastrous.
+          Memory access is required for experts who want to debug the kernel.
+
+          If you are unsure, say Y.
+
 endmenu
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 57af16edc192..b8b105c01c64 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -63,9 +63,9 @@ override CC	+= -m$(CONFIG_WORD_SIZE)
 override AR     := GNUTARGET=elf$(CONFIG_WORD_SIZE)-powerpc $(AR)
 endif
 
-LDFLAGS_vmlinux-yy := -Bstatic
-LDFLAGS_vmlinux-$(CONFIG_PPC64)$(CONFIG_RELOCATABLE) := -pie
-LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-yy)
+LDFLAGS_vmlinux-y := -Bstatic
+LDFLAGS_vmlinux-$(CONFIG_RELOCATABLE) := -pie
+LDFLAGS_vmlinux := $(LDFLAGS_vmlinux-y)
 
 CFLAGS-$(CONFIG_PPC64)  := -mminimal-toc -mtraceback=no -mcall-aixdesc
 CFLAGS-$(CONFIG_PPC32)  := -ffixed-r2 -mmultiple
@@ -131,8 +131,7 @@ KBUILD_CFLAGS		+= -mno-sched-epilog
 endif
 
 cpu-as-$(CONFIG_4xx)            += -Wa,-m405
-cpu-as-$(CONFIG_6xx)            += -Wa,-maltivec
-cpu-as-$(CONFIG_POWER4)         += -Wa,-maltivec
+cpu-as-$(CONFIG_ALTIVEC)        += -Wa,-maltivec
 cpu-as-$(CONFIG_E500)           += -Wa,-me500
 cpu-as-$(CONFIG_E200)           += -Wa,-me200
 
@@ -166,7 +165,7 @@ all: zImage
 
 # With make 3.82 we cannot mix normal and wildcard targets
 BOOT_TARGETS1 := zImage zImage.initrd uImage
-BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
+BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.% uImage.%
 
 PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2)
 
@@ -255,12 +254,6 @@ checkbin:
                 echo 'disable kernel modules' ; \
                 false ; \
         fi
-        @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \
-                echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \
-                echo 'correctly with old versions of binutils.' ; \
-                echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
-                false ; \
-        fi
 
 CLEAN_FILES += $(TOUT)
 
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 72ee8c1fba48..15986e70799c 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -45,6 +45,7 @@ $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
 $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
 $(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
+$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
 
 
@@ -79,7 +80,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
                 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
                 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
                 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
-                gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c
+                gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \
+                treeboot-currituck.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -199,6 +201,7 @@ image-$(CONFIG_EP405)			+= dtbImage.ep405
 image-$(CONFIG_HOTFOOT)                 += cuImage.hotfoot
 image-$(CONFIG_WALNUT)                  += treeImage.walnut
 image-$(CONFIG_ACADIA)                  += cuImage.acadia
+image-$(CONFIG_OBS600)                  += uImage.obs600
 
 # Board ports in arch/powerpc/platform/44x/Kconfig
 image-$(CONFIG_EBONY)                   += treeImage.ebony cuImage.ebony
@@ -212,6 +215,7 @@ image-$(CONFIG_WARP)			+= cuImage.warp
 image-$(CONFIG_YOSEMITE)                += cuImage.yosemite
 image-$(CONFIG_ISS4xx)                  += treeImage.iss4xx \
                                            treeImage.iss4xx-mpic
+image-$(CONFIG_CURRITUCK)                       += treeImage.currituck
 
 # Board ports in arch/powerpc/platform/8xx/Kconfig
 image-$(CONFIG_MPC86XADS)               += cuImage.mpc866ads
@@ -316,6 +320,12 @@ $(obj)/zImage.iseries: vmlinux
 $(obj)/uImage: vmlinux $(wrapperbits)
         $(call if_changed,wrap,uboot)
 
+$(obj)/uImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
+        $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
+
+$(obj)/uImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
+        $(call if_changed,wrap,uboot-$*,,$(obj)/$*.dtb)
+
 $(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
         $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
 
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 645a7c964e5f..cc73f7a95e26 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -9,6 +9,12 @@
         })
 #define mtdcr(rn, val) \
         asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
+#define mfdcrx(rn) \
+        ({      \
+                unsigned long rval; \
+                asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
+                rval; \
+        })
 
 /* 440GP/440GX SDRAM controller DCRs */
 #define DCRN_SDRAM0_CFGADDR                             0x010
diff --git a/arch/powerpc/boot/div64.S b/arch/powerpc/boot/div64.S
index d271ab542673..bbcb8a4cc121 100644
--- a/arch/powerpc/boot/div64.S
+++ b/arch/powerpc/boot/div64.S
@@ -57,3 +57,55 @@ __div64_32:
         stw     r8,4(r3)
         mr      r3,r6           # return the remainder in r3
         blr
+
+/*
+ * Extended precision shifts.
+ *
+ * Updated to be valid for shift counts from 0 to 63 inclusive.
+ * -- Gabriel
+ *
+ * R3/R4 has 64 bit value
+ * R5    has shift count
+ * result in R3/R4
+ *
+ *  ashrdi3: arithmetic right shift (sign propagation)  
+ *  lshrdi3: logical right shift
+ *  ashldi3: left shift
+ */
+        .globl __ashrdi3
+__ashrdi3:
+        subfic  r6,r5,32
+        srw     r4,r4,r5        # LSW = count > 31 ? 0 : LSW >> count
+        addi    r7,r5,32        # could be xori, or addi with -32
+        slw     r6,r3,r6        # t1 = count > 31 ? 0 : MSW << (32-count)
+        rlwinm  r8,r7,0,32      # t3 = (count < 32) ? 32 : 0
+        sraw    r7,r3,r7        # t2 = MSW >> (count-32)
+        or      r4,r4,r6        # LSW |= t1
+        slw     r7,r7,r8        # t2 = (count < 32) ? 0 : t2
+        sraw    r3,r3,r5        # MSW = MSW >> count
+        or      r4,r4,r7        # LSW |= t2
+        blr
+
+        .globl __ashldi3
+__ashldi3:
+        subfic  r6,r5,32
+        slw     r3,r3,r5        # MSW = count > 31 ? 0 : MSW << count
+        addi    r7,r5,32        # could be xori, or addi with -32
+        srw     r6,r4,r6        # t1 = count > 31 ? 0 : LSW >> (32-count)
+        slw     r7,r4,r7        # t2 = count < 32 ? 0 : LSW << (count-32)
+        or      r3,r3,r6        # MSW |= t1
+        slw     r4,r4,r5        # LSW = LSW << count
+        or      r3,r3,r7        # MSW |= t2
+        blr
+
+        .globl __lshrdi3
+__lshrdi3:
+        subfic  r6,r5,32
+        srw     r4,r4,r5        # LSW = count > 31 ? 0 : LSW >> count
+        addi    r7,r5,32        # could be xori, or addi with -32
+        slw     r6,r3,r6        # t1 = count > 31 ? 0 : MSW << (32-count)
+        srw     r7,r3,r7        # t2 = count < 32 ? 0 : MSW >> (count-32)
+        or      r4,r4,r6        # LSW |= t1
+        srw     r3,r3,r5        # MSW = MSW >> count
+        or      r4,r4,r7        # LSW |= t2
+        blr
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 261d10c4534b..227290db866d 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -256,7 +256,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <400000000>;
                         interrupts = <9 0x8>;
@@ -266,7 +266,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <400000000>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/currituck.dts b/arch/powerpc/boot/dts/currituck.dts
new file mode 100644
index 000000000000..b801dd06e573
--- /dev/null
+++ b/arch/powerpc/boot/dts/currituck.dts
@@ -0,0 +1,237 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright © 2011 Tony Breeds IBM Corporation
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x01f00000 0x00100000;     // spin table
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        model = "ibm,currituck";
+        compatible = "ibm,currituck";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,476";
+                        reg = <0>;
+                        clock-frequency = <1600000000>; // 1.6 GHz
+                        timebase-frequency = <100000000>; // 100Mhz
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "ok";
+                };
+                cpu@1 {
+                        device_type = "cpu";
+                        model = "PowerPC,476";
+                        reg = <1>;
+                        clock-frequency = <1600000000>; // 1.6 GHz
+                        timebase-frequency = <100000000>; // 100Mhz
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0x0 0x01f00000>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
+        };
+
+        MPIC: interrupt-controller {
+                compatible = "chrp,open-pic";
+                interrupt-controller;
+                dcr-reg = <0xffc00000 0x00040000>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+
+        };
+
+        plb {
+                compatible = "ibm,plb6";
+                #address-cells = <2>;
+                #size-cells = <2>;
+                ranges;
+                clock-frequency = <200000000>; // 200Mhz
+
+                POB0: opb {
+                        compatible = "ibm,opb-4xx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Wish there was a nicer way of specifying a full
+                         * 32-bit range
+                         */
+                        ranges = <0x00000000 0x00000200 0x00000000 0x80000000
+                                  0x80000000 0x00000200 0x80000000 0x80000000>;
+                        clock-frequency = <100000000>;
+
+                        UART0: serial@10000000 {
+                                device_type = "serial";
+                                compatible = "ns16750", "ns16550";
+                                reg = <0x10000000 0x00000008>;
+                                virtual-reg = <0xe1000000>;
+                                clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART]
+                                current-speed = <115200>;
+                                interrupt-parent = <&MPIC>;
+                                interrupts = <34 2>;
+                        };
+
+                        IIC0: i2c@00000000 {
+                                compatible = "ibm,iic-currituck", "ibm,iic";
+                                reg = <0x0 0x00000014>;
+                                interrupt-parent = <&MPIC>;
+                                interrupts = <79 2>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                rtc@68 {
+                                        compatible = "stm,m41t80", "m41st85";
+                                        reg = <0x68>;
+                                };
+                        };
+                };
+
+                PCIE0: pciex@10100000000 {              // 4xGBIF1
+                        device_type = "pci";
+                        #interrupt-cells = <1>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
+                        primary;
+                        port = <0x0>; /* port number */
+                        reg = <0x00000101 0x00000000 0x0 0x10000000             /* Config space access */
+                               0x00000100 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
+                        dcr-reg = <0x80 0x20>;
+
+//                                pci_space  < pci_addr          > < cpu_addr          > < size       >
+                        ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
+                                  0x01000000 0x0        0x0        0x00000140 0x0        0x0 0x00010000>;
+
+                        /* Inbound starting at 0 to memsize filled in by zImage */
+                        dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
+
+                        /* This drives busses 0 to 0xf */
+                        bus-range = <0x0 0xf>;
+
+                        /* Legacy interrupts (note the weird polarity, the bridge seems
+                         * to invert PCIe legacy interrupts).
+                         * We are de-swizzling here because the numbers are actually for
+                         * port of the root complex virtual P2P bridge. But I want
+                         * to avoid putting a node for it in the tree, so the numbers
+                         * below are basically de-swizzled numbers.
+                         * The real slot is on idsel 0, so the swizzling is 1:1
+                         */
+                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+                        interrupt-map = <
+                                0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */
+                                0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */
+                                0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */
+                                0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>;
+                };
+
+                PCIE1: pciex@30100000000 {              // 4xGBIF0
+                        device_type = "pci";
+                        #interrupt-cells = <1>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
+                        primary;
+                        port = <0x1>; /* port number */
+                        reg = <0x00000301 0x00000000 0x0 0x10000000             /* Config space access */
+                               0x00000300 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
+                        dcr-reg = <0x60 0x20>;
+
+                        ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000
+                                  0x01000000 0x0        0x0        0x00000340 0x0        0x0 0x00010000>;
+
+                        /* Inbound starting at 0 to memsize filled in by zImage */
+                        dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
+
+                        /* This drives busses 0 to 0xf */
+                        bus-range = <0x0 0xf>;
+
+                        /* Legacy interrupts (note the weird polarity, the bridge seems
+                         * to invert PCIe legacy interrupts).
+                         * We are de-swizzling here because the numbers are actually for
+                         * port of the root complex virtual P2P bridge. But I want
+                         * to avoid putting a node for it in the tree, so the numbers
+                         * below are basically de-swizzled numbers.
+                         * The real slot is on idsel 0, so the swizzling is 1:1
+                         */
+                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+                        interrupt-map = <
+                                0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */
+                                0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */
+                                0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */
+                                0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>;
+                };
+
+                PCIE2: pciex@38100000000 {              // 2xGBIF0
+                        device_type = "pci";
+                        #interrupt-cells = <1>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
+                        primary;
+                        port = <0x2>; /* port number */
+                        reg = <0x00000381 0x00000000 0x0 0x10000000             /* Config space access */
+                               0x00000380 0x00000000 0x0 0x00001000>;   /* UTL Registers space access */
+                        dcr-reg = <0xA0 0x20>;
+
+                        ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000
+                                  0x01000000 0x0        0x0        0x000003C0 0x0        0x0 0x00010000>;
+
+                        /* Inbound starting at 0 to memsize filled in by zImage */
+                        dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
+
+                        /* This drives busses 0 to 0xf */
+                        bus-range = <0x0 0xf>;
+
+                        /* Legacy interrupts (note the weird polarity, the bridge seems
+                         * to invert PCIe legacy interrupts).
+                         * We are de-swizzling here because the numbers are actually for
+                         * port of the root complex virtual P2P bridge. But I want
+                         * to avoid putting a node for it in the tree, so the numbers
+                         * below are basically de-swizzled numbers.
+                         * The real slot is on idsel 0, so the swizzling is 1:1
+                         */
+                        interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+                        interrupt-map = <
+                                0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */
+                                0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */
+                                0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */
+                                0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>;
+                };
+
+        };
+
+        chosen {
+                linux,stdout-path = &UART0;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
new file mode 100644
index 000000000000..89af62637707
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
@@ -0,0 +1,248 @@
+/*
+ * MPC8536 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x8000 */
+&pci0 {
+        compatible = "fsl,mpc8540-pci";
+        device_type = "pci";
+        interrupts = <24 0x2 0 0>;
+        bus-range = <0 0xff>;
+        #interrupt-cells = <1>;
+        #size-cells = <2>;
+        #address-cells = <3>;
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <25 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <25 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci2 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xb000 */
+&pci3 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <27 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <27 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
+                        >;
+        };
+};
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8536-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8536-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8536-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+/include/ "pq3-espi-0.dtsi"
+        spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+
+        /* mark compat w/8572 to get some erratum treatment */
+        gpio-controller@f000 {
+                compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
+        };
+
+        sata@18000 {
+                compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+                reg = <0x18000 0x1000>;
+                cell-index = <1>;
+                interrupts = <74 0x2 0 0>;
+        };
+
+        sata@19000 {
+                compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+                reg = <0x19000 0x1000>;
+                cell-index = <2>;
+                interrupts = <41 0x2 0 0>;
+        };
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8536-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2, 512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-timer-0.dtsi"
+
+        usb@22000 {
+                compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+                reg = <0x22000 0x1000>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <28 0x2 0 0>;
+        };
+
+        usb@23000 {
+                compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+                reg = <0x23000 0x1000>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <46 0x2 0 0>;
+        };
+
+        ptp_clock@24e00 {
+                interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
+        };
+
+/include/ "pq3-etsec1-2.dtsi"
+
+        ethernet@26000 {
+                cell-index = <1>;
+        };
+
+        usb@2b000 {
+                compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
+                reg = <0x2b000 0x1000>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <60 0x2 0 0>;
+        };
+
+/include/ "pq3-esdhc-0.dtsi"
+/include/ "pq3-sec3.0-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,mpc8536-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
new file mode 100644
index 000000000000..7de45a784df6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi
@@ -0,0 +1,63 @@
+/*
+ * MPC8536 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,MPC8536";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+                pci3 = &pci3;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8536@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
new file mode 100644
index 000000000000..b68eb119faef
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi
@@ -0,0 +1,191 @@
+/*
+ * MPC8544 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x8000 */
+&pci0 {
+        compatible = "fsl,mpc8540-pci";
+        device_type = "pci";
+        interrupts = <24 0x2 0 0>;
+        bus-range = <0 0xff>;
+        #interrupt-cells = <1>;
+        #size-cells = <2>;
+        #address-cells = <3>;
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <25 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <25 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci2 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xb000 */
+&pci3 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <27 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <27 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8544-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <10>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8544-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8544-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8544-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2, 256K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-2.dtsi"
+
+        ethernet@26000 {
+                cell-index = <1>;
+        };
+
+/include/ "pq3-sec2.1-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,mpc8544-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
new file mode 100644
index 000000000000..8777f9239d9e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi
@@ -0,0 +1,63 @@
+/*
+ * MPC8544 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,MPC8544";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+                pci3 = &pci3;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8544@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
new file mode 100644
index 000000000000..9d8023a69d7d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
@@ -0,0 +1,143 @@
+/*
+ * MPC8548 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x8000 */
+&pci0 {
+        compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+        device_type = "pci";
+        interrupts = <24 0x2 0 0>;
+        bus-range = <0 0xff>;
+        #interrupt-cells = <1>;
+        #size-cells = <2>;
+        #address-cells = <3>;
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,mpc8540-pci";
+        device_type = "pci";
+        interrupts = <25 0x2 0 0>;
+        bus-range = <0 0xff>;
+        #interrupt-cells = <1>;
+        #size-cells = <2>;
+        #address-cells = <3>;
+};
+
+/* controller at 0xa000 */
+&pci2 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8548-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <10>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8548-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8548-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2, 512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-1.dtsi"
+/include/ "pq3-etsec1-2.dtsi"
+/include/ "pq3-etsec1-3.dtsi"
+
+/include/ "pq3-sec2.1-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,mpc8548-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
new file mode 100644
index 000000000000..289f1218d755
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
@@ -0,0 +1,62 @@
+/*
+ * MPC8548 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,MPC8548";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8548@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
new file mode 100644
index 000000000000..64e7075a9cd4
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
@@ -0,0 +1,270 @@
+/*
+ * MPC8568 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
+        interrupts = <19 2 0 0>;
+        sleep = <&pmc 0x08000000>;
+};
+
+/* controller at 0x8000 */
+&pci0 {
+        compatible = "fsl,mpc8540-pci";
+        device_type = "pci";
+        interrupts = <24 0x2 0 0>;
+        bus-range = <0 0xff>;
+        #interrupt-cells = <1>;
+        #size-cells = <2>;
+        #address-cells = <3>;
+        sleep = <&pmc 0x80000000>;
+};
+
+/* controller at 0xa000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+        sleep = <&pmc 0x20000000>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <48 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        fsl,srio-rmu-handle = <&rmu>;
+        sleep = <&pmc 0x00080000>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8568-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <10>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8568-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8568-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+        i2c-sleep-nexus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                sleep = <&pmc 0x00000004>;
+                ranges;
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+
+        };
+
+        duart-sleep-nexus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                sleep = <&pmc 0x00000002>;
+                ranges;
+
+/include/ "pq3-duart-0.dtsi"
+
+        };
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8568-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2, 512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+        dma@21300 {
+                sleep = <&pmc 0x00000400>;
+        };
+
+/include/ "pq3-etsec1-0.dtsi"
+        ethernet@24000 {
+                sleep = <&pmc 0x00000080>;
+        };
+
+/include/ "pq3-etsec1-1.dtsi"
+        ethernet@25000 {
+                sleep = <&pmc 0x00000040>;
+        };
+
+        par_io@e0100 {
+                reg = <0xe0100 0x100>;
+                device_type = "par_io";
+        };
+
+/include/ "pq3-sec2.1-0.dtsi"
+        crypto@30000 {
+                sleep = <&pmc 0x01000000>;
+        };
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
+        rmu@d3000 {
+                sleep = <&pmc 0x00040000>;
+        };
+
+        global-utilities@e0000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
+                reg = <0xe0000 0x1000>;
+                ranges = <0 0xe0000 0x1000>;
+                fsl,has-rstcr;
+
+                pmc: power@70 {
+                        compatible = "fsl,mpc8568-pmc",
+                                     "fsl,mpc8548-pmc";
+                        reg = <0x70 0x20>;
+                };
+        };
+};
+
+&qe {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "qe";
+        compatible = "fsl,qe";
+        sleep = <&pmc 0x00000800>;
+        brg-frequency = <0>;
+        bus-frequency = <396000000>;
+        fsl,qe-num-riscs = <2>;
+        fsl,qe-num-snums = <28>;
+
+        qeic: interrupt-controller@80 {
+                interrupt-controller;
+                compatible = "fsl,qe-ic";
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                reg = <0x80 0x80>;
+                interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
+                interrupt-parent = <&mpic>;
+        };
+
+        spi@4c0 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,spi";
+                reg = <0x4c0 0x40>;
+                cell-index = <0>;
+                interrupts = <2>;
+                interrupt-parent = <&qeic>;
+        };
+
+        spi@500 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cell-index = <1>;
+                compatible = "fsl,spi";
+                reg = <0x500 0x40>;
+                interrupts = <1>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@2000 {
+                cell-index = <1>;
+                reg = <0x2000 0x200>;
+                interrupts = <32>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@3000 {
+                cell-index = <2>;
+                reg = <0x3000 0x200>;
+                interrupts = <33>;
+                interrupt-parent = <&qeic>;
+        };
+
+        muram@10000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,qe-muram", "fsl,cpm-muram";
+                ranges = <0x0 0x10000 0x10000>;
+
+                data-only@0 {
+                        compatible = "fsl,qe-muram-data",
+                                     "fsl,cpm-muram-data";
+                        reg = <0x0 0x10000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
new file mode 100644
index 000000000000..eacd62c5fe6c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi
@@ -0,0 +1,65 @@
+/*
+ * MPC8568 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,MPC8568";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8568@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                        sleep = <&pmc 0x00008000        // core
+                                 &pmc 0x00004000>;      // timebase
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
new file mode 100644
index 000000000000..3e6346a4a183
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi
@@ -0,0 +1,304 @@
+/*
+ * MPC8569 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+        sleep = <&pmc 0x08000000>;
+};
+
+/* controller at 0xa000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+        sleep = <&pmc 0x20000000>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <48 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        fsl,srio-rmu-handle = <&rmu>;
+        sleep = <&pmc 0x00080000>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+
+        port2 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <2>;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8569-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <10>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8569-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8569-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+        i2c-sleep-nexus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                sleep = <&pmc 0x00000004>;
+                ranges;
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+
+        };
+
+        duart-sleep-nexus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                sleep = <&pmc 0x00000002>;
+                ranges;
+
+/include/ "pq3-duart-0.dtsi"
+
+        };
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8569-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2, 512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                sleep = <&pmc 0x00200000>;
+        };
+
+        par_io@e0100 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xe0100 0x100>;
+                ranges = <0x0 0xe0100 0x100>;
+                device_type = "par_io";
+        };
+
+/include/ "pq3-sec3.1-0.dtsi"
+        crypto@30000 {
+                sleep = <&pmc 0x01000000>;
+        };
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-rmu-0.dtsi"
+        rmu@d3000 {
+                sleep = <&pmc 0x00040000>;
+        };
+
+        global-utilities@e0000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
+                reg = <0xe0000 0x1000>;
+                ranges = <0 0xe0000 0x1000>;
+                fsl,has-rstcr;
+
+                pmc: power@70 {
+                        compatible = "fsl,mpc8569-pmc",
+                                     "fsl,mpc8548-pmc";
+                        reg = <0x70 0x20>;
+                };
+        };
+};
+
+&qe {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "qe";
+        compatible = "fsl,qe";
+        sleep = <&pmc 0x00000800>;
+        brg-frequency = <0>;
+        bus-frequency = <0>;
+        fsl,qe-num-riscs = <4>;
+        fsl,qe-num-snums = <46>;
+
+        qeic: interrupt-controller@80 {
+                interrupt-controller;
+                compatible = "fsl,qe-ic";
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                reg = <0x80 0x80>;
+                interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30
+                interrupt-parent = <&mpic>;
+        };
+
+        timer@440 {
+                compatible = "fsl,mpc8569-qe-gtm",
+                             "fsl,qe-gtm", "fsl,gtm";
+                reg = <0x440 0x40>;
+                interrupts = <12 13 14 15>;
+                interrupt-parent = <&qeic>;
+                /* Filled in by U-Boot */
+                clock-frequency = <0>;
+        };
+
+        spi@4c0 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
+                reg = <0x4c0 0x40>;
+                cell-index = <0>;
+                interrupts = <2>;
+                interrupt-parent = <&qeic>;
+        };
+
+        spi@500 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cell-index = <1>;
+                compatible = "fsl,spi";
+                reg = <0x500 0x40>;
+                interrupts = <1>;
+                interrupt-parent = <&qeic>;
+        };
+
+        usb@6c0 {
+                compatible = "fsl,mpc8569-qe-usb",
+                             "fsl,mpc8323-qe-usb";
+                reg = <0x6c0 0x40 0x8b00 0x100>;
+                interrupts = <11>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@2000 {
+                cell-index = <1>;
+                reg = <0x2000 0x200>;
+                interrupts = <32>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@2200 {
+                cell-index = <3>;
+                reg = <0x2200 0x200>;
+                interrupts = <34>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@3000 {
+                cell-index = <2>;
+                reg = <0x3000 0x200>;
+                interrupts = <33>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@3200 {
+                cell-index = <4>;
+                reg = <0x3200 0x200>;
+                interrupts = <35>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@3400 {
+                cell-index = <6>;
+                reg = <0x3400 0x200>;
+                interrupts = <41>;
+                interrupt-parent = <&qeic>;
+        };
+
+        ucc@3600 {
+                cell-index = <8>;
+                reg = <0x3600 0x200>;
+                interrupts = <43>;
+                interrupt-parent = <&qeic>;
+        };
+
+        muram@10000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,qe-muram", "fsl,cpm-muram";
+                ranges = <0x0 0x10000 0x20000>;
+
+                data-only@0 {
+                        compatible = "fsl,qe-muram-data",
+                                     "fsl,cpm-muram-data";
+                        reg = <0x0 0x20000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
new file mode 100644
index 000000000000..b07064d11930
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi
@@ -0,0 +1,64 @@
+/*
+ * MPC8569 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,MPC8569";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8569@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                        sleep = <&pmc 0x00008000        // core
+                                 &pmc 0x00004000>;      // timebase
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
new file mode 100644
index 000000000000..d44e25a48734
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi
@@ -0,0 +1,196 @@
+/*
+ * MPC8572 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x8000 */
+&pci0 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <24 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <24 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <25 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <25 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci2 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8572-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8572-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+        memory-controller@6000 {
+                compatible = "fsl,mpc8572-memory-controller";
+                reg = <0x6000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+/include/ "pq3-dma-1.dtsi"
+/include/ "pq3-gpio-0.dtsi"
+        gpio-controller@f000 {
+                compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
+        };
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8572-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x100000>; // L2,1M
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-timer-0.dtsi"
+
+        ptp_clock@24e00 {
+                interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
+        };
+
+/include/ "pq3-etsec1-1.dtsi"
+/include/ "pq3-etsec1-2.dtsi"
+/include/ "pq3-etsec1-3.dtsi"
+/include/ "pq3-sec3.0-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,mpc8572-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
new file mode 100644
index 000000000000..ca188326c2ca
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi
@@ -0,0 +1,70 @@
+/*
+ * MPC8572 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,MPC8572";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
new file mode 100644
index 000000000000..bd9e163c764b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -0,0 +1,198 @@
+/*
+ * P1010/P1014 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,ifc", "simple-bus";
+        interrupts = <16 2 0 0 19 2 0 0>;
+};
+
+/* controller at 0x9000 */
+&pci0 {
+        compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci1 {
+        compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,p1010-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,p1010-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,p1010-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+/include/ "pq3-espi-0.dtsi"
+        spi0: spi@7000 {
+                fsl,espi-num-chipselects = <1>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+/include/ "pq3-sata2-0.dtsi"
+/include/ "pq3-sata2-1.dtsi"
+
+        can0: can@1c000 {
+                compatible = "fsl,p1010-flexcan";
+                reg = <0x1c000 0x1000>;
+                interrupts = <48 0x2 0 0>;
+        };
+
+        can1: can@1d000 {
+                compatible = "fsl,p1010-flexcan";
+                reg = <0x1d000 0x1000>;
+                interrupts = <61 0x2 0 0>;
+        };
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,p1010-l2-cache-controller",
+                                "fsl,p1014-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2,256K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+/include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                fsl,sdhci-auto-cmd12;
+        };
+
+/include/ "pq3-sec4.4-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+        enet0: ethernet@b0000 {
+                queue-group@b0000 {
+                        fsl,rx-bit-map = <0xff>;
+                        fsl,tx-bit-map = <0xff>;
+                };
+        };
+
+/include/ "pq3-etsec2-1.dtsi"
+        enet1: ethernet@b1000 {
+                queue-group@b1000 {
+                        fsl,rx-bit-map = <0xff>;
+                        fsl,tx-bit-map = <0xff>;
+                };
+        };
+
+/include/ "pq3-etsec2-2.dtsi"
+        enet2: ethernet@b2000 {
+                queue-group@b2000 {
+                        fsl,rx-bit-map = <0xff>;
+                        fsl,tx-bit-map = <0xff>;
+                };
+
+        };
+
+        global-utilities@e0000 {
+                compatible = "fsl,p1010-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
new file mode 100644
index 000000000000..7354a8f90ea5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi
@@ -0,0 +1,64 @@
+/*
+ * P1010/P1014 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P1010";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                can0 = &can0;
+                can1 = &can1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,P1010@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
new file mode 100644
index 000000000000..fc924c5ffebe
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -0,0 +1,174 @@
+/*
+ * P1020/P1011 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x9000 */
+&pci0 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,p1020-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,p1020-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,p1020-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+/include/ "pq3-espi-0.dtsi"
+        spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,p1020-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2,256K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+/include/ "pq3-usb2-dr-1.dtsi"
+
+/include/ "pq3-esdhc-0.dtsi"
+/include/ "pq3-sec3.3-0.dtsi"
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+        enet0: enet0_grp2: ethernet@b0000 {
+        };
+
+/include/ "pq3-etsec2-1.dtsi"
+        enet1: enet1_grp2: ethernet@b1000 {
+        };
+
+/include/ "pq3-etsec2-2.dtsi"
+        enet2: enet2_grp2: ethernet@b2000 {
+        };
+
+        global-utilities@e0000 {
+                compatible = "fsl,p1020-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
+
+/include/ "pq3-etsec2-grp2-0.dtsi"
+/include/ "pq3-etsec2-grp2-1.dtsi"
+/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
new file mode 100644
index 000000000000..6f0376e554eb
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi
@@ -0,0 +1,68 @@
+/*
+ * P1020/P1011 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P1020";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,P1020@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,P1020@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
new file mode 100644
index 000000000000..38ba54d1e32e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -0,0 +1,225 @@
+/*
+ * P1021/P1012 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x9000 */
+&pci0 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,p1021-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,p1021-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,p1021-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+/include/ "pq3-espi-0.dtsi"
+        spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,p1021-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2,256K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+
+/include/ "pq3-esdhc-0.dtsi"
+/include/ "pq3-sec3.3-0.dtsi"
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+        enet0: enet0_grp2: ethernet@b0000 {
+        };
+
+/include/ "pq3-etsec2-1.dtsi"
+        enet1: enet1_grp2: ethernet@b1000 {
+        };
+
+/include/ "pq3-etsec2-2.dtsi"
+        enet2: enet2_grp2: ethernet@b2000 {
+        };
+
+        global-utilities@e0000 {
+                compatible = "fsl,p1021-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
+
+&qe {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "qe";
+        compatible = "fsl,qe";
+        fsl,qe-num-riscs = <1>;
+        fsl,qe-num-snums = <28>;
+
+        qeic: interrupt-controller@80 {
+                interrupt-controller;
+                compatible = "fsl,qe-ic";
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                reg = <0x80 0x80>;
+                interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44
+        };
+
+        ucc@2000 {
+                cell-index = <1>;
+                reg = <0x2000 0x200>;
+                interrupts = <32>;
+                interrupt-parent = <&qeic>;
+        };
+
+        mdio@2120 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                reg = <0x2120 0x18>;
+                compatible = "fsl,ucc-mdio";
+        };
+
+        ucc@2400 {
+                cell-index = <5>;
+                reg = <0x2400 0x200>;
+                interrupts = <40>;
+                interrupt-parent = <&qeic>;
+        };
+
+        muram@10000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,qe-muram", "fsl,cpm-muram";
+                ranges = <0x0 0x10000 0x6000>;
+
+                data-only@0 {
+                        compatible = "fsl,qe-muram-data",
+                        "fsl,cpm-muram-data";
+                        reg = <0x0 0x6000>;
+                };
+        };
+};
+
+/include/ "pq3-etsec2-grp2-0.dtsi"
+/include/ "pq3-etsec2-grp2-1.dtsi"
+/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
new file mode 100644
index 000000000000..4abd54bc3308
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi
@@ -0,0 +1,68 @@
+/*
+ * P1021/P1012 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P1021";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,P1021@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,P1021@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
new file mode 100644
index 000000000000..16239b199d0a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -0,0 +1,235 @@
+/*
+ * P1022/P1013 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x9000 */
+&pci0 {
+        compatible = "fsl,p1022-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci1 {
+        compatible = "fsl,p1022-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xb000 */
+&pci2 {
+        compatible = "fsl,p1022-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,p1022-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,p1022-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,p1022-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+/include/ "pq3-espi-0.dtsi"
+        spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-dma-1.dtsi"
+        dma@c300 {
+                dma00: dma-channel@0 {
+                        compatible = "fsl,ssi-dma-channel";
+                };
+                dma01: dma-channel@80 {
+                        compatible = "fsl,ssi-dma-channel";
+                };
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+
+        display@10000 {
+                compatible = "fsl,diu", "fsl,p1022-diu";
+                reg = <0x10000 1000>;
+                interrupts = <64 2 0 0>;
+        };
+
+        ssi@15000 {
+                compatible = "fsl,mpc8610-ssi";
+                cell-index = <0>;
+                reg = <0x15000 0x100>;
+                interrupts = <75 2 0 0>;
+                fsl,playback-dma = <&dma00>;
+                fsl,capture-dma = <&dma01>;
+                fsl,fifo-depth = <15>;
+        };
+
+/include/ "pq3-sata2-0.dtsi"
+/include/ "pq3-sata2-1.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,p1022-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2,256K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+/include/ "pq3-usb2-dr-1.dtsi"
+
+/include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                fsl,sdhci-auto-cmd12;
+        };
+
+/include/ "pq3-sec3.3-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+        enet0: enet0_grp2: ethernet@b0000 {
+        };
+
+/include/ "pq3-etsec2-1.dtsi"
+        enet1: enet1_grp2: ethernet@b1000 {
+        };
+
+        global-utilities@e0000 {
+                compatible = "fsl,p1022-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+
+        power@e0070{
+                compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
+                reg = <0xe0070 0x20>;
+        };
+
+};
+
+/include/ "pq3-etsec2-grp2-0.dtsi"
+/include/ "pq3-etsec2-grp2-1.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
new file mode 100644
index 000000000000..e930f4f7ca89
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi
@@ -0,0 +1,68 @@
+/*
+ * P1022/P1013 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P1022";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,P1022@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,P1022@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
new file mode 100644
index 000000000000..b06bb4cc1fe8
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -0,0 +1,224 @@
+/*
+ * P1023/P1017 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0xa000 */
+&pci0 {
+        compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+        };
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+        };
+};
+
+/* controller at 0xb000 */
+&pci2 {
+        compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 0 0>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 0 0>;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,p1023-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,p1023-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,p1023-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+/include/ "pq3-espi-0.dtsi"
+        spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,p1023-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2,256K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+
+        crypto: crypto@300000 {
+                compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x30000 0x10000>;
+                ranges = <0 0x30000 0x10000>;
+                interrupts = <58 2 0 0>;
+
+                sec_jr0: jr@1000 {
+                        compatible = "fsl,sec-v4.2-job-ring",
+                                     "fsl,sec-v4.0-job-ring";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <45 2 0 0>;
+                };
+
+                sec_jr1: jr@2000 {
+                        compatible = "fsl,sec-v4.2-job-ring",
+                                     "fsl,sec-v4.0-job-ring";
+                        reg = <0x2000 0x1000>;
+                        interrupts = <45 2 0 0>;
+                };
+
+                sec_jr2: jr@3000 {
+                        compatible = "fsl,sec-v4.2-job-ring",
+                                     "fsl,sec-v4.0-job-ring";
+                        reg = <0x3000 0x1000>;
+                        interrupts = <57 2 0 0>;
+                };
+
+                sec_jr3: jr@4000 {
+                        compatible = "fsl,sec-v4.2-job-ring",
+                                     "fsl,sec-v4.0-job-ring";
+                        reg = <0x4000 0x1000>;
+                        interrupts = <57 2 0 0>;
+                };
+
+                rtic@6000 {
+                        compatible = "fsl,sec-v4.2-rtic",
+                                     "fsl,sec-v4.0-rtic";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x6000 0x100>;
+                        ranges = <0x0 0x6100 0xe00>;
+
+                        rtic_a: rtic-a@0 {
+                                compatible = "fsl,sec-v4.2-rtic-memory",
+                                             "fsl,sec-v4.0-rtic-memory";
+                                reg = <0x00 0x20 0x100 0x80>;
+                        };
+
+                        rtic_b: rtic-b@20 {
+                                compatible = "fsl,sec-v4.2-rtic-memory",
+                                             "fsl,sec-v4.0-rtic-memory";
+                                reg = <0x20 0x20 0x200 0x80>;
+                        };
+
+                        rtic_c: rtic-c@40 {
+                                compatible = "fsl,sec-v4.2-rtic-memory",
+                                             "fsl,sec-v4.0-rtic-memory";
+                                reg = <0x40 0x20 0x300 0x80>;
+                        };
+
+                        rtic_d: rtic-d@60 {
+                                compatible = "fsl,sec-v4.2-rtic-memory",
+                                             "fsl,sec-v4.0-rtic-memory";
+                                reg = <0x60 0x20 0x500 0x80>;
+                        };
+                };
+        };
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,p1023-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
new file mode 100644
index 000000000000..ac45f6d93385
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi
@@ -0,0 +1,76 @@
+/*
+ * P1023/P1017 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P1023";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,P1023@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,P1023@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
new file mode 100644
index 000000000000..c041050561a7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
@@ -0,0 +1,194 @@
+/*
+ * P2020/P2010 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0xa000 */
+&pci0 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <25 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <25 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0x8000 */
+&pci2 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <24 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <24 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
+                        >;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,p2020-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,p2020-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,p2020-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+/include/ "pq3-espi-0.dtsi"
+        spi0: spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-dma-1.dtsi"
+/include/ "pq3-gpio-0.dtsi"
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,p2020-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2,512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-timer-0.dtsi"
+
+        ptp_clock@24e00 {
+                interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
+        };
+
+
+/include/ "pq3-etsec1-1.dtsi"
+/include/ "pq3-etsec1-2.dtsi"
+/include/ "pq3-esdhc-0.dtsi"
+/include/ "pq3-sec3.1-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,p2020-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
new file mode 100644
index 000000000000..3213288641d1
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi
@@ -0,0 +1,69 @@
+/*
+ * P2020/P2010 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P2020";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                serial0 = &serial0;
+                serial1 = &serial1;
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,P2020@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,P2020@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
new file mode 100644
index 000000000000..234a399ddeb2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -0,0 +1,325 @@
+/*
+ * P2041/P2040 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <25 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <1>;
+};
+
+/* controller at 0x200000 */
+&pci0 {
+        compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 15>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 15>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 40 1 0 0
+                        0000 0 0 2 &mpic 1 1 0 0
+                        0000 0 0 3 &mpic 2 1 0 0
+                        0000 0 0 4 &mpic 3 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x201000 */
+&pci1 {
+        compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 14>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 14>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 41 1 0 0
+                        0000 0 0 2 &mpic 5 1 0 0
+                        0000 0 0 3 &mpic 6 1 0 0
+                        0000 0 0 4 &mpic 7 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x202000 */
+&pci2 {
+        compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 13>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 13>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 42 1 0 0
+                        0000 0 0 2 &mpic 9 1 0 0
+                        0000 0 0 3 &mpic 10 1 0 0
+                        0000 0 0 4 &mpic 11 1 0 0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <16 2 1 11>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+
+        port2 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <2>;
+        };
+};
+
+&dcsr {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,dcsr", "simple-bus";
+
+        dcsr-epu@0 {
+                compatible = "fsl,dcsr-epu";
+                interrupts = <52 2 0 0
+                              84 2 0 0
+                              85 2 0 0>;
+                reg = <0x0 0x1000>;
+        };
+        dcsr-npc {
+                compatible = "fsl,dcsr-npc";
+                reg = <0x1000 0x1000 0x1000000 0x8000>;
+        };
+        dcsr-nxc@2000 {
+                compatible = "fsl,dcsr-nxc";
+                reg = <0x2000 0x1000>;
+        };
+        dcsr-corenet {
+                compatible = "fsl,dcsr-corenet";
+                reg = <0x8000 0x1000 0xB0000 0x1000>;
+        };
+        dcsr-dpaa@9000 {
+                compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
+                reg = <0x9000 0x1000>;
+        };
+        dcsr-ocn@11000 {
+                compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
+                reg = <0x11000 0x1000>;
+        };
+        dcsr-ddr@12000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr1>;
+                reg = <0x12000 0x1000>;
+        };
+        dcsr-nal@18000 {
+                compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
+                reg = <0x18000 0x1000>;
+        };
+        dcsr-rcpm@22000 {
+                compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
+                reg = <0x22000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@40000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu0>;
+                reg = <0x40000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@41000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu1>;
+                reg = <0x41000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@42000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu2>;
+                reg = <0x42000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@43000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu3>;
+                reg = <0x43000 0x1000>;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "simple-bus";
+
+        soc-sram-error {
+                compatible = "fsl,soc-sram-error";
+                interrupts = <16 2 1 29>;
+        };
+
+        corenet-law@0 {
+                compatible = "fsl,corenet-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <32>;
+        };
+
+        ddr1: memory-controller@8000 {
+                compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+                reg = <0x8000 0x1000>;
+                interrupts = <16 2 1 23>;
+        };
+
+        cpc: l3-cache-controller@10000 {
+                compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+                reg = <0x10000 0x1000>;
+                interrupts = <16 2 1 27>;
+        };
+
+        corenet-cf@18000 {
+                compatible = "fsl,corenet-cf";
+                reg = <0x18000 0x1000>;
+                interrupts = <16 2 1 31>;
+                fsl,ccf-num-csdids = <32>;
+                fsl,ccf-num-snoopids = <32>;
+        };
+
+        iommu@20000 {
+                compatible = "fsl,pamu-v1.0", "fsl,pamu";
+                reg = <0x20000 0x4000>;
+                interrupts = <
+                        24 2 0 0
+                        16 2 1 30>;
+        };
+
+/include/ "qoriq-mpic.dtsi"
+
+        guts: global-utilities@e0000 {
+                compatible = "fsl,qoriq-device-config-1.0";
+                reg = <0xe0000 0xe00>;
+                fsl,has-rstcr;
+                #sleep-cells = <1>;
+                fsl,liodn-bits = <12>;
+        };
+
+        pins: global-utilities@e0e00 {
+                compatible = "fsl,qoriq-pin-control-1.0";
+                reg = <0xe0e00 0x200>;
+                #sleep-cells = <2>;
+        };
+
+        clockgen: global-utilities@e1000 {
+                compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
+                reg = <0xe1000 0x1000>;
+                clock-frequency = <0>;
+        };
+
+        rcpm: global-utilities@e2000 {
+                compatible = "fsl,qoriq-rcpm-1.0";
+                reg = <0xe2000 0x1000>;
+                #sleep-cells = <1>;
+        };
+
+        sfp: sfp@e8000 {
+                compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
+                reg        = <0xe8000 0x1000>;
+        };
+
+        serdes: serdes@ea000 {
+                compatible = "fsl,p2041-serdes";
+                reg        = <0xea000 0x1000>;
+        };
+
+/include/ "qoriq-dma-0.dtsi"
+/include/ "qoriq-dma-1.dtsi"
+/include/ "qoriq-espi-0.dtsi"
+        spi@110000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "qoriq-esdhc-0.dtsi"
+        sdhc@114000 {
+                sdhci,auto-cmd12;
+        };
+
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+                usb0: usb@210000 {
+                        phy_type = "utmi";
+                        port0;
+                };
+
+/include/ "qoriq-usb2-dr-0.dtsi"
+                usb1: usb@211000 {
+                        dr_mode = "host";
+                        phy_type = "utmi";
+                };
+
+/include/ "qoriq-sata2-0.dtsi"
+/include/ "qoriq-sata2-1.dtsi"
+/include/ "qoriq-sec4.2-0.dtsi"
+};
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
new file mode 100644
index 000000000000..2d0a40d6b10f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -0,0 +1,111 @@
+/*
+ * P2041 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P2041";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                ccsr = &soc;
+                dcsr = &dcsr;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                serial2 = &serial2;
+                serial3 = &serial3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+                usb0 = &usb0;
+                usb1 = &usb1;
+                dma0 = &dma0;
+                dma1 = &dma1;
+                sdhc = &sdhc;
+                msi0 = &msi0;
+                msi1 = &msi1;
+                msi2 = &msi2;
+
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: PowerPC,e500mc@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        next-level-cache = <&L2_0>;
+                        L2_0: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu1: PowerPC,e500mc@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        next-level-cache = <&L2_1>;
+                        L2_1: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu2: PowerPC,e500mc@2 {
+                        device_type = "cpu";
+                        reg = <2>;
+                        next-level-cache = <&L2_2>;
+                        L2_2: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu3: PowerPC,e500mc@3 {
+                        device_type = "cpu";
+                        reg = <3>;
+                        next-level-cache = <&L2_3>;
+                        L2_3: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
new file mode 100644
index 000000000000..d41d08de7f7e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -0,0 +1,352 @@
+/*
+ * P3041 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <25 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <1>;
+};
+
+/* controller at 0x200000 */
+&pci0 {
+        compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 15>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 15>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 40 1 0 0
+                        0000 0 0 2 &mpic 1 1 0 0
+                        0000 0 0 3 &mpic 2 1 0 0
+                        0000 0 0 4 &mpic 3 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x201000 */
+&pci1 {
+        compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 14>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 14>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 41 1 0 0
+                        0000 0 0 2 &mpic 5 1 0 0
+                        0000 0 0 3 &mpic 6 1 0 0
+                        0000 0 0 4 &mpic 7 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x202000 */
+&pci2 {
+        compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 13>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 13>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 42 1 0 0
+                        0000 0 0 2 &mpic 9 1 0 0
+                        0000 0 0 3 &mpic 10 1 0 0
+                        0000 0 0 4 &mpic 11 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x203000 */
+&pci3 {
+        compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 12>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 12>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 43 1 0 0
+                        0000 0 0 2 &mpic 0 1 0 0
+                        0000 0 0 3 &mpic 4 1 0 0
+                        0000 0 0 4 &mpic 8 1 0 0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <16 2 1 11>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+
+        port2 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <2>;
+        };
+};
+
+&dcsr {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,dcsr", "simple-bus";
+
+        dcsr-epu@0 {
+                compatible = "fsl,dcsr-epu";
+                interrupts = <52 2 0 0
+                              84 2 0 0
+                              85 2 0 0>;
+                reg = <0x0 0x1000>;
+        };
+        dcsr-npc {
+                compatible = "fsl,dcsr-npc";
+                reg = <0x1000 0x1000 0x1000000 0x8000>;
+        };
+        dcsr-nxc@2000 {
+                compatible = "fsl,dcsr-nxc";
+                reg = <0x2000 0x1000>;
+        };
+        dcsr-corenet {
+                compatible = "fsl,dcsr-corenet";
+                reg = <0x8000 0x1000 0xB0000 0x1000>;
+        };
+        dcsr-dpaa@9000 {
+                compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa";
+                reg = <0x9000 0x1000>;
+        };
+        dcsr-ocn@11000 {
+                compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn";
+                reg = <0x11000 0x1000>;
+        };
+        dcsr-ddr@12000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr1>;
+                reg = <0x12000 0x1000>;
+        };
+        dcsr-nal@18000 {
+                compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal";
+                reg = <0x18000 0x1000>;
+        };
+        dcsr-rcpm@22000 {
+                compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm";
+                reg = <0x22000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@40000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu0>;
+                reg = <0x40000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@41000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu1>;
+                reg = <0x41000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@42000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu2>;
+                reg = <0x42000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@43000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu3>;
+                reg = <0x43000 0x1000>;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "simple-bus";
+
+        soc-sram-error {
+                compatible = "fsl,soc-sram-error";
+                interrupts = <16 2 1 29>;
+        };
+
+        corenet-law@0 {
+                compatible = "fsl,corenet-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <32>;
+        };
+
+        ddr1: memory-controller@8000 {
+                compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+                reg = <0x8000 0x1000>;
+                interrupts = <16 2 1 23>;
+        };
+
+        cpc: l3-cache-controller@10000 {
+                compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+                reg = <0x10000 0x1000>;
+                interrupts = <16 2 1 27>;
+        };
+
+        corenet-cf@18000 {
+                compatible = "fsl,corenet-cf";
+                reg = <0x18000 0x1000>;
+                interrupts = <16 2 1 31>;
+                fsl,ccf-num-csdids = <32>;
+                fsl,ccf-num-snoopids = <32>;
+        };
+
+        iommu@20000 {
+                compatible = "fsl,pamu-v1.0", "fsl,pamu";
+                reg = <0x20000 0x4000>;
+                interrupts = <
+                        24 2 0 0
+                        16 2 1 30>;
+        };
+
+/include/ "qoriq-mpic.dtsi"
+
+        guts: global-utilities@e0000 {
+                compatible = "fsl,qoriq-device-config-1.0";
+                reg = <0xe0000 0xe00>;
+                fsl,has-rstcr;
+                #sleep-cells = <1>;
+                fsl,liodn-bits = <12>;
+        };
+
+        pins: global-utilities@e0e00 {
+                compatible = "fsl,qoriq-pin-control-1.0";
+                reg = <0xe0e00 0x200>;
+                #sleep-cells = <2>;
+        };
+
+        clockgen: global-utilities@e1000 {
+                compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
+                reg = <0xe1000 0x1000>;
+                clock-frequency = <0>;
+        };
+
+        rcpm: global-utilities@e2000 {
+                compatible = "fsl,qoriq-rcpm-1.0";
+                reg = <0xe2000 0x1000>;
+                #sleep-cells = <1>;
+        };
+
+        sfp: sfp@e8000 {
+                compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
+                reg        = <0xe8000 0x1000>;
+        };
+
+        serdes: serdes@ea000 {
+                compatible = "fsl,p3041-serdes";
+                reg        = <0xea000 0x1000>;
+        };
+
+/include/ "qoriq-dma-0.dtsi"
+/include/ "qoriq-dma-1.dtsi"
+/include/ "qoriq-espi-0.dtsi"
+        spi@110000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "qoriq-esdhc-0.dtsi"
+        sdhc@114000 {
+                sdhci,auto-cmd12;
+        };
+
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+                usb0: usb@210000 {
+                        phy_type = "utmi";
+                        port0;
+                };
+
+/include/ "qoriq-usb2-dr-0.dtsi"
+                usb1: usb@211000 {
+                        dr_mode = "host";
+                        phy_type = "utmi";
+                };
+
+/include/ "qoriq-sata2-0.dtsi"
+/include/ "qoriq-sata2-1.dtsi"
+/include/ "qoriq-sec4.2-0.dtsi"
+};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
new file mode 100644
index 000000000000..136def3536b6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi
@@ -0,0 +1,112 @@
+/*
+ * P3041 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P3041";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                ccsr = &soc;
+                dcsr = &dcsr;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                serial2 = &serial2;
+                serial3 = &serial3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+                pci3 = &pci3;
+                usb0 = &usb0;
+                usb1 = &usb1;
+                dma0 = &dma0;
+                dma1 = &dma1;
+                sdhc = &sdhc;
+                msi0 = &msi0;
+                msi1 = &msi1;
+                msi2 = &msi2;
+
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: PowerPC,e500mc@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        next-level-cache = <&L2_0>;
+                        L2_0: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu1: PowerPC,e500mc@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        next-level-cache = <&L2_1>;
+                        L2_1: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu2: PowerPC,e500mc@2 {
+                        device_type = "cpu";
+                        reg = <2>;
+                        next-level-cache = <&L2_2>;
+                        L2_2: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu3: PowerPC,e500mc@3 {
+                        device_type = "cpu";
+                        reg = <3>;
+                        next-level-cache = <&L2_3>;
+                        L2_3: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
new file mode 100644
index 000000000000..a63edd195ae5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
@@ -0,0 +1,296 @@
+/*
+ * P3060 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <25 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <1>;
+};
+
+/* controller at 0x200000 */
+&pci0 {
+        compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 15>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 15>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 40 1 0 0
+                        0000 0 0 2 &mpic 1 1 0 0
+                        0000 0 0 3 &mpic 2 1 0 0
+                        0000 0 0 4 &mpic 3 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x201000 */
+&pci1 {
+        compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 14>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 14>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 41 1 0 0
+                        0000 0 0 2 &mpic 5 1 0 0
+                        0000 0 0 3 &mpic 6 1 0 0
+                        0000 0 0 4 &mpic 7 1 0 0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <16 2 1 11>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        fsl,srio-rmu-handle = <&rmu>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+
+        port2 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <2>;
+        };
+};
+
+&dcsr {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,dcsr", "simple-bus";
+
+        dcsr-epu@0 {
+                compatible = "fsl,dcsr-epu";
+                interrupts = <52 2 0 0
+                              84 2 0 0
+                              85 2 0 0>;
+                reg = <0x0 0x1000>;
+        };
+        dcsr-npc {
+                compatible = "fsl,dcsr-npc";
+                reg = <0x1000 0x1000 0x1000000 0x8000>;
+        };
+        dcsr-nxc@2000 {
+                compatible = "fsl,dcsr-nxc";
+                reg = <0x2000 0x1000>;
+        };
+        dcsr-corenet {
+                compatible = "fsl,dcsr-corenet";
+                reg = <0x8000 0x1000 0xB0000 0x1000>;
+        };
+        dcsr-dpaa@9000 {
+                compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
+                reg = <0x9000 0x1000>;
+        };
+        dcsr-ocn@11000 {
+                compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
+                reg = <0x11000 0x1000>;
+        };
+        dcsr-ddr@12000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr1>;
+                reg = <0x12000 0x1000>;
+        };
+        dcsr-nal@18000 {
+                compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
+                reg = <0x18000 0x1000>;
+        };
+        dcsr-rcpm@22000 {
+                compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
+                reg = <0x22000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@40000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu0>;
+                reg = <0x40000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@41000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu1>;
+                reg = <0x41000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@44000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu4>;
+                reg = <0x44000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@45000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu5>;
+                reg = <0x45000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@46000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu6>;
+                reg = <0x46000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@47000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu7>;
+                reg = <0x47000 0x1000>;
+        };
+
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "simple-bus";
+
+        soc-sram-error {
+                compatible = "fsl,soc-sram-error";
+                interrupts = <16 2 1 29>;
+        };
+
+        corenet-law@0 {
+                compatible = "fsl,corenet-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <32>;
+        };
+
+        ddr1: memory-controller@8000 {
+                compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
+                reg = <0x8000 0x1000>;
+                interrupts = <16 2 1 23>;
+        };
+
+        cpc: l3-cache-controller@10000 {
+                compatible = "fsl,p3060-l3-cache-controller", "cache";
+                reg = <0x10000 0x1000
+                       0x11000 0x1000>;
+                interrupts = <16 2 1 27
+                              16 2 1 26>;
+        };
+
+        corenet-cf@18000 {
+                compatible = "fsl,corenet-cf";
+                reg = <0x18000 0x1000>;
+                interrupts = <16 2 1 31>;
+                fsl,ccf-num-csdids = <32>;
+                fsl,ccf-num-snoopids = <32>;
+        };
+
+        iommu@20000 {
+                compatible = "fsl,pamu-v1.0", "fsl,pamu";
+                reg = <0x20000 0x5000>;
+                interrupts = <
+                        24 2 0 0
+                        16 2 1 30>;
+        };
+
+/include/ "qoriq-rmu-0.dtsi"
+/include/ "qoriq-mpic.dtsi"
+
+        guts: global-utilities@e0000 {
+                compatible = "fsl,qoriq-device-config-1.0";
+                reg = <0xe0000 0xe00>;
+                fsl,has-rstcr;
+                #sleep-cells = <1>;
+                fsl,liodn-bits = <12>;
+        };
+
+        pins: global-utilities@e0e00 {
+                compatible = "fsl,qoriq-pin-control-1.0";
+                reg = <0xe0e00 0x200>;
+                #sleep-cells = <2>;
+        };
+
+        clockgen: global-utilities@e1000 {
+                compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
+                reg = <0xe1000 0x1000>;
+                clock-frequency = <0>;
+        };
+
+        rcpm: global-utilities@e2000 {
+                compatible = "fsl,qoriq-rcpm-1.0";
+                reg = <0xe2000 0x1000>;
+                #sleep-cells = <1>;
+        };
+
+        sfp: sfp@e8000 {
+                compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
+                reg        = <0xe8000 0x1000>;
+        };
+
+        serdes: serdes@ea000 {
+                compatible = "fsl,p3060-serdes";
+                reg        = <0xea000 0x1000>;
+        };
+
+/include/ "qoriq-dma-0.dtsi"
+/include/ "qoriq-dma-1.dtsi"
+/include/ "qoriq-espi-0.dtsi"
+        spi@110000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+/include/ "qoriq-usb2-dr-0.dtsi"
+/include/ "qoriq-sec4.1-0.dtsi"
+};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
new file mode 100644
index 000000000000..00c8e70e7b90
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
@@ -0,0 +1,125 @@
+/*
+ * P3060 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P3060";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                ccsr = &soc;
+                dcsr = &dcsr;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                serial2 = &serial2;
+                serial3 = &serial3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                usb0 = &usb0;
+                usb1 = &usb1;
+                dma0 = &dma0;
+                dma1 = &dma1;
+                msi0 = &msi0;
+                msi1 = &msi1;
+                msi2 = &msi2;
+
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: PowerPC,e500mc@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        next-level-cache = <&L2_0>;
+                        L2_0: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu1: PowerPC,e500mc@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        next-level-cache = <&L2_1>;
+                        L2_1: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu4: PowerPC,e500mc@4 {
+                        device_type = "cpu";
+                        reg = <4>;
+                        next-level-cache = <&L2_4>;
+                        L2_4: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu5: PowerPC,e500mc@5 {
+                        device_type = "cpu";
+                        reg = <5>;
+                        next-level-cache = <&L2_5>;
+                        L2_5: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu6: PowerPC,e500mc@6 {
+                        device_type = "cpu";
+                        reg = <6>;
+                        next-level-cache = <&L2_6>;
+                        L2_6: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu7: PowerPC,e500mc@7 {
+                        device_type = "cpu";
+                        reg = <7>;
+                        next-level-cache = <&L2_7>;
+                        L2_7: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
new file mode 100644
index 000000000000..8d35d2c1f694
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -0,0 +1,350 @@
+/*
+ * P4080/P4040 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <25 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <1>;
+};
+
+/* controller at 0x200000 */
+&pci0 {
+        compatible = "fsl,p4080-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 15>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 15>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 40 1 0 0
+                        0000 0 0 2 &mpic 1 1 0 0
+                        0000 0 0 3 &mpic 2 1 0 0
+                        0000 0 0 4 &mpic 3 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x201000 */
+&pci1 {
+        compatible = "fsl,p4080-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 14>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 14>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 41 1 0 0
+                        0000 0 0 2 &mpic 5 1 0 0
+                        0000 0 0 3 &mpic 6 1 0 0
+                        0000 0 0 4 &mpic 7 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x202000 */
+&pci2 {
+        compatible = "fsl,p4080-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 13>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 13>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 42 1 0 0
+                        0000 0 0 2 &mpic 9 1 0 0
+                        0000 0 0 3 &mpic 10 1 0 0
+                        0000 0 0 4 &mpic 11 1 0 0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <16 2 1 11>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        fsl,srio-rmu-handle = <&rmu>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+
+        port2 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <2>;
+        };
+};
+
+&dcsr {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,dcsr", "simple-bus";
+
+        dcsr-epu@0 {
+                compatible = "fsl,dcsr-epu";
+                interrupts = <52 2 0 0
+                              84 2 0 0
+                              85 2 0 0>;
+                reg = <0x0 0x1000>;
+        };
+        dcsr-npc {
+                compatible = "fsl,dcsr-npc";
+                reg = <0x1000 0x1000 0x1000000 0x8000>;
+        };
+        dcsr-nxc@2000 {
+                compatible = "fsl,dcsr-nxc";
+                reg = <0x2000 0x1000>;
+        };
+        dcsr-corenet {
+                compatible = "fsl,dcsr-corenet";
+                reg = <0x8000 0x1000 0xB0000 0x1000>;
+        };
+        dcsr-dpaa@9000 {
+                compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
+                reg = <0x9000 0x1000>;
+        };
+        dcsr-ocn@11000 {
+                compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
+                reg = <0x11000 0x1000>;
+        };
+        dcsr-ddr@12000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr1>;
+                reg = <0x12000 0x1000>;
+        };
+        dcsr-ddr@13000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr2>;
+                reg = <0x13000 0x1000>;
+        };
+        dcsr-nal@18000 {
+                compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
+                reg = <0x18000 0x1000>;
+        };
+        dcsr-rcpm@22000 {
+                compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
+                reg = <0x22000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@40000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu0>;
+                reg = <0x40000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@41000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu1>;
+                reg = <0x41000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@42000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu2>;
+                reg = <0x42000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@43000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu3>;
+                reg = <0x43000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@44000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu4>;
+                reg = <0x44000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@45000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu5>;
+                reg = <0x45000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@46000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu6>;
+                reg = <0x46000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@47000 {
+                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu7>;
+                reg = <0x47000 0x1000>;
+        };
+
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "simple-bus";
+
+        soc-sram-error {
+                compatible = "fsl,soc-sram-error";
+                interrupts = <16 2 1 29>;
+        };
+
+        corenet-law@0 {
+                compatible = "fsl,corenet-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <32>;
+        };
+
+        ddr1: memory-controller@8000 {
+                compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
+                reg = <0x8000 0x1000>;
+                interrupts = <16 2 1 23>;
+        };
+
+        ddr2: memory-controller@9000 {
+                compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
+                reg = <0x9000 0x1000>;
+                interrupts = <16 2 1 22>;
+        };
+
+        cpc: l3-cache-controller@10000 {
+                compatible = "fsl,p4080-l3-cache-controller", "cache";
+                reg = <0x10000 0x1000
+                       0x11000 0x1000>;
+                interrupts = <16 2 1 27
+                              16 2 1 26>;
+        };
+
+        corenet-cf@18000 {
+                compatible = "fsl,corenet-cf";
+                reg = <0x18000 0x1000>;
+                interrupts = <16 2 1 31>;
+                fsl,ccf-num-csdids = <32>;
+                fsl,ccf-num-snoopids = <32>;
+        };
+
+        iommu@20000 {
+                compatible = "fsl,pamu-v1.0", "fsl,pamu";
+                reg = <0x20000 0x5000>;
+                interrupts = <
+                        24 2 0 0
+                        16 2 1 30>;
+        };
+
+/include/ "qoriq-rmu-0.dtsi"
+/include/ "qoriq-mpic.dtsi"
+
+        guts: global-utilities@e0000 {
+                compatible = "fsl,qoriq-device-config-1.0";
+                reg = <0xe0000 0xe00>;
+                fsl,has-rstcr;
+                #sleep-cells = <1>;
+                fsl,liodn-bits = <12>;
+        };
+
+        pins: global-utilities@e0e00 {
+                compatible = "fsl,qoriq-pin-control-1.0";
+                reg = <0xe0e00 0x200>;
+                #sleep-cells = <2>;
+        };
+
+        clockgen: global-utilities@e1000 {
+                compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
+                reg = <0xe1000 0x1000>;
+                clock-frequency = <0>;
+        };
+
+        rcpm: global-utilities@e2000 {
+                compatible = "fsl,qoriq-rcpm-1.0";
+                reg = <0xe2000 0x1000>;
+                #sleep-cells = <1>;
+        };
+
+        sfp: sfp@e8000 {
+                compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
+                reg        = <0xe8000 0x1000>;
+        };
+
+        serdes: serdes@ea000 {
+                compatible = "fsl,p4080-serdes";
+                reg        = <0xea000 0x1000>;
+        };
+
+/include/ "qoriq-dma-0.dtsi"
+/include/ "qoriq-dma-1.dtsi"
+/include/ "qoriq-espi-0.dtsi"
+        spi@110000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "qoriq-esdhc-0.dtsi"
+        sdhc@114000 {
+                voltage-ranges = <3300 3300>;
+                sdhci,auto-cmd12;
+        };
+
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+/include/ "qoriq-usb2-dr-0.dtsi"
+/include/ "qoriq-sec4.0-0.dtsi"
+};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
new file mode 100644
index 000000000000..b9556ee3a639
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -0,0 +1,143 @@
+/*
+ * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P4080";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                ccsr = &soc;
+                dcsr = &dcsr;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                serial2 = &serial2;
+                serial3 = &serial3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+                usb0 = &usb0;
+                usb1 = &usb1;
+                dma0 = &dma0;
+                dma1 = &dma1;
+                sdhc = &sdhc;
+                msi0 = &msi0;
+                msi1 = &msi1;
+                msi2 = &msi2;
+
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: PowerPC,e500mc@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        next-level-cache = <&L2_0>;
+                        L2_0: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu1: PowerPC,e500mc@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        next-level-cache = <&L2_1>;
+                        L2_1: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu2: PowerPC,e500mc@2 {
+                        device_type = "cpu";
+                        reg = <2>;
+                        next-level-cache = <&L2_2>;
+                        L2_2: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu3: PowerPC,e500mc@3 {
+                        device_type = "cpu";
+                        reg = <3>;
+                        next-level-cache = <&L2_3>;
+                        L2_3: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu4: PowerPC,e500mc@4 {
+                        device_type = "cpu";
+                        reg = <4>;
+                        next-level-cache = <&L2_4>;
+                        L2_4: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu5: PowerPC,e500mc@5 {
+                        device_type = "cpu";
+                        reg = <5>;
+                        next-level-cache = <&L2_5>;
+                        L2_5: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu6: PowerPC,e500mc@6 {
+                        device_type = "cpu";
+                        reg = <6>;
+                        next-level-cache = <&L2_6>;
+                        L2_6: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu7: PowerPC,e500mc@7 {
+                        device_type = "cpu";
+                        reg = <7>;
+                        next-level-cache = <&L2_7>;
+                        L2_7: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
new file mode 100644
index 000000000000..914074b91a85
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -0,0 +1,355 @@
+/*
+ * P5020/5010 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <25 2 0 0>;
+        #address-cells = <2>;
+        #size-cells = <1>;
+};
+
+/* controller at 0x200000 */
+&pci0 {
+        compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 15>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 15>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 40 1 0 0
+                        0000 0 0 2 &mpic 1 1 0 0
+                        0000 0 0 3 &mpic 2 1 0 0
+                        0000 0 0 4 &mpic 3 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x201000 */
+&pci1 {
+        compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 14>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 14>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 41 1 0 0
+                        0000 0 0 2 &mpic 5 1 0 0
+                        0000 0 0 3 &mpic 6 1 0 0
+                        0000 0 0 4 &mpic 7 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x202000 */
+&pci2 {
+        compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 13>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 13>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 42 1 0 0
+                        0000 0 0 2 &mpic 9 1 0 0
+                        0000 0 0 3 &mpic 10 1 0 0
+                        0000 0 0 4 &mpic 11 1 0 0
+                        >;
+        };
+};
+
+/* controller at 0x203000 */
+&pci3 {
+        compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0x0 0xff>;
+        clock-frequency = <33333333>;
+        interrupts = <16 2 1 12>;
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <16 2 1 12>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0 0 1 &mpic 43 1 0 0
+                        0000 0 0 2 &mpic 0 1 0 0
+                        0000 0 0 3 &mpic 4 1 0 0
+                        0000 0 0 4 &mpic 8 1 0 0
+                        >;
+        };
+};
+
+&rio {
+        compatible = "fsl,srio";
+        interrupts = <16 2 1 11>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        ranges;
+
+        port1 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <1>;
+        };
+
+        port2 {
+                #address-cells = <2>;
+                #size-cells = <2>;
+                cell-index = <2>;
+        };
+};
+
+&dcsr {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,dcsr", "simple-bus";
+
+        dcsr-epu@0 {
+                compatible = "fsl,dcsr-epu";
+                interrupts = <52 2 0 0
+                              84 2 0 0
+                              85 2 0 0>;
+                reg = <0x0 0x1000>;
+        };
+        dcsr-npc {
+                compatible = "fsl,dcsr-npc";
+                reg = <0x1000 0x1000 0x1000000 0x8000>;
+        };
+        dcsr-nxc@2000 {
+                compatible = "fsl,dcsr-nxc";
+                reg = <0x2000 0x1000>;
+        };
+        dcsr-corenet {
+                compatible = "fsl,dcsr-corenet";
+                reg = <0x8000 0x1000 0xB0000 0x1000>;
+        };
+        dcsr-dpaa@9000 {
+                compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
+                reg = <0x9000 0x1000>;
+        };
+        dcsr-ocn@11000 {
+                compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
+                reg = <0x11000 0x1000>;
+        };
+        dcsr-ddr@12000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr1>;
+                reg = <0x12000 0x1000>;
+        };
+        dcsr-ddr@13000 {
+                compatible = "fsl,dcsr-ddr";
+                dev-handle = <&ddr2>;
+                reg = <0x13000 0x1000>;
+        };
+        dcsr-nal@18000 {
+                compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
+                reg = <0x18000 0x1000>;
+        };
+        dcsr-rcpm@22000 {
+                compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
+                reg = <0x22000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@40000 {
+                compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu0>;
+                reg = <0x40000 0x1000>;
+        };
+        dcsr-cpu-sb-proxy@41000 {
+                compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+                cpu-handle = <&cpu1>;
+                reg = <0x41000 0x1000>;
+        };
+};
+
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "simple-bus";
+
+        soc-sram-error {
+                compatible = "fsl,soc-sram-error";
+                interrupts = <16 2 1 29>;
+        };
+
+        corenet-law@0 {
+                compatible = "fsl,corenet-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <32>;
+        };
+
+        ddr1: memory-controller@8000 {
+                compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+                reg = <0x8000 0x1000>;
+                interrupts = <16 2 1 23>;
+        };
+
+        ddr2: memory-controller@9000 {
+                compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
+                reg = <0x9000 0x1000>;
+                interrupts = <16 2 1 22>;
+        };
+
+        cpc: l3-cache-controller@10000 {
+                compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+                reg = <0x10000 0x1000
+                       0x11000 0x1000>;
+                interrupts = <16 2 1 27
+                              16 2 1 26>;
+        };
+
+        corenet-cf@18000 {
+                compatible = "fsl,corenet-cf";
+                reg = <0x18000 0x1000>;
+                interrupts = <16 2 1 31>;
+                fsl,ccf-num-csdids = <32>;
+                fsl,ccf-num-snoopids = <32>;
+        };
+
+        iommu@20000 {
+                compatible = "fsl,pamu-v1.0", "fsl,pamu";
+                reg = <0x20000 0x4000>;
+                interrupts = <
+                        24 2 0 0
+                        16 2 1 30>;
+        };
+
+/include/ "qoriq-mpic.dtsi"
+
+        guts: global-utilities@e0000 {
+                compatible = "fsl,qoriq-device-config-1.0";
+                reg = <0xe0000 0xe00>;
+                fsl,has-rstcr;
+                #sleep-cells = <1>;
+                fsl,liodn-bits = <12>;
+        };
+
+        pins: global-utilities@e0e00 {
+                compatible = "fsl,qoriq-pin-control-1.0";
+                reg = <0xe0e00 0x200>;
+                #sleep-cells = <2>;
+        };
+
+        clockgen: global-utilities@e1000 {
+                compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+                reg = <0xe1000 0x1000>;
+                clock-frequency = <0>;
+        };
+
+        rcpm: global-utilities@e2000 {
+                compatible = "fsl,qoriq-rcpm-1.0";
+                reg = <0xe2000 0x1000>;
+                #sleep-cells = <1>;
+        };
+
+        sfp: sfp@e8000 {
+                compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
+                reg        = <0xe8000 0x1000>;
+        };
+
+        serdes: serdes@ea000 {
+                compatible = "fsl,p5020-serdes";
+                reg        = <0xea000 0x1000>;
+        };
+
+/include/ "qoriq-dma-0.dtsi"
+/include/ "qoriq-dma-1.dtsi"
+/include/ "qoriq-espi-0.dtsi"
+        spi@110000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "qoriq-esdhc-0.dtsi"
+        sdhc@114000 {
+                sdhci,auto-cmd12;
+        };
+
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+                usb0: usb@210000 {
+                        phy_type = "utmi";
+                        port0;
+                };
+
+/include/ "qoriq-usb2-dr-0.dtsi"
+                usb1: usb@211000 {
+                        dr_mode = "host";
+                        phy_type = "utmi";
+                };
+
+/include/ "qoriq-sata2-0.dtsi"
+/include/ "qoriq-sata2-1.dtsi"
+/include/ "qoriq-sec4.2-0.dtsi"
+};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
new file mode 100644
index 000000000000..ae823a47584e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi
@@ -0,0 +1,96 @@
+/*
+ * P5020/P5010 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+        compatible = "fsl,P5020";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
+
+        aliases {
+                ccsr = &soc;
+                dcsr = &dcsr;
+
+                serial0 = &serial0;
+                serial1 = &serial1;
+                serial2 = &serial2;
+                serial3 = &serial3;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+                pci3 = &pci3;
+                usb0 = &usb0;
+                usb1 = &usb1;
+                dma0 = &dma0;
+                dma1 = &dma1;
+                sdhc = &sdhc;
+                msi0 = &msi0;
+                msi1 = &msi1;
+                msi2 = &msi2;
+
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu0: PowerPC,e5500@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        next-level-cache = <&L2_0>;
+                        L2_0: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+                cpu1: PowerPC,e5500@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        next-level-cache = <&L2_1>;
+                        L2_1: l2-cache {
+                                next-level-cache = <&cpc>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
new file mode 100644
index 000000000000..b5b37ad30e75
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi
@@ -0,0 +1,66 @@
+/*
+ * PQ3 DMA device tree stub [ controller @ offset 0x21000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma@21300 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,eloplus-dma";
+        reg = <0x21300 0x4>;
+        ranges = <0x0 0x21100 0x200>;
+        cell-index = <0>;
+        dma-channel@0 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x0 0x80>;
+                cell-index = <0>;
+                interrupts = <20 2 0 0>;
+        };
+        dma-channel@80 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x80 0x80>;
+                cell-index = <1>;
+                interrupts = <21 2 0 0>;
+        };
+        dma-channel@100 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x100 0x80>;
+                cell-index = <2>;
+                interrupts = <22 2 0 0>;
+        };
+        dma-channel@180 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x180 0x80>;
+                cell-index = <3>;
+                interrupts = <23 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
new file mode 100644
index 000000000000..28cb8a55d807
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi
@@ -0,0 +1,66 @@
+/*
+ * PQ3 DMA device tree stub [ controller @ offset 0xc300 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma@c300 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,eloplus-dma";
+        reg = <0xc300 0x4>;
+        ranges = <0x0 0xc100 0x200>;
+        cell-index = <1>;
+        dma-channel@0 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x0 0x80>;
+                cell-index = <0>;
+                interrupts = <76 2 0 0>;
+        };
+        dma-channel@80 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x80 0x80>;
+                cell-index = <1>;
+                interrupts = <77 2 0 0>;
+        };
+        dma-channel@100 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x100 0x80>;
+                cell-index = <2>;
+                interrupts = <78 2 0 0>;
+        };
+        dma-channel@180 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x180 0x80>;
+                cell-index = <3>;
+                interrupts = <79 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
new file mode 100644
index 000000000000..5e268fdb9d1f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi
@@ -0,0 +1,51 @@
+/*
+ * PQ3 DUART device tree stub [ controller @ offset 0x4000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+serial0: serial@4500 {
+        cell-index = <0>;
+        device_type = "serial";
+        compatible = "fsl,ns16550", "ns16550";
+        reg = <0x4500 0x100>;
+        clock-frequency = <0>;
+        interrupts = <42 2 0 0>;
+};
+
+serial1: serial@4600 {
+        cell-index = <1>;
+        device_type = "serial";
+        compatible = "fsl,ns16550", "ns16550";
+        reg = <0x4600 0x100>;
+        clock-frequency = <0>;
+        interrupts = <42 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
new file mode 100644
index 000000000000..5743433e278e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+sdhc@2e000 {
+        compatible = "fsl,esdhc";
+        reg = <0x2e000 0x1000>;
+        interrupts = <72 0x2 0 0>;
+        /* Filled in by U-Boot */
+        clock-frequency = <0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
new file mode 100644
index 000000000000..75854b2e0391
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+spi@7000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,mpc8536-espi";
+        reg = <0x7000 0x1000>;
+        interrupts = <59 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
new file mode 100644
index 000000000000..a1979ae334a7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi
@@ -0,0 +1,53 @@
+/*
+ * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ethernet@24000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <0>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "gianfar";
+        reg = <0x24000 0x1000>;
+        ranges = <0x0 0x24000 0x1000>;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+        interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
+};
+
+mdio@24520 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,gianfar-mdio";
+        reg = <0x24520 0x20>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
new file mode 100644
index 000000000000..4c4fdde1ec2a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi
@@ -0,0 +1,53 @@
+/*
+ * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ethernet@25000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <1>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "gianfar";
+        reg = <0x25000 0x1000>;
+        ranges = <0x0 0x25000 0x1000>;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+        interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
+};
+
+mdio@25520 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,gianfar-tbi";
+        reg = <0x25520 0x20>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
new file mode 100644
index 000000000000..4b8ab438668a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi
@@ -0,0 +1,53 @@
+/*
+ * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ethernet@26000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <2>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "gianfar";
+        reg = <0x26000 0x1000>;
+        ranges = <0x0 0x26000 0x1000>;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+        interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
+};
+
+mdio@26520 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,gianfar-tbi";
+        reg = <0x26520 0x20>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
new file mode 100644
index 000000000000..40c9137729ae
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi
@@ -0,0 +1,53 @@
+/*
+ * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ethernet@27000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        cell-index = <3>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "gianfar";
+        reg = <0x27000 0x1000>;
+        ranges = <0x0 0x27000 0x1000>;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+        interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
+};
+
+mdio@27520 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,gianfar-tbi";
+        reg = <0x27520 0x20>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
new file mode 100644
index 000000000000..efe2ca04bce8
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi
@@ -0,0 +1,39 @@
+/*
+ * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ptp_clock@24e00 {
+        compatible = "fsl,etsec-ptp";
+        reg = <0x24e00 0xb0>;
+        interrupts = <68 2 0 0 69 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
new file mode 100644
index 000000000000..1382fec9e8c5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
@@ -0,0 +1,60 @@
+/*
+ * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+mdio@24000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,etsec2-mdio";
+        reg = <0x24000 0x1000 0xb0030 0x4>;
+};
+
+ethernet@b0000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "fsl,etsec2";
+        fsl,num_rx_queues = <0x8>;
+        fsl,num_tx_queues = <0x8>;
+        fsl,magic-packet;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+
+        queue-group@b0000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xb0000 0x1000>;
+                interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
new file mode 100644
index 000000000000..221cd2ea5b31
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
@@ -0,0 +1,60 @@
+/*
+ * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+mdio@25000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,etsec2-tbi";
+        reg = <0x25000 0x1000 0xb1030 0x4>;
+};
+
+ethernet@b1000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "fsl,etsec2";
+        fsl,num_rx_queues = <0x8>;
+        fsl,num_tx_queues = <0x8>;
+        fsl,magic-packet;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+
+        queue-group@b1000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xb1000 0x1000>;
+                interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
new file mode 100644
index 000000000000..61456c317609
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
@@ -0,0 +1,59 @@
+/*
+ * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+mdio@26000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,etsec2-tbi";
+        reg = <0x26000 0x1000 0xb1030 0x4>;
+};
+
+ethernet@b2000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "network";
+        model = "eTSEC";
+        compatible = "fsl,etsec2";
+        fsl,num_rx_queues = <0x8>;
+        fsl,num_tx_queues = <0x8>;
+        fsl,magic-packet;
+        local-mac-address = [ 00 00 00 00 00 00 ];
+
+        queue-group@b2000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xb2000 0x1000>;
+                interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
new file mode 100644
index 000000000000..034ab8fac22f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi
@@ -0,0 +1,42 @@
+/*
+ * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&enet0_grp2 {
+        queue-group@b4000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xb4000 0x1000>;
+                interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
new file mode 100644
index 000000000000..3be9ba3b374e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi
@@ -0,0 +1,42 @@
+/*
+ * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&enet1_grp2 {
+        queue-group@b5000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xb5000 0x1000>;
+                interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
new file mode 100644
index 000000000000..02a33457048c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi
@@ -0,0 +1,42 @@
+/*
+ * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&enet2_grp2 {
+        queue-group@b6000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0xb6000 0x1000>;
+                interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
new file mode 100644
index 000000000000..72a3ef5945c1
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * PQ3 GPIO device tree stub [ controller @ offset 0xf000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+gpio-controller@f000 {
+        #gpio-cells = <2>;
+        compatible = "fsl,pq3-gpio";
+        reg = <0xf000 0x100>;
+        interrupts = <47 0x2 0 0>;
+        gpio-controller;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
new file mode 100644
index 000000000000..d1dd6fb82a78
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi
@@ -0,0 +1,43 @@
+/*
+ * PQ3 I2C device tree stub [ controller @ offset 0x3000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+i2c@3000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <0>;
+        compatible = "fsl-i2c";
+        reg = <0x3000 0x100>;
+        interrupts = <43 2 0 0>;
+        dfsrr;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
new file mode 100644
index 000000000000..a9bd803e2090
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi
@@ -0,0 +1,43 @@
+/*
+ * PQ3 I2C device tree stub [ controller @ offset 0x3100 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+i2c@3100 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <1>;
+        compatible = "fsl-i2c";
+        reg = <0x3100 0x100>;
+        interrupts = <43 2 0 0>;
+        dfsrr;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
new file mode 100644
index 000000000000..8734cffae1a1
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
@@ -0,0 +1,42 @@
+/*
+ * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+timer@42100 {
+        compatible = "fsl,mpic-global-timer";
+        reg = <0x42100 0x100 0x42300 4>;
+        interrupts = <4 0 3 0
+                      5 0 3 0
+                      6 0 3 0
+                      7 0 3 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
new file mode 100644
index 000000000000..5c8046065844
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -0,0 +1,66 @@
+/*
+ * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+mpic: pic@40000 {
+        interrupt-controller;
+        #address-cells = <0>;
+        #interrupt-cells = <4>;
+        reg = <0x40000 0x40000>;
+        compatible = "fsl,mpic";
+        device_type = "open-pic";
+};
+
+timer@41100 {
+        compatible = "fsl,mpic-global-timer";
+        reg = <0x41100 0x100 0x41300 4>;
+        interrupts = <0 0 3 0
+                      1 0 3 0
+                      2 0 3 0
+                      3 0 3 0>;
+};
+
+msi@41600 {
+        compatible = "fsl,mpic-msi";
+        reg = <0x41600 0x80>;
+        msi-available-ranges = <0 0x100>;
+        interrupts = <
+                0xe0 0 0 0
+                0xe1 0 0 0
+                0xe2 0 0 0
+                0xe3 0 0 0
+                0xe4 0 0 0
+                0xe5 0 0 0
+                0xe6 0 0 0
+                0xe7 0 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
new file mode 100644
index 000000000000..587ca9ffad7d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi
@@ -0,0 +1,68 @@
+/*
+ * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+rmu: rmu@d3000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,srio-rmu";
+        reg = <0xd3000 0x500>;
+        ranges = <0x0 0xd3000 0x500>;
+
+        message-unit@0 {
+                compatible = "fsl,srio-msg-unit";
+                reg = <0x0 0x100>;
+                interrupts = <
+                        53 2 0 0 /* msg1_tx_irq */
+                        54 2 0 0>;/* msg1_rx_irq */
+        };
+        message-unit@100 {
+                compatible = "fsl,srio-msg-unit";
+                reg = <0x100 0x100>;
+                interrupts = <
+                        55 2 0 0  /* msg2_tx_irq */
+                        56 2 0 0>;/* msg2_rx_irq */
+        };
+        doorbell-unit@400 {
+                compatible = "fsl,srio-dbell-unit";
+                reg = <0x400 0x80>;
+                interrupts = <
+                        49 2 0 0  /* bell_outb_irq */
+                        50 2 0 0>;/* bell_inb_irq */
+        };
+        port-write-unit@4e0 {
+                compatible = "fsl,srio-port-write-unit";
+                reg = <0x4e0 0x20>;
+                interrupts = <48 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
new file mode 100644
index 000000000000..3c28dd08d38b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi
@@ -0,0 +1,40 @@
+/*
+ * PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+sata@18000 {
+        compatible = "fsl,pq-sata-v2";
+        reg = <0x18000 0x1000>;
+        cell-index = <1>;
+        interrupts = <74 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
new file mode 100644
index 000000000000..eefaf2855e3b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi
@@ -0,0 +1,40 @@
+/*
+ * PQ3 SATAv2 device tree stub [ controller @ offset 0x19000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+sata@19000 {
+        compatible = "fsl,pq-sata-v2";
+        reg = <0x19000 0x1000>;
+        cell-index = <2>;
+        interrupts = <41 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
new file mode 100644
index 000000000000..02a5c7ae72d0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi
@@ -0,0 +1,43 @@
+/*
+ * PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto@30000 {
+        compatible = "fsl,sec2.1", "fsl,sec2.0";
+        reg = <0x30000 0x10000>;
+        interrupts = <45 2 0 0>;
+        fsl,num-channels = <4>;
+        fsl,channel-fifo-len = <24>;
+        fsl,exec-units-mask = <0xfe>;
+        fsl,descriptor-types-mask = <0x12b0ebf>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
new file mode 100644
index 000000000000..bba1ba44ccf0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi
@@ -0,0 +1,45 @@
+/*
+ * PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto@30000 {
+        compatible = "fsl,sec3.0",
+                     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
+                     "fsl,sec2.0";
+        reg = <0x30000 0x10000>;
+        interrupts = <45 2 0 0 58 2 0 0>;
+        fsl,num-channels = <4>;
+        fsl,channel-fifo-len = <24>;
+        fsl,exec-units-mask = <0x9fe>;
+        fsl,descriptor-types-mask = <0x3ab0ebf>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
new file mode 100644
index 000000000000..8f0a5669bee5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi
@@ -0,0 +1,45 @@
+/*
+ * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto@30000 {
+        compatible = "fsl,sec3.1", "fsl,sec3.0",
+                     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
+                     "fsl,sec2.0";
+        reg = <0x30000 0x10000>;
+        interrupts = <45 2 0 0 58 2 0 0>;
+        fsl,num-channels = <4>;
+        fsl,channel-fifo-len = <24>;
+        fsl,exec-units-mask = <0xbfe>;
+        fsl,descriptor-types-mask = <0x3ab0ebf>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
new file mode 100644
index 000000000000..c227f2748a24
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi
@@ -0,0 +1,45 @@
+/*
+ * PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto@30000 {
+        compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
+                     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
+                     "fsl,sec2.0";
+        reg = <0x30000 0x10000>;
+        interrupts = <45 2 0 0 58 2 0 0>;
+        fsl,num-channels = <4>;
+        fsl,channel-fifo-len = <24>;
+        fsl,exec-units-mask = <0x97c>;
+        fsl,descriptor-types-mask = <0x3a30abf>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
new file mode 100644
index 000000000000..bf957a7fca2a
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
@@ -0,0 +1,65 @@
+/*
+ * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto@30000 {
+        compatible = "fsl,sec4.4", "fsl,sec4.0";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg              = <0x30000 0x10000>;
+        interrupts       = <58 2 0 0>;
+
+        sec_jr0: jr@1000 {
+                compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+                reg        = <0x1000 0x1000>;
+                interrupts       = <45 2 0 0>;
+        };
+
+        sec_jr1: jr@2000 {
+                compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+                reg        = <0x2000 0x1000>;
+                interrupts       = <45 2 0 0>;
+        };
+
+        sec_jr2: jr@3000 {
+                compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+                reg        = <0x3000 0x1000>;
+                interrupts       = <45 2 0 0>;
+        };
+
+        sec_jr3: jr@4000 {
+                compatible = "fsl,sec4.4-job-ring", "fsl,sec4.0-job-ring";
+                reg        = <0x4000 0x1000>;
+                interrupts       = <45 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
new file mode 100644
index 000000000000..185ab9dc3ecd
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * PQ3 USB DR device tree stub [ controller @ offset 0x22000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+usb@22000 {
+        compatible = "fsl-usb2-dr";
+        reg = <0x22000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <28 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
new file mode 100644
index 000000000000..fe24cd612fff
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi
@@ -0,0 +1,41 @@
+/*
+ * PQ3 USB DR device tree stub [ controller @ offset 0x23000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+usb@23000 {
+        compatible = "fsl-usb2-dr";
+        reg = <0x23000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <46 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
new file mode 100644
index 000000000000..1aebf3ea4ca5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi
@@ -0,0 +1,66 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,eloplus-dma";
+        reg = <0x100300 0x4>;
+        ranges = <0x0 0x100100 0x200>;
+        cell-index = <0>;
+        dma-channel@0 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x0 0x80>;
+                cell-index = <0>;
+                interrupts = <28 2 0 0>;
+        };
+        dma-channel@80 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x80 0x80>;
+                cell-index = <1>;
+                interrupts = <29 2 0 0>;
+        };
+        dma-channel@100 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x100 0x80>;
+                cell-index = <2>;
+                interrupts = <30 2 0 0>;
+        };
+        dma-channel@180 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x180 0x80>;
+                cell-index = <3>;
+                interrupts = <31 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
new file mode 100644
index 000000000000..ecf5e180fe79
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi
@@ -0,0 +1,66 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma1: dma@101300 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,eloplus-dma";
+        reg = <0x101300 0x4>;
+        ranges = <0x0 0x101100 0x200>;
+        cell-index = <1>;
+        dma-channel@0 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x0 0x80>;
+                cell-index = <0>;
+                interrupts = <32 2 0 0>;
+        };
+        dma-channel@80 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x80 0x80>;
+                cell-index = <1>;
+                interrupts = <33 2 0 0>;
+        };
+        dma-channel@100 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x100 0x80>;
+                cell-index = <2>;
+                interrupts = <34 2 0 0>;
+        };
+        dma-channel@180 {
+                compatible = "fsl,eloplus-dma-channel";
+                reg = <0x180 0x80>;
+                cell-index = <3>;
+                interrupts = <35 2 0 0>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
new file mode 100644
index 000000000000..225c07b4e8ab
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi
@@ -0,0 +1,51 @@
+/*
+ * QorIQ DUART device tree stub [ controller @ offset 0x11c000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+serial0: serial@11c500 {
+        cell-index = <0>;
+        device_type = "serial";
+        compatible = "fsl,ns16550", "ns16550";
+        reg = <0x11c500 0x100>;
+        clock-frequency = <0>;
+        interrupts = <36 2 0 0>;
+};
+
+serial1: serial@11c600 {
+        cell-index = <1>;
+        device_type = "serial";
+        compatible = "fsl,ns16550", "ns16550";
+        reg = <0x11c600 0x100>;
+        clock-frequency = <0>;
+        interrupts = <36 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
new file mode 100644
index 000000000000..d23233a56b91
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi
@@ -0,0 +1,51 @@
+/*
+ * QorIQ DUART device tree stub [ controller @ offset 0x11d000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+serial2: serial@11d500 {
+        cell-index = <2>;
+        device_type = "serial";
+        compatible = "fsl,ns16550", "ns16550";
+        reg = <0x11d500 0x100>;
+        clock-frequency = <0>;
+        interrupts = <37 2 0 0>;
+};
+
+serial3: serial@11d600 {
+        cell-index = <3>;
+        device_type = "serial";
+        compatible = "fsl,ns16550", "ns16550";
+        reg = <0x11d600 0x100>;
+        clock-frequency = <0>;
+        interrupts = <37 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
new file mode 100644
index 000000000000..20835ae216c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi
@@ -0,0 +1,40 @@
+/*
+ * QorIQ eSDHC device tree stub [ controller @ offset 0x114000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+sdhc: sdhc@114000 {
+        compatible = "fsl,esdhc";
+        reg = <0x114000 0x1000>;
+        interrupts = <48 2 0 0>;
+        clock-frequency = <0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
new file mode 100644
index 000000000000..6db06975e095
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * QorIQ eSPI device tree stub [ controller @ offset 0x110000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+spi@110000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "fsl,mpc8536-espi";
+        reg = <0x110000 0x1000>;
+        interrupts = <53 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
new file mode 100644
index 000000000000..cf714f5f68bc
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * QorIQ GPIO device tree stub [ controller @ offset 0x130000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+gpio0: gpio@130000 {
+        compatible = "fsl,qoriq-gpio";
+        reg = <0x130000 0x1000>;
+        interrupts = <55 2 0 0>;
+        #gpio-cells = <2>;
+        gpio-controller;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
new file mode 100644
index 000000000000..5f9bf7debe4c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi
@@ -0,0 +1,53 @@
+/*
+ * QorIQ I2C device tree stub [ controller @ offset 0x118000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+i2c@118000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <0>;
+        compatible = "fsl-i2c";
+        reg = <0x118000 0x100>;
+        interrupts = <38 2 0 0>;
+        dfsrr;
+};
+
+i2c@118100 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <1>;
+        compatible = "fsl-i2c";
+        reg = <0x118100 0x100>;
+        interrupts = <38 2 0 0>;
+        dfsrr;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
new file mode 100644
index 000000000000..7989bf5eeb53
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi
@@ -0,0 +1,53 @@
+/*
+ * QorIQ I2C device tree stub [ controller @ offset 0x119000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+i2c@119000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <2>;
+        compatible = "fsl-i2c";
+        reg = <0x119000 0x100>;
+        interrupts = <39 2 0 0>;
+        dfsrr;
+};
+
+i2c@119100 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        cell-index = <3>;
+        compatible = "fsl-i2c";
+        reg = <0x119100 0x100>;
+        interrupts = <39 2 0 0>;
+        dfsrr;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
new file mode 100644
index 000000000000..b9bada6a87dc
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
@@ -0,0 +1,106 @@
+/*
+ * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+mpic: pic@40000 {
+        interrupt-controller;
+        #address-cells = <0>;
+        #interrupt-cells = <4>;
+        reg = <0x40000 0x40000>;
+        compatible = "fsl,mpic", "chrp,open-pic";
+        device_type = "open-pic";
+        clock-frequency = <0x0>;
+};
+
+timer@41100 {
+        compatible = "fsl,mpic-global-timer";
+        reg = <0x41100 0x100 0x41300 4>;
+        interrupts = <0 0 3 0
+                      1 0 3 0
+                      2 0 3 0
+                      3 0 3 0>;
+};
+
+msi0: msi@41600 {
+        compatible = "fsl,mpic-msi";
+        reg = <0x41600 0x200>;
+        msi-available-ranges = <0 0x100>;
+        interrupts = <
+                0xe0 0 0 0
+                0xe1 0 0 0
+                0xe2 0 0 0
+                0xe3 0 0 0
+                0xe4 0 0 0
+                0xe5 0 0 0
+                0xe6 0 0 0
+                0xe7 0 0 0>;
+};
+
+msi1: msi@41800 {
+        compatible = "fsl,mpic-msi";
+        reg = <0x41800 0x200>;
+        msi-available-ranges = <0 0x100>;
+        interrupts = <
+                0xe8 0 0 0
+                0xe9 0 0 0
+                0xea 0 0 0
+                0xeb 0 0 0
+                0xec 0 0 0
+                0xed 0 0 0
+                0xee 0 0 0
+                0xef 0 0 0>;
+};
+
+msi2: msi@41a00 {
+        compatible = "fsl,mpic-msi";
+        reg = <0x41a00 0x200>;
+        msi-available-ranges = <0 0x100>;
+        interrupts = <
+                0xf0 0 0 0
+                0xf1 0 0 0
+                0xf2 0 0 0
+                0xf3 0 0 0
+                0xf4 0 0 0
+                0xf5 0 0 0
+                0xf6 0 0 0
+                0xf7 0 0 0>;
+};
+
+timer@42100 {
+        compatible = "fsl,mpic-global-timer";
+        reg = <0x42100 0x100 0x42300 4>;
+        interrupts = <4 0 3 0
+                      5 0 3 0
+                      6 0 3 0
+                      7 0 3 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
new file mode 100644
index 000000000000..ca7fec792e53
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi
@@ -0,0 +1,68 @@
+/*
+ * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+rmu: rmu@d3000 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "fsl,srio-rmu";
+        reg = <0xd3000 0x500>;
+        ranges = <0x0 0xd3000 0x500>;
+
+        message-unit@0 {
+                compatible = "fsl,srio-msg-unit";
+                reg = <0x0 0x100>;
+                interrupts = <
+                        60 2 0 0  /* msg1_tx_irq */
+                        61 2 0 0>;/* msg1_rx_irq */
+        };
+        message-unit@100 {
+                compatible = "fsl,srio-msg-unit";
+                reg = <0x100 0x100>;
+                interrupts = <
+                        62 2 0 0  /* msg2_tx_irq */
+                        63 2 0 0>;/* msg2_rx_irq */
+        };
+        doorbell-unit@400 {
+                compatible = "fsl,srio-dbell-unit";
+                reg = <0x400 0x80>;
+                interrupts = <
+                        56 2 0 0  /* bell_outb_irq */
+                        57 2 0 0>;/* bell_inb_irq */
+        };
+        port-write-unit@4e0 {
+                compatible = "fsl,srio-port-write-unit";
+                reg = <0x4e0 0x20>;
+                interrupts = <16 2 1 11>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
new file mode 100644
index 000000000000..b642047fdecf
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi
@@ -0,0 +1,39 @@
+/*
+ * QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+sata@220000 {
+        compatible = "fsl,pq-sata-v2";
+        reg = <0x220000 0x1000>;
+        interrupts = <68 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
new file mode 100644
index 000000000000..c57370259750
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi
@@ -0,0 +1,39 @@
+/*
+ * QorIQ SATAv2 device tree stub [ controller @ offset 0x221000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+sata@221000 {
+        compatible = "fsl,pq-sata-v2";
+        reg = <0x221000 0x1000>;
+        interrupts = <69 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
new file mode 100644
index 000000000000..0cbbac329539
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
@@ -0,0 +1,100 @@
+/*
+ * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto: crypto@300000 {
+        compatible = "fsl,sec-v4.0";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0x300000 0x10000>;
+        ranges = <0 0x300000 0x10000>;
+        interrupts = <92 2 0 0>;
+
+        sec_jr0: jr@1000 {
+                compatible = "fsl,sec-v4.0-job-ring";
+                reg = <0x1000 0x1000>;
+                interrupts = <88 2 0 0>;
+        };
+
+        sec_jr1: jr@2000 {
+                compatible = "fsl,sec-v4.0-job-ring";
+                reg = <0x2000 0x1000>;
+                interrupts = <89 2 0 0>;
+        };
+
+        sec_jr2: jr@3000 {
+                compatible = "fsl,sec-v4.0-job-ring";
+                reg = <0x3000 0x1000>;
+                interrupts = <90 2 0 0>;
+        };
+
+        sec_jr3: jr@4000 {
+                compatible = "fsl,sec-v4.0-job-ring";
+                reg = <0x4000 0x1000>;
+                interrupts = <91 2 0 0>;
+        };
+
+        rtic@6000 {
+                compatible = "fsl,sec-v4.0-rtic";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x6000 0x100>;
+                ranges = <0x0 0x6100 0xe00>;
+
+                rtic_a: rtic-a@0 {
+                        compatible = "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x00 0x20 0x100 0x80>;
+                };
+
+                rtic_b: rtic-b@20 {
+                        compatible = "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x20 0x20 0x200 0x80>;
+                };
+
+                rtic_c: rtic-c@40 {
+                        compatible = "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x40 0x20 0x300 0x80>;
+                };
+
+                rtic_d: rtic-d@60 {
+                        compatible = "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x60 0x20 0x500 0x80>;
+                };
+        };
+};
+
+sec_mon: sec_mon@314000 {
+        compatible = "fsl,sec-v4.0-mon";
+        reg = <0x314000 0x1000>;
+        interrupts = <93 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
new file mode 100644
index 000000000000..3308986bba0d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
@@ -0,0 +1,109 @@
+/*
+ * QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto: crypto@300000 {
+        compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg              = <0x300000 0x10000>;
+        ranges           = <0 0x300000 0x10000>;
+        interrupts       = <92 2 0 0>;
+
+        sec_jr0: jr@1000 {
+                compatible = "fsl,sec-v4.1-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x1000 0x1000>;
+                interrupts = <88 2 0 0>;
+        };
+
+        sec_jr1: jr@2000 {
+                compatible = "fsl,sec-v4.1-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x2000 0x1000>;
+                interrupts = <89 2 0 0>;
+        };
+
+        sec_jr2: jr@3000 {
+                compatible = "fsl,sec-v4.1-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x3000 0x1000>;
+                interrupts = <90 2 0 0>;
+        };
+
+        sec_jr3: jr@4000 {
+                compatible = "fsl,sec-v4.1-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x4000 0x1000>;
+                interrupts = <91 2 0 0>;
+        };
+
+        rtic@6000 {
+                compatible = "fsl,sec-v4.1-rtic",
+                             "fsl,sec-v4.0-rtic";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x6000 0x100>;
+                ranges = <0x0 0x6100 0xe00>;
+
+                rtic_a: rtic-a@0 {
+                        compatible = "fsl,sec-v4.1-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x00 0x20 0x100 0x80>;
+                };
+
+                rtic_b: rtic-b@20 {
+                        compatible = "fsl,sec-v4.1-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x20 0x20 0x200 0x80>;
+                };
+
+                rtic_c: rtic-c@40 {
+                        compatible = "fsl,sec-v4.1-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x40 0x20 0x300 0x80>;
+                };
+
+                rtic_d: rtic-d@60 {
+                        compatible = "fsl,sec-v4.1-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x60 0x20 0x500 0x80>;
+                };
+        };
+};
+
+sec_mon: sec_mon@314000 {
+        compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
+        reg = <0x314000 0x1000>;
+        interrupts = <93 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
new file mode 100644
index 000000000000..7990e0d3d6f2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
@@ -0,0 +1,109 @@
+/*
+ * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+crypto: crypto@300000 {
+        compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg              = <0x300000 0x10000>;
+        ranges           = <0 0x300000 0x10000>;
+        interrupts       = <92 2 0 0>;
+
+        sec_jr0: jr@1000 {
+                compatible = "fsl,sec-v4.2-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x1000 0x1000>;
+                interrupts = <88 2 0 0>;
+        };
+
+        sec_jr1: jr@2000 {
+                compatible = "fsl,sec-v4.2-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x2000 0x1000>;
+                interrupts = <89 2 0 0>;
+        };
+
+        sec_jr2: jr@3000 {
+                compatible = "fsl,sec-v4.2-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x3000 0x1000>;
+                interrupts = <90 2 0 0>;
+        };
+
+        sec_jr3: jr@4000 {
+                compatible = "fsl,sec-v4.2-job-ring",
+                             "fsl,sec-v4.0-job-ring";
+                reg = <0x4000 0x1000>;
+                interrupts = <91 2 0 0>;
+        };
+
+        rtic@6000 {
+                compatible = "fsl,sec-v4.2-rtic",
+                             "fsl,sec-v4.0-rtic";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                reg = <0x6000 0x100>;
+                ranges = <0x0 0x6100 0xe00>;
+
+                rtic_a: rtic-a@0 {
+                        compatible = "fsl,sec-v4.2-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x00 0x20 0x100 0x80>;
+                };
+
+                rtic_b: rtic-b@20 {
+                        compatible = "fsl,sec-v4.2-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x20 0x20 0x200 0x80>;
+                };
+
+                rtic_c: rtic-c@40 {
+                        compatible = "fsl,sec-v4.2-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x40 0x20 0x300 0x80>;
+                };
+
+                rtic_d: rtic-d@60 {
+                        compatible = "fsl,sec-v4.2-rtic-memory",
+                                     "fsl,sec-v4.0-rtic-memory";
+                        reg = <0x60 0x20 0x500 0x80>;
+                };
+        };
+};
+
+sec_mon: sec_mon@314000 {
+        compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
+        reg = <0x314000 0x1000>;
+        interrupts = <93 2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
new file mode 100644
index 000000000000..4dd6f84c239c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * QorIQ USB DR device tree stub [ controller @ offset 0x211000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+usb@211000 {
+        compatible = "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+        reg = <0x211000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <45 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
new file mode 100644
index 000000000000..f053835aa1c7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi
@@ -0,0 +1,41 @@
+/*
+ * QorIQ USB Host device tree stub [ controller @ offset 0x210000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+usb@210000 {
+        compatible = "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+        reg = <0x210000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <44 0x2 0 0>;
+};
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 2266bbb303d0..38dcb96c8e26 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -339,7 +339,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <0x2a 0x2>;
@@ -349,7 +349,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <0x1c 0x2>;
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 429e87d9acef..5ab8932d09b7 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -337,7 +337,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <0x2a 0x2>;
@@ -347,7 +347,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <0x1c 0x2>;
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index d81201ac2cad..d5341f5741aa 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -337,7 +337,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <0x2a 0x2>;
@@ -347,7 +347,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <0x1c 0x2>;
diff --git a/arch/powerpc/boot/dts/klondike.dts b/arch/powerpc/boot/dts/klondike.dts
new file mode 100644
index 000000000000..8c9429033618
--- /dev/null
+++ b/arch/powerpc/boot/dts/klondike.dts
@@ -0,0 +1,227 @@
+/*
+ * Device Tree for Klondike (APM8018X) board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tanmay Inamdar <tinamdar@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/dts-v1/;
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        model = "apm,klondike";
+        compatible = "apm,klondike";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                ethernet0 = &EMAC0;
+                ethernet1 = &EMAC1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,apm8018x";
+                        reg = <0x00000000>;
+                        clock-frequency = <300000000>; /* Filled in by U-Boot */
+                        timebase-frequency = <300000000>; /* Filled in by U-Boot */
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <16384>; /* 16 kB */
+                        d-cache-size = <16384>; /* 16 kB */
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
+        };
+
+        UIC0: interrupt-controller {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0x0c0 0x010>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0x0d0 0x010>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        UIC2: interrupt-controller2 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <2>;
+                dcr-reg = <0x0e0 0x010>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        UIC3: interrupt-controller3 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <3>;
+                dcr-reg = <0x0f0 0x010>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        plb {
+                compatible = "ibm,plb4";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by U-Boot */
+
+                SDRAM0: memory-controller {
+                        compatible = "ibm,sdram-apm8018x";
+                        dcr-reg = <0x010 0x002>;
+                };
+
+                MAL0: mcmal {
+                        compatible = "ibm,mcmal2";
+                        dcr-reg = <0x180 0x062>;
+                        num-tx-chans = <2>;
+                        num-rx-chans = <16>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-parent = <&UIC1>;
+                        interrupts = </*TXEOB*/   0x6 0x4
+                                        /*RXEOB*/ 0x7 0x4
+                                        /*SERR*/  0x1 0x4
+                                        /*TXDE*/  0x2 0x4
+                                        /*RXDE*/  0x3 0x4>;
+                };
+
+                POB0: opb {
+                        compatible = "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0x20000000 0x20000000 0x30000000
+                                  0x50000000 0x50000000 0x10000000
+                                  0x60000000 0x60000000 0x10000000
+                                  0xFE000000 0xFE000000 0x00010000>;
+                        dcr-reg = <0x100 0x020>;
+                        clock-frequency = <300000000>; /* Filled in by U-Boot */
+
+                        RGMII0: emac-rgmii@400a2000 {
+                                compatible = "ibm,rgmii";
+                                reg = <0x400a2000 0x00000010>;
+                                has-mdio;
+                        };
+
+                        TAH0: emac-tah@400a3000 {
+                                compatible = "ibm,tah";
+                                reg = <0x400a3000 0x100>;
+                        };
+
+                        TAH1: emac-tah@400a4000 {
+                                compatible = "ibm,tah";
+                                reg = <0x400a4000 0x100>;
+                        };
+
+                        EMAC0: ethernet@400a0000 {
+                                compatible = "ibm,emac4", "ibm-emac4sync";
+                                interrupt-parent = <&EMAC0>;
+                                interrupts = <0x0>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>;
+                                reg = <0x400a0000 0x00000100>;
+                                local-mac-address = [000000000000]; /* Filled in by U-Boot */
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <0x0>;
+                                mal-rx-channel = <0x0>;
+                                cell-index = <0>;
+                                max-frame-size = <9000>;
+                                rx-fifo-size = <4096>;
+                                tx-fifo-size = <2048>;
+                                phy-mode = "rgmii";
+                                phy-address = <0x2>;
+                                turbo = "no";
+                                phy-map = <0x00000000>;
+                                rgmii-device = <&RGMII0>;
+                                rgmii-channel = <0>;
+                                tah-device = <&TAH0>;
+                                tah-channel = <0>;
+                                has-inverted-stacr-oc;
+                                has-new-stacr-staopc;
+                        };
+
+                        EMAC1: ethernet@400a1000 {
+                                compatible = "ibm,emac4", "ibm-emac4sync";
+                                status = "disabled";
+                                interrupt-parent = <&EMAC1>;
+                                interrupts = <0x0>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>;
+                                reg = <0x400a1000 0x00000100>;
+                                local-mac-address = [000000000000]; /* Filled in by U-Boot */
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <1>;
+                                mal-rx-channel = <8>;
+                                cell-index = <1>;
+                                max-frame-size = <9000>;
+                                rx-fifo-size = <4096>;
+                                tx-fifo-size = <2048>;
+                                phy-mode = "rgmii";
+                                phy-address = <0x3>;
+                                turbo = "no";
+                                phy-map = <0x00000000>;
+                                rgmii-device = <&RGMII0>;
+                                rgmii-channel = <1>;
+                                tah-device = <&TAH1>;
+                                tah-channel = <0>;
+                                has-inverted-stacr-oc;
+                                has-new-stacr-staopc;
+                                mdio-device = <&EMAC0>;
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@50001000";
+        };
+};
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
index d16bae1230f7..983aee185793 100644
--- a/arch/powerpc/boot/dts/kmeter1.dts
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -80,7 +80,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <264000000>;
                         interrupts = <9 0x8>;
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 8d725d10882f..0a4545159e80 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -84,7 +84,7 @@ XXXX add flash parts, rtc, ??
                 serial0: serial@80004500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x80004500 0x8>;
                         clock-frequency = <97553800>;
                         current-speed = <9600>;
@@ -95,7 +95,7 @@ XXXX add flash parts, rtc, ??
                 serial1: serial@80004600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x80004600 0x8>;
                         clock-frequency = <97553800>;
                         current-speed = <57600>;
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index b13a11eb81b0..0e758b347cdb 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -84,7 +84,7 @@ XXXX add flash parts, rtc, ??
                 serial0: serial@80004500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x80004500 0x8>;
                         clock-frequency = <130041000>;
                         current-speed = <9600>;
@@ -95,7 +95,7 @@ XXXX add flash parts, rtc, ??
                 serial1: serial@80004600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x80004600 0x8>;
                         clock-frequency = <130041000>;
                         current-speed = <57600>;
diff --git a/arch/powerpc/boot/dts/mpc8308_p1m.dts b/arch/powerpc/boot/dts/mpc8308_p1m.dts
index 697b3f6b78bf..22b0832b6c31 100644
--- a/arch/powerpc/boot/dts/mpc8308_p1m.dts
+++ b/arch/powerpc/boot/dts/mpc8308_p1m.dts
@@ -233,7 +233,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <133333333>;
                         interrupts = <9 0x8>;
@@ -243,7 +243,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <133333333>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts
index a0bd1881081e..f66d10d95a8d 100644
--- a/arch/powerpc/boot/dts/mpc8308rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8308rdb.dts
@@ -208,7 +208,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <133333333>;
                         interrupts = <9 0x8>;
@@ -218,7 +218,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <133333333>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index ac1eb320c7b4..1c836c6c5be6 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -261,7 +261,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -271,7 +271,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 4dd08c322979..811848e93aef 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -265,7 +265,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <133333333>;
                         interrupts = <9 0x8>;
@@ -275,7 +275,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <133333333>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 05ad8c98e527..da9c72ddc343 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -105,7 +105,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -115,7 +115,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index f4fadb23ad6f..ff7b15b340a3 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -83,7 +83,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -93,7 +93,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 505dc842d808..2608679d0d4a 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -283,7 +283,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;          // from bootloader
                         interrupts = <9 0x8>;
@@ -293,7 +293,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;          // from bootloader
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index eb732115f016..6cd044d8fb89 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -189,7 +189,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;          // from bootloader
                         interrupts = <9 0x8>;
@@ -199,7 +199,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;          // from bootloader
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 230febb9b72f..4552864082c2 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -242,7 +242,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -252,7 +252,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 45cfa1c50a2a..c0e450a551bf 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -136,7 +136,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <264000000>;
                         interrupts = <9 0x8>;
@@ -146,7 +146,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <264000000>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index bdf4459677b1..b6e9aec1d860 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -102,7 +102,7 @@
 
                 serial0: serial@4500 {
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         interrupts = <9 8>;
                         interrupt-parent = <&ipic>;
@@ -112,7 +112,7 @@
 
                 serial1: serial@4600 {
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         interrupts = <10 8>;
                         interrupt-parent = <&ipic>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 855782c5e5ec..cfccef57cd1d 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -276,7 +276,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -286,7 +286,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index dbc1b988b29d..353deff1b7f6 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -321,7 +321,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -331,7 +331,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8377_wlan.dts b/arch/powerpc/boot/dts/mpc8377_wlan.dts
index 9ea783056969..ef4a305a0d0c 100644
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -304,7 +304,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -314,7 +314,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index f70cf6000839..538fcb927337 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -315,7 +315,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -325,7 +325,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 3447eb9f6e88..32333a908f3d 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -321,7 +321,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -331,7 +331,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 645ec51cc6e1..5387092fdfb4 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -313,7 +313,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -323,7 +323,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 15560c619b04..46224c2430ff 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -319,7 +319,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -329,7 +329,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index a75c10eed269..c15881574fdc 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -9,24 +9,11 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8536si-pre.dtsi"
 
 / {
         model = "fsl,mpc8536ds";
         compatible = "fsl,mpc8536ds";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                pci3 = &pci3;
-        };
 
         cpus {
                 #cpus = <1>;
@@ -45,403 +32,34 @@
                 reg = <0 0 0 0>;        // Filled by U-Boot
         };
 
-        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x0 0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8536-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8536-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 0x2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8536-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 0x2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 0x2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 0x2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                        rtc@68 {
-                                compatible = "dallas,ds3232";
-                                reg = <0x68>;
-                                interrupts = <0 0x1>;
-                                interrupt-parent = <&mpic>;
-                        };
-                };
-
-                spi@7000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc8536-espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,espi-num-chipselects = <4>;
-
-                        flash@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "spansion,s25sl12801";
-                                reg = <0>;
-                                spi-max-frequency = <40000000>;
-                                partition@u-boot {
-                                        label = "u-boot";
-                                        reg = <0x00000000 0x00100000>;
-                                        read-only;
-                                };
-                                partition@kernel {
-                                        label = "kernel";
-                                        reg = <0x00100000 0x00500000>;
-                                        read-only;
-                                };
-                                partition@dtb {
-                                        label = "dtb";
-                                        reg = <0x00600000 0x00100000>;
-                                        read-only;
-                                };
-                                partition@fs {
-                                        label = "file system";
-                                        reg = <0x00700000 0x00900000>;
-                                };
-                        };
-                        flash@1 {
-                                compatible = "spansion,s25sl12801";
-                                reg = <1>;
-                                spi-max-frequency = <40000000>;
-                        };
-                        flash@2 {
-                                compatible = "spansion,s25sl12801";
-                                reg = <2>;
-                                spi-max-frequency = <40000000>;
-                        };
-                        flash@3 {
-                                compatible = "spansion,s25sl12801";
-                                reg = <3>;
-                                spi-max-frequency = <40000000>;
-                        };
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 4>;
-                        ranges = <0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                usb@22000 {
-                        compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x22000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
-                        phy_type = "ulpi";
-                };
-
-                usb@23000 {
-                        compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x23000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <46 0x2>;
-                        phy_type = "ulpi";
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 0x1>;
-                                        reg = <0>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 0x1>;
-                                        reg = <1>;
-                                        device_type = "ethernet-phy";
-                                };
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet1: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi1>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                usb@2b000 {
-                        compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x2b000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <60 0x2>;
-                        dr_mode = "peripheral";
-                        phy_type = "ulpi";
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        clock-frequency = <250000000>;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
-                                     "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x9fe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                sata@18000 {
-                        compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
-                        reg = <0x18000 0x1000>;
-                        cell-index = <1>;
-                        interrupts = <74 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                sata@19000 {
-                        compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
-                        reg = <0x19000 0x1000>;
-                        cell-index = <2>;
-                        interrupts = <41 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8548-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        big-endian;
-                };
+        lbc: localbus@ffe05000 {
+                reg = <0 0xffe05000 0 0x1000>;
+        };
 
-                msi@41600 {
-                        compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
+        board_soc: soc: soc@ffe00000 {
+                ranges = <0x0 0 0xffe00000 0x100000>;
         };
 
         pci0: pci@ffe08000 {
-                compatible = "fsl,mpc8540-pci";
-                device_type = "pci";
+                reg = <0 0xffe08000 0 0x1000>;
+                ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
+                          0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
+                clock-frequency = <66666666>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
 
                         /* IDSEL 0x11 J17 Slot 1 */
-                        0x8800 0 0 1 &mpic 1 1
-                        0x8800 0 0 2 &mpic 2 1
-                        0x8800 0 0 3 &mpic 3 1
-                        0x8800 0 0 4 &mpic 4 1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <24 0x2>;
-                bus-range = <0 0xff>;
-                ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
-                          0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
-                clock-frequency = <66666666>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe08000 0 0x1000>;
+                        0x8800 0 0 1 &mpic 1 1 0 0
+                        0x8800 0 0 2 &mpic 2 1 0 0
+                        0x8800 0 0 3 &mpic 3 1 0 0
+                        0x8800 0 0 4 &mpic 4 1 0 0>;
         };
 
         pci1: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 0xff>;
                 ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
                           0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 0x2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 4 1
-                        0000 0 0 2 &mpic 5 1
-                        0000 0 0 3 &mpic 6 1
-                        0000 0 0 4 &mpic 7 1
-                        >;
                 pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x02000000 0 0x98000000
                                   0x02000000 0 0x98000000
                                   0 0x08000000
@@ -453,31 +71,10 @@
         };
 
         pci2: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 0xff>;
                 ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
                           0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 0x2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 0 1
-                        0000 0 0 2 &mpic 1 1
-                        0000 0 0 3 &mpic 2 1
-                        0000 0 0 4 &mpic 3 1
-                        >;
                 pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x02000000 0 0x90000000
                                   0x02000000 0 0x90000000
                                   0 0x08000000
@@ -489,32 +86,10 @@
         };
 
         pci3: pcie@ffe0b000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe0b000 0 0x1000>;
-                bus-range = <0 0xff>;
                 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
                           0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <27 0x2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 8 1
-                        0000 0 0 2 &mpic 9 1
-                        0000 0 0 3 &mpic 10 1
-                        0000 0 0 4 &mpic 11 1
-                        >;
-
                 pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x02000000 0 0xa0000000
                                   0x02000000 0 0xa0000000
                                   0 0x20000000
@@ -525,3 +100,6 @@
                 };
         };
 };
+
+/include/ "fsl/mpc8536si-post.dtsi"
+/include/ "mpc8536ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/mpc8536ds.dtsi
new file mode 100644
index 000000000000..1462e4cf49d7
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8536ds.dtsi
@@ -0,0 +1,141 @@
+/*
+ * MPC8536DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_soc {
+        i2c@3100 {
+                rtc@68 {
+                        compatible = "dallas,ds3232";
+                        reg = <0x68>;
+                        interrupts = <0 0x1 0 0>;
+                };
+        };
+
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,s25sl12801";
+                        reg = <0>;
+                        spi-max-frequency = <40000000>;
+                        partition@u-boot {
+                                label = "u-boot";
+                                reg = <0x00000000 0x00100000>;
+                                read-only;
+                        };
+                        partition@kernel {
+                                label = "kernel";
+                                reg = <0x00100000 0x00500000>;
+                                read-only;
+                        };
+                        partition@dtb {
+                                label = "dtb";
+                                reg = <0x00600000 0x00100000>;
+                                read-only;
+                        };
+                        partition@fs {
+                                label = "file system";
+                                reg = <0x00700000 0x00900000>;
+                        };
+                };
+                flash@1 {
+                        compatible = "spansion,s25sl12801";
+                        reg = <1>;
+                        spi-max-frequency = <40000000>;
+                };
+                flash@2 {
+                        compatible = "spansion,s25sl12801";
+                        reg = <2>;
+                        spi-max-frequency = <40000000>;
+                };
+                flash@3 {
+                        compatible = "spansion,s25sl12801";
+                        reg = <3>;
+                        spi-max-frequency = <40000000>;
+                };
+        };
+
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+
+        usb@23000 {
+                phy_type = "ulpi";
+        };
+
+        enet0: ethernet@24000 {
+                tbi-handle = <&tbi0>;
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <10 0x1 0 0>;
+                        reg = <0>;
+                        device_type = "ethernet-phy";
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <10 0x1 0 0>;
+                        reg = <1>;
+                        device_type = "ethernet-phy";
+                };
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet2: ethernet@26000 {
+                tbi-handle = <&tbi1>;
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@26520 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "fsl,gianfar-tbi";
+                reg = <0x26520 0x20>;
+
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        usb@2b000 {
+                dr_mode = "peripheral";
+                phy_type = "ulpi";
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8536ds_36b.dts b/arch/powerpc/boot/dts/mpc8536ds_36b.dts
index d95b26021e62..8f4b929b1d1d 100644
--- a/arch/powerpc/boot/dts/mpc8536ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds_36b.dts
@@ -1,5 +1,5 @@
 /*
- * MPC8536 DS Device Tree Source
+ * MPC8536DS Device Tree Source (36-bit address map)
  *
  * Copyright 2008-2009 Freescale Semiconductor, Inc.
  *
@@ -9,24 +9,11 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8536si-pre.dtsi"
 
 / {
         model = "fsl,mpc8536ds";
         compatible = "fsl,mpc8536ds";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                pci3 = &pci3;
-        };
 
         cpus {
                 #cpus = <1>;
@@ -45,351 +32,34 @@
                 reg = <0 0 0 0>;        // Filled by U-Boot
         };
 
-        soc@fffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x0 0xf 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8536-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8536-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 0x2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8536-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 0x2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 0x2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 0x2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                        rtc@68 {
-                                compatible = "dallas,ds3232";
-                                reg = <0x68>;
-                                interrupts = <0 0x1>;
-                                interrupt-parent = <&mpic>;
-                        };
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 4>;
-                        ranges = <0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8536-dma-channel",
-                                             "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                usb@22000 {
-                        compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x22000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
-                        phy_type = "ulpi";
-                };
-
-                usb@23000 {
-                        compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x23000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <46 0x2>;
-                        phy_type = "ulpi";
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 0x1>;
-                                        reg = <0>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 0x1>;
-                                        reg = <1>;
-                                        device_type = "ethernet-phy";
-                                };
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet1: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi1>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                usb@2b000 {
-                        compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x2b000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <60 0x2>;
-                        dr_mode = "peripheral";
-                        phy_type = "ulpi";
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        clock-frequency = <250000000>;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
-                                     "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x9fe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                sata@18000 {
-                        compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
-                        reg = <0x18000 0x1000>;
-                        cell-index = <1>;
-                        interrupts = <74 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                sata@19000 {
-                        compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
-                        reg = <0x19000 0x1000>;
-                        cell-index = <2>;
-                        interrupts = <41 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8548-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        big-endian;
-                };
+        lbc: localbus@ffe05000 {
+                reg = <0 0xffe05000 0 0x1000>;
+        };
 
-                msi@41600 {
-                        compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
+        board_soc: soc: soc@fffe00000 {
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
         };
 
-        pci0: pci@fffe08000 {
-                compatible = "fsl,mpc8540-pci";
-                device_type = "pci";
+        pci0: pci@ffe08000 {
+                reg = <0xf 0xffe08000 0 0x1000>;
+                ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
+                clock-frequency = <66666666>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
 
                         /* IDSEL 0x11 J17 Slot 1 */
-                        0x8800 0 0 1 &mpic 1 1
-                        0x8800 0 0 2 &mpic 2 1
-                        0x8800 0 0 3 &mpic 3 1
-                        0x8800 0 0 4 &mpic 4 1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <24 0x2>;
-                bus-range = <0 0xff>;
-                ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
-                          0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
-                clock-frequency = <66666666>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xf 0xffe08000 0 0x1000>;
+                        0x8800 0 0 1 &mpic 1 1 0 0
+                        0x8800 0 0 2 &mpic 2 1 0 0
+                        0x8800 0 0 3 &mpic 3 1 0 0
+                        0x8800 0 0 4 &mpic 4 1 0 0>;
         };
 
-        pci1: pcie@fffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
+        pci1: pcie@ffe09000 {
                 reg = <0xf 0xffe09000 0 0x1000>;
-                bus-range = <0 0xff>;
                 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
                           0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 0x2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 4 1
-                        0000 0 0 2 &mpic 5 1
-                        0000 0 0 3 &mpic 6 1
-                        0000 0 0 4 &mpic 7 1
-                        >;
                 pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x02000000 0 0xf8000000
                                   0x02000000 0 0xf8000000
                                   0 0x08000000
@@ -401,31 +71,10 @@
         };
 
         pci2: pcie@fffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe0a000 0 0x1000>;
-                bus-range = <0 0xff>;
                 ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
                           0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 0x2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 0 1
-                        0000 0 0 2 &mpic 1 1
-                        0000 0 0 3 &mpic 2 1
-                        0000 0 0 4 &mpic 3 1
-                        >;
                 pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x02000000 0 0xf8000000
                                   0x02000000 0 0xf8000000
                                   0 0x08000000
@@ -437,32 +86,10 @@
         };
 
         pci3: pcie@fffe0b000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe0b000 0 0x1000>;
-                bus-range = <0 0xff>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <27 0x2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 8 1
-                        0000 0 0 2 &mpic 9 1
-                        0000 0 0 3 &mpic 10 1
-                        0000 0 0 4 &mpic 11 1
-                        >;
-
                 pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
                                   0 0x20000000
@@ -473,3 +100,6 @@
                 };
         };
 };
+
+/include/ "fsl/mpc8536si-post.dtsi"
+/include/ "mpc8536ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 8d1bf0fd9268..f99fb110c97f 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -243,7 +243,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -253,7 +253,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 87ff96549fac..0f5e93912799 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -209,7 +209,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -219,7 +219,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index d793968743c9..e934987e882b 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -9,339 +9,52 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8544si-pre.dtsi"
+
 / {
         model = "MPC8544DS";
         compatible = "MPC8544DS", "MPC85xxDS";
-        #address-cells = <1>;
-        #size-cells = <1>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                pci3 = &pci3;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,8544@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
-        };
 
         memory {
                 device_type = "memory";
-                reg = <0x0 0x0>;        // Filled by U-Boot
+                reg = <0 0 0 0>;        // Filled by U-Boot
         };
 
-        soc8544@e0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-
-                ranges = <0x0 0xe0000000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <10>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8544-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8544-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8544-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2, 256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8544-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8544-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8544-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8544-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8544-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "TSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        phy-handle = <&phy0>;
-                        tbi-handle = <&tbi0>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x0>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x1>;
-                                        device_type = "ethernet-phy";
-                                };
-
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet1: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "TSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-                        phy-handle = <&phy1>;
-                        tbi-handle = <&tbi1>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8548-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xfe>;
-                        fsl,descriptor-types-mask = <0x12b0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
+        lbc: localbus@e0005000 {
+                reg = <0 0xe0005000 0 0x1000>;
+        };
 
-                msi@41600 {
-                        compatible = "fsl,mpc8544-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
+        board_soc: soc: soc8544@e0000000 {
+                ranges = <0x0 0x0 0xe0000000 0x100000>;
         };
 
         pci0: pci@e0008000 {
-                compatible = "fsl,mpc8540-pci";
-                device_type = "pci";
+                reg = <0 0xe0008000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
+                clock-frequency = <66666666>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
 
                         /* IDSEL 0x11 J17 Slot 1 */
-                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
+                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
 
                         /* IDSEL 0x12 J16 Slot 2 */
 
-                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>;
-                clock-frequency = <66666666>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe0008000 0x1000>;
+                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
         };
 
         pci1: pcie@e0009000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe0009000 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
+                reg = <0x0 0xe0009000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
                                   0x0 0x20000000
@@ -353,31 +66,10 @@
         };
 
         pci2: pcie@e000a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe000a000 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
-                          0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
+                reg = <0x0 0xe000a000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x10000000
@@ -388,44 +80,11 @@
                 };
         };
 
-        pci3: pcie@e000b000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe000b000 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xb0000000 0xb0000000 0x0 0x100000
-                          0x1000000 0x0 0x0 0xb0100000 0x0 0x100000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <27 2>;
-                interrupt-map-mask = <0xff00 0x0 0x0 0x1>;
-                interrupt-map = <
-                        // IDSEL 0x1c  USB
-                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
-                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
-                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
-                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
-
-                        // IDSEL 0x1d  Audio
-                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
-
-                        // IDSEL 0x1e Legacy
-                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
-                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
-
-                        // IDSEL 0x1f IDE/SATA
-                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
-                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
-                >;
-
+        board_pci3: pci3: pcie@e000b000 {
+                reg = <0x0 0xe000b000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
+                          0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xb0000000
                                   0x2000000 0x0 0xb0000000
                                   0x0 0x100000
@@ -433,70 +92,14 @@
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
                                   0x0 0x100000>;
-
-                        uli1575@0 {
-                                reg = <0x0 0x0 0x0 0x0 0x0>;
-                                #size-cells = <2>;
-                                #address-cells = <3>;
-                                ranges = <0x2000000 0x0 0xb0000000
-                                          0x2000000 0x0 0xb0000000
-                                          0x0 0x100000
-
-                                          0x1000000 0x0 0x0
-                                          0x1000000 0x0 0x0
-                                          0x0 0x100000>;
-                                isa@1e {
-                                        device_type = "isa";
-                                        #interrupt-cells = <2>;
-                                        #size-cells = <1>;
-                                        #address-cells = <2>;
-                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
-                                        ranges = <0x1 0x0
-                                                  0x1000000 0x0 0x0
-                                                  0x1000>;
-                                        interrupt-parent = <&i8259>;
-
-                                        i8259: interrupt-controller@20 {
-                                                reg = <0x1 0x20 0x2
-                                                       0x1 0xa0 0x2
-                                                       0x1 0x4d0 0x2>;
-                                                interrupt-controller;
-                                                device_type = "interrupt-controller";
-                                                #address-cells = <0>;
-                                                #interrupt-cells = <2>;
-                                                compatible = "chrp,iic";
-                                                interrupts = <9 2>;
-                                                interrupt-parent = <&mpic>;
-                                        };
-
-                                        i8042@60 {
-                                                #size-cells = <0>;
-                                                #address-cells = <1>;
-                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
-                                                interrupts = <1 3 12 3>;
-                                                interrupt-parent = <&i8259>;
-
-                                                keyboard@0 {
-                                                        reg = <0x0>;
-                                                        compatible = "pnpPNP,303";
-                                                };
-
-                                                mouse@1 {
-                                                        reg = <0x1>;
-                                                        compatible = "pnpPNP,f03";
-                                                };
-                                        };
-
-                                        rtc@70 {
-                                                compatible = "pnpPNP,b00";
-                                                reg = <0x1 0x70 0x2>;
-                                        };
-
-                                        gpio@400 {
-                                                reg = <0x1 0x400 0x80>;
-                                        };
-                                };
-                        };
                 };
         };
 };
+
+/*
+ * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
+ * for interrupt-map & interrupt-map-mask
+ */
+
+/include/ "fsl/mpc8544si-post.dtsi"
+/include/ "mpc8544ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
new file mode 100644
index 000000000000..270f64b90f4e
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi
@@ -0,0 +1,161 @@
+/*
+ * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_soc {
+        enet0: ethernet@24000 {
+                phy-handle = <&phy0>;
+                tbi-handle = <&tbi0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x0>;
+                        device_type = "ethernet-phy";
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x1>;
+                        device_type = "ethernet-phy";
+                };
+
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet2: ethernet@26000 {
+                phy-handle = <&phy1>;
+                tbi-handle = <&tbi1>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@26520 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
+
+&board_pci3 {
+        pcie@0 {
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        // IDSEL 0x1c  USB
+                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
+                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
+                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
+                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
+
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+                        >;
+
+
+                uli1575@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        ranges = <0x2000000 0x0 0xb0000000
+                                  0x2000000 0x0 0xb0000000
+                                  0x0 0x100000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                        isa@1e {
+                                device_type = "isa";
+                                #interrupt-cells = <2>;
+                                #size-cells = <1>;
+                                #address-cells = <2>;
+                                reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                          0x1000>;
+                                interrupt-parent = <&i8259>;
+
+                                i8259: interrupt-controller@20 {
+                                        reg = <0x1 0x20 0x2
+                                               0x1 0xa0 0x2
+                                               0x1 0x4d0 0x2>;
+                                        interrupt-controller;
+                                        device_type = "interrupt-controller";
+                                        #address-cells = <0>;
+                                        #interrupt-cells = <2>;
+                                        compatible = "chrp,iic";
+                                        interrupts = <9 2 0 0>;
+                                        interrupt-parent = <&mpic>;
+                                };
+
+                                i8042@60 {
+                                        #size-cells = <0>;
+                                        #address-cells = <1>;
+                                        reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                        interrupts = <1 3 12 3>;
+                                        interrupt-parent =
+                                                <&i8259>;
+
+                                        keyboard@0 {
+                                                reg = <0x0>;
+                                                compatible = "pnpPNP,303";
+                                        };
+
+                                        mouse@1 {
+                                                reg = <0x1>;
+                                                compatible = "pnpPNP,f03";
+                                        };
+                                };
+
+                                rtc@70 {
+                                        compatible = "pnpPNP,b00";
+                                        reg = <0x1 0x70 0x2>;
+                                };
+
+                                gpio@400 {
+                                        reg = <0x1 0x400 0x80>;
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index a17a5572fb73..07b8dae0f46e 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -9,13 +9,11 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8548si-pre.dtsi"
 
 / {
         model = "MPC8548CDS";
         compatible = "MPC8548CDS", "MPC85xxCDS";
-        #address-cells = <1>;
-        #size-cells = <1>;
 
         aliases {
                 ethernet0 = &enet0;
@@ -29,76 +27,19 @@
                 pci2 = &pci2;
         };
 
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,8548@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;       //  33 MHz, from uboot
-                        bus-frequency = <0>;    // 166 MHz
-                        clock-frequency = <0>;  // 825 MHz, from uboot
-                        next-level-cache = <&L2>;
-                };
-        };
-
         memory {
                 device_type = "memory";
-                reg = <0x0 0x8000000>;  // 128M at 0x0
+                reg = <0 0 0x0 0x8000000>;      // 128M at 0x0
         };
 
-        soc8548@e0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x0 0xe0000000 0x100000>;
-                bus-frequency = <0>;
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <10>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8548-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8548-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
+        lbc: localbus@e0005000 {
+                reg = <0 0xe0005000 0 0x1000>;
+        };
 
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8548-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2, 512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
+        soc: soc8548@e0000000 {
+                ranges = <0 0x0 0xe0000000 0x100000>;
 
                 i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-
                         eeprom@50 {
                                 compatible = "atmel,24c64";
                                 reg = <0x50>;
@@ -116,351 +57,178 @@
                 };
 
                 i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-
                         eeprom@50 {
                                 compatible = "atmel,24c64";
                                 reg = <0x50>;
                         };
                 };
 
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8548-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8548-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8548-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8548-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
                 enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+                };
 
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <5 1>;
-                                        reg = <0x0>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <5 1>;
-                                        reg = <0x1>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy2: ethernet-phy@2 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <5 1>;
-                                        reg = <0x2>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy3: ethernet-phy@3 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <5 1>;
-                                        reg = <0x3>;
-                                        device_type = "ethernet-phy";
-                                };
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
+                mdio@24520 {
+                        phy0: ethernet-phy@0 {
+                                interrupts = <5 1 0 0>;
+                                reg = <0x0>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy1: ethernet-phy@1 {
+                                interrupts = <5 1 0 0>;
+                                reg = <0x1>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy2: ethernet-phy@2 {
+                                interrupts = <5 1 0 0>;
+                                reg = <0x2>;
+                                device_type = "ethernet-phy";
+                        };
+                        phy3: ethernet-phy@3 {
+                                interrupts = <5 1 0 0>;
+                                reg = <0x3>;
+                                device_type = "ethernet-phy";
+                        };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
                         };
                 };
 
                 enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+                };
 
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
+                mdio@25520 {
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
                         };
                 };
 
                 enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
+                };
 
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi2: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
+                mdio@26520 {
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
                         };
                 };
 
                 enet3: ethernet@27000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <3>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x27000 0x1000>;
-                        ranges = <0x0 0x27000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <37 2 38 2 39 2>;
-                        interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi3: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;   // reg base, size
-                        clock-frequency = <0>;  // should we fill in in uboot?
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;   // reg base, size
-                        clock-frequency = <0>;  // should we fill in in uboot?
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
                 };
 
-                global-utilities@e0000 {        //global utilities reg
-                        compatible = "fsl,mpc8548-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xfe>;
-                        fsl,descriptor-types-mask = <0x12b0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
+                mdio@27520 {
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
                 };
         };
 
         pci0: pci@e0008000 {
+                reg = <0 0xe0008000 0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
+                clock-frequency = <66666666>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
                         /* IDSEL 0x4 (PCIX Slot 2) */
-                        0x2000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0x2000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0x2000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0x2000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                        0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                         /* IDSEL 0x5 (PCIX Slot 3) */
-                        0x2800 0x0 0x0 0x1 &mpic 0x1 0x1
-                        0x2800 0x0 0x0 0x2 &mpic 0x2 0x1
-                        0x2800 0x0 0x0 0x3 &mpic 0x3 0x1
-                        0x2800 0x0 0x0 0x4 &mpic 0x0 0x1
+                        0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
+                        0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
+                        0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
+                        0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
 
                         /* IDSEL 0x6 (PCIX Slot 4) */
-                        0x3000 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x3000 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x3000 0x0 0x0 0x3 &mpic 0x0 0x1
-                        0x3000 0x0 0x0 0x4 &mpic 0x1 0x1
+                        0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
+                        0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
 
                         /* IDSEL 0x8 (PCIX Slot 5) */
-                        0x4000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0x4000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0x4000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0x4000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                        0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                         /* IDSEL 0xC (Tsi310 bridge) */
-                        0x6000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0x6000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0x6000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0x6000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                        0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                         /* IDSEL 0x14 (Slot 2) */
-                        0xa000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0xa000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0xa000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0xa000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                        0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                         /* IDSEL 0x15 (Slot 3) */
-                        0xa800 0x0 0x0 0x1 &mpic 0x1 0x1
-                        0xa800 0x0 0x0 0x2 &mpic 0x2 0x1
-                        0xa800 0x0 0x0 0x3 &mpic 0x3 0x1
-                        0xa800 0x0 0x0 0x4 &mpic 0x0 0x1
+                        0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
+                        0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
+                        0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
+                        0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
 
                         /* IDSEL 0x16 (Slot 4) */
-                        0xb000 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0xb000 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0xb000 0x0 0x0 0x3 &mpic 0x0 0x1
-                        0xb000 0x0 0x0 0x4 &mpic 0x1 0x1
+                        0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
+                        0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
 
                         /* IDSEL 0x18 (Slot 5) */
-                        0xc000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0xc000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0xc000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0xc000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                        0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                         /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
-                        0xe000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0xe000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0xe000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0xe000 0x0 0x0 0x4 &mpic 0x3 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-                bus-range = <0 0>;
-                ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000
-                          0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
-                clock-frequency = <66666666>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe0008000 0x1000>;
-                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
-                device_type = "pci";
+                        0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                        0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
 
                 pci_bridge@1c {
                         interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                         interrupt-map = <
 
                                 /* IDSEL 0x00 (PrPMC Site) */
-                                0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                                0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                                0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                                0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                                0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                                0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                                0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                                0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                                 /* IDSEL 0x04 (VIA chip) */
-                                0x2000 0x0 0x0 0x1 &mpic 0x0 0x1
-                                0x2000 0x0 0x0 0x2 &mpic 0x1 0x1
-                                0x2000 0x0 0x0 0x3 &mpic 0x2 0x1
-                                0x2000 0x0 0x0 0x4 &mpic 0x3 0x1
+                                0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+                                0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                                0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                                0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
 
                                 /* IDSEL 0x05 (8139) */
-                                0x2800 0x0 0x0 0x1 &mpic 0x1 0x1
+                                0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
 
                                 /* IDSEL 0x06 (Slot 6) */
-                                0x3000 0x0 0x0 0x1 &mpic 0x2 0x1
-                                0x3000 0x0 0x0 0x2 &mpic 0x3 0x1
-                                0x3000 0x0 0x0 0x3 &mpic 0x0 0x1
-                                0x3000 0x0 0x0 0x4 &mpic 0x1 0x1
+                                0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                                0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                                0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
+                                0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
 
                                 /* IDESL 0x07 (Slot 7) */
-                                0x3800 0x0 0x0 0x1 &mpic 0x3 0x1
-                                0x3800 0x0 0x0 0x2 &mpic 0x0 0x1
-                                0x3800 0x0 0x0 0x3 &mpic 0x1 0x1
-                                0x3800 0x0 0x0 0x4 &mpic 0x2 0x1>;
+                                0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                                0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
+                                0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                                0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
 
                         reg = <0xe000 0x0 0x0 0x0 0x0>;
                         #interrupt-cells = <1>;
@@ -492,7 +260,7 @@
                                         #address-cells = <0>;
                                         #interrupt-cells = <2>;
                                         compatible = "chrp,iic";
-                                        interrupts = <0 1>;
+                                        interrupts = <0 1 0 0>;
                                         interrupt-parent = <&mpic>;
                                 };
 
@@ -505,56 +273,25 @@
         };
 
         pci1: pci@e0009000 {
+                reg = <0 0xe0009000 0 0x1000>;
+                ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
+                clock-frequency = <66666666>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
 
                         /* IDSEL 0x15 */
-                        0xa800 0x0 0x0 0x1 &mpic 0xb 0x1
-                        0xa800 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0xa800 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0xa800 0x0 0x0 0x4 &mpic 0x3 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
-                bus-range = <0 0>;
-                ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000
-                          0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
-                clock-frequency = <66666666>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe0009000 0x1000>;
-                compatible = "fsl,mpc8540-pci";
-                device_type = "pci";
+                        0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
+                        0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+                        0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+                        0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
         };
 
         pci2: pcie@e000a000 {
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-
-                        /* IDSEL 0x0 (PEX) */
-                        00000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        00000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        00000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>;
-                clock-frequency = <33333333>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe000a000 0x1000>;
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
+                reg = <0 0xe000a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -565,3 +302,5 @@
                 };
         };
 };
+
+/include/ "fsl/mpc8548si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 5c5614f9eb17..fe10438613d6 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -209,7 +209,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -219,7 +219,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 647daf8e7291..09598bb5d443 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -9,60 +9,25 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8568si-pre.dtsi"
 
 / {
         model = "MPC8568EMDS";
         compatible = "MPC8568EMDS", "MPC85xxMDS";
-        #address-cells = <1>;
-        #size-cells = <1>;
 
         aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                ethernet3 = &enet3;
-                serial0 = &serial0;
-                serial1 = &serial1;
                 pci0 = &pci0;
                 pci1 = &pci1;
-                rapidio0 = &rio0;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,8568@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        sleep = <&pmc 0x00008000        // core
-                                 &pmc 0x00004000>;      // timebase
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
+                rapidio0 = &rio;
         };
 
         memory {
                 device_type = "memory";
-                reg = <0x0 0x10000000>;
+                reg = <0x0 0x0 0x0 0x0>;
         };
 
-        localbus@e0005000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus",
-                             "simple-bus";
-                reg = <0xe0005000 0x1000>;
-                interrupt-parent = <&mpic>;
-                interrupts = <19 2>;
-
+        lbc: localbus@e0005000 {
+                reg = <0x0 0xe0005000 0x0 0x1000>;
                 ranges = <0x0 0x0 0xfe000000 0x02000000
                           0x1 0x0 0xf8000000 0x00008000
                           0x2 0x0 0xf0000000 0x04000000
@@ -104,288 +69,65 @@
                 };
         };
 
-        soc8568@e0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x0 0xe0000000 0x100000>;
-                bus-frequency = <0>;
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <10>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8568-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8568-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8568-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2, 512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
+        soc: soc8568@e0000000 {
+                ranges = <0x0 0x0 0xe0000000 0x100000>;
 
                 i2c-sleep-nexus {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "simple-bus";
-                        sleep = <&pmc 0x00000004>;
-                        ranges;
-
                         i2c@3000 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <0>;
-                                compatible = "fsl-i2c";
-                                reg = <0x3000 0x100>;
-                                interrupts = <43 2>;
-                                interrupt-parent = <&mpic>;
-                                dfsrr;
-
                                 rtc@68 {
                                         compatible = "dallas,ds1374";
                                         reg = <0x68>;
-                                        interrupts = <3 1>;
-                                        interrupt-parent = <&mpic>;
+                                        interrupts = <3 1 0 0>;
                                 };
                         };
+                };
 
-                        i2c@3100 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <1>;
-                                compatible = "fsl-i2c";
-                                reg = <0x3100 0x100>;
-                                interrupts = <43 2>;
-                                interrupt-parent = <&mpic>;
-                                dfsrr;
-                        };
+                enet0: ethernet@24000 {
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy2>;
                 };
 
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        sleep = <&pmc 0x00000400>;
-
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8568-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
+                mdio@24520 {
+                        phy0: ethernet-phy@7 {
+                                interrupts = <1 1 0 0>;
+                                reg = <0x7>;
+                                device_type = "ethernet-phy";
                         };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8568-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
+                        phy1: ethernet-phy@1 {
+                                interrupts = <2 1 0 0>;
+                                reg = <0x1>;
+                                device_type = "ethernet-phy";
                         };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8568-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
+                        phy2: ethernet-phy@2 {
+                                interrupts = <1 1 0 0>;
+                                reg = <0x2>;
+                                device_type = "ethernet-phy";
                         };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8568-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
+                        phy3: ethernet-phy@3 {
+                                interrupts = <2 1 0 0>;
+                                reg = <0x3>;
+                                device_type = "ethernet-phy";
                         };
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy2>;
-                        sleep = <&pmc 0x00000080>;
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@7 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <1 1>;
-                                        reg = <0x7>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <2 1>;
-                                        reg = <0x1>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy2: ethernet-phy@2 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <1 1>;
-                                        reg = <0x2>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy3: ethernet-phy@3 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <2 1>;
-                                        reg = <0x3>;
-                                        device_type = "ethernet-phy";
-                                };
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
                         };
                 };
 
                 enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
                         sleep = <&pmc 0x00000040>;
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
                 };
 
-                duart-sleep-nexus {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "simple-bus";
-                        sleep = <&pmc 0x00000002>;
-                        ranges;
-
-                        serial0: serial@4500 {
-                                cell-index = <0>;
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0x4500 0x100>;
-                                clock-frequency = <0>;
-                                interrupts = <42 2>;
-                                interrupt-parent = <&mpic>;
-                        };
-
-                        serial1: serial@4600 {
-                                cell-index = <1>;
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0x4600 0x100>;
-                                clock-frequency = <0>;
-                                interrupts = <42 2>;
-                                interrupt-parent = <&mpic>;
+                mdio@25520 {
+                        tbi1: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
                         };
                 };
 
-                global-utilities@e0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
-                        reg = <0xe0000 0x1000>;
-                        ranges = <0 0xe0000 0x1000>;
-                        fsl,has-rstcr;
-
-                        pmc: power@70 {
-                                compatible = "fsl,mpc8568-pmc",
-                                             "fsl,mpc8548-pmc";
-                                reg = <0x70 0x20>;
-                        };
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xfe>;
-                        fsl,descriptor-types-mask = <0x12b0ebf>;
-                        sleep = <&pmc 0x01000000>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
                 par_io@e0100 {
-                        reg = <0xe0100 0x100>;
-                        device_type = "par_io";
                         num-ports = <7>;
 
                         pio1: ucc_pin@01 {
@@ -448,57 +190,21 @@
                 };
         };
 
-        qe@e0080000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "qe";
-                compatible = "fsl,qe";
-                ranges = <0x0 0xe0080000 0x40000>;
-                reg = <0xe0080000 0x480>;
-                sleep = <&pmc 0x00000800>;
-                brg-frequency = <0>;
-                bus-frequency = <396000000>;
-                fsl,qe-num-riscs = <2>;
-                fsl,qe-num-snums = <28>;
-
-                muram@10000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,qe-muram", "fsl,cpm-muram";
-                        ranges = <0x0 0x10000 0x10000>;
-
-                        data-only@0 {
-                                compatible = "fsl,qe-muram-data",
-                                             "fsl,cpm-muram-data";
-                                reg = <0x0 0x10000>;
-                        };
-                };
+        qe: qe@e0080000 {
+                ranges = <0x0 0x0 0xe0080000 0x40000>;
+                reg = <0x0 0xe0080000 0x0 0x480>;
 
                 spi@4c0 {
-                        cell-index = <0>;
-                        compatible = "fsl,spi";
-                        reg = <0x4c0 0x40>;
-                        interrupts = <2>;
-                        interrupt-parent = <&qeic>;
                         mode = "cpu";
                 };
 
                 spi@500 {
-                        cell-index = <1>;
-                        compatible = "fsl,spi";
-                        reg = <0x500 0x40>;
-                        interrupts = <1>;
-                        interrupt-parent = <&qeic>;
                         mode = "cpu";
                 };
 
                 enet2: ucc@2000 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <1>;
-                        reg = <0x2000 0x200>;
-                        interrupts = <32>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk16";
@@ -510,10 +216,6 @@
                 enet3: ucc@3000 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <2>;
-                        reg = <0x3000 0x200>;
-                        interrupts = <33>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk16";
@@ -532,102 +234,57 @@
                          * gianfar's MDIO bus */
                         qe_phy0: ethernet-phy@07 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <1 1>;
+                                interrupts = <1 1 0 0>;
                                 reg = <0x7>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy1: ethernet-phy@01 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
+                                interrupts = <2 1 0 0>;
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy2: ethernet-phy@02 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <1 1>;
+                                interrupts = <1 1 0 0>;
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy3: ethernet-phy@03 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
+                                interrupts = <2 1 0 0>;
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
                 };
-
-                qeic: interrupt-controller@80 {
-                        interrupt-controller;
-                        compatible = "fsl,qe-ic";
-                        #address-cells = <0>;
-                        #interrupt-cells = <1>;
-                        reg = <0x80 0x80>;
-                        big-endian;
-                        interrupts = <46 2 46 2>; //high:30 low:30
-                        interrupt-parent = <&mpic>;
-                };
-
         };
 
         pci0: pci@e0008000 {
+                reg = <0x0 0xe0008000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xe2000000 0x0 0x800000>;
+                clock-frequency = <66666666>;
                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                 interrupt-map = <
                         /* IDSEL 0x12 AD18 */
-                        0x9000 0x0 0x0 0x1 &mpic 0x5 0x1
-                        0x9000 0x0 0x0 0x2 &mpic 0x6 0x1
-                        0x9000 0x0 0x0 0x3 &mpic 0x7 0x1
-                        0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
+                        0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0
+                        0x9000 0x0 0x0 0x2 &mpic 0x6 0x1 0 0
+                        0x9000 0x0 0x0 0x3 &mpic 0x7 0x1 0 0
+                        0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 0 0
 
                         /* IDSEL 0x13 AD19 */
-                        0x9800 0x0 0x0 0x1 &mpic 0x6 0x1
-                        0x9800 0x0 0x0 0x2 &mpic 0x7 0x1
-                        0x9800 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x9800 0x0 0x0 0x4 &mpic 0x5 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
-                sleep = <&pmc 0x80000000>;
-                clock-frequency = <66666666>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe0008000 0x1000>;
-                compatible = "fsl,mpc8540-pci";
-                device_type = "pci";
+                        0x9800 0x0 0x0 0x1 &mpic 0x6 0x1 0 0
+                        0x9800 0x0 0x0 0x2 &mpic 0x7 0x1 0 0
+                        0x9800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x9800 0x0 0x0 0x4 &mpic 0x5 0x1 0 0>;
         };
 
         /* PCI Express */
         pci1: pcie@e000a000 {
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-
-                        /* IDSEL 0x0 (PEX) */
-                        00000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        00000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        00000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
-                          0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
-                sleep = <&pmc 0x20000000>;
-                clock-frequency = <33333333>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe000a000 0x1000>;
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
+                ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0x0 0xe2800000 0x0 0x800000>;
+                reg = <0x0 0xe000a000 0x0 0x1000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x10000000
@@ -638,22 +295,11 @@
                 };
         };
 
-        rio0: rapidio@e00c00000 {
-                #address-cells = <2>;
-                #size-cells = <2>;
-                compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta";
-                reg = <0xe00c0000 0x20000>;
-                ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
-                interrupts = <48 2 /* error     */
-                              49 2 /* bell_outb */
-                              50 2 /* bell_inb  */
-                              53 2 /* msg1_tx   */
-                              54 2 /* msg1_rx   */
-                              55 2 /* msg2_tx   */
-                              56 2 /* msg2_rx   */>;
-                interrupt-parent = <&mpic>;
-                sleep = <&pmc 0x00080000   /* controller */
-                         &pmc 0x00040000>; /* message unit */
+        rio: rapidio@e00c00000 {
+                reg = <0x0 0xe00c0000 0x0 0x20000>;
+                port1 {
+                        ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+                };
         };
 
         leds {
@@ -672,3 +318,5 @@
                 };
         };
 };
+
+/include/ "fsl/mpc8568si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts
index 8b72eaff5b03..7e283c891b7f 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -9,66 +9,36 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8569si-pre.dtsi"
 
 / {
         model = "MPC8569EMDS";
         compatible = "fsl,MPC8569EMDS";
-        #address-cells = <1>;
-        #size-cells = <1>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        interrupt-parent = <&mpic>;
 
         aliases {
-                serial0 = &serial0;
-                serial1 = &serial1;
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
                 ethernet2 = &enet2;
                 ethernet3 = &enet3;
                 ethernet5 = &enet5;
                 ethernet7 = &enet7;
-                pci1 = &pci1;
-                rapidio0 = &rio0;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,8569@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        sleep = <&pmc 0x00008000        // core
-                                 &pmc 0x00004000>;      // timebase
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
+                rapidio0 = &rio;
         };
 
         memory {
                 device_type = "memory";
         };
 
-        localbus@e0005000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
-                reg = <0xe0005000 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
-                sleep = <&pmc 0x08000000>;
-
-                ranges = <0x0 0x0 0xfe000000 0x02000000
-                          0x1 0x0 0xf8000000 0x00008000
-                          0x2 0x0 0xf0000000 0x04000000
-                          0x3 0x0 0xfc000000 0x00008000
-                          0x4 0x0 0xf8008000 0x00008000
-                          0x5 0x0 0xf8010000 0x00008000>;
+        lbc: localbus@e0005000 {
+                reg = <0x0 0xe0005000 0x0 0x1000>;
+
+                ranges = <0x0 0x0 0x0 0xfe000000 0x02000000
+                          0x1 0x0 0x0 0xf8000000 0x00008000
+                          0x2 0x0 0x0 0xf0000000 0x04000000
+                          0x3 0x0 0x0 0xfc000000 0x00008000
+                          0x4 0x0 0x0 0xf8008000 0x00008000
+                          0x5 0x0 0x0 0xf8010000 0x00008000>;
 
                 nor@0,0 {
                         #address-cells = <1>;
@@ -133,220 +103,25 @@
                 };
         };
 
-        soc@e0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,mpc8569-immr", "simple-bus";
-                ranges = <0x0 0xe0000000 0x100000>;
-                bus-frequency = <0>;
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <10>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8569-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8569-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
+        soc: soc@e0000000 {
+                ranges = <0x0 0x0 0xe0000000 0x100000>;
 
                 i2c-sleep-nexus {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "simple-bus";
-                        sleep = <&pmc 0x00000004>;
-                        ranges;
-
                         i2c@3000 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <0>;
-                                compatible = "fsl-i2c";
-                                reg = <0x3000 0x100>;
-                                interrupts = <43 2>;
-                                interrupt-parent = <&mpic>;
-                                dfsrr;
-
                                 rtc@68 {
                                         compatible = "dallas,ds1374";
                                         reg = <0x68>;
-                                        interrupts = <3 1>;
-                                        interrupt-parent = <&mpic>;
+                                        interrupts = <3 1 0 0>;
                                 };
                         };
-
-                        i2c@3100 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                cell-index = <1>;
-                                compatible = "fsl-i2c";
-                                reg = <0x3100 0x100>;
-                                interrupts = <43 2>;
-                                interrupt-parent = <&mpic>;
-                                dfsrr;
-                        };
-                };
-
-                duart-sleep-nexus {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "simple-bus";
-                        sleep = <&pmc 0x00000002>;
-                        ranges;
-
-                        serial0: serial@4500 {
-                                cell-index = <0>;
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0x4500 0x100>;
-                                clock-frequency = <0>;
-                                interrupts = <42 2>;
-                                interrupt-parent = <&mpic>;
-                        };
-
-                        serial1: serial@4600 {
-                                cell-index = <1>;
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0x4600 0x100>;
-                                clock-frequency = <0>;
-                                interrupts = <42 2>;
-                                interrupt-parent = <&mpic>;
-                        };
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8569-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2, 512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
                 };
 
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8569-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8569-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8569-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8569-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8569-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,mpc8569-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x8>;
-                        interrupt-parent = <&mpic>;
-                        sleep = <&pmc 0x00200000>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
+                sdhc@2e000 {
                         status = "disabled";
                         sdhci,1-bit-only;
                 };
 
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                        sleep = <&pmc 0x01000000>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
-                        reg = <0xe0000 0x1000>;
-                        ranges = <0 0xe0000 0x1000>;
-                        fsl,has-rstcr;
-
-                        pmc: power@70 {
-                                compatible = "fsl,mpc8569-pmc",
-                                             "fsl,mpc8548-pmc";
-                                reg = <0x70 0x20>;
-                        };
-                };
-
                 par_io@e0100 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg = <0xe0100 0x100>;
-                        ranges = <0x0 0xe0100 0x100>;
-                        device_type = "par_io";
                         num-ports = <7>;
 
                         qe_pio_e: gpio-controller@80 {
@@ -447,47 +222,11 @@
                 };
         };
 
-        qe@e0080000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "qe";
-                compatible = "fsl,qe";
-                ranges = <0x0 0xe0080000 0x40000>;
-                reg = <0xe0080000 0x480>;
-                sleep = <&pmc 0x00000800>;
-                brg-frequency = <0>;
-                bus-frequency = <0>;
-                fsl,qe-num-riscs = <4>;
-                fsl,qe-num-snums = <46>;
-
-                qeic: interrupt-controller@80 {
-                        interrupt-controller;
-                        compatible = "fsl,qe-ic";
-                        #address-cells = <0>;
-                        #interrupt-cells = <1>;
-                        reg = <0x80 0x80>;
-                        interrupts = <46 2 46 2>; //high:30 low:30
-                        interrupt-parent = <&mpic>;
-                };
-
-                timer@440 {
-                        compatible = "fsl,mpc8569-qe-gtm",
-                                     "fsl,qe-gtm", "fsl,gtm";
-                        reg = <0x440 0x40>;
-                        interrupts = <12 13 14 15>;
-                        interrupt-parent = <&qeic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
+        qe: qe@e0080000 {
+                ranges = <0x0 0x0 0xe0080000 0x40000>;
+                reg = <0x0 0xe0080000 0x0 0x480>;
 
                 spi@4c0 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc8569-qe-spi", "fsl,spi";
-                        reg = <0x4c0 0x40>;
-                        cell-index = <0>;
-                        interrupts = <2>;
-                        interrupt-parent = <&qeic>;
                         gpios = <&qe_pio_e 30 0>;
                         mode = "cpu-qe";
 
@@ -499,20 +238,10 @@
                 };
 
                 spi@500 {
-                        cell-index = <1>;
-                        compatible = "fsl,spi";
-                        reg = <0x500 0x40>;
-                        interrupts = <1>;
-                        interrupt-parent = <&qeic>;
                         mode = "cpu";
                 };
 
                 usb@6c0 {
-                        compatible = "fsl,mpc8569-qe-usb",
-                                     "fsl,mpc8323-qe-usb";
-                        reg = <0x6c0 0x40 0x8b00 0x100>;
-                        interrupts = <11>;
-                        interrupt-parent = <&qeic>;
                         fsl,fullspeed-clock = "clk5";
                         fsl,lowspeed-clock = "brg10";
                         gpios = <&qe_pio_f 3 0   /* USBOE */
@@ -527,10 +256,6 @@
                 enet0: ucc@2000 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <1>;
-                        reg = <0x2000 0x200>;
-                        interrupts = <32>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk12";
@@ -548,35 +273,33 @@
 
                         qe_phy0: ethernet-phy@07 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <1 1>;
+                                interrupts = <1 1 0 0>;
                                 reg = <0x7>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy1: ethernet-phy@01 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
+                                interrupts = <2 1 0 0>;
                                 reg = <0x1>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy2: ethernet-phy@02 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
+                                interrupts = <3 1 0 0>;
                                 reg = <0x2>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy3: ethernet-phy@03 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <4 1>;
+                                interrupts = <4 1 0 0>;
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy5: ethernet-phy@04 {
-                                interrupt-parent = <&mpic>;
                                 reg = <0x04>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy7: ethernet-phy@06 {
-                                interrupt-parent = <&mpic>;
                                 reg = <0x6>;
                                 device_type = "ethernet-phy";
                         };
@@ -610,10 +333,6 @@
                 enet2: ucc@2200 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <3>;
-                        reg = <0x2200 0x200>;
-                        interrupts = <34>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk12";
@@ -637,10 +356,6 @@
                 enet1: ucc@3000 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <2>;
-                        reg = <0x3000 0x200>;
-                        interrupts = <33>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk17";
@@ -664,10 +379,6 @@
                 enet3: ucc@3200 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <4>;
-                        reg = <0x3200 0x200>;
-                        interrupts = <35>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk17";
@@ -691,10 +402,6 @@
                 enet5: ucc@3400 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <6>;
-                        reg = <0x3400 0x200>;
-                        interrupts = <41>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "none";
@@ -706,10 +413,6 @@
                 enet7: ucc@3600 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <8>;
-                        reg = <0x3600 0x200>;
-                        interrupts = <43>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "none";
@@ -717,50 +420,14 @@
                         phy-handle = <&qe_phy7>;
                         phy-connection-type = "sgmii";
                 };
-
-                muram@10000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,qe-muram", "fsl,cpm-muram";
-                        ranges = <0x0 0x10000 0x20000>;
-
-                        data-only@0 {
-                                compatible = "fsl,qe-muram-data",
-                                             "fsl,cpm-muram-data";
-                                reg = <0x0 0x20000>;
-                        };
-                };
-
         };
 
         /* PCI Express */
         pci1: pcie@e000a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xe000a000 0x1000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 (PEX) */
-                        00000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        00000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        00000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        00000 0x0 0x0 0x4 &mpic 0x3 0x1>;
-
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
-                          0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>;
-                sleep = <&pmc 0x20000000>;
-                clock-frequency = <33333333>;
+                reg = <0x0 0xe000a000 0x0 0x1000>;
+                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
+                          0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x00800000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x10000000
@@ -771,20 +438,15 @@
                 };
         };
 
-        rio0: rapidio@e00c00000 {
-                #address-cells = <2>;
-                #size-cells = <2>;
-                compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta";
-                reg = <0xe00c0000 0x20000>;
-                ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
-                interrupts = <48 2 /* error     */
-                              49 2 /* bell_outb */
-                              50 2 /* bell_inb  */
-                              53 2 /* msg1_tx   */
-                              54 2 /* msg1_rx   */
-                              55 2 /* msg2_tx   */
-                              56 2 /* msg2_rx   */>;
-                interrupt-parent = <&mpic>;
-                sleep = <&pmc 0x00080000>;
+        rio: rapidio@e00c00000 {
+                reg = <0x0 0xe00c0000 0x0 0x20000>;
+                port1 {
+                        ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+                };
+                port2 {
+                        status = "disabled";
+                };
         };
 };
+
+/include/ "fsl/mpc8569si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index f6c04d25e916..0c9f2955deb4 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -9,67 +9,18 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8572si-pre.dtsi"
+
 / {
         model = "fsl,MPC8572DS";
         compatible = "fsl,MPC8572DS";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                ethernet3 = &enet3;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,8572@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
-
-                PowerPC,8572@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
-        };
 
         memory {
                 device_type = "memory";
         };
 
-        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+        board_lbc: lbc: localbus@ffe05000 {
                 reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
 
                 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
                           0x1 0x0 0x0 0xe0000000 0x08000000
@@ -78,601 +29,17 @@
                           0x4 0x0 0x0 0xffa40000 0x00040000
                           0x5 0x0 0x0 0xffa80000 0x00040000
                           0x6 0x0 0x0 0xffac0000 0x00040000>;
-
-                nor@0,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "cfi-flash";
-                        reg = <0x0 0x0 0x8000000>;
-                        bank-width = <2>;
-                        device-width = <1>;
-
-                        ramdisk@0 {
-                                reg = <0x0 0x03000000>;
-                                read-only;
-                        };
-
-                        diagnostic@3000000 {
-                                reg = <0x03000000 0x00e00000>;
-                                read-only;
-                        };
-
-                        dink@3e00000 {
-                                reg = <0x03e00000 0x00200000>;
-                                read-only;
-                        };
-
-                        kernel@4000000 {
-                                reg = <0x04000000 0x00400000>;
-                                read-only;
-                        };
-
-                        jffs2@4400000 {
-                                reg = <0x04400000 0x03b00000>;
-                        };
-
-                        dtb@7f00000 {
-                                reg = <0x07f00000 0x00080000>;
-                                read-only;
-                        };
-
-                        u-boot@7f80000 {
-                                reg = <0x07f80000 0x00080000>;
-                                read-only;
-                        };
-                };
-
-                nand@2,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x2 0x0 0x40000>;
-
-                        u-boot@0 {
-                                reg = <0x0 0x02000000>;
-                                read-only;
-                        };
-
-                        jffs2@2000000 {
-                                reg = <0x02000000 0x10000000>;
-                        };
-
-                        ramdisk@12000000 {
-                                reg = <0x12000000 0x08000000>;
-                                read-only;
-                        };
-
-                        kernel@1a000000 {
-                                reg = <0x1a000000 0x04000000>;
-                        };
-
-                        dtb@1e000000 {
-                                reg = <0x1e000000 0x01000000>;
-                                read-only;
-                        };
-
-                        empty@1f000000 {
-                                reg = <0x1f000000 0x21000000>;
-                        };
-                };
-
-                nand@4,0 {
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x4 0x0 0x40000>;
-                };
-
-                nand@5,0 {
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x5 0x0 0x40000>;
-                };
-
-                nand@6,0 {
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x6 0x0 0x40000>;
-                };
         };
 
-        soc8572@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
+        board_soc: soc: soc8572@ffe00000 {
                 ranges = <0x0 0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8572-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                memory-controller@6000 {
-                        compatible = "fsl,mpc8572-memory-controller";
-                        reg = <0x6000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8572-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x100000>; // L2, 1M
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                dma@c300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
-                        };
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                ptp_clock@24E00 {
-                        compatible = "fsl,etsec-ptp";
-                        reg = <0x24E00 0xB0>;
-                        interrupts = <68 2 69 2 70 2 71 2>;
-                        interrupt-parent = < &mpic >;
-                        fsl,tclk-period = <5>;
-                        fsl,tmr-prsc = <200>;
-                        fsl,tmr-add = <0xAAAAAAAB>;
-                        fsl,tmr-fiper1 = <0x3B9AC9FB>;
-                        fsl,tmr-fiper2 = <0x3B9AC9FB>;
-                        fsl,max-adj = <499999999>;
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x0>;
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x1>;
-                                };
-                                phy2: ethernet-phy@2 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x2>;
-                                };
-                                phy3: ethernet-phy@3 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x3>;
-                                };
-
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi1>;
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi2>;
-                        phy-handle = <&phy2>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi2: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet3: ethernet@27000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <3>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x27000 0x1000>;
-                        ranges = <0x0 0x27000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <37 2 38 2 39 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi3>;
-                        phy-handle = <&phy3>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi3: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8572-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                msi@41600 {
-                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
-                                     "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x9fe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
         };
 
-        pci0: pcie@ffe08000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
+        board_pci0: pci0: pcie@ffe08000 {
                 reg = <0 0xffe08000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x11 func 0 - PCI slot 1 */
-                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 1 - PCI slot 1 */
-                        0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 2 - PCI slot 1 */
-                        0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 3 - PCI slot 1 */
-                        0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 4 - PCI slot 1 */
-                        0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 5 - PCI slot 1 */
-                        0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 6 - PCI slot 1 */
-                        0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 7 - PCI slot 1 */
-                        0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x12 func 0 - PCI slot 2 */
-                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 1 - PCI slot 2 */
-                        0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 2 - PCI slot 2 */
-                        0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 3 - PCI slot 2 */
-                        0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 4 - PCI slot 2 */
-                        0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 5 - PCI slot 2 */
-                        0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 6 - PCI slot 2 */
-                        0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 7 - PCI slot 2 */
-                        0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        // IDSEL 0x1c  USB
-                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
-                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
-                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
-                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
-
-                        // IDSEL 0x1d  Audio
-                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
-
-                        // IDSEL 0x1e Legacy
-                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
-                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
-
-                        // IDSEL 0x1f IDE/SATA
-                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
-                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
-
-                        >;
-
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
                                   0x0 0x20000000
@@ -680,99 +47,14 @@
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
                                   0x0 0x10000>;
-                        uli1575@0 {
-                                reg = <0x0 0x0 0x0 0x0 0x0>;
-                                #size-cells = <2>;
-                                #address-cells = <3>;
-                                ranges = <0x2000000 0x0 0x80000000
-                                          0x2000000 0x0 0x80000000
-                                          0x0 0x20000000
-
-                                          0x1000000 0x0 0x0
-                                          0x1000000 0x0 0x0
-                                          0x0 0x10000>;
-                                isa@1e {
-                                        device_type = "isa";
-                                        #interrupt-cells = <2>;
-                                        #size-cells = <1>;
-                                        #address-cells = <2>;
-                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
-                                        ranges = <0x1 0x0 0x1000000 0x0 0x0
-                                                  0x1000>;
-                                        interrupt-parent = <&i8259>;
-
-                                        i8259: interrupt-controller@20 {
-                                                reg = <0x1 0x20 0x2
-                                                       0x1 0xa0 0x2
-                                                       0x1 0x4d0 0x2>;
-                                                interrupt-controller;
-                                                device_type = "interrupt-controller";
-                                                #address-cells = <0>;
-                                                #interrupt-cells = <2>;
-                                                compatible = "chrp,iic";
-                                                interrupts = <9 2>;
-                                                interrupt-parent = <&mpic>;
-                                        };
-
-                                        i8042@60 {
-                                                #size-cells = <0>;
-                                                #address-cells = <1>;
-                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
-                                                interrupts = <1 3 12 3>;
-                                                interrupt-parent =
-                                                        <&i8259>;
-
-                                                keyboard@0 {
-                                                        reg = <0x0>;
-                                                        compatible = "pnpPNP,303";
-                                                };
-
-                                                mouse@1 {
-                                                        reg = <0x1>;
-                                                        compatible = "pnpPNP,f03";
-                                                };
-                                        };
-
-                                        rtc@70 {
-                                                compatible = "pnpPNP,b00";
-                                                reg = <0x1 0x70 0x2>;
-                                        };
-
-                                        gpio@400 {
-                                                reg = <0x1 0x400 0x80>;
-                                        };
-                                };
-                        };
                 };
-
         };
 
         pci1: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -784,31 +66,10 @@
         };
 
         pci2: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xc0000000
                                   0x2000000 0x0 0xc0000000
                                   0x0 0x20000000
@@ -819,3 +80,11 @@
                 };
         };
 };
+
+/*
+ * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
+ * for interrupt-map & interrupt-map-mask
+ */
+
+/include/ "fsl/mpc8572si-post.dtsi"
+/include/ "mpc8572ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dtsi b/arch/powerpc/boot/dts/mpc8572ds.dtsi
new file mode 100644
index 000000000000..c3d4fac0532a
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds.dtsi
@@ -0,0 +1,397 @@
+/*
+ * MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_lbc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x8000000>;
+                bank-width = <2>;
+                device-width = <1>;
+
+                ramdisk@0 {
+                        reg = <0x0 0x03000000>;
+                        read-only;
+                };
+
+                diagnostic@3000000 {
+                        reg = <0x03000000 0x00e00000>;
+                        read-only;
+                };
+
+                dink@3e00000 {
+                        reg = <0x03e00000 0x00200000>;
+                        read-only;
+                };
+
+                kernel@4000000 {
+                        reg = <0x04000000 0x00400000>;
+                        read-only;
+                };
+
+                jffs2@4400000 {
+                        reg = <0x04400000 0x03b00000>;
+                };
+
+                dtb@7f00000 {
+                        reg = <0x07f00000 0x00080000>;
+                        read-only;
+                };
+
+                u-boot@7f80000 {
+                        reg = <0x07f80000 0x00080000>;
+                        read-only;
+                };
+        };
+
+        nand@2,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-fcm-nand",
+                             "fsl,elbc-fcm-nand";
+                reg = <0x2 0x0 0x40000>;
+
+                u-boot@0 {
+                        reg = <0x0 0x02000000>;
+                        read-only;
+                };
+
+                jffs2@2000000 {
+                        reg = <0x02000000 0x10000000>;
+                };
+
+                ramdisk@12000000 {
+                        reg = <0x12000000 0x08000000>;
+                        read-only;
+                };
+
+                kernel@1a000000 {
+                        reg = <0x1a000000 0x04000000>;
+                };
+
+                dtb@1e000000 {
+                        reg = <0x1e000000 0x01000000>;
+                        read-only;
+                };
+
+                empty@1f000000 {
+                        reg = <0x1f000000 0x21000000>;
+                };
+        };
+
+        nand@4,0 {
+                compatible = "fsl,mpc8572-fcm-nand",
+                             "fsl,elbc-fcm-nand";
+                reg = <0x4 0x0 0x40000>;
+        };
+
+        nand@5,0 {
+                compatible = "fsl,mpc8572-fcm-nand",
+                             "fsl,elbc-fcm-nand";
+                reg = <0x5 0x0 0x40000>;
+        };
+
+        nand@6,0 {
+                compatible = "fsl,mpc8572-fcm-nand",
+                             "fsl,elbc-fcm-nand";
+                reg = <0x6 0x0 0x40000>;
+        };
+};
+
+&board_soc {
+        enet0: ethernet@24000 {
+                tbi-handle = <&tbi0>;
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x0>;
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x1>;
+                };
+                phy2: ethernet-phy@2 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x2>;
+                };
+                phy3: ethernet-phy@3 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x3>;
+                };
+
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        ptp_clock@24e00 {
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc = <200>;
+                fsl,tmr-add = <0xAAAAAAAB>;
+                fsl,tmr-fiper1 = <0x3B9AC9FB>;
+                fsl,tmr-fiper2 = <0x3B9AC9FB>;
+                fsl,max-adj = <499999999>;
+        };
+
+        enet1: ethernet@25000 {
+                tbi-handle = <&tbi1>;
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+
+        };
+
+        mdio@25520 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet2: ethernet@26000 {
+                tbi-handle = <&tbi2>;
+                phy-handle = <&phy2>;
+                phy-connection-type = "rgmii-id";
+
+        };
+        mdio@26520 {
+                tbi2: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet3: ethernet@27000 {
+                tbi-handle = <&tbi3>;
+                phy-handle = <&phy3>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@27520 {
+                tbi3: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
+
+&board_pci0 {
+        pcie@0 {
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x11 func 0 - PCI slot 1 */
+                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 1 - PCI slot 1 */
+                        0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 2 - PCI slot 1 */
+                        0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 3 - PCI slot 1 */
+                        0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 4 - PCI slot 1 */
+                        0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 5 - PCI slot 1 */
+                        0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 6 - PCI slot 1 */
+                        0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x11 func 7 - PCI slot 1 */
+                        0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+                        0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+                        0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
+                        0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+                        /* IDSEL 0x12 func 0 - PCI slot 2 */
+                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 1 - PCI slot 2 */
+                        0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 2 - PCI slot 2 */
+                        0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 3 - PCI slot 2 */
+                        0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 4 - PCI slot 2 */
+                        0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 5 - PCI slot 2 */
+                        0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 6 - PCI slot 2 */
+                        0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        /* IDSEL 0x12 func 7 - PCI slot 2 */
+                        0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+                        0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
+                        0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+                        0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
+
+                        // IDSEL 0x1c  USB
+                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
+                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
+                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
+                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
+
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+                        >;
+
+
+                uli1575@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x10000>;
+                        isa@1e {
+                                device_type = "isa";
+                                #interrupt-cells = <2>;
+                                #size-cells = <1>;
+                                #address-cells = <2>;
+                                reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                          0x1000>;
+                                interrupt-parent = <&i8259>;
+
+                                i8259: interrupt-controller@20 {
+                                        reg = <0x1 0x20 0x2
+                                               0x1 0xa0 0x2
+                                               0x1 0x4d0 0x2>;
+                                        interrupt-controller;
+                                        device_type = "interrupt-controller";
+                                        #address-cells = <0>;
+                                        #interrupt-cells = <2>;
+                                        compatible = "chrp,iic";
+                                        interrupts = <9 2 0 0>;
+                                        interrupt-parent = <&mpic>;
+                                };
+
+                                i8042@60 {
+                                        #size-cells = <0>;
+                                        #address-cells = <1>;
+                                        reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                        interrupts = <1 3 12 3>;
+                                        interrupt-parent =
+                                                <&i8259>;
+
+                                        keyboard@0 {
+                                                reg = <0x0>;
+                                                compatible = "pnpPNP,303";
+                                        };
+
+                                        mouse@1 {
+                                                reg = <0x1>;
+                                                compatible = "pnpPNP,f03";
+                                        };
+                                };
+
+                                rtc@70 {
+                                        compatible = "pnpPNP,b00";
+                                        reg = <0x1 0x70 0x2>;
+                                };
+
+                                gpio@400 {
+                                        reg = <0x1 0x400 0x80>;
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
index f6365db3b97d..6c3d0b305e1b 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -1,5 +1,5 @@
 /*
- * MPC8572 DS Device Tree Source
+ * MPC8572DS Device Tree Source (36-bit address map)
  *
  * Copyright 2007-2009 Freescale Semiconductor Inc.
  *
@@ -9,67 +9,18 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/mpc8572si-pre.dtsi"
+
 / {
         model = "fsl,MPC8572DS";
         compatible = "fsl,MPC8572DS";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                ethernet3 = &enet3;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,8572@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
-
-                PowerPC,8572@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
-        };
 
         memory {
                 device_type = "memory";
         };
 
-        localbus@fffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+        board_lbc: lbc: localbus@fffe05000 {
                 reg = <0xf 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
 
                 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
                           0x1 0x0 0xf 0xe0000000 0x08000000
@@ -78,588 +29,17 @@
                           0x4 0x0 0xf 0xffa40000 0x00040000
                           0x5 0x0 0xf 0xffa80000 0x00040000
                           0x6 0x0 0xf 0xffac0000 0x00040000>;
-
-                nor@0,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "cfi-flash";
-                        reg = <0x0 0x0 0x8000000>;
-                        bank-width = <2>;
-                        device-width = <1>;
-
-                        ramdisk@0 {
-                                reg = <0x0 0x03000000>;
-                                read-only;
-                        };
-
-                        diagnostic@3000000 {
-                                reg = <0x03000000 0x00e00000>;
-                                read-only;
-                        };
-
-                        dink@3e00000 {
-                                reg = <0x03e00000 0x00200000>;
-                                read-only;
-                        };
-
-                        kernel@4000000 {
-                                reg = <0x04000000 0x00400000>;
-                                read-only;
-                        };
-
-                        jffs2@4400000 {
-                                reg = <0x04400000 0x03b00000>;
-                        };
-
-                        dtb@7f00000 {
-                                reg = <0x07f00000 0x00080000>;
-                                read-only;
-                        };
-
-                        u-boot@7f80000 {
-                                reg = <0x07f80000 0x00080000>;
-                                read-only;
-                        };
-                };
-
-                nand@2,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x2 0x0 0x40000>;
-
-                        u-boot@0 {
-                                reg = <0x0 0x02000000>;
-                                read-only;
-                        };
-
-                        jffs2@2000000 {
-                                reg = <0x02000000 0x10000000>;
-                        };
-
-                        ramdisk@12000000 {
-                                reg = <0x12000000 0x08000000>;
-                                read-only;
-                        };
-
-                        kernel@1a000000 {
-                                reg = <0x1a000000 0x04000000>;
-                        };
-
-                        dtb@1e000000 {
-                                reg = <0x1e000000 0x01000000>;
-                                read-only;
-                        };
-
-                        empty@1f000000 {
-                                reg = <0x1f000000 0x21000000>;
-                        };
-                };
-
-                nand@4,0 {
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x4 0x0 0x40000>;
-                };
-
-                nand@5,0 {
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x5 0x0 0x40000>;
-                };
-
-                nand@6,0 {
-                        compatible = "fsl,mpc8572-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x6 0x0 0x40000>;
-                };
         };
 
-        soc8572@fffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
+        board_soc: soc: soc8572@fffe00000 {
                 ranges = <0x0 0xf 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8572-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                memory-controller@6000 {
-                        compatible = "fsl,mpc8572-memory-controller";
-                        reg = <0x6000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8572-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x100000>; // L2, 1M
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                dma@c300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
-                        };
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x0>;
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x1>;
-                                };
-                                phy2: ethernet-phy@2 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x2>;
-                                };
-                                phy3: ethernet-phy@3 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x3>;
-                                };
-
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi1>;
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi2>;
-                        phy-handle = <&phy2>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi2: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                enet3: ethernet@27000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <3>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x27000 0x1000>;
-                        ranges = <0x0 0x27000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <37 2 38 2 39 2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi3>;
-                        phy-handle = <&phy3>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-
-                                tbi3: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8572-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                msi@41600 {
-                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
-                                     "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x9fe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
         };
 
-        pci0: pcie@fffe08000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
+        board_pci0: pci0: pcie@fffe08000 {
                 reg = <0xf 0xffe08000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x11 func 0 - PCI slot 1 */
-                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 1 - PCI slot 1 */
-                        0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 2 - PCI slot 1 */
-                        0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 3 - PCI slot 1 */
-                        0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 4 - PCI slot 1 */
-                        0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 5 - PCI slot 1 */
-                        0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 6 - PCI slot 1 */
-                        0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 7 - PCI slot 1 */
-                        0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x12 func 0 - PCI slot 2 */
-                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 1 - PCI slot 2 */
-                        0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 2 - PCI slot 2 */
-                        0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 3 - PCI slot 2 */
-                        0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 4 - PCI slot 2 */
-                        0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 5 - PCI slot 2 */
-                        0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 6 - PCI slot 2 */
-                        0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 7 - PCI slot 2 */
-                        0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        // IDSEL 0x1c  USB
-                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
-                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
-                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
-                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
-
-                        // IDSEL 0x1d  Audio
-                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
-
-                        // IDSEL 0x1e Legacy
-                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
-                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
-
-                        // IDSEL 0x1f IDE/SATA
-                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
-                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
-
-                        >;
-
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xe0000000
                                   0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
@@ -667,99 +47,14 @@
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
                                   0x0 0x10000>;
-                        uli1575@0 {
-                                reg = <0x0 0x0 0x0 0x0 0x0>;
-                                #size-cells = <2>;
-                                #address-cells = <3>;
-                                ranges = <0x2000000 0x0 0xe0000000
-                                          0x2000000 0x0 0xe0000000
-                                          0x0 0x20000000
-
-                                          0x1000000 0x0 0x0
-                                          0x1000000 0x0 0x0
-                                          0x0 0x10000>;
-                                isa@1e {
-                                        device_type = "isa";
-                                        #interrupt-cells = <2>;
-                                        #size-cells = <1>;
-                                        #address-cells = <2>;
-                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
-                                        ranges = <0x1 0x0 0x1000000 0x0 0x0
-                                                  0x1000>;
-                                        interrupt-parent = <&i8259>;
-
-                                        i8259: interrupt-controller@20 {
-                                                reg = <0x1 0x20 0x2
-                                                       0x1 0xa0 0x2
-                                                       0x1 0x4d0 0x2>;
-                                                interrupt-controller;
-                                                device_type = "interrupt-controller";
-                                                #address-cells = <0>;
-                                                #interrupt-cells = <2>;
-                                                compatible = "chrp,iic";
-                                                interrupts = <9 2>;
-                                                interrupt-parent = <&mpic>;
-                                        };
-
-                                        i8042@60 {
-                                                #size-cells = <0>;
-                                                #address-cells = <1>;
-                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
-                                                interrupts = <1 3 12 3>;
-                                                interrupt-parent =
-                                                        <&i8259>;
-
-                                                keyboard@0 {
-                                                        reg = <0x0>;
-                                                        compatible = "pnpPNP,303";
-                                                };
-
-                                                mouse@1 {
-                                                        reg = <0x1>;
-                                                        compatible = "pnpPNP,f03";
-                                                };
-                                        };
-
-                                        rtc@70 {
-                                                compatible = "pnpPNP,b00";
-                                                reg = <0x1 0x70 0x2>;
-                                        };
-
-                                        gpio@400 {
-                                                reg = <0x1 0x400 0x80>;
-                                        };
-                                };
-                        };
                 };
-
         };
 
         pci1: pcie@fffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xe0000000
                                   0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
@@ -771,31 +66,10 @@
         };
 
         pci2: pcie@fffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xe0000000
                                   0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
@@ -806,3 +80,11 @@
                 };
         };
 };
+
+/*
+ * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
+ * for interrupt-map & interrupt-map-mask
+ */
+
+/include/ "fsl/mpc8572si-post.dtsi"
+/include/ "mpc8572ds.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index 3375c2ab0c32..d34d12712125 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -14,494 +14,69 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "mpc8572ds.dts"
+
 / {
         model = "fsl,MPC8572DS";
         compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
-        #address-cells = <1>;
-        #size-cells = <1>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                serial0 = &serial0;
-                pci0 = &pci0;
-                pci1 = &pci1;
-        };
 
         cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
                 PowerPC,8572@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
                 };
-
+                PowerPC,8572@1 {
+                        status = "disabled";
+                };
         };
 
-        memory {
-                device_type = "memory";
-                reg = <0x0 0x0>;        // Filled by U-Boot
+        localbus@ffe05000 {
+                status = "disabled";
         };
 
         soc8572@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
+                serial@4600 {
+                        status = "disabled";
                 };
-
-                ecm@1000 {
-                        compatible = "fsl,mpc8572-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
+                dma@c300 {
+                        status = "disabled";
                 };
-
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8572-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
+                gpio-controller@f000 {
                 };
-
-                memory-controller@6000 {
-                        compatible = "fsl,mpc8572-memory-controller";
-                        reg = <0x6000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8572-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
+                l2-cache-controller@20000 {
                         cache-size = <0x80000>; // L2, 512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
                 };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
+                ethernet@26000 {
+                        status = "disabled";
                 };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
+                mdio@26520 {
+                        status = "disabled";
                 };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
+                ethernet@27000 {
+                        status = "disabled";
                 };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x0>;
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <10 1>;
-                                        reg = <0x1>;
-                                };
-                        };
+                mdio@27520 {
+                        status = "disabled";
                 };
-
-                enet1: ethernet@25000 {
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
+                pic@40000 {
+                        protected-sources = <
+                        31 32 33 37 38 39       /* enet2 enet3 */
+                        76 77 78 79 26 42       /* dma2 pci2 serial*/
+                        0xe4 0xe5 0xe6 0xe7     /* msi */
+                        >;
                 };
 
                 msi@41600 {
-                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
                         msi-available-ranges = <0 0x80>;
                         interrupts = <
                                 0xe0 0
                                 0xe1 0
                                 0xe2 0
                                 0xe3 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,mpc8572-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
-                                     "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x9fe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                        protected-sources = <
-                        31 32 33 37 38 39       /* enet2 enet3 */
-                        76 77 78 79 26 42       /* dma2 pci2 serial*/
-                        0xe4 0xe5 0xe6 0xe7     /* msi */
-                        >;
                 };
-        };
-
-        pci0: pcie@ffe08000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xffe08000 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x11 func 0 - PCI slot 1 */
-                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 1 - PCI slot 1 */
-                        0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 2 - PCI slot 1 */
-                        0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 3 - PCI slot 1 */
-                        0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 4 - PCI slot 1 */
-                        0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 5 - PCI slot 1 */
-                        0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 6 - PCI slot 1 */
-                        0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x11 func 7 - PCI slot 1 */
-                        0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
-
-                        /* IDSEL 0x12 func 0 - PCI slot 2 */
-                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 1 - PCI slot 2 */
-                        0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 2 - PCI slot 2 */
-                        0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 3 - PCI slot 2 */
-                        0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 4 - PCI slot 2 */
-                        0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 5 - PCI slot 2 */
-                        0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 6 - PCI slot 2 */
-                        0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        /* IDSEL 0x12 func 7 - PCI slot 2 */
-                        0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
-                        0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
-                        0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
-                        0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
-
-                        // IDSEL 0x1c  USB
-                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
-                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
-                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
-                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
-
-                        // IDSEL 0x1d  Audio
-                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
-
-                        // IDSEL 0x1e Legacy
-                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
-                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
-
-                        // IDSEL 0x1f IDE/SATA
-                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
-                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
-
-                        >;
-
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0x80000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x10000>;
-                        uli1575@0 {
-                                reg = <0x0 0x0 0x0 0x0 0x0>;
-                                #size-cells = <2>;
-                                #address-cells = <3>;
-                                ranges = <0x2000000 0x0 0x80000000
-                                          0x2000000 0x0 0x80000000
-                                          0x0 0x20000000
-
-                                          0x1000000 0x0 0x0
-                                          0x1000000 0x0 0x0
-                                          0x0 0x10000>;
-                                isa@1e {
-                                        device_type = "isa";
-                                        #interrupt-cells = <2>;
-                                        #size-cells = <1>;
-                                        #address-cells = <2>;
-                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
-                                        ranges = <0x1 0x0 0x1000000 0x0 0x0
-                                                  0x1000>;
-                                        interrupt-parent = <&i8259>;
-
-                                        i8259: interrupt-controller@20 {
-                                                reg = <0x1 0x20 0x2
-                                                       0x1 0xa0 0x2
-                                                       0x1 0x4d0 0x2>;
-                                                interrupt-controller;
-                                                device_type = "interrupt-controller";
-                                                #address-cells = <0>;
-                                                #interrupt-cells = <2>;
-                                                compatible = "chrp,iic";
-                                                interrupts = <9 2>;
-                                                interrupt-parent = <&mpic>;
-                                        };
-
-                                        i8042@60 {
-                                                #size-cells = <0>;
-                                                #address-cells = <1>;
-                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
-                                                interrupts = <1 3 12 3>;
-                                                interrupt-parent =
-                                                        <&i8259>;
-
-                                                keyboard@0 {
-                                                        reg = <0x0>;
-                                                        compatible = "pnpPNP,303";
-                                                };
-
-                                                mouse@1 {
-                                                        reg = <0x1>;
-                                                        compatible = "pnpPNP,f03";
-                                                };
-                                        };
-
-                                        rtc@70 {
-                                                compatible = "pnpPNP,b00";
-                                                reg = <0x1 0x70 0x2>;
-                                        };
-
-                                        gpio@400 {
-                                                reg = <0x1 0x400 0x80>;
-                                        };
-                                };
-                        };
+                timer@42100 {
+                        status = "disabled";
                 };
-
         };
-
-        pci1: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xffe09000 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xa0000000
-                                  0x2000000 0x0 0xa0000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x10000>;
-                };
+        pcie@ffe0a000 {
+                status = "disabled";
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index e7b477f6a3fe..d6a8fafc0d0d 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -15,169 +15,74 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "mpc8572ds.dts"
+
 / {
         model = "fsl,MPC8572DS";
         compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
-        #address-cells = <1>;
-        #size-cells = <1>;
-
-        aliases {
-                ethernet2 = &enet2;
-                ethernet3 = &enet3;
-                serial0 = &serial0;
-                pci2 = &pci2;
-        };
 
         cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
+                PowerPC,8572@0 {
+                        status = "disabled";
+                };
                 PowerPC,8572@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        d-cache-line-size = <32>;       // 32 bytes
-                        i-cache-line-size = <32>;       // 32 bytes
-                        d-cache-size = <0x8000>;                // L1, 32K
-                        i-cache-size = <0x8000>;                // L1, 32K
-                        timebase-frequency = <0>;
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
                 };
         };
 
-        memory {
-                device_type = "memory";
-                reg = <0x0 0x0>;        // Filled by U-Boot
+        localbus@ffe05000 {
+                status = "disabled";
         };
 
         soc8572@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8572-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2, 512K
-                        interrupt-parent = <&mpic>;
+                ecm-law@0 {
+                        status = "disabled";
                 };
-
-                dma@c300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8572-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
-                        };
+                ecm@1000 {
+                        status = "disabled";
+                };
+                memory-controller@2000 {
+                        status = "disabled";
+                };
+                memory-controller@6000 {
+                        status = "disabled";
+                };
+                i2c@3000 {
+                        status = "disabled";
+                };
+                i2c@3100 {
+                        status = "disabled";
+                };
+                serial@4500 {
+                        status = "disabled";
+                };
+                gpio-controller@f000 {
+                        status = "disabled";
+                };
+                l2-cache-controller@20000 {
+                        cache-size = <0x80000>; // L2, 512K
+                };
+                dma@21300 {
+                        status = "disabled";
+                };
+                ethernet@24000 {
+                        status = "disabled";
                 };
-
                 mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                reg = <0x2>;
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                reg = <0x3>;
-                        };
+                        status = "disabled";
                 };
-
-                enet2: ethernet@26000 {
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-                        phy-handle = <&phy2>;
-                        phy-connection-type = "rgmii-id";
+                ptp_clock@24e00 {
+                        status = "disabled";
                 };
-
-                enet3: ethernet@27000 {
-                        cell-index = <3>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x27000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <37 2 38 2 39 2>;
-                        interrupt-parent = <&mpic>;
-                        phy-handle = <&phy3>;
-                        phy-connection-type = "rgmii-id";
+                ethernet@25000 {
+                        status = "disabled";
                 };
-
-                msi@41600 {
-                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0x80 0x80>;
-                        interrupts = <
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
+                mdio@25520 {
+                        status = "disabled";
                 };
-
-                serial0: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
+                crypto@30000 {
+                        status = "disabled";
                 };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
+                pic@40000 {
                         protected-sources = <
                         18 16 10 42 45 58       /* MEM L2 mdio serial crypto */
                         29 30 34 35 36 40       /* enet0 enet1 */
@@ -189,41 +94,25 @@
                         0xe0 0xe1 0xe2 0xe3     /* msi */
                         >;
                 };
-        };
-
-        pci2: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0xffe0a000 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
-                          0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
-                                  0x2000000 0x0 0xc0000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x10000>;
+                timer@41100 {
+                        status = "disabled";
                 };
+                msi@41600 {
+                        msi-available-ranges = <0x80 0x80>;
+                        interrupts = <
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                };
+                global-utilities@e0000 {
+                        status = "disabled";
+                };
+        };
+        pcie@ffe08000 {
+                status = "disabled";
+        };
+        pcie@ffe09000 {
+                status = "disabled";
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 83c3218cb4da..6a109a0ceac9 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -175,7 +175,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -186,7 +186,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 848320e4d3c4..1e8666ccbed8 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -26,13 +26,6 @@
                 serial1 = &serial1;
                 pci0 = &pci0;
                 pci1 = &pci1;
-/*
- * Only one of Rapid IO or PCI can be present due to HW limitations and
- * due to the fact that the 2 now share address space in the new memory
- * map.  The most likely case is that we have PCI, so comment out the
- * rapidio node.  Leave it here for reference.
- */
-                /* rapidio0 = &rapidio0; */
         };
 
         cpus {
@@ -335,7 +328,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -345,7 +338,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <28 2>;
@@ -361,6 +354,41 @@
                         device_type = "open-pic";
                 };
 
+                rmu: rmu@d3000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,srio-rmu";
+                        reg = <0xd3000 0x500>;
+                        ranges = <0x0 0xd3000 0x500>;
+
+                        message-unit@0 {
+                                compatible = "fsl,srio-msg-unit";
+                                reg = <0x0 0x100>;
+                                interrupts = <
+                                        53 2 /* msg1_tx_irq */
+                                        54 2>;/* msg1_rx_irq */
+                        };
+                        message-unit@100 {
+                                compatible = "fsl,srio-msg-unit";
+                                reg = <0x100 0x100>;
+                                interrupts = <
+                                        55 2  /* msg2_tx_irq */
+                                        56 2>;/* msg2_rx_irq */
+                        };
+                        doorbell-unit@400 {
+                                compatible = "fsl,srio-dbell-unit";
+                                reg = <0x400 0x80>;
+                                interrupts = <
+                                        49 2  /* bell_outb_irq */
+                                        50 2>;/* bell_inb_irq */
+                        };
+                        port-write-unit@4e0 {
+                                compatible = "fsl,srio-port-write-unit";
+                                reg = <0x4e0 0x20>;
+                                interrupts = <48 2>;
+                        };
+                };
+
                 global-utilities@e0000 {
                         compatible = "fsl,mpc8641-guts";
                         reg = <0xe0000 0x1000>;
@@ -612,16 +640,27 @@
                 };
         };
 /*
-        rapidio0: rapidio@ffec0000 {
+ * Only one of Rapid IO or PCI can be present due to HW limitations and
+ * due to the fact that the 2 now share address space in the new memory
+ * map.  The most likely case is that we have PCI, so comment out the
+ * rapidio node.  Leave it here for reference.
+
+        rapidio@ffec0000 {
+                reg = <0xffec0000 0x11000>;
+                compatible = "fsl,srio";
+                interrupt-parent = <&mpic>;
+                interrupts = <48 2>;
                 #address-cells = <2>;
                 #size-cells = <2>;
-                compatible = "fsl,rapidio-delta";
-                reg = <0xffec0000 0x20000>;
-                ranges = <0 0 0x80000000 0 0x20000000>;
-                interrupt-parent = <&mpic>;
-                // err_irq bell_outb_irq bell_inb_irq
-                //      msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
-                interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
+                fsl,srio-rmu-handle = <&rmu>;
+                ranges;
+
+                port1 {
+                        #address-cells = <2>;
+                        #size-cells = <2>;
+                        cell-index = <1>;
+                        ranges = <0 0 0x80000000 0 0x20000000>;
+                };
         };
 */
 
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
index 8be8e701e1d3..fd4cd4da60b5 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
@@ -328,7 +328,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -338,7 +338,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <28 2>;
diff --git a/arch/powerpc/boot/dts/obs600.dts b/arch/powerpc/boot/dts/obs600.dts
new file mode 100644
index 000000000000..18e7d79ee4c3
--- /dev/null
+++ b/arch/powerpc/boot/dts/obs600.dts
@@ -0,0 +1,314 @@
+/*
+ * Device Tree Source for PlatHome OpenBlockS 600 (405EX)
+ *
+ * Copyright 2011 Ben Herrenschmidt, IBM Corp.
+ *
+ * Based on Kilauea by:
+ *
+ * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        model = "PlatHome,OpenBlockS 600";
+        compatible = "plathome,obs600";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                ethernet0 = &EMAC0;
+                ethernet1 = &EMAC1;
+                serial0 = &UART0;
+                serial1 = &UART1;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,405EX";
+                        reg = <0x00000000>;
+                        clock-frequency = <0>; /* Filled in by U-Boot */
+                        timebase-frequency = <0>; /* Filled in by U-Boot */
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <16384>; /* 16 kB */
+                        d-cache-size = <16384>; /* 16 kB */
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
+        };
+
+        UIC0: interrupt-controller {
+                compatible = "ibm,uic-405ex", "ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0x0c0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic-405ex","ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0x0d0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        UIC2: interrupt-controller2 {
+                compatible = "ibm,uic-405ex","ibm,uic";
+                interrupt-controller;
+                cell-index = <2>;
+                dcr-reg = <0x0e0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        CPM0: cpm {
+                compatible = "ibm,cpm";
+                dcr-access-method = "native";
+                dcr-reg = <0x0b0 0x003>;
+                unused-units = <0x00000000>;
+                idle-doze = <0x02000000>;
+                standby = <0xe3e74800>;
+        };
+
+        plb {
+                compatible = "ibm,plb-405ex", "ibm,plb4";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by U-Boot */
+
+                SDRAM0: memory-controller {
+                        compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
+                        dcr-reg = <0x010 0x002>;
+                        interrupt-parent = <&UIC2>;
+                        interrupts = <0x5 0x4   /* ECC DED Error */
+                                      0x6 0x4>; /* ECC SEC Error */
+                };
+
+                CRYPTO: crypto@ef700000 {
+                        compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
+                        reg = <0xef700000 0x80400>;
+                        interrupt-parent = <&UIC0>;
+                        interrupts = <0x17 0x2>;
+                };
+
+                MAL0: mcmal {
+                        compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
+                        dcr-reg = <0x180 0x062>;
+                        num-tx-chans = <2>;
+                        num-rx-chans = <2>;
+                        interrupt-parent = <&MAL0>;
+                        interrupts = <0x0 0x1 0x2 0x3 0x4>;
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+                                        /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+                                        /*SERR*/  0x2 &UIC1 0x0 0x4
+                                        /*TXDE*/  0x3 &UIC1 0x1 0x4
+                                        /*RXDE*/  0x4 &UIC1 0x2 0x4>;
+                        interrupt-map-mask = <0xffffffff>;
+                };
+
+                POB0: opb {
+                        compatible = "ibm,opb-405ex", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0x80000000 0x80000000 0x10000000
+                                  0xef600000 0xef600000 0x00a00000
+                                  0xf0000000 0xf0000000 0x10000000>;
+                        dcr-reg = <0x0a0 0x005>;
+                        clock-frequency = <0>; /* Filled in by U-Boot */
+
+                        EBC0: ebc {
+                                compatible = "ibm,ebc-405ex", "ibm,ebc";
+                                dcr-reg = <0x012 0x002>;
+                                #address-cells = <2>;
+                                #size-cells = <1>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                /* ranges property is supplied by U-Boot */
+                                interrupts = <0x5 0x1>;
+                                interrupt-parent = <&UIC1>;
+
+                                nor_flash@0,0 {
+                                        compatible = "amd,s29gl512n", "cfi-flash";
+                                        bank-width = <2>;
+                                        reg = <0x00000000 0x00000000 0x08000000>;
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        partition@0 {
+                                                label = "kernel + initrd";
+                                                reg = <0x00000000 0x03de0000>;
+                                        };
+                                        partition@3de0000 {
+                                                label = "user config area";
+                                                reg = <0x03de0000 0x00080000>;
+                                        };
+                                        partition@3e60000 {
+                                                label = "user program area";
+                                                reg = <0x03e60000 0x04000000>;
+                                        };
+                                        partition@7e60000 {
+                                                label = "flat device tree";
+                                                reg = <0x07e60000 0x00080000>;
+                                        };
+                                        partition@7ee0000 {
+                                                label = "test program";
+                                                reg = <0x07ee0000 0x00080000>;
+                                        };
+                                        partition@7f60000 {
+                                                label = "u-boot env";
+                                                reg = <0x07f60000 0x00040000>;
+                                        };
+                                        partition@7fa0000 {
+                                                label = "u-boot";
+                                                reg = <0x07fa0000 0x00060000>;
+                                        };
+                                };
+                        };
+
+                        UART0: serial@ef600200 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <0xef600200 0x00000008>;
+                                virtual-reg = <0xef600200>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x1a 0x4>;
+                        };
+
+                        UART1: serial@ef600300 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <0xef600300 0x00000008>;
+                                virtual-reg = <0xef600300>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                current-speed = <0>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x1 0x4>;
+                        };
+
+                        IIC0: i2c@ef600400 {
+                                compatible = "ibm,iic-405ex", "ibm,iic";
+                                reg = <0xef600400 0x00000014>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x2 0x4>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1340";
+                                        reg = <0x68>;
+                                };
+                        };
+
+                        IIC1: i2c@ef600500 {
+                                compatible = "ibm,iic-405ex", "ibm,iic";
+                                reg = <0xef600500 0x00000014>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x7 0x4>;
+                        };
+
+                        RGMII0: emac-rgmii@ef600b00 {
+                                compatible = "ibm,rgmii-405ex", "ibm,rgmii";
+                                reg = <0xef600b00 0x00000104>;
+                                has-mdio;
+                        };
+
+                        EMAC0: ethernet@ef600900 {
+                                linux,network-index = <0x0>;
+                                device_type = "network";
+                                compatible = "ibm,emac-405ex", "ibm,emac4sync";
+                                interrupt-parent = <&EMAC0>;
+                                interrupts = <0x0 0x1>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
+                                                /*Wake*/  0x1 &UIC1 0x1d 0x4>;
+                                reg = <0xef600900 0x000000c4>;
+                                local-mac-address = [000000000000]; /* Filled in by U-Boot */
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <0>;
+                                mal-rx-channel = <0>;
+                                cell-index = <0>;
+                                max-frame-size = <9000>;
+                                rx-fifo-size = <4096>;
+                                tx-fifo-size = <2048>;
+                                rx-fifo-size-gige = <16384>;
+                                tx-fifo-size-gige = <16384>;
+                                phy-mode = "rgmii";
+                                phy-map = <0x00000000>;
+                                rgmii-device = <&RGMII0>;
+                                rgmii-channel = <0>;
+                                has-inverted-stacr-oc;
+                                has-new-stacr-staopc;
+                        };
+
+                        EMAC1: ethernet@ef600a00 {
+                                linux,network-index = <0x1>;
+                                device_type = "network";
+                                compatible = "ibm,emac-405ex", "ibm,emac4sync";
+                                interrupt-parent = <&EMAC1>;
+                                interrupts = <0x0 0x1>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
+                                                /*Wake*/  0x1 &UIC1 0x1f 0x4>;
+                                reg = <0xef600a00 0x000000c4>;
+                                local-mac-address = [000000000000]; /* Filled in by U-Boot */
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <1>;
+                                mal-rx-channel = <1>;
+                                cell-index = <1>;
+                                max-frame-size = <9000>;
+                                rx-fifo-size = <4096>;
+                                tx-fifo-size = <2048>;
+                                rx-fifo-size-gige = <16384>;
+                                tx-fifo-size-gige = <16384>;
+                                phy-mode = "rgmii";
+                                phy-map = <0x00000000>;
+                                rgmii-device = <&RGMII0>;
+                                rgmii-channel = <1>;
+                                has-inverted-stacr-oc;
+                                has-new-stacr-staopc;
+                        };
+
+                        GPIO: gpio@ef600800 {
+                                device_type = "gpio";
+                                compatible = "ibm,gpio-405ex", "ibm,ppc4xx-gpio";
+                                reg = <0xef600800 0x50>;
+                        };
+                };
+        };
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@ef600200";
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
index d6c669c888e9..b868d22984e9 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -9,230 +9,33 @@
  * option) any later version.
  */
 
-/include/ "p1010si.dtsi"
+/include/ "fsl/p1010si-pre.dtsi"
 
 / {
         model = "fsl,P1010RDB";
         compatible = "fsl,P1010RDB";
 
-        aliases {
-                serial0 = &serial0;
-                serial1 = &serial1;
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                can0 = &can0;
-                can1 = &can1;
-        };
-
         memory {
                 device_type = "memory";
         };
 
-        ifc@ffe1e000 {
+        board_ifc: ifc: ifc@ffe1e000 {
                 /* NOR, NAND Flashes and CPLD on board */
                 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
                           0x1 0x0 0x0 0xff800000 0x00010000
                           0x3 0x0 0x0 0xffb00000 0x00000020>;
-
-                nor@0,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "cfi-flash";
-                        reg = <0x0 0x0 0x2000000>;
-                        bank-width = <2>;
-                        device-width = <1>;
-
-                        partition@40000 {
-                                /* 256KB for DTB Image */
-                                reg = <0x00040000 0x00040000>;
-                                label = "NOR DTB Image";
-                        };
-
-                        partition@80000 {
-                                /* 7 MB for Linux Kernel Image */
-                                reg = <0x00080000 0x00700000>;
-                                label = "NOR Linux Kernel Image";
-                        };
-
-                        partition@800000 {
-                                /* 20MB for JFFS2 based Root file System */
-                                reg = <0x00800000 0x01400000>;
-                                label = "NOR JFFS2 Root File System";
-                        };
-
-                        partition@1f00000 {
-                                /* This location must not be altered  */
-                                /* 512KB for u-boot Bootloader Image */
-                                /* 512KB for u-boot Environment Variables */
-                                reg = <0x01f00000 0x00100000>;
-                                label = "NOR U-Boot Image";
-                                read-only;
-                        };
-                };
-
-                nand@1,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,ifc-nand";
-                        reg = <0x1 0x0 0x10000>;
-
-                        partition@0 {
-                                /* This location must not be altered  */
-                                /* 1MB for u-boot Bootloader Image */
-                                reg = <0x0 0x00100000>;
-                                label = "NAND U-Boot Image";
-                                read-only;
-                        };
-
-                        partition@100000 {
-                                /* 1MB for DTB Image */
-                                reg = <0x00100000 0x00100000>;
-                                label = "NAND DTB Image";
-                        };
-
-                        partition@200000 {
-                                /* 4MB for Linux Kernel Image */
-                                reg = <0x00200000 0x00400000>;
-                                label = "NAND Linux Kernel Image";
-                        };
-
-                        partition@600000 {
-                                /* 4MB for Compressed Root file System Image */
-                                reg = <0x00600000 0x00400000>;
-                                label = "NAND Compressed RFS Image";
-                        };
-
-                        partition@a00000 {
-                                /* 15MB for JFFS2 based Root file System */
-                                reg = <0x00a00000 0x00f00000>;
-                                label = "NAND JFFS2 Root File System";
-                        };
-
-                        partition@1900000 {
-                                /* 7MB for User Area */
-                                reg = <0x01900000 0x00700000>;
-                                label = "NAND User area";
-                        };
-                };
-
-                cpld@3,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p1010rdb-cpld";
-                        reg = <0x3 0x0 0x0000020>;
-                        bank-width = <1>;
-                        device-width = <1>;
-                };
+                reg = <0x0 0xffe1e000 0 0x2000>;
         };
 
-        soc@ffe00000 {
-                spi@7000 {
-                        flash@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "spansion,s25sl12801";
-                                reg = <0>;
-                                spi-max-frequency = <50000000>;
-
-                                partition@0 {
-                                        /* 1MB for u-boot Bootloader Image */
-                                        /* 1MB for Environment */
-                                        reg = <0x0 0x00100000>;
-                                        label = "SPI Flash U-Boot Image";
-                                        read-only;
-                                };
-
-                                partition@100000 {
-                                        /* 512KB for DTB Image */
-                                        reg = <0x00100000 0x00080000>;
-                                        label = "SPI Flash DTB Image";
-                                };
-
-                                partition@180000 {
-                                        /* 4MB for Linux Kernel Image */
-                                        reg = <0x00180000 0x00400000>;
-                                        label = "SPI Flash Linux Kernel Image";
-                                };
-
-                                partition@580000 {
-                                        /* 4MB for Compressed RFS Image */
-                                        reg = <0x00580000 0x00400000>;
-                                        label = "SPI Flash Compressed RFSImage";
-                                };
-
-                                partition@980000 {
-                                        /* 6.5MB for JFFS2 based RFS */
-                                        reg = <0x00980000 0x00680000>;
-                                        label = "SPI Flash JFFS2 RFS";
-                                };
-                        };
-                };
-
-                usb@22000 {
-                        phy_type = "utmi";
-                };
-
-                mdio@24000 {
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x1>;
-                        };
-
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
-                                reg = <0x0>;
-                        };
-
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
-                                reg = <0x2>;
-                        };
-                };
-
-                enet0: ethernet@b0000 {
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-                };
-
-                enet1: ethernet@b1000 {
-                        phy-handle = <&phy1>;
-                        tbi-handle = <&tbi0>;
-                        phy-connection-type = "sgmii";
-                };
-
-                enet2: ethernet@b2000 {
-                        phy-handle = <&phy2>;
-                        tbi-handle = <&tbi1>;
-                        phy-connection-type = "sgmii";
-                };
+        board_soc: soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
         };
 
         pci0: pcie@ffe09000 {
+                reg = <0 0xffe09000 0 0x1000>;
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                        interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                        interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
-
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -244,24 +47,10 @@
         };
 
         pci1: pcie@ffe0a000 {
+                reg = <0 0xffe0a000 0 0x1000>;
                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                        interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                        interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
                                   0x0 0x20000000
@@ -272,3 +61,6 @@
                 };
         };
 };
+
+/include/ "p1010rdb.dtsi"
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/p1010rdb.dtsi
new file mode 100644
index 000000000000..d4c4a7730285
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -0,0 +1,234 @@
+/*
+ * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_ifc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x2000000>;
+                bank-width = <2>;
+                device-width = <1>;
+
+                partition@40000 {
+                        /* 256KB for DTB Image */
+                        reg = <0x00040000 0x00040000>;
+                        label = "NOR DTB Image";
+                };
+
+                partition@80000 {
+                        /* 7 MB for Linux Kernel Image */
+                        reg = <0x00080000 0x00700000>;
+                        label = "NOR Linux Kernel Image";
+                };
+
+                partition@800000 {
+                        /* 20MB for JFFS2 based Root file System */
+                        reg = <0x00800000 0x01400000>;
+                        label = "NOR JFFS2 Root File System";
+                };
+
+                partition@1f00000 {
+                        /* This location must not be altered  */
+                        /* 512KB for u-boot Bootloader Image */
+                        /* 512KB for u-boot Environment Variables */
+                        reg = <0x01f00000 0x00100000>;
+                        label = "NOR U-Boot Image";
+                        read-only;
+                };
+        };
+
+        nand@1,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,ifc-nand";
+                reg = <0x1 0x0 0x10000>;
+
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 1MB for u-boot Bootloader Image */
+                        reg = <0x0 0x00100000>;
+                        label = "NAND U-Boot Image";
+                        read-only;
+                };
+
+                partition@100000 {
+                        /* 1MB for DTB Image */
+                        reg = <0x00100000 0x00100000>;
+                        label = "NAND DTB Image";
+                };
+
+                partition@200000 {
+                        /* 4MB for Linux Kernel Image */
+                        reg = <0x00200000 0x00400000>;
+                        label = "NAND Linux Kernel Image";
+                };
+
+                partition@600000 {
+                        /* 4MB for Compressed Root file System Image */
+                        reg = <0x00600000 0x00400000>;
+                        label = "NAND Compressed RFS Image";
+                };
+
+                partition@a00000 {
+                        /* 15MB for JFFS2 based Root file System */
+                        reg = <0x00a00000 0x00f00000>;
+                        label = "NAND JFFS2 Root File System";
+                };
+
+                partition@1900000 {
+                        /* 7MB for User Area */
+                        reg = <0x01900000 0x00700000>;
+                        label = "NAND User area";
+                };
+        };
+
+        cpld@3,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,p1010rdb-cpld";
+                reg = <0x3 0x0 0x0000020>;
+                bank-width = <1>;
+                device-width = <1>;
+        };
+};
+
+&board_soc {
+        i2c@3000 {
+                rtc@68 {
+                        compatible = "pericom,pt7c4338";
+                        reg = <0x68>;
+                };
+        };
+
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,s25sl12801";
+                        reg = <0>;
+                        spi-max-frequency = <50000000>;
+
+                        partition@0 {
+                                /* 1MB for u-boot Bootloader Image */
+                                /* 1MB for Environment */
+                                reg = <0x0 0x00100000>;
+                                label = "SPI Flash U-Boot Image";
+                                read-only;
+                        };
+
+                        partition@100000 {
+                                /* 512KB for DTB Image */
+                                reg = <0x00100000 0x00080000>;
+                                label = "SPI Flash DTB Image";
+                        };
+
+                        partition@180000 {
+                                /* 4MB for Linux Kernel Image */
+                                reg = <0x00180000 0x00400000>;
+                                label = "SPI Flash Linux Kernel Image";
+                        };
+
+                        partition@580000 {
+                                /* 4MB for Compressed RFS Image */
+                                reg = <0x00580000 0x00400000>;
+                                label = "SPI Flash Compressed RFSImage";
+                        };
+
+                        partition@980000 {
+                                /* 6.5MB for JFFS2 based RFS */
+                                reg = <0x00980000 0x00680000>;
+                                label = "SPI Flash JFFS2 RFS";
+                        };
+                };
+        };
+
+        usb@22000 {
+                phy_type = "utmi";
+                dr_mode = "host";
+        };
+
+        mdio@24000 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x1>;
+                };
+
+                phy1: ethernet-phy@1 {
+                        interrupts = <2 1 0 0>;
+                        reg = <0x0>;
+                };
+
+                phy2: ethernet-phy@2 {
+                        interrupts = <2 1 0 0>;
+                        reg = <0x2>;
+                };
+
+                tbi-phy@3 {
+                        device-type = "tbi-phy";
+                        reg = <0x3>;
+                };
+        };
+
+        mdio@25000 {
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        mdio@26000 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet0: ethernet@b0000 {
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        enet1: ethernet@b1000 {
+                phy-handle = <&phy1>;
+                tbi-handle = <&tbi0>;
+                phy-connection-type = "sgmii";
+        };
+
+        enet2: ethernet@b2000 {
+                phy-handle = <&phy2>;
+                tbi-handle = <&tbi1>;
+                phy-connection-type = "sgmii";
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1010rdb_36b.dts b/arch/powerpc/boot/dts/p1010rdb_36b.dts
new file mode 100644
index 000000000000..64776f4a4651
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1010rdb_36b.dts
@@ -0,0 +1,89 @@
+/*
+ * P1010 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+        model = "fsl,P1010RDB";
+        compatible = "fsl,P1010RDB";
+
+        memory {
+                device_type = "memory";
+        };
+
+        board_ifc: ifc: ifc@fffe1e000 {
+                /* NOR, NAND Flashes and CPLD on board */
+                ranges = <0x0 0x0 0xf 0xee000000 0x02000000
+                          0x1 0x0 0xf 0xff800000 0x00010000
+                          0x3 0x0 0xf 0xffb00000 0x00000020>;
+                reg = <0xf 0xffe1e000 0 0x2000>;
+        };
+
+        board_soc: soc: soc@fffe00000 {
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
+        };
+
+        pci0: pcie@fffe09000 {
+                reg = <0xf 0xffe09000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        pci1: pcie@fffe0a000 {
+                reg = <0xf 0xffe0a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+
+/include/ "p1010rdb.dtsi"
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1010si.dtsi b/arch/powerpc/boot/dts/p1010si.dtsi
deleted file mode 100644
index cabe0a453ae6..000000000000
--- a/arch/powerpc/boot/dts/p1010si.dtsi
+++ /dev/null
@@ -1,374 +0,0 @@
-/*
- * P1010si Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-/dts-v1/;
-/ {
-        compatible = "fsl,P1010";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,P1010@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-        };
-
-        ifc@ffe1e000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,ifc", "simple-bus";
-                reg = <0x0 0xffe1e000 0 0x2000>;
-                interrupts = <16 2 19 2>;
-                interrupt-parent = <&mpic>;
-        };
-
-        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p1010-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,p1010-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,p1010-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                spi@7000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc8536-espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,espi-num-chipselects = <1>;
-                };
-
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-
-                sata@18000 {
-                        compatible = "fsl,pq-sata-v2";
-                        reg = <0x18000 0x1000>;
-                        cell-index = <1>;
-                        interrupts = <74 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                sata@19000 {
-                        compatible = "fsl,pq-sata-v2";
-                        reg = <0x19000 0x1000>;
-                        cell-index = <2>;
-                        interrupts = <41 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                can0: can@1c000 {
-                        compatible = "fsl,p1010-flexcan";
-                        reg = <0x1c000 0x1000>;
-                        interrupts = <48 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                can1: can@1d000 {
-                        compatible = "fsl,p1010-flexcan";
-                        reg = <0x1d000 0x1000>;
-                        interrupts = <61 0x2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p1010-l2-cache-controller",
-                                        "fsl,p1014-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2,256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p1010-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p1010-dma-channel", "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                usb@22000 {
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
-                        dr_mode = "host";
-                };
-
-                mdio@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-mdio";
-                        reg = <0x24000 0x1000 0xb0030 0x4>;
-                };
-
-                mdio@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-tbi";
-                        reg = <0x25000 0x1000 0xb1030 0x4>;
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-tbi";
-                        reg = <0x26000 0x1000 0xb1030 0x4>;
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x8>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                        fsl,sdhci-auto-cmd12;
-                };
-
-                enet0: ethernet@b0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
-
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb0000 0x1000>;
-                                fsl,rx-bit-map = <0xff>;
-                                fsl,tx-bit-map = <0xff>;
-                                interrupts = <29 2 30 2 34 2>;
-                        };
-
-                };
-
-                enet1: ethernet@b1000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
-
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb1000 0x1000>;
-                                fsl,rx-bit-map = <0xff>;
-                                fsl,tx-bit-map = <0xff>;
-                                interrupts = <35 2 36 2 40 2>;
-                        };
-
-                };
-
-                enet2: ethernet@b2000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
-
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb2000 0x1000>;
-                                fsl,rx-bit-map = <0xff>;
-                                fsl,tx-bit-map = <0xff>;
-                                interrupts = <31 2 32 2 33 2>;
-                        };
-
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,p1010-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p1010-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-        };
-
-        pci0: pcie@ffe09000 {
-                compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
-        };
-
-        pci1: pcie@ffe0a000 {
-                compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
-        };
-};
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index d6a8ae458137..518bf99b1f50 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -9,267 +9,33 @@
  * option) any later version.
  */
 
-/include/ "p1020si.dtsi"
-
+/include/ "fsl/p1020si-pre.dtsi"
 / {
         model = "fsl,P1020RDB";
         compatible = "fsl,P1020RDB";
 
-        aliases {
-                serial0 = &serial0;
-                serial1 = &serial1;
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                pci0 = &pci0;
-                pci1 = &pci1;
-        };
-
         memory {
                 device_type = "memory";
         };
 
-        localbus@ffe05000 {
+        board_lbc: lbc: localbus@ffe05000 {
+                reg = <0 0xffe05000 0 0x1000>;
 
                 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
                 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
                           0x1 0x0 0x0 0xffa00000 0x00040000
                           0x2 0x0 0x0 0xffb00000 0x00020000>;
-
-                nor@0,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "cfi-flash";
-                        reg = <0x0 0x0 0x1000000>;
-                        bank-width = <2>;
-                        device-width = <1>;
-
-                        partition@0 {
-                                /* This location must not be altered  */
-                                /* 256KB for Vitesse 7385 Switch firmware */
-                                reg = <0x0 0x00040000>;
-                                label = "NOR (RO) Vitesse-7385 Firmware";
-                                read-only;
-                        };
-
-                        partition@40000 {
-                                /* 256KB for DTB Image */
-                                reg = <0x00040000 0x00040000>;
-                                label = "NOR (RO) DTB Image";
-                                read-only;
-                        };
-
-                        partition@80000 {
-                                /* 3.5 MB for Linux Kernel Image */
-                                reg = <0x00080000 0x00380000>;
-                                label = "NOR (RO) Linux Kernel Image";
-                                read-only;
-                        };
-
-                        partition@400000 {
-                                /* 11MB for JFFS2 based Root file System */
-                                reg = <0x00400000 0x00b00000>;
-                                label = "NOR (RW) JFFS2 Root File System";
-                        };
-
-                        partition@f00000 {
-                                /* This location must not be altered  */
-                                /* 512KB for u-boot Bootloader Image */
-                                /* 512KB for u-boot Environment Variables */
-                                reg = <0x00f00000 0x00100000>;
-                                label = "NOR (RO) U-Boot Image";
-                                read-only;
-                        };
-                };
-
-                nand@1,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p1020-fcm-nand",
-                                     "fsl,elbc-fcm-nand";
-                        reg = <0x1 0x0 0x40000>;
-
-                        partition@0 {
-                                /* This location must not be altered  */
-                                /* 1MB for u-boot Bootloader Image */
-                                reg = <0x0 0x00100000>;
-                                label = "NAND (RO) U-Boot Image";
-                                read-only;
-                        };
-
-                        partition@100000 {
-                                /* 1MB for DTB Image */
-                                reg = <0x00100000 0x00100000>;
-                                label = "NAND (RO) DTB Image";
-                                read-only;
-                        };
-
-                        partition@200000 {
-                                /* 4MB for Linux Kernel Image */
-                                reg = <0x00200000 0x00400000>;
-                                label = "NAND (RO) Linux Kernel Image";
-                                read-only;
-                        };
-
-                        partition@600000 {
-                                /* 4MB for Compressed Root file System Image */
-                                reg = <0x00600000 0x00400000>;
-                                label = "NAND (RO) Compressed RFS Image";
-                                read-only;
-                        };
-
-                        partition@a00000 {
-                                /* 7MB for JFFS2 based Root file System */
-                                reg = <0x00a00000 0x00700000>;
-                                label = "NAND (RW) JFFS2 Root File System";
-                        };
-
-                        partition@1100000 {
-                                /* 15MB for JFFS2 based Root file System */
-                                reg = <0x01100000 0x00f00000>;
-                                label = "NAND (RW) Writable User area";
-                        };
-                };
-
-                L2switch@2,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "vitesse-7385";
-                        reg = <0x2 0x0 0x20000>;
-                };
-
         };
 
-        soc@ffe00000 {
-                i2c@3000 {
-                        rtc@68 {
-                                compatible = "dallas,ds1339";
-                                reg = <0x68>;
-                        };
-                };
-
-                spi@7000 {
-
-                        fsl_m25p80@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
-                                reg = <0>;
-                                linux,modalias = "fsl_m25p80";
-                                modal = "s25sl128b";
-                                spi-max-frequency = <50000000>;
-                                mode = <0>;
-
-                                partition@0 {
-                                        /* 512KB for u-boot Bootloader Image */
-                                        reg = <0x0 0x00080000>;
-                                        label = "SPI (RO) U-Boot Image";
-                                        read-only;
-                                };
-
-                                partition@80000 {
-                                        /* 512KB for DTB Image */
-                                        reg = <0x00080000 0x00080000>;
-                                        label = "SPI (RO) DTB Image";
-                                        read-only;
-                                };
-
-                                partition@100000 {
-                                        /* 4MB for Linux Kernel Image */
-                                        reg = <0x00100000 0x00400000>;
-                                        label = "SPI (RO) Linux Kernel Image";
-                                        read-only;
-                                };
-
-                                partition@500000 {
-                                        /* 4MB for Compressed RFS Image */
-                                        reg = <0x00500000 0x00400000>;
-                                        label = "SPI (RO) Compressed RFS Image";
-                                        read-only;
-                                };
-
-                                partition@900000 {
-                                        /* 7MB for JFFS2 based RFS */
-                                        reg = <0x00900000 0x00700000>;
-                                        label = "SPI (RW) JFFS2 RFS";
-                                };
-                        };
-                };
-
-                mdio@24000 {
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x0>;
-                        };
-
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
-                                reg = <0x1>;
-                        };
-                };
-
-                mdio@25000 {
-
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                enet0: ethernet@b0000 {
-                        fixed-link = <1 1 1000 0 0>;
-                        phy-connection-type = "rgmii-id";
-
-                };
-
-                enet1: ethernet@b1000 {
-                        phy-handle = <&phy0>;
-                        tbi-handle = <&tbi0>;
-                        phy-connection-type = "sgmii";
-
-                };
-
-                enet2: ethernet@b2000 {
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-
-                };
-
-                usb@22000 {
-                        phy_type = "ulpi";
-                };
-
-                /* USB2 is shared with localbus, so it must be disabled
-                   by default. We can't put 'status = "disabled";' here
-                   since U-Boot doesn't clear the status property when
-                   it enables USB2. OTOH, U-Boot does create a new node
-                   when there isn't any. So, just comment it out.
-                usb@23000 {
-                        phy_type = "ulpi";
-                };
-                */
-
+        board_soc: soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
         };
 
         pci0: pcie@ffe09000 {
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
+                reg = <0 0xffe09000 0 0x1000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -281,21 +47,10 @@
         };
 
         pci1: pcie@ffe0a000 {
+                reg = <0 0xffe0a000 0 0x1000>;
                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
                                   0x0 0x20000000
@@ -306,3 +61,6 @@
                 };
         };
 };
+
+/include/ "p1020rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb.dtsi b/arch/powerpc/boot/dts/p1020rdb.dtsi
new file mode 100644
index 000000000000..b5bd86f4baf2
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb.dtsi
@@ -0,0 +1,247 @@
+/*
+ * P1020 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_lbc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x1000000>;
+                bank-width = <2>;
+                device-width = <1>;
+
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 256KB for Vitesse 7385 Switch firmware */
+                        reg = <0x0 0x00040000>;
+                        label = "NOR (RO) Vitesse-7385 Firmware";
+                        read-only;
+                };
+
+                partition@40000 {
+                        /* 256KB for DTB Image */
+                        reg = <0x00040000 0x00040000>;
+                        label = "NOR (RO) DTB Image";
+                        read-only;
+                };
+
+                partition@80000 {
+                        /* 3.5 MB for Linux Kernel Image */
+                        reg = <0x00080000 0x00380000>;
+                        label = "NOR (RO) Linux Kernel Image";
+                        read-only;
+                };
+
+                partition@400000 {
+                        /* 11MB for JFFS2 based Root file System */
+                        reg = <0x00400000 0x00b00000>;
+                        label = "NOR (RW) JFFS2 Root File System";
+                };
+
+                partition@f00000 {
+                        /* This location must not be altered  */
+                        /* 512KB for u-boot Bootloader Image */
+                        /* 512KB for u-boot Environment Variables */
+                        reg = <0x00f00000 0x00100000>;
+                        label = "NOR (RO) U-Boot Image";
+                        read-only;
+                };
+        };
+
+        nand@1,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,p1020-fcm-nand",
+                             "fsl,elbc-fcm-nand";
+                reg = <0x1 0x0 0x40000>;
+
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 1MB for u-boot Bootloader Image */
+                        reg = <0x0 0x00100000>;
+                        label = "NAND (RO) U-Boot Image";
+                        read-only;
+                };
+
+                partition@100000 {
+                        /* 1MB for DTB Image */
+                        reg = <0x00100000 0x00100000>;
+                        label = "NAND (RO) DTB Image";
+                        read-only;
+                };
+
+                partition@200000 {
+                        /* 4MB for Linux Kernel Image */
+                        reg = <0x00200000 0x00400000>;
+                        label = "NAND (RO) Linux Kernel Image";
+                        read-only;
+                };
+
+                partition@600000 {
+                        /* 4MB for Compressed Root file System Image */
+                        reg = <0x00600000 0x00400000>;
+                        label = "NAND (RO) Compressed RFS Image";
+                        read-only;
+                };
+
+                partition@a00000 {
+                        /* 7MB for JFFS2 based Root file System */
+                        reg = <0x00a00000 0x00700000>;
+                        label = "NAND (RW) JFFS2 Root File System";
+                };
+
+                partition@1100000 {
+                        /* 15MB for JFFS2 based Root file System */
+                        reg = <0x01100000 0x00f00000>;
+                        label = "NAND (RW) Writable User area";
+                };
+        };
+
+        L2switch@2,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "vitesse-7385";
+                reg = <0x2 0x0 0x20000>;
+        };
+};
+
+&board_soc {
+        i2c@3000 {
+                rtc@68 {
+                        compatible = "dallas,ds1339";
+                        reg = <0x68>;
+                };
+        };
+
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,s25sl12801";
+                        reg = <0>;
+                        spi-max-frequency = <40000000>; /* input clock */
+
+                        partition@u-boot {
+                                /* 512KB for u-boot Bootloader Image */
+                                reg = <0x0 0x00080000>;
+                                label = "u-boot";
+                                read-only;
+                        };
+
+                        partition@dtb {
+                                /* 512KB for DTB Image */
+                                reg = <0x00080000 0x00080000>;
+                                label = "dtb";
+                                read-only;
+                        };
+
+                        partition@kernel {
+                                /* 4MB for Linux Kernel Image */
+                                reg = <0x00100000 0x00400000>;
+                                label = "kernel";
+                                read-only;
+                        };
+
+                        partition@fs {
+                                /* 4MB for Compressed RFS Image */
+                                reg = <0x00500000 0x00400000>;
+                                label = "file system";
+                                read-only;
+                        };
+
+                        partition@jffs-fs {
+                                /* 7MB for JFFS2 based RFS */
+                                reg = <0x00900000 0x00700000>;
+                                label = "file system jffs2";
+                        };
+                };
+        };
+
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+
+        /* USB2 is shared with localbus, so it must be disabled
+           by default. We can't put 'status = "disabled";' here
+           since U-Boot doesn't clear the status property when
+           it enables USB2. OTOH, U-Boot does create a new node
+           when there isn't any. So, just comment it out.
+        usb@23000 {
+                phy_type = "ulpi";
+        };
+        */
+
+        mdio@24000 {
+                phy0: ethernet-phy@0 {
+                        interrupt-parent = <&mpic>;
+                        interrupts = <3 1>;
+                        reg = <0x0>;
+                };
+
+                phy1: ethernet-phy@1 {
+                        interrupt-parent = <&mpic>;
+                        interrupts = <2 1>;
+                        reg = <0x1>;
+                };
+
+                tbi-phy@2 {
+                        device_type = "tbi-phy";
+                        reg = <0x2>;
+                };
+        };
+
+        mdio@25000 {
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet0: ethernet@b0000 {
+                fixed-link = <1 1 1000 0 0>;
+                phy-connection-type = "rgmii-id";
+
+        };
+
+        enet1: ethernet@b1000 {
+                phy-handle = <&phy0>;
+                tbi-handle = <&tbi0>;
+                phy-connection-type = "sgmii";
+        };
+
+        enet2: ethernet@b2000 {
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1020rdb_36b.dts b/arch/powerpc/boot/dts/p1020rdb_36b.dts
new file mode 100644
index 000000000000..bdbdb6097e57
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb_36b.dts
@@ -0,0 +1,66 @@
+/*
+ * P1020 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+        model = "fsl,P1020RDB";
+        compatible = "fsl,P1020RDB";
+
+        memory {
+                device_type = "memory";
+        };
+
+        board_lbc: lbc: localbus@fffe05000 {
+                reg = <0xf 0xffe05000 0 0x1000>;
+
+                /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
+                ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+                          0x1 0x0 0xf 0xffa00000 0x00040000
+                          0x2 0x0 0xf 0xffb00000 0x00020000>;
+        };
+
+        board_soc: soc: soc@fffe00000 {
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
+        };
+
+        pci0: pcie@fffe09000 {
+                reg = <0xf 0xffe09000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        pci1: pcie@fffe0a000 {
+                reg = <0xf 0xffe0a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+
+/include/ "p1020rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
index f0bf7f42f097..41b4585c5da8 100644
--- a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
+++ b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
@@ -16,7 +16,7 @@
  * option) any later version.
  */
 
-/include/ "p1020si.dtsi"
+/include/ "p1020rdb.dts"
 
 / {
         model = "fsl,P1020RDB";
@@ -32,7 +32,7 @@
 
         cpus {
                 PowerPC,P1020@1 {
-                status = "disabled";
+                        status = "disabled";
                 };
         };
 
@@ -45,169 +45,19 @@
         };
 
         soc@ffe00000 {
-                i2c@3000 {
-                        rtc@68 {
-                                compatible = "dallas,ds1339";
-                                reg = <0x68>;
-                        };
-                };
-
                 serial1: serial@4600 {
                         status = "disabled";
                 };
 
-                spi@7000 {
-                        fsl_m25p80@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
-                                reg = <0>;
-                                linux,modalias = "fsl_m25p80";
-                                spi-max-frequency = <40000000>;
-
-                                partition@0 {
-                                        /* 512KB for u-boot Bootloader Image */
-                                        reg = <0x0 0x00080000>;
-                                        label = "SPI (RO) U-Boot Image";
-                                        read-only;
-                                };
-
-                                partition@80000 {
-                                        /* 512KB for DTB Image */
-                                        reg = <0x00080000 0x00080000>;
-                                        label = "SPI (RO) DTB Image";
-                                        read-only;
-                                };
-
-                                partition@100000 {
-                                        /* 4MB for Linux Kernel Image */
-                                        reg = <0x00100000 0x00400000>;
-                                        label = "SPI (RO) Linux Kernel Image";
-                                        read-only;
-                                };
-
-                                partition@500000 {
-                                        /* 4MB for Compressed RFS Image */
-                                        reg = <0x00500000 0x00400000>;
-                                        label = "SPI (RO) Compressed RFS Image";
-                                        read-only;
-                                };
-
-                                partition@900000 {
-                                        /* 7MB for JFFS2 based RFS */
-                                        reg = <0x00900000 0x00700000>;
-                                        label = "SPI (RW) JFFS2 RFS";
-                                };
-                        };
-                };
-
-                mdio@24000 {
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x0>;
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
-                                reg = <0x1>;
-                        };
-                };
-
-                mdio@25000 {
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@b0000 {
                         status = "disabled";
                 };
 
-                enet1: ethernet@b1000 {
-                        phy-handle = <&phy0>;
-                        tbi-handle = <&tbi0>;
-                        phy-connection-type = "sgmii";
-                };
-
-                enet2: ethernet@b2000 {
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-                };
-
-                usb@22000 {
-                        phy_type = "ulpi";
-                };
-
-                /* USB2 is shared with localbus, so it must be disabled
-                   by default. We can't put 'status = "disabled";' here
-                   since U-Boot doesn't clear the status property when
-                   it enables USB2. OTOH, U-Boot does create a new node
-                   when there isn't any. So, just comment it out.
-                usb@23000 {
-                        phy_type = "ulpi";
-                };
-                */
-
                 mpic: pic@40000 {
                         protected-sources = <
                         42 29 30 34     /* serial1, enet0-queue-group0 */
                         17 18 24 45     /* enet0-queue-group1, crypto */
                         >;
                 };
-
-        };
-
-        pci0: pcie@ffe09000 {
-                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xa0000000
-                                  0x2000000 0x0 0xa0000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x100000>;
-                };
-        };
-
-        pci1: pcie@ffe0a000 {
-                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0x80000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x100000>;
-                };
         };
 };
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
index 6ec02204a44e..517453821884 100644
--- a/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
+++ b/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
@@ -15,7 +15,7 @@
  * option) any later version.
  */
 
-/include/ "p1020si.dtsi"
+/include/ "p1020rdb.dts"
 
 / {
         model = "fsl,P1020RDB";
@@ -28,7 +28,7 @@
 
         cpus {
                 PowerPC,P1020@0 {
-                status = "disabled";
+                        status = "disabled";
                 };
         };
 
@@ -85,12 +85,6 @@
                         status = "disabled";
                 };
 
-                enet0: ethernet@b0000 {
-                        fixed-link = <1 1 1000 0 0>;
-                        phy-connection-type = "rgmii-id";
-
-                };
-
                 enet1: ethernet@b1000 {
                         status = "disabled";
                 };
@@ -135,7 +129,6 @@
                 global-utilities@e0000 {        //global utilities block
                         status = "disabled";
                 };
-
         };
 
         pci0: pcie@ffe09000 {
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi b/arch/powerpc/boot/dts/p1020si.dtsi
deleted file mode 100644
index 5c5acb66c3fc..000000000000
--- a/arch/powerpc/boot/dts/p1020si.dtsi
+++ /dev/null
@@ -1,377 +0,0 @@
-/*
- * P1020si Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-/dts-v1/;
-/ {
-        compatible = "fsl,P1020";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,P1020@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-
-                PowerPC,P1020@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
-
-        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
-        };
-
-        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p1020-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,p1020-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,p1020-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        mode = "cpu";
-                };
-
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p1020-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2,256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                mdio@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-mdio";
-                        reg = <0x24000 0x1000 0xb0030 0x4>;
-
-                };
-
-                mdio@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-tbi";
-                        reg = <0x25000 0x1000 0xb1030 0x4>;
-
-                };
-
-                enet0: ethernet@b0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
-
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb0000 0x1000>;
-                                interrupts = <29 2 30 2 34 2>;
-                        };
-
-                        queue-group@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb4000 0x1000>;
-                                interrupts = <17 2 18 2 24 2>;
-                        };
-                };
-
-                enet1: ethernet@b1000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
-
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb1000 0x1000>;
-                                interrupts = <35 2 36 2 40 2>;
-                        };
-
-                        queue-group@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb5000 0x1000>;
-                                interrupts = <51 2 52 2 67 2>;
-                        };
-                };
-
-                enet2: ethernet@b2000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
-
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb2000 0x1000>;
-                                interrupts = <31 2 32 2 33 2>;
-                        };
-
-                        queue-group@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb6000 0x1000>;
-                                interrupts = <25 2 26 2 27 2>;
-                        };
-                };
-
-                usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
-                };
-
-                /* USB2 is shared with localbus, so it must be disabled
-                   by default. We can't put 'status = "disabled";' here
-                   since U-Boot doesn't clear the status property when
-                   it enables USB2. OTOH, U-Boot does create a new node
-                   when there isn't any. So, just comment it out.
-                usb@23000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x23000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <46 0x2>;
-                        phy_type = "ulpi";
-                };
-                */
-
-                sdhci@2e000 {
-                        compatible = "fsl,p1020-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,p1020-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p1020-guts","fsl,p2020-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-        };
-
-        pci0: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
-        };
-
-        pci1: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
-        };
-};
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts
index ad5b85269004..d9540791e434 100644
--- a/arch/powerpc/boot/dts/p1021mds.dts
+++ b/arch/powerpc/boot/dts/p1021mds.dts
@@ -9,53 +9,22 @@
  * option) any later version.
  */
 
-/dts-v1/;
+/include/ "fsl/p1021si-pre.dtsi"
 / {
         model = "fsl,P1021";
         compatible = "fsl,P1021MDS";
-        #address-cells = <2>;
-        #size-cells = <2>;
 
         aliases {
-                serial0 = &serial0;
-                serial1 = &serial1;
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
                 ethernet3 = &enet3;
                 ethernet4 = &enet4;
-                pci0 = &pci0;
-                pci1 = &pci1;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,P1021@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-
-                PowerPC,P1021@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
         };
 
         memory {
                 device_type = "memory";
         };
 
-        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
+        lbc: localbus@ffe05000 {
+                reg = <0x0 0xffe05000 0x0 0x1000>;
 
                 /* NAND Flash, BCSR, PMC0/1*/
                 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
@@ -138,99 +107,26 @@
                 };
         };
 
-        soc@ffe00000 {
-
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
+        soc: soc@ffe00000 {
                 compatible = "fsl,p1021-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,p1021-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,p1021-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
 
                 i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
                         rtc@68 {
                                 compatible = "dallas,ds1374";
                                 reg = <0x68>;
                         };
                 };
 
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
                 spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        espi,num-ss-bits = <4>;
-                        mode = "cpu";
-
-                        fsl_m25p80@0 {
+
+                        flash@0 {
                                 #address-cells = <1>;
                                 #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
+                                compatible = "spansion,s25sl12801";
                                 reg = <0>;
-                                linux,modalias = "fsl_m25p80";
                                 spi-max-frequency = <40000000>; /* input clock */
+
                                 partition@u-boot {
                                         label = "u-boot-spi";
                                         reg = <0x00000000 0x00100000>;
@@ -253,237 +149,49 @@
                         };
                 };
 
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p1021-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2,256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
                 usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
                         phy_type = "ulpi";
                 };
 
-                 mdio@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-mdio";
-                        reg = <0x24000 0x1000 0xb0030 0x4>;
-
+                mdio@24000 {
                         phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <1 1>;
+                                interrupts = <1 1 0 0>;
                                 reg = <0x0>;
                         };
                         phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
+                                interrupts = <2 1 0 0>;
                                 reg = <0x1>;
                         };
                         phy4: ethernet-phy@4 {
-                                interrupt-parent = <&mpic>;
                                 reg = <0x4>;
                         };
+                        tbi-phy@5 {
+                                device_type = "tbi-phy";
+                                reg = <0x5>;
+                        };
                 };
 
                 mdio@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-tbi";
-                        reg = <0x25000 0x1000 0xb1030 0x4>;
                         tbi0: tbi-phy@11 {
                                 reg = <0x11>;
                                 device_type = "tbi-phy";
                         };
                 };
 
-                enet0: ethernet@B0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
+                ethernet@b0000 {
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
-                        queue-group@0{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB0000 0x1000>;
-                                interrupts = <29 2 30 2 34 2>;
-                        };
-                        queue-group@1{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB4000 0x1000>;
-                                interrupts = <17 2 18 2 24 2>;
-                        };
                 };
 
-                enet1: ethernet@B1000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
+                ethernet@b1000 {
                         phy-handle = <&phy4>;
                         tbi-handle = <&tbi0>;
                         phy-connection-type = "sgmii";
-                        queue-group@0{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB1000 0x1000>;
-                                interrupts = <35 2 36 2 40 2>;
-                        };
-                        queue-group@1{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB5000 0x1000>;
-                                interrupts = <51 2 52 2 67 2>;
-                        };
                 };
 
-                enet2: ethernet@B2000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
+                ethernet@b2000 {
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
-                        queue-group@0{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB2000 0x1000>;
-                                interrupts = <31 2 32 2 33 2>;
-                        };
-                        queue-group@1{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB6000 0x1000>;
-                                interrupts = <25 2 26 2 27 2>;
-                        };
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,p1021-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.3", "fsl,sec3.1",
-                                     "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x97c>;
-                        fsl,descriptor-types-mask = <0x3a30abf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,p1021-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p1021-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
                 };
 
                 par_io@e0100 {
@@ -499,8 +207,7 @@
                                         0x1  0x13 0x1  0x0  0x1  0x0    /* QE_MUX_MDC */
                                         0x1  0x14 0x3  0x0  0x1  0x0    /* QE_MUX_MDIO */
                                         0x0  0x17 0x2  0x0  0x2  0x0    /* CLK12 */
-                                        0x0  0x18 0x2  0x0  0x1  0x0    /* CLK9
-*/
+                                        0x0  0x18 0x2  0x0  0x1  0x0    /* CLK9 */
                                         0x0  0x7  0x1  0x0  0x2  0x0    /* ENET1_TXD0_SER1_TXD0 */
                                         0x0  0x9  0x1  0x0  0x2  0x0    /* ENET1_TXD1_SER1_TXD1 */
                                         0x0  0xb  0x1  0x0  0x2  0x0    /* ENET1_TXD2_SER1_TXD2 */
@@ -535,31 +242,10 @@
         };
 
         pci0: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 4 1
-                        0000 0 0 2 &mpic 5 1
-                        0000 0 0 3 &mpic 6 1
-                        0000 0 0 4 &mpic 7 1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -571,31 +257,10 @@
         };
 
         pci1: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 0 1
-                        0000 0 0 2 &mpic 1 1
-                        0000 0 0 3 &mpic 2 1
-                        0000 0 0 4 &mpic 3 1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xc0000000
                                   0x2000000 0x0 0xc0000000
                                   0x0 0x20000000
@@ -606,36 +271,16 @@
                 };
         };
 
-        qe@ffe80000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "qe";
-                compatible = "fsl,qe";
+        qe: qe@ffe80000 {
                 ranges = <0x0 0x0 0xffe80000 0x40000>;
                 reg = <0 0xffe80000 0 0x480>;
                 brg-frequency = <0>;
                 bus-frequency = <0>;
-                fsl,qe-num-riscs = <1>;
-                fsl,qe-num-snums = <28>;
                 status = "disabled"; /* no firmware loaded */
 
-                qeic: interrupt-controller@80 {
-                        interrupt-controller;
-                        compatible = "fsl,qe-ic";
-                        #address-cells = <0>;
-                        #interrupt-cells = <1>;
-                        reg = <0x80 0x80>;
-                        interrupts = <63 2 60 2>; //high:47 low:44
-                        interrupt-parent = <&mpic>;
-                };
-
                 enet3: ucc@2000 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <1>;
-                        reg = <0x2000 0x200>;
-                        interrupts = <32>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "clk12";
                         tx-clock-name = "clk9";
@@ -645,20 +290,15 @@
                 };
 
                 mdio@2120 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        reg = <0x2120 0x18>;
-                        compatible = "fsl,ucc-mdio";
-
                         qe_phy0: ethernet-phy@0 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <4 1>;
+                                interrupts = <4 1 0 0>;
                                 reg = <0x0>;
                                 device_type = "ethernet-phy";
                         };
                         qe_phy1: ethernet-phy@03 {
                                 interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
+                                interrupts = <5 1 0 0>;
                                 reg = <0x3>;
                                 device_type = "ethernet-phy";
                         };
@@ -671,10 +311,6 @@
                 enet4: ucc@2400 {
                         device_type = "network";
                         compatible = "ucc_geth";
-                        cell-index = <5>;
-                        reg = <0x2400 0x200>;
-                        interrupts = <40>;
-                        interrupt-parent = <&qeic>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "clk13";
@@ -682,18 +318,7 @@
                         phy-handle = <&qe_phy1>;
                         phy-connection-type = "rmii";
                 };
-
-                muram@10000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,qe-muram", "fsl,cpm-muram";
-                        ranges = <0x0 0x10000 0x6000>;
-
-                        data-only@0 {
-                                compatible = "fsl,qe-muram-data",
-                                "fsl,cpm-muram-data";
-                                reg = <0x0 0x6000>;
-                        };
-                };
         };
 };
+
+/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index b9b8719a6204..ef95717db4bc 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -8,57 +8,36 @@
  * kind, whether express or implied.
  */
 
-/dts-v1/;
+/include/ "fsl/p1022si-pre.dtsi"
 / {
-        model = "fsl,P1022";
+        model = "fsl,P1022DS";
         compatible = "fsl,P1022DS";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,P1022@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-
-                PowerPC,P1022@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
 
         memory {
                 device_type = "memory";
         };
 
-        localbus@fffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2 0 0>;
-
+        lbc: localbus@fffe05000 {
+                reg = <0xf 0xffe05000 0 0x1000>;
                 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
                           0x1 0x0 0xf 0xe0000000 0x08000000
-                          0x2 0x0 0x0 0xffa00000 0x00040000
+                          0x2 0x0 0xf 0xff800000 0x00040000
                           0x3 0x0 0xf 0xffdf0000 0x00008000>;
 
+                /*
+                 * This node is used to access the pixis via "indirect" mode,
+                 * which is done by writing the pixis register index to chip
+                 * select 0 and the value to/from chip select 1.  Indirect
+                 * mode is the only way to access the pixis when DIU video
+                 * is enabled.  Note that this assumes that the first column
+                 * of the 'ranges' property above is the chip select number.
+                 */
+                board-control@0,0 {
+                        compatible = "fsl,p1022ds-indirect-pixis";
+                        reg = <0x0 0x0 1        /* CS0 */
+                               0x1 0x0 1>;      /* CS1 */
+                };
+
                 nor@0,0 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -161,51 +140,10 @@
                 };
         };
 
-        soc@fffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p1022-immr", "simple-bus";
+        soc: soc@fffe00000 {
                 ranges = <0x0 0xf 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,p1022-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2 0 0>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,p1022-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupts = <16 2 0 0>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2 0 0>;
-                        dfsrr;
-                };
 
                 i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2 0 0>;
-                        dfsrr;
-
                         wm8776:codec@1a {
                                 compatible = "wlf,wm8776";
                                 reg = <0x1a>;
@@ -216,41 +154,14 @@
                         };
                 };
 
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2 0 0>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2 0 0>;
-                };
-
                 spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2 0 0>;
-                        espi,num-ss-bits = <4>;
-                        mode = "cpu";
-
-                        fsl_m25p80@0 {
+                        flash@0 {
                                 #address-cells = <1>;
                                 #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
+                                compatible = "spansion,s25sl12801";
                                 reg = <0>;
-                                linux,modalias = "fsl_m25p80";
                                 spi-max-frequency = <40000000>; /* input clock */
+
                                 partition@0 {
                                         label = "u-boot-spi";
                                         reg = <0x00000000 0x00100000>;
@@ -274,115 +185,20 @@
                 };
 
                 ssi@15000 {
-                        compatible = "fsl,mpc8610-ssi";
-                        cell-index = <0>;
-                        reg = <0x15000 0x100>;
-                        interrupts = <75 2 0 0>;
                         fsl,mode = "i2s-slave";
                         codec-handle = <&wm8776>;
-                        fsl,playback-dma = <&dma00>;
-                        fsl,capture-dma = <&dma01>;
-                        fsl,fifo-depth = <15>;
                         fsl,ssi-asynchronous;
                 };
 
-                dma@c300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <1>;
-                        dma00: dma-channel@0 {
-                                compatible = "fsl,ssi-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <76 2 0 0>;
-                        };
-                        dma01: dma-channel@80 {
-                                compatible = "fsl,ssi-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <77 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <78 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <79 2 0 0>;
-                        };
-                };
-
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2 0 0>;
-                        gpio-controller;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p1022-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2, 256K
-                        interrupts = <16 2 0 0>;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <20 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <21 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <22 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <23 2 0 0>;
-                        };
-                };
-
                 usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupts = <28 0x2 0 0>;
                         phy_type = "ulpi";
                 };
 
-                mdio@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-mdio";
-                        reg = <0x24000 0x1000 0xb0030 0x4>;
+                usb@23000 {
+                        status = "disabled";
+                };
 
+                mdio@24000 {
                         phy0: ethernet-phy@0 {
                                 interrupts = <3 1 0 0>;
                                 reg = <0x1>;
@@ -391,189 +207,28 @@
                                 interrupts = <9 1 0 0>;
                                 reg = <0x2>;
                         };
+                        tbi-phy@2 {
+                                device_type = "tbi-phy";
+                                reg = <0x2>;
+                        };
                 };
 
-                mdio@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-mdio";
-                        reg = <0x25000 0x1000 0xb1030 0x4>;
-                };
-
-                enet0: ethernet@B0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        fsl,magic-packet;
-                        fsl,wake-on-filer;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
+                ethernet@b0000 {
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
-                        queue-group@0{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB0000 0x1000>;
-                                interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
-                        };
-                        queue-group@1{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB4000 0x1000>;
-                                interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
-                        };
                 };
 
-                enet1: ethernet@B1000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
+                ethernet@b1000 {
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
-                        queue-group@0{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB1000 0x1000>;
-                                interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
-                        };
-                        queue-group@1{
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xB5000 0x1000>;
-                                interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
-                        };
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,p1022-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2 0 0>;
-                        fsl,sdhci-auto-cmd12;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
-                                     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
-                                     "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 0 0 58 2 0 0>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0x97c>;
-                        fsl,descriptor-types-mask = <0x3a30abf>;
-                };
-
-                sata@18000 {
-                        compatible = "fsl,p1022-sata", "fsl,pq-sata-v2";
-                        reg = <0x18000 0x1000>;
-                        cell-index = <1>;
-                        interrupts = <74 0x2 0 0>;
-                };
-
-                sata@19000 {
-                        compatible = "fsl,p1022-sata", "fsl,pq-sata-v2";
-                        reg = <0x19000 0x1000>;
-                        cell-index = <2>;
-                        interrupts = <41 0x2 0 0>;
-                };
-
-                power@e0070{
-                        compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
-                        reg = <0xe0070 0x20>;
-                };
-
-                display@10000 {
-                        compatible = "fsl,diu", "fsl,p1022-diu";
-                        reg = <0x10000 1000>;
-                        interrupts = <64 2 0 0>;
-                };
-
-                timer@41100 {
-                        compatible = "fsl,mpic-global-timer";
-                        reg = <0x41100 0x100 0x41300 4>;
-                        interrupts = <0 0 3 0
-                                      1 0 3 0
-                                      2 0 3 0
-                                      3 0 3 0>;
-                };
-
-                timer@42100 {
-                        compatible = "fsl,mpic-global-timer";
-                        reg = <0x42100 0x100 0x42300 4>;
-                        interrupts = <4 0 3 0
-                                      5 0 3 0
-                                      6 0 3 0
-                                      7 0 3 0>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <4>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "fsl,mpic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,p1022-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0 0 0
-                                0xe1 0 0 0
-                                0xe2 0 0 0
-                                0xe3 0 0 0
-                                0xe4 0 0 0
-                                0xe5 0 0 0
-                                0xe6 0 0 0
-                                0xe7 0 0 0>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p1022-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
                 };
         };
 
         pci0: pcie@fffe09000 {
-                compatible = "fsl,p1022-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupts = <16 2 0 0>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 4 1
-                        0000 0 0 2 &mpic 5 1
-                        0000 0 0 3 &mpic 6 1
-                        0000 0 0 4 &mpic 7 1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xe0000000
                                   0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
@@ -585,30 +240,11 @@
         };
 
         pci1: pcie@fffe0a000 {
-                compatible = "fsl,p1022-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupts = <16 2 0 0>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 0 1
-                        0000 0 0 2 &mpic 1 1
-                        0000 0 0 3 &mpic 2 1
-                        0000 0 0 4 &mpic 3 1
-                        >;
                 pcie@0 {
                         reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xe0000000
                                   0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
@@ -619,32 +255,11 @@
                 };
         };
 
-
         pci2: pcie@fffe0b000 {
-                compatible = "fsl,p1022-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0xf 0xffe0b000 0 0x1000>;
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupts = <16 2 0 0>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 8 1
-                        0000 0 0 2 &mpic 9 1
-                        0000 0 0 3 &mpic 10 1
-                        0000 0 0 4 &mpic 11 1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xe0000000
                                   0x2000000 0x0 0xe0000000
                                   0x0 0x20000000
@@ -655,3 +270,5 @@
                 };
         };
 };
+
+/include/ "fsl/p1022si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1023rds.dts b/arch/powerpc/boot/dts/p1023rds.dts
index d9b776740a67..beb6cb12e59d 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -34,137 +34,30 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/dts-v1/;
+/include/ "fsl/p1023si-pre.dtsi"
 
 / {
         model = "fsl,P1023";
         compatible = "fsl,P1023RDS";
         #address-cells = <2>;
         #size-cells = <2>;
-
-        aliases {
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: PowerPC,P1023@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-
-                cpu1: PowerPC,P1023@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
+        interrupt-parent = <&mpic>;
 
         memory {
                 device_type = "memory";
         };
 
-        soc@ff600000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p1023-immr", "simple-bus";
+        soc: soc@ff600000 {
                 ranges = <0x0 0x0 0xff600000 0x200000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,p1023-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,p1023-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
 
                 i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
                         rtc@68 {
                                 compatible = "dallas,ds1374";
                                 reg = <0x68>;
                         };
                 };
 
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
                 spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,p1023-espi", "fsl,mpc8536-espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,espi-num-chipselects = <4>;
-
                         fsl_dataflash@0 {
                                 #address-cells = <1>;
                                 #size-cells = <1>;
@@ -186,197 +79,14 @@
                         };
                 };
 
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,qoriq-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p1023-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2,256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
                 usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
                         dr_mode = "host";
                         phy_type = "ulpi";
                 };
-
-                crypto: crypto@300000 {
-                        compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg = <0x30000 0x10000>;
-                        ranges = <0 0x30000 0x10000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <58 2>;
-
-                        sec_jr0: jr@1000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x1000 0x1000>;
-                                interrupts = <45 2>;
-                        };
-
-                        sec_jr1: jr@2000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x2000 0x1000>;
-                                interrupts = <45 2>;
-                        };
-
-                        sec_jr2: jr@3000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x3000 0x1000>;
-                                interrupts = <57 2>;
-                        };
-
-                        sec_jr3: jr@4000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x4000 0x1000>;
-                                interrupts = <57 2>;
-                        };
-
-                        rtic@6000 {
-                                compatible = "fsl,sec-v4.2-rtic",
-                                             "fsl,sec-v4.0-rtic";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0x6000 0x100>;
-                                ranges = <0x0 0x6100 0xe00>;
-
-                                rtic_a: rtic-a@0 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x00 0x20 0x100 0x80>;
-                                };
-
-                                rtic_b: rtic-b@20 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x20 0x20 0x200 0x80>;
-                                };
-
-                                rtic_c: rtic-c@40 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x40 0x20 0x300 0x80>;
-                                };
-
-                                rtic_d: rtic-d@60 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x60 0x20 0x500 0x80>;
-                                };
-                        };
-                };
-
-                power@e0070{
-                        compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc",
-                                     "fsl,p1022-pmc";
-                        reg = <0xe0070 0x20>;
-                        etsec1_clk: soc-clk@B0{
-                                fsl,pmcdr-mask = <0x00000080>;
-                        };
-                        etsec2_clk: soc-clk@B1{
-                                fsl,pmcdr-mask = <0x00000040>;
-                        };
-                        etsec3_clk: soc-clk@B2{
-                                fsl,pmcdr-mask = <0x00000020>;
-                        };
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,p1023-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p1023-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
         };
 
-        localbus@ff605000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus";
+        lbc: localbus@ff605000 {
                 reg = <0 0xff605000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
 
                 /* NOR Flash, BCSR */
                 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
@@ -428,33 +138,18 @@
         };
 
         pci0: pcie@ff60a000 {
-                compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
-                cell-index = <1>;
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xff60a000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
+                        /* IRQ[0:3] are pulled up on board, set to active-low */
                         interrupt-map-mask = <0xf800 0 0 7>;
                         interrupt-map = <
                                 /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 0 1
-                                0000 0 0 2 &mpic 1 1
-                                0000 0 0 3 &mpic 2 1
-                                0000 0 0 4 &mpic 3 1
+                                0000 0 0 1 &mpic 0 1 0 0
+                                0000 0 0 2 &mpic 1 1 0 0
+                                0000 0 0 3 &mpic 2 1 0 0
+                                0000 0 0 4 &mpic 3 1 0 0
                                 >;
                         ranges = <0x2000000 0x0 0xc0000000
                                   0x2000000 0x0 0xc0000000
@@ -466,34 +161,22 @@
                 };
         };
 
-        pci1: pcie@ff609000 {
-                compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
-                cell-index = <2>;
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
+        board_pci1: pci1: pcie@ff609000 {
                 reg = <0 0xff609000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
+                        /*
+                         * IRQ[4:6] only for PCIe, set to active-high,
+                         * IRQ[7] is pulled up on board, set to active-low
+                         */
                         interrupt-map-mask = <0xf800 0 0 7>;
                         interrupt-map = <
                                 /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 4 1
-                                0000 0 0 2 &mpic 5 1
-                                0000 0 0 3 &mpic 6 1
-                                0000 0 0 4 &mpic 7 1
+                                0000 0 0 1 &mpic 4 2 0 0
+                                0000 0 0 2 &mpic 5 2 0 0
+                                0000 0 0 3 &mpic 6 2 0 0
+                                0000 0 0 4 &mpic 7 1 0 0
                                 >;
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
@@ -506,33 +189,21 @@
         };
 
         pci2: pcie@ff60b000 {
-                cell-index = <3>;
-                compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
                 reg = <0 0xff60b000 0 0x1000>;
-                bus-range = <0 255>;
                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
+                        /*
+                         * IRQ[8:10] are pulled up on board, set to active-low
+                         * IRQ[11] only for PCIe, set to active-high,
+                         */
                         interrupt-map-mask = <0xf800 0 0 7>;
                         interrupt-map = <
                                 /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 8 1
-                                0000 0 0 2 &mpic 9 1
-                                0000 0 0 3 &mpic 10 1
-                                0000 0 0 4 &mpic 11 1
+                                0000 0 0 1 &mpic 8 1 0 0
+                                0000 0 0 2 &mpic 9 1 0 0
+                                0000 0 0 3 &mpic 10 1 0 0
+                                0000 0 0 4 &mpic 11 2 0 0
                                 >;
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
@@ -544,3 +215,5 @@
                 };
         };
 };
+
+/include/ "fsl/p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts
index 66f03d6477b2..237310cc7e6c 100644
--- a/arch/powerpc/boot/dts/p2020ds.dts
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -9,30 +9,17 @@
  * option) any later version.
  */
 
-/include/ "p2020si.dtsi"
+/include/ "fsl/p2020si-pre.dtsi"
 
 / {
         model = "fsl,P2020DS";
         compatible = "fsl,P2020DS";
 
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-        };
-
-
         memory {
                 device_type = "memory";
         };
 
-        localbus@ffe05000 {
-                compatible = "fsl,elbc", "simple-bus";
+        board_lbc: lbc: localbus@ffe05000 {
                 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
                           0x1 0x0 0x0 0xe0000000 0x08000000
                           0x2 0x0 0x0 0xffa00000 0x00040000
@@ -40,203 +27,18 @@
                           0x4 0x0 0x0 0xffa40000 0x00040000
                           0x5 0x0 0x0 0xffa80000 0x00040000
                           0x6 0x0 0x0 0xffac0000 0x00040000>;
-
-                nor@0,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "cfi-flash";
-                        reg = <0x0 0x0 0x8000000>;
-                        bank-width = <2>;
-                        device-width = <1>;
-
-                        ramdisk@0 {
-                                reg = <0x0 0x03000000>;
-                                read-only;
-                        };
-
-                        diagnostic@3000000 {
-                                reg = <0x03000000 0x00e00000>;
-                                read-only;
-                        };
-
-                        dink@3e00000 {
-                                reg = <0x03e00000 0x00200000>;
-                                read-only;
-                        };
-
-                        kernel@4000000 {
-                                reg = <0x04000000 0x00400000>;
-                                read-only;
-                        };
-
-                        jffs2@4400000 {
-                                reg = <0x04400000 0x03b00000>;
-                        };
-
-                        dtb@7f00000 {
-                                reg = <0x07f00000 0x00080000>;
-                                read-only;
-                        };
-
-                        u-boot@7f80000 {
-                                reg = <0x07f80000 0x00080000>;
-                                read-only;
-                        };
-                };
-
-                nand@2,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,elbc-fcm-nand";
-                        reg = <0x2 0x0 0x40000>;
-
-                        u-boot@0 {
-                                reg = <0x0 0x02000000>;
-                                read-only;
-                        };
-
-                        jffs2@2000000 {
-                                reg = <0x02000000 0x10000000>;
-                        };
-
-                        ramdisk@12000000 {
-                                reg = <0x12000000 0x08000000>;
-                                read-only;
-                        };
-
-                        kernel@1a000000 {
-                                reg = <0x1a000000 0x04000000>;
-                        };
-
-                        dtb@1e000000 {
-                                reg = <0x1e000000 0x01000000>;
-                                read-only;
-                        };
-
-                        empty@1f000000 {
-                                reg = <0x1f000000 0x21000000>;
-                        };
-                };
-
-                board-control@3,0 {
-                        compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
-                        reg = <0x3 0x0 0x30>;
-                };
-
-                nand@4,0 {
-                        compatible = "fsl,elbc-fcm-nand";
-                        reg = <0x4 0x0 0x40000>;
-                };
-
-                nand@5,0 {
-                        compatible = "fsl,elbc-fcm-nand";
-                        reg = <0x5 0x0 0x40000>;
-                };
-
-                nand@6,0 {
-                        compatible = "fsl,elbc-fcm-nand";
-                        reg = <0x6 0x0 0x40000>;
-                };
+                reg = <0 0xffe05000 0 0x1000>;
         };
 
-        soc@ffe00000 {
-
-                usb@22000 {
-                        phy_type = "ulpi";
-                };
-
-                mdio@24520 {
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x0>;
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x1>;
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x2>;
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-
-                };
-
-                mdio@25520 {
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-
-                };
-
-                ptp_clock@24E00 {
-                        compatible = "fsl,etsec-ptp";
-                        reg = <0x24E00 0xB0>;
-                        interrupts = <68 2 69 2 70 2>;
-                        interrupt-parent = < &mpic >;
-                        fsl,tclk-period = <5>;
-                        fsl,tmr-prsc = <200>;
-                        fsl,tmr-add = <0xCCCCCCCD>;
-                        fsl,tmr-fiper1 = <0x3B9AC9FB>;
-                        fsl,tmr-fiper2 = <0x0001869B>;
-                        fsl,max-adj = <249999999>;
-                };
-
-                enet0: ethernet@24000 {
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "rgmii-id";
-                };
-
-                enet1: ethernet@25000 {
-                        tbi-handle = <&tbi1>;
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-
-                };
-
-                enet2: ethernet@26000 {
-                        tbi-handle = <&tbi2>;
-                        phy-handle = <&phy2>;
-                        phy-connection-type = "rgmii-id";
-                };
-
-
-                msi@41600 {
-                        compatible = "fsl,mpic-msi";
-                };
+        board_soc: soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
         };
 
-        pci0: pcie@ffe08000 {
+        pci2: pcie@ffe08000 {
                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x8 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x9 0x1
-                        0000 0x0 0x0 0x3 &mpic 0xa 0x1
-                        0000 0x0 0x0 0x4 &mpic 0xb 0x1
-                        >;
+                reg = <0 0xffe08000 0 0x1000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
                                   0x0 0x20000000
@@ -247,61 +49,11 @@
                 };
         };
 
-        pci1: pcie@ffe09000 {
+        board_pci1: pci1: pcie@ffe09000 {
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
-                interrupt-map = <
-
-                        // IDSEL 0x11 func 0 - PCI slot 1
-                        0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 1 - PCI slot 1
-                        0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 2 - PCI slot 1
-                        0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 3 - PCI slot 1
-                        0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 4 - PCI slot 1
-                        0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 5 - PCI slot 1
-                        0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 6 - PCI slot 1
-                        0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x11 func 7 - PCI slot 1
-                        0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
-                        0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
-
-                        // IDSEL 0x1d  Audio
-                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
-
-                        // IDSEL 0x1e Legacy
-                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
-                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
-
-                        // IDSEL 0x1f IDE/SATA
-                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
-                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
-                        >;
-
+                reg = <0 0xffe09000 0 0x1000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -309,89 +61,14 @@
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
                                   0x0 0x10000>;
-                        uli1575@0 {
-                                reg = <0x0 0x0 0x0 0x0 0x0>;
-                                #size-cells = <2>;
-                                #address-cells = <3>;
-                                ranges = <0x2000000 0x0 0xa0000000
-                                          0x2000000 0x0 0xa0000000
-                                          0x0 0x20000000
-
-                                          0x1000000 0x0 0x0
-                                          0x1000000 0x0 0x0
-                                          0x0 0x10000>;
-                                isa@1e {
-                                        device_type = "isa";
-                                        #interrupt-cells = <2>;
-                                        #size-cells = <1>;
-                                        #address-cells = <2>;
-                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
-                                        ranges = <0x1 0x0 0x1000000 0x0 0x0
-                                                  0x1000>;
-                                        interrupt-parent = <&i8259>;
-
-                                        i8259: interrupt-controller@20 {
-                                                reg = <0x1 0x20 0x2
-                                                       0x1 0xa0 0x2
-                                                       0x1 0x4d0 0x2>;
-                                                interrupt-controller;
-                                                device_type = "interrupt-controller";
-                                                #address-cells = <0>;
-                                                #interrupt-cells = <2>;
-                                                compatible = "chrp,iic";
-                                                interrupts = <4 1>;
-                                                interrupt-parent = <&mpic>;
-                                        };
-
-                                        i8042@60 {
-                                                #size-cells = <0>;
-                                                #address-cells = <1>;
-                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
-                                                interrupts = <1 3 12 3>;
-                                                interrupt-parent =
-                                                        <&i8259>;
-
-                                                keyboard@0 {
-                                                        reg = <0x0>;
-                                                        compatible = "pnpPNP,303";
-                                                };
-
-                                                mouse@1 {
-                                                        reg = <0x1>;
-                                                        compatible = "pnpPNP,f03";
-                                                };
-                                        };
-
-                                        rtc@70 {
-                                                compatible = "pnpPNP,b00";
-                                                reg = <0x1 0x70 0x2>;
-                                        };
-
-                                        gpio@400 {
-                                                reg = <0x1 0x400 0x80>;
-                                        };
-                                };
-                        };
                 };
-
         };
 
-        pci2: pcie@ffe0a000 {
+        pci0: pcie@ffe0a000 {
                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
+                reg = <0 0xffe0a000 0 0x1000>;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0xc0000000
                                   0x2000000 0x0 0xc0000000
                                   0x0 0x20000000
@@ -402,3 +79,11 @@
                 };
         };
 };
+
+/*
+ * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
+ * for interrupt-map & interrupt-map-mask
+ */
+
+/include/ "fsl/p2020si-post.dtsi"
+/include/ "p2020ds.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
new file mode 100644
index 000000000000..c1cf6cef4dd6
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -0,0 +1,316 @@
+/*
+ * P2020DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_lbc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x8000000>;
+                bank-width = <2>;
+                device-width = <1>;
+
+                ramdisk@0 {
+                        reg = <0x0 0x03000000>;
+                        read-only;
+                };
+
+                diagnostic@3000000 {
+                        reg = <0x03000000 0x00e00000>;
+                        read-only;
+                };
+
+                dink@3e00000 {
+                        reg = <0x03e00000 0x00200000>;
+                        read-only;
+                };
+
+                kernel@4000000 {
+                        reg = <0x04000000 0x00400000>;
+                        read-only;
+                };
+
+                jffs2@4400000 {
+                        reg = <0x04400000 0x03b00000>;
+                };
+
+                dtb@7f00000 {
+                        reg = <0x07f00000 0x00080000>;
+                        read-only;
+                };
+
+                u-boot@7f80000 {
+                        reg = <0x07f80000 0x00080000>;
+                        read-only;
+                };
+        };
+
+        nand@2,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x2 0x0 0x40000>;
+
+                u-boot@0 {
+                        reg = <0x0 0x02000000>;
+                        read-only;
+                };
+
+                jffs2@2000000 {
+                        reg = <0x02000000 0x10000000>;
+                };
+
+                ramdisk@12000000 {
+                        reg = <0x12000000 0x08000000>;
+                        read-only;
+                };
+
+                kernel@1a000000 {
+                        reg = <0x1a000000 0x04000000>;
+                };
+
+                dtb@1e000000 {
+                        reg = <0x1e000000 0x01000000>;
+                        read-only;
+                };
+
+                empty@1f000000 {
+                        reg = <0x1f000000 0x21000000>;
+                };
+        };
+
+        board-control@3,0 {
+                compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
+                reg = <0x3 0x0 0x30>;
+        };
+
+        nand@4,0 {
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x4 0x0 0x40000>;
+        };
+
+        nand@5,0 {
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x5 0x0 0x40000>;
+        };
+
+        nand@6,0 {
+                compatible = "fsl,elbc-fcm-nand";
+                reg = <0x6 0x0 0x40000>;
+        };
+};
+
+&board_soc {
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x0>;
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x1>;
+                };
+                phy2: ethernet-phy@2 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x2>;
+                };
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+
+        };
+
+        mdio@25520 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        mdio@26520 {
+                tbi2: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+
+        };
+
+        ptp_clock@24e00 {
+                fsl,tclk-period = <5>;
+                fsl,tmr-prsc = <200>;
+                fsl,tmr-add = <0xCCCCCCCD>;
+                fsl,tmr-fiper1 = <0x3B9AC9FB>;
+                fsl,tmr-fiper2 = <0x0001869B>;
+                fsl,max-adj = <249999999>;
+        };
+
+        enet0: ethernet@24000 {
+                tbi-handle = <&tbi0>;
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        enet1: ethernet@25000 {
+                tbi-handle = <&tbi1>;
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+
+        };
+
+        enet2: ethernet@26000 {
+                tbi-handle = <&tbi2>;
+                phy-handle = <&phy2>;
+                phy-connection-type = "rgmii-id";
+        };
+};
+
+&board_pci1 {
+        pcie@0 {
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+
+                        // IDSEL 0x11 func 0 - PCI slot 1
+                        0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 1 - PCI slot 1
+                        0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 2 - PCI slot 1
+                        0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 3 - PCI slot 1
+                        0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 4 - PCI slot 1
+                        0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 5 - PCI slot 1
+                        0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 6 - PCI slot 1
+                        0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x11 func 7 - PCI slot 1
+                        0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
+                        0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
+
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+                        >;
+
+                uli1575@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x10000>;
+                        isa@1e {
+                                device_type = "isa";
+                                #interrupt-cells = <2>;
+                                #size-cells = <1>;
+                                #address-cells = <2>;
+                                reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                          0x1000>;
+                                interrupt-parent = <&i8259>;
+
+                                i8259: interrupt-controller@20 {
+                                        reg = <0x1 0x20 0x2
+                                               0x1 0xa0 0x2
+                                               0x1 0x4d0 0x2>;
+                                        interrupt-controller;
+                                        device_type = "interrupt-controller";
+                                        #address-cells = <0>;
+                                        #interrupt-cells = <2>;
+                                        compatible = "chrp,iic";
+                                        interrupts = <4 1 0 0>;
+                                        interrupt-parent = <&mpic>;
+                                };
+
+                                i8042@60 {
+                                        #size-cells = <0>;
+                                        #address-cells = <1>;
+                                        reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                        interrupts = <1 3 12 3>;
+                                        interrupt-parent =
+                                                <&i8259>;
+
+                                        keyboard@0 {
+                                                reg = <0x0>;
+                                                compatible = "pnpPNP,303";
+                                        };
+
+                                        mouse@1 {
+                                                reg = <0x1>;
+                                                compatible = "pnpPNP,f03";
+                                        };
+                                };
+
+                                rtc@70 {
+                                        compatible = "pnpPNP,b00";
+                                        reg = <0x1 0x70 0x2>;
+                                };
+
+                                gpio@400 {
+                                        reg = <0x1 0x400 0x80>;
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 1d7a05f3021e..26759a591712 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -9,7 +9,7 @@
  * option) any later version.
  */
 
-/include/ "p2020si.dtsi"
+/include/ "fsl/p2020si-pre.dtsi"
 
 / {
         model = "fsl,P2020RDB";
@@ -29,7 +29,8 @@
                 device_type = "memory";
         };
 
-        localbus@ffe05000 {
+        lbc: localbus@ffe05000 {
+                reg = <0 0xffe05000 0 0x1000>;
 
                 /* NOR and NAND Flashes */
                 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
@@ -140,7 +141,9 @@
 
         };
 
-        soc@ffe00000 {
+        soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
+
                 i2c@3000 {
                         rtc@68 {
                                 compatible = "dallas,ds1339";
@@ -148,17 +151,13 @@
                         };
                 };
 
-        spi@7000 {
-
-                fsl_m25p80@0 {
+                spi@7000 {
+                        flash@0 {
                                 #address-cells = <1>;
                                 #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
+                                compatible = "spansion,s25sl12801";
                                 reg = <0>;
-                                linux,modalias = "fsl_m25p80";
-                                modal = "s25sl128b";
                                 spi-max-frequency = <50000000>;
-                                mode = <0>;
 
                                 partition@0 {
                                         /* 512KB for u-boot Bootloader Image */
@@ -202,15 +201,17 @@
 
                 mdio@24520 {
                         phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
+                                interrupts = <3 1 0 0>;
                                 reg = <0x0>;
-                                };
+                        };
                         phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
+                                interrupts = <3 1 0 0>;
                                 reg = <0x1>;
-                                };
+                        };
+                        tbi-phy@2 {
+                                device_type = "tbi-phy";
+                                reg = <0x2>;
+                        };
                 };
 
                 mdio@25520 {
@@ -224,11 +225,7 @@
                         status = "disabled";
                 };
 
-                ptp_clock@24E00 {
-                        compatible = "fsl,etsec-ptp";
-                        reg = <0x24E00 0xB0>;
-                        interrupts = <68 2 69 2 70 2>;
-                        interrupt-parent = < &mpic >;
+                ptp_clock@24e00 {
                         fsl,tclk-period = <5>;
                         fsl,tmr-prsc = <200>;
                         fsl,tmr-add = <0xCCCCCCCD>;
@@ -252,29 +249,18 @@
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
                 };
-
         };
 
         pci0: pcie@ffe08000 {
+                reg = <0 0xffe08000 0 0x1000>;
                 status = "disabled";
         };
 
         pci1: pcie@ffe09000 {
+                reg = <0 0xffe09000 0 0x1000>;
                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
-                        pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
+                pcie@0 {
                         ranges = <0x2000000 0x0 0xa0000000
                                   0x2000000 0x0 0xa0000000
                                   0x0 0x20000000
@@ -286,21 +272,10 @@
         };
 
         pci2: pcie@ffe0a000 {
+                reg = <0 0xffe0a000 0 0x1000>;
                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
                 pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
                         ranges = <0x2000000 0x0 0x80000000
                                   0x2000000 0x0 0x80000000
                                   0x0 0x20000000
@@ -311,3 +286,5 @@
                 };
         };
 };
+
+/include/ "fsl/p2020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
index fc8ddddfccb6..66aac864c4cc 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
@@ -14,28 +14,16 @@
  * option) any later version.
  */
 
-/include/ "p2020si.dtsi"
+/include/ "p2020rdb.dts"
 
 / {
         model = "fsl,P2020RDB";
         compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
 
-        aliases {
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                serial0 = &serial0;
-                pci0 = &pci0;
-        };
-
         cpus {
                 PowerPC,P2020@1 {
-                status = "disabled";
+                        status = "disabled";
                 };
-
-        };
-
-        memory {
-                device_type = "memory";
         };
 
         localbus@ffe05000 {
@@ -43,115 +31,18 @@
         };
 
         soc@ffe00000 {
-                i2c@3000 {
-                        rtc@68 {
-                                compatible = "dallas,ds1339";
-                                reg = <0x68>;
-                        };
-                };
-
                 serial1: serial@4600 {
                         status = "disabled";
                 };
 
-                spi@7000 {
-
-                        fsl_m25p80@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
-                                reg = <0>;
-                                linux,modalias = "fsl_m25p80";
-                                modal = "s25sl128b";
-                                spi-max-frequency = <50000000>;
-                                mode = <0>;
-
-                                partition@0 {
-                                        /* 512KB for u-boot Bootloader Image */
-                                        reg = <0x0 0x00080000>;
-                                        label = "SPI (RO) U-Boot Image";
-                                        read-only;
-                                };
-
-                                partition@80000 {
-                                        /* 512KB for DTB Image */
-                                        reg = <0x00080000 0x00080000>;
-                                        label = "SPI (RO) DTB Image";
-                                        read-only;
-                                };
-
-                                partition@100000 {
-                                        /* 4MB for Linux Kernel Image */
-                                        reg = <0x00100000 0x00400000>;
-                                        label = "SPI (RO) Linux Kernel Image";
-                                        read-only;
-                                };
-
-                                partition@500000 {
-                                        /* 4MB for Compressed RFS Image */
-                                        reg = <0x00500000 0x00400000>;
-                                        label = "SPI (RO) Compressed RFS Image";
-                                        read-only;
-                                };
-
-                                partition@900000 {
-                                        /* 7MB for JFFS2 based RFS */
-                                        reg = <0x00900000 0x00700000>;
-                                        label = "SPI (RW) JFFS2 RFS";
-                                };
-                        };
-                };
-
                 dma@c300 {
                         status = "disabled";
                 };
 
-                usb@22000 {
-                        phy_type = "ulpi";
-                };
-
-                mdio@24520 {
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x0>;
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <3 1>;
-                                reg = <0x1>;
-                        };
-                };
-
-                mdio@25520 {
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        status = "disabled";
-                };
-
                 enet0: ethernet@24000 {
                         status = "disabled";
                 };
 
-                enet1: ethernet@25000 {
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy0>;
-                        phy-connection-type = "sgmii";
-
-                };
-
-                enet2: ethernet@26000 {
-                        phy-handle = <&phy1>;
-                        phy-connection-type = "rgmii-id";
-                };
-
-
                 mpic: pic@40000 {
                         protected-sources = <
                         42 76 77 78 79 /* serial1 , dma2 */
@@ -164,40 +55,12 @@
                 msi@41600 {
                         status = "disabled";
                 };
-
-
         };
 
         pci0: pcie@ffe08000 {
                 status = "disabled";
         };
 
-        pci1: pcie@ffe09000 {
-                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
-                        >;
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xa0000000
-                                  0x2000000 0x0 0xa0000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x100000>;
-                };
-        };
-
         pci2: pcie@ffe0a000 {
                 status = "disabled";
         };
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
index 261c34ba45ec..9bd8ef493dd2 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
@@ -15,28 +15,18 @@
  * option) any later version.
  */
 
-/include/ "p2020si.dtsi"
+/include/ "p2020rdb.dts"
 
 / {
         model = "fsl,P2020RDB";
         compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
 
-        aliases {
-                ethernet0 = &enet0;
-                serial0 = &serial1;
-                pci1 = &pci1;
-        };
-
         cpus {
                 PowerPC,P2020@0 {
-                status = "disabled";
+                        status = "disabled";
                 };
         };
 
-        memory {
-                device_type = "memory";
-        };
-
         localbus@ffe05000 {
                 status = "disabled";
         };
@@ -70,55 +60,10 @@
                         status = "disabled";
                 };
 
-                dma@c300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
-                        };
-                };
-
                 gpio: gpio-controller@f000 {
                         status = "disabled";
                 };
 
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p2020-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2,512K
-                        interrupt-parent = <&mpic>;
-                };
-
                 dma@21300 {
                         status = "disabled";
                 };
@@ -139,12 +84,6 @@
                         status = "disabled";
                 };
 
-                enet0: ethernet@24000 {
-                        fixed-link = <1 1 1000 0 0>;
-                        phy-connection-type = "rgmii-id";
-
-                };
-
                 enet1: ethernet@25000 {
                         status = "disabled";
                 };
@@ -170,22 +109,6 @@
                         >;
                 };
 
-                msi@41600 {
-                        compatible = "fsl,p2020-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
                 global-utilities@e0000 {        //global utilities block
                         status = "disabled";
                 };
@@ -199,30 +122,4 @@
         pci1: pcie@ffe09000 {
                 status = "disabled";
         };
-
-        pci2: pcie@ffe0a000 {
-                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                        >;
-                pcie@0 {
-                        reg = <0x0 0x0 0x0 0x0 0x0>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0x80000000
-                                  0x0 0x20000000
-
-                                  0x1000000 0x0 0x0
-                                  0x1000000 0x0 0x0
-                                  0x0 0x100000>;
-                };
-        };
 };
diff --git a/arch/powerpc/boot/dts/p2020si.dtsi b/arch/powerpc/boot/dts/p2020si.dtsi
deleted file mode 100644
index 6def17f265d3..000000000000
--- a/arch/powerpc/boot/dts/p2020si.dtsi
+++ /dev/null
@@ -1,382 +0,0 @@
-/*
- * P2020 Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-/dts-v1/;
-/ {
-        compatible = "fsl,P2020";
-        #address-cells = <2>;
-        #size-cells = <2>;
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                PowerPC,P2020@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-
-                PowerPC,P2020@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
-
-        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
-        };
-
-        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p2020-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-
-                ecm@1000 {
-                        compatible = "fsl,p2020-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                memory-controller@2000 {
-                        compatible = "fsl,p2020-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        mode = "cpu";
-                };
-
-                dma@c300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
-                        };
-                };
-
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p2020-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2,512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-
-                usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
-                };
-
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x520 0x20>;
-                };
-
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
-
-                };
-
-                enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
-
-                };
-
-                sdhci@2e000 {
-                        compatible = "fsl,p2020-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi@41600 {
-                        compatible = "fsl,p2020-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p2020-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
-        };
-
-        pci0: pcie@ffe08000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe08000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
-        };
-
-        pci1: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
-        };
-
-        pci2: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
-        };
-};
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index 79b6895027c0..4f957db01230 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "p2041si.dtsi"
+/include/ "fsl/p2041si-pre.dtsi"
 
 / {
         model = "fsl,P2041RDB";
@@ -50,6 +50,8 @@
         };
 
         soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
                 spi@110000 {
                         flash@0 {
                                 #address-cells = <1>;
@@ -106,7 +108,18 @@
                 };
         };
 
-        localbus@ffe124000 {
+        rio: rapidio@ffe0c0000 {
+                reg = <0xf 0xfe0c0000 0 0x11000>;
+
+                port1 {
+                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+                };
+                port2 {
+                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+                };
+        };
+
+        lbc: localbus@ffe124000 {
                 reg = <0xf 0xfe124000 0 0x1000>;
                 ranges = <0 0 0xf 0xe8000000 0x08000000>;
 
@@ -122,6 +135,7 @@
                 reg = <0xf 0xfe200000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+                fsl,msi = <&msi0>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -137,6 +151,7 @@
                 reg = <0xf 0xfe201000 0 0x1000>;
                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                fsl,msi = <&msi1>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -152,6 +167,7 @@
                 reg = <0xf 0xfe202000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -163,3 +179,5 @@
                 };
         };
 };
+
+/include/ "fsl/p2041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041si.dtsi b/arch/powerpc/boot/dts/p2041si.dtsi
deleted file mode 100644
index f7492edd0dfd..000000000000
--- a/arch/powerpc/boot/dts/p2041si.dtsi
+++ /dev/null
@@ -1,692 +0,0 @@
-/*
- * P2041 Silicon Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/ {
-        compatible = "fsl,P2041";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-
-        aliases {
-                ccsr = &soc;
-                dcsr = &dcsr;
-
-                serial0 = &serial0;
-                serial1 = &serial1;
-                serial2 = &serial2;
-                serial3 = &serial3;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                usb0 = &usb0;
-                usb1 = &usb1;
-                dma0 = &dma0;
-                dma1 = &dma1;
-                sdhc = &sdhc;
-                msi0 = &msi0;
-                msi1 = &msi1;
-                msi2 = &msi2;
-
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-                sec_mon = &sec_mon;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: PowerPC,e500mc@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        next-level-cache = <&L2_0>;
-                        L2_0: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu1: PowerPC,e500mc@1 {
-                        device_type = "cpu";
-                        reg = <1>;
-                        next-level-cache = <&L2_1>;
-                        L2_1: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu2: PowerPC,e500mc@2 {
-                        device_type = "cpu";
-                        reg = <2>;
-                        next-level-cache = <&L2_2>;
-                        L2_2: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu3: PowerPC,e500mc@3 {
-                        device_type = "cpu";
-                        reg = <3>;
-                        next-level-cache = <&L2_3>;
-                        L2_3: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-        };
-
-        dcsr: dcsr@f00000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,dcsr", "simple-bus";
-
-                dcsr-epu@0 {
-                        compatible = "fsl,dcsr-epu";
-                        interrupts = <52 2 0 0
-                                      84 2 0 0
-                                      85 2 0 0>;
-                        interrupt-parent = <&mpic>;
-                        reg = <0x0 0x1000>;
-                };
-                dcsr-npc {
-                        compatible = "fsl,dcsr-npc";
-                        reg = <0x1000 0x1000 0x1000000 0x8000>;
-                };
-                dcsr-nxc@2000 {
-                        compatible = "fsl,dcsr-nxc";
-                        reg = <0x2000 0x1000>;
-                };
-                dcsr-corenet {
-                        compatible = "fsl,dcsr-corenet";
-                        reg = <0x8000 0x1000 0xB0000 0x1000>;
-                };
-                dcsr-dpaa@9000 {
-                        compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
-                        reg = <0x9000 0x1000>;
-                };
-                dcsr-ocn@11000 {
-                        compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
-                        reg = <0x11000 0x1000>;
-                };
-                dcsr-ddr@12000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr>;
-                        reg = <0x12000 0x1000>;
-                };
-                dcsr-nal@18000 {
-                        compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
-                        reg = <0x18000 0x1000>;
-                };
-                dcsr-rcpm@22000 {
-                        compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
-                        reg = <0x22000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@40000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu0>;
-                        reg = <0x40000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@41000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu1>;
-                        reg = <0x41000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@42000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu2>;
-                        reg = <0x42000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@43000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu3>;
-                        reg = <0x43000 0x1000>;
-                };
-        };
-
-        soc: soc@ffe000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-                reg = <0xf 0xfe000000 0 0x00001000>;
-
-                soc-sram-error {
-                        compatible = "fsl,soc-sram-error";
-                        interrupts = <16 2 1 29>;
-                };
-
-                corenet-law@0 {
-                        compatible = "fsl,corenet-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <32>;
-                };
-
-                ddr: memory-controller@8000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-                        reg = <0x8000 0x1000>;
-                        interrupts = <16 2 1 23>;
-                };
-
-                cpc: l3-cache-controller@10000 {
-                        compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
-                        reg = <0x10000 0x1000>;
-                        interrupts = <16 2 1 27>;
-                };
-
-                corenet-cf@18000 {
-                        compatible = "fsl,corenet-cf";
-                        reg = <0x18000 0x1000>;
-                        interrupts = <16 2 1 31>;
-                        fsl,ccf-num-csdids = <32>;
-                        fsl,ccf-num-snoopids = <32>;
-                };
-
-                iommu@20000 {
-                        compatible = "fsl,pamu-v1.0", "fsl,pamu";
-                        reg = <0x20000 0x4000>;
-                        interrupts = <
-                                24 2 0 0
-                                16 2 1 30>;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <4>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "fsl,mpic", "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi0: msi@41600 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41600 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0 0 0
-                                0xe1 0 0 0
-                                0xe2 0 0 0
-                                0xe3 0 0 0
-                                0xe4 0 0 0
-                                0xe5 0 0 0
-                                0xe6 0 0 0
-                                0xe7 0 0 0>;
-                };
-
-                msi1: msi@41800 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41800 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe8 0 0 0
-                                0xe9 0 0 0
-                                0xea 0 0 0
-                                0xeb 0 0 0
-                                0xec 0 0 0
-                                0xed 0 0 0
-                                0xee 0 0 0
-                                0xef 0 0 0>;
-                };
-
-                msi2: msi@41a00 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41a00 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xf0 0 0 0
-                                0xf1 0 0 0
-                                0xf2 0 0 0
-                                0xf3 0 0 0
-                                0xf4 0 0 0
-                                0xf5 0 0 0
-                                0xf6 0 0 0
-                                0xf7 0 0 0>;
-                };
-
-                guts: global-utilities@e0000 {
-                        compatible = "fsl,qoriq-device-config-1.0";
-                        reg = <0xe0000 0xe00>;
-                        fsl,has-rstcr;
-                        #sleep-cells = <1>;
-                        fsl,liodn-bits = <12>;
-                };
-
-                pins: global-utilities@e0e00 {
-                        compatible = "fsl,qoriq-pin-control-1.0";
-                        reg = <0xe0e00 0x200>;
-                        #sleep-cells = <2>;
-                };
-
-                clockgen: global-utilities@e1000 {
-                        compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
-                        reg = <0xe1000 0x1000>;
-                        clock-frequency = <0>;
-                };
-
-                rcpm: global-utilities@e2000 {
-                        compatible = "fsl,qoriq-rcpm-1.0";
-                        reg = <0xe2000 0x1000>;
-                        #sleep-cells = <1>;
-                };
-
-                sfp: sfp@e8000 {
-                        compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
-                        reg        = <0xe8000 0x1000>;
-                };
-
-                serdes: serdes@ea000 {
-                        compatible = "fsl,p2041-serdes";
-                        reg        = <0xea000 0x1000>;
-                };
-
-                dma0: dma@100300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
-                        reg = <0x100300 0x4>;
-                        ranges = <0x0 0x100100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <28 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <29 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <30 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <31 2 0 0>;
-                        };
-                };
-
-                dma1: dma@101300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
-                        reg = <0x101300 0x4>;
-                        ranges = <0x0 0x101100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <32 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <33 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <34 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p2041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <35 2 0 0>;
-                        };
-                };
-
-                spi@110000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,p2041-espi", "fsl,mpc8536-espi";
-                        reg = <0x110000 0x1000>;
-                        interrupts = <53 0x2 0 0>;
-                        fsl,espi-num-chipselects = <4>;
-                };
-
-                sdhc: sdhc@114000 {
-                        compatible = "fsl,p2041-esdhc", "fsl,esdhc";
-                        reg = <0x114000 0x1000>;
-                        interrupts = <48 2 0 0>;
-                        sdhci,auto-cmd12;
-                        clock-frequency = <0>;
-                };
-
-                i2c@118000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118000 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@118100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118100 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <2>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119000 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <3>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119100 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                serial0: serial@11c500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial1: serial@11c600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial2: serial@11d500 {
-                        cell-index = <2>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                serial3: serial@11d600 {
-                        cell-index = <3>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                gpio0: gpio@130000 {
-                        compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio";
-                        reg = <0x130000 0x1000>;
-                        interrupts = <55 2 0 0>;
-                        #gpio-cells = <2>;
-                        gpio-controller;
-                };
-
-                usb0: usb@210000 {
-                        compatible = "fsl,p2041-usb2-mph",
-                                        "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x210000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <44 0x2 0 0>;
-                        phy_type = "utmi";
-                        port0;
-                };
-
-                usb1: usb@211000 {
-                        compatible = "fsl,p2041-usb2-dr",
-                                        "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x211000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <45 0x2 0 0>;
-                        phy_type = "utmi";
-                };
-
-                sata@220000 {
-                        compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
-                        reg = <0x220000 0x1000>;
-                        interrupts = <68 0x2 0 0>;
-                };
-
-                sata@221000 {
-                        compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
-                        reg = <0x221000 0x1000>;
-                        interrupts = <69 0x2 0 0>;
-                };
-
-                crypto: crypto@300000 {
-                        compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg = <0x300000 0x10000>;
-                        ranges = <0 0x300000 0x10000>;
-                        interrupts = <92 2 0 0>;
-
-                        sec_jr0: jr@1000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x1000 0x1000>;
-                                interrupts = <88 2 0 0>;
-                        };
-
-                        sec_jr1: jr@2000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x2000 0x1000>;
-                                interrupts = <89 2 0 0>;
-                        };
-
-                        sec_jr2: jr@3000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x3000 0x1000>;
-                                interrupts = <90 2 0 0>;
-                        };
-
-                        sec_jr3: jr@4000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x4000 0x1000>;
-                                interrupts = <91 2 0 0>;
-                        };
-
-                        rtic@6000 {
-                                compatible = "fsl,sec-v4.2-rtic",
-                                             "fsl,sec-v4.0-rtic";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0x6000 0x100>;
-                                ranges = <0x0 0x6100 0xe00>;
-
-                                rtic_a: rtic-a@0 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x00 0x20 0x100 0x80>;
-                                };
-
-                                rtic_b: rtic-b@20 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x20 0x20 0x200 0x80>;
-                                };
-
-                                rtic_c: rtic-c@40 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x40 0x20 0x300 0x80>;
-                                };
-
-                                rtic_d: rtic-d@60 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x60 0x20 0x500 0x80>;
-                                };
-                        };
-                };
-
-                sec_mon: sec_mon@314000 {
-                        compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
-                        reg = <0x314000 0x1000>;
-                        interrupts = <93 2 0 0>;
-                };
-
-        };
-
-        localbus@ffe124000 {
-                compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
-                interrupts = <25 2 0 0>;
-                #address-cells = <2>;
-                #size-cells = <1>;
-        };
-
-        pci0: pcie@ffe200000 {
-                compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <33333333>;
-                fsl,msi = <&msi0>;
-                interrupts = <16 2 1 15>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 15>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 40 1 0 0
-                                0000 0 0 2 &mpic 1 1 0 0
-                                0000 0 0 3 &mpic 2 1 0 0
-                                0000 0 0 4 &mpic 3 1 0 0
-                                >;
-                };
-        };
-
-        pci1: pcie@ffe201000 {
-                compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0 0xff>;
-                clock-frequency = <33333333>;
-                fsl,msi = <&msi1>;
-                interrupts = <16 2 1 14>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 14>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 41 1 0 0
-                                0000 0 0 2 &mpic 5 1 0 0
-                                0000 0 0 3 &mpic 6 1 0 0
-                                0000 0 0 4 &mpic 7 1 0 0
-                                >;
-                };
-        };
-
-        pci2: pcie@ffe202000 {
-                compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <33333333>;
-                fsl,msi = <&msi2>;
-                interrupts = <16 2 1 13>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 13>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 42 1 0 0
-                                0000 0 0 2 &mpic 9 1 0 0
-                                0000 0 0 3 &mpic 10 1 0 0
-                                0000 0 0 4 &mpic 11 1 0 0
-                                >;
-                };
-        };
-};
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index bbd113b49a8f..f469145abaeb 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "p3041si.dtsi"
+/include/ "fsl/p3041si-pre.dtsi"
 
 / {
         model = "fsl,P3041DS";
@@ -50,6 +50,8 @@
         };
 
         soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
                 spi@110000 {
                         flash@0 {
                                 #address-cells = <1>;
@@ -99,7 +101,18 @@
                 };
         };
 
-        localbus@ffe124000 {
+        rio: rapidio@ffe0c0000 {
+                reg = <0xf 0xfe0c0000 0 0x11000>;
+
+                port1 {
+                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+                };
+                port2 {
+                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+                };
+        };
+
+        lbc: localbus@ffe124000 {
                 reg = <0xf 0xfe124000 0 0x1000>;
                 ranges = <0 0 0xf 0xe8000000 0x08000000
                           2 0 0xf 0xffa00000 0x00040000
@@ -160,6 +173,7 @@
                 reg = <0xf 0xfe200000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+                fsl,msi = <&msi0>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -175,6 +189,7 @@
                 reg = <0xf 0xfe201000 0 0x1000>;
                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                fsl,msi = <&msi1>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -190,6 +205,7 @@
                 reg = <0xf 0xfe202000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -205,6 +221,7 @@
                 reg = <0xf 0xfe203000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -216,3 +233,5 @@
                 };
         };
 };
+
+/include/ "fsl/p3041si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p3041si.dtsi b/arch/powerpc/boot/dts/p3041si.dtsi
deleted file mode 100644
index 87130b732bc7..000000000000
--- a/arch/powerpc/boot/dts/p3041si.dtsi
+++ /dev/null
@@ -1,729 +0,0 @@
-/*
- * P3041 Silicon Device Tree Source
- *
- * Copyright 2010-2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/ {
-        compatible = "fsl,P3041";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-
-        aliases {
-                ccsr = &soc;
-                dcsr = &dcsr;
-
-                serial0 = &serial0;
-                serial1 = &serial1;
-                serial2 = &serial2;
-                serial3 = &serial3;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                pci3 = &pci3;
-                usb0 = &usb0;
-                usb1 = &usb1;
-                dma0 = &dma0;
-                dma1 = &dma1;
-                sdhc = &sdhc;
-                msi0 = &msi0;
-                msi1 = &msi1;
-                msi2 = &msi2;
-
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-                sec_mon = &sec_mon;
-
-/*
-                rio0 = &rapidio0;
- */
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: PowerPC,e500mc@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        next-level-cache = <&L2_0>;
-                        L2_0: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu1: PowerPC,e500mc@1 {
-                        device_type = "cpu";
-                        reg = <1>;
-                        next-level-cache = <&L2_1>;
-                        L2_1: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu2: PowerPC,e500mc@2 {
-                        device_type = "cpu";
-                        reg = <2>;
-                        next-level-cache = <&L2_2>;
-                        L2_2: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu3: PowerPC,e500mc@3 {
-                        device_type = "cpu";
-                        reg = <3>;
-                        next-level-cache = <&L2_3>;
-                        L2_3: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-        };
-
-        dcsr: dcsr@f00000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,dcsr", "simple-bus";
-
-                dcsr-epu@0 {
-                        compatible = "fsl,dcsr-epu";
-                        interrupts = <52 2 0 0
-                                      84 2 0 0
-                                      85 2 0 0>;
-                        interrupt-parent = <&mpic>;
-                        reg = <0x0 0x1000>;
-                };
-                dcsr-npc {
-                        compatible = "fsl,dcsr-npc";
-                        reg = <0x1000 0x1000 0x1000000 0x8000>;
-                };
-                dcsr-nxc@2000 {
-                        compatible = "fsl,dcsr-nxc";
-                        reg = <0x2000 0x1000>;
-                };
-                dcsr-corenet {
-                        compatible = "fsl,dcsr-corenet";
-                        reg = <0x8000 0x1000 0xB0000 0x1000>;
-                };
-                dcsr-dpaa@9000 {
-                        compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa";
-                        reg = <0x9000 0x1000>;
-                };
-                dcsr-ocn@11000 {
-                        compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn";
-                        reg = <0x11000 0x1000>;
-                };
-                dcsr-ddr@12000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr>;
-                        reg = <0x12000 0x1000>;
-                };
-                dcsr-nal@18000 {
-                        compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal";
-                        reg = <0x18000 0x1000>;
-                };
-                dcsr-rcpm@22000 {
-                        compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm";
-                        reg = <0x22000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@40000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu0>;
-                        reg = <0x40000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@41000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu1>;
-                        reg = <0x41000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@42000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu2>;
-                        reg = <0x42000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@43000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu3>;
-                        reg = <0x43000 0x1000>;
-                };
-        };
-
-        soc: soc@ffe000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-                reg = <0xf 0xfe000000 0 0x00001000>;
-
-                soc-sram-error {
-                        compatible = "fsl,soc-sram-error";
-                        interrupts = <16 2 1 29>;
-                };
-
-                corenet-law@0 {
-                        compatible = "fsl,corenet-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <32>;
-                };
-
-                ddr: memory-controller@8000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-                        reg = <0x8000 0x1000>;
-                        interrupts = <16 2 1 23>;
-                };
-
-                cpc: l3-cache-controller@10000 {
-                        compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
-                        reg = <0x10000 0x1000>;
-                        interrupts = <16 2 1 27>;
-                };
-
-                corenet-cf@18000 {
-                        compatible = "fsl,corenet-cf";
-                        reg = <0x18000 0x1000>;
-                        interrupts = <16 2 1 31>;
-                        fsl,ccf-num-csdids = <32>;
-                        fsl,ccf-num-snoopids = <32>;
-                };
-
-                iommu@20000 {
-                        compatible = "fsl,pamu-v1.0", "fsl,pamu";
-                        reg = <0x20000 0x4000>;
-                        interrupts = <
-                                24 2 0 0
-                                16 2 1 30>;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <4>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "fsl,mpic", "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi0: msi@41600 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41600 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0 0 0
-                                0xe1 0 0 0
-                                0xe2 0 0 0
-                                0xe3 0 0 0
-                                0xe4 0 0 0
-                                0xe5 0 0 0
-                                0xe6 0 0 0
-                                0xe7 0 0 0>;
-                };
-
-                msi1: msi@41800 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41800 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe8 0 0 0
-                                0xe9 0 0 0
-                                0xea 0 0 0
-                                0xeb 0 0 0
-                                0xec 0 0 0
-                                0xed 0 0 0
-                                0xee 0 0 0
-                                0xef 0 0 0>;
-                };
-
-                msi2: msi@41a00 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41a00 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xf0 0 0 0
-                                0xf1 0 0 0
-                                0xf2 0 0 0
-                                0xf3 0 0 0
-                                0xf4 0 0 0
-                                0xf5 0 0 0
-                                0xf6 0 0 0
-                                0xf7 0 0 0>;
-                };
-
-                guts: global-utilities@e0000 {
-                        compatible = "fsl,qoriq-device-config-1.0";
-                        reg = <0xe0000 0xe00>;
-                        fsl,has-rstcr;
-                        #sleep-cells = <1>;
-                        fsl,liodn-bits = <12>;
-                };
-
-                pins: global-utilities@e0e00 {
-                        compatible = "fsl,qoriq-pin-control-1.0";
-                        reg = <0xe0e00 0x200>;
-                        #sleep-cells = <2>;
-                };
-
-                clockgen: global-utilities@e1000 {
-                        compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
-                        reg = <0xe1000 0x1000>;
-                        clock-frequency = <0>;
-                };
-
-                rcpm: global-utilities@e2000 {
-                        compatible = "fsl,qoriq-rcpm-1.0";
-                        reg = <0xe2000 0x1000>;
-                        #sleep-cells = <1>;
-                };
-
-                sfp: sfp@e8000 {
-                        compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
-                        reg        = <0xe8000 0x1000>;
-                };
-
-                serdes: serdes@ea000 {
-                        compatible = "fsl,p3041-serdes";
-                        reg        = <0xea000 0x1000>;
-                };
-
-                dma0: dma@100300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
-                        reg = <0x100300 0x4>;
-                        ranges = <0x0 0x100100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <28 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <29 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <30 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <31 2 0 0>;
-                        };
-                };
-
-                dma1: dma@101300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
-                        reg = <0x101300 0x4>;
-                        ranges = <0x0 0x101100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <32 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <33 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <34 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p3041-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <35 2 0 0>;
-                        };
-                };
-
-                spi@110000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,p3041-espi", "fsl,mpc8536-espi";
-                        reg = <0x110000 0x1000>;
-                        interrupts = <53 0x2 0 0>;
-                        fsl,espi-num-chipselects = <4>;
-                };
-
-                sdhc: sdhc@114000 {
-                        compatible = "fsl,p3041-esdhc", "fsl,esdhc";
-                        reg = <0x114000 0x1000>;
-                        interrupts = <48 2 0 0>;
-                        sdhci,auto-cmd12;
-                        clock-frequency = <0>;
-                };
-
-                i2c@118000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118000 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@118100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118100 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <2>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119000 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <3>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119100 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                serial0: serial@11c500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial1: serial@11c600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial2: serial@11d500 {
-                        cell-index = <2>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                serial3: serial@11d600 {
-                        cell-index = <3>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                gpio0: gpio@130000 {
-                        compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio";
-                        reg = <0x130000 0x1000>;
-                        interrupts = <55 2 0 0>;
-                        #gpio-cells = <2>;
-                        gpio-controller;
-                };
-
-                usb0: usb@210000 {
-                        compatible = "fsl,p3041-usb2-mph",
-                                        "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x210000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <44 0x2 0 0>;
-                        phy_type = "utmi";
-                        port0;
-                };
-
-                usb1: usb@211000 {
-                        compatible = "fsl,p3041-usb2-dr",
-                                        "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x211000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <45 0x2 0 0>;
-                        dr_mode = "host";
-                        phy_type = "utmi";
-                };
-
-                sata@220000 {
-                        compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
-                        reg = <0x220000 0x1000>;
-                        interrupts = <68 0x2 0 0>;
-                };
-
-                sata@221000 {
-                        compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
-                        reg = <0x221000 0x1000>;
-                        interrupts = <69 0x2 0 0>;
-                };
-
-                crypto: crypto@300000 {
-                        compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg              = <0x300000 0x10000>;
-                        ranges           = <0 0x300000 0x10000>;
-                        interrupts       = <92 2 0 0>;
-
-                        sec_jr0: jr@1000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x1000 0x1000>;
-                                interrupts = <88 2 0 0>;
-                        };
-
-                        sec_jr1: jr@2000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x2000 0x1000>;
-                                interrupts = <89 2 0 0>;
-                        };
-
-                        sec_jr2: jr@3000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x3000 0x1000>;
-                                interrupts = <90 2 0 0>;
-                        };
-
-                        sec_jr3: jr@4000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x4000 0x1000>;
-                                interrupts = <91 2 0 0>;
-                        };
-
-                        rtic@6000 {
-                                compatible = "fsl,sec-v4.2-rtic",
-                                             "fsl,sec-v4.0-rtic";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0x6000 0x100>;
-                                ranges = <0x0 0x6100 0xe00>;
-
-                                rtic_a: rtic-a@0 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x00 0x20 0x100 0x80>;
-                                };
-
-                                rtic_b: rtic-b@20 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x20 0x20 0x200 0x80>;
-                                };
-
-                                rtic_c: rtic-c@40 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x40 0x20 0x300 0x80>;
-                                };
-
-                                rtic_d: rtic-d@60 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x60 0x20 0x500 0x80>;
-                                };
-                        };
-                };
-
-                sec_mon: sec_mon@314000 {
-                        compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
-                        reg = <0x314000 0x1000>;
-                        interrupts = <93 2 0 0>;
-                };
-        };
-
-/*
-        rapidio0: rapidio@ffe0c0000
-*/
-
-        localbus@ffe124000 {
-                compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
-                interrupts = <25 2 0 0>;
-                #address-cells = <2>;
-                #size-cells = <1>;
-        };
-
-        pci0: pcie@ffe200000 {
-                compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi0>;
-                interrupts = <16 2 1 15>;
-
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 15>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 40 1 0 0
-                                0000 0 0 2 &mpic 1 1 0 0
-                                0000 0 0 3 &mpic 2 1 0 0
-                                0000 0 0 4 &mpic 3 1 0 0
-                                >;
-                };
-        };
-
-        pci1: pcie@ffe201000 {
-                compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi1>;
-                interrupts = <16 2 1 14>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 14>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 41 1 0 0
-                                0000 0 0 2 &mpic 5 1 0 0
-                                0000 0 0 3 &mpic 6 1 0 0
-                                0000 0 0 4 &mpic 7 1 0 0
-                                >;
-                };
-        };
-
-        pci2: pcie@ffe202000 {
-                compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi2>;
-                interrupts = <16 2 1 13>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 13>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 42 1 0 0
-                                0000 0 0 2 &mpic 9 1 0 0
-                                0000 0 0 3 &mpic 10 1 0 0
-                                0000 0 0 4 &mpic 11 1 0 0
-                                >;
-                };
-        };
-
-        pci3: pcie@ffe203000 {
-                compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi2>;
-                interrupts = <16 2 1 12>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 12>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 43 1 0 0
-                                0000 0 0 2 &mpic 0 1 0 0
-                                0000 0 0 3 &mpic 4 1 0 0
-                                0000 0 0 4 &mpic 8 1 0 0
-                                >;
-                };
-        };
-};
diff --git a/arch/powerpc/boot/dts/p3060qds.dts b/arch/powerpc/boot/dts/p3060qds.dts
index 08b9193213e7..529042e4b9a2 100644
--- a/arch/powerpc/boot/dts/p3060qds.dts
+++ b/arch/powerpc/boot/dts/p3060qds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "p3060si.dtsi"
+/include/ "fsl/p3060si-pre.dtsi"
 
 / {
         model = "fsl,P3060QDS";
@@ -50,6 +50,8 @@
         };
 
         soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
                 spi@110000 {
                         flash@0 {
                                 #address-cells = <1>;
@@ -138,7 +140,7 @@
                 };
         };
 
-        rapidio@ffe0c0000 {
+        rio: rapidio@ffe0c0000 {
                 reg = <0xf 0xfe0c0000 0 0x11000>;
 
                 port1 {
@@ -149,7 +151,7 @@
                 };
         };
 
-        localbus@ffe124000 {
+        lbc: localbus@ffe124000 {
                 reg = <0xf 0xfe124000 0 0x1000>;
                 ranges = <0 0 0xf 0xe8000000 0x08000000
                           2 0 0xf 0xffa00000 0x00040000
@@ -210,6 +212,7 @@
                 reg = <0xf 0xfe200000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+                fsl,msi = <&msi0>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -225,6 +228,7 @@
                 reg = <0xf 0xfe201000 0 0x1000>;
                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                fsl,msi = <&msi1>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -236,3 +240,5 @@
                 };
         };
 };
+
+/include/ "fsl/p3060si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p3060si.dtsi b/arch/powerpc/boot/dts/p3060si.dtsi
deleted file mode 100644
index 68947e157bbc..000000000000
--- a/arch/powerpc/boot/dts/p3060si.dtsi
+++ /dev/null
@@ -1,719 +0,0 @@
-/*
- * P3060 Silicon Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/ {
-        compatible = "fsl,P3060";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-
-        aliases {
-                ccsr = &soc;
-                dcsr = &dcsr;
-
-                serial0 = &serial0;
-                serial1 = &serial1;
-                serial2 = &serial2;
-                serial3 = &serial3;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                usb0 = &usb0;
-                usb1 = &usb1;
-                dma0 = &dma0;
-                dma1 = &dma1;
-                msi0 = &msi0;
-                msi1 = &msi1;
-                msi2 = &msi2;
-
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-                sec_mon = &sec_mon;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: PowerPC,e500mc@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        next-level-cache = <&L2_0>;
-                        L2_0: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu1: PowerPC,e500mc@1 {
-                        device_type = "cpu";
-                        reg = <1>;
-                        next-level-cache = <&L2_1>;
-                        L2_1: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu4: PowerPC,e500mc@4 {
-                        device_type = "cpu";
-                        reg = <4>;
-                        next-level-cache = <&L2_4>;
-                        L2_4: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu5: PowerPC,e500mc@5 {
-                        device_type = "cpu";
-                        reg = <5>;
-                        next-level-cache = <&L2_5>;
-                        L2_5: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu6: PowerPC,e500mc@6 {
-                        device_type = "cpu";
-                        reg = <6>;
-                        next-level-cache = <&L2_6>;
-                        L2_6: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu7: PowerPC,e500mc@7 {
-                        device_type = "cpu";
-                        reg = <7>;
-                        next-level-cache = <&L2_7>;
-                        L2_7: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-        };
-
-        dcsr: dcsr@f00000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,dcsr", "simple-bus";
-
-                dcsr-epu@0 {
-                        compatible = "fsl,dcsr-epu";
-                        interrupts = <52 2 0 0
-                                      84 2 0 0
-                                      85 2 0 0>;
-                        interrupt-parent = <&mpic>;
-                        reg = <0x0 0x1000>;
-                };
-                dcsr-npc {
-                        compatible = "fsl,dcsr-npc";
-                        reg = <0x1000 0x1000 0x1000000 0x8000>;
-                };
-                dcsr-nxc@2000 {
-                        compatible = "fsl,dcsr-nxc";
-                        reg = <0x2000 0x1000>;
-                };
-                dcsr-corenet {
-                        compatible = "fsl,dcsr-corenet";
-                        reg = <0x8000 0x1000 0xB0000 0x1000>;
-                };
-                dcsr-dpaa@9000 {
-                        compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
-                        reg = <0x9000 0x1000>;
-                };
-                dcsr-ocn@11000 {
-                        compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
-                        reg = <0x11000 0x1000>;
-                };
-                dcsr-ddr@12000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr>;
-                        reg = <0x12000 0x1000>;
-                };
-                dcsr-nal@18000 {
-                        compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
-                        reg = <0x18000 0x1000>;
-                };
-                dcsr-rcpm@22000 {
-                        compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
-                        reg = <0x22000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@40000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu0>;
-                        reg = <0x40000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@41000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu1>;
-                        reg = <0x41000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@44000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu4>;
-                        reg = <0x44000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@45000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu5>;
-                        reg = <0x45000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@46000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu6>;
-                        reg = <0x46000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@47000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu7>;
-                        reg = <0x47000 0x1000>;
-                };
-        };
-
-        soc: soc@ffe000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-                reg = <0xf 0xfe000000 0 0x00001000>;
-
-                soc-sram-error {
-                        compatible = "fsl,soc-sram-error";
-                        interrupts = <16 2 1 29>;
-                };
-
-                corenet-law@0 {
-                        compatible = "fsl,corenet-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <32>;
-                };
-
-                ddr: memory-controller@8000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
-                        reg = <0x8000 0x1000>;
-                        interrupts = <16 2 1 23>;
-                };
-
-                cpc: l3-cache-controller@10000 {
-                        compatible = "fsl,p3060-l3-cache-controller", "cache";
-                        reg = <0x10000 0x1000
-                               0x11000 0x1000>;
-                        interrupts = <16 2 1 27>;
-                };
-
-                corenet-cf@18000 {
-                        compatible = "fsl,corenet-cf";
-                        reg = <0x18000 0x1000>;
-                        interrupts = <16 2 1 31>;
-                        fsl,ccf-num-csdids = <32>;
-                        fsl,ccf-num-snoopids = <32>;
-                };
-
-                iommu@20000 {
-                        compatible = "fsl,pamu-v1.0", "fsl,pamu";
-                        reg = <0x20000 0x5000>;
-                        interrupts = <
-                                24 2 0 0
-                                16 2 1 30>;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <4>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "fsl,mpic", "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi0: msi@41600 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41600 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0 0 0
-                                0xe1 0 0 0
-                                0xe2 0 0 0
-                                0xe3 0 0 0
-                                0xe4 0 0 0
-                                0xe5 0 0 0
-                                0xe6 0 0 0
-                                0xe7 0 0 0>;
-                };
-
-                msi1: msi@41800 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41800 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe8 0 0 0
-                                0xe9 0 0 0
-                                0xea 0 0 0
-                                0xeb 0 0 0
-                                0xec 0 0 0
-                                0xed 0 0 0
-                                0xee 0 0 0
-                                0xef 0 0 0>;
-                };
-
-                msi2: msi@41a00 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41a00 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xf0 0 0 0
-                                0xf1 0 0 0
-                                0xf2 0 0 0
-                                0xf3 0 0 0
-                                0xf4 0 0 0
-                                0xf5 0 0 0
-                                0xf6 0 0 0
-                                0xf7 0 0 0>;
-                };
-
-                rmu: rmu@d3000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,srio-rmu";
-                        reg = <0xd3000 0x500>;
-                        ranges = <0x0 0xd3000 0x500>;
-
-                        message-unit@0 {
-                                compatible = "fsl,srio-msg-unit";
-                                reg = <0x0 0x100>;
-                                interrupts = <
-                                        60 2 0 0  /* msg1_tx_irq */
-                                        61 2 0 0>;/* msg1_rx_irq */
-                        };
-                        message-unit@100 {
-                                compatible = "fsl,srio-msg-unit";
-                                reg = <0x100 0x100>;
-                                interrupts = <
-                                        62 2 0 0  /* msg2_tx_irq */
-                                        63 2 0 0>;/* msg2_rx_irq */
-                        };
-                        doorbell-unit@400 {
-                                compatible = "fsl,srio-dbell-unit";
-                                reg = <0x400 0x80>;
-                                interrupts = <
-                                        56 2 0 0  /* bell_outb_irq */
-                                        57 2 0 0>;/* bell_inb_irq */
-                        };
-                        port-write-unit@4e0 {
-                                compatible = "fsl,srio-port-write-unit";
-                                reg = <0x4e0 0x20>;
-                                interrupts = <16 2 1 11>;
-                        };
-                };
-
-                guts: global-utilities@e0000 {
-                        compatible = "fsl,qoriq-device-config-1.0";
-                        reg = <0xe0000 0xe00>;
-                        fsl,has-rstcr;
-                        #sleep-cells = <1>;
-                        fsl,liodn-bits = <12>;
-                };
-
-                pins: global-utilities@e0e00 {
-                        compatible = "fsl,qoriq-pin-control-1.0";
-                        reg = <0xe0e00 0x200>;
-                        #sleep-cells = <2>;
-                };
-
-                clockgen: global-utilities@e1000 {
-                        compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
-                        reg = <0xe1000 0x1000>;
-                        clock-frequency = <0>;
-                };
-
-                rcpm: global-utilities@e2000 {
-                        compatible = "fsl,qoriq-rcpm-1.0";
-                        reg = <0xe2000 0x1000>;
-                        #sleep-cells = <1>;
-                };
-
-                sfp: sfp@e8000 {
-                        compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
-                        reg        = <0xe8000 0x1000>;
-                };
-
-                serdes: serdes@ea000 {
-                        compatible = "fsl,p3060-serdes";
-                        reg        = <0xea000 0x1000>;
-                };
-
-                dma0: dma@100300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
-                        reg = <0x100300 0x4>;
-                        ranges = <0x0 0x100100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <28 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <29 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <30 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <31 2 0 0>;
-                        };
-                };
-
-                dma1: dma@101300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
-                        reg = <0x101300 0x4>;
-                        ranges = <0x0 0x101100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <32 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <33 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <34 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p3060-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <35 2 0 0>;
-                        };
-                };
-
-                spi@110000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,p3060-espi", "fsl,mpc8536-espi";
-                        reg = <0x110000 0x1000>;
-                        interrupts = <53 0x2 0 0>;
-                        fsl,espi-num-chipselects = <4>;
-                };
-
-                i2c@118000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118000 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@118100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118100 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <2>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119000 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <3>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119100 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                serial0: serial@11c500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial1: serial@11c600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial2: serial@11d500 {
-                        cell-index = <2>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                serial3: serial@11d600 {
-                        cell-index = <3>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                gpio0: gpio@130000 {
-                        compatible = "fsl,p3060-gpio", "fsl,qoriq-gpio";
-                        reg = <0x130000 0x1000>;
-                        interrupts = <55 2 0 0>;
-                        #gpio-cells = <2>;
-                        gpio-controller;
-                };
-
-                usb0: usb@210000 {
-                        compatible = "fsl,p3060-usb2-mph",
-                                        "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x210000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <44 0x2 0 0>;
-                };
-
-                usb1: usb@211000 {
-                        compatible = "fsl,p3060-usb2-dr",
-                                        "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x211000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <45 0x2 0 0>;
-                };
-
-                crypto: crypto@300000 {
-                        compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg = <0x300000 0x10000>;
-                        ranges = <0 0x300000 0x10000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <92 2 0 0>;
-
-                        sec_jr0: jr@1000 {
-                                compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
-                                reg = <0x1000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <88 2 0 0>;
-                        };
-
-                        sec_jr1: jr@2000 {
-                                compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
-                                reg = <0x2000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <89 2 0 0>;
-                        };
-
-                        sec_jr2: jr@3000 {
-                                compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
-                                reg = <0x3000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <90 2 0 0>;
-                        };
-
-                        sec_jr3: jr@4000 {
-                                compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
-                                reg = <0x4000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <91 2 0 0>;
-                        };
-
-                        rtic@6000 {
-                                compatible = "fsl,sec-v4.1-rtic", "fsl,sec-v4.0-rtic";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0x6000 0x100>;
-                                ranges = <0x0 0x6100 0xe00>;
-
-                                rtic_a: rtic-a@0 {
-                                        compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x00 0x20 0x100 0x80>;
-                                };
-
-                                rtic_b: rtic-b@20 {
-                                        compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x20 0x20 0x200 0x80>;
-                                };
-
-                                rtic_c: rtic-c@40 {
-                                        compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x40 0x20 0x300 0x80>;
-                                };
-
-                                rtic_d: rtic-d@60 {
-                                        compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x60 0x20 0x500 0x80>;
-                                };
-                        };
-                };
-
-                sec_mon: sec_mon@314000 {
-                        compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
-                        reg = <0x314000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <93 2 0 0>;
-                };
-        };
-
-        rapidio@ffe0c0000 {
-                compatible = "fsl,srio";
-                interrupts = <16 2 1 11>;
-                #address-cells = <2>;
-                #size-cells = <2>;
-                fsl,srio-rmu-handle = <&rmu>;
-                ranges;
-
-                port1 {
-                        #address-cells = <2>;
-                        #size-cells = <2>;
-                        cell-index = <1>;
-                };
-
-                port2 {
-                        #address-cells = <2>;
-                        #size-cells = <2>;
-                        cell-index = <2>;
-                };
-        };
-
-        localbus@ffe124000 {
-                compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
-                interrupts = <25 2 0 0>;
-                #address-cells = <2>;
-                #size-cells = <1>;
-        };
-
-        pci0: pcie@ffe200000 {
-                compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <33333333>;
-                fsl,msi = <&msi0>;
-                interrupts = <16 2 1 15>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 15>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 40 1 0 0
-                                0000 0 0 2 &mpic 1 1 0 0
-                                0000 0 0 3 &mpic 2 1 0 0
-                                0000 0 0 4 &mpic 3 1 0 0
-                                >;
-                };
-        };
-
-        pci1: pcie@ffe201000 {
-                compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0 0xff>;
-                clock-frequency = <33333333>;
-                fsl,msi = <&msi1>;
-                interrupts = <16 2 1 14>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 14>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 41 1 0 0
-                                0000 0 0 2 &mpic 5 1 0 0
-                                0000 0 0 3 &mpic 6 1 0 0
-                                0000 0 0 4 &mpic 7 1 0 0
-                                >;
-                };
-        };
-};
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index c7916dc28014..6d60e54e50a0 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "p4080si.dtsi"
+/include/ "fsl/p4080si-pre.dtsi"
 
 / {
         model = "fsl,P4080DS";
@@ -50,6 +50,9 @@
         };
 
         soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
+
                 spi@110000 {
                         flash@0 {
                                 #address-cells = <1>;
@@ -105,12 +108,18 @@
                 };
         };
 
-        rapidio0: rapidio@ffe0c0000 {
-                reg = <0xf 0xfe0c0000 0 0x20000>;
-                ranges = <0 0 0xc 0x20000000 0 0x01000000>;
+        rio: rapidio@ffe0c0000 {
+                reg = <0xf 0xfe0c0000 0 0x11000>;
+
+                port1 {
+                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+                };
+                port2 {
+                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+                };
         };
 
-        localbus@ffe124000 {
+        lbc: localbus@ffe124000 {
                 reg = <0xf 0xfe124000 0 0x1000>;
                 ranges = <0 0 0xf 0xe8000000 0x08000000
                           3 0 0xf 0xffdf0000 0x00008000>;
@@ -132,6 +141,7 @@
                 reg = <0xf 0xfe200000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+                fsl,msi = <&msi0>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -147,6 +157,7 @@
                 reg = <0xf 0xfe201000 0 0x1000>;
                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                fsl,msi = <&msi1>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -162,6 +173,7 @@
                 reg = <0xf 0xfe202000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -174,3 +186,5 @@
         };
 
 };
+
+/include/ "fsl/p4080si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p4080si.dtsi b/arch/powerpc/boot/dts/p4080si.dtsi
deleted file mode 100644
index f20c01ab2473..000000000000
--- a/arch/powerpc/boot/dts/p4080si.dtsi
+++ /dev/null
@@ -1,755 +0,0 @@
-/*
- * P4080 Silicon Device Tree Source
- *
- * Copyright 2009-2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/ {
-        compatible = "fsl,P4080";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-
-        aliases {
-                ccsr = &soc;
-                dcsr = &dcsr;
-
-                serial0 = &serial0;
-                serial1 = &serial1;
-                serial2 = &serial2;
-                serial3 = &serial3;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                usb0 = &usb0;
-                usb1 = &usb1;
-                dma0 = &dma0;
-                dma1 = &dma1;
-                sdhc = &sdhc;
-                msi0 = &msi0;
-                msi1 = &msi1;
-                msi2 = &msi2;
-
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-                sec_mon = &sec_mon;
-
-                rio0 = &rapidio0;
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: PowerPC,e500mc@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        next-level-cache = <&L2_0>;
-                        L2_0: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu1: PowerPC,e500mc@1 {
-                        device_type = "cpu";
-                        reg = <1>;
-                        next-level-cache = <&L2_1>;
-                        L2_1: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu2: PowerPC,e500mc@2 {
-                        device_type = "cpu";
-                        reg = <2>;
-                        next-level-cache = <&L2_2>;
-                        L2_2: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu3: PowerPC,e500mc@3 {
-                        device_type = "cpu";
-                        reg = <3>;
-                        next-level-cache = <&L2_3>;
-                        L2_3: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu4: PowerPC,e500mc@4 {
-                        device_type = "cpu";
-                        reg = <4>;
-                        next-level-cache = <&L2_4>;
-                        L2_4: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu5: PowerPC,e500mc@5 {
-                        device_type = "cpu";
-                        reg = <5>;
-                        next-level-cache = <&L2_5>;
-                        L2_5: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu6: PowerPC,e500mc@6 {
-                        device_type = "cpu";
-                        reg = <6>;
-                        next-level-cache = <&L2_6>;
-                        L2_6: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu7: PowerPC,e500mc@7 {
-                        device_type = "cpu";
-                        reg = <7>;
-                        next-level-cache = <&L2_7>;
-                        L2_7: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-        };
-
-        dcsr: dcsr@f00000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,dcsr", "simple-bus";
-
-                dcsr-epu@0 {
-                        compatible = "fsl,dcsr-epu";
-                        interrupts = <52 2 0 0
-                                      84 2 0 0
-                                      85 2 0 0>;
-                        interrupt-parent = <&mpic>;
-                        reg = <0x0 0x1000>;
-                };
-                dcsr-npc {
-                        compatible = "fsl,dcsr-npc";
-                        reg = <0x1000 0x1000 0x1000000 0x8000>;
-                };
-                dcsr-nxc@2000 {
-                        compatible = "fsl,dcsr-nxc";
-                        reg = <0x2000 0x1000>;
-                };
-                dcsr-corenet {
-                        compatible = "fsl,dcsr-corenet";
-                        reg = <0x8000 0x1000 0xB0000 0x1000>;
-                };
-                dcsr-dpaa@9000 {
-                        compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
-                        reg = <0x9000 0x1000>;
-                };
-                dcsr-ocn@11000 {
-                        compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
-                        reg = <0x11000 0x1000>;
-                };
-                dcsr-ddr@12000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr1>;
-                        reg = <0x12000 0x1000>;
-                };
-                dcsr-ddr@13000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr2>;
-                        reg = <0x13000 0x1000>;
-                };
-                dcsr-nal@18000 {
-                        compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
-                        reg = <0x18000 0x1000>;
-                };
-                dcsr-rcpm@22000 {
-                        compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
-                        reg = <0x22000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@40000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu0>;
-                        reg = <0x40000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@41000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu1>;
-                        reg = <0x41000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@42000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu2>;
-                        reg = <0x42000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@43000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu3>;
-                        reg = <0x43000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@44000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu4>;
-                        reg = <0x44000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@45000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu5>;
-                        reg = <0x45000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@46000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu6>;
-                        reg = <0x46000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@47000 {
-                        compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu7>;
-                        reg = <0x47000 0x1000>;
-                };
-        };
-
-        soc: soc@ffe000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-                reg = <0xf 0xfe000000 0 0x00001000>;
-
-                soc-sram-error {
-                        compatible = "fsl,soc-sram-error";
-                        interrupts = <16 2 1 29>;
-                };
-
-                corenet-law@0 {
-                        compatible = "fsl,corenet-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <32>;
-                };
-
-                ddr1: memory-controller@8000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
-                        reg = <0x8000 0x1000>;
-                        interrupts = <16 2 1 23>;
-                };
-
-                ddr2: memory-controller@9000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
-                        reg = <0x9000 0x1000>;
-                        interrupts = <16 2 1 22>;
-                };
-
-                cpc: l3-cache-controller@10000 {
-                        compatible = "fsl,p4080-l3-cache-controller", "cache";
-                        reg = <0x10000 0x1000
-                               0x11000 0x1000>;
-                        interrupts = <16 2 1 27
-                                      16 2 1 26>;
-                };
-
-                corenet-cf@18000 {
-                        compatible = "fsl,corenet-cf";
-                        reg = <0x18000 0x1000>;
-                        interrupts = <16 2 1 31>;
-                        fsl,ccf-num-csdids = <32>;
-                        fsl,ccf-num-snoopids = <32>;
-                };
-
-                iommu@20000 {
-                        compatible = "fsl,pamu-v1.0", "fsl,pamu";
-                        reg = <0x20000 0x5000>;
-                        interrupts = <
-                                24 2 0 0
-                                16 2 1 30>;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <4>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "fsl,mpic", "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi0: msi@41600 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41600 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0 0 0
-                                0xe1 0 0 0
-                                0xe2 0 0 0
-                                0xe3 0 0 0
-                                0xe4 0 0 0
-                                0xe5 0 0 0
-                                0xe6 0 0 0
-                                0xe7 0 0 0>;
-                };
-
-                msi1: msi@41800 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41800 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe8 0 0 0
-                                0xe9 0 0 0
-                                0xea 0 0 0
-                                0xeb 0 0 0
-                                0xec 0 0 0
-                                0xed 0 0 0
-                                0xee 0 0 0
-                                0xef 0 0 0>;
-                };
-
-                msi2: msi@41a00 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41a00 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xf0 0 0 0
-                                0xf1 0 0 0
-                                0xf2 0 0 0
-                                0xf3 0 0 0
-                                0xf4 0 0 0
-                                0xf5 0 0 0
-                                0xf6 0 0 0
-                                0xf7 0 0 0>;
-                };
-
-                guts: global-utilities@e0000 {
-                        compatible = "fsl,qoriq-device-config-1.0";
-                        reg = <0xe0000 0xe00>;
-                        fsl,has-rstcr;
-                        #sleep-cells = <1>;
-                        fsl,liodn-bits = <12>;
-                };
-
-                pins: global-utilities@e0e00 {
-                        compatible = "fsl,qoriq-pin-control-1.0";
-                        reg = <0xe0e00 0x200>;
-                        #sleep-cells = <2>;
-                };
-
-                clockgen: global-utilities@e1000 {
-                        compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
-                        reg = <0xe1000 0x1000>;
-                        clock-frequency = <0>;
-                };
-
-                rcpm: global-utilities@e2000 {
-                        compatible = "fsl,qoriq-rcpm-1.0";
-                        reg = <0xe2000 0x1000>;
-                        #sleep-cells = <1>;
-                };
-
-                sfp: sfp@e8000 {
-                        compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
-                        reg        = <0xe8000 0x1000>;
-                };
-
-                serdes: serdes@ea000 {
-                        compatible = "fsl,p4080-serdes";
-                        reg        = <0xea000 0x1000>;
-                };
-
-                dma0: dma@100300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p4080-dma", "fsl,eloplus-dma";
-                        reg = <0x100300 0x4>;
-                        ranges = <0x0 0x100100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <28 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <29 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <30 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <31 2 0 0>;
-                        };
-                };
-
-                dma1: dma@101300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p4080-dma", "fsl,eloplus-dma";
-                        reg = <0x101300 0x4>;
-                        ranges = <0x0 0x101100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <32 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <33 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <34 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p4080-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <35 2 0 0>;
-                        };
-                };
-
-                spi@110000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,p4080-espi", "fsl,mpc8536-espi";
-                        reg = <0x110000 0x1000>;
-                        interrupts = <53 0x2 0 0>;
-                        fsl,espi-num-chipselects = <4>;
-                };
-
-                sdhc: sdhc@114000 {
-                        compatible = "fsl,p4080-esdhc", "fsl,esdhc";
-                        reg = <0x114000 0x1000>;
-                        interrupts = <48 2 0 0>;
-                        voltage-ranges = <3300 3300>;
-                        sdhci,auto-cmd12;
-                        clock-frequency = <0>;
-                };
-
-                i2c@118000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118000 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@118100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118100 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <2>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119000 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <3>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119100 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                serial0: serial@11c500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial1: serial@11c600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial2: serial@11d500 {
-                        cell-index = <2>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                serial3: serial@11d600 {
-                        cell-index = <3>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                gpio0: gpio@130000 {
-                        compatible = "fsl,p4080-gpio", "fsl,qoriq-gpio";
-                        reg = <0x130000 0x1000>;
-                        interrupts = <55 2 0 0>;
-                        #gpio-cells = <2>;
-                        gpio-controller;
-                };
-
-                usb0: usb@210000 {
-                        compatible = "fsl,p4080-usb2-mph",
-                                        "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x210000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <44 0x2 0 0>;
-                };
-
-                usb1: usb@211000 {
-                        compatible = "fsl,p4080-usb2-dr",
-                                        "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x211000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <45 0x2 0 0>;
-                };
-
-                crypto: crypto@300000 {
-                        compatible = "fsl,sec-v4.0";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg = <0x300000 0x10000>;
-                        ranges = <0 0x300000 0x10000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <92 2 0 0>;
-
-                        sec_jr0: jr@1000 {
-                                compatible = "fsl,sec-v4.0-job-ring";
-                                reg = <0x1000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <88 2 0 0>;
-                        };
-
-                        sec_jr1: jr@2000 {
-                                compatible = "fsl,sec-v4.0-job-ring";
-                                reg = <0x2000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <89 2 0 0>;
-                        };
-
-                        sec_jr2: jr@3000 {
-                                compatible = "fsl,sec-v4.0-job-ring";
-                                reg = <0x3000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <90 2 0 0>;
-                        };
-
-                        sec_jr3: jr@4000 {
-                                compatible = "fsl,sec-v4.0-job-ring";
-                                reg = <0x4000 0x1000>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <91 2 0 0>;
-                        };
-
-                        rtic@6000 {
-                                compatible = "fsl,sec-v4.0-rtic";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0x6000 0x100>;
-                                ranges = <0x0 0x6100 0xe00>;
-
-                                rtic_a: rtic-a@0 {
-                                        compatible = "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x00 0x20 0x100 0x80>;
-                                };
-
-                                rtic_b: rtic-b@20 {
-                                        compatible = "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x20 0x20 0x200 0x80>;
-                                };
-
-                                rtic_c: rtic-c@40 {
-                                        compatible = "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x40 0x20 0x300 0x80>;
-                                };
-
-                                rtic_d: rtic-d@60 {
-                                        compatible = "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x60 0x20 0x500 0x80>;
-                                };
-                        };
-                };
-
-                sec_mon: sec_mon@314000 {
-                        compatible = "fsl,sec-v4.0-mon";
-                        reg = <0x314000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <93 2 0 0>;
-                };
-        };
-
-        rapidio0: rapidio@ffe0c0000 {
-                #address-cells = <2>;
-                #size-cells = <2>;
-                compatible = "fsl,rapidio-delta";
-                interrupts = <
-                        16 2 1 11 /* err_irq */
-                        56 2 0 0  /* bell_outb_irq */
-                        57 2 0 0  /* bell_inb_irq */
-                        60 2 0 0  /* msg1_tx_irq */
-                        61 2 0 0  /* msg1_rx_irq */
-                        62 2 0 0  /* msg2_tx_irq */
-                        63 2 0 0>; /* msg2_rx_irq */
-        };
-
-        localbus@ffe124000 {
-                compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
-                interrupts = <25 2 0 0>;
-                #address-cells = <2>;
-                #size-cells = <1>;
-        };
-
-        pci0: pcie@ffe200000 {
-                compatible = "fsl,p4080-pcie";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi0>;
-                interrupts = <16 2 1 15>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 15>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 40 1 0 0
-                                0000 0 0 2 &mpic 1 1 0 0
-                                0000 0 0 3 &mpic 2 1 0 0
-                                0000 0 0 4 &mpic 3 1 0 0
-                                >;
-                };
-        };
-
-        pci1: pcie@ffe201000 {
-                compatible = "fsl,p4080-pcie";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi1>;
-                interrupts = <16 2 1 14>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 14>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 41 1 0 0
-                                0000 0 0 2 &mpic 5 1 0 0
-                                0000 0 0 3 &mpic 6 1 0 0
-                                0000 0 0 4 &mpic 7 1 0 0
-                                >;
-                };
-        };
-
-        pci2: pcie@ffe202000 {
-                compatible = "fsl,p4080-pcie";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi2>;
-                interrupts = <16 2 1 13>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 13>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 42 1 0 0
-                                0000 0 0 2 &mpic 9 1 0 0
-                                0000 0 0 3 &mpic 10 1 0 0
-                                0000 0 0 4 &mpic 11 1 0 0
-                                >;
-                };
-        };
-};
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index e6d40999ccd7..1c250684c902 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/include/ "p5020si.dtsi"
+/include/ "fsl/p5020si-pre.dtsi"
 
 / {
         model = "fsl,P5020DS";
@@ -50,6 +50,8 @@
         };
 
         soc: soc@ffe000000 {
+                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+                reg = <0xf 0xfe000000 0 0x00001000>;
                 spi@110000 {
                         flash@0 {
                                 #address-cells = <1>;
@@ -99,7 +101,18 @@
                 };
         };
 
-        localbus@ffe124000 {
+        rio: rapidio@ffe0c0000 {
+                reg = <0xf 0xfe0c0000 0 0x11000>;
+
+                port1 {
+                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+                };
+                port2 {
+                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+                };
+        };
+
+        lbc: localbus@ffe124000 {
                 reg = <0xf 0xfe124000 0 0x1000>;
                 ranges = <0 0 0xf 0xe8000000 0x08000000
                           2 0 0xf 0xffa00000 0x00040000
@@ -160,7 +173,7 @@
                 reg = <0xf 0xfe200000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
-
+                fsl,msi = <&msi0>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -176,6 +189,7 @@
                 reg = <0xf 0xfe201000 0 0x1000>;
                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+                fsl,msi = <&msi1>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -191,6 +205,7 @@
                 reg = <0xf 0xfe202000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -206,6 +221,7 @@
                 reg = <0xf 0xfe203000 0 0x1000>;
                 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
+                fsl,msi = <&msi2>;
                 pcie@0 {
                         ranges = <0x02000000 0 0xe0000000
                                   0x02000000 0 0xe0000000
@@ -217,3 +233,5 @@
                 };
         };
 };
+
+/include/ "fsl/p5020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p5020si.dtsi b/arch/powerpc/boot/dts/p5020si.dtsi
deleted file mode 100644
index e7948ad71fa3..000000000000
--- a/arch/powerpc/boot/dts/p5020si.dtsi
+++ /dev/null
@@ -1,716 +0,0 @@
-/*
- * P5020 Silicon Device Tree Source
- *
- * Copyright 2010-2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/ {
-        compatible = "fsl,P5020";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-
-        aliases {
-                ccsr = &soc;
-                dcsr = &dcsr;
-
-                serial0 = &serial0;
-                serial1 = &serial1;
-                serial2 = &serial2;
-                serial3 = &serial3;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                pci2 = &pci2;
-                pci3 = &pci3;
-                usb0 = &usb0;
-                usb1 = &usb1;
-                dma0 = &dma0;
-                dma1 = &dma1;
-                sdhc = &sdhc;
-                msi0 = &msi0;
-                msi1 = &msi1;
-                msi2 = &msi2;
-
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-                sec_mon = &sec_mon;
-
-/*
-                rio0 = &rapidio0;
- */
-        };
-
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                cpu0: PowerPC,e5500@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        next-level-cache = <&L2_0>;
-                        L2_0: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu1: PowerPC,e5500@1 {
-                        device_type = "cpu";
-                        reg = <1>;
-                        next-level-cache = <&L2_1>;
-                        L2_1: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-        };
-
-        dcsr: dcsr@f00000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,dcsr", "simple-bus";
-
-                dcsr-epu@0 {
-                        compatible = "fsl,dcsr-epu";
-                        interrupts = <52 2 0 0
-                                      84 2 0 0
-                                      85 2 0 0>;
-                        interrupt-parent = <&mpic>;
-                        reg = <0x0 0x1000>;
-                };
-                dcsr-npc {
-                        compatible = "fsl,dcsr-npc";
-                        reg = <0x1000 0x1000 0x1000000 0x8000>;
-                };
-                dcsr-nxc@2000 {
-                        compatible = "fsl,dcsr-nxc";
-                        reg = <0x2000 0x1000>;
-                };
-                dcsr-corenet {
-                        compatible = "fsl,dcsr-corenet";
-                        reg = <0x8000 0x1000 0xB0000 0x1000>;
-                };
-                dcsr-dpaa@9000 {
-                        compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
-                        reg = <0x9000 0x1000>;
-                };
-                dcsr-ocn@11000 {
-                        compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
-                        reg = <0x11000 0x1000>;
-                };
-                dcsr-ddr@12000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr1>;
-                        reg = <0x12000 0x1000>;
-                };
-                dcsr-ddr@13000 {
-                        compatible = "fsl,dcsr-ddr";
-                        dev-handle = <&ddr2>;
-                        reg = <0x13000 0x1000>;
-                };
-                dcsr-nal@18000 {
-                        compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
-                        reg = <0x18000 0x1000>;
-                };
-                dcsr-rcpm@22000 {
-                        compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
-                        reg = <0x22000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@40000 {
-                        compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu0>;
-                        reg = <0x40000 0x1000>;
-                };
-                dcsr-cpu-sb-proxy@41000 {
-                        compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                        cpu-handle = <&cpu1>;
-                        reg = <0x41000 0x1000>;
-                };
-        };
-
-        soc: soc@ffe000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "simple-bus";
-                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-                reg = <0xf 0xfe000000 0 0x00001000>;
-
-                soc-sram-error {
-                        compatible = "fsl,soc-sram-error";
-                        interrupts = <16 2 1 29>;
-                };
-
-                corenet-law@0 {
-                        compatible = "fsl,corenet-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <32>;
-                };
-
-                ddr1: memory-controller@8000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-                        reg = <0x8000 0x1000>;
-                        interrupts = <16 2 1 23>;
-                };
-
-                ddr2: memory-controller@9000 {
-                        compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-                        reg = <0x9000 0x1000>;
-                        interrupts = <16 2 1 22>;
-                };
-
-                cpc: l3-cache-controller@10000 {
-                        compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
-                        reg = <0x10000 0x1000
-                               0x11000 0x1000>;
-                        interrupts = <16 2 1 27
-                                      16 2 1 26>;
-                };
-
-                corenet-cf@18000 {
-                        compatible = "fsl,corenet-cf";
-                        reg = <0x18000 0x1000>;
-                        interrupts = <16 2 1 31>;
-                        fsl,ccf-num-csdids = <32>;
-                        fsl,ccf-num-snoopids = <32>;
-                };
-
-                iommu@20000 {
-                        compatible = "fsl,pamu-v1.0", "fsl,pamu";
-                        reg = <0x20000 0x4000>;
-                        interrupts = <
-                                24 2 0 0
-                                16 2 1 30>;
-                };
-
-                mpic: pic@40000 {
-                        clock-frequency = <0>;
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <4>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "fsl,mpic", "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-
-                msi0: msi@41600 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41600 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0 0 0
-                                0xe1 0 0 0
-                                0xe2 0 0 0
-                                0xe3 0 0 0
-                                0xe4 0 0 0
-                                0xe5 0 0 0
-                                0xe6 0 0 0
-                                0xe7 0 0 0>;
-                };
-
-                msi1: msi@41800 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41800 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe8 0 0 0
-                                0xe9 0 0 0
-                                0xea 0 0 0
-                                0xeb 0 0 0
-                                0xec 0 0 0
-                                0xed 0 0 0
-                                0xee 0 0 0
-                                0xef 0 0 0>;
-                };
-
-                msi2: msi@41a00 {
-                        compatible = "fsl,mpic-msi";
-                        reg = <0x41a00 0x200>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xf0 0 0 0
-                                0xf1 0 0 0
-                                0xf2 0 0 0
-                                0xf3 0 0 0
-                                0xf4 0 0 0
-                                0xf5 0 0 0
-                                0xf6 0 0 0
-                                0xf7 0 0 0>;
-                };
-
-                guts: global-utilities@e0000 {
-                        compatible = "fsl,qoriq-device-config-1.0";
-                        reg = <0xe0000 0xe00>;
-                        fsl,has-rstcr;
-                        #sleep-cells = <1>;
-                        fsl,liodn-bits = <12>;
-                };
-
-                pins: global-utilities@e0e00 {
-                        compatible = "fsl,qoriq-pin-control-1.0";
-                        reg = <0xe0e00 0x200>;
-                        #sleep-cells = <2>;
-                };
-
-                clockgen: global-utilities@e1000 {
-                        compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
-                        reg = <0xe1000 0x1000>;
-                        clock-frequency = <0>;
-                };
-
-                rcpm: global-utilities@e2000 {
-                        compatible = "fsl,qoriq-rcpm-1.0";
-                        reg = <0xe2000 0x1000>;
-                        #sleep-cells = <1>;
-                };
-
-                sfp: sfp@e8000 {
-                        compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
-                        reg        = <0xe8000 0x1000>;
-                };
-
-                serdes: serdes@ea000 {
-                        compatible = "fsl,p5020-serdes";
-                        reg        = <0xea000 0x1000>;
-                };
-
-                dma0: dma@100300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
-                        reg = <0x100300 0x4>;
-                        ranges = <0x0 0x100100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <28 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <29 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <30 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <31 2 0 0>;
-                        };
-                };
-
-                dma1: dma@101300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
-                        reg = <0x101300 0x4>;
-                        ranges = <0x0 0x101100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupts = <32 2 0 0>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupts = <33 2 0 0>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupts = <34 2 0 0>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,p5020-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupts = <35 2 0 0>;
-                        };
-                };
-
-                spi@110000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,p5020-espi", "fsl,mpc8536-espi";
-                        reg = <0x110000 0x1000>;
-                        interrupts = <53 0x2 0 0>;
-                        fsl,espi-num-chipselects = <4>;
-                };
-
-                sdhc: sdhc@114000 {
-                        compatible = "fsl,p5020-esdhc", "fsl,esdhc";
-                        reg = <0x114000 0x1000>;
-                        interrupts = <48 2 0 0>;
-                        sdhci,auto-cmd12;
-                        clock-frequency = <0>;
-                };
-
-                i2c@118000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118000 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@118100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x118100 0x100>;
-                        interrupts = <38 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <2>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119000 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                i2c@119100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <3>;
-                        compatible = "fsl-i2c";
-                        reg = <0x119100 0x100>;
-                        interrupts = <39 2 0 0>;
-                        dfsrr;
-                };
-
-                serial0: serial@11c500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial1: serial@11c600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11c600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <36 2 0 0>;
-                };
-
-                serial2: serial@11d500 {
-                        cell-index = <2>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                serial3: serial@11d600 {
-                        cell-index = <3>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x11d600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <37 2 0 0>;
-                };
-
-                gpio0: gpio@130000 {
-                        compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio";
-                        reg = <0x130000 0x1000>;
-                        interrupts = <55 2 0 0>;
-                        #gpio-cells = <2>;
-                        gpio-controller;
-                };
-
-                usb0: usb@210000 {
-                        compatible = "fsl,p5020-usb2-mph",
-                                        "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-                        reg = <0x210000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <44 0x2 0 0>;
-                        phy_type = "utmi";
-                        port0;
-                };
-
-                usb1: usb@211000 {
-                        compatible = "fsl,p5020-usb2-dr",
-                                        "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-                        reg = <0x211000 0x1000>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        interrupts = <45 0x2 0 0>;
-                        dr_mode = "host";
-                        phy_type = "utmi";
-                };
-
-                sata@220000 {
-                        compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
-                        reg = <0x220000 0x1000>;
-                        interrupts = <68 0x2 0 0>;
-                };
-
-                sata@221000 {
-                        compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
-                        reg = <0x221000 0x1000>;
-                        interrupts = <69 0x2 0 0>;
-                };
-
-                crypto: crypto@300000 {
-                        compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        reg              = <0x300000 0x10000>;
-                        ranges           = <0 0x300000 0x10000>;
-                        interrupts       = <92 2 0 0>;
-
-                        sec_jr0: jr@1000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x1000 0x1000>;
-                                interrupts = <88 2 0 0>;
-                        };
-
-                        sec_jr1: jr@2000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x2000 0x1000>;
-                                interrupts = <89 2 0 0>;
-                        };
-
-                        sec_jr2: jr@3000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x3000 0x1000>;
-                                interrupts = <90 2 0 0>;
-                        };
-
-                        sec_jr3: jr@4000 {
-                                compatible = "fsl,sec-v4.2-job-ring",
-                                             "fsl,sec-v4.0-job-ring";
-                                reg = <0x4000 0x1000>;
-                                interrupts = <91 2 0 0>;
-                        };
-
-                        rtic@6000 {
-                                compatible = "fsl,sec-v4.2-rtic",
-                                             "fsl,sec-v4.0-rtic";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0x6000 0x100>;
-                                ranges = <0x0 0x6100 0xe00>;
-
-                                rtic_a: rtic-a@0 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x00 0x20 0x100 0x80>;
-                                };
-
-                                rtic_b: rtic-b@20 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x20 0x20 0x200 0x80>;
-                                };
-
-                                rtic_c: rtic-c@40 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x40 0x20 0x300 0x80>;
-                                };
-
-                                rtic_d: rtic-d@60 {
-                                        compatible = "fsl,sec-v4.2-rtic-memory",
-                                                     "fsl,sec-v4.0-rtic-memory";
-                                        reg = <0x60 0x20 0x500 0x80>;
-                                };
-                        };
-                };
-
-                sec_mon: sec_mon@314000 {
-                        compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
-                        reg = <0x314000 0x1000>;
-                        interrupts = <93 2 0 0>;
-                };
-        };
-
-/*
-        rapidio0: rapidio@ffe0c0000
-*/
-
-        localbus@ffe124000 {
-                compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
-                interrupts = <25 2 0 0>;
-                #address-cells = <2>;
-                #size-cells = <1>;
-        };
-
-        pci0: pcie@ffe200000 {
-                compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi0>;
-                interrupts = <16 2 1 15>;
-
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 15>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 40 1 0 0
-                                0000 0 0 2 &mpic 1 1 0 0
-                                0000 0 0 3 &mpic 2 1 0 0
-                                0000 0 0 4 &mpic 3 1 0 0
-                                >;
-                };
-        };
-
-        pci1: pcie@ffe201000 {
-                compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi1>;
-                interrupts = <16 2 1 14>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 14>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 41 1 0 0
-                                0000 0 0 2 &mpic 5 1 0 0
-                                0000 0 0 3 &mpic 6 1 0 0
-                                0000 0 0 4 &mpic 7 1 0 0
-                                >;
-                };
-        };
-
-        pci2: pcie@ffe202000 {
-                compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi2>;
-                interrupts = <16 2 1 13>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 13>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 42 1 0 0
-                                0000 0 0 2 &mpic 9 1 0 0
-                                0000 0 0 3 &mpic 10 1 0 0
-                                0000 0 0 4 &mpic 11 1 0 0
-                                >;
-                };
-        };
-
-        pci3: pcie@ffe203000 {
-                compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-                device_type = "pci";
-                #size-cells = <2>;
-                #address-cells = <3>;
-                bus-range = <0x0 0xff>;
-                clock-frequency = <0x1fca055>;
-                fsl,msi = <&msi2>;
-                interrupts = <16 2 1 12>;
-                pcie@0 {
-                        reg = <0 0 0 0 0>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        interrupts = <16 2 1 12>;
-                        interrupt-map-mask = <0xf800 0 0 7>;
-                        interrupt-map = <
-                                /* IDSEL 0x0 */
-                                0000 0 0 1 &mpic 43 1 0 0
-                                0000 0 0 2 &mpic 0 1 0 0
-                                0000 0 0 3 &mpic 4 1 0 0
-                                0000 0 0 4 &mpic 8 1 0 0
-                                >;
-                };
-        };
-};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 0dc90f9bd814..b1e45a8537a5 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -222,7 +222,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <9 0x8>;
@@ -232,7 +232,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <10 0x8>;
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 94a332251710..77be77116c2e 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -316,7 +316,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <0x2a 0x2>;
@@ -326,7 +326,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <0x2a 0x2>;
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index ee5538feb455..56bebce87842 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -347,7 +347,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -357,7 +357,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <28 2>;
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
index 38c35404bdc3..134a5ff917e1 100644
--- a/arch/powerpc/boot/dts/socrates.dts
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -199,7 +199,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -209,7 +209,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
index eab680ce10da..2a555738517e 100644
--- a/arch/powerpc/boot/dts/storcenter.dts
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -74,7 +74,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x20>;
                         clock-frequency = <97553800>; /* Hz */
                         current-speed = <115200>;
@@ -85,7 +85,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x20>;
                         clock-frequency = <97553800>; /* Hz */
                         current-speed = <9600>;
diff --git a/arch/powerpc/boot/dts/stxssa8555.dts b/arch/powerpc/boot/dts/stxssa8555.dts
index 49efd44057d7..4f166b01c1b6 100644
--- a/arch/powerpc/boot/dts/stxssa8555.dts
+++ b/arch/powerpc/boot/dts/stxssa8555.dts
@@ -210,7 +210,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -220,7 +220,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 0a4cedbdcb55..ed264d9ae356 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -250,7 +250,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -260,7 +260,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index f49d09181312..925242115814 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -224,7 +224,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -234,7 +234,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c05114..6e1ac50852a4 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -305,7 +305,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         current-speed = <115200>;
@@ -316,7 +316,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         current-speed = <115200>;
@@ -352,7 +352,7 @@
                 ranges = <
                         0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
                         1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
-                        2 0x0 0xa3000000 0x00008000     // CAN (2 x i82527)
+                        2 0x0 0xa3000000 0x00008000     // CAN (2 x CC770)
                         3 0x0 0xa3010000 0x00008000     // NAND FLASH
 
                 >;
@@ -393,18 +393,27 @@
                 };
 
                 /* Note: CAN support needs be enabled in U-Boot */
-                can0@2,0 {
-                        compatible = "intel,82527"; // Bosch CC770
+                can@2,0 {
+                        compatible = "bosch,cc770"; // Bosch CC770
                         reg = <2 0x0 0x100>;
                         interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
+                        bosch,external-clock-frequency = <16000000>;
+                        bosch,disconnect-rx1-input;
+                        bosch,disconnect-tx1-output;
+                        bosch,iso-low-speed-mux;
+                        bosch,clock-out-frequency = <16000000>;
                 };
 
-                can1@2,100 {
-                        compatible = "intel,82527"; // Bosch CC770
+                can@2,100 {
+                        compatible = "bosch,cc770"; // Bosch CC770
                         reg = <2 0x100 0x100>;
                         interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
+                        bosch,external-clock-frequency = <16000000>;
+                        bosch,disconnect-rx1-input;
+                        bosch,disconnect-tx1-output;
+                        bosch,iso-low-speed-mux;
                 };
 
                 /* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f72c90..161e75eac7f7 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -305,7 +305,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         current-speed = <115200>;
@@ -316,7 +316,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         current-speed = <115200>;
@@ -352,7 +352,7 @@
                 ranges = <
                         0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
                         1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
-                        2 0x0 0xe3000000 0x00008000     // CAN (2 x i82527)
+                        2 0x0 0xe3000000 0x00008000     // CAN (2 x CC770)
                         3 0x0 0xe3010000 0x00008000     // NAND FLASH
 
                 >;
@@ -393,18 +393,27 @@
                 };
 
                 /* Note: CAN support needs be enabled in U-Boot */
-                can0@2,0 {
-                        compatible = "intel,82527"; // Bosch CC770
+                can@2,0 {
+                        compatible = "bosch,cc770"; // Bosch CC770
                         reg = <2 0x0 0x100>;
                         interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
+                        bosch,external-clock-frequency = <16000000>;
+                        bosch,disconnect-rx1-input;
+                        bosch,disconnect-tx1-output;
+                        bosch,iso-low-speed-mux;
+                        bosch,clock-out-frequency = <16000000>;
                 };
 
-                can1@2,100 {
-                        compatible = "intel,82527"; // Bosch CC770
+                can@2,100 {
+                        compatible = "bosch,cc770"; // Bosch CC770
                         reg = <2 0x100 0x100>;
                         interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
+                        bosch,external-clock-frequency = <16000000>;
+                        bosch,disconnect-rx1-input;
+                        bosch,disconnect-tx1-output;
+                        bosch,iso-low-speed-mux;
                 };
 
                 /* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 81bad8cd3756..aa6ff0d3dd9a 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -224,7 +224,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
@@ -234,7 +234,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;   // reg base, size
                         clock-frequency = <0>;  // should we fill in in uboot?
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec49a8e..c3dba2518d8c 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
 
                 ranges = <
                         0x0 0x0 0x40000000 0x800000
+                        0x3 0x0 0xc0000000 0x200
                 >;
 
                 flash@0,0 {
@@ -67,6 +68,30 @@
                         bank-width = <4>;
                         device-width = <2>;
                 };
+
+                /* Note: CAN support needs be enabled in U-Boot */
+                can@3,0 {
+                        compatible = "intc,82527";
+                        reg = <3 0x0 0x80>;
+                        interrupts = <8 1>;
+                        interrupt-parent = <&PIC>;
+                        bosch,external-clock-frequency = <16000000>;
+                        bosch,disconnect-rx1-input;
+                        bosch,disconnect-tx1-output;
+                        bosch,iso-low-speed-mux;
+                        bosch,clock-out-frequency = <16000000>;
+                };
+
+                can@3,100 {
+                        compatible = "intc,82527";
+                        reg = <3 0x100 0x80>;
+                        interrupts = <8 1>;
+                        interrupt-parent = <&PIC>;
+                        bosch,external-clock-frequency = <16000000>;
+                        bosch,disconnect-rx1-input;
+                        bosch,disconnect-tx1-output;
+                        bosch,iso-low-speed-mux;
+                };
         };
 
         soc@fff00000 {
diff --git a/arch/powerpc/boot/dts/xcalibur1501.dts b/arch/powerpc/boot/dts/xcalibur1501.dts
index ac0a617b4299..cc00f4ddd9a7 100644
--- a/arch/powerpc/boot/dts/xcalibur1501.dts
+++ b/arch/powerpc/boot/dts/xcalibur1501.dts
@@ -531,7 +531,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -542,7 +542,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/xpedite5200.dts b/arch/powerpc/boot/dts/xpedite5200.dts
index c41a80c55e47..8fd7b7031357 100644
--- a/arch/powerpc/boot/dts/xpedite5200.dts
+++ b/arch/powerpc/boot/dts/xpedite5200.dts
@@ -333,7 +333,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         current-speed = <115200>;
@@ -344,7 +344,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         current-speed = <115200>;
diff --git a/arch/powerpc/boot/dts/xpedite5200_xmon.dts b/arch/powerpc/boot/dts/xpedite5200_xmon.dts
index c0efcbb45137..0baa8283d08c 100644
--- a/arch/powerpc/boot/dts/xpedite5200_xmon.dts
+++ b/arch/powerpc/boot/dts/xpedite5200_xmon.dts
@@ -337,7 +337,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         current-speed = <9600>;
@@ -348,7 +348,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         current-speed = <9600>;
diff --git a/arch/powerpc/boot/dts/xpedite5301.dts b/arch/powerpc/boot/dts/xpedite5301.dts
index db7faf5ebb39..53c1c6a9752f 100644
--- a/arch/powerpc/boot/dts/xpedite5301.dts
+++ b/arch/powerpc/boot/dts/xpedite5301.dts
@@ -441,7 +441,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -452,7 +452,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/xpedite5330.dts b/arch/powerpc/boot/dts/xpedite5330.dts
index c364ca6ff7d0..215225983150 100644
--- a/arch/powerpc/boot/dts/xpedite5330.dts
+++ b/arch/powerpc/boot/dts/xpedite5330.dts
@@ -477,7 +477,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -488,7 +488,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/dts/xpedite5370.dts b/arch/powerpc/boot/dts/xpedite5370.dts
index 7a8a4afd56cf..11dbda10d756 100644
--- a/arch/powerpc/boot/dts/xpedite5370.dts
+++ b/arch/powerpc/boot/dts/xpedite5370.dts
@@ -439,7 +439,7 @@
                 serial0: serial@4500 {
                         cell-index = <0>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
@@ -450,7 +450,7 @@
                 serial1: serial@4600 {
                         cell-index = <1>;
                         device_type = "serial";
-                        compatible = "ns16550";
+                        compatible = "fsl,ns16550", "ns16550";
                         reg = <0x4600 0x100>;
                         clock-frequency = <0>;
                         interrupts = <42 2>;
diff --git a/arch/powerpc/boot/treeboot-currituck.c b/arch/powerpc/boot/treeboot-currituck.c
new file mode 100644
index 000000000000..925ae43b7467
--- /dev/null
+++ b/arch/powerpc/boot/treeboot-currituck.c
@@ -0,0 +1,119 @@
+/*
+ * Copyright © 2011 Tony Breeds IBM Corporation
+ *
+ * Based on earlier code:
+ *   Copyright (C) Paul Mackerras 1997.
+ *
+ *   Matt Porter <mporter@kernel.crashing.org>
+ *   Copyright 2002-2005 MontaVista Software Inc.
+ *
+ *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ *   Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ *    Copyright 2007 David Gibson, IBM Corporation.
+ *    Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
+ *    Copyright © 2011 David Kleikamp IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "reg.h"
+#include "io.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+#include "libfdt.h"
+
+BSS_STACK(4096);
+
+#define MAX_RANKS       0x4
+#define DDR3_MR0CF      0x80010011U
+
+static unsigned long long ibm_currituck_memsize;
+static unsigned long long ibm_currituck_detect_memsize(void)
+{
+        u32 reg;
+        unsigned i;
+        unsigned long long memsize = 0;
+
+        for(i = 0; i < MAX_RANKS; i++){
+                reg = mfdcrx(DDR3_MR0CF + i);
+
+                if (!(reg & 1))
+                        continue;
+
+                reg &= 0x0000f000;
+                reg >>= 12;
+                memsize += (0x800000ULL << reg);
+        }
+
+        return memsize;
+}
+
+static void ibm_currituck_fixups(void)
+{
+        void *devp = finddevice("/");
+        u32 dma_ranges[7];
+
+        dt_fixup_memory(0x0ULL,  ibm_currituck_memsize);
+
+        while ((devp = find_node_by_devtype(devp, "pci"))) {
+                if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) {
+                        printf("%s: Failed to get dma-ranges\r\n", __func__);
+                        continue;
+                }
+
+                dma_ranges[5] = ibm_currituck_memsize >> 32;
+                dma_ranges[6] = ibm_currituck_memsize & 0xffffffffUL;
+
+                setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges));
+        }
+}
+
+#define SPRN_PIR        0x11E   /* Processor Indentification Register */
+void platform_init(void)
+{
+        unsigned long end_of_ram, avail_ram;
+        u32 pir_reg;
+        int node, size;
+        const u32 *timebase;
+
+        ibm_currituck_memsize = ibm_currituck_detect_memsize();
+        if (ibm_currituck_memsize >> 32)
+                end_of_ram = ~0UL;
+        else
+                end_of_ram = ibm_currituck_memsize;
+        avail_ram = end_of_ram - (unsigned long)_end;
+
+        simple_alloc_init(_end, avail_ram, 128, 64);
+        platform_ops.fixups = ibm_currituck_fixups;
+        platform_ops.exit = ibm44x_dbcr_reset;
+        pir_reg = mfspr(SPRN_PIR);
+
+        /* Make sure FDT blob is sane */
+        if (fdt_check_header(_dtb_start) != 0)
+                fatal("Invalid device tree blob\n");
+
+        node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
+                                             "cpu", sizeof("cpu"));
+        if (!node)
+                fatal("Cannot find cpu node\n");
+        timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size);
+        if (timebase && (size == 4))
+                timebase_period_ns = 1000000000 / *timebase;
+
+        fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
+        fdt_init(_dtb_start);
+
+        serial_console_init();
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index c74531af72c0..f090e6d2907e 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -163,7 +163,7 @@ coff)
     link_address='0x500000'
     pie=
     ;;
-miboot|uboot)
+miboot|uboot*)
     # miboot and U-boot want just the bare bits, not an ELF binary
     ext=bin
     objflags="-O binary"
@@ -244,6 +244,9 @@ gamecube|wii)
     link_address='0x600000'
     platformo="$object/$platform-head.o $object/$platform.o"
     ;;
+treeboot-currituck)
+    link_address='0x1000000'
+    ;;
 treeboot-iss4xx-mpic)
     platformo="$object/treeboot-iss4xx.o"
     ;;
@@ -257,6 +260,8 @@ vmz="$tmpdir/`basename \"$kernel\"`.$ext"
 if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then
     ${CROSS}objcopy $objflags "$kernel" "$vmz.$$"
 
+    strip_size=$(stat -c %s $vmz.$$)
+
     if [ -n "$gzip" ]; then
         gzip -n -f -9 "$vmz.$$"
     fi
@@ -266,6 +271,24 @@ if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then
     else
         vmz="$vmz.$$"
     fi
+else
+    # Calculate the vmlinux.strip size
+    ${CROSS}objcopy $objflags "$kernel" "$vmz.$$"
+    strip_size=$(stat -c %s $vmz.$$)
+    rm -f $vmz.$$
+fi
+
+# Round the size to next higher MB limit
+round_size=$(((strip_size + 0xfffff) & 0xfff00000))
+
+round_size=0x$(printf "%x" $round_size)
+link_addr=$(printf "%d" $link_address)
+
+if [ $link_addr -lt $strip_size ]; then
+    echo "INFO: Uncompressed kernel (size 0x$(printf "%x\n" $strip_size))" \
+                "overlaps the address of the wrapper($link_address)"
+    echo "INFO: Fixing the link_address of wrapper to ($round_size)"
+    link_address=$round_size
 fi
 
 vmz="$vmz$gzip"
@@ -291,6 +314,26 @@ uboot)
     fi
     exit 0
     ;;
+uboot-obs600)
+    rm -f "$ofile"
+    # obs600 wants a multi image with an initrd, so we need to put a fake
+    # one in even when building a "normal" image.
+    if [ -n "$initrd" ]; then
+        real_rd="$initrd"
+    else
+        real_rd=`mktemp`
+        echo "\0" >>"$real_rd"
+    fi
+    ${MKIMAGE} -A ppc -O linux -T multi -C gzip -a $membase -e $membase \
+        $uboot_version -d "$vmz":"$real_rd":"$dtb" "$ofile"
+    if [ -z "$initrd" ]; then
+        rm -f "$real_rd"
+    fi
+    if [ -z "$cacheit" ]; then
+        rm -f "$vmz"
+    fi
+    exit 0
+    ;;
 esac
 
 addsec() {
diff --git a/arch/powerpc/configs/40x/klondike_defconfig b/arch/powerpc/configs/40x/klondike_defconfig
new file mode 100644
index 000000000000..c0d228dc73dc
--- /dev/null
+++ b/arch/powerpc/configs/40x/klondike_defconfig
@@ -0,0 +1,55 @@
+CONFIG_40x=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_WALNUT is not set
+CONFIG_APM8018X=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_MIGRATION is not set
+# CONFIG_SUSPEND is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SCSI_SAS_ATTRS=y
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HWMON is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_CRAMFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
+CONFIG_AVERAGE=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_FTRACE is not set
diff --git a/arch/powerpc/configs/40x/obs600_defconfig b/arch/powerpc/configs/40x/obs600_defconfig
new file mode 100644
index 000000000000..91c110dad2d6
--- /dev/null
+++ b/arch/powerpc/configs/40x/obs600_defconfig
@@ -0,0 +1,83 @@
+CONFIG_40x=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_WALNUT is not set
+CONFIG_OBS600=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_MATH_EMULATION=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_NDFC=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_NETDEVICES=y
+CONFIG_IBM_EMAC=y
+CONFIG_IBM_EMAC_RXB=256
+CONFIG_IBM_EMAC_TXB=256
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IBM_IIC=y
+CONFIG_SENSORS_LM75=y
+CONFIG_THERMAL=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1307=y
+CONFIG_EXT2_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_PCBC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/44x/currituck_defconfig b/arch/powerpc/configs/44x/currituck_defconfig
new file mode 100644
index 000000000000..4192322f8a7f
--- /dev/null
+++ b/arch/powerpc/configs/44x/currituck_defconfig
@@ -0,0 +1,110 @@
+CONFIG_44x=y
+CONFIG_SMP=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_EXPERT=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_PPC_47x=y
+# CONFIG_EBONY is not set
+CONFIG_CURRITUCK=y
+CONFIG_HIGHMEM=y
+CONFIG_HZ_100=y
+CONFIG_MATH_EMULATION=y
+CONFIG_IRQ_ALL_CPUS=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_IPV6 is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=35000
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_ATA=y
+# CONFIG_SATA_PMP is not set
+CONFIG_SATA_SIL24=y
+# CONFIG_ATA_SFF is not set
+CONFIG_NETDEVICES=y
+CONFIG_E1000E=y
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_IBM_IIC=y
+# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T80=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NLS_DEFAULT="n"
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_XMON=y
+CONFIG_XMON_DEFAULT=y
+CONFIG_PPC_EARLY_DEBUG=y
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0x10000000
+CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x200
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_PCBC=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
diff --git a/arch/powerpc/configs/44x/iss476-smp_defconfig b/arch/powerpc/configs/44x/iss476-smp_defconfig
index a6eb6ad05b2d..ca00cf750d3e 100644
--- a/arch/powerpc/configs/44x/iss476-smp_defconfig
+++ b/arch/powerpc/configs/44x/iss476-smp_defconfig
@@ -25,7 +25,8 @@ CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE="root=/dev/issblk0"
 # CONFIG_PCI is not set
 CONFIG_ADVANCED_OPTIONS=y
-CONFIG_RELOCATABLE=y
+CONFIG_NONSTATIC_KERNEL=y
+CONFIG_DYNAMIC_MEMSTART=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
diff --git a/arch/powerpc/configs/chroma_defconfig b/arch/powerpc/configs/chroma_defconfig
new file mode 100644
index 000000000000..acf7fb280464
--- /dev/null
+++ b/arch/powerpc/configs/chroma_defconfig
@@ -0,0 +1,307 @@
+CONFIG_PPC64=y
+CONFIG_PPC_BOOK3E_64=y
+# CONFIG_VIRT_CPU_ACCOUNTING is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=256
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_AUDIT=y
+CONFIG_AUDITSYSCALL=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_MEM_RES_CTLR=y
+CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y
+CONFIG_NAMESPACES=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_INITRAMFS_COMPRESSION_GZIP=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_EMBEDDED=y
+CONFIG_PERF_COUNTERS=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_SCOM_DEBUGFS=y
+CONFIG_PPC_A2_DD2=y
+CONFIG_KVM_GUEST=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_HZ_100=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_BINFMT_MISC=y
+CONFIG_NUMA=y
+# CONFIG_MIGRATION is not set
+CONFIG_PPC_64K_PAGES=y
+CONFIG_SCHED_SMT=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+# CONFIG_SECCOMP is not set
+CONFIG_PCIEPORTBUS=y
+# CONFIG_PCIEASPM is not set
+CONFIG_PCI_MSI=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=m
+CONFIG_XFRM_SUB_POLICY=y
+CONFIG_XFRM_STATISTICS=y
+CONFIG_NET_KEY=m
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_NET_IPIP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+CONFIG_IPV6_PIMSM_V2=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_OWNER=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_RATEEST=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_RECENT=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_NET_TCPPROBE=y
+# CONFIG_WIRELESS is not set
+CONFIG_NET_9P=y
+CONFIG_NET_9P_DEBUG=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_MTD=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_LE_BYTE_SWAP=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=y
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_MISC_DEVICES=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_SCSI_FC_ATTRS=y
+CONFIG_SCSI_ISCSI_ATTRS=m
+CONFIG_SCSI_SAS_ATTRS=m
+CONFIG_SCSI_SRP_ATTRS=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_SIL24=y
+CONFIG_SATA_MV=y
+CONFIG_SATA_SIL=y
+CONFIG_PATA_CMD64X=y
+CONFIG_PATA_MARVELL=y
+CONFIG_PATA_SIL680=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_DM_SNAPSHOT=y
+CONFIG_DM_MIRROR=y
+CONFIG_DM_ZERO=y
+CONFIG_DM_UEVENT=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_E1000E=y
+CONFIG_TIGON3=y
+# CONFIG_WLAN is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_RAW_DRIVER=y
+CONFIG_MAX_RAW_DEVS=1024
+# CONFIG_HWMON is not set
+# CONFIG_VGA_ARB is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1511=y
+CONFIG_RTC_DRV_DS1553=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_EXT4_FS=y
+# CONFIG_DNOTIFY is not set
+CONFIG_FUSE_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CONFIGFS_FS=m
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_ROOT_NFS=y
+CONFIG_CIFS=y
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC_T10DIF=y
+CONFIG_LIBCRC32C=m
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_PPC_EMULATED_STATS=y
+CONFIG_XMON=y
+CONFIG_XMON_DEFAULT=y
+CONFIG_VIRQ_DEBUG=y
+CONFIG_PPC_EARLY_DEBUG=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_LZO=m
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_VIRTUALIZATION=y
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index f087de6ec03f..f8aef205d222 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -37,6 +37,8 @@ CONFIG_FSL_LBC=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 # CONFIG_PCIEASPM is not set
+CONFIG_RAPIDIO=y
+CONFIG_FSL_RIO=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -94,17 +96,17 @@ CONFIG_SATA_SIL24=y
 CONFIG_SATA_SIL=y
 CONFIG_PATA_SIL680=y
 CONFIG_NETDEVICES=y
-CONFIG_VITESSE_PHY=y
-CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
+CONFIG_FSL_PQ_MDIO=y
 CONFIG_E1000=y
 CONFIG_E1000E=y
-CONFIG_FSL_PQ_MDIO=y
+CONFIG_VITESSE_PHY=y
+CONFIG_FIXED_PHY=y
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_LEGACY_PTYS is not set
+CONFIG_PPC_EPAPR_HV_BYTECHAN=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_EXTENDED=y
@@ -155,6 +157,7 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=y
 CONFIG_NFS_FS=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 782822c32d15..7ed8d4cf2719 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -23,6 +23,8 @@ CONFIG_P5020_DS=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BINFMT_MISC=m
+CONFIG_RAPIDIO=y
+CONFIG_FSL_RIO=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -57,7 +59,6 @@ CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
@@ -81,6 +82,7 @@ CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAC_PARTITION=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index a1e5a178a4ac..f37a2ab48881 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -1,5 +1,4 @@
 CONFIG_PPC_85xx=y
-CONFIG_PHYS_64BIT=y
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -93,15 +92,14 @@ CONFIG_SATA_FSL=y
 CONFIG_PATA_ALI=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
+CONFIG_FS_ENET=y
+CONFIG_UCC_GETH=y
+CONFIG_GIANFAR=y
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_CICADA_PHY=y
 CONFIG_VITESSE_PHY=y
 CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_FS_ENET=y
-CONFIG_GIANFAR=y
-CONFIG_UCC_GETH=y
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
@@ -120,6 +118,9 @@ CONFIG_NVRAM=y
 CONFIG_I2C=y
 CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_SPI=y
+CONFIG_SPI_FSL_ESPI=y
 CONFIG_GPIO_MPC8XXX=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -163,6 +164,10 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
 CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
 CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_RTC_CLASS=y
@@ -182,6 +187,7 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
 CONFIG_ADFS_FS=m
 CONFIG_AFFS_FS=m
 CONFIG_HFS_FS=m
@@ -213,4 +219,5 @@ CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_AES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
 CONFIG_CRYPTO_DEV_TALITOS=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index dd1e41386c4c..abdcd317cda7 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -1,5 +1,4 @@
 CONFIG_PPC_85xx=y
-CONFIG_PHYS_64BIT=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=8
 CONFIG_EXPERIMENTAL=y
@@ -26,6 +25,7 @@ CONFIG_MPC85xx_MDS=y
 CONFIG_MPC8536_DS=y
 CONFIG_MPC85xx_DS=y
 CONFIG_MPC85xx_RDB=y
+CONFIG_P1010_RDB=y
 CONFIG_P1022_DS=y
 CONFIG_P1023_RDS=y
 CONFIG_SOCRATES=y
@@ -94,15 +94,14 @@ CONFIG_SATA_FSL=y
 CONFIG_PATA_ALI=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
+CONFIG_FS_ENET=y
+CONFIG_UCC_GETH=y
+CONFIG_GIANFAR=y
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_CICADA_PHY=y
 CONFIG_VITESSE_PHY=y
 CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_FS_ENET=y
-CONFIG_GIANFAR=y
-CONFIG_UCC_GETH=y
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
@@ -121,6 +120,9 @@ CONFIG_NVRAM=y
 CONFIG_I2C=y
 CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_SPI=y
+CONFIG_SPI_FSL_ESPI=y
 CONFIG_GPIO_MPC8XXX=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
@@ -164,6 +166,10 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
 CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
 CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_RTC_CLASS=y
@@ -183,6 +189,7 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
 CONFIG_ADFS_FS=m
 CONFIG_AFFS_FS=m
 CONFIG_HFS_FS=m
@@ -214,4 +221,5 @@ CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_AES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
 CONFIG_CRYPTO_DEV_TALITOS=y
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index 6cdf1c0d2c8a..3b98d7354341 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -52,6 +52,8 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_JEDECPROBE=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=m
+CONFIG_MTD_NAND_NDFC=m
 CONFIG_MTD_UBI=m
 CONFIG_MTD_UBI_GLUEBI=m
 CONFIG_PROC_DEVICETREE=y
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 535711fcb13c..2156e077859b 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -390,6 +390,11 @@ CONFIG_HUGETLBFS=y
 CONFIG_HFS_FS=m
 CONFIG_HFSPLUS_FS=m
 CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_ZLIB=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index 185c292b0f1c..ded867871e97 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -6,10 +6,10 @@ CONFIG_NR_CPUS=2
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
-CONFIG_NAMESPACES=y
+CONFIG_SPARSE_IRQ=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
 # CONFIG_PERF_EVENTS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
@@ -17,6 +17,7 @@ CONFIG_PROFILING=y
 CONFIG_OPROFILE=m
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
+# CONFIG_PPC_POWERNV is not set
 # CONFIG_PPC_PSERIES is not set
 # CONFIG_PPC_PMAC is not set
 CONFIG_PPC_PS3=y
@@ -27,14 +28,14 @@ CONFIG_PS3_VRAM=m
 CONFIG_PS3_LPM=m
 # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
 CONFIG_HIGH_RES_TIMERS=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=y
 CONFIG_KEXEC=y
-CONFIG_SPARSE_IRQ=y
 # CONFIG_SPARSEMEM_VMEMMAP is not set
 CONFIG_SCHED_SMT=y
 CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE=""
-CONFIG_PM=y
+CONFIG_PM_RUNTIME=y
 CONFIG_PM_DEBUG=y
 # CONFIG_SECCOMP is not set
 # CONFIG_PCI is not set
@@ -81,20 +82,23 @@ CONFIG_SCSI_MULTI_LUN=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_DM=m
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
 CONFIG_GELIC_NET=y
 CONFIG_GELIC_WIRELESS=y
-# CONFIG_NETDEV_10000 is not set
+# CONFIG_NET_VENDOR_XILINX is not set
 CONFIG_USB_USBNET=m
 # CONFIG_USB_NET_CDCETHER is not set
+# CONFIG_USB_NET_CDC_NCM is not set
 # CONFIG_USB_NET_NET1080 is not set
 # CONFIG_USB_NET_CDC_SUBSET is not set
 # CONFIG_USB_NET_ZAURUS is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPPOE=m
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_JOYDEV=m
@@ -135,22 +139,21 @@ CONFIG_USB=m
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
+CONFIG_USB_SUSPEND=y
 CONFIG_USB_MON=m
 CONFIG_USB_EHCI_HCD=m
-CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
 CONFIG_USB_OHCI_HCD=m
 CONFIG_USB_STORAGE=m
 CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_PS3=m
+CONFIG_RTC_DRV_PS3=y
+# CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=m
 CONFIG_EXT3_FS=m
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT4_FS=y
-CONFIG_INOTIFY=y
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
-CONFIG_AUTOFS_FS=m
 CONFIG_AUTOFS4_FS=m
 CONFIG_ISO9660_FS=m
 CONFIG_JOLIET=y
@@ -167,19 +170,17 @@ CONFIG_CIFS=m
 CONFIG_NLS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
+CONFIG_CRC_CCITT=m
 CONFIG_CRC_T10DIF=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_PROVE_LOCKING=y
 CONFIG_DEBUG_LOCKDEP=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_WRITECOUNT=y
 CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_DEBUG_LIST=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_FTRACE is not set
 CONFIG_DEBUG_STACKOVERFLOW=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index a72f2415a647..30e7d0d20e49 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -304,6 +304,11 @@ CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_HUGETLBFS=y
 CONFIG_CRAMFS=m
+CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_ZLIB=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index d51df17c7e6f..7e313f1ed183 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -34,3 +34,5 @@ header-y += termios.h
 header-y += types.h
 header-y += ucontext.h
 header-y += unistd.h
+
+generic-y += rwsem.h
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index e2a4c26ad377..02e41b53488d 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -49,13 +49,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %0,0,%2         # atomic_add_return\n\
         add     %0,%1,%0\n"
         PPC405_ERR77(0,%2)
 "       stwcx.  %0,0,%2 \n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (a), "r" (&v->counter)
         : "cc", "memory");
@@ -85,13 +85,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %0,0,%2         # atomic_sub_return\n\
         subf    %0,%1,%0\n"
         PPC405_ERR77(0,%2)
 "       stwcx.  %0,0,%2 \n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (a), "r" (&v->counter)
         : "cc", "memory");
@@ -119,13 +119,13 @@ static __inline__ int atomic_inc_return(atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %0,0,%1         # atomic_inc_return\n\
         addic   %0,%0,1\n"
         PPC405_ERR77(0,%1)
 "       stwcx.  %0,0,%1 \n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (&v->counter)
         : "cc", "xer", "memory");
@@ -163,13 +163,13 @@ static __inline__ int atomic_dec_return(atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %0,0,%1         # atomic_dec_return\n\
         addic   %0,%0,-1\n"
         PPC405_ERR77(0,%1)
 "       stwcx.  %0,0,%1\n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (&v->counter)
         : "cc", "xer", "memory");
@@ -194,7 +194,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
         int t;
 
         __asm__ __volatile__ (
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %0,0,%1         # __atomic_add_unless\n\
         cmpw    0,%0,%3 \n\
         beq-    2f \n\
@@ -202,7 +202,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
         PPC405_ERR77(0,%2)
 "       stwcx.  %0,0,%1 \n\
         bne-    1b \n"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
 "       subf    %0,%2,%0 \n\
 2:"
         : "=&r" (t)
@@ -226,7 +226,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
         int t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %0,0,%1         # atomic_dec_if_positive\n\
         cmpwi   %0,1\n\
         addi    %0,%0,-1\n\
@@ -234,7 +234,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
         PPC405_ERR77(0,%1)
 "       stwcx.  %0,0,%1\n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         "\n\
 2:"     : "=&b" (t)
         : "r" (&v->counter)
@@ -285,12 +285,12 @@ static __inline__ long atomic64_add_return(long a, atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     ldarx   %0,0,%2         # atomic64_add_return\n\
         add     %0,%1,%0\n\
         stdcx.  %0,0,%2 \n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (a), "r" (&v->counter)
         : "cc", "memory");
@@ -319,12 +319,12 @@ static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     ldarx   %0,0,%2         # atomic64_sub_return\n\
         subf    %0,%1,%0\n\
         stdcx.  %0,0,%2 \n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (a), "r" (&v->counter)
         : "cc", "memory");
@@ -351,12 +351,12 @@ static __inline__ long atomic64_inc_return(atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     ldarx   %0,0,%1         # atomic64_inc_return\n\
         addic   %0,%0,1\n\
         stdcx.  %0,0,%1 \n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (&v->counter)
         : "cc", "xer", "memory");
@@ -393,12 +393,12 @@ static __inline__ long atomic64_dec_return(atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     ldarx   %0,0,%1         # atomic64_dec_return\n\
         addic   %0,%0,-1\n\
         stdcx.  %0,0,%1\n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         : "=&r" (t)
         : "r" (&v->counter)
         : "cc", "xer", "memory");
@@ -418,13 +418,13 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
         long t;
 
         __asm__ __volatile__(
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     ldarx   %0,0,%1         # atomic64_dec_if_positive\n\
         addic.  %0,%0,-1\n\
         blt-    2f\n\
         stdcx.  %0,0,%1\n\
         bne-    1b"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
         "\n\
 2:"     : "=&r" (t)
         : "r" (&v->counter)
@@ -450,14 +450,14 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
         long t;
 
         __asm__ __volatile__ (
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     ldarx   %0,0,%1         # __atomic_add_unless\n\
         cmpd    0,%0,%3 \n\
         beq-    2f \n\
         add     %0,%2,%0 \n"
 "       stdcx.  %0,0,%1 \n\
         bne-    1b \n"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
 "       subf    %0,%2,%0 \n\
 2:"
         : "=&r" (t)
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index e137afcc10fa..efdc92618b38 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -124,14 +124,14 @@ static __inline__ unsigned long fn(			\
         return (old & mask);                            \
 }
 
-DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER,
-              PPC_ACQUIRE_BARRIER, 0)
+DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
+              PPC_ATOMIC_EXIT_BARRIER, 0)
 DEFINE_TESTOP(test_and_set_bits_lock, or, "",
               PPC_ACQUIRE_BARRIER, 1)
-DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER,
-              PPC_ACQUIRE_BARRIER, 0)
-DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER,
-              PPC_ACQUIRE_BARRIER, 0)
+DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
+              PPC_ATOMIC_EXIT_BARRIER, 0)
+DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
+              PPC_ATOMIC_EXIT_BARRIER, 0)
 
 static __inline__ int test_and_set_bit(unsigned long nr,
                                        volatile unsigned long *addr)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index e30442c539ce..ad55a1ccb9fb 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -201,6 +201,7 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_POPCNTB                 LONG_ASM_CONST(0x0400000000000000)
 #define CPU_FTR_POPCNTD                 LONG_ASM_CONST(0x0800000000000000)
 #define CPU_FTR_ICSWX                   LONG_ASM_CONST(0x1000000000000000)
+#define CPU_FTR_VMX_COPY                LONG_ASM_CONST(0x2000000000000000)
 
 #ifndef __ASSEMBLY__
 
@@ -425,7 +426,7 @@ extern const char *powerpc_base_platform;
             CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
             CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT | \
             CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
-            CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE)
+            CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY)
 #define CPU_FTRS_CELL   (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
             CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -437,7 +438,7 @@ extern const char *powerpc_base_platform;
 #define CPU_FTRS_COMPATIBLE     (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2)
 
 #define CPU_FTRS_A2 (CPU_FTR_USE_TB | CPU_FTR_SMT | CPU_FTR_DBELL | \
-                     CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN)
+                     CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN | CPU_FTR_ICSWX)
 
 #ifdef __powerpc64__
 #ifdef CONFIG_PPC_BOOK3E
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index 1cf20bdfbeca..487d46ff68a1 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -29,25 +29,8 @@ static inline void setup_cputime_one_jiffy(void) { }
 #include <asm/time.h>
 #include <asm/param.h>
 
-typedef u64 cputime_t;
-typedef u64 cputime64_t;
-
-#define cputime_zero                    ((cputime_t)0)
-#define cputime_max                     ((~((cputime_t)0) >> 1) - 1)
-#define cputime_add(__a, __b)           ((__a) +  (__b))
-#define cputime_sub(__a, __b)           ((__a) -  (__b))
-#define cputime_div(__a, __n)           ((__a) /  (__n))
-#define cputime_halve(__a)              ((__a) >> 1)
-#define cputime_eq(__a, __b)            ((__a) == (__b))
-#define cputime_gt(__a, __b)            ((__a) >  (__b))
-#define cputime_ge(__a, __b)            ((__a) >= (__b))
-#define cputime_lt(__a, __b)            ((__a) <  (__b))
-#define cputime_le(__a, __b)            ((__a) <= (__b))
-
-#define cputime64_zero                  ((cputime64_t)0)
-#define cputime64_add(__a, __b)         ((__a) + (__b))
-#define cputime64_sub(__a, __b)         ((__a) - (__b))
-#define cputime_to_cputime64(__ct)      (__ct)
+typedef u64 __nocast cputime_t;
+typedef u64 __nocast cputime64_t;
 
 #ifdef __KERNEL__
 
@@ -65,7 +48,7 @@ DECLARE_PER_CPU(unsigned long, cputime_scaled_last_delta);
 
 static inline unsigned long cputime_to_jiffies(const cputime_t ct)
 {
-        return mulhdu(ct, __cputime_jiffies_factor);
+        return mulhdu((__force u64) ct, __cputime_jiffies_factor);
 }
 
 /* Estimate the scaled cputime by scaling the real cputime based on
@@ -74,14 +57,15 @@ static inline cputime_t cputime_to_scaled(const cputime_t ct)
 {
         if (cpu_has_feature(CPU_FTR_SPURR) &&
             __get_cpu_var(cputime_last_delta))
-                return ct * __get_cpu_var(cputime_scaled_last_delta) /
-                            __get_cpu_var(cputime_last_delta);
+                return (__force u64) ct *
+                        __get_cpu_var(cputime_scaled_last_delta) /
+                        __get_cpu_var(cputime_last_delta);
         return ct;
 }
 
 static inline cputime_t jiffies_to_cputime(const unsigned long jif)
 {
-        cputime_t ct;
+        u64 ct;
         unsigned long sec;
 
         /* have to be a little careful about overflow */
@@ -93,7 +77,7 @@ static inline cputime_t jiffies_to_cputime(const unsigned long jif)
         }
         if (sec)
                 ct += (cputime_t) sec * tb_ticks_per_sec;
-        return ct;
+        return (__force cputime_t) ct;
 }
 
 static inline void setup_cputime_one_jiffy(void)
@@ -103,7 +87,7 @@ static inline void setup_cputime_one_jiffy(void)
 
 static inline cputime64_t jiffies64_to_cputime64(const u64 jif)
 {
-        cputime_t ct;
+        u64 ct;
         u64 sec;
 
         /* have to be a little careful about overflow */
@@ -114,28 +98,28 @@ static inline cputime64_t jiffies64_to_cputime64(const u64 jif)
                 do_div(ct, HZ);
         }
         if (sec)
-                ct += (cputime_t) sec * tb_ticks_per_sec;
-        return ct;
+                ct += (u64) sec * tb_ticks_per_sec;
+        return (__force cputime64_t) ct;
 }
 
 static inline u64 cputime64_to_jiffies64(const cputime_t ct)
 {
-        return mulhdu(ct, __cputime_jiffies_factor);
+        return mulhdu((__force u64) ct, __cputime_jiffies_factor);
 }
 
 /*
  * Convert cputime <-> microseconds
  */
-extern u64 __cputime_msec_factor;
+extern u64 __cputime_usec_factor;
 
 static inline unsigned long cputime_to_usecs(const cputime_t ct)
 {
-        return mulhdu(ct, __cputime_msec_factor) * USEC_PER_MSEC;
+        return mulhdu((__force u64) ct, __cputime_usec_factor);
 }
 
 static inline cputime_t usecs_to_cputime(const unsigned long us)
 {
-        cputime_t ct;
+        u64 ct;
         unsigned long sec;
 
         /* have to be a little careful about overflow */
@@ -143,13 +127,15 @@ static inline cputime_t usecs_to_cputime(const unsigned long us)
         sec = us / 1000000;
         if (ct) {
                 ct *= tb_ticks_per_sec;
-                do_div(ct, 1000);
+                do_div(ct, 1000000);
         }
         if (sec)
                 ct += (cputime_t) sec * tb_ticks_per_sec;
-        return ct;
+        return (__force cputime_t) ct;
 }
 
+#define usecs_to_cputime64(us)          usecs_to_cputime(us)
+
 /*
  * Convert cputime <-> seconds
  */
@@ -157,12 +143,12 @@ extern u64 __cputime_sec_factor;
 
 static inline unsigned long cputime_to_secs(const cputime_t ct)
 {
-        return mulhdu(ct, __cputime_sec_factor);
+        return mulhdu((__force u64) ct, __cputime_sec_factor);
 }
 
 static inline cputime_t secs_to_cputime(const unsigned long sec)
 {
-        return (cputime_t) sec * tb_ticks_per_sec;
+        return (__force cputime_t)((u64) sec * tb_ticks_per_sec);
 }
 
 /*
@@ -170,7 +156,7 @@ static inline cputime_t secs_to_cputime(const unsigned long sec)
  */
 static inline void cputime_to_timespec(const cputime_t ct, struct timespec *p)
 {
-        u64 x = ct;
+        u64 x = (__force u64) ct;
         unsigned int frac;
 
         frac = do_div(x, tb_ticks_per_sec);
@@ -182,11 +168,11 @@ static inline void cputime_to_timespec(const cputime_t ct, struct timespec *p)
 
 static inline cputime_t timespec_to_cputime(const struct timespec *p)
 {
-        cputime_t ct;
+        u64 ct;
 
         ct = (u64) p->tv_nsec * tb_ticks_per_sec;
         do_div(ct, 1000000000);
-        return ct + (u64) p->tv_sec * tb_ticks_per_sec;
+        return (__force cputime_t)(ct + (u64) p->tv_sec * tb_ticks_per_sec);
 }
 
 /*
@@ -194,7 +180,7 @@ static inline cputime_t timespec_to_cputime(const struct timespec *p)
  */
 static inline void cputime_to_timeval(const cputime_t ct, struct timeval *p)
 {
-        u64 x = ct;
+        u64 x = (__force u64) ct;
         unsigned int frac;
 
         frac = do_div(x, tb_ticks_per_sec);
@@ -206,11 +192,11 @@ static inline void cputime_to_timeval(const cputime_t ct, struct timeval *p)
 
 static inline cputime_t timeval_to_cputime(const struct timeval *p)
 {
-        cputime_t ct;
+        u64 ct;
 
         ct = (u64) p->tv_usec * tb_ticks_per_sec;
         do_div(ct, 1000000);
-        return ct + (u64) p->tv_sec * tb_ticks_per_sec;
+        return (__force cputime_t)(ct + (u64) p->tv_sec * tb_ticks_per_sec);
 }
 
 /*
@@ -220,12 +206,12 @@ extern u64 __cputime_clockt_factor;
 
 static inline unsigned long cputime_to_clock_t(const cputime_t ct)
 {
-        return mulhdu(ct, __cputime_clockt_factor);
+        return mulhdu((__force u64) ct, __cputime_clockt_factor);
 }
 
 static inline cputime_t clock_t_to_cputime(const unsigned long clk)
 {
-        cputime_t ct;
+        u64 ct;
         unsigned long sec;
 
         /* have to be a little careful about overflow */
@@ -236,8 +222,8 @@ static inline cputime_t clock_t_to_cputime(const unsigned long clk)
                 do_div(ct, USER_HZ);
         }
         if (sec)
-                ct += (cputime_t) sec * tb_ticks_per_sec;
-        return ct;
+                ct += (u64) sec * tb_ticks_per_sec;
+        return (__force cputime_t) ct;
 }
 
 #define cputime64_to_clock_t(ct)        cputime_to_clock_t((cputime_t)(ct))
diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h
new file mode 100644
index 000000000000..b955012939a2
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_ifc.h
@@ -0,0 +1,834 @@
+/* Freescale Integrated Flash Controller
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc
+ *
+ * Author: Dipen Dudhat <dipen.dudhat@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __ASM_FSL_IFC_H
+#define __ASM_FSL_IFC_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/io.h>
+
+#include <linux/of_platform.h>
+#include <linux/interrupt.h>
+
+#define FSL_IFC_BANK_COUNT 4
+
+/*
+ * CSPR - Chip Select Property Register
+ */
+#define CSPR_BA                         0xFFFF0000
+#define CSPR_BA_SHIFT                   16
+#define CSPR_PORT_SIZE                  0x00000180
+#define CSPR_PORT_SIZE_SHIFT            7
+/* Port Size 8 bit */
+#define CSPR_PORT_SIZE_8                0x00000080
+/* Port Size 16 bit */
+#define CSPR_PORT_SIZE_16               0x00000100
+/* Port Size 32 bit */
+#define CSPR_PORT_SIZE_32               0x00000180
+/* Write Protect */
+#define CSPR_WP                         0x00000040
+#define CSPR_WP_SHIFT                   6
+/* Machine Select */
+#define CSPR_MSEL                       0x00000006
+#define CSPR_MSEL_SHIFT                 1
+/* NOR */
+#define CSPR_MSEL_NOR                   0x00000000
+/* NAND */
+#define CSPR_MSEL_NAND                  0x00000002
+/* GPCM */
+#define CSPR_MSEL_GPCM                  0x00000004
+/* Bank Valid */
+#define CSPR_V                          0x00000001
+#define CSPR_V_SHIFT                    0
+
+/*
+ * Address Mask Register
+ */
+#define IFC_AMASK_MASK                  0xFFFF0000
+#define IFC_AMASK_SHIFT                 16
+#define IFC_AMASK(n)                    (IFC_AMASK_MASK << \
+                                        (__ilog2(n) - IFC_AMASK_SHIFT))
+
+/*
+ * Chip Select Option Register IFC_NAND Machine
+ */
+/* Enable ECC Encoder */
+#define CSOR_NAND_ECC_ENC_EN            0x80000000
+#define CSOR_NAND_ECC_MODE_MASK         0x30000000
+/* 4 bit correction per 520 Byte sector */
+#define CSOR_NAND_ECC_MODE_4            0x00000000
+/* 8 bit correction per 528 Byte sector */
+#define CSOR_NAND_ECC_MODE_8            0x10000000
+/* Enable ECC Decoder */
+#define CSOR_NAND_ECC_DEC_EN            0x04000000
+/* Row Address Length */
+#define CSOR_NAND_RAL_MASK              0x01800000
+#define CSOR_NAND_RAL_SHIFT             20
+#define CSOR_NAND_RAL_1                 0x00000000
+#define CSOR_NAND_RAL_2                 0x00800000
+#define CSOR_NAND_RAL_3                 0x01000000
+#define CSOR_NAND_RAL_4                 0x01800000
+/* Page Size 512b, 2k, 4k */
+#define CSOR_NAND_PGS_MASK              0x00180000
+#define CSOR_NAND_PGS_SHIFT             16
+#define CSOR_NAND_PGS_512               0x00000000
+#define CSOR_NAND_PGS_2K                0x00080000
+#define CSOR_NAND_PGS_4K                0x00100000
+/* Spare region Size */
+#define CSOR_NAND_SPRZ_MASK             0x0000E000
+#define CSOR_NAND_SPRZ_SHIFT            13
+#define CSOR_NAND_SPRZ_16               0x00000000
+#define CSOR_NAND_SPRZ_64               0x00002000
+#define CSOR_NAND_SPRZ_128              0x00004000
+#define CSOR_NAND_SPRZ_210              0x00006000
+#define CSOR_NAND_SPRZ_218              0x00008000
+#define CSOR_NAND_SPRZ_224              0x0000A000
+/* Pages Per Block */
+#define CSOR_NAND_PB_MASK               0x00000700
+#define CSOR_NAND_PB_SHIFT              8
+#define CSOR_NAND_PB(n)         ((__ilog2(n) - 5) << CSOR_NAND_PB_SHIFT)
+/* Time for Read Enable High to Output High Impedance */
+#define CSOR_NAND_TRHZ_MASK             0x0000001C
+#define CSOR_NAND_TRHZ_SHIFT            2
+#define CSOR_NAND_TRHZ_20               0x00000000
+#define CSOR_NAND_TRHZ_40               0x00000004
+#define CSOR_NAND_TRHZ_60               0x00000008
+#define CSOR_NAND_TRHZ_80               0x0000000C
+#define CSOR_NAND_TRHZ_100              0x00000010
+/* Buffer control disable */
+#define CSOR_NAND_BCTLD                 0x00000001
+
+/*
+ * Chip Select Option Register - NOR Flash Mode
+ */
+/* Enable Address shift Mode */
+#define CSOR_NOR_ADM_SHFT_MODE_EN       0x80000000
+/* Page Read Enable from NOR device */
+#define CSOR_NOR_PGRD_EN                0x10000000
+/* AVD Toggle Enable during Burst Program */
+#define CSOR_NOR_AVD_TGL_PGM_EN         0x01000000
+/* Address Data Multiplexing Shift */
+#define CSOR_NOR_ADM_MASK               0x0003E000
+#define CSOR_NOR_ADM_SHIFT_SHIFT        13
+#define CSOR_NOR_ADM_SHIFT(n)   ((n) << CSOR_NOR_ADM_SHIFT_SHIFT)
+/* Type of the NOR device hooked */
+#define CSOR_NOR_NOR_MODE_AYSNC_NOR     0x00000000
+#define CSOR_NOR_NOR_MODE_AVD_NOR       0x00000020
+/* Time for Read Enable High to Output High Impedance */
+#define CSOR_NOR_TRHZ_MASK              0x0000001C
+#define CSOR_NOR_TRHZ_SHIFT             2
+#define CSOR_NOR_TRHZ_20                0x00000000
+#define CSOR_NOR_TRHZ_40                0x00000004
+#define CSOR_NOR_TRHZ_60                0x00000008
+#define CSOR_NOR_TRHZ_80                0x0000000C
+#define CSOR_NOR_TRHZ_100               0x00000010
+/* Buffer control disable */
+#define CSOR_NOR_BCTLD                  0x00000001
+
+/*
+ * Chip Select Option Register - GPCM Mode
+ */
+/* GPCM Mode - Normal */
+#define CSOR_GPCM_GPMODE_NORMAL         0x00000000
+/* GPCM Mode - GenericASIC */
+#define CSOR_GPCM_GPMODE_ASIC           0x80000000
+/* Parity Mode odd/even */
+#define CSOR_GPCM_PARITY_EVEN           0x40000000
+/* Parity Checking enable/disable */
+#define CSOR_GPCM_PAR_EN                0x20000000
+/* GPCM Timeout Count */
+#define CSOR_GPCM_GPTO_MASK             0x0F000000
+#define CSOR_GPCM_GPTO_SHIFT            24
+#define CSOR_GPCM_GPTO(n)       ((__ilog2(n) - 8) << CSOR_GPCM_GPTO_SHIFT)
+/* GPCM External Access Termination mode for read access */
+#define CSOR_GPCM_RGETA_EXT             0x00080000
+/* GPCM External Access Termination mode for write access */
+#define CSOR_GPCM_WGETA_EXT             0x00040000
+/* Address Data Multiplexing Shift */
+#define CSOR_GPCM_ADM_MASK              0x0003E000
+#define CSOR_GPCM_ADM_SHIFT_SHIFT       13
+#define CSOR_GPCM_ADM_SHIFT(n)  ((n) << CSOR_GPCM_ADM_SHIFT_SHIFT)
+/* Generic ASIC Parity error indication delay */
+#define CSOR_GPCM_GAPERRD_MASK          0x00000180
+#define CSOR_GPCM_GAPERRD_SHIFT         7
+#define CSOR_GPCM_GAPERRD(n)    (((n) - 1) << CSOR_GPCM_GAPERRD_SHIFT)
+/* Time for Read Enable High to Output High Impedance */
+#define CSOR_GPCM_TRHZ_MASK             0x0000001C
+#define CSOR_GPCM_TRHZ_20               0x00000000
+#define CSOR_GPCM_TRHZ_40               0x00000004
+#define CSOR_GPCM_TRHZ_60               0x00000008
+#define CSOR_GPCM_TRHZ_80               0x0000000C
+#define CSOR_GPCM_TRHZ_100              0x00000010
+/* Buffer control disable */
+#define CSOR_GPCM_BCTLD                 0x00000001
+
+/*
+ * Ready Busy Status Register (RB_STAT)
+ */
+/* CSn is READY */
+#define IFC_RB_STAT_READY_CS0           0x80000000
+#define IFC_RB_STAT_READY_CS1           0x40000000
+#define IFC_RB_STAT_READY_CS2           0x20000000
+#define IFC_RB_STAT_READY_CS3           0x10000000
+
+/*
+ * General Control Register (GCR)
+ */
+#define IFC_GCR_MASK                    0x8000F800
+/* reset all IFC hardware */
+#define IFC_GCR_SOFT_RST_ALL            0x80000000
+/* Turnaroud Time of external buffer */
+#define IFC_GCR_TBCTL_TRN_TIME          0x0000F800
+#define IFC_GCR_TBCTL_TRN_TIME_SHIFT    11
+
+/*
+ * Common Event and Error Status Register (CM_EVTER_STAT)
+ */
+/* Chip select error */
+#define IFC_CM_EVTER_STAT_CSER          0x80000000
+
+/*
+ * Common Event and Error Enable Register (CM_EVTER_EN)
+ */
+/* Chip select error checking enable */
+#define IFC_CM_EVTER_EN_CSEREN          0x80000000
+
+/*
+ * Common Event and Error Interrupt Enable Register (CM_EVTER_INTR_EN)
+ */
+/* Chip select error interrupt enable */
+#define IFC_CM_EVTER_INTR_EN_CSERIREN   0x80000000
+
+/*
+ * Common Transfer Error Attribute Register-0 (CM_ERATTR0)
+ */
+/* transaction type of error Read/Write */
+#define IFC_CM_ERATTR0_ERTYP_READ       0x80000000
+#define IFC_CM_ERATTR0_ERAID            0x0FF00000
+#define IFC_CM_ERATTR0_ERAID_SHIFT      20
+#define IFC_CM_ERATTR0_ESRCID           0x0000FF00
+#define IFC_CM_ERATTR0_ESRCID_SHIFT     8
+
+/*
+ * Clock Control Register (CCR)
+ */
+#define IFC_CCR_MASK                    0x0F0F8800
+/* Clock division ratio */
+#define IFC_CCR_CLK_DIV_MASK            0x0F000000
+#define IFC_CCR_CLK_DIV_SHIFT           24
+#define IFC_CCR_CLK_DIV(n)              ((n-1) << IFC_CCR_CLK_DIV_SHIFT)
+/* IFC Clock Delay */
+#define IFC_CCR_CLK_DLY_MASK            0x000F0000
+#define IFC_CCR_CLK_DLY_SHIFT           16
+#define IFC_CCR_CLK_DLY(n)              ((n) << IFC_CCR_CLK_DLY_SHIFT)
+/* Invert IFC clock before sending out */
+#define IFC_CCR_INV_CLK_EN              0x00008000
+/* Fedback IFC Clock */
+#define IFC_CCR_FB_IFC_CLK_SEL          0x00000800
+
+/*
+ * Clock Status Register (CSR)
+ */
+/* Clk is stable */
+#define IFC_CSR_CLK_STAT_STABLE         0x80000000
+
+/*
+ * IFC_NAND Machine Specific Registers
+ */
+/*
+ * NAND Configuration Register (NCFGR)
+ */
+/* Auto Boot Mode */
+#define IFC_NAND_NCFGR_BOOT             0x80000000
+/* Addressing Mode-ROW0+n/COL0 */
+#define IFC_NAND_NCFGR_ADDR_MODE_RC0    0x00000000
+/* Addressing Mode-ROW0+n/COL0+n */
+#define IFC_NAND_NCFGR_ADDR_MODE_RC1    0x00400000
+/* Number of loop iterations of FIR sequences for multi page operations */
+#define IFC_NAND_NCFGR_NUM_LOOP_MASK    0x0000F000
+#define IFC_NAND_NCFGR_NUM_LOOP_SHIFT   12
+#define IFC_NAND_NCFGR_NUM_LOOP(n)      ((n) << IFC_NAND_NCFGR_NUM_LOOP_SHIFT)
+/* Number of wait cycles */
+#define IFC_NAND_NCFGR_NUM_WAIT_MASK    0x000000FF
+#define IFC_NAND_NCFGR_NUM_WAIT_SHIFT   0
+
+/*
+ * NAND Flash Command Registers (NAND_FCR0/NAND_FCR1)
+ */
+/* General purpose FCM flash command bytes CMD0-CMD7 */
+#define IFC_NAND_FCR0_CMD0              0xFF000000
+#define IFC_NAND_FCR0_CMD0_SHIFT        24
+#define IFC_NAND_FCR0_CMD1              0x00FF0000
+#define IFC_NAND_FCR0_CMD1_SHIFT        16
+#define IFC_NAND_FCR0_CMD2              0x0000FF00
+#define IFC_NAND_FCR0_CMD2_SHIFT        8
+#define IFC_NAND_FCR0_CMD3              0x000000FF
+#define IFC_NAND_FCR0_CMD3_SHIFT        0
+#define IFC_NAND_FCR1_CMD4              0xFF000000
+#define IFC_NAND_FCR1_CMD4_SHIFT        24
+#define IFC_NAND_FCR1_CMD5              0x00FF0000
+#define IFC_NAND_FCR1_CMD5_SHIFT        16
+#define IFC_NAND_FCR1_CMD6              0x0000FF00
+#define IFC_NAND_FCR1_CMD6_SHIFT        8
+#define IFC_NAND_FCR1_CMD7              0x000000FF
+#define IFC_NAND_FCR1_CMD7_SHIFT        0
+
+/*
+ * Flash ROW and COL Address Register (ROWn, COLn)
+ */
+/* Main/spare region locator */
+#define IFC_NAND_COL_MS                 0x80000000
+/* Column Address */
+#define IFC_NAND_COL_CA_MASK            0x00000FFF
+
+/*
+ * NAND Flash Byte Count Register (NAND_BC)
+ */
+/* Byte Count for read/Write */
+#define IFC_NAND_BC                     0x000001FF
+
+/*
+ * NAND Flash Instruction Registers (NAND_FIR0/NAND_FIR1/NAND_FIR2)
+ */
+/* NAND Machine specific opcodes OP0-OP14*/
+#define IFC_NAND_FIR0_OP0               0xFC000000
+#define IFC_NAND_FIR0_OP0_SHIFT         26
+#define IFC_NAND_FIR0_OP1               0x03F00000
+#define IFC_NAND_FIR0_OP1_SHIFT         20
+#define IFC_NAND_FIR0_OP2               0x000FC000
+#define IFC_NAND_FIR0_OP2_SHIFT         14
+#define IFC_NAND_FIR0_OP3               0x00003F00
+#define IFC_NAND_FIR0_OP3_SHIFT         8
+#define IFC_NAND_FIR0_OP4               0x000000FC
+#define IFC_NAND_FIR0_OP4_SHIFT         2
+#define IFC_NAND_FIR1_OP5               0xFC000000
+#define IFC_NAND_FIR1_OP5_SHIFT         26
+#define IFC_NAND_FIR1_OP6               0x03F00000
+#define IFC_NAND_FIR1_OP6_SHIFT         20
+#define IFC_NAND_FIR1_OP7               0x000FC000
+#define IFC_NAND_FIR1_OP7_SHIFT         14
+#define IFC_NAND_FIR1_OP8               0x00003F00
+#define IFC_NAND_FIR1_OP8_SHIFT         8
+#define IFC_NAND_FIR1_OP9               0x000000FC
+#define IFC_NAND_FIR1_OP9_SHIFT         2
+#define IFC_NAND_FIR2_OP10              0xFC000000
+#define IFC_NAND_FIR2_OP10_SHIFT        26
+#define IFC_NAND_FIR2_OP11              0x03F00000
+#define IFC_NAND_FIR2_OP11_SHIFT        20
+#define IFC_NAND_FIR2_OP12              0x000FC000
+#define IFC_NAND_FIR2_OP12_SHIFT        14
+#define IFC_NAND_FIR2_OP13              0x00003F00
+#define IFC_NAND_FIR2_OP13_SHIFT        8
+#define IFC_NAND_FIR2_OP14              0x000000FC
+#define IFC_NAND_FIR2_OP14_SHIFT        2
+
+/*
+ * Instruction opcodes to be programmed
+ * in FIR registers- 6bits
+ */
+enum ifc_nand_fir_opcodes {
+        IFC_FIR_OP_NOP,
+        IFC_FIR_OP_CA0,
+        IFC_FIR_OP_CA1,
+        IFC_FIR_OP_CA2,
+        IFC_FIR_OP_CA3,
+        IFC_FIR_OP_RA0,
+        IFC_FIR_OP_RA1,
+        IFC_FIR_OP_RA2,
+        IFC_FIR_OP_RA3,
+        IFC_FIR_OP_CMD0,
+        IFC_FIR_OP_CMD1,
+        IFC_FIR_OP_CMD2,
+        IFC_FIR_OP_CMD3,
+        IFC_FIR_OP_CMD4,
+        IFC_FIR_OP_CMD5,
+        IFC_FIR_OP_CMD6,
+        IFC_FIR_OP_CMD7,
+        IFC_FIR_OP_CW0,
+        IFC_FIR_OP_CW1,
+        IFC_FIR_OP_CW2,
+        IFC_FIR_OP_CW3,
+        IFC_FIR_OP_CW4,
+        IFC_FIR_OP_CW5,
+        IFC_FIR_OP_CW6,
+        IFC_FIR_OP_CW7,
+        IFC_FIR_OP_WBCD,
+        IFC_FIR_OP_RBCD,
+        IFC_FIR_OP_BTRD,
+        IFC_FIR_OP_RDSTAT,
+        IFC_FIR_OP_NWAIT,
+        IFC_FIR_OP_WFR,
+        IFC_FIR_OP_SBRD,
+        IFC_FIR_OP_UA,
+        IFC_FIR_OP_RB,
+};
+
+/*
+ * NAND Chip Select Register (NAND_CSEL)
+ */
+#define IFC_NAND_CSEL                   0x0C000000
+#define IFC_NAND_CSEL_SHIFT             26
+#define IFC_NAND_CSEL_CS0               0x00000000
+#define IFC_NAND_CSEL_CS1               0x04000000
+#define IFC_NAND_CSEL_CS2               0x08000000
+#define IFC_NAND_CSEL_CS3               0x0C000000
+
+/*
+ * NAND Operation Sequence Start (NANDSEQ_STRT)
+ */
+/* NAND Flash Operation Start */
+#define IFC_NAND_SEQ_STRT_FIR_STRT      0x80000000
+/* Automatic Erase */
+#define IFC_NAND_SEQ_STRT_AUTO_ERS      0x00800000
+/* Automatic Program */
+#define IFC_NAND_SEQ_STRT_AUTO_PGM      0x00100000
+/* Automatic Copyback */
+#define IFC_NAND_SEQ_STRT_AUTO_CPB      0x00020000
+/* Automatic Read Operation */
+#define IFC_NAND_SEQ_STRT_AUTO_RD       0x00004000
+/* Automatic Status Read */
+#define IFC_NAND_SEQ_STRT_AUTO_STAT_RD  0x00000800
+
+/*
+ * NAND Event and Error Status Register (NAND_EVTER_STAT)
+ */
+/* Operation Complete */
+#define IFC_NAND_EVTER_STAT_OPC         0x80000000
+/* Flash Timeout Error */
+#define IFC_NAND_EVTER_STAT_FTOER       0x08000000
+/* Write Protect Error */
+#define IFC_NAND_EVTER_STAT_WPER        0x04000000
+/* ECC Error */
+#define IFC_NAND_EVTER_STAT_ECCER       0x02000000
+/* RCW Load Done */
+#define IFC_NAND_EVTER_STAT_RCW_DN      0x00008000
+/* Boot Loadr Done */
+#define IFC_NAND_EVTER_STAT_BOOT_DN     0x00004000
+/* Bad Block Indicator search select */
+#define IFC_NAND_EVTER_STAT_BBI_SRCH_SE 0x00000800
+
+/*
+ * NAND Flash Page Read Completion Event Status Register
+ * (PGRDCMPL_EVT_STAT)
+ */
+#define PGRDCMPL_EVT_STAT_MASK          0xFFFF0000
+/* Small Page 0-15 Done */
+#define PGRDCMPL_EVT_STAT_SECTION_SP(n) (1 << (31 - (n)))
+/* Large Page(2K) 0-3 Done */
+#define PGRDCMPL_EVT_STAT_LP_2K(n)      (0xF << (28 - (n)*4))
+/* Large Page(4K) 0-1 Done */
+#define PGRDCMPL_EVT_STAT_LP_4K(n)      (0xFF << (24 - (n)*8))
+
+/*
+ * NAND Event and Error Enable Register (NAND_EVTER_EN)
+ */
+/* Operation complete event enable */
+#define IFC_NAND_EVTER_EN_OPC_EN        0x80000000
+/* Page read complete event enable */
+#define IFC_NAND_EVTER_EN_PGRDCMPL_EN   0x20000000
+/* Flash Timeout error enable */
+#define IFC_NAND_EVTER_EN_FTOER_EN      0x08000000
+/* Write Protect error enable */
+#define IFC_NAND_EVTER_EN_WPER_EN       0x04000000
+/* ECC error logging enable */
+#define IFC_NAND_EVTER_EN_ECCER_EN      0x02000000
+
+/*
+ * NAND Event and Error Interrupt Enable Register (NAND_EVTER_INTR_EN)
+ */
+/* Enable interrupt for operation complete */
+#define IFC_NAND_EVTER_INTR_OPCIR_EN            0x80000000
+/* Enable interrupt for Page read complete */
+#define IFC_NAND_EVTER_INTR_PGRDCMPLIR_EN       0x20000000
+/* Enable interrupt for Flash timeout error */
+#define IFC_NAND_EVTER_INTR_FTOERIR_EN          0x08000000
+/* Enable interrupt for Write protect error */
+#define IFC_NAND_EVTER_INTR_WPERIR_EN           0x04000000
+/* Enable interrupt for ECC error*/
+#define IFC_NAND_EVTER_INTR_ECCERIR_EN          0x02000000
+
+/*
+ * NAND Transfer Error Attribute Register-0 (NAND_ERATTR0)
+ */
+#define IFC_NAND_ERATTR0_MASK           0x0C080000
+/* Error on CS0-3 for NAND */
+#define IFC_NAND_ERATTR0_ERCS_CS0       0x00000000
+#define IFC_NAND_ERATTR0_ERCS_CS1       0x04000000
+#define IFC_NAND_ERATTR0_ERCS_CS2       0x08000000
+#define IFC_NAND_ERATTR0_ERCS_CS3       0x0C000000
+/* Transaction type of error Read/Write */
+#define IFC_NAND_ERATTR0_ERTTYPE_READ   0x00080000
+
+/*
+ * NAND Flash Status Register (NAND_FSR)
+ */
+/* First byte of data read from read status op */
+#define IFC_NAND_NFSR_RS0               0xFF000000
+/* Second byte of data read from read status op */
+#define IFC_NAND_NFSR_RS1               0x00FF0000
+
+/*
+ * ECC Error Status Registers (ECCSTAT0-ECCSTAT3)
+ */
+/* Number of ECC errors on sector n (n = 0-15) */
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_MASK   0x0F000000
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR0_SHIFT  24
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_MASK   0x000F0000
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR1_SHIFT  16
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_MASK   0x00000F00
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR2_SHIFT  8
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_MASK   0x0000000F
+#define IFC_NAND_ECCSTAT0_ERRCNT_SECTOR3_SHIFT  0
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_MASK   0x0F000000
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR4_SHIFT  24
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_MASK   0x000F0000
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR5_SHIFT  16
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_MASK   0x00000F00
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR6_SHIFT  8
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_MASK   0x0000000F
+#define IFC_NAND_ECCSTAT1_ERRCNT_SECTOR7_SHIFT  0
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_MASK   0x0F000000
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR8_SHIFT  24
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_MASK   0x000F0000
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR9_SHIFT  16
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_MASK  0x00000F00
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR10_SHIFT 8
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_MASK  0x0000000F
+#define IFC_NAND_ECCSTAT2_ERRCNT_SECTOR11_SHIFT 0
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_MASK  0x0F000000
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR12_SHIFT 24
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_MASK  0x000F0000
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR13_SHIFT 16
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_MASK  0x00000F00
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR14_SHIFT 8
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_MASK  0x0000000F
+#define IFC_NAND_ECCSTAT3_ERRCNT_SECTOR15_SHIFT 0
+
+/*
+ * NAND Control Register (NANDCR)
+ */
+#define IFC_NAND_NCR_FTOCNT_MASK        0x1E000000
+#define IFC_NAND_NCR_FTOCNT_SHIFT       25
+#define IFC_NAND_NCR_FTOCNT(n)  ((_ilog2(n) - 8)  << IFC_NAND_NCR_FTOCNT_SHIFT)
+
+/*
+ * NAND_AUTOBOOT_TRGR
+ */
+/* Trigger RCW load */
+#define IFC_NAND_AUTOBOOT_TRGR_RCW_LD   0x80000000
+/* Trigget Auto Boot */
+#define IFC_NAND_AUTOBOOT_TRGR_BOOT_LD  0x20000000
+
+/*
+ * NAND_MDR
+ */
+/* 1st read data byte when opcode SBRD */
+#define IFC_NAND_MDR_RDATA0             0xFF000000
+/* 2nd read data byte when opcode SBRD */
+#define IFC_NAND_MDR_RDATA1             0x00FF0000
+
+/*
+ * NOR Machine Specific Registers
+ */
+/*
+ * NOR Event and Error Status Register (NOR_EVTER_STAT)
+ */
+/* NOR Command Sequence Operation Complete */
+#define IFC_NOR_EVTER_STAT_OPC_NOR      0x80000000
+/* Write Protect Error */
+#define IFC_NOR_EVTER_STAT_WPER         0x04000000
+/* Command Sequence Timeout Error */
+#define IFC_NOR_EVTER_STAT_STOER        0x01000000
+
+/*
+ * NOR Event and Error Enable Register (NOR_EVTER_EN)
+ */
+/* NOR Command Seq complete event enable */
+#define IFC_NOR_EVTER_EN_OPCEN_NOR      0x80000000
+/* Write Protect Error Checking Enable */
+#define IFC_NOR_EVTER_EN_WPEREN         0x04000000
+/* Timeout Error Enable */
+#define IFC_NOR_EVTER_EN_STOEREN        0x01000000
+
+/*
+ * NOR Event and Error Interrupt Enable Register (NOR_EVTER_INTR_EN)
+ */
+/* Enable interrupt for OPC complete */
+#define IFC_NOR_EVTER_INTR_OPCEN_NOR    0x80000000
+/* Enable interrupt for write protect error */
+#define IFC_NOR_EVTER_INTR_WPEREN       0x04000000
+/* Enable interrupt for timeout error */
+#define IFC_NOR_EVTER_INTR_STOEREN      0x01000000
+
+/*
+ * NOR Transfer Error Attribute Register-0 (NOR_ERATTR0)
+ */
+/* Source ID for error transaction */
+#define IFC_NOR_ERATTR0_ERSRCID         0xFF000000
+/* AXI ID for error transation */
+#define IFC_NOR_ERATTR0_ERAID           0x000FF000
+/* Chip select corresponds to NOR error */
+#define IFC_NOR_ERATTR0_ERCS_CS0        0x00000000
+#define IFC_NOR_ERATTR0_ERCS_CS1        0x00000010
+#define IFC_NOR_ERATTR0_ERCS_CS2        0x00000020
+#define IFC_NOR_ERATTR0_ERCS_CS3        0x00000030
+/* Type of transaction read/write */
+#define IFC_NOR_ERATTR0_ERTYPE_READ     0x00000001
+
+/*
+ * NOR Transfer Error Attribute Register-2 (NOR_ERATTR2)
+ */
+#define IFC_NOR_ERATTR2_ER_NUM_PHASE_EXP        0x000F0000
+#define IFC_NOR_ERATTR2_ER_NUM_PHASE_PER        0x00000F00
+
+/*
+ * NOR Control Register (NORCR)
+ */
+#define IFC_NORCR_MASK                  0x0F0F0000
+/* No. of Address/Data Phase */
+#define IFC_NORCR_NUM_PHASE_MASK        0x0F000000
+#define IFC_NORCR_NUM_PHASE_SHIFT       24
+#define IFC_NORCR_NUM_PHASE(n)  ((n-1) << IFC_NORCR_NUM_PHASE_SHIFT)
+/* Sequence Timeout Count */
+#define IFC_NORCR_STOCNT_MASK           0x000F0000
+#define IFC_NORCR_STOCNT_SHIFT          16
+#define IFC_NORCR_STOCNT(n)     ((__ilog2(n) - 8) << IFC_NORCR_STOCNT_SHIFT)
+
+/*
+ * GPCM Machine specific registers
+ */
+/*
+ * GPCM Event and Error Status Register (GPCM_EVTER_STAT)
+ */
+/* Timeout error */
+#define IFC_GPCM_EVTER_STAT_TOER        0x04000000
+/* Parity error */
+#define IFC_GPCM_EVTER_STAT_PER         0x01000000
+
+/*
+ * GPCM Event and Error Enable Register (GPCM_EVTER_EN)
+ */
+/* Timeout error enable */
+#define IFC_GPCM_EVTER_EN_TOER_EN       0x04000000
+/* Parity error enable */
+#define IFC_GPCM_EVTER_EN_PER_EN        0x01000000
+
+/*
+ * GPCM Event and Error Interrupt Enable Register (GPCM_EVTER_INTR_EN)
+ */
+/* Enable Interrupt for timeout error */
+#define IFC_GPCM_EEIER_TOERIR_EN        0x04000000
+/* Enable Interrupt for Parity error */
+#define IFC_GPCM_EEIER_PERIR_EN         0x01000000
+
+/*
+ * GPCM Transfer Error Attribute Register-0 (GPCM_ERATTR0)
+ */
+/* Source ID for error transaction */
+#define IFC_GPCM_ERATTR0_ERSRCID        0xFF000000
+/* AXI ID for error transaction */
+#define IFC_GPCM_ERATTR0_ERAID          0x000FF000
+/* Chip select corresponds to GPCM error */
+#define IFC_GPCM_ERATTR0_ERCS_CS0       0x00000000
+#define IFC_GPCM_ERATTR0_ERCS_CS1       0x00000040
+#define IFC_GPCM_ERATTR0_ERCS_CS2       0x00000080
+#define IFC_GPCM_ERATTR0_ERCS_CS3       0x000000C0
+/* Type of transaction read/Write */
+#define IFC_GPCM_ERATTR0_ERTYPE_READ    0x00000001
+
+/*
+ * GPCM Transfer Error Attribute Register-2 (GPCM_ERATTR2)
+ */
+/* On which beat of address/data parity error is observed */
+#define IFC_GPCM_ERATTR2_PERR_BEAT              0x00000C00
+/* Parity Error on byte */
+#define IFC_GPCM_ERATTR2_PERR_BYTE              0x000000F0
+/* Parity Error reported in addr or data phase */
+#define IFC_GPCM_ERATTR2_PERR_DATA_PHASE        0x00000001
+
+/*
+ * GPCM Status Register (GPCM_STAT)
+ */
+#define IFC_GPCM_STAT_BSY               0x80000000  /* GPCM is busy */
+
+/*
+ * IFC Controller NAND Machine registers
+ */
+struct fsl_ifc_nand {
+        __be32 ncfgr;
+        u32 res1[0x4];
+        __be32 nand_fcr0;
+        __be32 nand_fcr1;
+        u32 res2[0x8];
+        __be32 row0;
+        u32 res3;
+        __be32 col0;
+        u32 res4;
+        __be32 row1;
+        u32 res5;
+        __be32 col1;
+        u32 res6;
+        __be32 row2;
+        u32 res7;
+        __be32 col2;
+        u32 res8;
+        __be32 row3;
+        u32 res9;
+        __be32 col3;
+        u32 res10[0x24];
+        __be32 nand_fbcr;
+        u32 res11;
+        __be32 nand_fir0;
+        __be32 nand_fir1;
+        __be32 nand_fir2;
+        u32 res12[0x10];
+        __be32 nand_csel;
+        u32 res13;
+        __be32 nandseq_strt;
+        u32 res14;
+        __be32 nand_evter_stat;
+        u32 res15;
+        __be32 pgrdcmpl_evt_stat;
+        u32 res16[0x2];
+        __be32 nand_evter_en;
+        u32 res17[0x2];
+        __be32 nand_evter_intr_en;
+        u32 res18[0x2];
+        __be32 nand_erattr0;
+        __be32 nand_erattr1;
+        u32 res19[0x10];
+        __be32 nand_fsr;
+        u32 res20;
+        __be32 nand_eccstat[4];
+        u32 res21[0x20];
+        __be32 nanndcr;
+        u32 res22[0x2];
+        __be32 nand_autoboot_trgr;
+        u32 res23;
+        __be32 nand_mdr;
+        u32 res24[0x5C];
+};
+
+/*
+ * IFC controller NOR Machine registers
+ */
+struct fsl_ifc_nor {
+        __be32 nor_evter_stat;
+        u32 res1[0x2];
+        __be32 nor_evter_en;
+        u32 res2[0x2];
+        __be32 nor_evter_intr_en;
+        u32 res3[0x2];
+        __be32 nor_erattr0;
+        __be32 nor_erattr1;
+        __be32 nor_erattr2;
+        u32 res4[0x4];
+        __be32 norcr;
+        u32 res5[0xEF];
+};
+
+/*
+ * IFC controller GPCM Machine registers
+ */
+struct fsl_ifc_gpcm {
+        __be32 gpcm_evter_stat;
+        u32 res1[0x2];
+        __be32 gpcm_evter_en;
+        u32 res2[0x2];
+        __be32 gpcm_evter_intr_en;
+        u32 res3[0x2];
+        __be32 gpcm_erattr0;
+        __be32 gpcm_erattr1;
+        __be32 gpcm_erattr2;
+        __be32 gpcm_stat;
+        u32 res4[0x1F3];
+};
+
+/*
+ * IFC Controller Registers
+ */
+struct fsl_ifc_regs {
+        __be32 ifc_rev;
+        u32 res1[0x3];
+        struct {
+                __be32 cspr;
+                u32 res2[0x2];
+        } cspr_cs[FSL_IFC_BANK_COUNT];
+        u32 res3[0x18];
+        struct {
+                __be32 amask;
+                u32 res4[0x2];
+        } amask_cs[FSL_IFC_BANK_COUNT];
+        u32 res5[0x18];
+        struct {
+                __be32 csor;
+                u32 res6[0x2];
+        } csor_cs[FSL_IFC_BANK_COUNT];
+        u32 res7[0x18];
+        struct {
+                __be32 ftim[4];
+                u32 res8[0x8];
+        } ftim_cs[FSL_IFC_BANK_COUNT];
+        u32 res9[0x60];
+        __be32 rb_stat;
+        u32 res10[0x2];
+        __be32 ifc_gcr;
+        u32 res11[0x2];
+        __be32 cm_evter_stat;
+        u32 res12[0x2];
+        __be32 cm_evter_en;
+        u32 res13[0x2];
+        __be32 cm_evter_intr_en;
+        u32 res14[0x2];
+        __be32 cm_erattr0;
+        __be32 cm_erattr1;
+        u32 res15[0x2];
+        __be32 ifc_ccr;
+        __be32 ifc_csr;
+        u32 res16[0x2EB];
+        struct fsl_ifc_nand ifc_nand;
+        struct fsl_ifc_nor ifc_nor;
+        struct fsl_ifc_gpcm ifc_gpcm;
+};
+
+extern unsigned int convert_ifc_address(phys_addr_t addr_base);
+extern int fsl_ifc_find(phys_addr_t addr_base);
+
+/* overview of the fsl ifc controller */
+
+struct fsl_ifc_ctrl {
+        /* device info */
+        struct device                   *dev;
+        struct fsl_ifc_regs __iomem     *regs;
+        int                             irq;
+        int                             nand_irq;
+        spinlock_t                      lock;
+        void                            *nand;
+
+        u32 nand_stat;
+        wait_queue_head_t nand_wait;
+};
+
+extern struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
+
+
+#endif /* __ASM_FSL_IFC_H */
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 8a0b5ece8f76..420b45368fcf 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -238,8 +238,6 @@ struct fsl_lbc_regs {
 #define FPAR_LP_CI_SHIFT      0
         __be32 fbcr;            /**< Flash Byte Count Register */
 #define FBCR_BC      0x00000FFF
-        u8 res11[0x8];
-        u8 res8[0xF00];
 };
 
 /*
@@ -294,6 +292,11 @@ struct fsl_lbc_ctrl {
 
         /* status read from LTESR by irq handler */
         unsigned int                    irq_status;
+
+#ifdef CONFIG_SUSPEND
+        /* save regs when system go to deep-sleep */
+        struct fsl_lbc_regs             *saved_regs;
+#endif
 };
 
 extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index c94e4a3fe2ef..2a9cf845473b 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -11,12 +11,13 @@
 
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
   __asm__ __volatile ( \
-        PPC_RELEASE_BARRIER \
+        PPC_ATOMIC_ENTRY_BARRIER \
 "1:     lwarx   %0,0,%2\n" \
         insn \
         PPC405_ERR77(0, %2) \
 "2:     stwcx.  %1,0,%2\n" \
         "bne-   1b\n" \
+        PPC_ATOMIC_EXIT_BARRIER \
         "li     %1,0\n" \
 "3:     .section .fixup,\"ax\"\n" \
 "4:     li      %1,%3\n" \
@@ -92,14 +93,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
                 return -EFAULT;
 
         __asm__ __volatile__ (
-        PPC_RELEASE_BARRIER
+        PPC_ATOMIC_ENTRY_BARRIER
 "1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\
         cmpw    0,%1,%4\n\
         bne-    3f\n"
         PPC405_ERR77(0,%3)
 "2:     stwcx.  %5,0,%3\n\
         bne-    1b\n"
-        PPC_ACQUIRE_BARRIER
+        PPC_ATOMIC_EXIT_BARRIER
 "3:     .section .fixup,\"ax\"\n\
 4:      li      %0,%6\n\
         b       3b\n\
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index 86004930a78e..dfdb95bc59a5 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -5,7 +5,6 @@
 #include <asm/page.h>
 
 extern struct kmem_cache *hugepte_cache;
-extern void __init reserve_hugetlb_gpages(void);
 
 static inline pte_t *hugepd_page(hugepd_t hpd)
 {
@@ -22,14 +21,14 @@ static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
                                     unsigned pdshift)
 {
         /*
-         * On 32-bit, we have multiple higher-level table entries that point to
-         * the same hugepte.  Just use the first one since they're all
+         * On FSL BookE, we have multiple higher-level table entries that
+         * point to the same hugepte.  Just use the first one since they're all
          * identical.  So for that case, idx=0.
          */
         unsigned long idx = 0;
 
         pte_t *dir = hugepd_page(*hpdp);
-#ifdef CONFIG_PPC64
+#ifndef CONFIG_PPC_FSL_BOOK3E
         idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(*hpdp);
 #endif
 
@@ -53,7 +52,8 @@ static inline int is_hugepage_only_range(struct mm_struct *mm,
 }
 #endif
 
-void book3e_hugetlb_preload(struct mm_struct *mm, unsigned long ea, pte_t pte);
+void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
+                            pte_t pte);
 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
 
 void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
@@ -124,7 +124,17 @@ static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
                                              unsigned long addr, pte_t *ptep,
                                              pte_t pte, int dirty)
 {
+#ifdef HUGETLB_NEED_PRELOAD
+        /*
+         * The "return 1" forces a call of update_mmu_cache, which will write a
+         * TLB entry.  Without this, platforms that don't do a write of the TLB
+         * entry in the TLB miss handler asm will fault ad infinitum.
+         */
+        ptep_set_access_flags(vma, addr, ptep, pte, dirty);
+        return 1;
+#else
         return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
+#endif
 }
 
 static inline pte_t huge_ptep_get(pte_t *ptep)
@@ -142,14 +152,24 @@ static inline void arch_release_hugepage(struct page *page)
 }
 
 #else /* ! CONFIG_HUGETLB_PAGE */
-static inline void reserve_hugetlb_gpages(void)
-{
-        pr_err("Cannot reserve gpages without hugetlb enabled\n");
-}
 static inline void flush_hugetlb_page(struct vm_area_struct *vma,
                                       unsigned long vmaddr)
 {
 }
+#endif /* CONFIG_HUGETLB_PAGE */
+
+
+/*
+ * FSL Book3E platforms require special gpage handling - the gpages
+ * are reserved early in the boot process by memblock instead of via
+ * the .dts as on IBM platforms.
+ */
+#if defined(CONFIG_HUGETLB_PAGE) && defined(CONFIG_PPC_FSL_BOOK3E)
+extern void __init reserve_hugetlb_gpages(void);
+#else
+static inline void reserve_hugetlb_gpages(void)
+{
+}
 #endif
 
 #endif /* _ASM_POWERPC_HUGETLB_H */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 45698d55cd6a..a3855b81eada 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -394,7 +394,7 @@ __do_out_asm(_rec_outl, "stwbrx")
 #endif /* CONFIG_PPC32 */
 
 /* The "__do_*" operations below provide the actual "base" implementation
- * for each of the defined acccessor. Some of them use the out_* functions
+ * for each of the defined accessors. Some of them use the out_* functions
  * directly, some of them still use EEH, though we might change that in the
  * future. Those macros below provide the necessary argument swapping and
  * handling of the IO base for PIO.
diff --git a/arch/powerpc/include/asm/kdump.h b/arch/powerpc/include/asm/kdump.h
index bffd062adf79..c9776202d7ec 100644
--- a/arch/powerpc/include/asm/kdump.h
+++ b/arch/powerpc/include/asm/kdump.h
@@ -32,11 +32,11 @@
 
 #ifndef __ASSEMBLY__
 
-#if defined(CONFIG_CRASH_DUMP) && !defined(CONFIG_RELOCATABLE)
+#if defined(CONFIG_CRASH_DUMP) && !defined(CONFIG_NONSTATIC_KERNEL)
 extern void reserve_kdump_trampoline(void);
 extern void setup_kdump_trampoline(void);
 #else
-/* !CRASH_DUMP || RELOCATABLE */
+/* !CRASH_DUMP || !NONSTATIC_KERNEL */
 static inline void reserve_kdump_trampoline(void) { ; }
 static inline void setup_kdump_trampoline(void) { ; }
 #endif
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index f921eb121d39..16d7e33d35e9 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -49,7 +49,6 @@
 #define KEXEC_STATE_REAL_MODE 2
 
 #ifndef __ASSEMBLY__
-#include <linux/cpumask.h>
 #include <asm/reg.h>
 
 typedef void (*crash_shutdown_t)(void);
@@ -73,11 +72,6 @@ extern void kexec_smp_wait(void);	/* get and clear naca physid, wait for
                                           master to copy new code to 0 */
 extern int crashing_cpu;
 extern void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *));
-extern cpumask_t cpus_in_sr;
-static inline int kexec_sr_activated(int cpu)
-{
-        return cpumask_test_cpu(cpu, &cpus_in_sr);
-}
 
 struct kimage;
 struct pt_regs;
@@ -94,7 +88,6 @@ extern void reserve_crashkernel(void);
 extern void machine_kexec_mask_interrupts(void);
 
 #else /* !CONFIG_KEXEC */
-static inline int kexec_sr_activated(int cpu) { return 0; }
 static inline void crash_kexec_secondary(struct pt_regs *regs) { }
 
 static inline int overlaps_crashkernel(unsigned long start, unsigned long size)
diff --git a/arch/powerpc/include/asm/keylargo.h b/arch/powerpc/include/asm/keylargo.h
index d8520ef121f9..fc195d0b3c34 100644
--- a/arch/powerpc/include/asm/keylargo.h
+++ b/arch/powerpc/include/asm/keylargo.h
@@ -51,7 +51,7 @@
 
 #define KL_GPIO_SOUND_POWER             (KEYLARGO_GPIO_0+0x05)
 
-/* Hrm... this one is only to be used on Pismo. It seeem to also
+/* Hrm... this one is only to be used on Pismo. It seems to also
  * control the timebase enable on other machines. Still to be
  * experimented... --BenH.
  */
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index 08fe69edcd10..0ad432bc81d6 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -149,12 +149,6 @@ struct kvm_regs {
 #define KVM_SREGS_E_UPDATE_DBSR         (1 << 3)
 
 /*
- * Book3S special bits to indicate contents in the struct by maintaining
- * backwards compatibility with older structs. If adding a new field,
- * please make sure to add a flag for that new field */
-#define KVM_SREGS_S_HIOR                (1 << 0)
-
-/*
  * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
  * previous KVM_GET_REGS.
  *
@@ -179,8 +173,6 @@ struct kvm_sregs {
                                 __u64 ibat[8]; 
                                 __u64 dbat[8]; 
                         } ppc32;
-                        __u64 flags; /* KVM_SREGS_S_ */
-                        __u64 hior;
                 } s;
                 struct {
                         union {
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index a384ffdf33de..69c7377d2071 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -90,8 +90,6 @@ struct kvmppc_vcpu_book3s {
 #endif
         int context_id[SID_CONTEXTS];
 
-        bool hior_sregs;                /* HIOR is set by SREGS, not PVR */
-
         struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
         struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
         struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
@@ -383,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
 }
 #endif
 
-static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
-                                             unsigned long pte_index)
-{
-        unsigned long rb, va_low;
-
-        rb = (v & ~0x7fUL) << 16;               /* AVA field */
-        va_low = pte_index >> 3;
-        if (v & HPTE_V_SECONDARY)
-                va_low = ~va_low;
-        /* xor vsid from AVA */
-        if (!(v & HPTE_V_1TB_SEG))
-                va_low ^= v >> 12;
-        else
-                va_low ^= v >> 24;
-        va_low &= 0x7ff;
-        if (v & HPTE_V_LARGE) {
-                rb |= 1;                        /* L field */
-                if (cpu_has_feature(CPU_FTR_ARCH_206) &&
-                    (r & 0xff000)) {
-                        /* non-16MB large page, must be 64k */
-                        /* (masks depend on page size) */
-                        rb |= 0x1000;           /* page encoding in LP field */
-                        rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
-                        rb |= (va_low & 0xfe);  /* AVAL field (P7 doesn't seem to care) */
-                }
-        } else {
-                /* 4kB page */
-                rb |= (va_low & 0x7ff) << 12;   /* remaining 11b of VA */
-        }
-        rb |= (v >> 54) & 0x300;                /* B field */
-        return rb;
-}
-
 /* Magic register values loaded into r3 and r4 before the 'sc' assembly
  * instruction for the OSI hypercalls */
 #define OSI_SC_MAGIC_R3                 0x113724FA
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index e43fe42b9875..d0ac94f98f9e 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
 
 #define SPAPR_TCE_SHIFT         12
 
+static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
+                                             unsigned long pte_index)
+{
+        unsigned long rb, va_low;
+
+        rb = (v & ~0x7fUL) << 16;               /* AVA field */
+        va_low = pte_index >> 3;
+        if (v & HPTE_V_SECONDARY)
+                va_low = ~va_low;
+        /* xor vsid from AVA */
+        if (!(v & HPTE_V_1TB_SEG))
+                va_low ^= v >> 12;
+        else
+                va_low ^= v >> 24;
+        va_low &= 0x7ff;
+        if (v & HPTE_V_LARGE) {
+                rb |= 1;                        /* L field */
+                if (cpu_has_feature(CPU_FTR_ARCH_206) &&
+                    (r & 0xff000)) {
+                        /* non-16MB large page, must be 64k */
+                        /* (masks depend on page size) */
+                        rb |= 0x1000;           /* page encoding in LP field */
+                        rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
+                        rb |= (va_low & 0xfe);  /* AVAL field (P7 doesn't seem to care) */
+                }
+        } else {
+                /* 4kB page */
+                rb |= (va_low & 0x7ff) << 12;   /* remaining 11b of VA */
+        }
+        rb |= (v >> 54) & 0x300;                /* B field */
+        return rb;
+}
+
 #endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/include/asm/lv1call.h b/arch/powerpc/include/asm/lv1call.h
index f77c708c67a0..233f9ecae761 100644
--- a/arch/powerpc/include/asm/lv1call.h
+++ b/arch/powerpc/include/asm/lv1call.h
@@ -231,7 +231,7 @@ LV1_CALL(allocate_memory,                               4, 2,   0 )
 LV1_CALL(write_htab_entry,                              4, 0,   1 )
 LV1_CALL(construct_virtual_address_space,               3, 2,   2 )
 LV1_CALL(invalidate_htab_entries,                       5, 0,   3 )
-LV1_CALL(get_virtual_address_space_id_of_ppe,           1, 1,   4 )
+LV1_CALL(get_virtual_address_space_id_of_ppe,           0, 1,   4 )
 LV1_CALL(query_logical_partition_address_region_info,   1, 5,   6 )
 LV1_CALL(select_virtual_address_space,                  1, 0,   7 )
 LV1_CALL(pause,                                         1, 0,   9 )
@@ -264,7 +264,7 @@ LV1_CALL(configure_execution_time_variable,             1, 0,  77 )
 LV1_CALL(get_spe_irq_outlet,                            2, 1,  78 )
 LV1_CALL(set_spe_privilege_state_area_1_register,       3, 0,  79 )
 LV1_CALL(create_repository_node,                        6, 0,  90 )
-LV1_CALL(get_repository_node_value,                     5, 2,  91 )
+LV1_CALL(read_repository_node,                          5, 2,  91 )
 LV1_CALL(modify_repository_node_value,                  6, 0,  92 )
 LV1_CALL(remove_repository_node,                        4, 0,  93 )
 LV1_CALL(read_htab_entries,                             2, 5,  95 )
@@ -276,7 +276,7 @@ LV1_CALL(construct_io_irq_outlet,                       1, 1, 120 )
 LV1_CALL(destruct_io_irq_outlet,                        1, 0, 121 )
 LV1_CALL(map_htab,                                      1, 1, 122 )
 LV1_CALL(unmap_htab,                                    1, 0, 123 )
-LV1_CALL(get_version_info,                              0, 1, 127 )
+LV1_CALL(get_version_info,                              0, 2, 127 )
 LV1_CALL(insert_htab_entry,                             6, 3, 158 )
 LV1_CALL(read_virtual_uart,                             3, 1, 162 )
 LV1_CALL(write_virtual_uart,                            3, 1, 163 )
@@ -294,9 +294,9 @@ LV1_CALL(unmap_device_dma_region,                       4, 0, 177 )
 LV1_CALL(net_add_multicast_address,                     4, 0, 185 )
 LV1_CALL(net_remove_multicast_address,                  4, 0, 186 )
 LV1_CALL(net_start_tx_dma,                              4, 0, 187 )
-LV1_CALL(net_stop_tx_dma,                               3, 0, 188 )
+LV1_CALL(net_stop_tx_dma,                               2, 0, 188 )
 LV1_CALL(net_start_rx_dma,                              4, 0, 189 )
-LV1_CALL(net_stop_rx_dma,                               3, 0, 190 )
+LV1_CALL(net_stop_rx_dma,                               2, 0, 190 )
 LV1_CALL(net_set_interrupt_status_indicator,            4, 0, 191 )
 LV1_CALL(net_set_interrupt_mask,                        4, 0, 193 )
 LV1_CALL(net_control,                                   6, 2, 194 )
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index b540d6fcedd6..bf37931d1ad6 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -213,6 +213,9 @@ struct machdep_calls {
          * allow assignment/enabling of the device. */
         int  (*pcibios_enable_device_hook)(struct pci_dev *);
 
+        /* Called after scan and before resource survey */
+        void (*pcibios_fixup_phb)(struct pci_controller *hose);
+
         /* Called to shutdown machine specific hardware not already controlled
          * by other drivers.
          */
diff --git a/arch/powerpc/include/asm/memblock.h b/arch/powerpc/include/asm/memblock.h
deleted file mode 100644
index 43efc345065e..000000000000
--- a/arch/powerpc/include/asm/memblock.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _ASM_POWERPC_MEMBLOCK_H
-#define _ASM_POWERPC_MEMBLOCK_H
-
-#include <asm/udbg.h>
-
-#define MEMBLOCK_DBG(fmt...) udbg_printf(fmt)
-
-#endif /* _ASM_POWERPC_MEMBLOCK_H */
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 0260ea5ec3c2..f5f89cafebd0 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -214,6 +214,10 @@ typedef struct {
         unsigned int    id;
         unsigned int    active;
         unsigned long   vdso_base;
+#ifdef CONFIG_PPC_ICSWX
+        struct spinlock *cop_lockp;     /* guard cop related stuff */
+        unsigned long acop;             /* mask of enabled coprocessor types */
+#endif /* CONFIG_PPC_ICSWX */
 #ifdef CONFIG_PPC_MM_SLICES
         u64 low_slices_psize;   /* SLB page size encodings */
         u64 high_slices_psize;  /* 4 bits per slice for now */
@@ -254,6 +258,13 @@ extern int mmu_vmemmap_psize;
 
 #ifdef CONFIG_PPC64
 extern unsigned long linear_map_top;
+
+/*
+ * 64-bit booke platforms don't load the tlb in the tlb miss handler code.
+ * HUGETLB_NEED_PRELOAD handles this - it causes huge_ptep_set_access_flags to
+ * return 1, indicating that the tlb requires preloading.
+ */
+#define HUGETLB_NEED_PRELOAD
 #endif
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index db645ec842bd..412ba493cb98 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -312,10 +312,9 @@ extern void slb_set_size(u16 size);
  * (i.e. everything above 0xC000000000000000), except the very top
  * segment, which simplifies several things.
  *
- *      - We allow for 15 significant bits of ESID and 20 bits of
- * context for user addresses.  i.e. 8T (43 bits) of address space for
- * up to 1M contexts (although the page table structure and context
- * allocation will need changes to take advantage of this).
+ *      - We allow for 16 significant bits of ESID and 19 bits of
+ * context for user addresses.  i.e. 16T (44 bits) of address space for
+ * up to half a million contexts.
  *
  *      - The scramble function gives robust scattering in the hash
  * table (at least based on some initial results).  The previous
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e6fae49e0b74..67b4d9837236 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -251,6 +251,9 @@ struct mpic_irq_save {
 /* The instance data of a given MPIC */
 struct mpic
 {
+        /* The OpenFirmware dt node for this MPIC */
+        struct device_node *node;
+
         /* The remapper for this MPIC */
         struct irq_host         *irqhost;
 
@@ -293,6 +296,9 @@ struct mpic
         /* Register access method */
         enum mpic_reg_type      reg_type;
 
+        /* The physical base address of the MPIC */
+        phys_addr_t paddr;
+
         /* The various ioremap'ed bases */
         struct mpic_reg_bank    gregs;
         struct mpic_reg_bank    tmregs;
@@ -331,11 +337,11 @@ struct mpic
  * Note setting any ID (leaving those bits to 0) means standard MPIC
  */
 
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
+/*
+ * This is a secondary ("chained") controller; it only uses the CPU0
+ * registers.  Primary controllers have IPIs and affinity control.
  */
-#define MPIC_PRIMARY                    0x00000001
+#define MPIC_SECONDARY                  0x00000001
 
 /* Set this for a big-endian MPIC */
 #define MPIC_BIG_ENDIAN                 0x00000002
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 2893e8f5406d..a4b28f165b6c 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -109,6 +109,14 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_PCI_MAP_PE_DMA_WINDOW              44
 #define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL         45
 #define OPAL_PCI_RESET                          49
+#define OPAL_PCI_GET_HUB_DIAG_DATA              50
+#define OPAL_PCI_GET_PHB_DIAG_DATA              51
+#define OPAL_PCI_FENCE_PHB                      52
+#define OPAL_PCI_REINIT                         53
+#define OPAL_PCI_MASK_PE_ERROR                  54
+#define OPAL_SET_SLOT_LED_STATUS                55
+#define OPAL_GET_EPOW_STATUS                    56
+#define OPAL_SET_SYSTEM_ATTENTION_LED           57
 
 #ifndef __ASSEMBLY__
 
@@ -169,7 +177,11 @@ enum OpalPendingState {
         OPAL_EVENT_NVRAM = 0x2,
         OPAL_EVENT_RTC = 0x4,
         OPAL_EVENT_CONSOLE_OUTPUT = 0x8,
-        OPAL_EVENT_CONSOLE_INPUT = 0x10
+        OPAL_EVENT_CONSOLE_INPUT = 0x10,
+        OPAL_EVENT_ERROR_LOG_AVAIL = 0x20,
+        OPAL_EVENT_ERROR_LOG = 0x40,
+        OPAL_EVENT_EPOW = 0x80,
+        OPAL_EVENT_LED_STATUS = 0x100
 };
 
 /* Machine check related definitions */
@@ -258,13 +270,49 @@ enum OpalPeAction {
         OPAL_MAP_PE = 1
 };
 
+enum OpalPeltvAction {
+        OPAL_REMOVE_PE_FROM_DOMAIN = 0,
+        OPAL_ADD_PE_TO_DOMAIN = 1
+};
+
+enum OpalMveEnableAction {
+        OPAL_DISABLE_MVE = 0,
+        OPAL_ENABLE_MVE = 1
+};
+
 enum OpalPciResetAndReinitScope {
         OPAL_PHB_COMPLETE = 1, OPAL_PCI_LINK = 2, OPAL_PHB_ERROR = 3,
         OPAL_PCI_HOT_RESET = 4, OPAL_PCI_FUNDAMENTAL_RESET = 5,
-        OPAL_PCI_IODA_RESET = 6,
+        OPAL_PCI_IODA_TABLE_RESET = 6,
+};
+
+enum OpalPciResetState {
+        OPAL_DEASSERT_RESET = 0,
+        OPAL_ASSERT_RESET = 1
 };
 
-enum OpalPciResetState { OPAL_DEASSERT_RESET = 0, OPAL_ASSERT_RESET = 1 };
+enum OpalPciMaskAction {
+        OPAL_UNMASK_ERROR_TYPE = 0,
+        OPAL_MASK_ERROR_TYPE = 1
+};
+
+enum OpalSlotLedType {
+        OPAL_SLOT_LED_ID_TYPE = 0,
+        OPAL_SLOT_LED_FAULT_TYPE = 1
+};
+
+enum OpalLedAction {
+        OPAL_TURN_OFF_LED = 0,
+        OPAL_TURN_ON_LED = 1,
+        OPAL_QUERY_LED_STATE_AFTER_BUSY = 2
+};
+
+enum OpalEpowStatus {
+        OPAL_EPOW_NONE = 0,
+        OPAL_EPOW_UPS = 1,
+        OPAL_EPOW_OVER_AMBIENT_TEMP = 2,
+        OPAL_EPOW_OVER_INTERNAL_TEMP = 3
+};
 
 struct opal_machine_check_event {
         enum OpalMCE_Version    version:8;      /* 0x00 */
@@ -314,8 +362,74 @@ struct opal_machine_check_event {
         } u;
 };
 
+/**
+ * This structure defines the overlay which will be used to store PHB error
+ * data upon request.
+ */
+enum {
+        OPAL_P7IOC_NUM_PEST_REGS = 128,
+};
+
+struct OpalIoP7IOCPhbErrorData {
+        uint32_t brdgCtl;
+
+        // P7IOC utl regs
+        uint32_t portStatusReg;
+        uint32_t rootCmplxStatus;
+        uint32_t busAgentStatus;
+
+        // P7IOC cfg regs
+        uint32_t deviceStatus;
+        uint32_t slotStatus;
+        uint32_t linkStatus;
+        uint32_t devCmdStatus;
+        uint32_t devSecStatus;
+
+        // cfg AER regs
+        uint32_t rootErrorStatus;
+        uint32_t uncorrErrorStatus;
+        uint32_t corrErrorStatus;
+        uint32_t tlpHdr1;
+        uint32_t tlpHdr2;
+        uint32_t tlpHdr3;
+        uint32_t tlpHdr4;
+        uint32_t sourceId;
+
+        uint32_t rsv3;
+
+        // Record data about the call to allocate a buffer.
+        uint64_t errorClass;
+        uint64_t correlator;
+
+        //P7IOC MMIO Error Regs
+        uint64_t p7iocPlssr;                // n120
+        uint64_t p7iocCsr;                  // n110
+        uint64_t lemFir;                    // nC00
+        uint64_t lemErrorMask;              // nC18
+        uint64_t lemWOF;                    // nC40
+        uint64_t phbErrorStatus;            // nC80
+        uint64_t phbFirstErrorStatus;       // nC88
+        uint64_t phbErrorLog0;              // nCC0
+        uint64_t phbErrorLog1;              // nCC8
+        uint64_t mmioErrorStatus;           // nD00
+        uint64_t mmioFirstErrorStatus;      // nD08
+        uint64_t mmioErrorLog0;             // nD40
+        uint64_t mmioErrorLog1;             // nD48
+        uint64_t dma0ErrorStatus;           // nD80
+        uint64_t dma0FirstErrorStatus;      // nD88
+        uint64_t dma0ErrorLog0;             // nDC0
+        uint64_t dma0ErrorLog1;             // nDC8
+        uint64_t dma1ErrorStatus;           // nE00
+        uint64_t dma1FirstErrorStatus;      // nE08
+        uint64_t dma1ErrorLog0;             // nE40
+        uint64_t dma1ErrorLog1;             // nE48
+        uint64_t pestA[OPAL_P7IOC_NUM_PEST_REGS];
+        uint64_t pestB[OPAL_P7IOC_NUM_PEST_REGS];
+};
+
 typedef struct oppanel_line {
-        /* XXX */
+        const char *    line;
+        uint64_t        line_len;
 } oppanel_line_t;
 
 /* API functions */
@@ -413,6 +527,15 @@ int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
                                         uint64_t pci_mem_size);
 int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state);
 
+int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer, uint64_t diag_buffer_len);
+int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer, uint64_t diag_buffer_len);
+int64_t opal_pci_fence_phb(uint64_t phb_id);
+int64_t opal_pci_reinit(uint64_t phb_id, uint8_t reinit_scope);
+int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
+int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
+int64_t opal_get_epow_status(uint64_t *status);
+int64_t opal_set_system_attention_led(uint8_t led_action);
+
 /* Internal functions */
 extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data);
 
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 17722c73ba2e..269c05a36d91 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -135,6 +135,7 @@ struct paca_struct {
         u8 hard_enabled;                /* set if irqs are enabled in MSR */
         u8 io_sync;                     /* writel() needs spin_unlock sync */
         u8 irq_work_pending;            /* IRQ_WORK interrupt while soft-disable */
+        u8 nap_state_lost;              /* NV GPR values lost in power7_idle */
 
 #ifdef CONFIG_PPC_POWERNV
         /* Pointer to OPAL machine check event structure set by the
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index dd9c4fd038e0..f072e974f8a2 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -92,20 +92,34 @@ extern unsigned int HPAGE_SHIFT;
 #define PAGE_OFFSET     ASM_CONST(CONFIG_PAGE_OFFSET)
 #define LOAD_OFFSET     ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START))
 
-#if defined(CONFIG_RELOCATABLE)
+#if defined(CONFIG_NONSTATIC_KERNEL)
 #ifndef __ASSEMBLY__
 
 extern phys_addr_t memstart_addr;
 extern phys_addr_t kernstart_addr;
+
+#ifdef CONFIG_RELOCATABLE_PPC32
+extern long long virt_phys_offset;
 #endif
+
+#endif /* __ASSEMBLY__ */
 #define PHYSICAL_START  kernstart_addr
-#else
+
+#else   /* !CONFIG_NONSTATIC_KERNEL */
 #define PHYSICAL_START  ASM_CONST(CONFIG_PHYSICAL_START)
 #endif
 
+/* See Description below for VIRT_PHYS_OFFSET */
+#ifdef CONFIG_RELOCATABLE_PPC32
+#define VIRT_PHYS_OFFSET virt_phys_offset
+#else
+#define VIRT_PHYS_OFFSET (KERNELBASE - PHYSICAL_START)
+#endif
+
+
 #ifdef CONFIG_PPC64
 #define MEMORY_START    0UL
-#elif defined(CONFIG_RELOCATABLE)
+#elif defined(CONFIG_NONSTATIC_KERNEL)
 #define MEMORY_START    memstart_addr
 #else
 #define MEMORY_START    (PHYSICAL_START + PAGE_OFFSET - KERNELBASE)
@@ -125,12 +139,77 @@ extern phys_addr_t kernstart_addr;
  * determine MEMORY_START until then.  However we can determine PHYSICAL_START
  * from information at hand (program counter, TLB lookup).
  *
+ * On BookE with RELOCATABLE (RELOCATABLE_PPC32)
+ *
+ *   With RELOCATABLE_PPC32,  we support loading the kernel at any physical 
+ *   address without any restriction on the page alignment.
+ *
+ *   We find the runtime address of _stext and relocate ourselves based on 
+ *   the following calculation:
+ *
+ *        virtual_base = ALIGN_DOWN(KERNELBASE,256M) +
+ *                              MODULO(_stext.run,256M)
+ *   and create the following mapping:
+ *
+ *        ALIGN_DOWN(_stext.run,256M) => ALIGN_DOWN(KERNELBASE,256M)
+ *
+ *   When we process relocations, we cannot depend on the
+ *   existing equation for the __va()/__pa() translations:
+ *
+ *         __va(x) = (x)  - PHYSICAL_START + KERNELBASE
+ *
+ *   Where:
+ *       PHYSICAL_START = kernstart_addr = Physical address of _stext
+ *       KERNELBASE = Compiled virtual address of _stext.
+ *
+ *   This formula holds true iff, kernel load address is TLB page aligned.
+ *
+ *   In our case, we need to also account for the shift in the kernel Virtual 
+ *   address.
+ *
+ *   E.g.,
+ *
+ *   Let the kernel be loaded at 64MB and KERNELBASE be 0xc0000000 (same as PAGE_OFFSET).
+ *   In this case, we would be mapping 0 to 0xc0000000, and kernstart_addr = 64M
+ *
+ *   Now __va(1MB) = (0x100000) - (0x4000000) + 0xc0000000
+ *                 = 0xbc100000 , which is wrong.
+ *
+ *   Rather, it should be : 0xc0000000 + 0x100000 = 0xc0100000
+ *              according to our mapping.
+ *
+ *   Hence we use the following formula to get the translations right:
+ *
+ *        __va(x) = (x) - [ PHYSICAL_START - Effective KERNELBASE ]
+ *
+ *        Where :
+ *              PHYSICAL_START = dynamic load address.(kernstart_addr variable)
+ *              Effective KERNELBASE = virtual_base =
+ *                                   = ALIGN_DOWN(KERNELBASE,256M) +
+ *                                              MODULO(PHYSICAL_START,256M)
+ *
+ *      To make the cost of __va() / __pa() more light weight, we introduce
+ *      a new variable virt_phys_offset, which will hold :
+ *
+ *      virt_phys_offset = Effective KERNELBASE - PHYSICAL_START
+ *                       = ALIGN_DOWN(KERNELBASE,256M) - 
+ *                              ALIGN_DOWN(PHYSICALSTART,256M)
+ *
+ *      Hence :
+ *
+ *      __va(x) = x - PHYSICAL_START + Effective KERNELBASE
+ *              = x + virt_phys_offset
+ *
+ *              and
+ *      __pa(x) = x + PHYSICAL_START - Effective KERNELBASE
+ *              = x - virt_phys_offset
+ *              
  * On non-Book-E PPC64 PAGE_OFFSET and MEMORY_START are constants so use
  * the other definitions for __va & __pa.
  */
 #ifdef CONFIG_BOOKE
-#define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) - PHYSICAL_START + KERNELBASE))
-#define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE)
+#define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + VIRT_PHYS_OFFSET))
+#define __pa(x) ((unsigned long)(x) - VIRT_PHYS_OFFSET)
 #else
 #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + PAGE_OFFSET - MEMORY_START))
 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START)
@@ -290,6 +369,7 @@ extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
 extern void copy_user_page(void *to, void *from, unsigned long vaddr,
                 struct page *p);
 extern int page_is_ram(unsigned long pfn);
+extern int devmem_is_allowed(unsigned long pfn);
 
 #ifdef CONFIG_PPC_SMLPAR
 void arch_free_page(struct page *page, int order);
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h
index fb40ede6bc0d..fed85e6290e1 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -130,7 +130,9 @@ do {						\
 
 #ifdef CONFIG_HUGETLB_PAGE
 
+#ifdef CONFIG_PPC_MM_SLICES
 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
+#endif
 
 #endif /* !CONFIG_HUGETLB_PAGE */
 
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 56b879ab3a40..882b6aa6c857 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -153,8 +153,8 @@ struct pci_dn {
 
         int     pci_ext_config_space;   /* for pci devices */
 
-#ifdef CONFIG_EEH
         struct  pci_dev *pcidev;        /* back-pointer to the pci device */
+#ifdef CONFIG_EEH
         int     class_code;             /* pci device class */
         int     eeh_mode;               /* See eeh.h for possible EEH_MODEs */
         int     eeh_config_addr;
@@ -164,6 +164,10 @@ struct pci_dn {
         int     eeh_false_positives;    /* # times this device reported #ff's */
         u32     config_space[16];       /* saved PCI config space */
 #endif
+#define IODA_INVALID_PE         (-1)
+#ifdef CONFIG_PPC_POWERNV
+        int     pe_number;
+#endif
 };
 
 /* Get the pointer to a device_node's pci_dn */
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 49c3de582be0..1c92013466e3 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -184,8 +184,6 @@ extern void of_scan_pci_bridge(struct pci_dev *dev);
 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
 
-extern int pci_read_irq_line(struct pci_dev *dev);
-
 struct file;
 extern pgprot_t pci_phys_mem_access_prot(struct file *file,
                                          unsigned long pfn,
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 88b0bd925a8b..2e0e4110f7ae 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -170,6 +170,9 @@ extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addre
 #define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
                                             _PAGE_COHERENT | _PAGE_WRITETHRU))
 
+#define pgprot_cached_noncoherent(prot) \
+                (__pgprot(pgprot_val(prot) & ~_PAGE_CACHE_CTL))
+
 #define pgprot_writecombine pgprot_noncached_wc
 
 struct file;
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index eb11a446720e..b585bff1a022 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -382,6 +382,9 @@ static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
 }
 #endif
 
+extern unsigned long cpuidle_disable;
+enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
+
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
 #endif /* _ASM_POWERPC_PROCESSOR_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 559da199edb5..7fdc2c0b7fa0 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -951,6 +951,7 @@
 #define PVR_403GCX      0x00201400
 #define PVR_405GP       0x40110000
 #define PVR_476         0x11a52000
+#define PVR_476FPE      0x7ff50000
 #define PVR_STB03XXX    0x40310000
 #define PVR_NP405H      0x41410000
 #define PVR_NP405L      0x41610000
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 28cdbd9f399c..500fe1dc43e6 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -31,7 +31,7 @@
 
 #define MSR_            MSR_ME | MSR_CE
 #define MSR_KERNEL      MSR_ | MSR_64BIT
-#define MSR_USER32      MSR_ | MSR_PR | MSR_EE | MSR_DE
+#define MSR_USER32      MSR_ | MSR_PR | MSR_EE
 #define MSR_USER64      MSR_USER32 | MSR_64BIT
 #elif defined (CONFIG_40x)
 #define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
@@ -187,6 +187,10 @@
 #define SPRN_CSRR1      SPRN_SRR3 /* Critical Save and Restore Register 1 */
 #endif
 
+#ifdef CONFIG_PPC_ICSWX
+#define SPRN_HACOP      0x15F   /* Hypervisor Available Coprocessor Register */
+#endif
+
 /* Bit definitions for CCR1. */
 #define CCR1_DPC        0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
 #define CCR1_TCS        0x00000080 /* Timer Clock Select */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 41f69ae79d4e..01c143bb77ae 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -245,6 +245,12 @@ extern int early_init_dt_scan_rtas(unsigned long node,
 
 extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
 
+#ifdef CONFIG_PPC_RTAS_DAEMON
+extern void rtas_cancel_event_scan(void);
+#else
+static inline void rtas_cancel_event_scan(void) { }
+#endif
+
 /* Error types logged.  */
 #define ERR_FLAG_ALREADY_LOGGED 0x0
 #define ERR_FLAG_BOOT           0x1     /* log was pulled from NVRAM on boot */
@@ -307,5 +313,17 @@ static inline u32 rtas_config_addr(int busno, int devfn, int reg)
 extern void __cpuinit rtas_give_timebase(void);
 extern void __cpuinit rtas_take_timebase(void);
 
+#ifdef CONFIG_PPC_RTAS
+static inline int page_is_rtas_user_buf(unsigned long pfn)
+{
+        unsigned long paddr = (pfn << PAGE_SHIFT);
+        if (paddr >= rtas_rmo_buf && paddr < (rtas_rmo_buf + RTAS_RMOBUF_MAX))
+                return 1;
+        return 0;
+}
+#else
+static inline int page_is_rtas_user_buf(unsigned long pfn) { return 0;}
+#endif
+
 #endif /* __KERNEL__ */
 #endif /* _POWERPC_RTAS_H */
diff --git a/arch/powerpc/include/asm/rwsem.h b/arch/powerpc/include/asm/rwsem.h
deleted file mode 100644
index bb1e2cdeb9bf..000000000000
--- a/arch/powerpc/include/asm/rwsem.h
+++ /dev/null
@@ -1,132 +0,0 @@
-#ifndef _ASM_POWERPC_RWSEM_H
-#define _ASM_POWERPC_RWSEM_H
-
-#ifndef _LINUX_RWSEM_H
-#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
-#endif
-
-#ifdef __KERNEL__
-
-/*
- * R/W semaphores for PPC using the stuff in lib/rwsem.c.
- * Adapted largely from include/asm-i386/rwsem.h
- * by Paul Mackerras <paulus@samba.org>.
- */
-
-/*
- * the semaphore definition
- */
-#ifdef CONFIG_PPC64
-# define RWSEM_ACTIVE_MASK              0xffffffffL
-#else
-# define RWSEM_ACTIVE_MASK              0x0000ffffL
-#endif
-
-#define RWSEM_UNLOCKED_VALUE            0x00000000L
-#define RWSEM_ACTIVE_BIAS               0x00000001L
-#define RWSEM_WAITING_BIAS              (-RWSEM_ACTIVE_MASK-1)
-#define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
-#define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
-
-/*
- * lock for reading
- */
-static inline void __down_read(struct rw_semaphore *sem)
-{
-        if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))
-                rwsem_down_read_failed(sem);
-}
-
-static inline int __down_read_trylock(struct rw_semaphore *sem)
-{
-        long tmp;
-
-        while ((tmp = sem->count) >= 0) {
-                if (tmp == cmpxchg(&sem->count, tmp,
-                                   tmp + RWSEM_ACTIVE_READ_BIAS)) {
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-/*
- * lock for writing
- */
-static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
-{
-        long tmp;
-
-        tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,
-                                     (atomic_long_t *)&sem->count);
-        if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
-                rwsem_down_write_failed(sem);
-}
-
-static inline void __down_write(struct rw_semaphore *sem)
-{
-        __down_write_nested(sem, 0);
-}
-
-static inline int __down_write_trylock(struct rw_semaphore *sem)
-{
-        long tmp;
-
-        tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
-                      RWSEM_ACTIVE_WRITE_BIAS);
-        return tmp == RWSEM_UNLOCKED_VALUE;
-}
-
-/*
- * unlock after reading
- */
-static inline void __up_read(struct rw_semaphore *sem)
-{
-        long tmp;
-
-        tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);
-        if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
-                rwsem_wake(sem);
-}
-
-/*
- * unlock after writing
- */
-static inline void __up_write(struct rw_semaphore *sem)
-{
-        if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
-                                 (atomic_long_t *)&sem->count) < 0))
-                rwsem_wake(sem);
-}
-
-/*
- * implement atomic add functionality
- */
-static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
-{
-        atomic_long_add(delta, (atomic_long_t *)&sem->count);
-}
-
-/*
- * downgrade write lock to read lock
- */
-static inline void __downgrade_write(struct rw_semaphore *sem)
-{
-        long tmp;
-
-        tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,
-                                     (atomic_long_t *)&sem->count);
-        if (tmp < 0)
-                rwsem_downgrade_wake(sem);
-}
-
-/*
- * implement exchange and add functionality
- */
-static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
-{
-        return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
-}
-
-#endif  /* __KERNEL__ */
-#endif  /* _ASM_POWERPC_RWSEM_H */
diff --git a/arch/powerpc/include/asm/sections.h b/arch/powerpc/include/asm/sections.h
index 6fbce725c710..a0f358d4a00c 100644
--- a/arch/powerpc/include/asm/sections.h
+++ b/arch/powerpc/include/asm/sections.h
@@ -8,7 +8,7 @@
 
 #ifdef __powerpc64__
 
-extern char _end[];
+extern char __end_interrupts[];
 
 static inline int in_kernel_text(unsigned long addr)
 {
diff --git a/arch/powerpc/include/asm/socket.h b/arch/powerpc/include/asm/socket.h
index 866f7606da68..2fc2af8fbf59 100644
--- a/arch/powerpc/include/asm/socket.h
+++ b/arch/powerpc/include/asm/socket.h
@@ -69,4 +69,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif  /* _ASM_POWERPC_SOCKET_H */
diff --git a/arch/powerpc/include/asm/spu.h b/arch/powerpc/include/asm/spu.h
index 4e360bd4a35a..93f280e23279 100644
--- a/arch/powerpc/include/asm/spu.h
+++ b/arch/powerpc/include/asm/spu.h
@@ -25,7 +25,7 @@
 #ifdef __KERNEL__
 
 #include <linux/workqueue.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/mutex.h>
 
 #define LS_SIZE (256 * 1024)
@@ -166,7 +166,7 @@ struct spu {
         /* beat only */
         u64 shadow_int_mask_RW[3];
 
-        struct sys_device sysdev;
+        struct device dev;
 
         int has_mem_affinity;
         struct list_head aff_list;
@@ -237,7 +237,7 @@ extern long spu_sys_callback(struct spu_syscall_block *s);
 struct file;
 struct spufs_calls {
         long (*create_thread)(const char __user *name,
-                                        unsigned int flags, mode_t mode,
+                                        unsigned int flags, umode_t mode,
                                         struct file *neighbor);
         long (*spu_run)(struct file *filp, __u32 __user *unpc,
                                                 __u32 __user *ustatus);
@@ -270,11 +270,11 @@ struct spufs_calls {
 int register_spu_syscalls(struct spufs_calls *calls);
 void unregister_spu_syscalls(struct spufs_calls *calls);
 
-int spu_add_sysdev_attr(struct sysdev_attribute *attr);
-void spu_remove_sysdev_attr(struct sysdev_attribute *attr);
+int spu_add_dev_attr(struct device_attribute *attr);
+void spu_remove_dev_attr(struct device_attribute *attr);
 
-int spu_add_sysdev_attr_group(struct attribute_group *attrs);
-void spu_remove_sysdev_attr_group(struct attribute_group *attrs);
+int spu_add_dev_attr_group(struct attribute_group *attrs);
+void spu_remove_dev_attr_group(struct attribute_group *attrs);
 
 int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea,
                 unsigned long dsisr, unsigned *flt);
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index d7cab44643c5..e682a7143edb 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -13,6 +13,7 @@
 extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
 extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
                              void *fixup_end);
+extern void do_final_fixups(void);
 
 static inline void eieio(void)
 {
@@ -41,11 +42,15 @@ static inline void isync(void)
         START_LWSYNC_SECTION(97);                       \
         isync;                                          \
         MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
-#define PPC_ACQUIRE_BARRIER     "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
-#define PPC_RELEASE_BARRIER     stringify_in_c(LWSYNC) "\n"
+#define PPC_ACQUIRE_BARRIER      "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
+#define PPC_RELEASE_BARRIER      stringify_in_c(LWSYNC) "\n"
+#define PPC_ATOMIC_ENTRY_BARRIER "\n" stringify_in_c(LWSYNC) "\n"
+#define PPC_ATOMIC_EXIT_BARRIER  "\n" stringify_in_c(sync) "\n"
 #else
 #define PPC_ACQUIRE_BARRIER
 #define PPC_RELEASE_BARRIER
+#define PPC_ATOMIC_ENTRY_BARRIER
+#define PPC_ATOMIC_EXIT_BARRIER
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index e30a13d1ee76..c377457d1b89 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -193,8 +193,8 @@ extern void cacheable_memzero(void *p, unsigned int nb);
 extern void *cacheable_memcpy(void *, const void *, unsigned int);
 extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
 extern void bad_page_fault(struct pt_regs *, unsigned long, int);
-extern int die(const char *, struct pt_regs *, long);
 extern void _exception(int, struct pt_regs *, int, unsigned long);
+extern void die(const char *, struct pt_regs *, long);
 extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
 
 #ifdef CONFIG_BOOKE_WDT
@@ -221,6 +221,15 @@ extern unsigned long klimit;
 extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
 
 extern int powersave_nap;       /* set if nap mode can be used in idle loop */
+void cpu_idle_wait(void);
+
+#ifdef CONFIG_PSERIES_IDLE
+extern void update_smt_snooze_delay(int snooze);
+extern int pseries_notify_cpuidle_add_cpu(int cpu);
+#else
+static inline void update_smt_snooze_delay(int snooze) {}
+static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
+#endif
 
 /*
  * Atomic exchange
diff --git a/arch/powerpc/include/asm/tce.h b/arch/powerpc/include/asm/tce.h
index f663634cccc9..743f36b38e5d 100644
--- a/arch/powerpc/include/asm/tce.h
+++ b/arch/powerpc/include/asm/tce.h
@@ -26,10 +26,14 @@
 
 /*
  * Tces come in two formats, one for the virtual bus and a different
- * format for PCI
+ * format for PCI.  PCI TCEs can have hardware or software maintianed
+ * coherency.
  */
-#define TCE_VB  0
-#define TCE_PCI 1
+#define TCE_VB                  0
+#define TCE_PCI                 1
+#define TCE_PCI_SWINV_CREATE    2
+#define TCE_PCI_SWINV_FREE      4
+#define TCE_PCI_SWINV_PAIR      8
 
 /* TCE page size is 4096 bytes (1 << 12) */
 
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 836f231ec1f0..964714940961 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -109,7 +109,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_RESTOREALL          11      /* Restore all regs (implies NOERROR) */
 #define TIF_NOERROR             12      /* Force successful syscall return */
 #define TIF_NOTIFY_RESUME       13      /* callback before returning to user */
-#define TIF_FREEZE              14      /* Freezing for suspend */
 #define TIF_SYSCALL_TRACEPOINT  15      /* syscall tracepoint instrumentation */
 #define TIF_RUNLATCH            16      /* Is the runlatch enabled? */
 
@@ -127,7 +126,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_RESTOREALL         (1<<TIF_RESTOREALL)
 #define _TIF_NOERROR            (1<<TIF_NOERROR)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
 #define _TIF_RUNLATCH           (1<<TIF_RUNLATCH)
 #define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index fe6f7c2c9c68..7eb10fb96cd0 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -219,5 +219,7 @@ DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
 extern void secondary_cpu_time_init(void);
 extern void iSeries_time_init_early(void);
 
+DECLARE_PER_CPU(u64, decrementers_next_tb);
+
 #endif /* __KERNEL__ */
 #endif /* __POWERPC_TIME_H */
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index 1e104af08483..c97185885c6d 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -3,7 +3,7 @@
 #ifdef __KERNEL__
 
 
-struct sys_device;
+struct device;
 struct device_node;
 
 #ifdef CONFIG_NUMA
@@ -86,19 +86,19 @@ extern int __node_distance(int, int);
 
 extern void __init dump_numa_cpu_topology(void);
 
-extern int sysfs_add_device_to_node(struct sys_device *dev, int nid);
-extern void sysfs_remove_device_from_node(struct sys_device *dev, int nid);
+extern int sysfs_add_device_to_node(struct device *dev, int nid);
+extern void sysfs_remove_device_from_node(struct device *dev, int nid);
 
 #else
 
 static inline void dump_numa_cpu_topology(void) {}
 
-static inline int sysfs_add_device_to_node(struct sys_device *dev, int nid)
+static inline int sysfs_add_device_to_node(struct device *dev, int nid)
 {
         return 0;
 }
 
-static inline void sysfs_remove_device_from_node(struct sys_device *dev,
+static inline void sysfs_remove_device_from_node(struct device *dev,
                                                 int nid)
 {
 }
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index 8947b9827bc4..0abf7f2c6df9 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -5,8 +5,11 @@
  * This is here because we used to use l64 for 64bit powerpc
  * and we don't want to impact user mode with our change to ll64
  * in the kernel.
+ *
+ * However, some user programs are fine with this.  They can
+ * flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.
  */
-#if defined(__powerpc64__) && !defined(__KERNEL__)
+#if !defined(__SANE_USERSPACE_TYPES__) && defined(__powerpc64__) && !defined(__KERNEL__)
 # include <asm-generic/int-l64.h>
 #else
 # include <asm-generic/int-ll64.h>
@@ -27,12 +30,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#ifdef __powerpc64__
-typedef unsigned int umode_t;
-#else
-typedef unsigned short umode_t;
-#endif
-
 typedef struct {
         __u32 u[4];
 } __attribute__((aligned(16))) __vector128;
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index ce4f7f179117..ee728e433aa2 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -85,6 +85,8 @@ extra-$(CONFIG_FSL_BOOKE)	:= head_fsl_booke.o
 extra-$(CONFIG_8xx)             := head_8xx.o
 extra-y                         += vmlinux.lds
 
+obj-$(CONFIG_RELOCATABLE_PPC32) += reloc_32.o
+
 obj-$(CONFIG_PPC32)             += entry_32.o setup_32.o
 obj-$(CONFIG_PPC64)             += dma-iommu.o iommu.o
 obj-$(CONFIG_KGDB)              += kgdb.o
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 7c5324f1ec9c..04caee7d9bc1 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -208,6 +208,7 @@ int main(void)
         DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
         DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
         DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
+        DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
 #endif /* CONFIG_PPC64 */
 
         /* RTAS */
diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
index a3c684b4c862..92c6b008dd2b 100644
--- a/arch/powerpc/kernel/cacheinfo.c
+++ b/arch/powerpc/kernel/cacheinfo.c
@@ -451,15 +451,15 @@ out:
 static struct cache_dir *__cpuinit cacheinfo_create_cache_dir(unsigned int cpu_id)
 {
         struct cache_dir *cache_dir;
-        struct sys_device *sysdev;
+        struct device *dev;
         struct kobject *kobj = NULL;
 
-        sysdev = get_cpu_sysdev(cpu_id);
-        WARN_ONCE(!sysdev, "no sysdev for CPU %i\n", cpu_id);
-        if (!sysdev)
+        dev = get_cpu_device(cpu_id);
+        WARN_ONCE(!dev, "no dev for CPU %i\n", cpu_id);
+        if (!dev)
                 goto err;
 
-        kobj = kobject_create_and_add("cache", &sysdev->kobj);
+        kobj = kobject_create_and_add("cache", &dev->kobj);
         if (!kobj)
                 goto err;
 
diff --git a/arch/powerpc/kernel/cpu_setup_a2.S b/arch/powerpc/kernel/cpu_setup_a2.S
index 7f818feaa7a5..ebc62f42a237 100644
--- a/arch/powerpc/kernel/cpu_setup_a2.S
+++ b/arch/powerpc/kernel/cpu_setup_a2.S
@@ -41,11 +41,16 @@ _GLOBAL(__setup_cpu_a2)
          * core local but doing it always won't hurt
          */
 
-#ifdef CONFIG_PPC_WSP_COPRO
+#ifdef CONFIG_PPC_ICSWX
         /* Make sure ACOP starts out as zero */
         li      r3,0
         mtspr   SPRN_ACOP,r3
 
+        /* Skip the following if we are in Guest mode */
+        mfmsr   r3
+        andis.  r0,r3,MSR_GS@h
+        bne     _icswx_skip_guest
+
         /* Enable icswx instruction */
         mfspr   r3,SPRN_A2_CCR2
         ori     r3,r3,A2_CCR2_ENABLE_ICSWX
@@ -54,7 +59,8 @@ _GLOBAL(__setup_cpu_a2)
         /* Unmask all CTs in HACOP */
         li      r3,-1
         mtspr   SPRN_HACOP,r3
-#endif /* CONFIG_PPC_WSP_COPRO */
+_icswx_skip_guest:
+#endif /* CONFIG_PPC_ICSWX */
 
         /* Enable doorbell */
         mfspr   r3,SPRN_A2_CCR2
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index edae5bb06f1f..81db9e2a8a20 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1505,6 +1505,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_4xx,
                 .platform               = "ppc405",
         },
+        {       /* APM8018X */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x7ff11432,
+                .cpu_name               = "APM8018X",
+                .cpu_features           = CPU_FTRS_40X,
+                .cpu_user_features      = PPC_FEATURE_32 |
+                        PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+                .mmu_features           = MMU_FTR_TYPE_40x,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .machine_check          = machine_check_4xx,
+                .platform               = "ppc405",
+        },
         {       /* default match */
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
@@ -1830,6 +1843,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_47x,
                 .platform               = "ppc470",
         },
+        { /* 476fpe */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x7ff50000,
+                .cpu_name               = "476fpe",
+                .cpu_features           = CPU_FTRS_47X | CPU_FTR_476_DD2,
+                .cpu_user_features      = COMMON_USER_BOOKE |
+                        PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_47x |
+                        MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 128,
+                .machine_check          = machine_check_47x,
+                .platform               = "ppc470",
+        },
         { /* 476 iss */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x00050000,
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index d879809d5c45..28be3452e67a 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -10,85 +10,85 @@
  *
  */
 
-#undef DEBUG
-
 #include <linux/kernel.h>
 #include <linux/smp.h>
 #include <linux/reboot.h>
 #include <linux/kexec.h>
-#include <linux/bootmem.h>
 #include <linux/export.h>
 #include <linux/crash_dump.h>
 #include <linux/delay.h>
-#include <linux/elf.h>
-#include <linux/elfcore.h>
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/types.h>
-#include <linux/memblock.h>
 
 #include <asm/processor.h>
 #include <asm/machdep.h>
 #include <asm/kexec.h>
 #include <asm/kdump.h>
 #include <asm/prom.h>
-#include <asm/firmware.h>
 #include <asm/smp.h>
 #include <asm/system.h>
 #include <asm/setjmp.h>
 
-#ifdef DEBUG
-#include <asm/udbg.h>
-#define DBG(fmt...) udbg_printf(fmt)
-#else
-#define DBG(fmt...)
-#endif
+/*
+ * The primary CPU waits a while for all secondary CPUs to enter. This is to
+ * avoid sending an IPI if the secondary CPUs are entering
+ * crash_kexec_secondary on their own (eg via a system reset).
+ *
+ * The secondary timeout has to be longer than the primary. Both timeouts are
+ * in milliseconds.
+ */
+#define PRIMARY_TIMEOUT         500
+#define SECONDARY_TIMEOUT       1000
 
-/* This keeps a track of which one is crashing cpu. */
+#define IPI_TIMEOUT             10000
+#define REAL_MODE_TIMEOUT       10000
+
+/* This keeps a track of which one is the crashing cpu. */
 int crashing_cpu = -1;
-static cpumask_t cpus_in_crash = CPU_MASK_NONE;
-cpumask_t cpus_in_sr = CPU_MASK_NONE;
+static atomic_t cpus_in_crash;
+static int time_to_dump;
 
 #define CRASH_HANDLER_MAX 3
 /* NULL terminated list of shutdown handles */
 static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1];
 static DEFINE_SPINLOCK(crash_handlers_lock);
 
+static unsigned long crash_shutdown_buf[JMP_BUF_LEN];
+static int crash_shutdown_cpu = -1;
+
+static int handle_fault(struct pt_regs *regs)
+{
+        if (crash_shutdown_cpu == smp_processor_id())
+                longjmp(crash_shutdown_buf, 1);
+        return 0;
+}
+
 #ifdef CONFIG_SMP
-static atomic_t enter_on_soft_reset = ATOMIC_INIT(0);
 
 void crash_ipi_callback(struct pt_regs *regs)
 {
+        static cpumask_t cpus_state_saved = CPU_MASK_NONE;
+
         int cpu = smp_processor_id();
 
         if (!cpu_online(cpu))
                 return;
 
         hard_irq_disable();
-        if (!cpumask_test_cpu(cpu, &cpus_in_crash))
+        if (!cpumask_test_cpu(cpu, &cpus_state_saved)) {
                 crash_save_cpu(regs, cpu);
-        cpumask_set_cpu(cpu, &cpus_in_crash);
-
-        /*
-         * Entered via soft-reset - could be the kdump
-         * process is invoked using soft-reset or user activated
-         * it if some CPU did not respond to an IPI.
-         * For soft-reset, the secondary CPU can enter this func
-         * twice. 1 - using IPI, and 2. soft-reset.
-         * Tell the kexec CPU that entered via soft-reset and ready
-         * to go down.
-         */
-        if (cpumask_test_cpu(cpu, &cpus_in_sr)) {
-                cpumask_clear_cpu(cpu, &cpus_in_sr);
-                atomic_inc(&enter_on_soft_reset);
+                cpumask_set_cpu(cpu, &cpus_state_saved);
         }
 
+        atomic_inc(&cpus_in_crash);
+        smp_mb__after_atomic_inc();
+
         /*
          * Starting the kdump boot.
          * This barrier is needed to make sure that all CPUs are stopped.
-         * If not, soft-reset will be invoked to bring other CPUs.
          */
-        while (!cpumask_test_cpu(crashing_cpu, &cpus_in_crash))
+        while (!time_to_dump)
                 cpu_relax();
 
         if (ppc_md.kexec_cpu_down)
@@ -103,106 +103,99 @@ void crash_ipi_callback(struct pt_regs *regs)
         /* NOTREACHED */
 }
 
-/*
- * Wait until all CPUs are entered via soft-reset.
- */
-static void crash_soft_reset_check(int cpu)
-{
-        unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
-
-        cpumask_clear_cpu(cpu, &cpus_in_sr);
-        while (atomic_read(&enter_on_soft_reset) != ncpus)
-                cpu_relax();
-}
-
-
 static void crash_kexec_prepare_cpus(int cpu)
 {
         unsigned int msecs;
-
         unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
+        int tries = 0;
+        int (*old_handler)(struct pt_regs *regs);
+
+        printk(KERN_EMERG "Sending IPI to other CPUs\n");
 
         crash_send_ipi(crash_ipi_callback);
         smp_wmb();
 
+again:
         /*
          * FIXME: Until we will have the way to stop other CPUs reliably,
          * the crash CPU will send an IPI and wait for other CPUs to
          * respond.
-         * Delay of at least 10 seconds.
          */
-        printk(KERN_EMERG "Sending IPI to other cpus...\n");
-        msecs = 10000;
-        while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
-                cpu_relax();
+        msecs = IPI_TIMEOUT;
+        while ((atomic_read(&cpus_in_crash) < ncpus) && (--msecs > 0))
                 mdelay(1);
-        }
 
         /* Would it be better to replace the trap vector here? */
 
+        if (atomic_read(&cpus_in_crash) >= ncpus) {
+                printk(KERN_EMERG "IPI complete\n");
+                return;
+        }
+
+        printk(KERN_EMERG "ERROR: %d cpu(s) not responding\n",
+                ncpus - atomic_read(&cpus_in_crash));
+
         /*
-         * FIXME: In case if we do not get all CPUs, one possibility: ask the
-         * user to do soft reset such that we get all.
-         * Soft-reset will be used until better mechanism is implemented.
+         * If we have a panic timeout set then we can't wait indefinitely
+         * for someone to activate system reset. We also give up on the
+         * second time through if system reset fail to work.
          */
-        if (cpumask_weight(&cpus_in_crash) < ncpus) {
-                printk(KERN_EMERG "done waiting: %d cpu(s) not responding\n",
-                        ncpus - cpumask_weight(&cpus_in_crash));
-                printk(KERN_EMERG "Activate soft-reset to stop other cpu(s)\n");
-                cpumask_clear(&cpus_in_sr);
-                atomic_set(&enter_on_soft_reset, 0);
-                while (cpumask_weight(&cpus_in_crash) < ncpus)
-                        cpu_relax();
-        }
+        if ((panic_timeout > 0) || (tries > 0))
+                return;
+
         /*
-         * Make sure all CPUs are entered via soft-reset if the kdump is
-         * invoked using soft-reset.
+         * A system reset will cause all CPUs to take an 0x100 exception.
+         * The primary CPU returns here via setjmp, and the secondary
+         * CPUs reexecute the crash_kexec_secondary path.
          */
-        if (cpumask_test_cpu(cpu, &cpus_in_sr))
-                crash_soft_reset_check(cpu);
-        /* Leave the IPI callback set */
+        old_handler = __debugger;
+        __debugger = handle_fault;
+        crash_shutdown_cpu = smp_processor_id();
+
+        if (setjmp(crash_shutdown_buf) == 0) {
+                printk(KERN_EMERG "Activate system reset (dumprestart) "
+                                  "to stop other cpu(s)\n");
+
+                /*
+                 * A system reset will force all CPUs to execute the
+                 * crash code again. We need to reset cpus_in_crash so we
+                 * wait for everyone to do this.
+                 */
+                atomic_set(&cpus_in_crash, 0);
+                smp_mb();
+
+                while (atomic_read(&cpus_in_crash) < ncpus)
+                        cpu_relax();
+        }
+
+        crash_shutdown_cpu = -1;
+        __debugger = old_handler;
+
+        tries++;
+        goto again;
 }
 
 /*
- * This function will be called by secondary cpus or by kexec cpu
- * if soft-reset is activated to stop some CPUs.
+ * This function will be called by secondary cpus.
  */
 void crash_kexec_secondary(struct pt_regs *regs)
 {
-        int cpu = smp_processor_id();
         unsigned long flags;
-        int msecs = 5;
+        int msecs = SECONDARY_TIMEOUT;
 
         local_irq_save(flags);
-        /* Wait 5ms if the kexec CPU is not entered yet. */
+
+        /* Wait for the primary crash CPU to signal its progress */
         while (crashing_cpu < 0) {
                 if (--msecs < 0) {
-                        /*
-                         * Either kdump image is not loaded or
-                         * kdump process is not started - Probably xmon
-                         * exited using 'x'(exit and recover) or
-                         * kexec_should_crash() failed for all running tasks.
-                         */
-                        cpumask_clear_cpu(cpu, &cpus_in_sr);
+                        /* No response, kdump image may not have been loaded */
                         local_irq_restore(flags);
                         return;
                 }
+
                 mdelay(1);
-                cpu_relax();
-        }
-        if (cpu == crashing_cpu) {
-                /*
-                 * Panic CPU will enter this func only via soft-reset.
-                 * Wait until all secondary CPUs entered and
-                 * then start kexec boot.
-                 */
-                crash_soft_reset_check(cpu);
-                cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
-                if (ppc_md.kexec_cpu_down)
-                        ppc_md.kexec_cpu_down(1, 0);
-                machine_kexec(kexec_crash_image);
-                /* NOTREACHED */
         }
+
         crash_ipi_callback(regs);
 }
 
@@ -211,7 +204,7 @@ void crash_kexec_secondary(struct pt_regs *regs)
 static void crash_kexec_prepare_cpus(int cpu)
 {
         /*
-         * move the secondarys to us so that we can copy
+         * move the secondaries to us so that we can copy
          * the new kernel 0-0x100 safely
          *
          * do this if kexec in setup.c ?
@@ -225,7 +218,6 @@ static void crash_kexec_prepare_cpus(int cpu)
 
 void crash_kexec_secondary(struct pt_regs *regs)
 {
-        cpumask_clear(&cpus_in_sr);
 }
 #endif  /* CONFIG_SMP */
 
@@ -236,7 +228,7 @@ static void crash_kexec_wait_realmode(int cpu)
         unsigned int msecs;
         int i;
 
-        msecs = 10000;
+        msecs = REAL_MODE_TIMEOUT;
         for (i=0; i < nr_cpu_ids && msecs > 0; i++) {
                 if (i == cpu)
                         continue;
@@ -308,22 +300,11 @@ int crash_shutdown_unregister(crash_shutdown_t handler)
 }
 EXPORT_SYMBOL(crash_shutdown_unregister);
 
-static unsigned long crash_shutdown_buf[JMP_BUF_LEN];
-static int crash_shutdown_cpu = -1;
-
-static int handle_fault(struct pt_regs *regs)
-{
-        if (crash_shutdown_cpu == smp_processor_id())
-                longjmp(crash_shutdown_buf, 1);
-        return 0;
-}
-
 void default_machine_crash_shutdown(struct pt_regs *regs)
 {
         unsigned int i;
         int (*old_handler)(struct pt_regs *regs);
 
-
         /*
          * This function is only called after the system
          * has panicked or is otherwise in a critical state.
@@ -341,15 +322,26 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
          * such that another IPI will not be sent.
          */
         crashing_cpu = smp_processor_id();
-        crash_save_cpu(regs, crashing_cpu);
+
+        /*
+         * If we came in via system reset, wait a while for the secondary
+         * CPUs to enter.
+         */
+        if (TRAP(regs) == 0x100)
+                mdelay(PRIMARY_TIMEOUT);
+
         crash_kexec_prepare_cpus(crashing_cpu);
-        cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
+
+        crash_save_cpu(regs, crashing_cpu);
+
+        time_to_dump = 1;
+
         crash_kexec_wait_realmode(crashing_cpu);
 
         machine_kexec_mask_interrupts();
 
         /*
-         * Call registered shutdown routines savely.  Swap out
+         * Call registered shutdown routines safely.  Swap out
          * __debugger_fault_handler, and replace on exit.
          */
         old_handler = __debugger_fault_handler;
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 424afb6b8fba..b3ba5163eae2 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -28,7 +28,7 @@
 #define DBG(fmt...)
 #endif
 
-#ifndef CONFIG_RELOCATABLE
+#ifndef CONFIG_NONSTATIC_KERNEL
 void __init reserve_kdump_trampoline(void)
 {
         memblock_reserve(0, KDUMP_RESERVE_LIMIT);
@@ -67,7 +67,7 @@ void __init setup_kdump_trampoline(void)
 
         DBG(" <- setup_kdump_trampoline()\n");
 }
-#endif /* CONFIG_RELOCATABLE */
+#endif /* CONFIG_NONSTATIC_KERNEL */
 
 static int __init parse_savemaxmem(char *p)
 {
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 56212bc0ab08..4f80cf1ce77b 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -215,7 +215,22 @@ reenable_mmu:				/* re-enable mmu so we can */
         stw     r9,8(r1)
         stw     r11,12(r1)
         stw     r3,ORIG_GPR3(r1)
+        /*
+         * The trace_hardirqs_off will use CALLER_ADDR0 and CALLER_ADDR1.
+         * If from user mode there is only one stack frame on the stack, and
+         * accessing CALLER_ADDR1 will cause oops. So we need create a dummy
+         * stack frame to make trace_hardirqs_off happy.
+         */
+        andi.   r12,r12,MSR_PR
+        beq     11f
+        stwu    r1,-16(r1)
+        bl      trace_hardirqs_off
+        addi    r1,r1,16
+        b       12f
+
+11:
         bl      trace_hardirqs_off
+12:
         lwz     r0,GPR0(r1)
         lwz     r3,ORIG_GPR3(r1)
         lwz     r4,GPR4(r1)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index cf9c69b9189c..d4be7bb3dbdf 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -65,7 +65,7 @@ BEGIN_FTR_SECTION
         lbz     r0,PACAPROCSTART(r13)
         cmpwi   r0,0x80
         bne     1f
-        li      r0,0
+        li      r0,1
         stb     r0,PACAPROCSTART(r13)
         b       kvm_start_guest
 1:
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b725dab0f88a..7dd2981bcc50 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -64,6 +64,35 @@ _ENTRY(_start);
         mr      r31,r3          /* save device tree ptr */
         li      r24,0           /* CPU number */
 
+#ifdef CONFIG_RELOCATABLE
+/*
+ * Relocate ourselves to the current runtime address.
+ * This is called only by the Boot CPU.
+ * "relocate" is called with our current runtime virutal
+ * address.
+ * r21 will be loaded with the physical runtime address of _stext
+ */
+        bl      0f                              /* Get our runtime address */
+0:      mflr    r21                             /* Make it accessible */
+        addis   r21,r21,(_stext - 0b)@ha
+        addi    r21,r21,(_stext - 0b)@l         /* Get our current runtime base */
+
+        /*
+         * We have the runtime (virutal) address of our base.
+         * We calculate our shift of offset from a 256M page.
+         * We could map the 256M page we belong to at PAGE_OFFSET and
+         * get going from there.
+         */
+        lis     r4,KERNELBASE@h
+        ori     r4,r4,KERNELBASE@l
+        rlwinm  r6,r21,0,4,31                   /* r6 = PHYS_START % 256M */
+        rlwinm  r5,r4,0,4,31                    /* r5 = KERNELBASE % 256M */
+        subf    r3,r5,r6                        /* r3 = r6 - r5 */
+        add     r3,r4,r3                        /* Required Virutal Address */
+
+        bl      relocate
+#endif
+
         bl      init_cpu_state
 
         /*
@@ -88,6 +117,65 @@ _ENTRY(_start);
 
 #ifdef CONFIG_RELOCATABLE
         /*
+         * Relocatable kernel support based on processing of dynamic
+         * relocation entries.
+         *
+         * r25 will contain RPN/ERPN for the start address of memory
+         * r21 will contain the current offset of _stext
+         */
+        lis     r3,kernstart_addr@ha
+        la      r3,kernstart_addr@l(r3)
+
+        /*
+         * Compute the kernstart_addr.
+         * kernstart_addr => (r6,r8)
+         * kernstart_addr & ~0xfffffff => (r6,r7)
+         */
+        rlwinm  r6,r25,0,28,31  /* ERPN. Bits 32-35 of Address */
+        rlwinm  r7,r25,0,0,3    /* RPN - assuming 256 MB page size */
+        rlwinm  r8,r21,0,4,31   /* r8 = (_stext & 0xfffffff) */
+        or      r8,r7,r8        /* Compute the lower 32bit of kernstart_addr */
+
+        /* Store kernstart_addr */
+        stw     r6,0(r3)        /* higher 32bit */
+        stw     r8,4(r3)        /* lower 32bit  */
+
+        /*
+         * Compute the virt_phys_offset :
+         * virt_phys_offset = stext.run - kernstart_addr
+         *
+         * stext.run = (KERNELBASE & ~0xfffffff) + (kernstart_addr & 0xfffffff)
+         * When we relocate, we have :
+         *
+         *      (kernstart_addr & 0xfffffff) = (stext.run & 0xfffffff)
+         *
+         * hence:
+         *  virt_phys_offset = (KERNELBASE & ~0xfffffff) - (kernstart_addr & ~0xfffffff)
+         *
+         */
+
+        /* KERNELBASE&~0xfffffff => (r4,r5) */
+        li      r4, 0           /* higer 32bit */
+        lis     r5,KERNELBASE@h
+        rlwinm  r5,r5,0,0,3     /* Align to 256M, lower 32bit */
+
+        /*
+         * 64bit subtraction.
+         */
+        subfc   r5,r7,r5
+        subfe   r4,r6,r4
+
+        /* Store virt_phys_offset */
+        lis     r3,virt_phys_offset@ha
+        la      r3,virt_phys_offset@l(r3)
+
+        stw     r4,0(r3)
+        stw     r5,4(r3)
+
+#elif defined(CONFIG_DYNAMIC_MEMSTART)
+        /*
+         * Mapping based, page aligned dynamic kernel loading.
+         *
          * r25 will contain RPN/ERPN for the start address of memory
          *
          * Add the difference between KERNELBASE and PAGE_OFFSET to the
@@ -732,6 +820,8 @@ _GLOBAL(init_cpu_state)
         /* We use the PVR to differenciate 44x cores from 476 */
         mfspr   r3,SPRN_PVR
         srwi    r3,r3,16
+        cmplwi  cr0,r3,PVR_476FPE@h
+        beq     head_start_47x
         cmplwi  cr0,r3,PVR_476@h
         beq     head_start_47x
         cmplwi  cr0,r3,PVR_476_ISS@h
@@ -800,12 +890,29 @@ skpinv:	addi	r4,r4,1				/* Increment */
 /*
  * Configure and load pinned entry into TLB slot 63.
  */
+#ifdef CONFIG_NONSTATIC_KERNEL
+        /*
+         * In case of a NONSTATIC_KERNEL we reuse the TLB XLAT
+         * entries of the initial mapping set by the boot loader.
+         * The XLAT entry is stored in r25
+         */
+
+        /* Read the XLAT entry for our current mapping */
+        tlbre   r25,r23,PPC44x_TLB_XLAT
+
+        lis     r3,KERNELBASE@h
+        ori     r3,r3,KERNELBASE@l
+
+        /* Use our current RPN entry */
+        mr      r4,r25
+#else
 
         lis     r3,PAGE_OFFSET@h
         ori     r3,r3,PAGE_OFFSET@l
 
         /* Kernel is at the base of RAM */
         li r4, 0                        /* Load the kernel physical address */
+#endif
 
         /* Load the kernel PID = 0 */
         li      r0,0
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 9f5d210ddf3f..d5d78c4ceef6 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -197,7 +197,7 @@ _ENTRY(__early_start)
 
         bl      early_init
 
-#ifdef CONFIG_RELOCATABLE
+#ifdef CONFIG_DYNAMIC_MEMSTART
         lis     r3,kernstart_addr@ha
         la      r3,kernstart_addr@l(r3)
 #ifdef CONFIG_PHYS_64BIT
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 39a2baa6ad58..7c66ce13da89 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -39,13 +39,23 @@
 #define cpu_should_die()        0
 #endif
 
+unsigned long cpuidle_disable = IDLE_NO_OVERRIDE;
+EXPORT_SYMBOL(cpuidle_disable);
+
 static int __init powersave_off(char *arg)
 {
         ppc_md.power_save = NULL;
+        cpuidle_disable = IDLE_POWERSAVE_OFF;
         return 0;
 }
 __setup("powersave=off", powersave_off);
 
+#if defined(CONFIG_PPC_PSERIES) && defined(CONFIG_TRACEPOINTS)
+static const bool idle_uses_rcu = 1;
+#else
+static const bool idle_uses_rcu;
+#endif
+
 /*
  * The body of the idle task.
  */
@@ -56,7 +66,10 @@ void cpu_idle(void)
 
         set_thread_flag(TIF_POLLING_NRFLAG);
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                if (!idle_uses_rcu)
+                        rcu_idle_enter();
+
                 while (!need_resched() && !cpu_should_die()) {
                         ppc64_runlatch_off();
 
@@ -93,7 +106,9 @@ void cpu_idle(void)
 
                 HMT_medium();
                 ppc64_runlatch_on();
-                tick_nohz_restart_sched_tick();
+                if (!idle_uses_rcu)
+                        rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 if (cpu_should_die())
                         cpu_die();
@@ -102,6 +117,29 @@ void cpu_idle(void)
         }
 }
 
+
+/*
+ * cpu_idle_wait - Used to ensure that all the CPUs come out of the old
+ * idle loop and start using the new idle loop.
+ * Required while changing idle handler on SMP systems.
+ * Caller must have changed idle handler to the new value before the call.
+ * This window may be larger on shared systems.
+ */
+void cpu_idle_wait(void)
+{
+        int cpu;
+        smp_mb();
+
+        /* kick all the CPUs so that they exit out of old idle routine */
+        get_online_cpus();
+        for_each_online_cpu(cpu) {
+                if (cpu != smp_processor_id())
+                        smp_send_reschedule(cpu);
+        }
+        put_online_cpus();
+}
+EXPORT_SYMBOL_GPL(cpu_idle_wait);
+
 int powersave_nap;
 
 #ifdef CONFIG_SYSCTL
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index 3a70845a51c7..fcdff198da4b 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -54,6 +54,7 @@ _GLOBAL(power7_idle)
         li      r0,0
         stb     r0,PACASOFTIRQEN(r13)   /* we'll hard-enable shortly */
         stb     r0,PACAHARDIRQEN(r13)
+        stb     r0,PACA_NAPSTATELOST(r13)
 
         /* Continue saving state */
         SAVE_GPR(2, r1)
@@ -86,6 +87,9 @@ _GLOBAL(power7_wakeup_loss)
         rfid
 
 _GLOBAL(power7_wakeup_noloss)
+        lbz     r0,PACA_NAPSTATELOST(r13)
+        cmpwi   r0,0
+        bne     .power7_wakeup_loss
         ld      r1,PACAR1(r13)
         ld      r4,_MSR(r1)
         ld      r5,_NIP(r1)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 5c3c46948d94..701d4aceb4f4 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -115,6 +115,15 @@ static inline notrace void set_soft_enabled(unsigned long enable)
         : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
 }
 
+static inline notrace void decrementer_check_overflow(void)
+{
+        u64 now = get_tb_or_rtc();
+        u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
+
+        if (now >= *next_tb)
+                set_dec(1);
+}
+
 notrace void arch_local_irq_restore(unsigned long en)
 {
         /*
@@ -164,24 +173,21 @@ notrace void arch_local_irq_restore(unsigned long en)
          */
         local_paca->hard_enabled = en;
 
-#ifndef CONFIG_BOOKE
-        /* On server, re-trigger the decrementer if it went negative since
-         * some processors only trigger on edge transitions of the sign bit.
-         *
-         * BookE has a level sensitive decrementer (latches in TSR) so we
-         * don't need that
+        /*
+         * Trigger the decrementer if we have a pending event. Some processors
+         * only trigger on edge transitions of the sign bit. We might also
+         * have disabled interrupts long enough that the decrementer wrapped
+         * to positive.
          */
-        if ((int)mfspr(SPRN_DEC) < 0)
-                mtspr(SPRN_DEC, 1);
-#endif /* CONFIG_BOOKE */
+        decrementer_check_overflow();
 
         /*
          * Force the delivery of pending soft-disabled interrupts on PS3.
          * Any HV call will have this side effect.
          */
         if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
-                u64 tmp;
-                lv1_get_version_info(&tmp);
+                u64 tmp, tmp2;
+                lv1_get_version_info(&tmp, &tmp2);
         }
 
         __hard_irq_enable();
diff --git a/arch/powerpc/kernel/jump_label.c b/arch/powerpc/kernel/jump_label.c
index 368d158d665d..a1ed8a8c7cb4 100644
--- a/arch/powerpc/kernel/jump_label.c
+++ b/arch/powerpc/kernel/jump_label.c
@@ -11,6 +11,7 @@
 #include <linux/jump_label.h>
 #include <asm/code-patching.h>
 
+#ifdef HAVE_JUMP_LABEL
 void arch_jump_label_transform(struct jump_entry *entry,
                                enum jump_label_type type)
 {
@@ -21,3 +22,4 @@ void arch_jump_label_transform(struct jump_entry *entry,
         else
                 patch_instruction(addr, PPC_INST_NOP);
 }
+#endif
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
index 35f27646c4ff..2985338d0e10 100644
--- a/arch/powerpc/kernel/kvm.c
+++ b/arch/powerpc/kernel/kvm.c
@@ -132,7 +132,6 @@ static void kvm_patch_ins_b(u32 *inst, int addr)
         /* On relocatable kernels interrupts handlers and our code
            can be in different regions, so we don't patch them */
 
-        extern u32 __end_interrupts;
         if ((ulong)inst < (ulong)&__end_interrupts)
                 return;
 #endif
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 84daabe2fcba..578f35f18723 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -783,7 +783,7 @@ static const struct file_operations lparcfg_fops = {
 static int __init lparcfg_init(void)
 {
         struct proc_dir_entry *ent;
-        mode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
+        umode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
 
         /* Allow writing if we have FW_FEATURE_SPLPAR */
         if (firmware_has_feature(FW_FEATURE_SPLPAR) &&
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index 9ce1672afb59..c957b1202bdc 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -107,9 +107,6 @@ void __init reserve_crashkernel(void)
         unsigned long long crash_size, crash_base;
         int ret;
 
-        /* this is necessary because of memblock_phys_mem_size() */
-        memblock_analyze();
-
         /* use common parsing */
         ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
                         &crash_size, &crash_base);
@@ -128,7 +125,7 @@ void __init reserve_crashkernel(void)
 
         crash_size = resource_size(&crashk_res);
 
-#ifndef CONFIG_RELOCATABLE
+#ifndef CONFIG_NONSTATIC_KERNEL
         if (crashk_res.start != KDUMP_KERNELBASE)
                 printk("Crash kernel location must be 0x%x\n",
                                 KDUMP_KERNELBASE);
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index f7d760ab5ca1..7cd07b42ca1a 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -738,7 +738,7 @@ relocate_new_kernel:
         mr      r5, r31
 
         li      r0, 0
-#elif defined(CONFIG_44x)  && !defined(CONFIG_47x)
+#elif defined(CONFIG_44x)  && !defined(CONFIG_PPC_47x)
 
 /*
  * Code for setting up 1:1 mapping for PPC440x for KEXEC
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 458ed3bee663..fa4a573d6716 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -214,7 +214,7 @@ char __devinit *pcibios_setup(char *str)
  * If the interrupt is used, then gets the interrupt line from the
  * openfirmware and sets it in the pci_dev and pci_config line.
  */
-int pci_read_irq_line(struct pci_dev *pci_dev)
+static int pci_read_irq_line(struct pci_dev *pci_dev)
 {
         struct of_irq oirq;
         unsigned int virq;
@@ -283,7 +283,6 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
 
         return 0;
 }
-EXPORT_SYMBOL(pci_read_irq_line);
 
 /*
  * Platform support for /proc/bus/pci/X/Y mmap()s,
@@ -921,18 +920,22 @@ static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
                 struct resource *res = dev->resource + i;
                 if (!res->flags)
                         continue;
-                /* On platforms that have PCI_PROBE_ONLY set, we don't
-                 * consider 0 as an unassigned BAR value. It's technically
-                 * a valid value, but linux doesn't like it... so when we can
-                 * re-assign things, we do so, but if we can't, we keep it
-                 * around and hope for the best...
+
+                /* If we're going to re-assign everything, we mark all resources
+                 * as unset (and 0-base them). In addition, we mark BARs starting
+                 * at 0 as unset as well, except if PCI_PROBE_ONLY is also set
+                 * since in that case, we don't want to re-assign anything
                  */
-                if (res->start == 0 && !pci_has_flag(PCI_PROBE_ONLY)) {
-                        pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] is unassigned\n",
-                                 pci_name(dev), i,
-                                 (unsigned long long)res->start,
-                                 (unsigned long long)res->end,
-                                 (unsigned int)res->flags);
+                if (pci_has_flag(PCI_REASSIGN_ALL_RSRC) ||
+                    (res->start == 0 && !pci_has_flag(PCI_PROBE_ONLY))) {
+                        /* Only print message if not re-assigning */
+                        if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC))
+                                pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] "
+                                         "is unassigned\n",
+                                         pci_name(dev), i,
+                                         (unsigned long long)res->start,
+                                         (unsigned long long)res->end,
+                                         (unsigned int)res->flags);
                         res->end -= res->start;
                         res->start = 0;
                         res->flags |= IORESOURCE_UNSET;
@@ -1042,6 +1045,16 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
                 if (i >= 3 && bus->self->transparent)
                         continue;
 
+                /* If we are going to re-assign everything, mark the resource
+                 * as unset and move it down to 0
+                 */
+                if (pci_has_flag(PCI_REASSIGN_ALL_RSRC)) {
+                        res->flags |= IORESOURCE_UNSET;
+                        res->end -= res->start;
+                        res->start = 0;
+                        continue;
+                }
+
                 pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n",
                          pci_name(dev), i,
                          (unsigned long long)res->start,\
@@ -1262,18 +1275,15 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
         pci_bus_for_each_resource(bus, res, i) {
                 if (!res || !res->flags || res->start > res->end || res->parent)
                         continue;
+
+                /* If the resource was left unset at this point, we clear it */
+                if (res->flags & IORESOURCE_UNSET)
+                        goto clear_resource;
+
                 if (bus->parent == NULL)
                         pr = (res->flags & IORESOURCE_IO) ?
                                 &ioport_resource : &iomem_resource;
                 else {
-                        /* Don't bother with non-root busses when
-                         * re-assigning all resources. We clear the
-                         * resource flags as if they were colliding
-                         * and as such ensure proper re-allocation
-                         * later.
-                         */
-                        if (pci_has_flag(PCI_REASSIGN_ALL_RSRC))
-                                goto clear_resource;
                         pr = pci_find_parent_resource(bus->self, res);
                         if (pr == res) {
                                 /* this happens when the generic PCI
@@ -1304,9 +1314,9 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
                         if (reparent_resources(pr, res) == 0)
                                 continue;
                 }
-                printk(KERN_WARNING "PCI: Cannot allocate resource region "
-                       "%d of PCI bridge %d, will remap\n", i, bus->number);
-clear_resource:
+                pr_warning("PCI: Cannot allocate resource region "
+                           "%d of PCI bridge %d, will remap\n", i, bus->number);
+        clear_resource:
                 res->start = res->end = 0;
                 res->flags = 0;
         }
@@ -1451,16 +1461,11 @@ void __init pcibios_resource_survey(void)
 {
         struct pci_bus *b;
 
-        /* Allocate and assign resources. If we re-assign everything, then
-         * we skip the allocate phase
-         */
+        /* Allocate and assign resources */
         list_for_each_entry(b, &pci_root_buses, node)
                 pcibios_allocate_bus_resources(b);
-
-        if (!pci_has_flag(PCI_REASSIGN_ALL_RSRC)) {
-                pcibios_allocate_resources(0);
-                pcibios_allocate_resources(1);
-        }
+        pcibios_allocate_resources(0);
+        pcibios_allocate_resources(1);
 
         /* Before we start assigning unassigned resource, we try to reserve
          * the low IO area and the VGA memory area if they intersect the
@@ -1732,6 +1737,12 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
         if (mode == PCI_PROBE_NORMAL)
                 hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
 
+        /* Platform gets a chance to do some global fixups before
+         * we proceed to resource allocation
+         */
+        if (ppc_md.pcibios_fixup_phb)
+                ppc_md.pcibios_fixup_phb(hose);
+
         /* Configure PCI Express settings */
         if (bus && !pci_has_flag(PCI_PROBE_ONLY)) {
                 struct pci_bus *child;
@@ -1747,10 +1758,13 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
 static void fixup_hide_host_resource_fsl(struct pci_dev *dev)
 {
         int i, class = dev->class >> 8;
+        /* When configured as agent, programing interface = 1 */
+        int prog_if = dev->class & 0xf;
 
         if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
              class == PCI_CLASS_BRIDGE_OTHER) &&
                 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
+                (prog_if == 0) &&
                 (dev->bus->parent == NULL)) {
                 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
                         dev->resource[i].start = 0;
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index 4e69deb89b37..dd9e4a04bf79 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -50,6 +50,9 @@ void * __devinit update_dn_pci_info(struct device_node *dn, void *data)
         dn->data = pdn;
         pdn->node = dn;
         pdn->phb = phb;
+#ifdef CONFIG_PPC_POWERNV
+        pdn->pe_number = IODA_INVALID_PE;
+#endif
         regs = of_get_property(dn, "reg", NULL);
         if (regs) {
                 /* First register entry is addr (00BBSS00)  */
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 9054ca9ab4f9..ebe5766781aa 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -486,28 +486,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
         new_thread = &new->thread;
         old_thread = &current->thread;
 
-#if defined(CONFIG_PPC_BOOK3E_64)
-        /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
-         * we always hold the user values, so we set it now.
-         *
-         * However, we ensure the kernel MSR:DE is appropriately cleared too
-         * to avoid spurrious single step exceptions in the kernel.
-         *
-         * This will have to change to merge with the ppc32 code at some point,
-         * but I don't like much what ppc32 is doing today so there's some
-         * thinking needed there
-         */
-        if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
-                u32 dbcr0;
-
-                mtmsr(mfmsr() & ~MSR_DE);
-                isync();
-                dbcr0 = mfspr(SPRN_DBCR0);
-                dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
-                mtspr(SPRN_DBCR0, dbcr0);
-        }
-#endif /* CONFIG_PPC64_BOOK3E */
-
 #ifdef CONFIG_PPC64
         /*
          * Collect processor utilization data per process
@@ -606,16 +584,32 @@ static struct regbit {
         unsigned long bit;
         const char *name;
 } msr_bits[] = {
+#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
+        {MSR_SF,        "SF"},
+        {MSR_HV,        "HV"},
+#endif
+        {MSR_VEC,       "VEC"},
+        {MSR_VSX,       "VSX"},
+#ifdef CONFIG_BOOKE
+        {MSR_CE,        "CE"},
+#endif
         {MSR_EE,        "EE"},
         {MSR_PR,        "PR"},
         {MSR_FP,        "FP"},
-        {MSR_VEC,       "VEC"},
-        {MSR_VSX,       "VSX"},
         {MSR_ME,        "ME"},
-        {MSR_CE,        "CE"},
+#ifdef CONFIG_BOOKE
         {MSR_DE,        "DE"},
+#else
+        {MSR_SE,        "SE"},
+        {MSR_BE,        "BE"},
+#endif
         {MSR_IR,        "IR"},
         {MSR_DR,        "DR"},
+        {MSR_PMM,       "PMM"},
+#ifndef CONFIG_BOOKE
+        {MSR_RI,        "RI"},
+        {MSR_LE,        "LE"},
+#endif
         {0,             NULL}
 };
 
@@ -657,7 +651,7 @@ void show_regs(struct pt_regs * regs)
         if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
                 printk("CFAR: "REG"\n", regs->orig_gpr3);
         if (trap == 0x300 || trap == 0x600)
-#ifdef CONFIG_PPC_ADV_DEBUG_REGS
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
                 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
 #else
                 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index fa1235b0503b..abe405dab34d 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -733,8 +733,6 @@ void __init early_init_devtree(void *params)
         of_scan_flat_dt(early_init_dt_scan_chosen_ppc, cmd_line);
 
         /* Scan memory nodes and rebuild MEMBLOCKs */
-        memblock_init();
-
         of_scan_flat_dt(early_init_dt_scan_root, NULL);
         of_scan_flat_dt(early_init_dt_scan_memory_ppc, NULL);
 
@@ -756,20 +754,14 @@ void __init early_init_devtree(void *params)
         early_reserve_mem();
         phyp_dump_reserve_mem();
 
-        limit = memory_limit;
-        if (! limit) {
-                phys_addr_t memsize;
-
-                /* Ensure that total memory size is page-aligned, because
-                 * otherwise mark_bootmem() gets upset. */
-                memblock_analyze();
-                memsize = memblock_phys_mem_size();
-                if ((memsize & PAGE_MASK) != memsize)
-                        limit = memsize & PAGE_MASK;
-        }
+        /*
+         * Ensure that total memory size is page-aligned, because otherwise
+         * mark_bootmem() gets upset.
+         */
+        limit = ALIGN(memory_limit ?: memblock_phys_mem_size(), PAGE_SIZE);
         memblock_enforce_memory_limit(limit);
 
-        memblock_analyze();
+        memblock_allow_resize();
         memblock_dump_all();
 
         DBG("Phys. mem: %llx\n", memblock_phys_mem_size());
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index b4fa66127495..eca626ea3f23 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -742,7 +742,7 @@ static unsigned char ibm_architecture_vec[] = {
         W(0xffffffff),                  /* virt_base */
         W(0xffffffff),                  /* virt_size */
         W(0xffffffff),                  /* load_base */
-        W(64),                          /* 64MB min RMA */
+        W(256),                         /* 256MB min RMA */
         W(0xffffffff),                  /* full client load */
         0,                              /* min RMA percentage of total RAM */
         48,                             /* max log_2(hash table size) */
@@ -1224,14 +1224,6 @@ static void __init prom_init_mem(void)
 
         RELOC(alloc_bottom) = PAGE_ALIGN((unsigned long)&RELOC(_end) + 0x4000);
 
-        /* Check if we have an initrd after the kernel, if we do move our bottom
-         * point to after it
-         */
-        if (RELOC(prom_initrd_start)) {
-                if (RELOC(prom_initrd_end) > RELOC(alloc_bottom))
-                        RELOC(alloc_bottom) = PAGE_ALIGN(RELOC(prom_initrd_end));
-        }
-
         /*
          * If prom_memory_limit is set we reduce the upper limits *except* for
          * alloc_top_high. This must be the real top of RAM so we can put
@@ -1269,6 +1261,15 @@ static void __init prom_init_mem(void)
         RELOC(alloc_top) = RELOC(rmo_top);
         RELOC(alloc_top_high) = RELOC(ram_top);
 
+        /*
+         * Check if we have an initrd after the kernel but still inside
+         * the RMO.  If we do move our bottom point to after it.
+         */
+        if (RELOC(prom_initrd_start) &&
+            RELOC(prom_initrd_start) < RELOC(rmo_top) &&
+            RELOC(prom_initrd_end) > RELOC(alloc_bottom))
+                RELOC(alloc_bottom) = PAGE_ALIGN(RELOC(prom_initrd_end));
+
         prom_printf("memory layout at init:\n");
         prom_printf("  memory_limit : %x (16 MB aligned)\n", RELOC(prom_memory_limit));
         prom_printf("  alloc_bottom : %x\n", RELOC(alloc_bottom));
@@ -1579,10 +1580,8 @@ static void __init prom_instantiate_rtas(void)
                 return;
 
         base = alloc_down(size, PAGE_SIZE, 0);
-        if (base == 0) {
-                prom_printf("RTAS allocation failed !\n");
-                return;
-        }
+        if (base == 0)
+                prom_panic("Could not allocate memory for RTAS\n");
 
         rtas_inst = call_prom("open", 1, 1, ADDR("/rtas"));
         if (!IHANDLE_VALID(rtas_inst)) {
@@ -2081,7 +2080,7 @@ static void __init prom_check_displays(void)
                 /* Setup a usable color table when the appropriate
                  * method is available. Should update this to set-colors */
                 clut = RELOC(default_colors);
-                for (i = 0; i < 32; i++, clut += 3)
+                for (i = 0; i < 16; i++, clut += 3)
                         if (prom_set_color(ih, i, clut[0], clut[1],
                                            clut[2]) != 0)
                                 break;
@@ -2846,7 +2845,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
         RELOC(of_platform) = prom_find_machine_type();
         prom_printf("Detected machine type: %x\n", RELOC(of_platform));
 
-#ifndef CONFIG_RELOCATABLE
+#ifndef CONFIG_NONSTATIC_KERNEL
         /* Bail if this is a kdump kernel. */
         if (PHYSICAL_START > 0)
                 prom_panic("Error: You can't boot a kdump kernel from OF!\n");
@@ -2971,9 +2970,11 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
         /*
          * in case stdin is USB and still active on IBM machines...
          * Unfortunately quiesce crashes on some powermacs if we have
-         * closed stdin already (in particular the powerbook 101).
+         * closed stdin already (in particular the powerbook 101). It
+         * appears that the OPAL version of OFW doesn't like it either.
          */
-        if (RELOC(of_platform) != PLATFORM_POWERMAC)
+        if (RELOC(of_platform) != PLATFORM_POWERMAC &&
+            RELOC(of_platform) != PLATFORM_OPAL)
                 prom_close_stdin();
 
         /*
@@ -2989,8 +2990,12 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
          * is common to us and kexec
          */
         hdr = RELOC(dt_header_start);
-        prom_printf("returning from prom_init\n");
-        prom_debug("->dt_header_start=0x%x\n", hdr);
+
+        /* Don't print anything after quiesce under OPAL, it crashes OFW */
+        if (RELOC(of_platform) != PLATFORM_OPAL) {
+                prom_printf("returning from prom_init\n");
+                prom_debug("->dt_header_start=0x%x\n", hdr);
+        }
 
 #ifdef CONFIG_PPC32
         reloc_got2(-offset);
diff --git a/arch/powerpc/kernel/reloc_32.S b/arch/powerpc/kernel/reloc_32.S
new file mode 100644
index 000000000000..ef46ba6e094f
--- /dev/null
+++ b/arch/powerpc/kernel/reloc_32.S
@@ -0,0 +1,208 @@
+/*
+ * Code to process dynamic relocations for PPC32.
+ *
+ * Copyrights (C) IBM Corporation, 2011.
+ *      Author: Suzuki Poulose <suzuki@in.ibm.com>
+ *
+ *  - Based on ppc64 code - reloc_64.S
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/ppc_asm.h>
+
+/* Dynamic section table entry tags */
+DT_RELA = 7                     /* Tag for Elf32_Rela section */
+DT_RELASZ = 8                   /* Size of the Rela relocs */
+DT_RELAENT = 9                  /* Size of one Rela reloc entry */
+
+STN_UNDEF = 0                   /* Undefined symbol index */
+STB_LOCAL = 0                   /* Local binding for the symbol */
+
+R_PPC_ADDR16_LO = 4             /* Lower half of (S+A) */
+R_PPC_ADDR16_HI = 5             /* Upper half of (S+A) */
+R_PPC_ADDR16_HA = 6             /* High Adjusted (S+A) */
+R_PPC_RELATIVE = 22
+
+/*
+ * r3 = desired final address
+ */
+
+_GLOBAL(relocate)
+
+        mflr    r0              /* Save our LR */
+        bl      0f              /* Find our current runtime address */
+0:      mflr    r12             /* Make it accessible */
+        mtlr    r0
+
+        lwz     r11, (p_dyn - 0b)(r12)
+        add     r11, r11, r12   /* runtime address of .dynamic section */
+        lwz     r9, (p_rela - 0b)(r12)
+        add     r9, r9, r12     /* runtime address of .rela.dyn section */
+        lwz     r10, (p_st - 0b)(r12)
+        add     r10, r10, r12   /* runtime address of _stext section */
+        lwz     r13, (p_sym - 0b)(r12)
+        add     r13, r13, r12   /* runtime address of .dynsym section */
+
+        /*
+         * Scan the dynamic section for RELA, RELASZ entries
+         */
+        li      r6, 0
+        li      r7, 0
+        li      r8, 0
+1:      lwz     r5, 0(r11)      /* ELF_Dyn.d_tag */
+        cmpwi   r5, 0           /* End of ELF_Dyn[] */
+        beq     eodyn
+        cmpwi   r5, DT_RELA
+        bne     relasz
+        lwz     r7, 4(r11)      /* r7 = rela.link */
+        b       skip
+relasz:
+        cmpwi   r5, DT_RELASZ
+        bne     relaent
+        lwz     r8, 4(r11)      /* r8 = Total Rela relocs size */
+        b       skip
+relaent:
+        cmpwi   r5, DT_RELAENT
+        bne     skip
+        lwz     r6, 4(r11)      /* r6 = Size of one Rela reloc */
+skip:
+        addi    r11, r11, 8
+        b       1b
+eodyn:                          /* End of Dyn Table scan */
+
+        /* Check if we have found all the entries */
+        cmpwi   r7, 0
+        beq     done
+        cmpwi   r8, 0
+        beq     done
+        cmpwi   r6, 0
+        beq     done
+
+
+        /*
+         * Work out the current offset from the link time address of .rela
+         * section.
+         *  cur_offset[r7] = rela.run[r9] - rela.link [r7]
+         *  _stext.link[r12] = _stext.run[r10] - cur_offset[r7]
+         *  final_offset[r3] = _stext.final[r3] - _stext.link[r12]
+         */
+        subf    r7, r7, r9      /* cur_offset */
+        subf    r12, r7, r10
+        subf    r3, r12, r3     /* final_offset */
+
+        subf    r8, r6, r8      /* relaz -= relaent */
+        /*
+         * Scan through the .rela table and process each entry
+         * r9   - points to the current .rela table entry
+         * r13  - points to the symbol table
+         */
+
+        /*
+         * Check if we have a relocation based on symbol
+         * r5 will hold the value of the symbol.
+         */
+applyrela:
+        lwz     r4, 4(r9)               /* r4 = rela.r_info */
+        srwi    r5, r4, 8               /* ELF32_R_SYM(r_info) */
+        cmpwi   r5, STN_UNDEF   /* sym == STN_UNDEF ? */
+        beq     get_type        /* value = 0 */
+        /* Find the value of the symbol at index(r5) */
+        slwi    r5, r5, 4               /* r5 = r5 * sizeof(Elf32_Sym) */
+        add     r12, r13, r5    /* r12 = &__dyn_sym[Index] */
+
+        /*
+         * GNU ld has a bug, where dynamic relocs based on
+         * STB_LOCAL symbols, the value should be assumed
+         * to be zero. - Alan Modra
+         */
+        /* XXX: Do we need to check if we are using GNU ld ? */
+        lbz     r5, 12(r12)     /* r5 = dyn_sym[Index].st_info */
+        extrwi  r5, r5, 4, 24   /* r5 = ELF32_ST_BIND(r5) */
+        cmpwi   r5, STB_LOCAL   /* st_value = 0, ld bug */
+        beq     get_type        /* We have r5 = 0 */
+        lwz     r5, 4(r12)      /* r5 = __dyn_sym[Index].st_value */
+
+get_type:
+        /* Load the relocation type to r4 */
+        extrwi  r4, r4, 8, 24   /* r4 = ELF32_R_TYPE(r_info) = ((char*)r4)[3] */
+
+        /* R_PPC_RELATIVE */
+        cmpwi   r4, R_PPC_RELATIVE
+        bne     hi16
+        lwz     r4, 0(r9)       /* r_offset */
+        lwz     r0, 8(r9)       /* r_addend */
+        add     r0, r0, r3      /* final addend */
+        stwx    r0, r4, r7      /* memory[r4+r7]) = (u32)r0 */
+        b       nxtrela         /* continue */
+
+        /* R_PPC_ADDR16_HI */
+hi16:
+        cmpwi   r4, R_PPC_ADDR16_HI
+        bne     ha16
+        lwz     r4, 0(r9)       /* r_offset */
+        lwz     r0, 8(r9)       /* r_addend */
+        add     r0, r0, r3
+        add     r0, r0, r5      /* r0 = (S+A+Offset) */
+        extrwi  r0, r0, 16, 0   /* r0 = (r0 >> 16) */
+        b       store_half
+
+        /* R_PPC_ADDR16_HA */
+ha16:
+        cmpwi   r4, R_PPC_ADDR16_HA
+        bne     lo16
+        lwz     r4, 0(r9)       /* r_offset */
+        lwz     r0, 8(r9)       /* r_addend */
+        add     r0, r0, r3
+        add     r0, r0, r5      /* r0 = (S+A+Offset) */
+        extrwi  r5, r0, 1, 16   /* Extract bit 16 */
+        extrwi  r0, r0, 16, 0   /* r0 = (r0 >> 16) */
+        add     r0, r0, r5      /* Add it to r0 */
+        b       store_half
+
+        /* R_PPC_ADDR16_LO */
+lo16:
+        cmpwi   r4, R_PPC_ADDR16_LO
+        bne     nxtrela
+        lwz     r4, 0(r9)       /* r_offset */
+        lwz     r0, 8(r9)       /* r_addend */
+        add     r0, r0, r3
+        add     r0, r0, r5      /* r0 = (S+A+Offset) */
+        extrwi  r0, r0, 16, 16  /* r0 &= 0xffff */
+        /* Fall through to */
+
+        /* Store half word */
+store_half:
+        sthx    r0, r4, r7      /* memory[r4+r7] = (u16)r0 */
+
+nxtrela:
+        /*
+         * We have to flush the modified instructions to the
+         * main storage from the d-cache. And also, invalidate the
+         * cached instructions in i-cache which has been modified.
+         *
+         * We delay the sync / isync operation till the end, since
+         * we won't be executing the modified instructions until
+         * we return from here.
+         */
+        dcbst   r4,r7
+        sync                    /* Ensure the data is flushed before icbi */
+        icbi    r4,r7
+        cmpwi   r8, 0           /* relasz = 0 ? */
+        ble     done
+        add     r9, r9, r6      /* move to next entry in the .rela table */
+        subf    r8, r6, r8      /* relasz -= relaent */
+        b       applyrela
+
+done:
+        sync                    /* Wait for the flush to finish */
+        isync                   /* Discard prefetched instructions */
+        blr
+
+p_dyn:          .long   __dynamic_start - 0b
+p_rela:         .long   __rela_dyn_start - 0b
+p_sym:          .long   __dynamic_symtab - 0b
+p_st:           .long   _stext - 0b
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index e037c7494fd8..4174b4b23246 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -568,6 +568,12 @@ static void rtas_flash_firmware(int reboot_type)
         }
 
         /*
+         * Just before starting the firmware flash, cancel the event scan work
+         * to avoid any soft lockup issues.
+         */
+        rtas_cancel_event_scan();
+
+        /*
          * NOTE: the "first" block must be under 4GB, so we create
          * an entry with no data blocks in the reserved buffer in
          * the kernel data segment.
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 481ef064c8f1..1045ff49cc6d 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -472,6 +472,13 @@ static void start_event_scan(void)
                                  &event_scan_work, event_scan_delay);
 }
 
+/* Cancel the rtas event scan work */
+void rtas_cancel_event_scan(void)
+{
+        cancel_delayed_work_sync(&event_scan_work);
+}
+EXPORT_SYMBOL_GPL(rtas_cancel_event_scan);
+
 static int __init rtas_init(void)
 {
         struct proc_dir_entry *entry;
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index c1ce86357ecb..ac7610815113 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -107,6 +107,8 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
                          PTRRELOC(&__start___lwsync_fixup),
                          PTRRELOC(&__stop___lwsync_fixup));
 
+        do_final_fixups();
+
         return KERNELBASE + offset;
 }
 
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 1a9dea80a69b..4cb8f1e9d044 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -35,6 +35,8 @@
 #include <linux/pci.h>
 #include <linux/lockdep.h>
 #include <linux/memblock.h>
+#include <linux/hugetlb.h>
+
 #include <asm/io.h>
 #include <asm/kdump.h>
 #include <asm/prom.h>
@@ -64,6 +66,7 @@
 #include <asm/mmu_context.h>
 #include <asm/code-patching.h>
 #include <asm/kvm_ppc.h>
+#include <asm/hugetlb.h>
 
 #include "setup.h"
 
@@ -217,6 +220,13 @@ void __init early_setup(unsigned long dt_ptr)
         /* Initialize the hash table or TLB handling */
         early_init_mmu();
 
+        /*
+         * Reserve any gigantic pages requested on the command line.
+         * memblock needs to have been initialized by the time this is
+         * called since this will reserve memory.
+         */
+        reserve_hugetlb_gpages();
+
         DBG(" <- early_setup()\n");
 }
 
@@ -359,6 +369,7 @@ void __init setup_system(void)
                           &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
         do_lwsync_fixups(cur_cpu_spec->cpu_features,
                          &__start___lwsync_fixup, &__stop___lwsync_fixup);
+        do_final_fixups();
 
         /*
          * Unflatten the device-tree passed by prom_init or kexec
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 78b76dc54dfb..836a5a19eb2c 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -97,7 +97,7 @@ static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
         compat_sigset_t cset;
 
         switch (_NSIG_WORDS) {
-        case 4: cset.sig[5] = set->sig[3] & 0xffffffffull;
+        case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
                 cset.sig[7] = set->sig[3] >> 32;
         case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
                 cset.sig[5] = set->sig[2] >> 32;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 6df70907d60a..46695febc09f 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -27,7 +27,7 @@
 #include <linux/spinlock.h>
 #include <linux/cache.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/notifier.h>
 #include <linux/topology.h>
@@ -187,7 +187,8 @@ int smp_request_message_ipi(int virq, int msg)
                 return 1;
         }
 #endif
-        err = request_irq(virq, smp_ipi_action[msg], IRQF_PERCPU,
+        err = request_irq(virq, smp_ipi_action[msg],
+                          IRQF_PERCPU | IRQF_NO_THREAD,
                           smp_ipi_name[msg], 0);
         WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
                 virq, smp_ipi_name[msg], err);
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index ce035c1905f0..883e74c0d1b3 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -1,4 +1,4 @@
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/smp.h>
 #include <linux/percpu.h>
@@ -18,6 +18,7 @@
 #include <asm/machdep.h>
 #include <asm/smp.h>
 #include <asm/pmc.h>
+#include <asm/system.h>
 
 #include "cacheinfo.h"
 
@@ -37,12 +38,12 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
 /* Time in microseconds we delay before sleeping in the idle loop */
 DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
 
-static ssize_t store_smt_snooze_delay(struct sys_device *dev,
-                                      struct sysdev_attribute *attr,
+static ssize_t store_smt_snooze_delay(struct device *dev,
+                                      struct device_attribute *attr,
                                       const char *buf,
                                       size_t count)
 {
-        struct cpu *cpu = container_of(dev, struct cpu, sysdev);
+        struct cpu *cpu = container_of(dev, struct cpu, dev);
         ssize_t ret;
         long snooze;
 
@@ -50,21 +51,22 @@ static ssize_t store_smt_snooze_delay(struct sys_device *dev,
         if (ret != 1)
                 return -EINVAL;
 
-        per_cpu(smt_snooze_delay, cpu->sysdev.id) = snooze;
+        per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
+        update_smt_snooze_delay(snooze);
 
         return count;
 }
 
-static ssize_t show_smt_snooze_delay(struct sys_device *dev,
-                                     struct sysdev_attribute *attr,
+static ssize_t show_smt_snooze_delay(struct device *dev,
+                                     struct device_attribute *attr,
                                      char *buf)
 {
-        struct cpu *cpu = container_of(dev, struct cpu, sysdev);
+        struct cpu *cpu = container_of(dev, struct cpu, dev);
 
-        return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->sysdev.id));
+        return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
 }
 
-static SYSDEV_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
+static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
                    store_smt_snooze_delay);
 
 static int __init setup_smt_snooze_delay(char *str)
@@ -117,25 +119,25 @@ static void write_##NAME(void *val) \
         ppc_enable_pmcs(); \
         mtspr(ADDRESS, *(unsigned long *)val);  \
 } \
-static ssize_t show_##NAME(struct sys_device *dev, \
-                        struct sysdev_attribute *attr, \
+static ssize_t show_##NAME(struct device *dev, \
+                        struct device_attribute *attr, \
                         char *buf) \
 { \
-        struct cpu *cpu = container_of(dev, struct cpu, sysdev); \
+        struct cpu *cpu = container_of(dev, struct cpu, dev); \
         unsigned long val; \
-        smp_call_function_single(cpu->sysdev.id, read_##NAME, &val, 1); \
+        smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1);    \
         return sprintf(buf, "%lx\n", val); \
 } \
 static ssize_t __used \
-        store_##NAME(struct sys_device *dev, struct sysdev_attribute *attr, \
+        store_##NAME(struct device *dev, struct device_attribute *attr, \
                         const char *buf, size_t count) \
 { \
-        struct cpu *cpu = container_of(dev, struct cpu, sysdev); \
+        struct cpu *cpu = container_of(dev, struct cpu, dev); \
         unsigned long val; \
         int ret = sscanf(buf, "%lx", &val); \
         if (ret != 1) \
                 return -EINVAL; \
-        smp_call_function_single(cpu->sysdev.id, write_##NAME, &val, 1); \
+        smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
         return count; \
 }
 
@@ -177,23 +179,25 @@ SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
 SYSFS_PMCSETUP(purr, SPRN_PURR);
 SYSFS_PMCSETUP(spurr, SPRN_SPURR);
 SYSFS_PMCSETUP(dscr, SPRN_DSCR);
+SYSFS_PMCSETUP(pir, SPRN_PIR);
 
-static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
-static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
-static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
-static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
+static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
+static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
+static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
+static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
+static DEVICE_ATTR(pir, 0400, show_pir, NULL);
 
 unsigned long dscr_default = 0;
 EXPORT_SYMBOL(dscr_default);
 
-static ssize_t show_dscr_default(struct sysdev_class *class,
-                struct sysdev_class_attribute *attr, char *buf)
+static ssize_t show_dscr_default(struct device *dev,
+                struct device_attribute *attr, char *buf)
 {
         return sprintf(buf, "%lx\n", dscr_default);
 }
 
-static ssize_t __used store_dscr_default(struct sysdev_class *class,
-                struct sysdev_class_attribute *attr, const char *buf,
+static ssize_t __used store_dscr_default(struct device *dev,
+                struct device_attribute *attr, const char *buf,
                 size_t count)
 {
         unsigned long val;
@@ -207,15 +211,14 @@ static ssize_t __used store_dscr_default(struct sysdev_class *class,
         return count;
 }
 
-static SYSDEV_CLASS_ATTR(dscr_default, 0600,
+static DEVICE_ATTR(dscr_default, 0600,
                 show_dscr_default, store_dscr_default);
 
 static void sysfs_create_dscr_default(void)
 {
         int err = 0;
         if (cpu_has_feature(CPU_FTR_DSCR))
-                err = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
-                        &attr_dscr_default.attr);
+                err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
 }
 #endif /* CONFIG_PPC64 */
 
@@ -259,72 +262,72 @@ SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
 #endif /* HAS_PPC_PMC_PA6T */
 
 #ifdef HAS_PPC_PMC_IBM
-static struct sysdev_attribute ibm_common_attrs[] = {
-        _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
-        _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
+static struct device_attribute ibm_common_attrs[] = {
+        __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
+        __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
 };
 #endif /* HAS_PPC_PMC_G4 */
 
 #ifdef HAS_PPC_PMC_G4
-static struct sysdev_attribute g4_common_attrs[] = {
-        _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
-        _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
-        _SYSDEV_ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
+static struct device_attribute g4_common_attrs[] = {
+        __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
+        __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
+        __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
 };
 #endif /* HAS_PPC_PMC_G4 */
 
-static struct sysdev_attribute classic_pmc_attrs[] = {
-        _SYSDEV_ATTR(pmc1, 0600, show_pmc1, store_pmc1),
-        _SYSDEV_ATTR(pmc2, 0600, show_pmc2, store_pmc2),
-        _SYSDEV_ATTR(pmc3, 0600, show_pmc3, store_pmc3),
-        _SYSDEV_ATTR(pmc4, 0600, show_pmc4, store_pmc4),
-        _SYSDEV_ATTR(pmc5, 0600, show_pmc5, store_pmc5),
-        _SYSDEV_ATTR(pmc6, 0600, show_pmc6, store_pmc6),
+static struct device_attribute classic_pmc_attrs[] = {
+        __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
+        __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
+        __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
+        __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
+        __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
+        __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
 #ifdef CONFIG_PPC64
-        _SYSDEV_ATTR(pmc7, 0600, show_pmc7, store_pmc7),
-        _SYSDEV_ATTR(pmc8, 0600, show_pmc8, store_pmc8),
+        __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
+        __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
 #endif
 };
 
 #ifdef HAS_PPC_PMC_PA6T
-static struct sysdev_attribute pa6t_attrs[] = {
-        _SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
-        _SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
-        _SYSDEV_ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
-        _SYSDEV_ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
-        _SYSDEV_ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
-        _SYSDEV_ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
-        _SYSDEV_ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
-        _SYSDEV_ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
+static struct device_attribute pa6t_attrs[] = {
+        __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
+        __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
+        __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
+        __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
+        __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
+        __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
+        __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
+        __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
 #ifdef CONFIG_DEBUG_KERNEL
-        _SYSDEV_ATTR(hid0, 0600, show_hid0, store_hid0),
-        _SYSDEV_ATTR(hid1, 0600, show_hid1, store_hid1),
-        _SYSDEV_ATTR(hid4, 0600, show_hid4, store_hid4),
-        _SYSDEV_ATTR(hid5, 0600, show_hid5, store_hid5),
-        _SYSDEV_ATTR(ima0, 0600, show_ima0, store_ima0),
-        _SYSDEV_ATTR(ima1, 0600, show_ima1, store_ima1),
-        _SYSDEV_ATTR(ima2, 0600, show_ima2, store_ima2),
-        _SYSDEV_ATTR(ima3, 0600, show_ima3, store_ima3),
-        _SYSDEV_ATTR(ima4, 0600, show_ima4, store_ima4),
-        _SYSDEV_ATTR(ima5, 0600, show_ima5, store_ima5),
-        _SYSDEV_ATTR(ima6, 0600, show_ima6, store_ima6),
-        _SYSDEV_ATTR(ima7, 0600, show_ima7, store_ima7),
-        _SYSDEV_ATTR(ima8, 0600, show_ima8, store_ima8),
-        _SYSDEV_ATTR(ima9, 0600, show_ima9, store_ima9),
-        _SYSDEV_ATTR(imaat, 0600, show_imaat, store_imaat),
-        _SYSDEV_ATTR(btcr, 0600, show_btcr, store_btcr),
-        _SYSDEV_ATTR(pccr, 0600, show_pccr, store_pccr),
-        _SYSDEV_ATTR(rpccr, 0600, show_rpccr, store_rpccr),
-        _SYSDEV_ATTR(der, 0600, show_der, store_der),
-        _SYSDEV_ATTR(mer, 0600, show_mer, store_mer),
-        _SYSDEV_ATTR(ber, 0600, show_ber, store_ber),
-        _SYSDEV_ATTR(ier, 0600, show_ier, store_ier),
-        _SYSDEV_ATTR(sier, 0600, show_sier, store_sier),
-        _SYSDEV_ATTR(siar, 0600, show_siar, store_siar),
-        _SYSDEV_ATTR(tsr0, 0600, show_tsr0, store_tsr0),
-        _SYSDEV_ATTR(tsr1, 0600, show_tsr1, store_tsr1),
-        _SYSDEV_ATTR(tsr2, 0600, show_tsr2, store_tsr2),
-        _SYSDEV_ATTR(tsr3, 0600, show_tsr3, store_tsr3),
+        __ATTR(hid0, 0600, show_hid0, store_hid0),
+        __ATTR(hid1, 0600, show_hid1, store_hid1),
+        __ATTR(hid4, 0600, show_hid4, store_hid4),
+        __ATTR(hid5, 0600, show_hid5, store_hid5),
+        __ATTR(ima0, 0600, show_ima0, store_ima0),
+        __ATTR(ima1, 0600, show_ima1, store_ima1),
+        __ATTR(ima2, 0600, show_ima2, store_ima2),
+        __ATTR(ima3, 0600, show_ima3, store_ima3),
+        __ATTR(ima4, 0600, show_ima4, store_ima4),
+        __ATTR(ima5, 0600, show_ima5, store_ima5),
+        __ATTR(ima6, 0600, show_ima6, store_ima6),
+        __ATTR(ima7, 0600, show_ima7, store_ima7),
+        __ATTR(ima8, 0600, show_ima8, store_ima8),
+        __ATTR(ima9, 0600, show_ima9, store_ima9),
+        __ATTR(imaat, 0600, show_imaat, store_imaat),
+        __ATTR(btcr, 0600, show_btcr, store_btcr),
+        __ATTR(pccr, 0600, show_pccr, store_pccr),
+        __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
+        __ATTR(der, 0600, show_der, store_der),
+        __ATTR(mer, 0600, show_mer, store_mer),
+        __ATTR(ber, 0600, show_ber, store_ber),
+        __ATTR(ier, 0600, show_ier, store_ier),
+        __ATTR(sier, 0600, show_sier, store_sier),
+        __ATTR(siar, 0600, show_siar, store_siar),
+        __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
+        __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
+        __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
+        __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
 #endif /* CONFIG_DEBUG_KERNEL */
 };
 #endif /* HAS_PPC_PMC_PA6T */
@@ -333,14 +336,14 @@ static struct sysdev_attribute pa6t_attrs[] = {
 static void __cpuinit register_cpu_online(unsigned int cpu)
 {
         struct cpu *c = &per_cpu(cpu_devices, cpu);
-        struct sys_device *s = &c->sysdev;
-        struct sysdev_attribute *attrs, *pmc_attrs;
+        struct device *s = &c->dev;
+        struct device_attribute *attrs, *pmc_attrs;
         int i, nattrs;
 
 #ifdef CONFIG_PPC64
         if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
                         cpu_has_feature(CPU_FTR_SMT))
-                sysdev_create_file(s, &attr_smt_snooze_delay);
+                device_create_file(s, &dev_attr_smt_snooze_delay);
 #endif
 
         /* PMC stuff */
@@ -348,14 +351,14 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
 #ifdef HAS_PPC_PMC_IBM
         case PPC_PMC_IBM:
                 attrs = ibm_common_attrs;
-                nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute);
+                nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
                 pmc_attrs = classic_pmc_attrs;
                 break;
 #endif /* HAS_PPC_PMC_IBM */
 #ifdef HAS_PPC_PMC_G4
         case PPC_PMC_G4:
                 attrs = g4_common_attrs;
-                nattrs = sizeof(g4_common_attrs) / sizeof(struct sysdev_attribute);
+                nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
                 pmc_attrs = classic_pmc_attrs;
                 break;
 #endif /* HAS_PPC_PMC_G4 */
@@ -363,7 +366,7 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
         case PPC_PMC_PA6T:
                 /* PA Semi starts counting at PMC0 */
                 attrs = pa6t_attrs;
-                nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute);
+                nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
                 pmc_attrs = NULL;
                 break;
 #endif /* HAS_PPC_PMC_PA6T */
@@ -374,24 +377,27 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
         }
 
         for (i = 0; i < nattrs; i++)
-                sysdev_create_file(s, &attrs[i]);
+                device_create_file(s, &attrs[i]);
 
         if (pmc_attrs)
                 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
-                        sysdev_create_file(s, &pmc_attrs[i]);
+                        device_create_file(s, &pmc_attrs[i]);
 
 #ifdef CONFIG_PPC64
         if (cpu_has_feature(CPU_FTR_MMCRA))
-                sysdev_create_file(s, &attr_mmcra);
+                device_create_file(s, &dev_attr_mmcra);
 
         if (cpu_has_feature(CPU_FTR_PURR))
-                sysdev_create_file(s, &attr_purr);
+                device_create_file(s, &dev_attr_purr);
 
         if (cpu_has_feature(CPU_FTR_SPURR))
-                sysdev_create_file(s, &attr_spurr);
+                device_create_file(s, &dev_attr_spurr);
 
         if (cpu_has_feature(CPU_FTR_DSCR))
-                sysdev_create_file(s, &attr_dscr);
+                device_create_file(s, &dev_attr_dscr);
+
+        if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
+                device_create_file(s, &dev_attr_pir);
 #endif /* CONFIG_PPC64 */
 
         cacheinfo_cpu_online(cpu);
@@ -401,8 +407,8 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
 static void unregister_cpu_online(unsigned int cpu)
 {
         struct cpu *c = &per_cpu(cpu_devices, cpu);
-        struct sys_device *s = &c->sysdev;
-        struct sysdev_attribute *attrs, *pmc_attrs;
+        struct device *s = &c->dev;
+        struct device_attribute *attrs, *pmc_attrs;
         int i, nattrs;
 
         BUG_ON(!c->hotpluggable);
@@ -410,7 +416,7 @@ static void unregister_cpu_online(unsigned int cpu)
 #ifdef CONFIG_PPC64
         if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
                         cpu_has_feature(CPU_FTR_SMT))
-                sysdev_remove_file(s, &attr_smt_snooze_delay);
+                device_remove_file(s, &dev_attr_smt_snooze_delay);
 #endif
 
         /* PMC stuff */
@@ -418,14 +424,14 @@ static void unregister_cpu_online(unsigned int cpu)
 #ifdef HAS_PPC_PMC_IBM
         case PPC_PMC_IBM:
                 attrs = ibm_common_attrs;
-                nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute);
+                nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
                 pmc_attrs = classic_pmc_attrs;
                 break;
 #endif /* HAS_PPC_PMC_IBM */
 #ifdef HAS_PPC_PMC_G4
         case PPC_PMC_G4:
                 attrs = g4_common_attrs;
-                nattrs = sizeof(g4_common_attrs) / sizeof(struct sysdev_attribute);
+                nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
                 pmc_attrs = classic_pmc_attrs;
                 break;
 #endif /* HAS_PPC_PMC_G4 */
@@ -433,7 +439,7 @@ static void unregister_cpu_online(unsigned int cpu)
         case PPC_PMC_PA6T:
                 /* PA Semi starts counting at PMC0 */
                 attrs = pa6t_attrs;
-                nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute);
+                nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
                 pmc_attrs = NULL;
                 break;
 #endif /* HAS_PPC_PMC_PA6T */
@@ -444,24 +450,27 @@ static void unregister_cpu_online(unsigned int cpu)
         }
 
         for (i = 0; i < nattrs; i++)
-                sysdev_remove_file(s, &attrs[i]);
+                device_remove_file(s, &attrs[i]);
 
         if (pmc_attrs)
                 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
-                        sysdev_remove_file(s, &pmc_attrs[i]);
+                        device_remove_file(s, &pmc_attrs[i]);
 
 #ifdef CONFIG_PPC64
         if (cpu_has_feature(CPU_FTR_MMCRA))
-                sysdev_remove_file(s, &attr_mmcra);
+                device_remove_file(s, &dev_attr_mmcra);
 
         if (cpu_has_feature(CPU_FTR_PURR))
-                sysdev_remove_file(s, &attr_purr);
+                device_remove_file(s, &dev_attr_purr);
 
         if (cpu_has_feature(CPU_FTR_SPURR))
-                sysdev_remove_file(s, &attr_spurr);
+                device_remove_file(s, &dev_attr_spurr);
 
         if (cpu_has_feature(CPU_FTR_DSCR))
-                sysdev_remove_file(s, &attr_dscr);
+                device_remove_file(s, &dev_attr_dscr);
+
+        if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
+                device_remove_file(s, &dev_attr_pir);
 #endif /* CONFIG_PPC64 */
 
         cacheinfo_cpu_offline(cpu);
@@ -513,70 +522,70 @@ static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
 
 static DEFINE_MUTEX(cpu_mutex);
 
-int cpu_add_sysdev_attr(struct sysdev_attribute *attr)
+int cpu_add_dev_attr(struct device_attribute *attr)
 {
         int cpu;
 
         mutex_lock(&cpu_mutex);
 
         for_each_possible_cpu(cpu) {
-                sysdev_create_file(get_cpu_sysdev(cpu), attr);
+                device_create_file(get_cpu_device(cpu), attr);
         }
 
         mutex_unlock(&cpu_mutex);
         return 0;
 }
-EXPORT_SYMBOL_GPL(cpu_add_sysdev_attr);
+EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
 
-int cpu_add_sysdev_attr_group(struct attribute_group *attrs)
+int cpu_add_dev_attr_group(struct attribute_group *attrs)
 {
         int cpu;
-        struct sys_device *sysdev;
+        struct device *dev;
         int ret;
 
         mutex_lock(&cpu_mutex);
 
         for_each_possible_cpu(cpu) {
-                sysdev = get_cpu_sysdev(cpu);
-                ret = sysfs_create_group(&sysdev->kobj, attrs);
+                dev = get_cpu_device(cpu);
+                ret = sysfs_create_group(&dev->kobj, attrs);
                 WARN_ON(ret != 0);
         }
 
         mutex_unlock(&cpu_mutex);
         return 0;
 }
-EXPORT_SYMBOL_GPL(cpu_add_sysdev_attr_group);
+EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
 
 
-void cpu_remove_sysdev_attr(struct sysdev_attribute *attr)
+void cpu_remove_dev_attr(struct device_attribute *attr)
 {
         int cpu;
 
         mutex_lock(&cpu_mutex);
 
         for_each_possible_cpu(cpu) {
-                sysdev_remove_file(get_cpu_sysdev(cpu), attr);
+                device_remove_file(get_cpu_device(cpu), attr);
         }
 
         mutex_unlock(&cpu_mutex);
 }
-EXPORT_SYMBOL_GPL(cpu_remove_sysdev_attr);
+EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
 
-void cpu_remove_sysdev_attr_group(struct attribute_group *attrs)
+void cpu_remove_dev_attr_group(struct attribute_group *attrs)
 {
         int cpu;
-        struct sys_device *sysdev;
+        struct device *dev;
 
         mutex_lock(&cpu_mutex);
 
         for_each_possible_cpu(cpu) {
-                sysdev = get_cpu_sysdev(cpu);
-                sysfs_remove_group(&sysdev->kobj, attrs);
+                dev = get_cpu_device(cpu);
+                sysfs_remove_group(&dev->kobj, attrs);
         }
 
         mutex_unlock(&cpu_mutex);
 }
-EXPORT_SYMBOL_GPL(cpu_remove_sysdev_attr_group);
+EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
 
 
 /* NUMA stuff */
@@ -590,18 +599,18 @@ static void register_nodes(void)
                 register_one_node(i);
 }
 
-int sysfs_add_device_to_node(struct sys_device *dev, int nid)
+int sysfs_add_device_to_node(struct device *dev, int nid)
 {
         struct node *node = &node_devices[nid];
-        return sysfs_create_link(&node->sysdev.kobj, &dev->kobj,
+        return sysfs_create_link(&node->dev.kobj, &dev->kobj,
                         kobject_name(&dev->kobj));
 }
 EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
 
-void sysfs_remove_device_from_node(struct sys_device *dev, int nid)
+void sysfs_remove_device_from_node(struct device *dev, int nid)
 {
         struct node *node = &node_devices[nid];
-        sysfs_remove_link(&node->sysdev.kobj, kobject_name(&dev->kobj));
+        sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
 }
 EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
 
@@ -614,14 +623,14 @@ static void register_nodes(void)
 #endif
 
 /* Only valid if CPU is present. */
-static ssize_t show_physical_id(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_physical_id(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
-        struct cpu *cpu = container_of(dev, struct cpu, sysdev);
+        struct cpu *cpu = container_of(dev, struct cpu, dev);
 
-        return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->sysdev.id));
+        return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
 }
-static SYSDEV_ATTR(physical_id, 0444, show_physical_id, NULL);
+static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
 
 static int __init topology_init(void)
 {
@@ -646,7 +655,7 @@ static int __init topology_init(void)
                 if (cpu_online(cpu) || c->hotpluggable) {
                         register_cpu(c, cpu);
 
-                        sysdev_create_file(&c->sysdev, &attr_physical_id);
+                        device_create_file(&c->dev, &dev_attr_physical_id);
                 }
 
                 if (cpu_online(cpu))
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 522bb1dfc353..567dd7c3ac2a 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -86,8 +86,6 @@ static struct clocksource clocksource_rtc = {
         .rating       = 400,
         .flags        = CLOCK_SOURCE_IS_CONTINUOUS,
         .mask         = CLOCKSOURCE_MASK(64),
-        .shift        = 22,
-        .mult         = 0,      /* To be filled in */
         .read         = rtc_read,
 };
 
@@ -97,8 +95,6 @@ static struct clocksource clocksource_timebase = {
         .rating       = 400,
         .flags        = CLOCK_SOURCE_IS_CONTINUOUS,
         .mask         = CLOCKSOURCE_MASK(64),
-        .shift        = 22,
-        .mult         = 0,      /* To be filled in */
         .read         = timebase_read,
 };
 
@@ -110,22 +106,16 @@ static void decrementer_set_mode(enum clock_event_mode mode,
                                  struct clock_event_device *dev);
 
 static struct clock_event_device decrementer_clockevent = {
-       .name           = "decrementer",
-       .rating         = 200,
-       .shift          = 0,     /* To be filled in */
-       .mult           = 0,     /* To be filled in */
-       .irq            = 0,
-       .set_next_event = decrementer_set_next_event,
-       .set_mode       = decrementer_set_mode,
-       .features       = CLOCK_EVT_FEAT_ONESHOT,
+        .name           = "decrementer",
+        .rating         = 200,
+        .irq            = 0,
+        .set_next_event = decrementer_set_next_event,
+        .set_mode       = decrementer_set_mode,
+        .features       = CLOCK_EVT_FEAT_ONESHOT,
 };
 
-struct decrementer_clock {
-        struct clock_event_device event;
-        u64 next_tb;
-};
-
-static DEFINE_PER_CPU(struct decrementer_clock, decrementers);
+DEFINE_PER_CPU(u64, decrementers_next_tb);
+static DEFINE_PER_CPU(struct clock_event_device, decrementers);
 
 #ifdef CONFIG_PPC_ISERIES
 static unsigned long __initdata iSeries_recal_titan;
@@ -168,13 +158,13 @@ EXPORT_SYMBOL_GPL(ppc_tb_freq);
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 /*
  * Factors for converting from cputime_t (timebase ticks) to
- * jiffies, milliseconds, seconds, and clock_t (1/USER_HZ seconds).
+ * jiffies, microseconds, seconds, and clock_t (1/USER_HZ seconds).
  * These are all stored as 0.64 fixed-point binary fractions.
  */
 u64 __cputime_jiffies_factor;
 EXPORT_SYMBOL(__cputime_jiffies_factor);
-u64 __cputime_msec_factor;
-EXPORT_SYMBOL(__cputime_msec_factor);
+u64 __cputime_usec_factor;
+EXPORT_SYMBOL(__cputime_usec_factor);
 u64 __cputime_sec_factor;
 EXPORT_SYMBOL(__cputime_sec_factor);
 u64 __cputime_clockt_factor;
@@ -192,8 +182,8 @@ static void calc_cputime_factors(void)
 
         div128_by_32(HZ, 0, tb_ticks_per_sec, &res);
         __cputime_jiffies_factor = res.result_low;
-        div128_by_32(1000, 0, tb_ticks_per_sec, &res);
-        __cputime_msec_factor = res.result_low;
+        div128_by_32(1000000, 0, tb_ticks_per_sec, &res);
+        __cputime_usec_factor = res.result_low;
         div128_by_32(1, 0, tb_ticks_per_sec, &res);
         __cputime_sec_factor = res.result_low;
         div128_by_32(USER_HZ, 0, tb_ticks_per_sec, &res);
@@ -441,7 +431,7 @@ EXPORT_SYMBOL(profile_pc);
 /* 
  * This function recalibrates the timebase based on the 49-bit time-of-day
  * value in the Titan chip.  The Titan is much more accurate than the value
- * returned by the service processor for the timebase frequency.  
+ * returned by the service processor for the timebase frequency.
  */
 
 static int __init iSeries_tb_recal(void)
@@ -576,9 +566,8 @@ void arch_irq_work_raise(void)
 void timer_interrupt(struct pt_regs * regs)
 {
         struct pt_regs *old_regs;
-        struct decrementer_clock *decrementer =  &__get_cpu_var(decrementers);
-        struct clock_event_device *evt = &decrementer->event;
-        u64 now;
+        u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
+        struct clock_event_device *evt = &__get_cpu_var(decrementers);
 
         /* Ensure a positive value is written to the decrementer, or else
          * some CPUs will continue to take decrementer exceptions.
@@ -613,16 +602,9 @@ void timer_interrupt(struct pt_regs * regs)
                 get_lppaca()->int_dword.fields.decr_int = 0;
 #endif
 
-        now = get_tb_or_rtc();
-        if (now >= decrementer->next_tb) {
-                decrementer->next_tb = ~(u64)0;
-                if (evt->event_handler)
-                        evt->event_handler(evt);
-        } else {
-                now = decrementer->next_tb - now;
-                if (now <= DECREMENTER_MAX)
-                        set_dec((int)now);
-        }
+        *next_tb = ~(u64)0;
+        if (evt->event_handler)
+                evt->event_handler(evt);
 
 #ifdef CONFIG_PPC_ISERIES
         if (firmware_has_feature(FW_FEATURE_ISERIES) && hvlpevent_is_pending())
@@ -650,9 +632,9 @@ static void generic_suspend_disable_irqs(void)
          * with suspending.
          */
 
-        set_dec(0x7fffffff);
+        set_dec(DECREMENTER_MAX);
         local_irq_disable();
-        set_dec(0x7fffffff);
+        set_dec(DECREMENTER_MAX);
 }
 
 static void generic_suspend_enable_irqs(void)
@@ -824,9 +806,8 @@ void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
         ++vdso_data->tb_update_count;
         smp_mb();
 
-        /* XXX this assumes clock->shift == 22 */
-        /* 4611686018 ~= 2^(20+64-22) / 1e9 */
-        new_tb_to_xs = (u64) mult * 4611686018ULL;
+        /* 19342813113834067 ~= 2^(20+64) / 1e9 */
+        new_tb_to_xs = (u64) mult * (19342813113834067ULL >> clock->shift);
         new_stamp_xsec = (u64) wall_time->tv_nsec * XSEC_PER_SEC;
         do_div(new_stamp_xsec, 1000000000);
         new_stamp_xsec += (u64) wall_time->tv_sec * XSEC_PER_SEC;
@@ -877,9 +858,7 @@ static void __init clocksource_init(void)
         else
                 clock = &clocksource_timebase;
 
-        clock->mult = clocksource_hz2mult(tb_ticks_per_sec, clock->shift);
-
-        if (clocksource_register(clock)) {
+        if (clocksource_register_hz(clock, tb_ticks_per_sec)) {
                 printk(KERN_ERR "clocksource: %s is already registered\n",
                        clock->name);
                 return;
@@ -892,7 +871,7 @@ static void __init clocksource_init(void)
 static int decrementer_set_next_event(unsigned long evt,
                                       struct clock_event_device *dev)
 {
-        __get_cpu_var(decrementers).next_tb = get_tb_or_rtc() + evt;
+        __get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt;
         set_dec(evt);
         return 0;
 }
@@ -904,34 +883,9 @@ static void decrementer_set_mode(enum clock_event_mode mode,
                 decrementer_set_next_event(DECREMENTER_MAX, dev);
 }
 
-static inline uint64_t div_sc64(unsigned long ticks, unsigned long nsec,
-                                int shift)
-{
-        uint64_t tmp = ((uint64_t)ticks) << shift;
-
-        do_div(tmp, nsec);
-        return tmp;
-}
-
-static void __init setup_clockevent_multiplier(unsigned long hz)
-{
-        u64 mult, shift = 32;
-
-        while (1) {
-                mult = div_sc64(hz, NSEC_PER_SEC, shift);
-                if (mult && (mult >> 32UL) == 0UL)
-                        break;
-
-                shift--;
-        }
-
-        decrementer_clockevent.shift = shift;
-        decrementer_clockevent.mult = mult;
-}
-
 static void register_decrementer_clockevent(int cpu)
 {
-        struct clock_event_device *dec = &per_cpu(decrementers, cpu).event;
+        struct clock_event_device *dec = &per_cpu(decrementers, cpu);
 
         *dec = decrementer_clockevent;
         dec->cpumask = cpumask_of(cpu);
@@ -946,7 +900,8 @@ static void __init init_decrementer_clockevent(void)
 {
         int cpu = smp_processor_id();
 
-        setup_clockevent_multiplier(ppc_tb_freq);
+        clockevents_calc_mult_shift(&decrementer_clockevent, ppc_tb_freq, 4);
+
         decrementer_clockevent.max_delta_ns =
                 clockevent_delta2ns(DECREMENTER_MAX, &decrementer_clockevent);
         decrementer_clockevent.min_delta_ns =
@@ -1014,10 +969,10 @@ void __init time_init(void)
         boot_tb = get_tb_or_rtc();
 
         /* If platform provided a timezone (pmac), we correct the time */
-        if (timezone_offset) {
+        if (timezone_offset) {
                 sys_tz.tz_minuteswest = -timezone_offset / 60;
                 sys_tz.tz_dsttime = 0;
-        }
+        }
 
         vdso_data->tb_update_count = 0;
         vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4e5908264d1a..c091527efd89 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -98,18 +98,14 @@ static void pmac_backlight_unblank(void)
 static inline void pmac_backlight_unblank(void) { }
 #endif
 
-int die(const char *str, struct pt_regs *regs, long err)
+static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED;
+static int die_owner = -1;
+static unsigned int die_nest_count;
+static int die_counter;
+
+static unsigned __kprobes long oops_begin(struct pt_regs *regs)
 {
-        static struct {
-                raw_spinlock_t lock;
-                u32 lock_owner;
-                int lock_owner_depth;
-        } die = {
-                .lock =                 __RAW_SPIN_LOCK_UNLOCKED(die.lock),
-                .lock_owner =           -1,
-                .lock_owner_depth =     0
-        };
-        static int die_counter;
+        int cpu;
         unsigned long flags;
 
         if (debugger(regs))
@@ -117,66 +113,109 @@ int die(const char *str, struct pt_regs *regs, long err)
 
         oops_enter();
 
-        if (die.lock_owner != raw_smp_processor_id()) {
-                console_verbose();
-                raw_spin_lock_irqsave(&die.lock, flags);
-                die.lock_owner = smp_processor_id();
-                die.lock_owner_depth = 0;
-                bust_spinlocks(1);
-                if (machine_is(powermac))
-                        pmac_backlight_unblank();
-        } else {
-                local_save_flags(flags);
+        /* racy, but better than risking deadlock. */
+        raw_local_irq_save(flags);
+        cpu = smp_processor_id();
+        if (!arch_spin_trylock(&die_lock)) {
+                if (cpu == die_owner)
+                        /* nested oops. should stop eventually */;
+                else
+                        arch_spin_lock(&die_lock);
         }
+        die_nest_count++;
+        die_owner = cpu;
+        console_verbose();
+        bust_spinlocks(1);
+        if (machine_is(powermac))
+                pmac_backlight_unblank();
+        return flags;
+}
 
-        if (++die.lock_owner_depth < 3) {
-                printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
-#ifdef CONFIG_PREEMPT
-                printk("PREEMPT ");
-#endif
-#ifdef CONFIG_SMP
-                printk("SMP NR_CPUS=%d ", NR_CPUS);
-#endif
-#ifdef CONFIG_DEBUG_PAGEALLOC
-                printk("DEBUG_PAGEALLOC ");
-#endif
-#ifdef CONFIG_NUMA
-                printk("NUMA ");
-#endif
-                printk("%s\n", ppc_md.name ? ppc_md.name : "");
+static void __kprobes oops_end(unsigned long flags, struct pt_regs *regs,
+                               int signr)
+{
+        bust_spinlocks(0);
+        die_owner = -1;
+        add_taint(TAINT_DIE);
+        die_nest_count--;
+        oops_exit();
+        printk("\n");
+        if (!die_nest_count)
+                /* Nest count reaches zero, release the lock. */
+                arch_spin_unlock(&die_lock);
+        raw_local_irq_restore(flags);
 
-                if (notify_die(DIE_OOPS, str, regs, err, 255,
-                               SIGSEGV) == NOTIFY_STOP)
-                        return 1;
+        /*
+         * A system reset (0x100) is a request to dump, so we always send
+         * it through the crashdump code.
+         */
+        if (kexec_should_crash(current) || (TRAP(regs) == 0x100)) {
+                crash_kexec(regs);
 
-                print_modules();
-                show_regs(regs);
-        } else {
-                printk("Recursive die() failure, output suppressed\n");
+                /*
+                 * We aren't the primary crash CPU. We need to send it
+                 * to a holding pattern to avoid it ending up in the panic
+                 * code.
+                 */
+                crash_kexec_secondary(regs);
         }
 
-        bust_spinlocks(0);
-        die.lock_owner = -1;
-        add_taint(TAINT_DIE);
-        raw_spin_unlock_irqrestore(&die.lock, flags);
+        if (!signr)
+                return;
 
-        if (kexec_should_crash(current) ||
-                kexec_sr_activated(smp_processor_id()))
-                crash_kexec(regs);
-        crash_kexec_secondary(regs);
+        /*
+         * While our oops output is serialised by a spinlock, output
+         * from panic() called below can race and corrupt it. If we
+         * know we are going to panic, delay for 1 second so we have a
+         * chance to get clean backtraces from all CPUs that are oopsing.
+         */
+        if (in_interrupt() || panic_on_oops || !current->pid ||
+            is_global_init(current)) {
+                mdelay(MSEC_PER_SEC);
+        }
 
         if (in_interrupt())
                 panic("Fatal exception in interrupt");
-
         if (panic_on_oops)
                 panic("Fatal exception");
+        do_exit(signr);
+}
 
-        oops_exit();
-        do_exit(err);
+static int __kprobes __die(const char *str, struct pt_regs *regs, long err)
+{
+        printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
+#ifdef CONFIG_PREEMPT
+        printk("PREEMPT ");
+#endif
+#ifdef CONFIG_SMP
+        printk("SMP NR_CPUS=%d ", NR_CPUS);
+#endif
+#ifdef CONFIG_DEBUG_PAGEALLOC
+        printk("DEBUG_PAGEALLOC ");
+#endif
+#ifdef CONFIG_NUMA
+        printk("NUMA ");
+#endif
+        printk("%s\n", ppc_md.name ? ppc_md.name : "");
+
+        if (notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV) == NOTIFY_STOP)
+                return 1;
+
+        print_modules();
+        show_regs(regs);
 
         return 0;
 }
 
+void die(const char *str, struct pt_regs *regs, long err)
+{
+        unsigned long flags = oops_begin(regs);
+
+        if (__die(str, regs, err))
+                err = 0;
+        oops_end(flags, regs, err);
+}
+
 void user_single_step_siginfo(struct task_struct *tsk,
                                 struct pt_regs *regs, siginfo_t *info)
 {
@@ -195,10 +234,11 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
                         "at %016lx nip %016lx lr %016lx code %x\n";
 
         if (!user_mode(regs)) {
-                if (die("Exception in kernel mode", regs, signr))
-                        return;
-        } else if (show_unhandled_signals &&
-                   unhandled_signal(current, signr)) {
+                die("Exception in kernel mode", regs, signr);
+                return;
+        }
+
+        if (show_unhandled_signals && unhandled_signal(current, signr)) {
                 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
                                    current->comm, current->pid, signr,
                                    addr, regs->nip, regs->link, code);
@@ -220,25 +260,8 @@ void system_reset_exception(struct pt_regs *regs)
                         return;
         }
 
-#ifdef CONFIG_KEXEC
-        cpumask_set_cpu(smp_processor_id(), &cpus_in_sr);
-#endif
-
         die("System Reset", regs, SIGABRT);
 
-        /*
-         * Some CPUs when released from the debugger will execute this path.
-         * These CPUs entered the debugger via a soft-reset. If the CPU was
-         * hung before entering the debugger it will return to the hung
-         * state when exiting this function.  This causes a problem in
-         * kdump since the hung CPU(s) will not respond to the IPI sent
-         * from kdump. To prevent the problem we call crash_kexec_secondary()
-         * here. If a kdump had not been initiated or we exit the debugger
-         * with the "exit and recover" command (x) crash_kexec_secondary()
-         * will return after 5ms and the CPU returns to its previous state.
-         */
-        crash_kexec_secondary(regs);
-
         /* Must die if the interrupt is not recoverable */
         if (!(regs->msr & MSR_RI))
                 panic("Unrecoverable System Reset");
@@ -1298,14 +1321,12 @@ void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
 
                 if (user_mode(regs)) {
                         current->thread.dbcr0 &= ~DBCR0_IC;
-#ifdef CONFIG_PPC_ADV_DEBUG_REGS
                         if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
                                                current->thread.dbcr1))
                                 regs->msr |= MSR_DE;
                         else
                                 /* Make sure the IDM bit is off */
                                 current->thread.dbcr0 &= ~DBCR0_IDM;
-#endif
                 }
 
                 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index f65af61996bd..8b086299ba25 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1406,7 +1406,6 @@ static struct bus_type vio_bus_type = {
         .match = vio_bus_match,
         .probe = vio_bus_probe,
         .remove = vio_bus_remove,
-        .pm = GENERIC_SUBSYS_PM_OPS,
 };
 
 /**
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 920276c0f6a1..710a54005dfb 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -170,7 +170,13 @@ SECTIONS
         }
 #ifdef CONFIG_RELOCATABLE
         . = ALIGN(8);
-        .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET) { *(.dynsym) }
+        .dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET)
+        {
+#ifdef CONFIG_RELOCATABLE_PPC32
+                __dynamic_symtab = .;
+#endif
+                *(.dynsym)
+        }
         .dynstr : AT(ADDR(.dynstr) - LOAD_OFFSET) { *(.dynstr) }
         .dynamic : AT(ADDR(.dynamic) - LOAD_OFFSET)
         {
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 0cdbc07cec14..336983da9e72 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -44,6 +44,7 @@
 #include <asm/processor.h>
 #include <asm/cputhreads.h>
 #include <asm/page.h>
+#include <asm/hvcall.h>
 #include <linux/gfp.h>
 #include <linux/sched.h>
 #include <linux/vmalloc.h>
@@ -537,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)
         tpaca->kvm_hstate.napping = 0;
         vcpu->cpu = vc->pcpu;
         smp_wmb();
-#ifdef CONFIG_PPC_ICP_NATIVE
+#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
         if (vcpu->arch.ptid) {
                 tpaca->cpu_start = 0x80;
                 wmb();
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 44d8829334ab..5c8b26183f50 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -112,6 +112,9 @@ kvm_start_guest:
         stbcix  r0, r5, r6              /* clear it */
         stwcix  r8, r5, r7              /* EOI it */
 
+        /* NV GPR values from power7_idle() will no longer be valid */
+        stb     r0, PACA_NAPSTATELOST(r13)
+
 .global kvmppc_hv_entry
 kvmppc_hv_entry:
 
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index bc4d50dec78b..e2cfb9e1e20e 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -151,16 +151,14 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
 #ifdef CONFIG_PPC_BOOK3S_64
         if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
                 kvmppc_mmu_book3s_64_init(vcpu);
-                if (!to_book3s(vcpu)->hior_sregs)
-                        to_book3s(vcpu)->hior = 0xfff00000;
+                to_book3s(vcpu)->hior = 0xfff00000;
                 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
                 vcpu->arch.cpu_type = KVM_CPU_3S_64;
         } else
 #endif
         {
                 kvmppc_mmu_book3s_32_init(vcpu);
-                if (!to_book3s(vcpu)->hior_sregs)
-                        to_book3s(vcpu)->hior = 0;
+                to_book3s(vcpu)->hior = 0;
                 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
                 vcpu->arch.cpu_type = KVM_CPU_3S_32;
         }
@@ -660,10 +658,12 @@ program_interrupt:
                         ulong cmd = kvmppc_get_gpr(vcpu, 3);
                         int i;
 
+#ifdef CONFIG_KVM_BOOK3S_64_PR
                         if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
                                 r = RESUME_GUEST;
                                 break;
                         }
+#endif
 
                         run->papr_hcall.nr = cmd;
                         for (i = 0; i < 9; ++i) {
@@ -797,9 +797,6 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                 }
         }
 
-        if (sregs->u.s.flags & KVM_SREGS_S_HIOR)
-                sregs->u.s.hior = to_book3s(vcpu)->hior;
-
         return 0;
 }
 
@@ -836,11 +833,6 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
         /* Flush the MMU after messing with the segments */
         kvmppc_mmu_pte_flush(vcpu, 0, 0);
 
-        if (sregs->u.s.flags & KVM_SREGS_S_HIOR) {
-                to_book3s(vcpu)->hior_sregs = true;
-                to_book3s(vcpu)->hior = sregs->u.s.hior;
-        }
-
         return 0;
 }
 
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d20903f2bc..8c0d45a6faf7 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -15,6 +15,7 @@
 #include <linux/kvm_host.h>
 #include <linux/slab.h>
 #include <linux/err.h>
+#include <linux/export.h>
 
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index efbf9ad87203..607fbdf24b84 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -208,7 +208,6 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_PPC_BOOKE_SREGS:
 #else
         case KVM_CAP_PPC_SEGSTATE:
-        case KVM_CAP_PPC_HIOR:
         case KVM_CAP_PPC_PAPR:
 #endif
         case KVM_CAP_PPC_UNSET_IRQ:
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 166a6a0ad544..7735a2c2e6d9 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -16,13 +16,15 @@ obj-$(CONFIG_HAS_IOMEM)	+= devres.o
 
 obj-$(CONFIG_PPC64)     += copypage_64.o copyuser_64.o \
                            memcpy_64.o usercopy_64.o mem_64.o string.o \
-                           checksum_wrappers_64.o hweight_64.o
+                           checksum_wrappers_64.o hweight_64.o \
+                           copyuser_power7.o
 obj-$(CONFIG_XMON)      += sstep.o ldstfp.o
 obj-$(CONFIG_KPROBES)   += sstep.o ldstfp.o
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)        += sstep.o ldstfp.o
 
 ifeq ($(CONFIG_PPC64),y)
 obj-$(CONFIG_SMP)       += locks.o
+obj-$(CONFIG_ALTIVEC)   += copyuser_power7_vmx.o
 endif
 
 obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 578b625d6a3c..773d38f90aaa 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -11,6 +11,12 @@
 
         .align  7
 _GLOBAL(__copy_tofrom_user)
+BEGIN_FTR_SECTION
+        nop
+FTR_SECTION_ELSE
+        b       __copy_tofrom_user_power7
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
+_GLOBAL(__copy_tofrom_user_base)
         /* first check for a whole page copy on a page boundary */
         cmpldi  cr1,r5,16
         cmpdi   cr6,r5,4096
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
new file mode 100644
index 000000000000..497db7b23bb1
--- /dev/null
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -0,0 +1,683 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2011
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/ppc_asm.h>
+
+#define STACKFRAMESIZE  256
+#define STK_REG(i)      (112 + ((i)-14)*8)
+
+        .macro err1
+100:
+        .section __ex_table,"a"
+        .align 3
+        .llong 100b,.Ldo_err1
+        .previous
+        .endm
+
+        .macro err2
+200:
+        .section __ex_table,"a"
+        .align 3
+        .llong 200b,.Ldo_err2
+        .previous
+        .endm
+
+#ifdef CONFIG_ALTIVEC
+        .macro err3
+300:
+        .section __ex_table,"a"
+        .align 3
+        .llong 300b,.Ldo_err3
+        .previous
+        .endm
+
+        .macro err4
+400:
+        .section __ex_table,"a"
+        .align 3
+        .llong 400b,.Ldo_err4
+        .previous
+        .endm
+
+
+.Ldo_err4:
+        ld      r16,STK_REG(r16)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r14,STK_REG(r14)(r1)
+.Ldo_err3:
+        bl      .exit_vmx_copy
+        ld      r0,STACKFRAMESIZE+16(r1)
+        mtlr    r0
+        b       .Lexit
+#endif /* CONFIG_ALTIVEC */
+
+.Ldo_err2:
+        ld      r22,STK_REG(r22)(r1)
+        ld      r21,STK_REG(r21)(r1)
+        ld      r20,STK_REG(r20)(r1)
+        ld      r19,STK_REG(r19)(r1)
+        ld      r18,STK_REG(r18)(r1)
+        ld      r17,STK_REG(r17)(r1)
+        ld      r16,STK_REG(r16)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r14,STK_REG(r14)(r1)
+.Lexit:
+        addi    r1,r1,STACKFRAMESIZE
+.Ldo_err1:
+        ld      r3,48(r1)
+        ld      r4,56(r1)
+        ld      r5,64(r1)
+        b       __copy_tofrom_user_base
+
+
+_GLOBAL(__copy_tofrom_user_power7)
+#ifdef CONFIG_ALTIVEC
+        cmpldi  r5,16
+        cmpldi  cr1,r5,4096
+
+        std     r3,48(r1)
+        std     r4,56(r1)
+        std     r5,64(r1)
+
+        blt     .Lshort_copy
+        bgt     cr1,.Lvmx_copy
+#else
+        cmpldi  r5,16
+
+        std     r3,48(r1)
+        std     r4,56(r1)
+        std     r5,64(r1)
+
+        blt     .Lshort_copy
+#endif
+
+.Lnonvmx_copy:
+        /* Get the source 8B aligned */
+        neg     r6,r4
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-3)
+
+        bf      cr7*4+3,1f
+err1;   lbz     r0,0(r4)
+        addi    r4,r4,1
+err1;   stb     r0,0(r3)
+        addi    r3,r3,1
+
+1:      bf      cr7*4+2,2f
+err1;   lhz     r0,0(r4)
+        addi    r4,r4,2
+err1;   sth     r0,0(r3)
+        addi    r3,r3,2
+
+2:      bf      cr7*4+1,3f
+err1;   lwz     r0,0(r4)
+        addi    r4,r4,4
+err1;   stw     r0,0(r3)
+        addi    r3,r3,4
+
+3:      sub     r5,r5,r6
+        cmpldi  r5,128
+        blt     5f
+
+        mflr    r0
+        stdu    r1,-STACKFRAMESIZE(r1)
+        std     r14,STK_REG(r14)(r1)
+        std     r15,STK_REG(r15)(r1)
+        std     r16,STK_REG(r16)(r1)
+        std     r17,STK_REG(r17)(r1)
+        std     r18,STK_REG(r18)(r1)
+        std     r19,STK_REG(r19)(r1)
+        std     r20,STK_REG(r20)(r1)
+        std     r21,STK_REG(r21)(r1)
+        std     r22,STK_REG(r22)(r1)
+        std     r0,STACKFRAMESIZE+16(r1)
+
+        srdi    r6,r5,7
+        mtctr   r6
+
+        /* Now do cacheline (128B) sized loads and stores. */
+        .align  5
+4:
+err2;   ld      r0,0(r4)
+err2;   ld      r6,8(r4)
+err2;   ld      r7,16(r4)
+err2;   ld      r8,24(r4)
+err2;   ld      r9,32(r4)
+err2;   ld      r10,40(r4)
+err2;   ld      r11,48(r4)
+err2;   ld      r12,56(r4)
+err2;   ld      r14,64(r4)
+err2;   ld      r15,72(r4)
+err2;   ld      r16,80(r4)
+err2;   ld      r17,88(r4)
+err2;   ld      r18,96(r4)
+err2;   ld      r19,104(r4)
+err2;   ld      r20,112(r4)
+err2;   ld      r21,120(r4)
+        addi    r4,r4,128
+err2;   std     r0,0(r3)
+err2;   std     r6,8(r3)
+err2;   std     r7,16(r3)
+err2;   std     r8,24(r3)
+err2;   std     r9,32(r3)
+err2;   std     r10,40(r3)
+err2;   std     r11,48(r3)
+err2;   std     r12,56(r3)
+err2;   std     r14,64(r3)
+err2;   std     r15,72(r3)
+err2;   std     r16,80(r3)
+err2;   std     r17,88(r3)
+err2;   std     r18,96(r3)
+err2;   std     r19,104(r3)
+err2;   std     r20,112(r3)
+err2;   std     r21,120(r3)
+        addi    r3,r3,128
+        bdnz    4b
+
+        clrldi  r5,r5,(64-7)
+
+        ld      r14,STK_REG(r14)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r16,STK_REG(r16)(r1)
+        ld      r17,STK_REG(r17)(r1)
+        ld      r18,STK_REG(r18)(r1)
+        ld      r19,STK_REG(r19)(r1)
+        ld      r20,STK_REG(r20)(r1)
+        ld      r21,STK_REG(r21)(r1)
+        ld      r22,STK_REG(r22)(r1)
+        addi    r1,r1,STACKFRAMESIZE
+
+        /* Up to 127B to go */
+5:      srdi    r6,r5,4
+        mtocrf  0x01,r6
+
+6:      bf      cr7*4+1,7f
+err1;   ld      r0,0(r4)
+err1;   ld      r6,8(r4)
+err1;   ld      r7,16(r4)
+err1;   ld      r8,24(r4)
+err1;   ld      r9,32(r4)
+err1;   ld      r10,40(r4)
+err1;   ld      r11,48(r4)
+err1;   ld      r12,56(r4)
+        addi    r4,r4,64
+err1;   std     r0,0(r3)
+err1;   std     r6,8(r3)
+err1;   std     r7,16(r3)
+err1;   std     r8,24(r3)
+err1;   std     r9,32(r3)
+err1;   std     r10,40(r3)
+err1;   std     r11,48(r3)
+err1;   std     r12,56(r3)
+        addi    r3,r3,64
+
+        /* Up to 63B to go */
+7:      bf      cr7*4+2,8f
+err1;   ld      r0,0(r4)
+err1;   ld      r6,8(r4)
+err1;   ld      r7,16(r4)
+err1;   ld      r8,24(r4)
+        addi    r4,r4,32
+err1;   std     r0,0(r3)
+err1;   std     r6,8(r3)
+err1;   std     r7,16(r3)
+err1;   std     r8,24(r3)
+        addi    r3,r3,32
+
+        /* Up to 31B to go */
+8:      bf      cr7*4+3,9f
+err1;   ld      r0,0(r4)
+err1;   ld      r6,8(r4)
+        addi    r4,r4,16
+err1;   std     r0,0(r3)
+err1;   std     r6,8(r3)
+        addi    r3,r3,16
+
+9:      clrldi  r5,r5,(64-4)
+
+        /* Up to 15B to go */
+.Lshort_copy:
+        mtocrf  0x01,r5
+        bf      cr7*4+0,12f
+err1;   lwz     r0,0(r4)        /* Less chance of a reject with word ops */
+err1;   lwz     r6,4(r4)
+        addi    r4,r4,8
+err1;   stw     r0,0(r3)
+err1;   stw     r6,4(r3)
+        addi    r3,r3,8
+
+12:     bf      cr7*4+1,13f
+err1;   lwz     r0,0(r4)
+        addi    r4,r4,4
+err1;   stw     r0,0(r3)
+        addi    r3,r3,4
+
+13:     bf      cr7*4+2,14f
+err1;   lhz     r0,0(r4)
+        addi    r4,r4,2
+err1;   sth     r0,0(r3)
+        addi    r3,r3,2
+
+14:     bf      cr7*4+3,15f
+err1;   lbz     r0,0(r4)
+err1;   stb     r0,0(r3)
+
+15:     li      r3,0
+        blr
+
+.Lunwind_stack_nonvmx_copy:
+        addi    r1,r1,STACKFRAMESIZE
+        b       .Lnonvmx_copy
+
+#ifdef CONFIG_ALTIVEC
+.Lvmx_copy:
+        mflr    r0
+        std     r0,16(r1)
+        stdu    r1,-STACKFRAMESIZE(r1)
+        bl      .enter_vmx_copy
+        cmpwi   r3,0
+        ld      r0,STACKFRAMESIZE+16(r1)
+        ld      r3,STACKFRAMESIZE+48(r1)
+        ld      r4,STACKFRAMESIZE+56(r1)
+        ld      r5,STACKFRAMESIZE+64(r1)
+        mtlr    r0
+
+        beq     .Lunwind_stack_nonvmx_copy
+
+        /*
+         * If source and destination are not relatively aligned we use a
+         * slower permute loop.
+         */
+        xor     r6,r4,r3
+        rldicl. r6,r6,0,(64-4)
+        bne     .Lvmx_unaligned_copy
+
+        /* Get the destination 16B aligned */
+        neg     r6,r3
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-4)
+
+        bf      cr7*4+3,1f
+err3;   lbz     r0,0(r4)
+        addi    r4,r4,1
+err3;   stb     r0,0(r3)
+        addi    r3,r3,1
+
+1:      bf      cr7*4+2,2f
+err3;   lhz     r0,0(r4)
+        addi    r4,r4,2
+err3;   sth     r0,0(r3)
+        addi    r3,r3,2
+
+2:      bf      cr7*4+1,3f
+err3;   lwz     r0,0(r4)
+        addi    r4,r4,4
+err3;   stw     r0,0(r3)
+        addi    r3,r3,4
+
+3:      bf      cr7*4+0,4f
+err3;   ld      r0,0(r4)
+        addi    r4,r4,8
+err3;   std     r0,0(r3)
+        addi    r3,r3,8
+
+4:      sub     r5,r5,r6
+
+        /* Get the desination 128B aligned */
+        neg     r6,r3
+        srdi    r7,r6,4
+        mtocrf  0x01,r7
+        clrldi  r6,r6,(64-7)
+
+        li      r9,16
+        li      r10,32
+        li      r11,48
+
+        bf      cr7*4+3,5f
+err3;   lvx     vr1,r0,r4
+        addi    r4,r4,16
+err3;   stvx    vr1,r0,r3
+        addi    r3,r3,16
+
+5:      bf      cr7*4+2,6f
+err3;   lvx     vr1,r0,r4
+err3;   lvx     vr0,r4,r9
+        addi    r4,r4,32
+err3;   stvx    vr1,r0,r3
+err3;   stvx    vr0,r3,r9
+        addi    r3,r3,32
+
+6:      bf      cr7*4+1,7f
+err3;   lvx     vr3,r0,r4
+err3;   lvx     vr2,r4,r9
+err3;   lvx     vr1,r4,r10
+err3;   lvx     vr0,r4,r11
+        addi    r4,r4,64
+err3;   stvx    vr3,r0,r3
+err3;   stvx    vr2,r3,r9
+err3;   stvx    vr1,r3,r10
+err3;   stvx    vr0,r3,r11
+        addi    r3,r3,64
+
+7:      sub     r5,r5,r6
+        srdi    r6,r5,7
+
+        std     r14,STK_REG(r14)(r1)
+        std     r15,STK_REG(r15)(r1)
+        std     r16,STK_REG(r16)(r1)
+
+        li      r12,64
+        li      r14,80
+        li      r15,96
+        li      r16,112
+
+        mtctr   r6
+
+        /*
+         * Now do cacheline sized loads and stores. By this stage the
+         * cacheline stores are also cacheline aligned.
+         */
+        .align  5
+8:
+err4;   lvx     vr7,r0,r4
+err4;   lvx     vr6,r4,r9
+err4;   lvx     vr5,r4,r10
+err4;   lvx     vr4,r4,r11
+err4;   lvx     vr3,r4,r12
+err4;   lvx     vr2,r4,r14
+err4;   lvx     vr1,r4,r15
+err4;   lvx     vr0,r4,r16
+        addi    r4,r4,128
+err4;   stvx    vr7,r0,r3
+err4;   stvx    vr6,r3,r9
+err4;   stvx    vr5,r3,r10
+err4;   stvx    vr4,r3,r11
+err4;   stvx    vr3,r3,r12
+err4;   stvx    vr2,r3,r14
+err4;   stvx    vr1,r3,r15
+err4;   stvx    vr0,r3,r16
+        addi    r3,r3,128
+        bdnz    8b
+
+        ld      r14,STK_REG(r14)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r16,STK_REG(r16)(r1)
+
+        /* Up to 127B to go */
+        clrldi  r5,r5,(64-7)
+        srdi    r6,r5,4
+        mtocrf  0x01,r6
+
+        bf      cr7*4+1,9f
+err3;   lvx     vr3,r0,r4
+err3;   lvx     vr2,r4,r9
+err3;   lvx     vr1,r4,r10
+err3;   lvx     vr0,r4,r11
+        addi    r4,r4,64
+err3;   stvx    vr3,r0,r3
+err3;   stvx    vr2,r3,r9
+err3;   stvx    vr1,r3,r10
+err3;   stvx    vr0,r3,r11
+        addi    r3,r3,64
+
+9:      bf      cr7*4+2,10f
+err3;   lvx     vr1,r0,r4
+err3;   lvx     vr0,r4,r9
+        addi    r4,r4,32
+err3;   stvx    vr1,r0,r3
+err3;   stvx    vr0,r3,r9
+        addi    r3,r3,32
+
+10:     bf      cr7*4+3,11f
+err3;   lvx     vr1,r0,r4
+        addi    r4,r4,16
+err3;   stvx    vr1,r0,r3
+        addi    r3,r3,16
+
+        /* Up to 15B to go */
+11:     clrldi  r5,r5,(64-4)
+        mtocrf  0x01,r5
+        bf      cr7*4+0,12f
+err3;   ld      r0,0(r4)
+        addi    r4,r4,8
+err3;   std     r0,0(r3)
+        addi    r3,r3,8
+
+12:     bf      cr7*4+1,13f
+err3;   lwz     r0,0(r4)
+        addi    r4,r4,4
+err3;   stw     r0,0(r3)
+        addi    r3,r3,4
+
+13:     bf      cr7*4+2,14f
+err3;   lhz     r0,0(r4)
+        addi    r4,r4,2
+err3;   sth     r0,0(r3)
+        addi    r3,r3,2
+
+14:     bf      cr7*4+3,15f
+err3;   lbz     r0,0(r4)
+err3;   stb     r0,0(r3)
+
+15:     addi    r1,r1,STACKFRAMESIZE
+        b       .exit_vmx_copy          /* tail call optimise */
+
+.Lvmx_unaligned_copy:
+        /* Get the destination 16B aligned */
+        neg     r6,r3
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-4)
+
+        bf      cr7*4+3,1f
+err3;   lbz     r0,0(r4)
+        addi    r4,r4,1
+err3;   stb     r0,0(r3)
+        addi    r3,r3,1
+
+1:      bf      cr7*4+2,2f
+err3;   lhz     r0,0(r4)
+        addi    r4,r4,2
+err3;   sth     r0,0(r3)
+        addi    r3,r3,2
+
+2:      bf      cr7*4+1,3f
+err3;   lwz     r0,0(r4)
+        addi    r4,r4,4
+err3;   stw     r0,0(r3)
+        addi    r3,r3,4
+
+3:      bf      cr7*4+0,4f
+err3;   lwz     r0,0(r4)        /* Less chance of a reject with word ops */
+err3;   lwz     r7,4(r4)
+        addi    r4,r4,8
+err3;   stw     r0,0(r3)
+err3;   stw     r7,4(r3)
+        addi    r3,r3,8
+
+4:      sub     r5,r5,r6
+
+        /* Get the desination 128B aligned */
+        neg     r6,r3
+        srdi    r7,r6,4
+        mtocrf  0x01,r7
+        clrldi  r6,r6,(64-7)
+
+        li      r9,16
+        li      r10,32
+        li      r11,48
+
+        lvsl    vr16,0,r4       /* Setup permute control vector */
+err3;   lvx     vr0,0,r4
+        addi    r4,r4,16
+
+        bf      cr7*4+3,5f
+err3;   lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+        addi    r4,r4,16
+err3;   stvx    vr8,r0,r3
+        addi    r3,r3,16
+        vor     vr0,vr1,vr1
+
+5:      bf      cr7*4+2,6f
+err3;   lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+err3;   lvx     vr0,r4,r9
+        vperm   vr9,vr1,vr0,vr16
+        addi    r4,r4,32
+err3;   stvx    vr8,r0,r3
+err3;   stvx    vr9,r3,r9
+        addi    r3,r3,32
+
+6:      bf      cr7*4+1,7f
+err3;   lvx     vr3,r0,r4
+        vperm   vr8,vr0,vr3,vr16
+err3;   lvx     vr2,r4,r9
+        vperm   vr9,vr3,vr2,vr16
+err3;   lvx     vr1,r4,r10
+        vperm   vr10,vr2,vr1,vr16
+err3;   lvx     vr0,r4,r11
+        vperm   vr11,vr1,vr0,vr16
+        addi    r4,r4,64
+err3;   stvx    vr8,r0,r3
+err3;   stvx    vr9,r3,r9
+err3;   stvx    vr10,r3,r10
+err3;   stvx    vr11,r3,r11
+        addi    r3,r3,64
+
+7:      sub     r5,r5,r6
+        srdi    r6,r5,7
+
+        std     r14,STK_REG(r14)(r1)
+        std     r15,STK_REG(r15)(r1)
+        std     r16,STK_REG(r16)(r1)
+
+        li      r12,64
+        li      r14,80
+        li      r15,96
+        li      r16,112
+
+        mtctr   r6
+
+        /*
+         * Now do cacheline sized loads and stores. By this stage the
+         * cacheline stores are also cacheline aligned.
+         */
+        .align  5
+8:
+err4;   lvx     vr7,r0,r4
+        vperm   vr8,vr0,vr7,vr16
+err4;   lvx     vr6,r4,r9
+        vperm   vr9,vr7,vr6,vr16
+err4;   lvx     vr5,r4,r10
+        vperm   vr10,vr6,vr5,vr16
+err4;   lvx     vr4,r4,r11
+        vperm   vr11,vr5,vr4,vr16
+err4;   lvx     vr3,r4,r12
+        vperm   vr12,vr4,vr3,vr16
+err4;   lvx     vr2,r4,r14
+        vperm   vr13,vr3,vr2,vr16
+err4;   lvx     vr1,r4,r15
+        vperm   vr14,vr2,vr1,vr16
+err4;   lvx     vr0,r4,r16
+        vperm   vr15,vr1,vr0,vr16
+        addi    r4,r4,128
+err4;   stvx    vr8,r0,r3
+err4;   stvx    vr9,r3,r9
+err4;   stvx    vr10,r3,r10
+err4;   stvx    vr11,r3,r11
+err4;   stvx    vr12,r3,r12
+err4;   stvx    vr13,r3,r14
+err4;   stvx    vr14,r3,r15
+err4;   stvx    vr15,r3,r16
+        addi    r3,r3,128
+        bdnz    8b
+
+        ld      r14,STK_REG(r14)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r16,STK_REG(r16)(r1)
+
+        /* Up to 127B to go */
+        clrldi  r5,r5,(64-7)
+        srdi    r6,r5,4
+        mtocrf  0x01,r6
+
+        bf      cr7*4+1,9f
+err3;   lvx     vr3,r0,r4
+        vperm   vr8,vr0,vr3,vr16
+err3;   lvx     vr2,r4,r9
+        vperm   vr9,vr3,vr2,vr16
+err3;   lvx     vr1,r4,r10
+        vperm   vr10,vr2,vr1,vr16
+err3;   lvx     vr0,r4,r11
+        vperm   vr11,vr1,vr0,vr16
+        addi    r4,r4,64
+err3;   stvx    vr8,r0,r3
+err3;   stvx    vr9,r3,r9
+err3;   stvx    vr10,r3,r10
+err3;   stvx    vr11,r3,r11
+        addi    r3,r3,64
+
+9:      bf      cr7*4+2,10f
+err3;   lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+err3;   lvx     vr0,r4,r9
+        vperm   vr9,vr1,vr0,vr16
+        addi    r4,r4,32
+err3;   stvx    vr8,r0,r3
+err3;   stvx    vr9,r3,r9
+        addi    r3,r3,32
+
+10:     bf      cr7*4+3,11f
+err3;   lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+        addi    r4,r4,16
+err3;   stvx    vr8,r0,r3
+        addi    r3,r3,16
+
+        /* Up to 15B to go */
+11:     clrldi  r5,r5,(64-4)
+        addi    r4,r4,-16       /* Unwind the +16 load offset */
+        mtocrf  0x01,r5
+        bf      cr7*4+0,12f
+err3;   lwz     r0,0(r4)        /* Less chance of a reject with word ops */
+err3;   lwz     r6,4(r4)
+        addi    r4,r4,8
+err3;   stw     r0,0(r3)
+err3;   stw     r6,4(r3)
+        addi    r3,r3,8
+
+12:     bf      cr7*4+1,13f
+err3;   lwz     r0,0(r4)
+        addi    r4,r4,4
+err3;   stw     r0,0(r3)
+        addi    r3,r3,4
+
+13:     bf      cr7*4+2,14f
+err3;   lhz     r0,0(r4)
+        addi    r4,r4,2
+err3;   sth     r0,0(r3)
+        addi    r3,r3,2
+
+14:     bf      cr7*4+3,15f
+err3;   lbz     r0,0(r4)
+err3;   stb     r0,0(r3)
+
+15:     addi    r1,r1,STACKFRAMESIZE
+        b       .exit_vmx_copy          /* tail call optimise */
+#endif /* CONFiG_ALTIVEC */
diff --git a/arch/powerpc/lib/copyuser_power7_vmx.c b/arch/powerpc/lib/copyuser_power7_vmx.c
new file mode 100644
index 000000000000..6e1efadac48b
--- /dev/null
+++ b/arch/powerpc/lib/copyuser_power7_vmx.c
@@ -0,0 +1,50 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2011
+ *
+ * Authors: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
+ *          Anton Blanchard <anton@au.ibm.com>
+ */
+#include <linux/uaccess.h>
+#include <linux/hardirq.h>
+
+int enter_vmx_copy(void)
+{
+        if (in_interrupt())
+                return 0;
+
+        /* This acts as preempt_disable() as well and will make
+         * enable_kernel_altivec(). We need to disable page faults
+         * as they can call schedule and thus make us lose the VMX
+         * context. So on page faults, we just fail which will cause
+         * a fallback to the normal non-vmx copy.
+         */
+        pagefault_disable();
+
+        enable_kernel_altivec();
+
+        return 1;
+}
+
+/*
+ * This function must return 0 because we tail call optimise when calling
+ * from __copy_tofrom_user_power7 which returns 0 on success.
+ */
+int exit_vmx_copy(void)
+{
+        pagefault_enable();
+        return 0;
+}
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 0d08d0171392..7a8a7487cee8 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -18,6 +18,8 @@
 #include <linux/init.h>
 #include <asm/cputable.h>
 #include <asm/code-patching.h>
+#include <asm/page.h>
+#include <asm/sections.h>
 
 
 struct fixup_entry {
@@ -128,6 +130,27 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
         }
 }
 
+void do_final_fixups(void)
+{
+#if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE)
+        int *src, *dest;
+        unsigned long length;
+
+        if (PHYSICAL_START == 0)
+                return;
+
+        src = (int *)(KERNELBASE + PHYSICAL_START);
+        dest = (int *)KERNELBASE;
+        length = (__end_interrupts - _stext) / sizeof(int);
+
+        while (length--) {
+                patch_instruction(dest, *src);
+                src++;
+                dest++;
+        }
+#endif
+}
+
 #ifdef CONFIG_FTR_FIXUP_SELFTEST
 
 #define check(x)        \
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index f60e006d90c3..388b95e1a009 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -78,11 +78,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
                 "tlbwe  %1,%3,%5\n"
                 "tlbwe  %0,%3,%6\n"
         :
-#ifdef CONFIG_PPC47x
-        : "r" (PPC47x_TLB2_S_RWX),
-#else
         : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
-#endif
           "r" (phys),
           "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
           "r" (entry),
@@ -221,7 +217,7 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
 {
         u64 size;
 
-#ifndef CONFIG_RELOCATABLE
+#ifndef CONFIG_NONSTATIC_KERNEL
         /* We don't currently support the first MEMBLOCK not mapping 0
          * physical on those processors
          */
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 991ee813d2a8..3787b61f7d20 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -21,6 +21,8 @@ obj-$(CONFIG_PPC_STD_MMU_32)	+= ppc_mmu_32.o
 obj-$(CONFIG_PPC_STD_MMU)       += hash_low_$(CONFIG_WORD_SIZE).o \
                                    tlb_hash$(CONFIG_WORD_SIZE).o \
                                    mmu_context_hash$(CONFIG_WORD_SIZE).o
+obj-$(CONFIG_PPC_ICSWX)         += icswx.o
+obj-$(CONFIG_PPC_ICSWX_PID)     += icswx_pid.o
 obj-$(CONFIG_40x)               += 40x_mmu.o
 obj-$(CONFIG_44x)               += 44x_mmu.o
 obj-$(CONFIG_PPC_FSL_BOOK3E)    += fsl_booke_mmu.o
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 5efe8c96d37f..2f0d1b032a89 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -44,6 +44,8 @@
 #include <asm/siginfo.h>
 #include <mm/mmu_decl.h>
 
+#include "icswx.h"
+
 #ifdef CONFIG_KPROBES
 static inline int notify_page_fault(struct pt_regs *regs)
 {
@@ -143,6 +145,21 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
         is_write = error_code & ESR_DST;
 #endif /* CONFIG_4xx || CONFIG_BOOKE */
 
+#ifdef CONFIG_PPC_ICSWX
+        /*
+         * we need to do this early because this "data storage
+         * interrupt" does not update the DAR/DEAR so we don't want to
+         * look at it
+         */
+        if (error_code & ICSWX_DSI_UCT) {
+                int ret;
+
+                ret = acop_handle_fault(regs, address, error_code);
+                if (ret)
+                        return ret;
+        }
+#endif
+
         if (notify_page_fault(regs))
                 return 0;
 
diff --git a/arch/powerpc/mm/hugetlbpage-book3e.c b/arch/powerpc/mm/hugetlbpage-book3e.c
index 343ad0b87261..3bc700655fc8 100644
--- a/arch/powerpc/mm/hugetlbpage-book3e.c
+++ b/arch/powerpc/mm/hugetlbpage-book3e.c
@@ -37,31 +37,32 @@ static inline int book3e_tlb_exists(unsigned long ea, unsigned long pid)
         return found;
 }
 
-void book3e_hugetlb_preload(struct mm_struct *mm, unsigned long ea, pte_t pte)
+void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
+                            pte_t pte)
 {
         unsigned long mas1, mas2;
         u64 mas7_3;
         unsigned long psize, tsize, shift;
         unsigned long flags;
+        struct mm_struct *mm;
 
 #ifdef CONFIG_PPC_FSL_BOOK3E
-        int index, lz, ncams;
-        struct vm_area_struct *vma;
+        int index, ncams;
 #endif
 
         if (unlikely(is_kernel_addr(ea)))
                 return;
 
+        mm = vma->vm_mm;
+
 #ifdef CONFIG_PPC_MM_SLICES
-        psize = mmu_get_tsize(get_slice_psize(mm, ea));
-        tsize = mmu_get_psize(psize);
+        psize = get_slice_psize(mm, ea);
+        tsize = mmu_get_tsize(psize);
         shift = mmu_psize_defs[psize].shift;
 #else
-        vma = find_vma(mm, ea);
-        psize = vma_mmu_pagesize(vma);  /* returns actual size in bytes */
-        asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (psize));
-        shift = 31 - lz;
-        tsize = 21 - lz;
+        psize = vma_mmu_pagesize(vma);
+        shift = __ilog2(psize);
+        tsize = shift - 10;
 #endif
 
         /*
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 5964371303ac..a8b3cc7d90fe 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -15,6 +15,7 @@
 #include <linux/of_fdt.h>
 #include <linux/memblock.h>
 #include <linux/bootmem.h>
+#include <linux/moduleparam.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/tlb.h>
@@ -28,22 +29,22 @@ unsigned int HPAGE_SHIFT;
 
 /*
  * Tracks gpages after the device tree is scanned and before the
- * huge_boot_pages list is ready.  On 64-bit implementations, this is
- * just used to track 16G pages and so is a single array.  32-bit
- * implementations may have more than one gpage size due to limitations
- * of the memory allocators, so we need multiple arrays
+ * huge_boot_pages list is ready.  On non-Freescale implementations, this is
+ * just used to track 16G pages and so is a single array.  FSL-based
+ * implementations may have more than one gpage size, so we need multiple
+ * arrays
  */
-#ifdef CONFIG_PPC64
-#define MAX_NUMBER_GPAGES       1024
-static u64 gpage_freearray[MAX_NUMBER_GPAGES];
-static unsigned nr_gpages;
-#else
+#ifdef CONFIG_PPC_FSL_BOOK3E
 #define MAX_NUMBER_GPAGES       128
 struct psize_gpages {
         u64 gpage_list[MAX_NUMBER_GPAGES];
         unsigned int nr_gpages;
 };
 static struct psize_gpages gpage_freearray[MMU_PAGE_COUNT];
+#else
+#define MAX_NUMBER_GPAGES       1024
+static u64 gpage_freearray[MAX_NUMBER_GPAGES];
+static unsigned nr_gpages;
 #endif
 
 static inline int shift_to_mmu_psize(unsigned int shift)
@@ -114,12 +115,12 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
         struct kmem_cache *cachep;
         pte_t *new;
 
-#ifdef CONFIG_PPC64
-        cachep = PGT_CACHE(pdshift - pshift);
-#else
+#ifdef CONFIG_PPC_FSL_BOOK3E
         int i;
         int num_hugepd = 1 << (pshift - pdshift);
         cachep = hugepte_cache;
+#else
+        cachep = PGT_CACHE(pdshift - pshift);
 #endif
 
         new = kmem_cache_zalloc(cachep, GFP_KERNEL|__GFP_REPEAT);
@@ -131,12 +132,7 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
                 return -ENOMEM;
 
         spin_lock(&mm->page_table_lock);
-#ifdef CONFIG_PPC64
-        if (!hugepd_none(*hpdp))
-                kmem_cache_free(cachep, new);
-        else
-                hpdp->pd = ((unsigned long)new & ~PD_HUGE) | pshift;
-#else
+#ifdef CONFIG_PPC_FSL_BOOK3E
         /*
          * We have multiple higher-level entries that point to the same
          * actual pte location.  Fill in each as we go and backtrack on error.
@@ -155,11 +151,28 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
                         hpdp->pd = 0;
                 kmem_cache_free(cachep, new);
         }
+#else
+        if (!hugepd_none(*hpdp))
+                kmem_cache_free(cachep, new);
+        else
+                hpdp->pd = ((unsigned long)new & ~PD_HUGE) | pshift;
 #endif
         spin_unlock(&mm->page_table_lock);
         return 0;
 }
 
+/*
+ * These macros define how to determine which level of the page table holds
+ * the hpdp.
+ */
+#ifdef CONFIG_PPC_FSL_BOOK3E
+#define HUGEPD_PGD_SHIFT PGDIR_SHIFT
+#define HUGEPD_PUD_SHIFT PUD_SHIFT
+#else
+#define HUGEPD_PGD_SHIFT PUD_SHIFT
+#define HUGEPD_PUD_SHIFT PMD_SHIFT
+#endif
+
 pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz)
 {
         pgd_t *pg;
@@ -172,12 +185,13 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz
         addr &= ~(sz-1);
 
         pg = pgd_offset(mm, addr);
-        if (pshift >= PUD_SHIFT) {
+
+        if (pshift >= HUGEPD_PGD_SHIFT) {
                 hpdp = (hugepd_t *)pg;
         } else {
                 pdshift = PUD_SHIFT;
                 pu = pud_alloc(mm, pg, addr);
-                if (pshift >= PMD_SHIFT) {
+                if (pshift >= HUGEPD_PUD_SHIFT) {
                         hpdp = (hugepd_t *)pu;
                 } else {
                         pdshift = PMD_SHIFT;
@@ -197,7 +211,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz
         return hugepte_offset(hpdp, addr, pdshift);
 }
 
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_PPC_FSL_BOOK3E
 /* Build list of addresses of gigantic pages.  This function is used in early
  * boot before the buddy or bootmem allocator is setup.
  */
@@ -317,7 +331,7 @@ void __init reserve_hugetlb_gpages(void)
         }
 }
 
-#else /* PPC64 */
+#else /* !PPC_FSL_BOOK3E */
 
 /* Build list of addresses of gigantic pages.  This function is used in early
  * boot before the buddy or bootmem allocator is setup.
@@ -355,7 +369,7 @@ int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
         return 0;
 }
 
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_PPC_FSL_BOOK3E
 #define HUGEPD_FREELIST_SIZE \
         ((PAGE_SIZE - sizeof(struct hugepd_freelist)) / sizeof(pte_t))
 
@@ -415,11 +429,11 @@ static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshif
         unsigned long pdmask = ~((1UL << pdshift) - 1);
         unsigned int num_hugepd = 1;
 
-#ifdef CONFIG_PPC64
-        unsigned int shift = hugepd_shift(*hpdp);
-#else
-        /* Note: On 32-bit the hpdp may be the first of several */
+#ifdef CONFIG_PPC_FSL_BOOK3E
+        /* Note: On fsl the hpdp may be the first of several */
         num_hugepd = (1 << (hugepd_shift(*hpdp) - pdshift));
+#else
+        unsigned int shift = hugepd_shift(*hpdp);
 #endif
 
         start &= pdmask;
@@ -437,10 +451,11 @@ static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshif
                 hpdp->pd = 0;
 
         tlb->need_flush = 1;
-#ifdef CONFIG_PPC64
-        pgtable_free_tlb(tlb, hugepte, pdshift - shift);
-#else
+
+#ifdef CONFIG_PPC_FSL_BOOK3E
         hugepd_free(tlb, hugepte);
+#else
+        pgtable_free_tlb(tlb, hugepte, pdshift - shift);
 #endif
 }
 
@@ -453,14 +468,23 @@ static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
         unsigned long start;
 
         start = addr;
-        pmd = pmd_offset(pud, addr);
         do {
+                pmd = pmd_offset(pud, addr);
                 next = pmd_addr_end(addr, end);
                 if (pmd_none(*pmd))
                         continue;
+#ifdef CONFIG_PPC_FSL_BOOK3E
+                /*
+                 * Increment next by the size of the huge mapping since
+                 * there may be more than one entry at this level for a
+                 * single hugepage, but all of them point to
+                 * the same kmem cache that holds the hugepte.
+                 */
+                next = addr + (1 << hugepd_shift(*(hugepd_t *)pmd));
+#endif
                 free_hugepd_range(tlb, (hugepd_t *)pmd, PMD_SHIFT,
                                   addr, next, floor, ceiling);
-        } while (pmd++, addr = next, addr != end);
+        } while (addr = next, addr != end);
 
         start &= PUD_MASK;
         if (start < floor)
@@ -487,8 +511,8 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
         unsigned long start;
 
         start = addr;
-        pud = pud_offset(pgd, addr);
         do {
+                pud = pud_offset(pgd, addr);
                 next = pud_addr_end(addr, end);
                 if (!is_hugepd(pud)) {
                         if (pud_none_or_clear_bad(pud))
@@ -496,10 +520,19 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
                         hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
                                                ceiling);
                 } else {
+#ifdef CONFIG_PPC_FSL_BOOK3E
+                        /*
+                         * Increment next by the size of the huge mapping since
+                         * there may be more than one entry at this level for a
+                         * single hugepage, but all of them point to
+                         * the same kmem cache that holds the hugepte.
+                         */
+                        next = addr + (1 << hugepd_shift(*(hugepd_t *)pud));
+#endif
                         free_hugepd_range(tlb, (hugepd_t *)pud, PUD_SHIFT,
                                           addr, next, floor, ceiling);
                 }
-        } while (pud++, addr = next, addr != end);
+        } while (addr = next, addr != end);
 
         start &= PGDIR_MASK;
         if (start < floor)
@@ -554,12 +587,12 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb,
                                 continue;
                         hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
                 } else {
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_PPC_FSL_BOOK3E
                         /*
                          * Increment next by the size of the huge mapping since
-                         * on 32-bit there may be more than one entry at the pgd
-                         * level for a single hugepage, but all of them point to
-                         * the same kmem cache that holds the hugepte.
+                         * there may be more than one entry at the pgd level
+                         * for a single hugepage, but all of them point to the
+                         * same kmem cache that holds the hugepte.
                          */
                         next = addr + (1 << hugepd_shift(*(hugepd_t *)pgd));
 #endif
@@ -697,19 +730,17 @@ int gup_hugepd(hugepd_t *hugepd, unsigned pdshift,
         return 1;
 }
 
+#ifdef CONFIG_PPC_MM_SLICES
 unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
                                         unsigned long len, unsigned long pgoff,
                                         unsigned long flags)
 {
-#ifdef CONFIG_PPC_MM_SLICES
         struct hstate *hstate = hstate_file(file);
         int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
 
         return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
-#else
-        return get_unmapped_area(file, addr, len, pgoff, flags);
-#endif
 }
+#endif
 
 unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
 {
@@ -783,7 +814,7 @@ static int __init hugepage_setup_sz(char *str)
 }
 __setup("hugepagesz=", hugepage_setup_sz);
 
-#ifdef CONFIG_FSL_BOOKE
+#ifdef CONFIG_PPC_FSL_BOOK3E
 struct kmem_cache *hugepte_cache;
 static int __init hugetlbpage_init(void)
 {
diff --git a/arch/powerpc/mm/icswx.c b/arch/powerpc/mm/icswx.c
new file mode 100644
index 000000000000..5d9a59eaad93
--- /dev/null
+++ b/arch/powerpc/mm/icswx.c
@@ -0,0 +1,273 @@
+/*
+ *  ICSWX and ACOP Management
+ *
+ *  Copyright (C) 2011 Anton Blanchard, IBM Corp. <anton@samba.org>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/spinlock.h>
+#include <linux/module.h>
+#include <linux/uaccess.h>
+
+#include "icswx.h"
+
+/*
+ * The processor and its L2 cache cause the icswx instruction to
+ * generate a COP_REQ transaction on PowerBus. The transaction has no
+ * address, and the processor does not perform an MMU access to
+ * authenticate the transaction. The command portion of the PowerBus
+ * COP_REQ transaction includes the LPAR_ID (LPID) and the coprocessor
+ * Process ID (PID), which the coprocessor compares to the authorized
+ * LPID and PID held in the coprocessor, to determine if the process
+ * is authorized to generate the transaction.  The data of the COP_REQ
+ * transaction is 128-byte or less in size and is placed in cacheable
+ * memory on a 128-byte cache line boundary.
+ *
+ * The task to use a coprocessor should use use_cop() to mark the use
+ * of the Coprocessor Type (CT) and context switching. On a server
+ * class processor, the PID register is used only for coprocessor
+ * management + * and so a coprocessor PID is allocated before
+ * executing icswx + * instruction. Drop_cop() is used to free the
+ * coprocessor PID.
+ *
+ * Example:
+ * Host Fabric Interface (HFI) is a PowerPC network coprocessor.
+ * Each HFI have multiple windows. Each HFI window serves as a
+ * network device sending to and receiving from HFI network.
+ * HFI immediate send function uses icswx instruction. The immediate
+ * send function allows small (single cache-line) packets be sent
+ * without using the regular HFI send FIFO and doorbell, which are
+ * much slower than immediate send.
+ *
+ * For each task intending to use HFI immediate send, the HFI driver
+ * calls use_cop() to obtain a coprocessor PID for the task.
+ * The HFI driver then allocate a free HFI window and save the
+ * coprocessor PID to the HFI window to allow the task to use the
+ * HFI window.
+ *
+ * The HFI driver repeatedly creates immediate send packets and
+ * issues icswx instruction to send data through the HFI window.
+ * The HFI compares the coprocessor PID in the CPU PID register
+ * to the PID held in the HFI window to determine if the transaction
+ * is allowed.
+ *
+ * When the task to release the HFI window, the HFI driver calls
+ * drop_cop() to release the coprocessor PID.
+ */
+
+void switch_cop(struct mm_struct *next)
+{
+#ifdef CONFIG_ICSWX_PID
+        mtspr(SPRN_PID, next->context.cop_pid);
+#endif
+        mtspr(SPRN_ACOP, next->context.acop);
+}
+
+/**
+ * Start using a coprocessor.
+ * @acop: mask of coprocessor to be used.
+ * @mm: The mm the coprocessor to associate with. Most likely current mm.
+ *
+ * Return a positive PID if successful. Negative errno otherwise.
+ * The returned PID will be fed to the coprocessor to determine if an
+ * icswx transaction is authenticated.
+ */
+int use_cop(unsigned long acop, struct mm_struct *mm)
+{
+        int ret;
+
+        if (!cpu_has_feature(CPU_FTR_ICSWX))
+                return -ENODEV;
+
+        if (!mm || !acop)
+                return -EINVAL;
+
+        /* The page_table_lock ensures mm_users won't change under us */
+        spin_lock(&mm->page_table_lock);
+        spin_lock(mm->context.cop_lockp);
+
+        ret = get_cop_pid(mm);
+        if (ret < 0)
+                goto out;
+
+        /* update acop */
+        mm->context.acop |= acop;
+
+        sync_cop(mm);
+
+        /*
+         * If this is a threaded process then there might be other threads
+         * running. We need to send an IPI to force them to pick up any
+         * change in PID and ACOP.
+         */
+        if (atomic_read(&mm->mm_users) > 1)
+                smp_call_function(sync_cop, mm, 1);
+
+out:
+        spin_unlock(mm->context.cop_lockp);
+        spin_unlock(&mm->page_table_lock);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(use_cop);
+
+/**
+ * Stop using a coprocessor.
+ * @acop: mask of coprocessor to be stopped.
+ * @mm: The mm the coprocessor associated with.
+ */
+void drop_cop(unsigned long acop, struct mm_struct *mm)
+{
+        int free_pid;
+
+        if (!cpu_has_feature(CPU_FTR_ICSWX))
+                return;
+
+        if (WARN_ON_ONCE(!mm))
+                return;
+
+        /* The page_table_lock ensures mm_users won't change under us */
+        spin_lock(&mm->page_table_lock);
+        spin_lock(mm->context.cop_lockp);
+
+        mm->context.acop &= ~acop;
+
+        free_pid = disable_cop_pid(mm);
+        sync_cop(mm);
+
+        /*
+         * If this is a threaded process then there might be other threads
+         * running. We need to send an IPI to force them to pick up any
+         * change in PID and ACOP.
+         */
+        if (atomic_read(&mm->mm_users) > 1)
+                smp_call_function(sync_cop, mm, 1);
+
+        if (free_pid != COP_PID_NONE)
+                free_cop_pid(free_pid);
+
+        spin_unlock(mm->context.cop_lockp);
+        spin_unlock(&mm->page_table_lock);
+}
+EXPORT_SYMBOL_GPL(drop_cop);
+
+static int acop_use_cop(int ct)
+{
+        /* todo */
+        return -1;
+}
+
+/*
+ * Get the instruction word at the NIP
+ */
+static u32 acop_get_inst(struct pt_regs *regs)
+{
+        u32 inst;
+        u32 __user *p;
+
+        p = (u32 __user *)regs->nip;
+        if (!access_ok(VERIFY_READ, p, sizeof(*p)))
+                return 0;
+
+        if (__get_user(inst, p))
+                return 0;
+
+        return inst;
+}
+
+/**
+ * @regs: regsiters at time of interrupt
+ * @address: storage address
+ * @error_code: Fault code, usually the DSISR or ESR depending on
+ *              processor type
+ *
+ * Return 0 if we are able to resolve the data storage fault that
+ * results from a CT miss in the ACOP register.
+ */
+int acop_handle_fault(struct pt_regs *regs, unsigned long address,
+                      unsigned long error_code)
+{
+        int ct;
+        u32 inst = 0;
+
+        if (!cpu_has_feature(CPU_FTR_ICSWX)) {
+                pr_info("No coprocessors available");
+                _exception(SIGILL, regs, ILL_ILLOPN, address);
+        }
+
+        if (!user_mode(regs)) {
+                /* this could happen if the HV denies the
+                 * kernel access, for now we just die */
+                die("ICSWX from kernel failed", regs, SIGSEGV);
+        }
+
+        /* Some implementations leave us a hint for the CT */
+        ct = ICSWX_GET_CT_HINT(error_code);
+        if (ct < 0) {
+                /* we have to peek at the instruction word to figure out CT */
+                u32 ccw;
+                u32 rs;
+
+                inst = acop_get_inst(regs);
+                if (inst == 0)
+                        return -1;
+
+                rs = (inst >> (31 - 10)) & 0x1f;
+                ccw = regs->gpr[rs];
+                ct = (ccw >> 16) & 0x3f;
+        }
+
+        if (!acop_use_cop(ct))
+                return 0;
+
+        /* at this point the CT is unknown to the system */
+        pr_warn("%s[%d]: Coprocessor %d is unavailable",
+                current->comm, current->pid, ct);
+
+        /* get inst if we don't already have it */
+        if (inst == 0) {
+                inst = acop_get_inst(regs);
+                if (inst == 0)
+                        return -1;
+        }
+
+        /* Check if the instruction is the "record form" */
+        if (inst & 1) {
+                /*
+                 * the instruction is "record" form so we can reject
+                 * using CR0
+                 */
+                regs->ccr &= ~(0xful << 28);
+                regs->ccr |= ICSWX_RC_NOT_FOUND << 28;
+
+                /* Move on to the next instruction */
+                regs->nip += 4;
+        } else {
+                /*
+                 * There is no architected mechanism to report a bad
+                 * CT so we could either SIGILL or report nothing.
+                 * Since the non-record version should only bu used
+                 * for "hints" or "don't care" we should probably do
+                 * nothing.  However, I could see how some people
+                 * might want an SIGILL so it here if you want it.
+                 */
+#ifdef CONFIG_PPC_ICSWX_USE_SIGILL
+                _exception(SIGILL, regs, ILL_ILLOPN, address);
+#else
+                regs->nip += 4;
+#endif
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(acop_handle_fault);
diff --git a/arch/powerpc/mm/icswx.h b/arch/powerpc/mm/icswx.h
new file mode 100644
index 000000000000..42176bd0884c
--- /dev/null
+++ b/arch/powerpc/mm/icswx.h
@@ -0,0 +1,62 @@
+#ifndef _ARCH_POWERPC_MM_ICSWX_H_
+#define _ARCH_POWERPC_MM_ICSWX_H_
+
+/*
+ *  ICSWX and ACOP Management
+ *
+ *  Copyright (C) 2011 Anton Blanchard, IBM Corp. <anton@samba.org>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <asm/mmu_context.h>
+
+/* also used to denote that PIDs are not used */
+#define COP_PID_NONE 0
+
+static inline void sync_cop(void *arg)
+{
+        struct mm_struct *mm = arg;
+
+        if (mm == current->active_mm)
+                switch_cop(current->active_mm);
+}
+
+#ifdef CONFIG_PPC_ICSWX_PID
+extern int get_cop_pid(struct mm_struct *mm);
+extern int disable_cop_pid(struct mm_struct *mm);
+extern void free_cop_pid(int free_pid);
+#else
+#define get_cop_pid(m) (COP_PID_NONE)
+#define disable_cop_pid(m) (COP_PID_NONE)
+#define free_cop_pid(p)
+#endif
+
+/*
+ * These are implementation bits for architected registers.  If this
+ * ever becomes architecture the should be moved to reg.h et. al.
+ */
+/* UCT is the same bit for Server and Embedded */
+#define ICSWX_DSI_UCT           0x00004000  /* Unavailable Coprocessor Type */
+
+#ifdef CONFIG_PPC_BOOK3E
+/* Embedded implementation gives us no hints as to what the CT is */
+#define ICSWX_GET_CT_HINT(x) (-1)
+#else
+/* Server implementation contains the CT value in the DSISR */
+#define ICSWX_DSISR_CTMASK      0x00003f00
+#define ICSWX_GET_CT_HINT(x)    (((x) & ICSWX_DSISR_CTMASK) >> 8)
+#endif
+
+#define ICSWX_RC_STARTED        0x8     /* The request has been started */
+#define ICSWX_RC_NOT_IDLE       0x4     /* No coprocessor found idle */
+#define ICSWX_RC_NOT_FOUND      0x2     /* No coprocessor found */
+#define ICSWX_RC_UNDEFINED      0x1     /* Reserved */
+
+extern int acop_handle_fault(struct pt_regs *regs, unsigned long address,
+                             unsigned long error_code);
+#endif /* !_ARCH_POWERPC_MM_ICSWX_H_ */
diff --git a/arch/powerpc/mm/icswx_pid.c b/arch/powerpc/mm/icswx_pid.c
new file mode 100644
index 000000000000..91e30eb7d054
--- /dev/null
+++ b/arch/powerpc/mm/icswx_pid.c
@@ -0,0 +1,87 @@
+/*
+ *  ICSWX and ACOP/PID Management
+ *
+ *  Copyright (C) 2011 Anton Blanchard, IBM Corp. <anton@samba.org>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/spinlock.h>
+#include <linux/idr.h>
+#include <linux/module.h>
+#include "icswx.h"
+
+#define COP_PID_MIN (COP_PID_NONE + 1)
+#define COP_PID_MAX (0xFFFF)
+
+static DEFINE_SPINLOCK(mmu_context_acop_lock);
+static DEFINE_IDA(cop_ida);
+
+static int new_cop_pid(struct ida *ida, int min_id, int max_id,
+                       spinlock_t *lock)
+{
+        int index;
+        int err;
+
+again:
+        if (!ida_pre_get(ida, GFP_KERNEL))
+                return -ENOMEM;
+
+        spin_lock(lock);
+        err = ida_get_new_above(ida, min_id, &index);
+        spin_unlock(lock);
+
+        if (err == -EAGAIN)
+                goto again;
+        else if (err)
+                return err;
+
+        if (index > max_id) {
+                spin_lock(lock);
+                ida_remove(ida, index);
+                spin_unlock(lock);
+                return -ENOMEM;
+        }
+
+        return index;
+}
+
+int get_cop_pid(struct mm_struct *mm)
+{
+        int pid;
+
+        if (mm->context.cop_pid == COP_PID_NONE) {
+                pid = new_cop_pid(&cop_ida, COP_PID_MIN, COP_PID_MAX,
+                                  &mmu_context_acop_lock);
+                if (pid >= 0)
+                        mm->context.cop_pid = pid;
+        }
+        return mm->context.cop_pid;
+}
+
+int disable_cop_pid(struct mm_struct *mm)
+{
+        int free_pid = COP_PID_NONE;
+
+        if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
+                free_pid = mm->context.cop_pid;
+                mm->context.cop_pid = COP_PID_NONE;
+        }
+        return free_pid;
+}
+
+void free_cop_pid(int free_pid)
+{
+        spin_lock(&mmu_context_acop_lock);
+        ida_remove(&cop_ida, free_pid);
+        spin_unlock(&mmu_context_acop_lock);
+}
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 161cefde5c15..6157be2a7049 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -65,6 +65,13 @@ phys_addr_t memstart_addr = (phys_addr_t)~0ull;
 EXPORT_SYMBOL(memstart_addr);
 phys_addr_t kernstart_addr;
 EXPORT_SYMBOL(kernstart_addr);
+
+#ifdef CONFIG_RELOCATABLE_PPC32
+/* Used in __va()/__pa() */
+long long virt_phys_offset;
+EXPORT_SYMBOL(virt_phys_offset);
+#endif
+
 phys_addr_t lowmem_end_addr;
 
 int boot_mapsize;
@@ -134,8 +141,7 @@ void __init MMU_init(void)
 
         if (memblock.memory.cnt > 1) {
 #ifndef CONFIG_WII
-                memblock.memory.cnt = 1;
-                memblock_analyze();
+                memblock_enforce_memory_limit(memblock.memory.regions[0].size);
                 printk(KERN_WARNING "Only using first contiguous memory region");
 #else
                 wii_memory_fixups();
@@ -158,7 +164,6 @@ void __init MMU_init(void)
 #ifndef CONFIG_HIGHMEM
                 total_memory = total_lowmem;
                 memblock_enforce_memory_limit(total_lowmem);
-                memblock_analyze();
 #endif /* CONFIG_HIGHMEM */
         }
 
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 2dd6bdd31fe1..d974b79a3068 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -51,6 +51,7 @@
 #include <asm/vdso.h>
 #include <asm/fixmap.h>
 #include <asm/swiotlb.h>
+#include <asm/rtas.h>
 
 #include "mmu_decl.h"
 
@@ -199,7 +200,7 @@ void __init do_init_bootmem(void)
                 unsigned long start_pfn, end_pfn;
                 start_pfn = memblock_region_memory_base_pfn(reg);
                 end_pfn = memblock_region_memory_end_pfn(reg);
-                add_active_range(0, start_pfn, end_pfn);
+                memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
         }
 
         /* Add all physical memory to the bootmem map, mark each area
@@ -553,7 +554,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
 #if (defined(CONFIG_PPC_BOOK3E_64) || defined(CONFIG_PPC_FSL_BOOK3E)) \
         && defined(CONFIG_HUGETLB_PAGE)
         if (is_vm_hugetlb_page(vma))
-                book3e_hugetlb_preload(vma->vm_mm, address, *ptep);
+                book3e_hugetlb_preload(vma, address, *ptep);
 #endif
 }
 
@@ -585,3 +586,23 @@ static int add_system_ram_resources(void)
         return 0;
 }
 subsys_initcall(add_system_ram_resources);
+
+#ifdef CONFIG_STRICT_DEVMEM
+/*
+ * devmem_is_allowed(): check to see if /dev/mem access to a certain address
+ * is valid. The argument is a physical page number.
+ *
+ * Access has to be given to non-kernel-ram areas as well, these contain the
+ * PCI mmio resources as well as potential bios/acpi data regions.
+ */
+int devmem_is_allowed(unsigned long pfn)
+{
+        if (iomem_is_exclusive(pfn << PAGE_SHIFT))
+                return 0;
+        if (!page_is_ram(pfn))
+                return 1;
+        if (page_is_rtas_user_buf(pfn))
+                return 1;
+        return 0;
+}
+#endif /* CONFIG_STRICT_DEVMEM */
diff --git a/arch/powerpc/mm/mmap_64.c b/arch/powerpc/mm/mmap_64.c
index 5a783d8e8e8e..67a42ed0d2fc 100644
--- a/arch/powerpc/mm/mmap_64.c
+++ b/arch/powerpc/mm/mmap_64.c
@@ -53,14 +53,6 @@ static inline int mmap_is_legacy(void)
         return sysctl_legacy_va_layout;
 }
 
-/*
- * Since get_random_int() returns the same value within a 1 jiffy window,
- * we will almost always get the same randomisation for the stack and mmap
- * region. This will mean the relative distance between stack and mmap will
- * be the same.
- *
- * To avoid this we can shift the randomness by 1 bit.
- */
 static unsigned long mmap_rnd(void)
 {
         unsigned long rnd = 0;
@@ -68,11 +60,11 @@ static unsigned long mmap_rnd(void)
         if (current->flags & PF_RANDOMIZE) {
                 /* 8MB for 32bit, 1GB for 64bit */
                 if (is_32bit_task())
-                        rnd = (long)(get_random_int() % (1<<(22-PAGE_SHIFT)));
+                        rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
                 else
-                        rnd = (long)(get_random_int() % (1<<(29-PAGE_SHIFT)));
+                        rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
         }
-        return (rnd << PAGE_SHIFT) * 2;
+        return rnd << PAGE_SHIFT;
 }
 
 static inline unsigned long mmap_base(void)
diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c
index ca988a3d5fb2..40677aa0190e 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -24,200 +24,7 @@
 
 #include <asm/mmu_context.h>
 
-#ifdef CONFIG_PPC_ICSWX
-/*
- * The processor and its L2 cache cause the icswx instruction to
- * generate a COP_REQ transaction on PowerBus. The transaction has
- * no address, and the processor does not perform an MMU access
- * to authenticate the transaction. The command portion of the
- * PowerBus COP_REQ transaction includes the LPAR_ID (LPID) and
- * the coprocessor Process ID (PID), which the coprocessor compares
- * to the authorized LPID and PID held in the coprocessor, to determine
- * if the process is authorized to generate the transaction.
- * The data of the COP_REQ transaction is 128-byte or less and is
- * placed in cacheable memory on a 128-byte cache line boundary.
- *
- * The task to use a coprocessor should use use_cop() to allocate
- * a coprocessor PID before executing icswx instruction. use_cop()
- * also enables the coprocessor context switching. Drop_cop() is
- * used to free the coprocessor PID.
- *
- * Example:
- * Host Fabric Interface (HFI) is a PowerPC network coprocessor.
- * Each HFI have multiple windows. Each HFI window serves as a
- * network device sending to and receiving from HFI network.
- * HFI immediate send function uses icswx instruction. The immediate
- * send function allows small (single cache-line) packets be sent
- * without using the regular HFI send FIFO and doorbell, which are
- * much slower than immediate send.
- *
- * For each task intending to use HFI immediate send, the HFI driver
- * calls use_cop() to obtain a coprocessor PID for the task.
- * The HFI driver then allocate a free HFI window and save the
- * coprocessor PID to the HFI window to allow the task to use the
- * HFI window.
- *
- * The HFI driver repeatedly creates immediate send packets and
- * issues icswx instruction to send data through the HFI window.
- * The HFI compares the coprocessor PID in the CPU PID register
- * to the PID held in the HFI window to determine if the transaction
- * is allowed.
- *
- * When the task to release the HFI window, the HFI driver calls
- * drop_cop() to release the coprocessor PID.
- */
-
-#define COP_PID_NONE 0
-#define COP_PID_MIN (COP_PID_NONE + 1)
-#define COP_PID_MAX (0xFFFF)
-
-static DEFINE_SPINLOCK(mmu_context_acop_lock);
-static DEFINE_IDA(cop_ida);
-
-void switch_cop(struct mm_struct *next)
-{
-        mtspr(SPRN_PID, next->context.cop_pid);
-        mtspr(SPRN_ACOP, next->context.acop);
-}
-
-static int new_cop_pid(struct ida *ida, int min_id, int max_id,
-                       spinlock_t *lock)
-{
-        int index;
-        int err;
-
-again:
-        if (!ida_pre_get(ida, GFP_KERNEL))
-                return -ENOMEM;
-
-        spin_lock(lock);
-        err = ida_get_new_above(ida, min_id, &index);
-        spin_unlock(lock);
-
-        if (err == -EAGAIN)
-                goto again;
-        else if (err)
-                return err;
-
-        if (index > max_id) {
-                spin_lock(lock);
-                ida_remove(ida, index);
-                spin_unlock(lock);
-                return -ENOMEM;
-        }
-
-        return index;
-}
-
-static void sync_cop(void *arg)
-{
-        struct mm_struct *mm = arg;
-
-        if (mm == current->active_mm)
-                switch_cop(current->active_mm);
-}
-
-/**
- * Start using a coprocessor.
- * @acop: mask of coprocessor to be used.
- * @mm: The mm the coprocessor to associate with. Most likely current mm.
- *
- * Return a positive PID if successful. Negative errno otherwise.
- * The returned PID will be fed to the coprocessor to determine if an
- * icswx transaction is authenticated.
- */
-int use_cop(unsigned long acop, struct mm_struct *mm)
-{
-        int ret;
-
-        if (!cpu_has_feature(CPU_FTR_ICSWX))
-                return -ENODEV;
-
-        if (!mm || !acop)
-                return -EINVAL;
-
-        /* The page_table_lock ensures mm_users won't change under us */
-        spin_lock(&mm->page_table_lock);
-        spin_lock(mm->context.cop_lockp);
-
-        if (mm->context.cop_pid == COP_PID_NONE) {
-                ret = new_cop_pid(&cop_ida, COP_PID_MIN, COP_PID_MAX,
-                                  &mmu_context_acop_lock);
-                if (ret < 0)
-                        goto out;
-
-                mm->context.cop_pid = ret;
-        }
-        mm->context.acop |= acop;
-
-        sync_cop(mm);
-
-        /*
-         * If this is a threaded process then there might be other threads
-         * running. We need to send an IPI to force them to pick up any
-         * change in PID and ACOP.
-         */
-        if (atomic_read(&mm->mm_users) > 1)
-                smp_call_function(sync_cop, mm, 1);
-
-        ret = mm->context.cop_pid;
-
-out:
-        spin_unlock(mm->context.cop_lockp);
-        spin_unlock(&mm->page_table_lock);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(use_cop);
-
-/**
- * Stop using a coprocessor.
- * @acop: mask of coprocessor to be stopped.
- * @mm: The mm the coprocessor associated with.
- */
-void drop_cop(unsigned long acop, struct mm_struct *mm)
-{
-        int free_pid = COP_PID_NONE;
-
-        if (!cpu_has_feature(CPU_FTR_ICSWX))
-                return;
-
-        if (WARN_ON_ONCE(!mm))
-                return;
-
-        /* The page_table_lock ensures mm_users won't change under us */
-        spin_lock(&mm->page_table_lock);
-        spin_lock(mm->context.cop_lockp);
-
-        mm->context.acop &= ~acop;
-
-        if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
-                free_pid = mm->context.cop_pid;
-                mm->context.cop_pid = COP_PID_NONE;
-        }
-
-        sync_cop(mm);
-
-        /*
-         * If this is a threaded process then there might be other threads
-         * running. We need to send an IPI to force them to pick up any
-         * change in PID and ACOP.
-         */
-        if (atomic_read(&mm->mm_users) > 1)
-                smp_call_function(sync_cop, mm, 1);
-
-        if (free_pid != COP_PID_NONE) {
-                spin_lock(&mmu_context_acop_lock);
-                ida_remove(&cop_ida, free_pid);
-                spin_unlock(&mmu_context_acop_lock);
-        }
-
-        spin_unlock(mm->context.cop_lockp);
-        spin_unlock(&mm->page_table_lock);
-}
-EXPORT_SYMBOL_GPL(drop_cop);
-
-#endif /* CONFIG_PPC_ICSWX */
+#include "icswx.h"
 
 static DEFINE_SPINLOCK(mmu_context_lock);
 static DEFINE_IDA(mmu_context_ida);
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index b22a83a91cb8..4ff3d8e411a7 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -127,45 +127,25 @@ static int __cpuinit fake_numa_create_new_node(unsigned long end_pfn,
 }
 
 /*
- * get_active_region_work_fn - A helper function for get_node_active_region
- *      Returns datax set to the start_pfn and end_pfn if they contain
- *      the initial value of datax->start_pfn between them
- * @start_pfn: start page(inclusive) of region to check
- * @end_pfn: end page(exclusive) of region to check
- * @datax: comes in with ->start_pfn set to value to search for and
- *      goes out with active range if it contains it
- * Returns 1 if search value is in range else 0
- */
-static int __init get_active_region_work_fn(unsigned long start_pfn,
-                                        unsigned long end_pfn, void *datax)
-{
-        struct node_active_region *data;
-        data = (struct node_active_region *)datax;
-
-        if (start_pfn <= data->start_pfn && end_pfn > data->start_pfn) {
-                data->start_pfn = start_pfn;
-                data->end_pfn = end_pfn;
-                return 1;
-        }
-        return 0;
-
-}
-
-/*
- * get_node_active_region - Return active region containing start_pfn
+ * get_node_active_region - Return active region containing pfn
  * Active range returned is empty if none found.
- * @start_pfn: The page to return the region for.
- * @node_ar: Returned set to the active region containing start_pfn
+ * @pfn: The page to return the region for
+ * @node_ar: Returned set to the active region containing @pfn
  */
-static void __init get_node_active_region(unsigned long start_pfn,
-                       struct node_active_region *node_ar)
+static void __init get_node_active_region(unsigned long pfn,
+                                          struct node_active_region *node_ar)
 {
-        int nid = early_pfn_to_nid(start_pfn);
+        unsigned long start_pfn, end_pfn;
+        int i, nid;
 
-        node_ar->nid = nid;
-        node_ar->start_pfn = start_pfn;
-        node_ar->end_pfn = start_pfn;
-        work_with_active_regions(nid, get_active_region_work_fn, node_ar);
+        for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, &nid) {
+                if (pfn >= start_pfn && pfn < end_pfn) {
+                        node_ar->nid = nid;
+                        node_ar->start_pfn = start_pfn;
+                        node_ar->end_pfn = end_pfn;
+                        break;
+                }
+        }
 }
 
 static void map_cpu_to_node(int cpu, int node)
@@ -406,7 +386,7 @@ static void __init get_n_mem_cells(int *n_addr_cells, int *n_size_cells)
         of_node_put(memory);
 }
 
-static unsigned long __devinit read_n_cells(int n, const unsigned int **buf)
+static unsigned long read_n_cells(int n, const unsigned int **buf)
 {
         unsigned long result = 0;
 
@@ -521,7 +501,7 @@ static int of_get_assoc_arrays(struct device_node *memory,
         aa->n_arrays = *prop++;
         aa->array_sz = *prop++;
 
-        /* Now that we know the number of arrrays and size of each array,
+        /* Now that we know the number of arrays and size of each array,
          * revalidate the size of the property read in.
          */
         if (len < (aa->n_arrays * aa->array_sz + 2) * sizeof(unsigned int))
@@ -710,9 +690,7 @@ static void __init parse_drconf_memory(struct device_node *memory)
                         node_set_online(nid);
                         sz = numa_enforce_memory_limit(base, size);
                         if (sz)
-                                add_active_range(nid, base >> PAGE_SHIFT,
-                                                 (base >> PAGE_SHIFT)
-                                                 + (sz >> PAGE_SHIFT));
+                                memblock_set_node(base, sz, nid);
                 } while (--ranges);
         }
 }
@@ -802,8 +780,7 @@ new_range:
                                 continue;
                 }
 
-                add_active_range(nid, start >> PAGE_SHIFT,
-                                (start >> PAGE_SHIFT) + (size >> PAGE_SHIFT));
+                memblock_set_node(start, size, nid);
 
                 if (--ranges)
                         goto new_range;
@@ -839,7 +816,8 @@ static void __init setup_nonnuma(void)
                 end_pfn = memblock_region_memory_end_pfn(reg);
 
                 fake_numa_create_new_node(end_pfn, &nid);
-                add_active_range(nid, start_pfn, end_pfn);
+                memblock_set_node(PFN_PHYS(start_pfn),
+                                  PFN_PHYS(end_pfn - start_pfn), nid);
                 node_set_online(nid);
         }
 }
@@ -969,7 +947,7 @@ static struct notifier_block __cpuinitdata ppc64_numa_nb = {
         .priority = 1 /* Must run before sched domains notifier. */
 };
 
-static void mark_reserved_regions_for_nid(int nid)
+static void __init mark_reserved_regions_for_nid(int nid)
 {
         struct pglist_data *node = NODE_DATA(nid);
         struct memblock_region *reg;
@@ -1462,7 +1440,7 @@ int arch_update_cpu_topology(void)
 {
         int cpu, nid, old_nid;
         unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
-        struct sys_device *sysdev;
+        struct device *dev;
 
         for_each_cpu(cpu,&cpu_associativity_changes_mask) {
                 vphn_get_associativity(cpu, associativity);
@@ -1483,9 +1461,9 @@ int arch_update_cpu_topology(void)
                 register_cpu_under_node(cpu, nid);
                 put_online_cpus();
 
-                sysdev = get_cpu_sysdev(cpu);
-                if (sysdev)
-                        kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
+                dev = get_cpu_device(cpu);
+                if (dev)
+                        kobject_uevent(&dev->kobj, KOBJ_CHANGE);
         }
 
         return 1;
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index dc4a5f385e41..ff672bd8fea9 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -94,11 +94,11 @@
 
         srdi    r15,r16,60              /* get region */
         rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4
-        bne-    dtlb_miss_fault_bolted
+        bne-    dtlb_miss_fault_bolted  /* Bail if fault addr is invalid */
 
         rlwinm  r10,r11,32-19,27,27
         rlwimi  r10,r11,32-16,19,19
-        cmpwi   r15,0
+        cmpwi   r15,0                   /* user vs kernel check */
         ori     r10,r10,_PAGE_PRESENT
         oris    r11,r10,_PAGE_ACCESSED@h
 
@@ -120,44 +120,38 @@ tlb_miss_common_bolted:
         rldicl  r15,r16,64-PGDIR_SHIFT+3,64-PGD_INDEX_SIZE-3
         cmpldi  cr0,r14,0
         clrrdi  r15,r15,3
-        beq     tlb_miss_fault_bolted
+        beq     tlb_miss_fault_bolted   /* No PGDIR, bail */
 
 BEGIN_MMU_FTR_SECTION
         /* Set the TLB reservation and search for existing entry. Then load
          * the entry.
          */
         PPC_TLBSRX_DOT(0,r16)
-        ldx     r14,r14,r15
-        beq     normal_tlb_miss_done
+        ldx     r14,r14,r15             /* grab pgd entry */
+        beq     normal_tlb_miss_done    /* tlb exists already, bail */
 MMU_FTR_SECTION_ELSE
-        ldx     r14,r14,r15
+        ldx     r14,r14,r15             /* grab pgd entry */
 ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
 
 #ifndef CONFIG_PPC_64K_PAGES
         rldicl  r15,r16,64-PUD_SHIFT+3,64-PUD_INDEX_SIZE-3
         clrrdi  r15,r15,3
-
-        cmpldi  cr0,r14,0
-        beq     tlb_miss_fault_bolted
-
-        ldx     r14,r14,r15
+        cmpdi   cr0,r14,0
+        bge     tlb_miss_fault_bolted   /* Bad pgd entry or hugepage; bail */
+        ldx     r14,r14,r15             /* grab pud entry */
 #endif /* CONFIG_PPC_64K_PAGES */
 
         rldicl  r15,r16,64-PMD_SHIFT+3,64-PMD_INDEX_SIZE-3
         clrrdi  r15,r15,3
-
-        cmpldi  cr0,r14,0
-        beq     tlb_miss_fault_bolted
-
-        ldx     r14,r14,r15
+        cmpdi   cr0,r14,0
+        bge     tlb_miss_fault_bolted
+        ldx     r14,r14,r15             /* Grab pmd entry */
 
         rldicl  r15,r16,64-PAGE_SHIFT+3,64-PTE_INDEX_SIZE-3
         clrrdi  r15,r15,3
-
-        cmpldi  cr0,r14,0
-        beq     tlb_miss_fault_bolted
-
-        ldx     r14,r14,r15
+        cmpdi   cr0,r14,0
+        bge     tlb_miss_fault_bolted
+        ldx     r14,r14,r15             /* Grab PTE, normal (!huge) page */
 
         /* Check if required permissions are met */
         andc.   r15,r11,r14
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 4e13d6f9023e..df32a838dcfa 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -52,7 +52,7 @@
  * indirect page table entries.
  */
 #ifdef CONFIG_PPC_BOOK3E_MMU
-#ifdef CONFIG_FSL_BOOKE
+#ifdef CONFIG_PPC_FSL_BOOK3E
 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
         [MMU_PAGE_4K] = {
                 .shift  = 12,
@@ -615,7 +615,6 @@ static void __early_init_mmu(int boot_cpu)
 
                 /* limit memory so we dont have linear faults */
                 memblock_enforce_memory_limit(linear_map_top);
-                memblock_analyze();
 
                 patch_exception(0x1c0, exc_data_tlb_miss_bolted_book3e);
                 patch_exception(0x1e0, exc_instruction_tlb_miss_bolted_book3e);
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index 153022971daa..a392d12dd21f 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -1,19 +1,3 @@
-#config BUBINGA
-#       bool "Bubinga"
-#       depends on 40x
-#       default n
-#       select 405EP
-#       help
-#         This option enables support for the IBM 405EP evaluation board.
-
-#config CPCI405
-#       bool "CPCI405"
-#       depends on 40x
-#       default n
-#       select 405GP
-#       help
-#         This option enables support for the CPCI405 board.
-
 config ACADIA
         bool "Acadia"
         depends on 40x
@@ -65,14 +49,6 @@ config MAKALU
         help
           This option enables support for the AMCC PPC405EX board.
 
-#config SYCAMORE
-#       bool "Sycamore"
-#       depends on 40x
-#       default n
-#       select 405GPR
-#       help
-#         This option enables support for the IBM PPC405GPr evaluation board.
-
 config WALNUT
         bool "Walnut"
         depends on 40x
@@ -100,6 +76,16 @@ config XILINX_VIRTEX_GENERIC_BOARD
           Most Virtex designs should use this unless it needs to do some
           special configuration at board probe time.
 
+config OBS600
+        bool "OpenBlockS 600"
+        depends on 40x
+        default n
+        select 405EX
+        select PPC40x_SIMPLE
+        help
+          This option enables support for PlatHome OpenBlockS 600 server
+
+
 config PPC40x_SIMPLE
         bool "Simple PowerPC 40x board support"
         depends on 40x
@@ -173,16 +159,11 @@ config IBM405_ERR77
 config IBM405_ERR51
         bool
 
-#config BIOS_FIXUP
-#       bool
-#       depends on BUBINGA || EP405 || SYCAMORE || WALNUT
-#       default y
-
-#config PPC4xx_DMA
-#       bool "PPC4xx DMA controller support"
-#       depends on 4xx
-
-#config PPC4xx_EDMA
-#       bool
-#       depends on !STB03xxx && PPC4xx_DMA
-#       default y
+config APM8018X
+        bool "APM8018X"
+        depends on 40x
+        default n
+        select PPC40x_SIMPLE
+        help
+          This option enables support for the AppliedMicro APM8018X evaluation
+          board.
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
index e8dd5c5df7d9..97612068fae3 100644
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -55,7 +55,9 @@ static const char *board[] __initdata = {
         "amcc,haleakala",
         "amcc,kilauea",
         "amcc,makalu",
-        "est,hotfoot"
+        "apm,klondike",
+        "est,hotfoot",
+        "plathome,obs600"
 };
 
 static int __init ppc40x_probe(void)
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 762322ce24a9..fcf6bf2ceee9 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -75,7 +75,7 @@ config KATMAI
         select PCI
         select PPC4xx_PCI_EXPRESS
         select PCI_MSI
-        select PCC4xx_MSI
+        select PPC4xx_MSI
         help
           This option enables support for the AMCC PPC440SPe evaluation board.
 
@@ -186,6 +186,16 @@ config ISS4xx
         help
           This option enables support for the IBM ISS simulation environment
 
+config CURRITUCK
+        bool "IBM Currituck (476fpe) Support"
+        depends on PPC_47x
+        default n
+        select SWIOTLB
+        select 476FPE
+        select PPC4xx_PCI_EXPRESS
+        help
+          This option enables support for the IBM Currituck (476fpe) evaluation board
+
 config ICON
         bool "Icon"
         depends on 44x
@@ -197,22 +207,6 @@ config ICON
         help
           This option enables support for the AMCC PPC440SPe evaluation board.
 
-#config LUAN
-#       bool "Luan"
-#       depends on 44x
-#       default n
-#       select 440SP
-#       help
-#         This option enables support for the IBM PPC440SP evaluation board.
-
-#config OCOTEA
-#       bool "Ocotea"
-#       depends on 44x
-#       default n
-#       select 440GX
-#       help
-#         This option enables support for the IBM PPC440GX evaluation board.
-
 config XILINX_VIRTEX440_GENERIC_BOARD
         bool "Generic Xilinx Virtex 5 FXT board support"
         depends on 44x
@@ -308,6 +302,10 @@ config 460SX
         select IBM_EMAC_ZMII
         select IBM_EMAC_TAH
 
+config 476FPE
+        bool
+        select PPC_FPU
+
 config APM821xx
         bool
         select PPC_FPU
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 553db6007217..d03833abec09 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
 obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
 obj-$(CONFIG_ISS4xx)    += iss4xx.o
 obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
+obj-$(CONFIG_CURRITUCK) += currituck.o
diff --git a/arch/powerpc/platforms/44x/currituck.c b/arch/powerpc/platforms/44x/currituck.c
new file mode 100644
index 000000000000..3f6229b5dee0
--- /dev/null
+++ b/arch/powerpc/platforms/44x/currituck.c
@@ -0,0 +1,204 @@
+/*
+ * Currituck board specific routines
+ *
+ * Copyright © 2011 Tony Breeds IBM Corporation
+ *
+ * Based on earlier code:
+ *    Matt Porter <mporter@kernel.crashing.org>
+ *    Copyright 2002-2005 MontaVista Software Inc.
+ *
+ *    Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ *    Copyright (c) 2003-2005 Zultys Technologies
+ *
+ *    Rewritten and ported to the merged powerpc tree:
+ *    Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
+ *    Copyright © 2011 David Kliekamp IBM Corporation
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/memblock.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/rtc.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/ppc4xx.h>
+#include <asm/mpic.h>
+#include <asm/mmu.h>
+
+#include <linux/pci.h>
+
+static __initdata struct of_device_id ppc47x_of_bus[] = {
+        { .compatible = "ibm,plb4", },
+        { .compatible = "ibm,plb6", },
+        { .compatible = "ibm,opb", },
+        { .compatible = "ibm,ebc", },
+        {},
+};
+
+/* The EEPROM is missing and the default values are bogus.  This forces USB in
+ * to EHCI mode */
+static void __devinit quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
+{
+        if (of_machine_is_compatible("ibm,currituck")) {
+                pci_write_config_dword(dev, 0xe0, 0x0114231f);
+                pci_write_config_dword(dev, 0xe4, 0x00006c40);
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
+
+static int __init ppc47x_device_probe(void)
+{
+        of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
+
+        return 0;
+}
+machine_device_initcall(ppc47x, ppc47x_device_probe);
+
+/* We can have either UICs or MPICs */
+static void __init ppc47x_init_irq(void)
+{
+        struct device_node *np;
+
+        /* Find top level interrupt controller */
+        for_each_node_with_property(np, "interrupt-controller") {
+                if (of_get_property(np, "interrupts", NULL) == NULL)
+                        break;
+        }
+        if (np == NULL)
+                panic("Can't find top level interrupt controller");
+
+        /* Check type and do appropriate initialization */
+        if (of_device_is_compatible(np, "chrp,open-pic")) {
+                /* The MPIC driver will get everything it needs from the
+                 * device-tree, just pass 0 to all arguments
+                 */
+                struct mpic *mpic =
+                        mpic_alloc(np, 0, 0, 0, 0, " MPIC     ");
+                BUG_ON(mpic == NULL);
+                mpic_init(mpic);
+                ppc_md.get_irq = mpic_get_irq;
+        } else
+                panic("Unrecognized top level interrupt controller");
+}
+
+#ifdef CONFIG_SMP
+static void __cpuinit smp_ppc47x_setup_cpu(int cpu)
+{
+        mpic_setup_this_cpu();
+}
+
+static int __cpuinit smp_ppc47x_kick_cpu(int cpu)
+{
+        struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
+        const u64 *spin_table_addr_prop;
+        u32 *spin_table;
+        extern void start_secondary_47x(void);
+
+        BUG_ON(cpunode == NULL);
+
+        /* Assume spin table. We could test for the enable-method in
+         * the device-tree but currently there's little point as it's
+         * our only supported method
+         */
+        spin_table_addr_prop =
+                of_get_property(cpunode, "cpu-release-addr", NULL);
+
+        if (spin_table_addr_prop == NULL) {
+                pr_err("CPU%d: Can't start, missing cpu-release-addr !\n",
+                       cpu);
+                return 1;
+        }
+
+        /* Assume it's mapped as part of the linear mapping. This is a bit
+         * fishy but will work fine for now
+         *
+         * XXX: Is there any reason to assume differently?
+         */
+        spin_table = (u32 *)__va(*spin_table_addr_prop);
+        pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
+
+        spin_table[3] = cpu;
+        smp_wmb();
+        spin_table[1] = __pa(start_secondary_47x);
+        mb();
+
+        return 0;
+}
+
+static struct smp_ops_t ppc47x_smp_ops = {
+        .probe          = smp_mpic_probe,
+        .message_pass   = smp_mpic_message_pass,
+        .setup_cpu      = smp_ppc47x_setup_cpu,
+        .kick_cpu       = smp_ppc47x_kick_cpu,
+        .give_timebase  = smp_generic_give_timebase,
+        .take_timebase  = smp_generic_take_timebase,
+};
+
+static void __init ppc47x_smp_init(void)
+{
+        if (mmu_has_feature(MMU_FTR_TYPE_47x))
+                smp_ops = &ppc47x_smp_ops;
+}
+
+#else /* CONFIG_SMP */
+static void __init ppc47x_smp_init(void) { }
+#endif /* CONFIG_SMP */
+
+static void __init ppc47x_setup_arch(void)
+{
+
+        /* No need to check the DMA config as we /know/ our windows are all of
+         * RAM.  Lets hope that doesn't change */
+#ifdef CONFIG_SWIOTLB
+        if (memblock_end_of_DRAM() > 0xffffffff) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_dma_ops);
+                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+        }
+#endif
+        ppc47x_smp_init();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init ppc47x_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (!of_flat_dt_is_compatible(root, "ibm,currituck"))
+                return 0;
+
+        return 1;
+}
+
+/* Use USB controller should have been hardware swizzled but it wasn't :( */
+static void ppc47x_pci_irq_fixup(struct pci_dev *dev)
+{
+        if (dev->vendor == 0x1033 && (dev->device == 0x0035 ||
+                                      dev->device == 0x00e0)) {
+                dev->irq = irq_create_mapping(NULL, 47);
+                pr_info("%s: Mapping irq 47 %d\n", __func__, dev->irq);
+        }
+}
+
+define_machine(ppc47x) {
+        .name                   = "PowerPC 47x",
+        .probe                  = ppc47x_probe,
+        .progress               = udbg_progress,
+        .init_IRQ               = ppc47x_init_irq,
+        .setup_arch             = ppc47x_setup_arch,
+        .pci_irq_fixup          = ppc47x_pci_irq_fixup,
+        .restart                = ppc4xx_reset_system,
+        .calibrate_decr         = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/iss4xx.c b/arch/powerpc/platforms/44x/iss4xx.c
index 19395f18b1db..5b8cdbb82f80 100644
--- a/arch/powerpc/platforms/44x/iss4xx.c
+++ b/arch/powerpc/platforms/44x/iss4xx.c
@@ -71,7 +71,7 @@ static void __init iss4xx_init_irq(void)
                 /* The MPIC driver will get everything it needs from the
                  * device-tree, just pass 0 to all arguments
                  */
-                struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,
+                struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
                                                " MPIC     ");
                 BUG_ON(mpic == NULL);
                 mpic_init(mpic);
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index b3ebce1aec07..c16999802ecf 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -12,7 +12,6 @@ config MPC5121_ADS
         bool "Freescale MPC5121E ADS"
         depends on PPC_MPC512x
         select DEFAULT_UIMAGE
-        select MPC5121_ADS_CPLD
         help
           This option enables support for the MPC5121E ADS board.
 
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c
index aa0d84d22585..464ea8e0292d 100644
--- a/arch/powerpc/platforms/83xx/asp834x.c
+++ b/arch/powerpc/platforms/83xx/asp834x.c
@@ -36,38 +36,7 @@ static void __init asp834x_setup_arch(void)
         mpc834x_usb_cfg();
 }
 
-static void __init asp834x_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        of_node_put(np);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
-
-static struct __initdata of_device_id asp8347_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init asp8347_declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, asp8347_ids, NULL);
-        return 0;
-}
-machine_device_initcall(asp834x, asp8347_declare_of_platform_devices);
+machine_device_initcall(asp834x, mpc83xx_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
@@ -82,7 +51,7 @@ define_machine(asp834x) {
         .name                   = "ASP8347E",
         .probe                  = asp834x_probe,
         .setup_arch             = asp834x_setup_arch,
-        .init_IRQ               = asp834x_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c
index c55129f5760a..65eb792a0d00 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -51,15 +51,14 @@
  */
 static void __init mpc83xx_km_setup_arch(void)
 {
+#ifdef CONFIG_QUICC_ENGINE
         struct device_node *np;
+#endif
 
         if (ppc_md.progress)
                 ppc_md.progress("kmpbec83xx_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 
 #ifdef CONFIG_QUICC_ENGINE
         qe_reset();
@@ -122,54 +121,7 @@ static void __init mpc83xx_km_setup_arch(void)
 #endif                          /* CONFIG_QUICC_ENGINE */
 }
 
-static struct of_device_id kmpbec83xx_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .type = "qe", },
-        { .compatible = "fsl,qe", },
-        {},
-};
-
-static int __init kmeter_declare_of_platform_devices(void)
-{
-        /* Publish the QE devices */
-        of_platform_bus_probe(NULL, kmpbec83xx_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc83xx_km, kmeter_declare_of_platform_devices);
-
-static void __init mpc83xx_km_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_compatible_node(NULL, NULL, "fsl,pq2pro-pic");
-        if (!np) {
-                np = of_find_node_by_type(NULL, "ipic");
-                if (!np)
-                        return;
-        }
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-        of_node_put(np);
-
-#ifdef CONFIG_QUICC_ENGINE
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-        if (!np) {
-                np = of_find_node_by_type(NULL, "qeic");
-                if (!np)
-                        return;
-        }
-        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
-        of_node_put(np);
-#endif                          /* CONFIG_QUICC_ENGINE */
-}
+machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
 
 /* list of the supported boards */
 static char *board[] __initdata = {
@@ -198,7 +150,7 @@ define_machine(mpc83xx_km) {
         .name           = "mpc83xx-km-platform",
         .probe          = mpc83xx_km_probe,
         .setup_arch     = mpc83xx_km_setup_arch,
-        .init_IRQ       = mpc83xx_km_init_IRQ,
+        .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
         .get_irq        = ipic_get_irq,
         .restart        = mpc83xx_restart,
         .time_init      = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c
index f01806c940e1..125336f750c6 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -11,10 +11,15 @@
 
 #include <linux/stddef.h>
 #include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <linux/pci.h>
 
 #include <asm/io.h>
 #include <asm/hw_irq.h>
+#include <asm/ipic.h>
+#include <asm/qe_ic.h>
 #include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
 
 #include "mpc83xx.h"
 
@@ -65,3 +70,75 @@ long __init mpc83xx_time_init(void)
 
         return 0;
 }
+
+void __init mpc83xx_ipic_init_IRQ(void)
+{
+        struct device_node *np;
+
+        /* looking for fsl,pq2pro-pic which is asl compatible with fsl,ipic */
+        np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+        if (!np)
+                np = of_find_node_by_type(NULL, "ipic");
+        if (!np)
+                return;
+
+        ipic_init(np, 0);
+
+        of_node_put(np);
+
+        /* Initialize the default interrupt mapping priorities,
+         * in case the boot rom changed something on us.
+         */
+        ipic_set_default_priority();
+}
+
+#ifdef CONFIG_QUICC_ENGINE
+void __init mpc83xx_qe_init_IRQ(void)
+{
+        struct device_node *np;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+        if (!np) {
+                np = of_find_node_by_type(NULL, "qeic");
+                if (!np)
+                        return;
+        }
+        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
+        of_node_put(np);
+}
+
+void __init mpc83xx_ipic_and_qe_init_IRQ(void)
+{
+        mpc83xx_ipic_init_IRQ();
+        mpc83xx_qe_init_IRQ();
+}
+#endif /* CONFIG_QUICC_ENGINE */
+
+static struct of_device_id __initdata of_bus_ids[] = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .compatible = "simple-bus" },
+        { .compatible = "gianfar" },
+        { .compatible = "gpio-leds", },
+        { .type = "qe", },
+        { .compatible = "fsl,qe", },
+        {},
+};
+
+int __init mpc83xx_declare_of_platform_devices(void)
+{
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+        return 0;
+}
+
+#ifdef CONFIG_PCI
+void __init mpc83xx_setup_pci(void)
+{
+        struct device_node *np;
+
+        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+                mpc83xx_add_bridge(np);
+        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
+                mpc83xx_add_bridge(np);
+}
+#endif
diff --git a/arch/powerpc/platforms/83xx/mpc830x_rdb.c b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
index d0c4e15b7794..4f2d9fea77b7 100644
--- a/arch/powerpc/platforms/83xx/mpc830x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
@@ -27,36 +27,13 @@
  */
 static void __init mpc830x_rdb_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc830x_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8308-pcie")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
         mpc831x_usb_cfg();
 }
 
-static void __init mpc830x_rdb_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
-
 static const char *board[] __initdata = {
         "MPC8308RDB",
         "fsl,mpc8308rdb",
@@ -72,24 +49,13 @@ static int __init mpc830x_rdb_probe(void)
         return of_flat_dt_match(of_get_flat_dt_root(), board);
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .compatible = "simple-bus" },
-        { .compatible = "gianfar" },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-        return 0;
-}
-machine_device_initcall(mpc830x_rdb, declare_of_platform_devices);
+machine_device_initcall(mpc830x_rdb, mpc83xx_declare_of_platform_devices);
 
 define_machine(mpc830x_rdb) {
         .name                   = "MPC830x RDB",
         .probe                  = mpc830x_rdb_probe,
         .setup_arch             = mpc830x_rdb_setup_arch,
-        .init_IRQ               = mpc830x_rdb_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index f859ead49a8d..fa25977c52de 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -28,38 +28,13 @@
  */
 static void __init mpc831x_rdb_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc831x_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
         mpc831x_usb_cfg();
 }
 
-static void __init mpc831x_rdb_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
-
 static const char *board[] __initdata = {
         "MPC8313ERDB",
         "fsl,mpc8315erdb",
@@ -74,25 +49,13 @@ static int __init mpc831x_rdb_probe(void)
         return of_flat_dt_match(of_get_flat_dt_root(), board);
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .compatible = "simple-bus" },
-        { .compatible = "gianfar" },
-        { .compatible = "gpio-leds", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-        return 0;
-}
-machine_device_initcall(mpc831x_rdb, declare_of_platform_devices);
+machine_device_initcall(mpc831x_rdb, mpc83xx_declare_of_platform_devices);
 
 define_machine(mpc831x_rdb) {
         .name                   = "MPC831x RDB",
         .probe                  = mpc831x_rdb_probe,
         .setup_arch             = mpc831x_rdb_setup_arch,
-        .init_IRQ               = mpc831x_rdb_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 32a52896822f..e36bc611dd6e 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -72,10 +72,7 @@ static void __init mpc832x_sys_setup_arch(void)
                 of_node_put(np);
         }
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 
 #ifdef CONFIG_QUICC_ENGINE
         qe_reset();
@@ -101,51 +98,7 @@ static void __init mpc832x_sys_setup_arch(void)
 #endif                          /* CONFIG_QUICC_ENGINE */
 }
 
-static struct of_device_id mpc832x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .type = "qe", },
-        { .compatible = "fsl,qe", },
-        {},
-};
-
-static int __init mpc832x_declare_of_platform_devices(void)
-{
-        /* Publish the QE devices */
-        of_platform_bus_probe(NULL, mpc832x_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc832x_mds, mpc832x_declare_of_platform_devices);
-
-static void __init mpc832x_sys_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-        of_node_put(np);
-
-#ifdef CONFIG_QUICC_ENGINE
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-        if (!np) {
-                np = of_find_node_by_type(NULL, "qeic");
-                if (!np)
-                        return;
-        }
-        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
-        of_node_put(np);
-#endif                          /* CONFIG_QUICC_ENGINE */
-}
+machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
@@ -161,7 +114,7 @@ define_machine(mpc832x_mds) {
         .name           = "MPC832x MDS",
         .probe          = mpc832x_sys_probe,
         .setup_arch     = mpc832x_sys_setup_arch,
-        .init_IRQ       = mpc832x_sys_init_IRQ,
+        .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
         .get_irq        = ipic_get_irq,
         .restart        = mpc83xx_restart,
         .time_init      = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index 17f99745f0e4..eff5baabc3fb 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -193,17 +193,14 @@ machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
  */
 static void __init mpc832x_rdb_setup_arch(void)
 {
-#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
+#if defined(CONFIG_QUICC_ENGINE)
         struct device_node *np;
 #endif
 
         if (ppc_md.progress)
                 ppc_md.progress("mpc832x_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 
 #ifdef CONFIG_QUICC_ENGINE
         qe_reset();
@@ -218,52 +215,7 @@ static void __init mpc832x_rdb_setup_arch(void)
 #endif                          /* CONFIG_QUICC_ENGINE */
 }
 
-static struct of_device_id mpc832x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .type = "qe", },
-        { .compatible = "fsl,qe", },
-        {},
-};
-
-static int __init mpc832x_declare_of_platform_devices(void)
-{
-        /* Publish the QE devices */
-        of_platform_bus_probe(NULL, mpc832x_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc832x_rdb, mpc832x_declare_of_platform_devices);
-
-static void __init mpc832x_rdb_init_IRQ(void)
-{
-
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-        of_node_put(np);
-
-#ifdef CONFIG_QUICC_ENGINE
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-        if (!np) {
-                np = of_find_node_by_type(NULL, "qeic");
-                if (!np)
-                        return;
-        }
-        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
-        of_node_put(np);
-#endif                          /* CONFIG_QUICC_ENGINE */
-}
+machine_device_initcall(mpc832x_rdb, mpc83xx_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
@@ -279,7 +231,7 @@ define_machine(mpc832x_rdb) {
         .name           = "MPC832x RDB",
         .probe          = mpc832x_rdb_probe,
         .setup_arch     = mpc832x_rdb_setup_arch,
-        .init_IRQ       = mpc832x_rdb_init_IRQ,
+        .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
         .get_irq        = ipic_get_irq,
         .restart        = mpc83xx_restart,
         .time_init      = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 6b45969567d4..39849dd1b5bb 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -41,13 +41,12 @@
 
 static struct of_device_id __initdata mpc834x_itx_ids[] = {
         { .compatible = "fsl,pq2pro-localbus", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
         {},
 };
 
 static int __init mpc834x_itx_declare_of_platform_devices(void)
 {
+        mpc83xx_declare_of_platform_devices();
         return of_platform_bus_probe(NULL, mpc834x_itx_ids, NULL);
 }
 machine_device_initcall(mpc834x_itx, mpc834x_itx_declare_of_platform_devices);
@@ -59,37 +58,14 @@ machine_device_initcall(mpc834x_itx, mpc834x_itx_declare_of_platform_devices);
  */
 static void __init mpc834x_itx_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc834x_itx_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 
         mpc834x_usb_cfg();
 }
 
-static void __init mpc834x_itx_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
-
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
  */
@@ -104,7 +80,7 @@ define_machine(mpc834x_itx) {
         .name                   = "MPC834x ITX",
         .probe                  = mpc834x_itx_probe,
         .setup_arch             = mpc834x_itx_setup_arch,
-        .init_IRQ               = mpc834x_itx_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index 041c5177e737..5828d8e97c37 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -77,51 +77,15 @@ static int mpc834xemds_usb_cfg(void)
  */
 static void __init mpc834x_mds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc834x_mds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 
         mpc834xemds_usb_cfg();
 }
 
-static void __init mpc834x_mds_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
-
-static struct of_device_id mpc834x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init mpc834x_declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, mpc834x_ids, NULL);
-        return 0;
-}
-machine_device_initcall(mpc834x_mds, mpc834x_declare_of_platform_devices);
+machine_device_initcall(mpc834x_mds, mpc83xx_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
@@ -137,7 +101,7 @@ define_machine(mpc834x_mds) {
         .name                   = "MPC834x MDS",
         .probe                  = mpc834x_mds_probe,
         .setup_arch             = mpc834x_mds_setup_arch,
-        .init_IRQ               = mpc834x_mds_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index 934cc8c46bbc..ad8e4bcd7d55 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -80,10 +80,7 @@ static void __init mpc836x_mds_setup_arch(void)
                 of_node_put(np);
         }
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 
 #ifdef CONFIG_QUICC_ENGINE
         qe_reset();
@@ -144,23 +141,7 @@ static void __init mpc836x_mds_setup_arch(void)
 #endif                          /* CONFIG_QUICC_ENGINE */
 }
 
-static struct of_device_id mpc836x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .type = "qe", },
-        { .compatible = "fsl,qe", },
-        {},
-};
-
-static int __init mpc836x_declare_of_platform_devices(void)
-{
-        /* Publish the QE devices */
-        of_platform_bus_probe(NULL, mpc836x_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc836x_mds, mpc836x_declare_of_platform_devices);
+machine_device_initcall(mpc836x_mds, mpc83xx_declare_of_platform_devices);
 
 #ifdef CONFIG_QE_USB
 static int __init mpc836x_usb_cfg(void)
@@ -226,34 +207,6 @@ err:
 machine_arch_initcall(mpc836x_mds, mpc836x_usb_cfg);
 #endif /* CONFIG_QE_USB */
 
-static void __init mpc836x_mds_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-        of_node_put(np);
-
-#ifdef CONFIG_QUICC_ENGINE
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-        if (!np) {
-                np = of_find_node_by_type(NULL, "qeic");
-                if (!np)
-                        return;
-        }
-        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
-        of_node_put(np);
-#endif                          /* CONFIG_QUICC_ENGINE */
-}
-
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
  */
@@ -268,7 +221,7 @@ define_machine(mpc836x_mds) {
         .name           = "MPC836x MDS",
         .probe          = mpc836x_mds_probe,
         .setup_arch     = mpc836x_mds_setup_arch,
-        .init_IRQ       = mpc836x_mds_init_IRQ,
+        .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
         .get_irq        = ipic_get_irq,
         .restart        = mpc83xx_restart,
         .time_init      = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
index b0090aac9642..f8769d713d61 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_rdk.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
@@ -27,61 +27,19 @@
 
 #include "mpc83xx.h"
 
-static struct of_device_id __initdata mpc836x_rdk_ids[] = {
-        { .compatible = "simple-bus", },
-        {},
-};
-
-static int __init mpc836x_rdk_declare_of_platform_devices(void)
-{
-        return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL);
-}
-machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices);
+machine_device_initcall(mpc836x_rdk, mpc83xx_declare_of_platform_devices);
 
 static void __init mpc836x_rdk_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc836x_rdk_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
 #ifdef CONFIG_QUICC_ENGINE
         qe_reset();
 #endif
 }
 
-static void __init mpc836x_rdk_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /*
-         * Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-        of_node_put(np);
-#ifdef CONFIG_QUICC_ENGINE
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-        if (!np)
-                return;
-
-        qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
-        of_node_put(np);
-#endif
-}
-
 /*
  * Called very early, MMU is off, device-tree isn't unflattened.
  */
@@ -96,7 +54,7 @@ define_machine(mpc836x_rdk) {
         .name           = "MPC836x RDK",
         .probe          = mpc836x_rdk_probe,
         .setup_arch     = mpc836x_rdk_setup_arch,
-        .init_IRQ       = mpc836x_rdk_init_IRQ,
+        .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
         .get_irq        = ipic_get_irq,
         .restart        = mpc83xx_restart,
         .time_init      = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 83068322abd1..e53a60b6c863 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -79,54 +79,14 @@ out:
  */
 static void __init mpc837x_mds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc837x_mds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
         mpc837xmds_usb_cfg();
 }
 
-static struct of_device_id mpc837x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init mpc837x_declare_of_platform_devices(void)
-{
-        /* Publish platform_device */
-        of_platform_bus_probe(NULL, mpc837x_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc837x_mds, mpc837x_declare_of_platform_devices);
-
-static void __init mpc837x_mds_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
+machine_device_initcall(mpc837x_mds, mpc83xx_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
@@ -142,7 +102,7 @@ define_machine(mpc837x_mds) {
         .name                   = "MPC837x MDS",
         .probe                  = mpc837x_mds_probe,
         .setup_arch             = mpc837x_mds_setup_arch,
-        .init_IRQ               = mpc837x_mds_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 7bafbf2ec0f9..16c9c9cbbb7f 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -50,56 +50,15 @@ static void mpc837x_rdb_sd_cfg(void)
  */
 static void __init mpc837x_rdb_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("mpc837x_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
-                mpc83xx_add_bridge(np);
-#endif
+        mpc83xx_setup_pci();
         mpc837x_usb_cfg();
         mpc837x_rdb_sd_cfg();
 }
 
-static struct of_device_id mpc837x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        { .compatible = "gpio-leds", },
-        {},
-};
-
-static int __init mpc837x_declare_of_platform_devices(void)
-{
-        /* Publish platform_device */
-        of_platform_bus_probe(NULL, mpc837x_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc837x_rdb, mpc837x_declare_of_platform_devices);
-
-static void __init mpc837x_rdb_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-}
+machine_device_initcall(mpc837x_rdb, mpc83xx_declare_of_platform_devices);
 
 static const char *board[] __initdata = {
         "fsl,mpc8377rdb",
@@ -121,7 +80,7 @@ define_machine(mpc837x_rdb) {
         .name                   = "MPC837x RDB/WLAN",
         .probe                  = mpc837x_rdb_probe,
         .setup_arch             = mpc837x_rdb_setup_arch,
-        .init_IRQ               = mpc837x_rdb_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 82a434510d83..0cf74d7ea1c5 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -70,5 +70,21 @@ extern long mpc83xx_time_init(void);
 extern int mpc837x_usb_cfg(void);
 extern int mpc834x_usb_cfg(void);
 extern int mpc831x_usb_cfg(void);
+extern void mpc83xx_ipic_init_IRQ(void);
+#ifdef CONFIG_QUICC_ENGINE
+extern void mpc83xx_qe_init_IRQ(void);
+extern void mpc83xx_ipic_and_qe_init_IRQ(void);
+#else
+static inline void __init mpc83xx_qe_init_IRQ(void) {}
+#define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ
+#endif /* CONFIG_QUICC_ENGINE */
+
+#ifdef CONFIG_PCI
+extern void mpc83xx_setup_pci(void);
+#else
+#define mpc83xx_setup_pci()     do {} while (0)
+#endif
+
+extern int mpc83xx_declare_of_platform_devices(void);
 
 #endif                          /* __MPC83XX_H__ */
diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c
index af41d8c810a8..8a81d7640b1f 100644
--- a/arch/powerpc/platforms/83xx/sbc834x.c
+++ b/arch/powerpc/platforms/83xx/sbc834x.c
@@ -48,52 +48,13 @@
  */
 static void __init sbc834x_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-
         if (ppc_md.progress)
                 ppc_md.progress("sbc834x_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
-                mpc83xx_add_bridge(np);
-#endif
-
+        mpc83xx_setup_pci();
 }
 
-static void __init sbc834x_init_IRQ(void)
-{
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "ipic");
-        if (!np)
-                return;
-
-        ipic_init(np, 0);
-
-        /* Initialize the default interrupt mapping priorities,
-         * in case the boot rom changed something on us.
-         */
-        ipic_set_default_priority();
-
-        of_node_put(np);
-}
-
-static struct __initdata of_device_id sbc834x_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init sbc834x_declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, sbc834x_ids, NULL);
-        return 0;
-}
-machine_device_initcall(sbc834x, sbc834x_declare_of_platform_devices);
+machine_device_initcall(sbc834x, mpc83xx_declare_of_platform_devices);
 
 /*
  * Called very early, MMU is off, device-tree isn't unflattened
@@ -102,14 +63,14 @@ static int __init sbc834x_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
-        return of_flat_dt_is_compatible(root, "SBC834x");
+        return of_flat_dt_is_compatible(root, "SBC834xE");
 }
 
 define_machine(sbc834x) {
-        .name                   = "SBC834x",
+        .name                   = "SBC834xE",
         .probe                  = sbc834x_probe,
         .setup_arch             = sbc834x_setup_arch,
-        .init_IRQ               = sbc834x_init_IRQ,
+        .init_IRQ               = mpc83xx_ipic_init_IRQ,
         .get_irq                = ipic_get_irq,
         .restart                = mpc83xx_restart,
         .time_init              = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 45023e26aea3..d7946be298b6 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -203,7 +203,7 @@ config P3060_QDS
         select PPC_E500MC
         select PHYS_64BIT
         select SWIOTLB
-        select MPC8xxx_GPIO
+        select GPIO_MPC8XXX
         select HAS_RAPIDIO
         select PPC_EPAPR_HV_PIC
         help
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index bc5acb95917a..9cb2d4320dcc 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -3,6 +3,8 @@
 #
 obj-$(CONFIG_SMP) += smp.o
 
+obj-y += common.o
+
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
new file mode 100644
index 000000000000..9fef5302adc1
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -0,0 +1,66 @@
+/*
+ * Routines common to most mpc85xx-based boards.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/of_platform.h>
+
+#include <sysdev/cpm2_pic.h>
+
+#include "mpc85xx.h"
+
+static struct of_device_id __initdata mpc85xx_common_ids[] = {
+        { .type = "soc", },
+        { .compatible = "soc", },
+        { .compatible = "simple-bus", },
+        { .name = "cpm", },
+        { .name = "localbus", },
+        { .compatible = "gianfar", },
+        { .compatible = "fsl,qe", },
+        { .compatible = "fsl,cpm2", },
+        { .compatible = "fsl,srio", },
+        {},
+};
+
+int __init mpc85xx_common_publish_devices(void)
+{
+        return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
+}
+#ifdef CONFIG_CPM2
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        int cascade_irq;
+
+        while ((cascade_irq = cpm2_get_irq()) >= 0)
+                generic_handle_irq(cascade_irq);
+
+        chip->irq_eoi(&desc->irq_data);
+}
+
+
+void __init mpc85xx_cpm2_pic_init(void)
+{
+        struct device_node *np;
+        int irq;
+
+        /* Setup CPM2 PIC */
+        np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
+        if (np == NULL) {
+                printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
+                return;
+        }
+        irq = irq_of_parse_and_map(np, 0);
+        if (irq == NO_IRQ) {
+                of_node_put(np);
+                printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
+                return;
+        }
+
+        cpm2_pic_init(np);
+        of_node_put(np);
+        irq_set_chained_handler(irq, cpm2_cascade);
+}
+#endif
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 802ad110b757..07e3e6c47371 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -31,32 +31,18 @@
 #include <linux/of_platform.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include "smp.h"
 
 void __init corenet_ds_pic_init(void)
 {
         struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-        unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
+        unsigned int flags = MPIC_BIG_ENDIAN |
                                 MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
-        np = of_find_node_by_type(np, "open-pic");
-
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
         if (ppc_md.get_irq == mpic_get_coreint_irq)
                 flags |= MPIC_ENABLE_COREINT;
 
-        mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC  ");
+        mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
 
         mpic_init(mpic);
@@ -65,10 +51,6 @@ void __init corenet_ds_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 void __init corenet_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -77,9 +59,7 @@ void __init corenet_ds_setup_arch(void)
 #endif
         dma_addr_t max = 0xffffffff;
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_PCI
         for_each_node_by_type(np, "pci") {
@@ -112,7 +92,7 @@ static const struct of_device_id of_device_ids[] __devinitconst = {
                 .compatible     = "simple-bus"
         },
         {
-                .compatible     = "fsl,rapidio-delta",
+                .compatible     = "fsl,srio",
         },
         {
                 .compatible     = "fsl,p4080-pcie",
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index c46f9359be15..20f75d7819c6 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -35,6 +35,7 @@
 #include <asm/cpm2.h>
 #include <sysdev/cpm2_pic.h>
 
+#include "mpc85xx.h"
 
 #define KSI8560_CPLD_HVR                0x04 /* Hardware Version Register */
 #define KSI8560_CPLD_PVR                0x08 /* PLD Version Register */
@@ -54,60 +55,15 @@ static void machine_restart(char *cmd)
         for (;;);
 }
 
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        int cascade_irq;
-
-        while ((cascade_irq = cpm2_get_irq()) >= 0)
-                generic_handle_irq(cascade_irq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
-
 static void __init ksi8560_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-#ifdef CONFIG_CPM2
-        int irq;
-#endif
-
-        np = of_find_node_by_type(NULL, "open-pic");
-
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Could not map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
-#ifdef CONFIG_CPM2
-        /* Setup CPM2 PIC */
-        np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
-                return;
-        }
-        irq = irq_of_parse_and_map(np, 0);
-
-        cpm2_pic_init(np);
-        of_node_put(np);
-        irq_set_chained_handler(irq, cpm2_cascade);
-#endif
+        mpc85xx_cpm2_pic_init();
 }
 
 #ifdef CONFIG_CPM2
@@ -215,22 +171,7 @@ static void ksi8560_show_cpuinfo(struct seq_file *m)
         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .type = "soc", },
-        { .type = "simple-bus", },
-        { .name = "cpm", },
-        { .name = "localbus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(ksi8560, declare_of_platform_devices);
+machine_device_initcall(ksi8560, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index f79f2f102141..cf266826682e 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -32,31 +32,15 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 void __init mpc8536_ds_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                          MPIC_PRIMARY | MPIC_WANTS_RESET |
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                          MPIC_WANTS_RESET |
                           MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 }
 
@@ -104,19 +88,7 @@ static void __init mpc8536_ds_setup_arch(void)
         printk("MPC8536 DS board from Freescale Semiconductor\n");
 }
 
-static struct of_device_id __initdata mpc8536_ds_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init mpc8536_ds_publish_devices(void)
-{
-        return of_platform_bus_probe(NULL, mpc8536_ds_ids, NULL);
-}
-machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
+machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx.h b/arch/powerpc/platforms/85xx/mpc85xx.h
new file mode 100644
index 000000000000..2aa7c5dc2c7f
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc85xx.h
@@ -0,0 +1,11 @@
+#ifndef MPC85xx_H
+#define MPC85xx_H
+extern int mpc85xx_common_publish_devices(void);
+
+#ifdef CONFIG_CPM2
+extern void mpc85xx_cpm2_pic_init(void);
+#else
+static inline void __init mpc85xx_cpm2_pic_init(void) {}
+#endif /* CONFIG_CPM2 */
+
+#endif
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3b2c9bb66199..3bebb5173bfc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -35,6 +35,8 @@
 #include <sysdev/cpm2_pic.h>
 #endif
 
+#include "mpc85xx.h"
+
 #ifdef CONFIG_PCI
 static int mpc85xx_exclude_device(struct pci_controller *hose,
                                    u_char bus, u_char devfn)
@@ -46,63 +48,15 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 }
 #endif /* CONFIG_PCI */
 
-#ifdef CONFIG_CPM2
-
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        int cascade_irq;
-
-        while ((cascade_irq = cpm2_get_irq()) >= 0)
-                generic_handle_irq(cascade_irq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
-
-#endif /* CONFIG_CPM2 */
-
 static void __init mpc85xx_ads_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-#ifdef CONFIG_CPM2
-        int irq;
-#endif
-
-        np = of_find_node_by_type(np, "open-pic");
-        if (!np) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Could not map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
-#ifdef CONFIG_CPM2
-        /* Setup CPM2 PIC */
-        np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
-                return;
-        }
-        irq = irq_of_parse_and_map(np, 0);
-
-        cpm2_pic_init(np);
-        of_node_put(np);
-        irq_set_chained_handler(irq, cpm2_cascade);
-#endif
+        mpc85xx_cpm2_pic_init();
 }
 
 /*
@@ -221,23 +175,7 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .name = "soc", },
-        { .type = "soc", },
-        { .name = "cpm", },
-        { .name = "localbus", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
+machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 66cb8d64079f..40f03da616a9 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -46,6 +46,8 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 /* CADMUS info */
 /* xxx - galak, move into device tree */
 #define CADMUS_BASE (0xf8004000)
@@ -177,7 +179,7 @@ static irqreturn_t mpc85xx_8259_cascade_action(int irq, void *dev_id)
 
 static struct irqaction mpc85xxcds_8259_irqaction = {
         .handler = mpc85xx_8259_cascade_action,
-        .flags = IRQF_SHARED,
+        .flags = IRQF_SHARED | IRQF_NO_THREAD,
         .name = "8259 cascade",
 };
 #endif /* PPC_I8259 */
@@ -186,30 +188,10 @@ static struct irqaction mpc85xxcds_8259_irqaction = {
 static void __init mpc85xx_cds_pic_init(void)
 {
         struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-
-        np = of_find_node_by_type(np, "open-pic");
-
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-
-        /* Return the mpic node */
-        of_node_put(np);
-
         mpic_init(mpic);
 }
 
@@ -330,19 +312,7 @@ static int __init mpc85xx_cds_probe(void)
         return of_flat_dt_is_compatible(root, "MPC85xxCDS");
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        return of_platform_bus_probe(NULL, of_bus_ids, NULL);
-}
-machine_device_initcall(mpc85xx_cds, declare_of_platform_devices);
+machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
 
 define_machine(mpc85xx_cds) {
         .name           = "MPC85xx CDS",
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 1b9a8cf1873a..eefbb91e1d61 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -35,6 +35,9 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
 
 #undef DEBUG
 
@@ -60,43 +63,27 @@ static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 void __init mpc85xx_ds_pic_init(void)
 {
         struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
 #ifdef CONFIG_PPC_I8259
+        struct device_node *np;
         struct device_node *cascade_node = NULL;
         int cascade_irq;
 #endif
         unsigned long root = of_get_flat_dt_root();
 
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
         if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
-                mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY |
+                mpic = mpic_alloc(NULL, 0,
                         MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                         MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
         } else {
-                mpic = mpic_alloc(np, r.start,
-                          MPIC_PRIMARY | MPIC_WANTS_RESET |
+                mpic = mpic_alloc(NULL, 0,
+                          MPIC_WANTS_RESET |
                           MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                           MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
         }
 
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
 #ifdef CONFIG_PPC_I8259
@@ -152,9 +139,6 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -187,9 +171,7 @@ static void __init mpc85xx_ds_setup_arch(void)
         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_SWIOTLB
         if (memblock_end_of_DRAM() > max) {
@@ -219,21 +201,9 @@ static int __init mpc8544_ds_probe(void)
         return 0;
 }
 
-static struct of_device_id __initdata mpc85xxds_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init mpc85xxds_publish_devices(void)
-{
-        return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
-}
-machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
-machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
-machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
+machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
+machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
+machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index a23a3ff634c5..1d15a0cd2c82 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -51,6 +51,9 @@
 #include <asm/qe_ic.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
 
 #undef DEBUG
 #ifdef DEBUG
@@ -153,30 +156,7 @@ static int mpc8568_mds_phy_fixups(struct phy_device *phydev)
  * Setup the architecture
  *
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
-
 #ifdef CONFIG_QUICC_ENGINE
-static struct of_device_id mpc85xx_qe_ids[] __initdata = {
-        { .type = "qe", },
-        { .compatible = "fsl,qe", },
-        { },
-};
-
-static void __init mpc85xx_publish_qe_devices(void)
-{
-        struct device_node *np;
-
-        np = of_find_compatible_node(NULL, NULL, "fsl,qe");
-        if (!of_device_is_available(np)) {
-                of_node_put(np);
-                return;
-        }
-
-        of_platform_bus_probe(NULL, mpc85xx_qe_ids, NULL);
-}
-
 static void __init mpc85xx_mds_reset_ucc_phys(void)
 {
         struct device_node *np;
@@ -347,7 +327,6 @@ static void __init mpc85xx_mds_qeic_init(void)
         of_node_put(np);
 }
 #else
-static void __init mpc85xx_publish_qe_devices(void) { }
 static void __init mpc85xx_mds_qe_init(void) { }
 static void __init mpc85xx_mds_qeic_init(void) { }
 #endif  /* CONFIG_QUICC_ENGINE */
@@ -381,9 +360,7 @@ static void __init mpc85xx_mds_setup_arch(void)
         }
 #endif
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
 
         mpc85xx_mds_qe_init();
 
@@ -429,24 +406,11 @@ machine_arch_initcall(mpc8568_mds, board_fixups);
 machine_arch_initcall(mpc8569_mds, board_fixups);
 
 static struct of_device_id mpc85xx_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        { .compatible = "fsl,rapidio-delta", },
         { .compatible = "fsl,mpc8548-guts", },
         { .compatible = "gpio-leds", },
         {},
 };
 
-static struct of_device_id p1021_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
 static int __init mpc85xx_publish_devices(void)
 {
         if (machine_is(mpc8568_mds))
@@ -454,23 +418,15 @@ static int __init mpc85xx_publish_devices(void)
         if (machine_is(mpc8569_mds))
                 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
 
+        mpc85xx_common_publish_devices();
         of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
-        mpc85xx_publish_qe_devices();
-
-        return 0;
-}
-
-static int __init p1021_publish_devices(void)
-{
-        of_platform_bus_probe(NULL, p1021_ids, NULL);
-        mpc85xx_publish_qe_devices();
 
         return 0;
 }
 
 machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
 machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
-machine_device_initcall(p1021_mds, p1021_publish_devices);
+machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
 machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
@@ -478,26 +434,11 @@ machine_arch_initcall(p1021_mds, swiotlb_setup_bus_notifier);
 
 static void __init mpc85xx_mds_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (!np)
-                return;
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
                         MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
 
         mpic_init(mpic);
         mpc85xx_mds_qeic_init();
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index f5ff9110c97e..ccf520e890be 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -29,6 +29,9 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
 
 #undef DEBUG
 
@@ -42,49 +45,28 @@
 void __init mpc85xx_rdb_pic_init(void)
 {
         struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
         unsigned long root = of_get_flat_dt_root();
 
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
         if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
-                mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY |
+                mpic = mpic_alloc(NULL, 0,
                         MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                         MPIC_SINGLE_DEST_CPU,
                         0, 256, " OpenPIC  ");
         } else {
-                mpic = mpic_alloc(np, r.start,
-                  MPIC_PRIMARY | MPIC_WANTS_RESET |
+                mpic = mpic_alloc(NULL, 0,
+                  MPIC_WANTS_RESET |
                   MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                   MPIC_SINGLE_DEST_CPU,
                   0, 256, " OpenPIC  ");
         }
 
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
-
 }
 
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_rdb_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -102,27 +84,12 @@ static void __init mpc85xx_rdb_setup_arch(void)
 
 #endif
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
-
         printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 }
 
-static struct of_device_id __initdata mpc85xxrdb_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init mpc85xxrdb_publish_devices(void)
-{
-        return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL);
-}
-machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices);
-machine_device_initcall(p1020_rdb, mpc85xxrdb_publish_devices);
+machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
index d7387fa7f534..538bc3f57e9d 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -28,33 +28,18 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 void __init p1010_rdb_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start, MPIC_PRIMARY | MPIC_WANTS_RESET |
-          MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+          MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+          MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
           0, 256, " OpenPIC  ");
 
         BUG_ON(mpic == NULL);
-        of_node_put(np);
 
         mpic_init(mpic);
-
 }
 
 
@@ -81,18 +66,7 @@ static void __init p1010_rdb_setup_arch(void)
         printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
 }
 
-static struct of_device_id __initdata p1010rdb_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        {},
-};
-
-static int __init p1010rdb_publish_devices(void)
-{
-        return of_platform_bus_probe(NULL, p1010rdb_ids, NULL);
-}
-machine_device_initcall(p1010_rdb, p1010rdb_publish_devices);
+machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier);
 
 /*
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index fda15716fada..bb3d84f4046f 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -26,6 +26,9 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 #include <asm/fsl_guts.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
 
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
 
@@ -238,38 +241,15 @@ p1022ds_valid_monitor_port(enum fsl_diu_monitor_port port)
 
 void __init p1022_ds_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (!np) {
-                pr_err("Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                pr_err("Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                MPIC_PRIMARY | MPIC_WANTS_RESET |
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                MPIC_WANTS_RESET |
                 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                 MPIC_SINGLE_DEST_CPU,
                 0, 256, " OpenPIC  ");
-
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 }
 
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 /*
  * Setup the architecture
  */
@@ -309,9 +289,7 @@ static void __init p1022_ds_setup_arch(void)
         diu_ops.valid_monitor_port      = p1022ds_valid_monitor_port;
 #endif
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_SWIOTLB
         if (memblock_end_of_DRAM() > max) {
@@ -325,10 +303,6 @@ static void __init p1022_ds_setup_arch(void)
 }
 
 static struct of_device_id __initdata p1022_ds_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
         /* So that the DMA channel nodes can be probed individually: */
         { .compatible = "fsl,eloplus-dma", },
         {},
@@ -336,6 +310,7 @@ static struct of_device_id __initdata p1022_ds_ids[] = {
 
 static int __init p1022_ds_publish_devices(void)
 {
+        mpc85xx_common_publish_devices();
         return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
 }
 machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c
index 835e0b335bfa..d951e7027bb6 100644
--- a/arch/powerpc/platforms/85xx/p1023_rds.c
+++ b/arch/powerpc/platforms/85xx/p1023_rds.c
@@ -30,19 +30,18 @@
 #include <asm/prom.h>
 #include <asm/udbg.h>
 #include <asm/mpic.h>
+#include "smp.h"
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 /* ************************************************************************
  *
  * Setup the architecture
  *
  */
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 static void __init mpc85xx_rds_setup_arch(void)
 {
         struct device_node *np;
@@ -87,53 +86,19 @@ static void __init mpc85xx_rds_setup_arch(void)
                 fsl_add_bridge(np, 0);
 #endif
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
-}
-
-static struct of_device_id p1023_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        {},
-};
-
-
-static int __init p1023_publish_devices(void)
-{
-        of_platform_bus_probe(NULL, p1023_ids, NULL);
-
-        return 0;
 }
 
-machine_device_initcall(p1023_rds, p1023_publish_devices);
+machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
 
 static void __init mpc85xx_rds_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (!np) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
                 MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
                 0, 256, " OpenPIC  ");
 
         BUG_ON(mpic == NULL);
-        of_node_put(np);
 
         mpic_init(mpic);
 }
diff --git a/arch/powerpc/platforms/85xx/p3060_qds.c b/arch/powerpc/platforms/85xx/p3060_qds.c
index 01dcf44871e9..081cf4ac1881 100644
--- a/arch/powerpc/platforms/85xx/p3060_qds.c
+++ b/arch/powerpc/platforms/85xx/p3060_qds.c
@@ -70,7 +70,7 @@ define_machine(p3060_qds) {
         .power_save             = e500_idle,
 };
 
-machine_device_initcall(p3060_qds, declare_of_platform_devices);
+machine_device_initcall(p3060_qds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c
index 14632a971225..184a50784617 100644
--- a/arch/powerpc/platforms/85xx/sbc8548.c
+++ b/arch/powerpc/platforms/85xx/sbc8548.c
@@ -48,35 +48,16 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 static int sbc_rev;
 
 static void __init sbc8548_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-
-        np = of_find_node_by_type(np, "open-pic");
-
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-
-        /* Return the mpic node */
-        of_node_put(np);
-
         mpic_init(mpic);
 }
 
@@ -149,21 +130,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m)
         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .name = "soc", },
-        { .type = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(sbc8548, declare_of_platform_devices);
+machine_device_initcall(sbc8548, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index cebd786dc334..940752e93051 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -32,68 +32,22 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 #ifdef CONFIG_CPM2
 #include <asm/cpm2.h>
 #include <sysdev/cpm2_pic.h>
 #endif
 
-#ifdef CONFIG_CPM2
-
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        int cascade_irq;
-
-        while ((cascade_irq = cpm2_get_irq()) >= 0)
-                generic_handle_irq(cascade_irq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
-
-#endif /* CONFIG_CPM2 */
-
 static void __init sbc8560_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np = NULL;
-#ifdef CONFIG_CPM2
-        int irq;
-#endif
-
-        np = of_find_node_by_type(np, "open-pic");
-        if (!np) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Could not map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
-#ifdef CONFIG_CPM2
-        /* Setup CPM2 PIC */
-        np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
-                return;
-        }
-        irq = irq_of_parse_and_map(np, 0);
-
-        cpm2_pic_init(np);
-        of_node_put(np);
-        irq_set_chained_handler(irq, cpm2_cascade);
-#endif
+        mpc85xx_cpm2_pic_init();
 }
 
 /*
@@ -208,23 +162,7 @@ static void sbc8560_show_cpuinfo(struct seq_file *m)
         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .name = "soc", },
-        { .type = "soc", },
-        { .name = "cpm", },
-        { .name = "localbus", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(sbc8560, declare_of_platform_devices);
+machine_device_initcall(sbc8560, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 2df4785ffd4e..ff4249044a3c 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -27,6 +27,7 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/mpic.h>
+#include "smp.h"
 
 extern void __early_start(void);
 
diff --git a/arch/powerpc/platforms/85xx/smp.h b/arch/powerpc/platforms/85xx/smp.h
new file mode 100644
index 000000000000..e2b44933ff19
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/smp.h
@@ -0,0 +1,15 @@
+#ifndef POWERPC_85XX_SMP_H_
+#define POWERPC_85XX_SMP_H_ 1
+
+#include <linux/init.h>
+
+#ifdef CONFIG_SMP
+void __init mpc85xx_smp_init(void);
+#else
+static inline void mpc85xx_smp_init(void)
+{
+        /* Nothing to do */
+}
+#endif
+
+#endif /* not POWERPC_85XX_SMP_H_ */
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c
index 747d8fb3ab82..18f635906b27 100644
--- a/arch/powerpc/platforms/85xx/socrates.c
+++ b/arch/powerpc/platforms/85xx/socrates.c
@@ -41,32 +41,17 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
 #include "socrates_fpga_pic.h"
 
 static void __init socrates_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
         struct device_node *np;
 
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (!np) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Could not map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
         np = of_find_compatible_node(NULL, NULL, "abb,socrates-fpga-pic");
@@ -96,17 +81,7 @@ static void __init socrates_setup_arch(void)
 #endif
 }
 
-static struct of_device_id __initdata socrates_of_bus_ids[] = {
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init socrates_publish_devices(void)
-{
-        return of_platform_bus_probe(NULL, socrates_of_bus_ids, NULL);
-}
-machine_device_initcall(socrates, socrates_publish_devices);
+machine_device_initcall(socrates, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index 5387e9f06bdb..e9e5234b4e76 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -40,70 +40,21 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 #ifdef CONFIG_CPM2
 #include <asm/cpm2.h>
-#include <sysdev/cpm2_pic.h>
-
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        int cascade_irq;
-
-        while ((cascade_irq = cpm2_get_irq()) >= 0)
-                generic_handle_irq(cascade_irq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
 #endif /* CONFIG_CPM2 */
 
 static void __init stx_gp3_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-#ifdef CONFIG_CPM2
-        int irq;
-#endif
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (!np) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Could not map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
-#ifdef CONFIG_CPM2
-        /* Setup CPM2 PIC */
-        np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
-                return;
-        }
-        irq = irq_of_parse_and_map(np, 0);
-
-        if (irq == NO_IRQ) {
-                of_node_put(np);
-                printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
-                return;
-        }
-
-        cpm2_pic_init(np);
-        of_node_put(np);
-        irq_set_chained_handler(irq, cpm2_cascade);
-#endif
+        mpc85xx_cpm2_pic_init();
 }
 
 /*
@@ -144,19 +95,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m)
         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(stx_gp3, declare_of_platform_devices);
+machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 325de772725a..bf7c89fb75bb 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -38,70 +38,21 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+#include "mpc85xx.h"
+
 #ifdef CONFIG_CPM2
 #include <asm/cpm2.h>
-#include <sysdev/cpm2_pic.h>
-
-static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        int cascade_irq;
-
-        while ((cascade_irq = cpm2_get_irq()) >= 0)
-                generic_handle_irq(cascade_irq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
 #endif /* CONFIG_CPM2 */
 
 static void __init tqm85xx_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-#ifdef CONFIG_CPM2
-        int irq;
-#endif
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (!np) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Could not map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 
-#ifdef CONFIG_CPM2
-        /* Setup CPM2 PIC */
-        np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
-                return;
-        }
-        irq = irq_of_parse_and_map(np, 0);
-
-        if (irq == NO_IRQ) {
-                of_node_put(np);
-                printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
-                return;
-        }
-
-        cpm2_pic_init(np);
-        of_node_put(np);
-        irq_set_chained_handler(irq, cpm2_cascade);
-#endif
+        mpc85xx_cpm2_pic_init();
 }
 
 /*
@@ -173,19 +124,7 @@ static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
                 tqm85xx_ti1520_fixup);
 
-static struct of_device_id __initdata of_bus_ids[] = {
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-
-        return 0;
-}
-machine_device_initcall(tqm85xx, declare_of_platform_devices);
+machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices);
 
 static const char *board[] __initdata = {
         "tqc,tqm8540",
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
index a9dc5e795123..3a69f8b77de6 100644
--- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -32,6 +32,9 @@
 
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
 
 /* A few bit definitions needed for fixups on some boards */
 #define MPC85xx_L2CTL_L2E               0x80000000 /* L2 enable */
@@ -40,29 +43,11 @@
 
 void __init xes_mpc85xx_pic_init(void)
 {
-        struct mpic *mpic;
-        struct resource r;
-        struct device_node *np;
-
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (np == NULL) {
-                printk(KERN_ERR "Could not find open-pic node\n");
-                return;
-        }
-
-        if (of_address_to_resource(np, 0, &r)) {
-                printk(KERN_ERR "Failed to map mpic register space\n");
-                of_node_put(np);
-                return;
-        }
-
-        mpic = mpic_alloc(np, r.start,
-                          MPIC_PRIMARY | MPIC_WANTS_RESET |
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                          MPIC_WANTS_RESET |
                           MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
-        of_node_put(np);
-
         mpic_init(mpic);
 }
 
@@ -136,9 +121,6 @@ static int primary_phb_addr;
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init xes_mpc85xx_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -172,26 +154,12 @@ static void __init xes_mpc85xx_setup_arch(void)
         }
 #endif
 
-#ifdef CONFIG_SMP
         mpc85xx_smp_init();
-#endif
 }
 
-static struct of_device_id __initdata xes_mpc85xx_ids[] = {
-        { .type = "soc", },
-        { .compatible = "soc", },
-        { .compatible = "simple-bus", },
-        { .compatible = "gianfar", },
-        {},
-};
-
-static int __init xes_mpc85xx_publish_devices(void)
-{
-        return of_platform_bus_probe(NULL, xes_mpc85xx_ids, NULL);
-}
-machine_device_initcall(xes_mpc8572, xes_mpc85xx_publish_devices);
-machine_device_initcall(xes_mpc8548, xes_mpc85xx_publish_devices);
-machine_device_initcall(xes_mpc8540, xes_mpc85xx_publish_devices);
+machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
+machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
+machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index b11c3535f350..569262ca499a 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -161,7 +161,7 @@ mpc86xx_time_init(void)
 
 static __initdata struct of_device_id of_bus_ids[] = {
         { .compatible = "simple-bus", },
-        { .compatible = "fsl,rapidio-delta", },
+        { .compatible = "fsl,srio", },
         { .compatible = "gianfar", },
         {},
 };
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
index 8ef8960abda6..52bbfa031531 100644
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -31,26 +31,16 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 
 void __init mpc86xx_init_irq(void)
 {
-        struct mpic *mpic;
-        struct device_node *np;
-        struct resource res;
 #ifdef CONFIG_PPC_I8259
+        struct device_node *np;
         struct device_node *cascade_node = NULL;
         int cascade_irq;
 #endif
 
-        /* Determine PIC address. */
-        np = of_find_node_by_type(NULL, "open-pic");
-        if (np == NULL)
-                return;
-        of_address_to_resource(np, 0, &res);
-
-        mpic = mpic_alloc(np, res.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET |
-                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
-                        MPIC_SINGLE_DEST_CPU,
+        struct mpic *mpic = mpic_alloc(NULL, 0,
+                        MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+                        MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
                         0, 256, " MPIC     ");
-        of_node_put(np);
         BUG_ON(mpic == NULL);
 
         mpic_init(mpic);
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index e4588721ef34..31e1adeaa92a 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -211,6 +211,12 @@ config PPC_PASEMI_CPUFREQ
 
 endmenu
 
+menu "CPUIdle driver"
+
+source "drivers/cpuidle/Kconfig"
+
+endmenu
+
 config PPC601_SYNC_FIX
         bool "Workarounds for PPC601 bugs"
         depends on 6xx && (PPC_PREP || PPC_PMAC)
@@ -347,7 +353,7 @@ config SIMPLE_GPIO
 
 config MCU_MPC8349EMITX
         bool "MPC8349E-mITX MCU driver"
-        depends on I2C && PPC_83xx
+        depends on I2C=y && PPC_83xx
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index fbecae0fbb49..425db18580a2 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -174,7 +174,6 @@ config BOOKE
 config FSL_BOOKE
         bool
         depends on (E200 || E500) && PPC32
-        select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT
         default y
 
 # this is for common code between PPC32 & PPC64 FSL BOOKE
@@ -182,6 +181,7 @@ config PPC_FSL_BOOK3E
         bool
         select FSL_EMB_PERFMON
         select PPC_SMP_MUXED_IPI
+        select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
         default y if FSL_BOOKE
 
 config PTE_64BIT
@@ -236,7 +236,7 @@ config VSX
 
 config PPC_ICSWX
         bool "Support for PowerPC icswx coprocessor instruction"
-        depends on POWER4
+        depends on POWER4 || PPC_A2
         default n
         ---help---
 
@@ -252,6 +252,25 @@ config PPC_ICSWX
 
           If in doubt, say N here.
 
+config PPC_ICSWX_PID
+        bool "icswx requires direct PID management"
+        depends on PPC_ICSWX && POWER4
+        default y
+        ---help---
+          The PID register in server is used explicitly for ICSWX.  In
+          embedded systems PID managment is done by the system.
+
+config PPC_ICSWX_USE_SIGILL
+        bool "Should a bad CT cause a SIGILL?"
+        depends on PPC_ICSWX
+        default n
+        ---help---
+          Should a bad CT used for "non-record form ICSWX" cause an
+          illegal intruction signal or should it be silent as
+          architected.
+
+          If in doubt, say N here.
+
 config SPE
         bool "SPE Support"
         depends on E200 || (E500 && !PPC_E500MC)
@@ -290,7 +309,7 @@ config PPC_BOOK3E_MMU
 
 config PPC_MM_SLICES
         bool
-        default y if (PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
+        default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
         default n
 
 config VIRT_CPU_ACCOUNTING
diff --git a/arch/powerpc/platforms/cell/cbe_thermal.c b/arch/powerpc/platforms/cell/cbe_thermal.c
index 4d4c8c169124..94560db788bf 100644
--- a/arch/powerpc/platforms/cell/cbe_thermal.c
+++ b/arch/powerpc/platforms/cell/cbe_thermal.c
@@ -46,7 +46,7 @@
  */
 
 #include <linux/module.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/cpu.h>
 #include <asm/spu.h>
@@ -59,8 +59,8 @@
 #define TEMP_MIN 65
 #define TEMP_MAX 125
 
-#define SYSDEV_PREFIX_ATTR(_prefix,_name,_mode)                 \
-struct sysdev_attribute attr_ ## _prefix ## _ ## _name = {      \
+#define DEVICE_PREFIX_ATTR(_prefix,_name,_mode)                 \
+struct device_attribute attr_ ## _prefix ## _ ## _name = {      \
         .attr = { .name = __stringify(_name), .mode = _mode },  \
         .show   = _prefix ## _show_ ## _name,                   \
         .store  = _prefix ## _store_ ## _name,                  \
@@ -76,36 +76,36 @@ static inline u8 temp_to_reg(u8 temp)
         return ((temp - TEMP_MIN) >> 1) & 0x3f;
 }
 
-static struct cbe_pmd_regs __iomem *get_pmd_regs(struct sys_device *sysdev)
+static struct cbe_pmd_regs __iomem *get_pmd_regs(struct device *dev)
 {
         struct spu *spu;
 
-        spu = container_of(sysdev, struct spu, sysdev);
+        spu = container_of(dev, struct spu, dev);
 
         return cbe_get_pmd_regs(spu_devnode(spu));
 }
 
 /* returns the value for a given spu in a given register */
-static u8 spu_read_register_value(struct sys_device *sysdev, union spe_reg __iomem *reg)
+static u8 spu_read_register_value(struct device *dev, union spe_reg __iomem *reg)
 {
         union spe_reg value;
         struct spu *spu;
 
-        spu = container_of(sysdev, struct spu, sysdev);
+        spu = container_of(dev, struct spu, dev);
         value.val = in_be64(&reg->val);
 
         return value.spe[spu->spe_id];
 }
 
-static ssize_t spu_show_temp(struct sys_device *sysdev, struct sysdev_attribute *attr,
+static ssize_t spu_show_temp(struct device *dev, struct device_attribute *attr,
                         char *buf)
 {
         u8 value;
         struct cbe_pmd_regs __iomem *pmd_regs;
 
-        pmd_regs = get_pmd_regs(sysdev);
+        pmd_regs = get_pmd_regs(dev);
 
-        value = spu_read_register_value(sysdev, &pmd_regs->ts_ctsr1);
+        value = spu_read_register_value(dev, &pmd_regs->ts_ctsr1);
 
         return sprintf(buf, "%d\n", reg_to_temp(value));
 }
@@ -147,48 +147,48 @@ static ssize_t store_throttle(struct cbe_pmd_regs __iomem *pmd_regs, const char
         return size;
 }
 
-static ssize_t spu_show_throttle_end(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t spu_show_throttle_end(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return show_throttle(get_pmd_regs(sysdev), buf, 0);
+        return show_throttle(get_pmd_regs(dev), buf, 0);
 }
 
-static ssize_t spu_show_throttle_begin(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t spu_show_throttle_begin(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return show_throttle(get_pmd_regs(sysdev), buf, 8);
+        return show_throttle(get_pmd_regs(dev), buf, 8);
 }
 
-static ssize_t spu_show_throttle_full_stop(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t spu_show_throttle_full_stop(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return show_throttle(get_pmd_regs(sysdev), buf, 16);
+        return show_throttle(get_pmd_regs(dev), buf, 16);
 }
 
-static ssize_t spu_store_throttle_end(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, const char *buf, size_t size)
+static ssize_t spu_store_throttle_end(struct device *dev,
+                        struct device_attribute *attr, const char *buf, size_t size)
 {
-        return store_throttle(get_pmd_regs(sysdev), buf, size, 0);
+        return store_throttle(get_pmd_regs(dev), buf, size, 0);
 }
 
-static ssize_t spu_store_throttle_begin(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, const char *buf, size_t size)
+static ssize_t spu_store_throttle_begin(struct device *dev,
+                        struct device_attribute *attr, const char *buf, size_t size)
 {
-        return store_throttle(get_pmd_regs(sysdev), buf, size, 8);
+        return store_throttle(get_pmd_regs(dev), buf, size, 8);
 }
 
-static ssize_t spu_store_throttle_full_stop(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, const char *buf, size_t size)
+static ssize_t spu_store_throttle_full_stop(struct device *dev,
+                        struct device_attribute *attr, const char *buf, size_t size)
 {
-        return store_throttle(get_pmd_regs(sysdev), buf, size, 16);
+        return store_throttle(get_pmd_regs(dev), buf, size, 16);
 }
 
-static ssize_t ppe_show_temp(struct sys_device *sysdev, char *buf, int pos)
+static ssize_t ppe_show_temp(struct device *dev, char *buf, int pos)
 {
         struct cbe_pmd_regs __iomem *pmd_regs;
         u64 value;
 
-        pmd_regs = cbe_get_cpu_pmd_regs(sysdev->id);
+        pmd_regs = cbe_get_cpu_pmd_regs(dev->id);
         value = in_be64(&pmd_regs->ts_ctsr2);
 
         value = (value >> pos) & 0x3f;
@@ -199,64 +199,64 @@ static ssize_t ppe_show_temp(struct sys_device *sysdev, char *buf, int pos)
 
 /* shows the temperature of the DTS on the PPE,
  * located near the linear thermal sensor */
-static ssize_t ppe_show_temp0(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t ppe_show_temp0(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return ppe_show_temp(sysdev, buf, 32);
+        return ppe_show_temp(dev, buf, 32);
 }
 
 /* shows the temperature of the second DTS on the PPE */
-static ssize_t ppe_show_temp1(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t ppe_show_temp1(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return ppe_show_temp(sysdev, buf, 0);
+        return ppe_show_temp(dev, buf, 0);
 }
 
-static ssize_t ppe_show_throttle_end(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t ppe_show_throttle_end(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return show_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, 32);
+        return show_throttle(cbe_get_cpu_pmd_regs(dev->id), buf, 32);
 }
 
-static ssize_t ppe_show_throttle_begin(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t ppe_show_throttle_begin(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return show_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, 40);
+        return show_throttle(cbe_get_cpu_pmd_regs(dev->id), buf, 40);
 }
 
-static ssize_t ppe_show_throttle_full_stop(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t ppe_show_throttle_full_stop(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
-        return show_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, 48);
+        return show_throttle(cbe_get_cpu_pmd_regs(dev->id), buf, 48);
 }
 
-static ssize_t ppe_store_throttle_end(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, const char *buf, size_t size)
+static ssize_t ppe_store_throttle_end(struct device *dev,
+                        struct device_attribute *attr, const char *buf, size_t size)
 {
-        return store_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, size, 32);
+        return store_throttle(cbe_get_cpu_pmd_regs(dev->id), buf, size, 32);
 }
 
-static ssize_t ppe_store_throttle_begin(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, const char *buf, size_t size)
+static ssize_t ppe_store_throttle_begin(struct device *dev,
+                        struct device_attribute *attr, const char *buf, size_t size)
 {
-        return store_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, size, 40);
+        return store_throttle(cbe_get_cpu_pmd_regs(dev->id), buf, size, 40);
 }
 
-static ssize_t ppe_store_throttle_full_stop(struct sys_device *sysdev,
-                        struct sysdev_attribute *attr, const char *buf, size_t size)
+static ssize_t ppe_store_throttle_full_stop(struct device *dev,
+                        struct device_attribute *attr, const char *buf, size_t size)
 {
-        return store_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, size, 48);
+        return store_throttle(cbe_get_cpu_pmd_regs(dev->id), buf, size, 48);
 }
 
 
-static struct sysdev_attribute attr_spu_temperature = {
+static struct device_attribute attr_spu_temperature = {
         .attr = {.name = "temperature", .mode = 0400 },
         .show = spu_show_temp,
 };
 
-static SYSDEV_PREFIX_ATTR(spu, throttle_end, 0600);
-static SYSDEV_PREFIX_ATTR(spu, throttle_begin, 0600);
-static SYSDEV_PREFIX_ATTR(spu, throttle_full_stop, 0600);
+static DEVICE_PREFIX_ATTR(spu, throttle_end, 0600);
+static DEVICE_PREFIX_ATTR(spu, throttle_begin, 0600);
+static DEVICE_PREFIX_ATTR(spu, throttle_full_stop, 0600);
 
 
 static struct attribute *spu_attributes[] = {
@@ -272,19 +272,19 @@ static struct attribute_group spu_attribute_group = {
         .attrs  = spu_attributes,
 };
 
-static struct sysdev_attribute attr_ppe_temperature0 = {
+static struct device_attribute attr_ppe_temperature0 = {
         .attr = {.name = "temperature0", .mode = 0400 },
         .show = ppe_show_temp0,
 };
 
-static struct sysdev_attribute attr_ppe_temperature1 = {
+static struct device_attribute attr_ppe_temperature1 = {
         .attr = {.name = "temperature1", .mode = 0400 },
         .show = ppe_show_temp1,
 };
 
-static SYSDEV_PREFIX_ATTR(ppe, throttle_end, 0600);
-static SYSDEV_PREFIX_ATTR(ppe, throttle_begin, 0600);
-static SYSDEV_PREFIX_ATTR(ppe, throttle_full_stop, 0600);
+static DEVICE_PREFIX_ATTR(ppe, throttle_end, 0600);
+static DEVICE_PREFIX_ATTR(ppe, throttle_begin, 0600);
+static DEVICE_PREFIX_ATTR(ppe, throttle_full_stop, 0600);
 
 static struct attribute *ppe_attributes[] = {
         &attr_ppe_temperature0.attr,
@@ -307,7 +307,7 @@ static int __init init_default_values(void)
 {
         int cpu;
         struct cbe_pmd_regs __iomem *pmd_regs;
-        struct sys_device *sysdev;
+        struct device *dev;
         union ppe_spe_reg tpr;
         union spe_reg str1;
         u64 str2;
@@ -349,14 +349,14 @@ static int __init init_default_values(void)
 
         for_each_possible_cpu (cpu) {
                 pr_debug("processing cpu %d\n", cpu);
-                sysdev = get_cpu_sysdev(cpu);
+                dev = get_cpu_device(cpu);
 
-                if (!sysdev) {
-                        pr_info("invalid sysdev pointer for cbe_thermal\n");
+                if (!dev) {
+                        pr_info("invalid dev pointer for cbe_thermal\n");
                         return -EINVAL;
                 }
 
-                pmd_regs = cbe_get_cpu_pmd_regs(sysdev->id);
+                pmd_regs = cbe_get_cpu_pmd_regs(dev->id);
 
                 if (!pmd_regs) {
                         pr_info("invalid CBE regs pointer for cbe_thermal\n");
@@ -379,8 +379,8 @@ static int __init thermal_init(void)
         int rc = init_default_values();
 
         if (rc == 0) {
-                spu_add_sysdev_attr_group(&spu_attribute_group);
-                cpu_add_sysdev_attr_group(&ppe_attribute_group);
+                spu_add_dev_attr_group(&spu_attribute_group);
+                cpu_add_dev_attr_group(&ppe_attribute_group);
         }
 
         return rc;
@@ -389,8 +389,8 @@ module_init(thermal_init);
 
 static void __exit thermal_exit(void)
 {
-        spu_remove_sysdev_attr_group(&spu_attribute_group);
-        cpu_remove_sysdev_attr_group(&ppe_attribute_group);
+        spu_remove_dev_attr_group(&spu_attribute_group);
+        cpu_remove_dev_attr_group(&ppe_attribute_group);
 }
 module_exit(thermal_exit);
 
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 592c3d51b817..ae9fc7bc17d6 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -1037,6 +1037,8 @@ static int __init cell_iommu_fixed_mapping_init(void)
 
         /* The fixed mapping is only supported on axon machines */
         np = of_find_node_by_name(NULL, "axon");
+        of_node_put(np);
+
         if (!np) {
                 pr_debug("iommu: fixed mapping disabled, no axons found\n");
                 return -1;
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 0fc9b7256126..62002a7edfed 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -184,24 +184,10 @@ static int __init cell_publish_devices(void)
 }
 machine_subsys_initcall(cell, cell_publish_devices);
 
-static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        struct mpic *mpic = irq_desc_get_handler_data(desc);
-        unsigned int virq;
-
-        virq = mpic_get_one_irq(mpic);
-        if (virq != NO_IRQ)
-                generic_handle_irq(virq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
-
 static void __init mpic_init_IRQ(void)
 {
         struct device_node *dn;
         struct mpic *mpic;
-        unsigned int virq;
 
         for (dn = NULL;
              (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
@@ -211,19 +197,10 @@ static void __init mpic_init_IRQ(void)
                 /* The MPIC driver will get everything it needs from the
                  * device-tree, just pass 0 to all arguments
                  */
-                mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC     ");
+                mpic = mpic_alloc(dn, 0, MPIC_SECONDARY, 0, 0, " MPIC     ");
                 if (mpic == NULL)
                         continue;
                 mpic_init(mpic);
-
-                virq = irq_of_parse_and_map(dn, 0);
-                if (virq == NO_IRQ)
-                        continue;
-
-                printk(KERN_INFO "%s : hooking up to IRQ %d\n",
-                       dn->full_name, virq);
-                irq_set_handler_data(virq, mpic);
-                irq_set_chained_handler(virq, cell_mpic_cascade);
         }
 }
 
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index f5c5c762d5a3..4a255cf8cd17 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -23,7 +23,7 @@
 #include <linux/spinlock.h>
 #include <linux/cache.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 
 #include <asm/ptrace.h>
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index e94d3ecdd8bb..8b1213993b10 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -519,31 +519,32 @@ void spu_init_channels(struct spu *spu)
 }
 EXPORT_SYMBOL_GPL(spu_init_channels);
 
-static struct sysdev_class spu_sysdev_class = {
+static struct bus_type spu_subsys = {
         .name = "spu",
+        .dev_name = "spu",
 };
 
-int spu_add_sysdev_attr(struct sysdev_attribute *attr)
+int spu_add_dev_attr(struct device_attribute *attr)
 {
         struct spu *spu;
 
         mutex_lock(&spu_full_list_mutex);
         list_for_each_entry(spu, &spu_full_list, full_list)
-                sysdev_create_file(&spu->sysdev, attr);
+                device_create_file(&spu->dev, attr);
         mutex_unlock(&spu_full_list_mutex);
 
         return 0;
 }
-EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
+EXPORT_SYMBOL_GPL(spu_add_dev_attr);
 
-int spu_add_sysdev_attr_group(struct attribute_group *attrs)
+int spu_add_dev_attr_group(struct attribute_group *attrs)
 {
         struct spu *spu;
         int rc = 0;
 
         mutex_lock(&spu_full_list_mutex);
         list_for_each_entry(spu, &spu_full_list, full_list) {
-                rc = sysfs_create_group(&spu->sysdev.kobj, attrs);
+                rc = sysfs_create_group(&spu->dev.kobj, attrs);
 
                 /* we're in trouble here, but try unwinding anyway */
                 if (rc) {
@@ -552,7 +553,7 @@ int spu_add_sysdev_attr_group(struct attribute_group *attrs)
 
                         list_for_each_entry_continue_reverse(spu,
                                         &spu_full_list, full_list)
-                                sysfs_remove_group(&spu->sysdev.kobj, attrs);
+                                sysfs_remove_group(&spu->dev.kobj, attrs);
                         break;
                 }
         }
@@ -561,45 +562,45 @@ int spu_add_sysdev_attr_group(struct attribute_group *attrs)
 
         return rc;
 }
-EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
+EXPORT_SYMBOL_GPL(spu_add_dev_attr_group);
 
 
-void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
+void spu_remove_dev_attr(struct device_attribute *attr)
 {
         struct spu *spu;
 
         mutex_lock(&spu_full_list_mutex);
         list_for_each_entry(spu, &spu_full_list, full_list)
-                sysdev_remove_file(&spu->sysdev, attr);
+                device_remove_file(&spu->dev, attr);
         mutex_unlock(&spu_full_list_mutex);
 }
-EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
+EXPORT_SYMBOL_GPL(spu_remove_dev_attr);
 
-void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
+void spu_remove_dev_attr_group(struct attribute_group *attrs)
 {
         struct spu *spu;
 
         mutex_lock(&spu_full_list_mutex);
         list_for_each_entry(spu, &spu_full_list, full_list)
-                sysfs_remove_group(&spu->sysdev.kobj, attrs);
+                sysfs_remove_group(&spu->dev.kobj, attrs);
         mutex_unlock(&spu_full_list_mutex);
 }
-EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
+EXPORT_SYMBOL_GPL(spu_remove_dev_attr_group);
 
-static int spu_create_sysdev(struct spu *spu)
+static int spu_create_dev(struct spu *spu)
 {
         int ret;
 
-        spu->sysdev.id = spu->number;
-        spu->sysdev.cls = &spu_sysdev_class;
-        ret = sysdev_register(&spu->sysdev);
+        spu->dev.id = spu->number;
+        spu->dev.bus = &spu_subsys;
+        ret = device_register(&spu->dev);
         if (ret) {
                 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
                                 spu->number);
                 return ret;
         }
 
-        sysfs_add_device_to_node(&spu->sysdev, spu->node);
+        sysfs_add_device_to_node(&spu->dev, spu->node);
 
         return 0;
 }
@@ -635,7 +636,7 @@ static int __init create_spu(void *data)
         if (ret)
                 goto out_destroy;
 
-        ret = spu_create_sysdev(spu);
+        ret = spu_create_dev(spu);
         if (ret)
                 goto out_free_irqs;
 
@@ -692,10 +693,10 @@ static unsigned long long spu_acct_time(struct spu *spu,
 }
 
 
-static ssize_t spu_stat_show(struct sys_device *sysdev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t spu_stat_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
-        struct spu *spu = container_of(sysdev, struct spu, sysdev);
+        struct spu *spu = container_of(dev, struct spu, dev);
 
         return sprintf(buf, "%s %llu %llu %llu %llu "
                       "%llu %llu %llu %llu %llu %llu %llu %llu\n",
@@ -714,7 +715,7 @@ static ssize_t spu_stat_show(struct sys_device *sysdev,
                 spu->stats.libassist);
 }
 
-static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
+static DEVICE_ATTR(stat, 0644, spu_stat_show, NULL);
 
 #ifdef CONFIG_KEXEC
 
@@ -813,8 +814,8 @@ static int __init init_spu_base(void)
         if (!spu_management_ops)
                 goto out;
 
-        /* create sysdev class for spus */
-        ret = sysdev_class_register(&spu_sysdev_class);
+        /* create system subsystem for spus */
+        ret = subsys_system_register(&spu_subsys, NULL);
         if (ret)
                 goto out;
 
@@ -823,7 +824,7 @@ static int __init init_spu_base(void)
         if (ret < 0) {
                 printk(KERN_WARNING "%s: Error initializing spus\n",
                         __func__);
-                goto out_unregister_sysdev_class;
+                goto out_unregister_subsys;
         }
 
         if (ret > 0)
@@ -833,15 +834,15 @@ static int __init init_spu_base(void)
         xmon_register_spus(&spu_full_list);
         crash_register_spus(&spu_full_list);
         mutex_unlock(&spu_full_list_mutex);
-        spu_add_sysdev_attr(&attr_stat);
+        spu_add_dev_attr(&dev_attr_stat);
         register_syscore_ops(&spu_syscore_ops);
 
         spu_init_affinity();
 
         return 0;
 
- out_unregister_sysdev_class:
-        sysdev_class_unregister(&spu_sysdev_class);
+ out_unregister_subsys:
+        bus_unregister(&spu_subsys);
  out:
         return ret;
 }
diff --git a/arch/powerpc/platforms/cell/spu_syscalls.c b/arch/powerpc/platforms/cell/spu_syscalls.c
index 75530d99eda6..714bbfc3162c 100644
--- a/arch/powerpc/platforms/cell/spu_syscalls.c
+++ b/arch/powerpc/platforms/cell/spu_syscalls.c
@@ -65,8 +65,8 @@ static inline void spufs_calls_put(struct spufs_calls *calls) { }
 
 #endif /* CONFIG_SPU_FS_MODULE */
 
-asmlinkage long sys_spu_create(const char __user *name,
-                unsigned int flags, mode_t mode, int neighbor_fd)
+SYSCALL_DEFINE4(spu_create, const char __user *, name, unsigned int, flags,
+        umode_t, mode, int, neighbor_fd)
 {
         long ret;
         struct file *neighbor;
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index e481f6b9a789..d4a094ca96f3 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -74,7 +74,6 @@ spufs_alloc_inode(struct super_block *sb)
 static void spufs_i_callback(struct rcu_head *head)
 {
         struct inode *inode = container_of(head, struct inode, i_rcu);
-        INIT_LIST_HEAD(&inode->i_dentry);
         kmem_cache_free(spufs_inode_cache, SPUFS_I(inode));
 }
 
@@ -92,7 +91,7 @@ spufs_init_once(void *p)
 }
 
 static struct inode *
-spufs_new_inode(struct super_block *sb, int mode)
+spufs_new_inode(struct super_block *sb, umode_t mode)
 {
         struct inode *inode;
 
@@ -124,7 +123,7 @@ spufs_setattr(struct dentry *dentry, struct iattr *attr)
 
 static int
 spufs_new_file(struct super_block *sb, struct dentry *dentry,
-                const struct file_operations *fops, int mode,
+                const struct file_operations *fops, umode_t mode,
                 size_t size, struct spu_context *ctx)
 {
         static const struct inode_operations spufs_file_iops = {
@@ -194,7 +193,7 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir)
 }
 
 static int spufs_fill_dir(struct dentry *dir,
-                const struct spufs_tree_descr *files, int mode,
+                const struct spufs_tree_descr *files, umode_t mode,
                 struct spu_context *ctx)
 {
         struct dentry *dentry, *tmp;
@@ -264,7 +263,7 @@ EXPORT_SYMBOL_GPL(spufs_context_fops);
 
 static int
 spufs_mkdir(struct inode *dir, struct dentry *dentry, unsigned int flags,
-                int mode)
+                umode_t mode)
 {
         int ret;
         struct inode *inode;
@@ -447,7 +446,7 @@ spufs_set_affinity(unsigned int flags, struct spu_context *ctx,
 
 static int
 spufs_create_context(struct inode *inode, struct dentry *dentry,
-                        struct vfsmount *mnt, int flags, int mode,
+                        struct vfsmount *mnt, int flags, umode_t mode,
                         struct file *aff_filp)
 {
         int ret;
@@ -521,7 +520,7 @@ out:
 }
 
 static int
-spufs_mkgang(struct inode *dir, struct dentry *dentry, int mode)
+spufs_mkgang(struct inode *dir, struct dentry *dentry, umode_t mode)
 {
         int ret;
         struct inode *inode;
@@ -584,7 +583,7 @@ out:
 
 static int spufs_create_gang(struct inode *inode,
                         struct dentry *dentry,
-                        struct vfsmount *mnt, int mode)
+                        struct vfsmount *mnt, umode_t mode)
 {
         int ret;
 
@@ -612,7 +611,7 @@ out:
 static struct file_system_type spufs_type;
 
 long spufs_create(struct path *path, struct dentry *dentry,
-                unsigned int flags, mode_t mode, struct file *filp)
+                unsigned int flags, umode_t mode, struct file *filp)
 {
         int ret;
 
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 099245f230b2..67852ade4c01 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -237,7 +237,7 @@ struct spufs_inode_info {
 struct spufs_tree_descr {
         const char *name;
         const struct file_operations *ops;
-        int mode;
+        umode_t mode;
         size_t size;
 };
 
@@ -249,7 +249,7 @@ extern const struct spufs_tree_descr spufs_dir_debug_contents[];
 extern struct spufs_calls spufs_calls;
 long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *status);
 long spufs_create(struct path *nd, struct dentry *dentry, unsigned int flags,
-                        mode_t mode, struct file *filp);
+                        umode_t mode, struct file *filp);
 /* ELF coredump callbacks for writing SPU ELF notes */
 extern int spufs_coredump_extra_notes_size(void);
 extern int spufs_coredump_extra_notes_write(struct file *file, loff_t *foffset);
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c
index 71a5b5207266..8591bb62d7fc 100644
--- a/arch/powerpc/platforms/cell/spufs/syscalls.c
+++ b/arch/powerpc/platforms/cell/spufs/syscalls.c
@@ -60,7 +60,7 @@ out:
 }
 
 static long do_spu_create(const char __user *pathname, unsigned int flags,
-                mode_t mode, struct file *neighbor)
+                umode_t mode, struct file *neighbor)
 {
         struct path path;
         struct dentry *dentry;
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 122786498419..f1f17bb2c33c 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -435,8 +435,7 @@ static void __init chrp_find_openpic(void)
         if (len > 1)
                 isu_size = iranges[3];
 
-        chrp_mpic = mpic_alloc(np, opaddr, MPIC_PRIMARY,
-                               isu_size, 0, " MPIC    ");
+        chrp_mpic = mpic_alloc(np, opaddr, 0, isu_size, 0, " MPIC    ");
         if (chrp_mpic == NULL) {
                 printk(KERN_ERR "Failed to allocate MPIC structure\n");
                 goto bail;
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index 2e9bcf6444c8..9cfcf20c0560 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -148,30 +148,14 @@ static void __init holly_setup_arch(void)
 static void __init holly_init_IRQ(void)
 {
         struct mpic *mpic;
-        phys_addr_t mpic_paddr = 0;
-        struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
         unsigned int cascade_pci_irq;
         struct device_node *tsi_pci;
         struct device_node *cascade_node = NULL;
 #endif
 
-        tsi_pic = of_find_node_by_type(NULL, "open-pic");
-        if (tsi_pic) {
-                unsigned int size;
-                const void *prop = of_get_property(tsi_pic, "reg", &size);
-                mpic_paddr = of_translate_address(tsi_pic, prop);
-        }
-
-        if (mpic_paddr == 0) {
-                printk(KERN_ERR "%s: No tsi108 PIC found !\n", __func__);
-                return;
-        }
-
-        pr_debug("%s: tsi108 pic phys_addr = 0x%x\n", __func__, (u32) mpic_paddr);
-
-        mpic = mpic_alloc(tsi_pic, mpic_paddr,
-                        MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
+        mpic = mpic_alloc(NULL, 0,
+                        MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
                         MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
                         24,
                         NR_IRQS-4, /* num_sources used */
@@ -179,7 +163,7 @@ static void __init holly_init_IRQ(void)
 
         BUG_ON(mpic == NULL);
 
-        mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
+        mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
 
         mpic_init(mpic);
 
@@ -204,7 +188,6 @@ static void __init holly_init_IRQ(void)
 #endif
         /* Configure MPIC outputs to CPU0 */
         tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
-        of_node_put(tsi_pic);
 }
 
 void holly_show_cpuinfo(struct seq_file *m)
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 244f997de791..bcfad92c9cec 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -81,29 +81,19 @@ static void __init linkstation_setup_arch(void)
 static void __init linkstation_init_IRQ(void)
 {
         struct mpic *mpic;
-        struct device_node *dnp;
-        const u32 *prop;
-        int size;
-        phys_addr_t paddr;
 
-        dnp = of_find_node_by_type(NULL, "open-pic");
-        if (dnp == NULL)
-                return;
-
-        prop = of_get_property(dnp, "reg", &size);
-        paddr = (phys_addr_t)of_translate_address(dnp, prop);
-
-        mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32, " EPIC     ");
+        mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
+                        4, 32, " EPIC     ");
         BUG_ON(mpic == NULL);
 
         /* PCI IRQs */
-        mpic_assign_isu(mpic, 0, paddr + 0x10200);
+        mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
 
         /* I2C */
-        mpic_assign_isu(mpic, 1, paddr + 0x11000);
+        mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
 
         /* ttyS0, ttyS1 */
-        mpic_assign_isu(mpic, 2, paddr + 0x11100);
+        mpic_assign_isu(mpic, 2, mpic->paddr + 0x11100);
 
         mpic_init(mpic);
 }
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index f8f33e16c6b6..f3350d786f5b 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -102,31 +102,14 @@ static void __init mpc7448_hpc2_setup_arch(void)
 static void __init mpc7448_hpc2_init_IRQ(void)
 {
         struct mpic *mpic;
-        phys_addr_t mpic_paddr = 0;
-        struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
         unsigned int cascade_pci_irq;
         struct device_node *tsi_pci;
         struct device_node *cascade_node = NULL;
 #endif
 
-        tsi_pic = of_find_node_by_type(NULL, "open-pic");
-        if (tsi_pic) {
-                unsigned int size;
-                const void *prop = of_get_property(tsi_pic, "reg", &size);
-                mpic_paddr = of_translate_address(tsi_pic, prop);
-        }
-
-        if (mpic_paddr == 0) {
-                printk("%s: No tsi108 PIC found !\n", __func__);
-                return;
-        }
-
-        DBG("%s: tsi108 pic phys_addr = 0x%x\n", __func__,
-            (u32) mpic_paddr);
-
-        mpic = mpic_alloc(tsi_pic, mpic_paddr,
-                        MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
+        mpic = mpic_alloc(NULL, 0,
+                        MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
                         MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
                         24,
                         NR_IRQS-4, /* num_sources used */
@@ -134,7 +117,7 @@ static void __init mpc7448_hpc2_init_IRQ(void)
 
         BUG_ON(mpic == NULL);
 
-        mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
+        mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
 
         mpic_init(mpic);
 
@@ -159,7 +142,6 @@ static void __init mpc7448_hpc2_init_IRQ(void)
 #endif
         /* Configure MPIC outputs to CPU0 */
         tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
-        of_node_put(tsi_pic);
 }
 
 void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c
index f1eebcae9bf0..afa638834965 100644
--- a/arch/powerpc/platforms/embedded6xx/storcenter.c
+++ b/arch/powerpc/platforms/embedded6xx/storcenter.c
@@ -83,35 +83,17 @@ static void __init storcenter_setup_arch(void)
 static void __init storcenter_init_IRQ(void)
 {
         struct mpic *mpic;
-        struct device_node *dnp;
-        const void *prop;
-        int size;
-        phys_addr_t paddr;
-
-        dnp = of_find_node_by_type(NULL, "open-pic");
-        if (dnp == NULL)
-                return;
-
-        prop = of_get_property(dnp, "reg", &size);
-        if (prop == NULL) {
-                of_node_put(dnp);
-                return;
-        }
-
-        paddr = (phys_addr_t)of_translate_address(dnp, prop);
-        mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
-                        16, 32, " OpenPIC  ");
-
-        of_node_put(dnp);
 
+        mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
+                        16, 32, " OpenPIC  ");
         BUG_ON(mpic == NULL);
 
         /*
          * 16 Serial Interrupts followed by 16 Internal Interrupts.
          * I2C is the second internal, so it is at 17, 0x11020.
          */
-        mpic_assign_isu(mpic, 0, paddr + 0x10200);
-        mpic_assign_isu(mpic, 1, paddr + 0x11000);
+        mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
+        mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
 
         mpic_init(mpic);
 }
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c b/arch/powerpc/platforms/embedded6xx/wii.c
index 1b5dc1a2e145..6d8dadf19f0b 100644
--- a/arch/powerpc/platforms/embedded6xx/wii.c
+++ b/arch/powerpc/platforms/embedded6xx/wii.c
@@ -79,24 +79,19 @@ void __init wii_memory_fixups(void)
         BUG_ON(memblock.memory.cnt != 2);
         BUG_ON(!page_aligned(p[0].base) || !page_aligned(p[1].base));
 
-        p[0].size = _ALIGN_DOWN(p[0].size, PAGE_SIZE);
-        p[1].size = _ALIGN_DOWN(p[1].size, PAGE_SIZE);
+        /* trim unaligned tail */
+        memblock_remove(ALIGN(p[1].base + p[1].size, PAGE_SIZE),
+                        (phys_addr_t)ULLONG_MAX);
 
-        wii_hole_start = p[0].base + p[0].size;
+        /* determine hole, add & reserve them */
+        wii_hole_start = ALIGN(p[0].base + p[0].size, PAGE_SIZE);
         wii_hole_size = p[1].base - wii_hole_start;
-
-        pr_info("MEM1: <%08llx %08llx>\n", p[0].base, p[0].size);
-        pr_info("HOLE: <%08lx %08lx>\n", wii_hole_start, wii_hole_size);
-        pr_info("MEM2: <%08llx %08llx>\n", p[1].base, p[1].size);
-
-        p[0].size += wii_hole_size + p[1].size;
-
-        memblock.memory.cnt = 1;
-        memblock_analyze();
-
-        /* reserve the hole */
+        memblock_add(wii_hole_start, wii_hole_size);
         memblock_reserve(wii_hole_start, wii_hole_size);
 
+        BUG_ON(memblock.memory.cnt != 1);
+        __memblock_dump_all();
+
         /* allow ioremapping the address space in the hole */
         __allow_ioremap_reserved = 1;
 }
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index ea0acbd8966d..8fc62586a973 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -563,7 +563,8 @@ static void yield_shared_processor(void)
 static void iseries_shared_idle(void)
 {
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched() && !hvlpevent_is_pending()) {
                         local_irq_disable();
                         ppc64_runlatch_off();
@@ -577,7 +578,8 @@ static void iseries_shared_idle(void)
                 }
 
                 ppc64_runlatch_on();
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
 
                 if (hvlpevent_is_pending())
                         process_iSeries_events();
@@ -593,7 +595,8 @@ static void iseries_dedicated_idle(void)
         set_thread_flag(TIF_POLLING_NRFLAG);
 
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 if (!need_resched()) {
                         while (!need_resched()) {
                                 ppc64_runlatch_off();
@@ -610,7 +613,8 @@ static void iseries_dedicated_idle(void)
                 }
 
                 ppc64_runlatch_on();
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/powerpc/platforms/iseries/smp.c b/arch/powerpc/platforms/iseries/smp.c
index 7e2a5515ed76..02df49fb59f0 100644
--- a/arch/powerpc/platforms/iseries/smp.c
+++ b/arch/powerpc/platforms/iseries/smp.c
@@ -24,7 +24,7 @@
 #include <linux/spinlock.h>
 #include <linux/cache.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 
 #include <asm/ptrace.h>
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index dd2e48b28508..401e3f3f74c8 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -207,6 +207,54 @@ static volatile void __iomem *u3_ht_cfg_access(struct pci_controller* hose,
                 return hose->cfg_data + u3_ht_cfa1(bus, devfn, offset);
 }
 
+static int u3_ht_root_read_config(struct pci_controller *hose, u8 offset,
+                                  int len, u32 *val)
+{
+        volatile void __iomem *addr;
+
+        addr = hose->cfg_addr;
+        addr += ((offset & ~3) << 2) + (4 - len - (offset & 3));
+
+        switch (len) {
+        case 1:
+                *val = in_8(addr);
+                break;
+        case 2:
+                *val = in_be16(addr);
+                break;
+        default:
+                *val = in_be32(addr);
+                break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
+                                  int len, u32 val)
+{
+        volatile void __iomem *addr;
+
+        addr = hose->cfg_addr + ((offset & ~3) << 2) + (4 - len - (offset & 3));
+
+        if (offset >= PCI_BASE_ADDRESS_0 && offset < PCI_CAPABILITY_LIST)
+                return PCIBIOS_SUCCESSFUL;
+
+        switch (len) {
+        case 1:
+                out_8(addr, val);
+                break;
+        case 2:
+                out_be16(addr, val);
+                break;
+        default:
+                out_be32(addr, val);
+                break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
 static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
                              int offset, int len, u32 *val)
 {
@@ -217,6 +265,9 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
         if (hose == NULL)
                 return PCIBIOS_DEVICE_NOT_FOUND;
 
+        if (bus->number == hose->first_busno && devfn == PCI_DEVFN(0, 0))
+                return u3_ht_root_read_config(hose, offset, len, val);
+
         if (offset > 0xff)
                 return PCIBIOS_BAD_REGISTER_NUMBER;
 
@@ -252,6 +303,9 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
         if (hose == NULL)
                 return PCIBIOS_DEVICE_NOT_FOUND;
 
+        if (bus->number == hose->first_busno && devfn == PCI_DEVFN(0, 0))
+                return u3_ht_root_write_config(hose, offset, len, val);
+
         if (offset > 0xff)
                 return PCIBIOS_BAD_REGISTER_NUMBER;
 
@@ -428,6 +482,7 @@ static void __init setup_u3_ht(struct pci_controller* hose)
          * reg_property and using some accessor functions instead
          */
         hose->cfg_data = ioremap(0xf2000000, 0x02000000);
+        hose->cfg_addr = ioremap(0xf8070000, 0x1000);
 
         hose->first_busno = 0;
         hose->last_busno = 0xef;
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 4c372047c94e..0bcbfe7b2c55 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -221,7 +221,7 @@ static void __init maple_init_IRQ(void)
         unsigned long openpic_addr = 0;
         int naddr, n, i, opplen, has_isus = 0;
         struct mpic *mpic;
-        unsigned int flags = MPIC_PRIMARY;
+        unsigned int flags = 0;
 
         /* Locate MPIC in the device-tree. Note that there is a bug
          * in Maple device-tree where the type of the controller is
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 6f3558210554..98b7a7c13176 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -224,7 +224,7 @@ static __init void pas_init_IRQ(void)
         openpic_addr = of_read_number(opprop, naddr);
         printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
 
-        mpic_flags = MPIC_PRIMARY | MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
+        mpic_flags = MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
 
         nmiprop = of_get_property(mpic_node, "nmi-source", NULL);
         if (nmiprop)
@@ -234,7 +234,7 @@ static __init void pas_init_IRQ(void)
                           mpic_flags, 0, 0, "PASEMI-OPIC");
         BUG_ON(!mpic);
 
-        mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
+        mpic_assign_isu(mpic, 0, mpic->paddr + 0x10000);
         mpic_init(mpic);
         /* The NMI/MCK source needs to be prio 15 */
         if (nmiprop) {
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 04af5f48b4eb..1fc386a23f18 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -23,7 +23,7 @@
 #include <linux/pmu.h>
 #include <linux/cpufreq.h>
 #include <linux/init.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/hardirq.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 901bfbddc3dd..7761aabfc293 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -52,13 +52,8 @@ struct device_node *of_irq_dflt_pic;
 /* Default addresses */
 static volatile struct pmac_irq_hw __iomem *pmac_irq_hw[4];
 
-#define GC_LEVEL_MASK           0x3ff00000
-#define OHARE_LEVEL_MASK        0x1ff00000
-#define HEATHROW_LEVEL_MASK     0x1ff00000
-
 static int max_irqs;
 static int max_real_irqs;
-static u32 level_mask[4];
 
 static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
 
@@ -217,8 +212,7 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id)
         for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) {
                 int i = irq >> 5;
                 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
-                /* We must read level interrupts from the level register */
-                bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]);
+                bits |= in_le32(&pmac_irq_hw[i]->level);
                 bits &= ppc_cached_irq_mask[i];
                 if (bits == 0)
                         continue;
@@ -248,8 +242,7 @@ static unsigned int pmac_pic_get_irq(void)
         for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
                 int i = irq >> 5;
                 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
-                /* We must read level interrupts from the level register */
-                bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]);
+                bits |= in_le32(&pmac_irq_hw[i]->level);
                 bits &= ppc_cached_irq_mask[i];
                 if (bits == 0)
                         continue;
@@ -284,19 +277,14 @@ static int pmac_pic_host_match(struct irq_host *h, struct device_node *node)
 static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
                              irq_hw_number_t hw)
 {
-        int level;
-
         if (hw >= max_irqs)
                 return -EINVAL;
 
         /* Mark level interrupts, set delayed disable for edge ones and set
          * handlers
          */
-        level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f)));
-        if (level)
-                irq_set_status_flags(virq, IRQ_LEVEL);
-        irq_set_chip_and_handler(virq, &pmac_pic,
-                                 level ? handle_level_irq : handle_edge_irq);
+        irq_set_status_flags(virq, IRQ_LEVEL);
+        irq_set_chip_and_handler(virq, &pmac_pic, handle_level_irq);
         return 0;
 }
 
@@ -334,21 +322,14 @@ static void __init pmac_pic_probe_oldstyle(void)
 
         if ((master = of_find_node_by_name(NULL, "gc")) != NULL) {
                 max_irqs = max_real_irqs = 32;
-                level_mask[0] = GC_LEVEL_MASK;
         } else if ((master = of_find_node_by_name(NULL, "ohare")) != NULL) {
                 max_irqs = max_real_irqs = 32;
-                level_mask[0] = OHARE_LEVEL_MASK;
-
                 /* We might have a second cascaded ohare */
                 slave = of_find_node_by_name(NULL, "pci106b,7");
-                if (slave) {
+                if (slave)
                         max_irqs = 64;
-                        level_mask[1] = OHARE_LEVEL_MASK;
-                }
         } else if ((master = of_find_node_by_name(NULL, "mac-io")) != NULL) {
                 max_irqs = max_real_irqs = 64;
-                level_mask[0] = HEATHROW_LEVEL_MASK;
-                level_mask[1] = 0;
 
                 /* We might have a second cascaded heathrow */
                 slave = of_find_node_by_name(master, "mac-io");
@@ -363,11 +344,8 @@ static void __init pmac_pic_probe_oldstyle(void)
                 }
 
                 /* We found a slave */
-                if (slave) {
+                if (slave)
                         max_irqs = 128;
-                        level_mask[2] = HEATHROW_LEVEL_MASK;
-                        level_mask[3] = 0;
-                }
         }
         BUG_ON(master == NULL);
 
@@ -464,18 +442,6 @@ int of_irq_map_oldworld(struct device_node *device, int index,
 }
 #endif /* CONFIG_PPC32 */
 
-static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_desc_get_chip(desc);
-        struct mpic *mpic = irq_desc_get_handler_data(desc);
-        unsigned int cascade_irq = mpic_get_one_irq(mpic);
-
-        if (cascade_irq != NO_IRQ)
-                generic_handle_irq(cascade_irq);
-
-        chip->irq_eoi(&desc->irq_data);
-}
-
 static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
 {
 #if defined(CONFIG_XMON) && defined(CONFIG_PPC32)
@@ -498,14 +464,8 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
                                                 int master)
 {
         const char *name = master ? " MPIC 1   " : " MPIC 2   ";
-        struct resource r;
         struct mpic *mpic;
-        unsigned int flags = master ? MPIC_PRIMARY : 0;
-        int rc;
-
-        rc = of_address_to_resource(np, 0, &r);
-        if (rc)
-                return NULL;
+        unsigned int flags = master ? 0 : MPIC_SECONDARY;
 
         pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0);
 
@@ -519,7 +479,7 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
         if (master && (flags & MPIC_BIG_ENDIAN))
                 flags |= MPIC_U3_HT_IRQS;
 
-        mpic = mpic_alloc(np, r.start, flags, 0, 0, name);
+        mpic = mpic_alloc(np, 0, flags, 0, 0, name);
         if (mpic == NULL)
                 return NULL;
 
@@ -532,7 +492,6 @@ static int __init pmac_pic_probe_mpic(void)
 {
         struct mpic *mpic1, *mpic2;
         struct device_node *np, *master = NULL, *slave = NULL;
-        unsigned int cascade;
 
         /* We can have up to 2 MPICs cascaded */
         for (np = NULL; (np = of_find_node_by_type(np, "open-pic"))
@@ -568,27 +527,14 @@ static int __init pmac_pic_probe_mpic(void)
 
         of_node_put(master);
 
-        /* No slave, let's go out */
-        if (slave == NULL)
-                return 0;
-
-        /* Get/Map slave interrupt */
-        cascade = irq_of_parse_and_map(slave, 0);
-        if (cascade == NO_IRQ) {
-                printk(KERN_ERR "Failed to map cascade IRQ\n");
-                return 0;
-        }
-
-        mpic2 = pmac_setup_one_mpic(slave, 0);
-        if (mpic2 == NULL) {
-                printk(KERN_ERR "Failed to setup slave MPIC\n");
+        /* Set up a cascaded controller, if present */
+        if (slave) {
+                mpic2 = pmac_setup_one_mpic(slave, 0);
+                if (mpic2 == NULL)
+                        printk(KERN_ERR "Failed to setup slave MPIC\n");
                 of_node_put(slave);
-                return 0;
         }
-        irq_set_handler_data(cascade, mpic2);
-        irq_set_chained_handler(cascade, pmac_u3_cascade);
 
-        of_node_put(slave);
         return 0;
 }
 
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 96580b189ec2..970ea1de4298 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -494,11 +494,15 @@ static int __init pmac_declare_of_platform_devices(void)
                 return -1;
 
         np = of_find_node_by_name(NULL, "valkyrie");
-        if (np)
+        if (np) {
                 of_platform_device_create(np, "valkyrie", NULL);
+                of_node_put(np);
+        }
         np = of_find_node_by_name(NULL, "platinum");
-        if (np)
+        if (np) {
                 of_platform_device_create(np, "platinum", NULL);
+                of_node_put(np);
+        }
         np = of_find_node_by_type(NULL, "smu");
         if (np) {
                 of_platform_device_create(np, "smu", NULL);
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 9b6a820bdd7d..44d769258ebf 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -200,7 +200,7 @@ static int psurge_secondary_ipi_init(void)
 
         if (psurge_secondary_virq)
                 rc = request_irq(psurge_secondary_virq, psurge_ipi_intr,
-                        IRQF_PERCPU, "IPI", NULL);
+                        IRQF_PERCPU | IRQF_NO_THREAD, "IPI", NULL);
 
         if (rc)
                 pr_err("Failed to setup secondary cpu IPI\n");
@@ -408,13 +408,13 @@ static int __init smp_psurge_kick_cpu(int nr)
 
 static struct irqaction psurge_irqaction = {
         .handler = psurge_ipi_intr,
-        .flags = IRQF_PERCPU,
+        .flags = IRQF_PERCPU | IRQF_NO_THREAD,
         .name = "primary IPI",
 };
 
 static void __init smp_psurge_setup_cpu(int cpu_nr)
 {
-        if (cpu_nr != 0)
+        if (cpu_nr != 0 || !psurge_start)
                 return;
 
         /* reset the entry point so if we get another intr we won't
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index 31853008b418..bcc3cb48a44e 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -2,4 +2,4 @@ obj-y			+= setup.o opal-takeover.o opal-wrappers.o opal.o
 obj-y                   += opal-rtc.o opal-nvram.o
 
 obj-$(CONFIG_SMP)       += smp.o
-obj-$(CONFIG_PCI)       += pci.o pci-p5ioc2.o
+obj-$(CONFIG_PCI)       += pci.o pci-p5ioc2.o pci-ioda.o
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 4a3f46d8533e..3bb07e5e43cd 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -99,3 +99,11 @@ OPAL_CALL(opal_write_oppanel,			OPAL_WRITE_OPPANEL);
 OPAL_CALL(opal_pci_map_pe_dma_window,           OPAL_PCI_MAP_PE_DMA_WINDOW);
 OPAL_CALL(opal_pci_map_pe_dma_window_real,      OPAL_PCI_MAP_PE_DMA_WINDOW_REAL);
 OPAL_CALL(opal_pci_reset,                       OPAL_PCI_RESET);
+OPAL_CALL(opal_pci_get_hub_diag_data,           OPAL_PCI_GET_HUB_DIAG_DATA);
+OPAL_CALL(opal_pci_get_phb_diag_data,           OPAL_PCI_GET_PHB_DIAG_DATA);
+OPAL_CALL(opal_pci_fence_phb,                   OPAL_PCI_FENCE_PHB);
+OPAL_CALL(opal_pci_reinit,                      OPAL_PCI_REINIT);
+OPAL_CALL(opal_pci_mask_pe_error,               OPAL_PCI_MASK_PE_ERROR);
+OPAL_CALL(opal_set_slot_led_status,             OPAL_SET_SLOT_LED_STATUS);
+OPAL_CALL(opal_get_epow_status,                 OPAL_GET_EPOW_STATUS);
+OPAL_CALL(opal_set_system_attention_led,        OPAL_SET_SYSTEM_ATTENTION_LED);
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
new file mode 100644
index 000000000000..f31162cfdaa9
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -0,0 +1,1330 @@
+/*
+ * Support PCI/PCIe on PowerNV platforms
+ *
+ * Copyright 2011 Benjamin Herrenschmidt, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/msi.h>
+
+#include <asm/sections.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/machdep.h>
+#include <asm/ppc-pci.h>
+#include <asm/opal.h>
+#include <asm/iommu.h>
+#include <asm/tce.h>
+#include <asm/abs_addr.h>
+
+#include "powernv.h"
+#include "pci.h"
+
+struct resource_wrap {
+        struct list_head        link;
+        resource_size_t         size;
+        resource_size_t         align;
+        struct pci_dev          *dev;   /* Set if it's a device */
+        struct pci_bus          *bus;   /* Set if it's a bridge */
+};
+
+static int __pe_printk(const char *level, const struct pnv_ioda_pe *pe,
+                       struct va_format *vaf)
+{
+        char pfix[32];
+
+        if (pe->pdev)
+                strlcpy(pfix, dev_name(&pe->pdev->dev), sizeof(pfix));
+        else
+                sprintf(pfix, "%04x:%02x     ",
+                        pci_domain_nr(pe->pbus), pe->pbus->number);
+        return printk("pci %s%s: [PE# %.3d] %pV", level, pfix, pe->pe_number, vaf);
+}
+
+#define define_pe_printk_level(func, kern_level)                \
+static int func(const struct pnv_ioda_pe *pe, const char *fmt, ...)     \
+{                                                               \
+        struct va_format vaf;                                   \
+        va_list args;                                           \
+        int r;                                                  \
+                                                                \
+        va_start(args, fmt);                                    \
+                                                                \
+        vaf.fmt = fmt;                                          \
+        vaf.va = &args;                                         \
+                                                                \
+        r = __pe_printk(kern_level, pe, &vaf);                  \
+        va_end(args);                                           \
+                                                                \
+        return r;                                               \
+}                                                               \
+
+define_pe_printk_level(pe_err, KERN_ERR);
+define_pe_printk_level(pe_warn, KERN_WARNING);
+define_pe_printk_level(pe_info, KERN_INFO);
+
+
+/* Calculate resource usage & alignment requirement of a single
+ * device. This will also assign all resources within the device
+ * for a given type starting at 0 for the biggest one and then
+ * assigning in decreasing order of size.
+ */
+static void __devinit pnv_ioda_calc_dev(struct pci_dev *dev, unsigned int flags,
+                                        resource_size_t *size,
+                                        resource_size_t *align)
+{
+        resource_size_t start;
+        struct resource *r;
+        int i;
+
+        pr_devel("  -> CDR %s\n", pci_name(dev));
+
+        *size = *align = 0;
+
+        /* Clear the resources out and mark them all unset */
+        for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                r = &dev->resource[i];
+                if (!(r->flags & flags))
+                    continue;
+                if (r->start) {
+                        r->end -= r->start;
+                        r->start = 0;
+                }
+                r->flags |= IORESOURCE_UNSET;
+        }
+
+        /* We currently keep all memory resources together, we
+         * will handle prefetch & 64-bit separately in the future
+         * but for now we stick everybody in M32
+         */
+        start = 0;
+        for (;;) {
+                resource_size_t max_size = 0;
+                int max_no = -1;
+
+                /* Find next biggest resource */
+                for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                        r = &dev->resource[i];
+                        if (!(r->flags & IORESOURCE_UNSET) ||
+                            !(r->flags & flags))
+                                continue;
+                        if (resource_size(r) > max_size) {
+                                max_size = resource_size(r);
+                                max_no = i;
+                        }
+                }
+                if (max_no < 0)
+                        break;
+                r = &dev->resource[max_no];
+                if (max_size > *align)
+                        *align = max_size;
+                *size += max_size;
+                r->start = start;
+                start += max_size;
+                r->end = r->start + max_size - 1;
+                r->flags &= ~IORESOURCE_UNSET;
+                pr_devel("  ->     R%d %016llx..%016llx\n",
+                         max_no, r->start, r->end);
+        }
+        pr_devel("  <- CDR %s size=%llx align=%llx\n",
+                 pci_name(dev), *size, *align);
+}
+
+/* Allocate a resource "wrap" for a given device or bridge and
+ * insert it at the right position in the sorted list
+ */
+static void __devinit pnv_ioda_add_wrap(struct list_head *list,
+                                        struct pci_bus *bus,
+                                        struct pci_dev *dev,
+                                        resource_size_t size,
+                                        resource_size_t align)
+{
+        struct resource_wrap *w1, *w = kzalloc(sizeof(*w), GFP_KERNEL);
+
+        w->size = size;
+        w->align = align;
+        w->dev = dev;
+        w->bus = bus;
+
+        list_for_each_entry(w1, list, link) {
+                if (w1->align < align) {
+                        list_add_tail(&w->link, &w1->link);
+                        return;
+                }
+        }
+        list_add_tail(&w->link, list);
+}
+
+/* Offset device resources of a given type */
+static void __devinit pnv_ioda_offset_dev(struct pci_dev *dev,
+                                          unsigned int flags,
+                                          resource_size_t offset)
+{
+        struct resource *r;
+        int i;
+
+        pr_devel("  -> ODR %s [%x] +%016llx\n", pci_name(dev), flags, offset);
+
+        for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                r = &dev->resource[i];
+                if (r->flags & flags) {
+                        dev->resource[i].start += offset;
+                        dev->resource[i].end += offset;
+                }
+        }
+
+        pr_devel("  <- ODR %s [%x] +%016llx\n", pci_name(dev), flags, offset);
+}
+
+/* Offset bus resources (& all children) of a given type */
+static void __devinit pnv_ioda_offset_bus(struct pci_bus *bus,
+                                          unsigned int flags,
+                                          resource_size_t offset)
+{
+        struct resource *r;
+        struct pci_dev *dev;
+        struct pci_bus *cbus;
+        int i;
+
+        pr_devel("  -> OBR %s [%x] +%016llx\n",
+                 bus->self ? pci_name(bus->self) : "root", flags, offset);
+
+        for (i = 0; i < 2; i++) {
+                r = bus->resource[i];
+                if (r && (r->flags & flags)) {
+                        bus->resource[i]->start += offset;
+                        bus->resource[i]->end += offset;
+                }
+        }
+        list_for_each_entry(dev, &bus->devices, bus_list)
+                pnv_ioda_offset_dev(dev, flags, offset);
+        list_for_each_entry(cbus, &bus->children, node)
+                pnv_ioda_offset_bus(cbus, flags, offset);
+
+        pr_devel("  <- OBR %s [%x]\n",
+                 bus->self ? pci_name(bus->self) : "root", flags);
+}
+
+/* This is the guts of our IODA resource allocation. This is called
+ * recursively for each bus in the system. It calculates all the
+ * necessary size and requirements for children and assign them
+ * resources such that:
+ *
+ *   - Each function fits in it's own contiguous set of IO/M32
+ *     segment
+ *
+ *   - All segments behind a P2P bridge are contiguous and obey
+ *     alignment constraints of those bridges
+ */
+static void __devinit pnv_ioda_calc_bus(struct pci_bus *bus, unsigned int flags,
+                                        resource_size_t *size,
+                                        resource_size_t *align)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        struct pnv_phb *phb = hose->private_data;
+        resource_size_t dev_size, dev_align, start;
+        resource_size_t min_align, min_balign;
+        struct pci_dev *cdev;
+        struct pci_bus *cbus;
+        struct list_head head;
+        struct resource_wrap *w;
+        unsigned int bres;
+
+        *size = *align = 0;
+
+        pr_devel("-> CBR %s [%x]\n",
+                 bus->self ? pci_name(bus->self) : "root", flags);
+
+        /* Calculate alignment requirements based on the type
+         * of resource we are working on
+         */
+        if (flags & IORESOURCE_IO) {
+                bres = 0;
+                min_align = phb->ioda.io_segsize;
+                min_balign = 0x1000;
+        } else {
+                bres = 1;
+                min_align = phb->ioda.m32_segsize;
+                min_balign = 0x100000;
+        }
+
+        /* Gather all our children resources ordered by alignment */
+        INIT_LIST_HEAD(&head);
+
+        /*   - Busses */
+        list_for_each_entry(cbus, &bus->children, node) {
+                pnv_ioda_calc_bus(cbus, flags, &dev_size, &dev_align);
+                pnv_ioda_add_wrap(&head, cbus, NULL, dev_size, dev_align);
+        }
+
+        /*   - Devices */
+        list_for_each_entry(cdev, &bus->devices, bus_list) {
+                pnv_ioda_calc_dev(cdev, flags, &dev_size, &dev_align);
+                /* Align them to segment size */
+                if (dev_align < min_align)
+                        dev_align = min_align;
+                pnv_ioda_add_wrap(&head, NULL, cdev, dev_size, dev_align);
+        }
+        if (list_empty(&head))
+                goto empty;
+
+        /* Now we can do two things: assign offsets to them within that
+         * level and get our total alignment & size requirements. The
+         * assignment algorithm is going to be uber-trivial for now, we
+         * can try to be smarter later at filling out holes.
+         */
+        start = bus->self ? 0 : bus->resource[bres]->start;
+
+        /* Don't hand out IO 0 */
+        if ((flags & IORESOURCE_IO) && !bus->self)
+                start += 0x1000;
+
+        while(!list_empty(&head)) {
+                w = list_first_entry(&head, struct resource_wrap, link);
+                list_del(&w->link);
+                if (w->size) {
+                        if (start) {
+                                start = ALIGN(start, w->align);
+                                if (w->dev)
+                                        pnv_ioda_offset_dev(w->dev,flags,start);
+                                else if (w->bus)
+                                        pnv_ioda_offset_bus(w->bus,flags,start);
+                        }
+                        if (w->align > *align)
+                                *align = w->align;
+                }
+                start += w->size;
+                kfree(w);
+        }
+        *size = start;
+
+        /* Align and setup bridge resources */
+        *align = max_t(resource_size_t, *align,
+                       max_t(resource_size_t, min_align, min_balign));
+        *size = ALIGN(*size,
+                      max_t(resource_size_t, min_align, min_balign));
+ empty:
+        /* Only setup P2P's, not the PHB itself */
+        if (bus->self) {
+                WARN_ON(bus->resource[bres] == NULL);
+                bus->resource[bres]->start = 0;
+                bus->resource[bres]->flags = (*size) ? flags : 0;
+                bus->resource[bres]->end = (*size) ? (*size - 1) : 0;
+
+                /* Clear prefetch bus resources for now */
+                bus->resource[2]->flags = 0;
+        }
+
+        pr_devel("<- CBR %s [%x] *size=%016llx *align=%016llx\n",
+                 bus->self ? pci_name(bus->self) : "root", flags,*size,*align);
+}
+
+static struct pci_dn *pnv_ioda_get_pdn(struct pci_dev *dev)
+{
+        struct device_node *np;
+
+        np = pci_device_to_OF_node(dev);
+        if (!np)
+                return NULL;
+        return PCI_DN(np);
+}
+
+static void __devinit pnv_ioda_setup_pe_segments(struct pci_dev *dev)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        struct pnv_phb *phb = hose->private_data;
+        struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+        unsigned int pe, i;
+        resource_size_t pos;
+        struct resource io_res;
+        struct resource m32_res;
+        struct pci_bus_region region;
+        int rc;
+
+        /* Anything not referenced in the device-tree gets PE#0 */
+        pe = pdn ? pdn->pe_number : 0;
+
+        /* Calculate the device min/max */
+        io_res.start = m32_res.start = (resource_size_t)-1;
+        io_res.end = m32_res.end = 0;
+        io_res.flags = IORESOURCE_IO;
+        m32_res.flags = IORESOURCE_MEM;
+
+        for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                struct resource *r = NULL;
+                if (dev->resource[i].flags & IORESOURCE_IO)
+                        r = &io_res;
+                if (dev->resource[i].flags & IORESOURCE_MEM)
+                        r = &m32_res;
+                if (!r)
+                        continue;
+                if (dev->resource[i].start < r->start)
+                        r->start = dev->resource[i].start;
+                if (dev->resource[i].end > r->end)
+                        r->end = dev->resource[i].end;
+        }
+
+        /* Setup IO segments */
+        if (io_res.start < io_res.end) {
+                pcibios_resource_to_bus(dev, &region, &io_res);
+                pos = region.start;
+                i = pos / phb->ioda.io_segsize;
+                while(i < phb->ioda.total_pe && pos <= region.end) {
+                        if (phb->ioda.io_segmap[i]) {
+                                pr_err("%s: Trying to use IO seg #%d which is"
+                                       " already used by PE# %d\n",
+                                       pci_name(dev), i,
+                                       phb->ioda.io_segmap[i]);
+                                /* XXX DO SOMETHING TO DISABLE DEVICE ? */
+                                break;
+                        }
+                        phb->ioda.io_segmap[i] = pe;
+                        rc = opal_pci_map_pe_mmio_window(phb->opal_id, pe,
+                                                         OPAL_IO_WINDOW_TYPE,
+                                                         0, i);
+                        if (rc != OPAL_SUCCESS) {
+                                pr_err("%s: OPAL error %d setting up mapping"
+                                       " for IO seg# %d\n",
+                                       pci_name(dev), rc, i);
+                                /* XXX DO SOMETHING TO DISABLE DEVICE ? */
+                                break;
+                        }
+                        pos += phb->ioda.io_segsize;
+                        i++;
+                };
+        }
+
+        /* Setup M32 segments */
+        if (m32_res.start < m32_res.end) {
+                pcibios_resource_to_bus(dev, &region, &m32_res);
+                pos = region.start;
+                i = pos / phb->ioda.m32_segsize;
+                while(i < phb->ioda.total_pe && pos <= region.end) {
+                        if (phb->ioda.m32_segmap[i]) {
+                                pr_err("%s: Trying to use M32 seg #%d which is"
+                                       " already used by PE# %d\n",
+                                       pci_name(dev), i,
+                                       phb->ioda.m32_segmap[i]);
+                                /* XXX DO SOMETHING TO DISABLE DEVICE ? */
+                                break;
+                        }
+                        phb->ioda.m32_segmap[i] = pe;
+                        rc = opal_pci_map_pe_mmio_window(phb->opal_id, pe,
+                                                         OPAL_M32_WINDOW_TYPE,
+                                                         0, i);
+                        if (rc != OPAL_SUCCESS) {
+                                pr_err("%s: OPAL error %d setting up mapping"
+                                       " for M32 seg# %d\n",
+                                       pci_name(dev), rc, i);
+                                /* XXX DO SOMETHING TO DISABLE DEVICE ? */
+                                break;
+                        }
+                        pos += phb->ioda.m32_segsize;
+                        i++;
+                }
+        }
+}
+
+/* Check if a resource still fits in the total IO or M32 range
+ * for a given PHB
+ */
+static int __devinit pnv_ioda_resource_fit(struct pci_controller *hose,
+                                           struct resource *r)
+{
+        struct resource *bounds;
+
+        if (r->flags & IORESOURCE_IO)
+                bounds = &hose->io_resource;
+        else if (r->flags & IORESOURCE_MEM)
+                bounds = &hose->mem_resources[0];
+        else
+                return 1;
+
+        if (r->start >= bounds->start && r->end <= bounds->end)
+                return 1;
+        r->flags = 0;
+        return 0;
+}
+
+static void __devinit pnv_ioda_update_resources(struct pci_bus *bus)
+{
+        struct pci_controller *hose = pci_bus_to_host(bus);
+        struct pci_bus *cbus;
+        struct pci_dev *cdev;
+        unsigned int i;
+
+        /* We used to clear all device enables here. However it looks like
+         * clearing MEM enable causes Obsidian (IPR SCS) to go bonkers,
+         * and shoot fatal errors to the PHB which in turns fences itself
+         * and we can't recover from that ... yet. So for now, let's leave
+         * the enables as-is and hope for the best.
+         */
+
+        /* Check if bus resources fit in our IO or M32 range */
+        for (i = 0; bus->self && (i < 2); i++) {
+                struct resource *r = bus->resource[i];
+                if (r && !pnv_ioda_resource_fit(hose, r))
+                        pr_err("%s: Bus %d resource %d disabled, no room\n",
+                               pci_name(bus->self), bus->number, i);
+        }
+
+        /* Update self if it's not a PHB */
+        if (bus->self)
+                pci_setup_bridge(bus);
+
+        /* Update child devices */
+        list_for_each_entry(cdev, &bus->devices, bus_list) {
+                /* Check if resource fits, if not, disabled it */
+                for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+                        struct resource *r = &cdev->resource[i];
+                        if (!pnv_ioda_resource_fit(hose, r))
+                                pr_err("%s: Resource %d disabled, no room\n",
+                                       pci_name(cdev), i);
+                }
+
+                /* Assign segments */
+                pnv_ioda_setup_pe_segments(cdev);
+
+                /* Update HW BARs */
+                for (i = 0; i <= PCI_ROM_RESOURCE; i++)
+                        pci_update_resource(cdev, i);
+        }
+
+        /* Update child busses */
+        list_for_each_entry(cbus, &bus->children, node)
+                pnv_ioda_update_resources(cbus);
+}
+
+static int __devinit pnv_ioda_alloc_pe(struct pnv_phb *phb)
+{
+        unsigned long pe;
+
+        do {
+                pe = find_next_zero_bit(phb->ioda.pe_alloc,
+                                        phb->ioda.total_pe, 0);
+                if (pe >= phb->ioda.total_pe)
+                        return IODA_INVALID_PE;
+        } while(test_and_set_bit(pe, phb->ioda.pe_alloc));
+
+        phb->ioda.pe_array[pe].pe_number = pe;
+        return pe;
+}
+
+static void __devinit pnv_ioda_free_pe(struct pnv_phb *phb, int pe)
+{
+        WARN_ON(phb->ioda.pe_array[pe].pdev);
+
+        memset(&phb->ioda.pe_array[pe], 0, sizeof(struct pnv_ioda_pe));
+        clear_bit(pe, phb->ioda.pe_alloc);
+}
+
+/* Currently those 2 are only used when MSIs are enabled, this will change
+ * but in the meantime, we need to protect them to avoid warnings
+ */
+#ifdef CONFIG_PCI_MSI
+static struct pnv_ioda_pe * __devinit __pnv_ioda_get_one_pe(struct pci_dev *dev)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        struct pnv_phb *phb = hose->private_data;
+        struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+
+        if (!pdn)
+                return NULL;
+        if (pdn->pe_number == IODA_INVALID_PE)
+                return NULL;
+        return &phb->ioda.pe_array[pdn->pe_number];
+}
+
+static struct pnv_ioda_pe * __devinit pnv_ioda_get_pe(struct pci_dev *dev)
+{
+        struct pnv_ioda_pe *pe = __pnv_ioda_get_one_pe(dev);
+
+        while (!pe && dev->bus->self) {
+                dev = dev->bus->self;
+                pe = __pnv_ioda_get_one_pe(dev);
+                if (pe)
+                        pe = pe->bus_pe;
+        }
+        return pe;
+}
+#endif /* CONFIG_PCI_MSI */
+
+static int __devinit pnv_ioda_configure_pe(struct pnv_phb *phb,
+                                           struct pnv_ioda_pe *pe)
+{
+        struct pci_dev *parent;
+        uint8_t bcomp, dcomp, fcomp;
+        long rc, rid_end, rid;
+
+        /* Bus validation ? */
+        if (pe->pbus) {
+                int count;
+
+                dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER;
+                fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER;
+                parent = pe->pbus->self;
+                count = pe->pbus->subordinate - pe->pbus->secondary + 1;
+                switch(count) {
+                case  1: bcomp = OpalPciBusAll;         break;
+                case  2: bcomp = OpalPciBus7Bits;       break;
+                case  4: bcomp = OpalPciBus6Bits;       break;
+                case  8: bcomp = OpalPciBus5Bits;       break;
+                case 16: bcomp = OpalPciBus4Bits;       break;
+                case 32: bcomp = OpalPciBus3Bits;       break;
+                default:
+                        pr_err("%s: Number of subordinate busses %d"
+                               " unsupported\n",
+                               pci_name(pe->pbus->self), count);
+                        /* Do an exact match only */
+                        bcomp = OpalPciBusAll;
+                }
+                rid_end = pe->rid + (count << 8);
+        } else {
+                parent = pe->pdev->bus->self;
+                bcomp = OpalPciBusAll;
+                dcomp = OPAL_COMPARE_RID_DEVICE_NUMBER;
+                fcomp = OPAL_COMPARE_RID_FUNCTION_NUMBER;
+                rid_end = pe->rid + 1;
+        }
+
+        /* Associate PE in PELT */
+        rc = opal_pci_set_pe(phb->opal_id, pe->pe_number, pe->rid,
+                             bcomp, dcomp, fcomp, OPAL_MAP_PE);
+        if (rc) {
+                pe_err(pe, "OPAL error %ld trying to setup PELT table\n", rc);
+                return -ENXIO;
+        }
+        opal_pci_eeh_freeze_clear(phb->opal_id, pe->pe_number,
+                                  OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
+
+        /* Add to all parents PELT-V */
+        while (parent) {
+                struct pci_dn *pdn = pnv_ioda_get_pdn(parent);
+                if (pdn && pdn->pe_number != IODA_INVALID_PE) {
+                        rc = opal_pci_set_peltv(phb->opal_id, pdn->pe_number,
+                                                pe->pe_number, OPAL_ADD_PE_TO_DOMAIN);
+                        /* XXX What to do in case of error ? */
+                }
+                parent = parent->bus->self;
+        }
+        /* Setup reverse map */
+        for (rid = pe->rid; rid < rid_end; rid++)
+                phb->ioda.pe_rmap[rid] = pe->pe_number;
+
+        /* Setup one MVTs on IODA1 */
+        if (phb->type == PNV_PHB_IODA1) {
+                pe->mve_number = pe->pe_number;
+                rc = opal_pci_set_mve(phb->opal_id, pe->mve_number,
+                                      pe->pe_number);
+                if (rc) {
+                        pe_err(pe, "OPAL error %ld setting up MVE %d\n",
+                               rc, pe->mve_number);
+                        pe->mve_number = -1;
+                } else {
+                        rc = opal_pci_set_mve_enable(phb->opal_id,
+                                                     pe->mve_number, OPAL_ENABLE_MVE);
+                        if (rc) {
+                                pe_err(pe, "OPAL error %ld enabling MVE %d\n",
+                                       rc, pe->mve_number);
+                                pe->mve_number = -1;
+                        }
+                }
+        } else if (phb->type == PNV_PHB_IODA2)
+                pe->mve_number = 0;
+
+        return 0;
+}
+
+static void __devinit pnv_ioda_link_pe_by_weight(struct pnv_phb *phb,
+                                                 struct pnv_ioda_pe *pe)
+{
+        struct pnv_ioda_pe *lpe;
+
+        list_for_each_entry(lpe, &phb->ioda.pe_list, link) {
+                if (lpe->dma_weight < pe->dma_weight) {
+                        list_add_tail(&pe->link, &lpe->link);
+                        return;
+                }
+        }
+        list_add_tail(&pe->link, &phb->ioda.pe_list);
+}
+
+static unsigned int pnv_ioda_dma_weight(struct pci_dev *dev)
+{
+        /* This is quite simplistic. The "base" weight of a device
+         * is 10. 0 means no DMA is to be accounted for it.
+         */
+
+        /* If it's a bridge, no DMA */
+        if (dev->hdr_type != PCI_HEADER_TYPE_NORMAL)
+                return 0;
+
+        /* Reduce the weight of slow USB controllers */
+        if (dev->class == PCI_CLASS_SERIAL_USB_UHCI ||
+            dev->class == PCI_CLASS_SERIAL_USB_OHCI ||
+            dev->class == PCI_CLASS_SERIAL_USB_EHCI)
+                return 3;
+
+        /* Increase the weight of RAID (includes Obsidian) */
+        if ((dev->class >> 8) == PCI_CLASS_STORAGE_RAID)
+                return 15;
+
+        /* Default */
+        return 10;
+}
+
+static struct pnv_ioda_pe * __devinit pnv_ioda_setup_dev_PE(struct pci_dev *dev)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        struct pnv_phb *phb = hose->private_data;
+        struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+        struct pnv_ioda_pe *pe;
+        int pe_num;
+
+        if (!pdn) {
+                pr_err("%s: Device tree node not associated properly\n",
+                           pci_name(dev));
+                return NULL;
+        }
+        if (pdn->pe_number != IODA_INVALID_PE)
+                return NULL;
+
+        /* PE#0 has been pre-set */
+        if (dev->bus->number == 0)
+                pe_num = 0;
+        else
+                pe_num = pnv_ioda_alloc_pe(phb);
+        if (pe_num == IODA_INVALID_PE) {
+                pr_warning("%s: Not enough PE# available, disabling device\n",
+                           pci_name(dev));
+                return NULL;
+        }
+
+        /* NOTE: We get only one ref to the pci_dev for the pdn, not for the
+         * pointer in the PE data structure, both should be destroyed at the
+         * same time. However, this needs to be looked at more closely again
+         * once we actually start removing things (Hotplug, SR-IOV, ...)
+         *
+         * At some point we want to remove the PDN completely anyways
+         */
+        pe = &phb->ioda.pe_array[pe_num];
+        pci_dev_get(dev);
+        pdn->pcidev = dev;
+        pdn->pe_number = pe_num;
+        pe->pdev = dev;
+        pe->pbus = NULL;
+        pe->tce32_seg = -1;
+        pe->mve_number = -1;
+        pe->rid = dev->bus->number << 8 | pdn->devfn;
+
+        pe_info(pe, "Associated device to PE\n");
+
+        if (pnv_ioda_configure_pe(phb, pe)) {
+                /* XXX What do we do here ? */
+                if (pe_num)
+                        pnv_ioda_free_pe(phb, pe_num);
+                pdn->pe_number = IODA_INVALID_PE;
+                pe->pdev = NULL;
+                pci_dev_put(dev);
+                return NULL;
+        }
+
+        /* Assign a DMA weight to the device */
+        pe->dma_weight = pnv_ioda_dma_weight(dev);
+        if (pe->dma_weight != 0) {
+                phb->ioda.dma_weight += pe->dma_weight;
+                phb->ioda.dma_pe_count++;
+        }
+
+        /* Link the PE */
+        pnv_ioda_link_pe_by_weight(phb, pe);
+
+        return pe;
+}
+
+static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe)
+{
+        struct pci_dev *dev;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+
+                if (pdn == NULL) {
+                        pr_warn("%s: No device node associated with device !\n",
+                                pci_name(dev));
+                        continue;
+                }
+                pci_dev_get(dev);
+                pdn->pcidev = dev;
+                pdn->pe_number = pe->pe_number;
+                pe->dma_weight += pnv_ioda_dma_weight(dev);
+                if (dev->subordinate)
+                        pnv_ioda_setup_same_PE(dev->subordinate, pe);
+        }
+}
+
+static void __devinit pnv_ioda_setup_bus_PE(struct pci_dev *dev,
+                                            struct pnv_ioda_pe *ppe)
+{
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+        struct pnv_phb *phb = hose->private_data;
+        struct pci_bus *bus = dev->subordinate;
+        struct pnv_ioda_pe *pe;
+        int pe_num;
+
+        if (!bus) {
+                pr_warning("%s: Bridge without a subordinate bus !\n",
+                           pci_name(dev));
+                return;
+        }
+        pe_num = pnv_ioda_alloc_pe(phb);
+        if (pe_num == IODA_INVALID_PE) {
+                pr_warning("%s: Not enough PE# available, disabling bus\n",
+                           pci_name(dev));
+                return;
+        }
+
+        pe = &phb->ioda.pe_array[pe_num];
+        ppe->bus_pe = pe;
+        pe->pbus = bus;
+        pe->pdev = NULL;
+        pe->tce32_seg = -1;
+        pe->mve_number = -1;
+        pe->rid = bus->secondary << 8;
+        pe->dma_weight = 0;
+
+        pe_info(pe, "Secondary busses %d..%d associated with PE\n",
+                bus->secondary, bus->subordinate);
+
+        if (pnv_ioda_configure_pe(phb, pe)) {
+                /* XXX What do we do here ? */
+                if (pe_num)
+                        pnv_ioda_free_pe(phb, pe_num);
+                pe->pbus = NULL;
+                return;
+        }
+
+        /* Associate it with all child devices */
+        pnv_ioda_setup_same_PE(bus, pe);
+
+        /* Account for one DMA PE if at least one DMA capable device exist
+         * below the bridge
+         */
+        if (pe->dma_weight != 0) {
+                phb->ioda.dma_weight += pe->dma_weight;
+                phb->ioda.dma_pe_count++;
+        }
+
+        /* Link the PE */
+        pnv_ioda_link_pe_by_weight(phb, pe);
+}
+
+static void __devinit pnv_ioda_setup_PEs(struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+        struct pnv_ioda_pe *pe;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                pe = pnv_ioda_setup_dev_PE(dev);
+                if (pe == NULL)
+                        continue;
+                /* Leaving the PCIe domain ... single PE# */
+                if (dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE)
+                        pnv_ioda_setup_bus_PE(dev, pe);
+                else if (dev->subordinate)
+                        pnv_ioda_setup_PEs(dev->subordinate);
+        }
+}
+
+static void __devinit pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb,
+                                                 struct pci_dev *dev)
+{
+        /* We delay DMA setup after we have assigned all PE# */
+}
+
+static void __devinit pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe,
+                                             struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                set_iommu_table_base(&dev->dev, &pe->tce32_table);
+                if (dev->subordinate)
+                        pnv_ioda_setup_bus_dma(pe, dev->subordinate);
+        }
+}
+
+static void __devinit pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
+                                                struct pnv_ioda_pe *pe,
+                                                unsigned int base,
+                                                unsigned int segs)
+{
+
+        struct page *tce_mem = NULL;
+        const __be64 *swinvp;
+        struct iommu_table *tbl;
+        unsigned int i;
+        int64_t rc;
+        void *addr;
+
+        /* 256M DMA window, 4K TCE pages, 8 bytes TCE */
+#define TCE32_TABLE_SIZE        ((0x10000000 / 0x1000) * 8)
+
+        /* XXX FIXME: Handle 64-bit only DMA devices */
+        /* XXX FIXME: Provide 64-bit DMA facilities & non-4K TCE tables etc.. */
+        /* XXX FIXME: Allocate multi-level tables on PHB3 */
+
+        /* We shouldn't already have a 32-bit DMA associated */
+        if (WARN_ON(pe->tce32_seg >= 0))
+                return;
+
+        /* Grab a 32-bit TCE table */
+        pe->tce32_seg = base;
+        pe_info(pe, " Setting up 32-bit TCE table at %08x..%08x\n",
+                (base << 28), ((base + segs) << 28) - 1);
+
+        /* XXX Currently, we allocate one big contiguous table for the
+         * TCEs. We only really need one chunk per 256M of TCE space
+         * (ie per segment) but that's an optimization for later, it
+         * requires some added smarts with our get/put_tce implementation
+         */
+        tce_mem = alloc_pages_node(phb->hose->node, GFP_KERNEL,
+                                   get_order(TCE32_TABLE_SIZE * segs));
+        if (!tce_mem) {
+                pe_err(pe, " Failed to allocate a 32-bit TCE memory\n");
+                goto fail;
+        }
+        addr = page_address(tce_mem);
+        memset(addr, 0, TCE32_TABLE_SIZE * segs);
+
+        /* Configure HW */
+        for (i = 0; i < segs; i++) {
+                rc = opal_pci_map_pe_dma_window(phb->opal_id,
+                                              pe->pe_number,
+                                              base + i, 1,
+                                              __pa(addr) + TCE32_TABLE_SIZE * i,
+                                              TCE32_TABLE_SIZE, 0x1000);
+                if (rc) {
+                        pe_err(pe, " Failed to configure 32-bit TCE table,"
+                               " err %ld\n", rc);
+                        goto fail;
+                }
+        }
+
+        /* Setup linux iommu table */
+        tbl = &pe->tce32_table;
+        pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,
+                                  base << 28);
+
+        /* OPAL variant of P7IOC SW invalidated TCEs */
+        swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL);
+        if (swinvp) {
+                /* We need a couple more fields -- an address and a data
+                 * to or.  Since the bus is only printed out on table free
+                 * errors, and on the first pass the data will be a relative
+                 * bus number, print that out instead.
+                 */
+                tbl->it_busno = 0;
+                tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
+                tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE
+                        | TCE_PCI_SWINV_PAIR;
+        }
+        iommu_init_table(tbl, phb->hose->node);
+
+        if (pe->pdev)
+                set_iommu_table_base(&pe->pdev->dev, tbl);
+        else
+                pnv_ioda_setup_bus_dma(pe, pe->pbus);
+
+        return;
+ fail:
+        /* XXX Failure: Try to fallback to 64-bit only ? */
+        if (pe->tce32_seg >= 0)
+                pe->tce32_seg = -1;
+        if (tce_mem)
+                __free_pages(tce_mem, get_order(TCE32_TABLE_SIZE * segs));
+}
+
+static void __devinit pnv_ioda_setup_dma(struct pnv_phb *phb)
+{
+        struct pci_controller *hose = phb->hose;
+        unsigned int residual, remaining, segs, tw, base;
+        struct pnv_ioda_pe *pe;
+
+        /* If we have more PE# than segments available, hand out one
+         * per PE until we run out and let the rest fail. If not,
+         * then we assign at least one segment per PE, plus more based
+         * on the amount of devices under that PE
+         */
+        if (phb->ioda.dma_pe_count > phb->ioda.tce32_count)
+                residual = 0;
+        else
+                residual = phb->ioda.tce32_count -
+                        phb->ioda.dma_pe_count;
+
+        pr_info("PCI: Domain %04x has %ld available 32-bit DMA segments\n",
+                hose->global_number, phb->ioda.tce32_count);
+        pr_info("PCI: %d PE# for a total weight of %d\n",
+                phb->ioda.dma_pe_count, phb->ioda.dma_weight);
+
+        /* Walk our PE list and configure their DMA segments, hand them
+         * out one base segment plus any residual segments based on
+         * weight
+         */
+        remaining = phb->ioda.tce32_count;
+        tw = phb->ioda.dma_weight;
+        base = 0;
+        list_for_each_entry(pe, &phb->ioda.pe_list, link) {
+                if (!pe->dma_weight)
+                        continue;
+                if (!remaining) {
+                        pe_warn(pe, "No DMA32 resources available\n");
+                        continue;
+                }
+                segs = 1;
+                if (residual) {
+                        segs += ((pe->dma_weight * residual)  + (tw / 2)) / tw;
+                        if (segs > remaining)
+                                segs = remaining;
+                }
+                pe_info(pe, "DMA weight %d, assigned %d DMA32 segments\n",
+                        pe->dma_weight, segs);
+                pnv_pci_ioda_setup_dma_pe(phb, pe, base, segs);
+                remaining -= segs;
+                base += segs;
+        }
+}
+
+#ifdef CONFIG_PCI_MSI
+static int pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
+                                  unsigned int hwirq, unsigned int is_64,
+                                  struct msi_msg *msg)
+{
+        struct pnv_ioda_pe *pe = pnv_ioda_get_pe(dev);
+        unsigned int xive_num = hwirq - phb->msi_base;
+        uint64_t addr64;
+        uint32_t addr32, data;
+        int rc;
+
+        /* No PE assigned ? bail out ... no MSI for you ! */
+        if (pe == NULL)
+                return -ENXIO;
+
+        /* Check if we have an MVE */
+        if (pe->mve_number < 0)
+                return -ENXIO;
+
+        /* Assign XIVE to PE */
+        rc = opal_pci_set_xive_pe(phb->opal_id, pe->pe_number, xive_num);
+        if (rc) {
+                pr_warn("%s: OPAL error %d setting XIVE %d PE\n",
+                        pci_name(dev), rc, xive_num);
+                return -EIO;
+        }
+
+        if (is_64) {
+                rc = opal_get_msi_64(phb->opal_id, pe->mve_number, xive_num, 1,
+                                     &addr64, &data);
+                if (rc) {
+                        pr_warn("%s: OPAL error %d getting 64-bit MSI data\n",
+                                pci_name(dev), rc);
+                        return -EIO;
+                }
+                msg->address_hi = addr64 >> 32;
+                msg->address_lo = addr64 & 0xfffffffful;
+        } else {
+                rc = opal_get_msi_32(phb->opal_id, pe->mve_number, xive_num, 1,
+                                     &addr32, &data);
+                if (rc) {
+                        pr_warn("%s: OPAL error %d getting 32-bit MSI data\n",
+                                pci_name(dev), rc);
+                        return -EIO;
+                }
+                msg->address_hi = 0;
+                msg->address_lo = addr32;
+        }
+        msg->data = data;
+
+        pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d),"
+                 " address=%x_%08x data=%x PE# %d\n",
+                 pci_name(dev), is_64 ? "64" : "32", hwirq, xive_num,
+                 msg->address_hi, msg->address_lo, data, pe->pe_number);
+
+        return 0;
+}
+
+static void pnv_pci_init_ioda_msis(struct pnv_phb *phb)
+{
+        unsigned int bmap_size;
+        const __be32 *prop = of_get_property(phb->hose->dn,
+                                             "ibm,opal-msi-ranges", NULL);
+        if (!prop) {
+                /* BML Fallback */
+                prop = of_get_property(phb->hose->dn, "msi-ranges", NULL);
+        }
+        if (!prop)
+                return;
+
+        phb->msi_base = be32_to_cpup(prop);
+        phb->msi_count = be32_to_cpup(prop + 1);
+        bmap_size = BITS_TO_LONGS(phb->msi_count) * sizeof(unsigned long);
+        phb->msi_map = zalloc_maybe_bootmem(bmap_size, GFP_KERNEL);
+        if (!phb->msi_map) {
+                pr_err("PCI %d: Failed to allocate MSI bitmap !\n",
+                       phb->hose->global_number);
+                return;
+        }
+        phb->msi_setup = pnv_pci_ioda_msi_setup;
+        phb->msi32_support = 1;
+        pr_info("  Allocated bitmap for %d MSIs (base IRQ 0x%x)\n",
+                phb->msi_count, phb->msi_base);
+}
+#else
+static void pnv_pci_init_ioda_msis(struct pnv_phb *phb) { }
+#endif /* CONFIG_PCI_MSI */
+
+/* This is the starting point of our IODA specific resource
+ * allocation process
+ */
+static void __devinit pnv_pci_ioda_fixup_phb(struct pci_controller *hose)
+{
+        resource_size_t size, align;
+        struct pci_bus *child;
+
+        /* Associate PEs per functions */
+        pnv_ioda_setup_PEs(hose->bus);
+
+        /* Calculate all resources */
+        pnv_ioda_calc_bus(hose->bus, IORESOURCE_IO, &size, &align);
+        pnv_ioda_calc_bus(hose->bus, IORESOURCE_MEM, &size, &align);
+
+        /* Apply then to HW */
+        pnv_ioda_update_resources(hose->bus);
+
+        /* Setup DMA */
+        pnv_ioda_setup_dma(hose->private_data);
+
+        /* Configure PCI Express settings */
+        list_for_each_entry(child, &hose->bus->children, node) {
+                struct pci_dev *self = child->self;
+                if (!self)
+                        continue;
+                pcie_bus_configure_settings(child, self->pcie_mpss);
+        }
+}
+
+/* Prevent enabling devices for which we couldn't properly
+ * assign a PE
+ */
+static int __devinit pnv_pci_enable_device_hook(struct pci_dev *dev)
+{
+        struct pci_dn *pdn = pnv_ioda_get_pdn(dev);
+
+        if (!pdn || pdn->pe_number == IODA_INVALID_PE)
+                return -EINVAL;
+        return 0;
+}
+
+static u32 pnv_ioda_bdfn_to_pe(struct pnv_phb *phb, struct pci_bus *bus,
+                               u32 devfn)
+{
+        return phb->ioda.pe_rmap[(bus->number << 8) | devfn];
+}
+
+void __init pnv_pci_init_ioda1_phb(struct device_node *np)
+{
+        struct pci_controller *hose;
+        static int primary = 1;
+        struct pnv_phb *phb;
+        unsigned long size, m32map_off, iomap_off, pemap_off;
+        const u64 *prop64;
+        u64 phb_id;
+        void *aux;
+        long rc;
+
+        pr_info(" Initializing IODA OPAL PHB %s\n", np->full_name);
+
+        prop64 = of_get_property(np, "ibm,opal-phbid", NULL);
+        if (!prop64) {
+                pr_err("  Missing \"ibm,opal-phbid\" property !\n");
+                return;
+        }
+        phb_id = be64_to_cpup(prop64);
+        pr_debug("  PHB-ID  : 0x%016llx\n", phb_id);
+
+        phb = alloc_bootmem(sizeof(struct pnv_phb));
+        if (phb) {
+                memset(phb, 0, sizeof(struct pnv_phb));
+                phb->hose = hose = pcibios_alloc_controller(np);
+        }
+        if (!phb || !phb->hose) {
+                pr_err("PCI: Failed to allocate PCI controller for %s\n",
+                       np->full_name);
+                return;
+        }
+
+        spin_lock_init(&phb->lock);
+        /* XXX Use device-tree */
+        hose->first_busno = 0;
+        hose->last_busno = 0xff;
+        hose->private_data = phb;
+        phb->opal_id = phb_id;
+        phb->type = PNV_PHB_IODA1;
+
+        /* Detect specific models for error handling */
+        if (of_device_is_compatible(np, "ibm,p7ioc-pciex"))
+                phb->model = PNV_PHB_MODEL_P7IOC;
+        else
+                phb->model = PNV_PHB_MODEL_UNKNOWN;
+
+        /* We parse "ranges" now since we need to deduce the register base
+         * from the IO base
+         */
+        pci_process_bridge_OF_ranges(phb->hose, np, primary);
+        primary = 0;
+
+        /* Magic formula from Milton */
+        phb->regs = of_iomap(np, 0);
+        if (phb->regs == NULL)
+                pr_err("  Failed to map registers !\n");
+
+
+        /* XXX This is hack-a-thon. This needs to be changed so that:
+         *  - we obtain stuff like PE# etc... from device-tree
+         *  - we properly re-allocate M32 ourselves
+         *    (the OFW one isn't very good)
+         */
+
+        /* Initialize more IODA stuff */
+        phb->ioda.total_pe = 128;
+
+        phb->ioda.m32_size = resource_size(&hose->mem_resources[0]);
+        /* OFW Has already off top 64k of M32 space (MSI space) */
+        phb->ioda.m32_size += 0x10000;
+
+        phb->ioda.m32_segsize = phb->ioda.m32_size / phb->ioda.total_pe;
+        phb->ioda.m32_pci_base = hose->mem_resources[0].start -
+                hose->pci_mem_offset;
+        phb->ioda.io_size = hose->pci_io_size;
+        phb->ioda.io_segsize = phb->ioda.io_size / phb->ioda.total_pe;
+        phb->ioda.io_pci_base = 0; /* XXX calculate this ? */
+
+        /* Allocate aux data & arrays */
+        size = _ALIGN_UP(phb->ioda.total_pe / 8, sizeof(unsigned long));
+        m32map_off = size;
+        size += phb->ioda.total_pe;
+        iomap_off = size;
+        size += phb->ioda.total_pe;
+        pemap_off = size;
+        size += phb->ioda.total_pe * sizeof(struct pnv_ioda_pe);
+        aux = alloc_bootmem(size);
+        memset(aux, 0, size);
+        phb->ioda.pe_alloc = aux;
+        phb->ioda.m32_segmap = aux + m32map_off;
+        phb->ioda.io_segmap = aux + iomap_off;
+        phb->ioda.pe_array = aux + pemap_off;
+        set_bit(0, phb->ioda.pe_alloc);
+
+        INIT_LIST_HEAD(&phb->ioda.pe_list);
+
+        /* Calculate how many 32-bit TCE segments we have */
+        phb->ioda.tce32_count = phb->ioda.m32_pci_base >> 28;
+
+        /* Clear unusable m64 */
+        hose->mem_resources[1].flags = 0;
+        hose->mem_resources[1].start = 0;
+        hose->mem_resources[1].end = 0;
+        hose->mem_resources[2].flags = 0;
+        hose->mem_resources[2].start = 0;
+        hose->mem_resources[2].end = 0;
+
+#if 0
+        rc = opal_pci_set_phb_mem_window(opal->phb_id,
+                                         window_type,
+                                         window_num,
+                                         starting_real_address,
+                                         starting_pci_address,
+                                         segment_size);
+#endif
+
+        pr_info("  %d PE's M32: 0x%x [segment=0x%x] IO: 0x%x [segment=0x%x]\n",
+                phb->ioda.total_pe,
+                phb->ioda.m32_size, phb->ioda.m32_segsize,
+                phb->ioda.io_size, phb->ioda.io_segsize);
+
+        if (phb->regs)  {
+                pr_devel(" BUID     = 0x%016llx\n", in_be64(phb->regs + 0x100));
+                pr_devel(" PHB2_CR  = 0x%016llx\n", in_be64(phb->regs + 0x160));
+                pr_devel(" IO_BAR   = 0x%016llx\n", in_be64(phb->regs + 0x170));
+                pr_devel(" IO_BAMR  = 0x%016llx\n", in_be64(phb->regs + 0x178));
+                pr_devel(" IO_SAR   = 0x%016llx\n", in_be64(phb->regs + 0x180));
+                pr_devel(" M32_BAR  = 0x%016llx\n", in_be64(phb->regs + 0x190));
+                pr_devel(" M32_BAMR = 0x%016llx\n", in_be64(phb->regs + 0x198));
+                pr_devel(" M32_SAR  = 0x%016llx\n", in_be64(phb->regs + 0x1a0));
+        }
+        phb->hose->ops = &pnv_pci_ops;
+
+        /* Setup RID -> PE mapping function */
+        phb->bdfn_to_pe = pnv_ioda_bdfn_to_pe;
+
+        /* Setup TCEs */
+        phb->dma_dev_setup = pnv_pci_ioda_dma_dev_setup;
+
+        /* Setup MSI support */
+        pnv_pci_init_ioda_msis(phb);
+
+        /* We set both probe_only and PCI_REASSIGN_ALL_RSRC. This is an
+         * odd combination which essentially means that we skip all resource
+         * fixups and assignments in the generic code, and do it all
+         * ourselves here
+         */
+        pci_probe_only = 1;
+        ppc_md.pcibios_fixup_phb = pnv_pci_ioda_fixup_phb;
+        ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
+        pci_add_flags(PCI_REASSIGN_ALL_RSRC);
+
+        /* Reset IODA tables to a clean state */
+        rc = opal_pci_reset(phb_id, OPAL_PCI_IODA_TABLE_RESET, OPAL_ASSERT_RESET);
+        if (rc)
+                pr_warning("  OPAL Error %ld performing IODA table reset !\n", rc);
+        opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
+}
+
+void __init pnv_pci_init_ioda_hub(struct device_node *np)
+{
+        struct device_node *phbn;
+        const u64 *prop64;
+        u64 hub_id;
+
+        pr_info("Probing IODA IO-Hub %s\n", np->full_name);
+
+        prop64 = of_get_property(np, "ibm,opal-hubid", NULL);
+        if (!prop64) {
+                pr_err(" Missing \"ibm,opal-hubid\" property !\n");
+                return;
+        }
+        hub_id = be64_to_cpup(prop64);
+        pr_devel(" HUB-ID : 0x%016llx\n", hub_id);
+
+        /* Count child PHBs */
+        for_each_child_of_node(np, phbn) {
+                /* Look for IODA1 PHBs */
+                if (of_device_is_compatible(phbn, "ibm,ioda-phb"))
+                        pnv_pci_init_ioda1_phb(phbn);
+        }
+}
diff --git a/arch/powerpc/platforms/powernv/pci-p5ioc2.c b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
index 4c80f7c77d56..264967770c3a 100644
--- a/arch/powerpc/platforms/powernv/pci-p5ioc2.c
+++ b/arch/powerpc/platforms/powernv/pci-p5ioc2.c
@@ -137,6 +137,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np,
         phb->hose->private_data = phb;
         phb->opal_id = phb_id;
         phb->type = PNV_PHB_P5IOC2;
+        phb->model = PNV_PHB_MODEL_P5IOC2;
 
         phb->regs = of_iomap(np, 0);
 
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 85bb66d7f933..a70bc1e385eb 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -144,6 +144,112 @@ static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
 }
 #endif /* CONFIG_PCI_MSI */
 
+static void pnv_pci_dump_p7ioc_diag_data(struct pnv_phb *phb)
+{
+        struct OpalIoP7IOCPhbErrorData *data = &phb->diag.p7ioc;
+        int i;
+
+        pr_info("PHB %d diagnostic data:\n", phb->hose->global_number);
+
+        pr_info("  brdgCtl              = 0x%08x\n", data->brdgCtl);
+
+        pr_info("  portStatusReg        = 0x%08x\n", data->portStatusReg);
+        pr_info("  rootCmplxStatus      = 0x%08x\n", data->rootCmplxStatus);
+        pr_info("  busAgentStatus       = 0x%08x\n", data->busAgentStatus);
+
+        pr_info("  deviceStatus         = 0x%08x\n", data->deviceStatus);
+        pr_info("  slotStatus           = 0x%08x\n", data->slotStatus);
+        pr_info("  linkStatus           = 0x%08x\n", data->linkStatus);
+        pr_info("  devCmdStatus         = 0x%08x\n", data->devCmdStatus);
+        pr_info("  devSecStatus         = 0x%08x\n", data->devSecStatus);
+
+        pr_info("  rootErrorStatus      = 0x%08x\n", data->rootErrorStatus);
+        pr_info("  uncorrErrorStatus    = 0x%08x\n", data->uncorrErrorStatus);
+        pr_info("  corrErrorStatus      = 0x%08x\n", data->corrErrorStatus);
+        pr_info("  tlpHdr1              = 0x%08x\n", data->tlpHdr1);
+        pr_info("  tlpHdr2              = 0x%08x\n", data->tlpHdr2);
+        pr_info("  tlpHdr3              = 0x%08x\n", data->tlpHdr3);
+        pr_info("  tlpHdr4              = 0x%08x\n", data->tlpHdr4);
+        pr_info("  sourceId             = 0x%08x\n", data->sourceId);
+
+        pr_info("  errorClass           = 0x%016llx\n", data->errorClass);
+        pr_info("  correlator           = 0x%016llx\n", data->correlator);
+
+        pr_info("  p7iocPlssr           = 0x%016llx\n", data->p7iocPlssr);
+        pr_info("  p7iocCsr             = 0x%016llx\n", data->p7iocCsr);
+        pr_info("  lemFir               = 0x%016llx\n", data->lemFir);
+        pr_info("  lemErrorMask         = 0x%016llx\n", data->lemErrorMask);
+        pr_info("  lemWOF               = 0x%016llx\n", data->lemWOF);
+        pr_info("  phbErrorStatus       = 0x%016llx\n", data->phbErrorStatus);
+        pr_info("  phbFirstErrorStatus  = 0x%016llx\n", data->phbFirstErrorStatus);
+        pr_info("  phbErrorLog0         = 0x%016llx\n", data->phbErrorLog0);
+        pr_info("  phbErrorLog1         = 0x%016llx\n", data->phbErrorLog1);
+        pr_info("  mmioErrorStatus      = 0x%016llx\n", data->mmioErrorStatus);
+        pr_info("  mmioFirstErrorStatus = 0x%016llx\n", data->mmioFirstErrorStatus);
+        pr_info("  mmioErrorLog0        = 0x%016llx\n", data->mmioErrorLog0);
+        pr_info("  mmioErrorLog1        = 0x%016llx\n", data->mmioErrorLog1);
+        pr_info("  dma0ErrorStatus      = 0x%016llx\n", data->dma0ErrorStatus);
+        pr_info("  dma0FirstErrorStatus = 0x%016llx\n", data->dma0FirstErrorStatus);
+        pr_info("  dma0ErrorLog0        = 0x%016llx\n", data->dma0ErrorLog0);
+        pr_info("  dma0ErrorLog1        = 0x%016llx\n", data->dma0ErrorLog1);
+        pr_info("  dma1ErrorStatus      = 0x%016llx\n", data->dma1ErrorStatus);
+        pr_info("  dma1FirstErrorStatus = 0x%016llx\n", data->dma1FirstErrorStatus);
+        pr_info("  dma1ErrorLog0        = 0x%016llx\n", data->dma1ErrorLog0);
+        pr_info("  dma1ErrorLog1        = 0x%016llx\n", data->dma1ErrorLog1);
+
+        for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
+                if ((data->pestA[i] >> 63) == 0 &&
+                    (data->pestB[i] >> 63) == 0)
+                        continue;
+                pr_info("  PE[%3d] PESTA        = 0x%016llx\n", i, data->pestA[i]);
+                pr_info("          PESTB        = 0x%016llx\n", data->pestB[i]);
+        }
+}
+
+static void pnv_pci_dump_phb_diag_data(struct pnv_phb *phb)
+{
+        switch(phb->model) {
+        case PNV_PHB_MODEL_P7IOC:
+                pnv_pci_dump_p7ioc_diag_data(phb);
+                break;
+        default:
+                pr_warning("PCI %d: Can't decode this PHB diag data\n",
+                           phb->hose->global_number);
+        }
+}
+
+static void pnv_pci_handle_eeh_config(struct pnv_phb *phb, u32 pe_no)
+{
+        unsigned long flags, rc;
+        int has_diag;
+
+        spin_lock_irqsave(&phb->lock, flags);
+
+        rc = opal_pci_get_phb_diag_data(phb->opal_id, phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
+        has_diag = (rc == OPAL_SUCCESS);
+
+        rc = opal_pci_eeh_freeze_clear(phb->opal_id, pe_no,
+                                       OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
+        if (rc) {
+                pr_warning("PCI %d: Failed to clear EEH freeze state"
+                           " for PE#%d, err %ld\n",
+                           phb->hose->global_number, pe_no, rc);
+
+                /* For now, let's only display the diag buffer when we fail to clear
+                 * the EEH status. We'll do more sensible things later when we have
+                 * proper EEH support. We need to make sure we don't pollute ourselves
+                 * with the normal errors generated when probing empty slots
+                 */
+                if (has_diag)
+                        pnv_pci_dump_phb_diag_data(phb);
+                else
+                        pr_warning("PCI %d: No diag data available\n",
+                                   phb->hose->global_number);
+        }
+
+        spin_unlock_irqrestore(&phb->lock, flags);
+}
+
 static void pnv_pci_config_check_eeh(struct pnv_phb *phb, struct pci_bus *bus,
                                      u32 bdfn)
 {
@@ -165,15 +271,8 @@ static void pnv_pci_config_check_eeh(struct pnv_phb *phb, struct pci_bus *bus,
         }
         cfg_dbg(" -> EEH check, bdfn=%04x PE%d fstate=%x\n",
                 bdfn, pe_no, fstate);
-        if (fstate != 0) {
-                rc = opal_pci_eeh_freeze_clear(phb->opal_id, pe_no,
-                                              OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
-                if (rc) {
-                        pr_warning("PCI %d: Failed to clear EEH freeze state"
-                                   " for PE#%d, err %lld\n",
-                                   phb->hose->global_number, pe_no, rc);
-                }
-        }
+        if (fstate != 0)
+                pnv_pci_handle_eeh_config(phb, pe_no);
 }
 
 static int pnv_pci_read_config(struct pci_bus *bus,
@@ -257,12 +356,54 @@ struct pci_ops pnv_pci_ops = {
         .write = pnv_pci_write_config,
 };
 
+
+static void pnv_tce_invalidate(struct iommu_table *tbl,
+                               u64 *startp, u64 *endp)
+{
+        u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
+        unsigned long start, end, inc;
+
+        start = __pa(startp);
+        end = __pa(endp);
+
+
+        /* BML uses this case for p6/p7/galaxy2: Shift addr and put in node */
+        if (tbl->it_busno) {
+                start <<= 12;
+                end <<= 12;
+                inc = 128 << 12;
+                start |= tbl->it_busno;
+                end |= tbl->it_busno;
+        }
+        /* p7ioc-style invalidation, 2 TCEs per write */
+        else if (tbl->it_type & TCE_PCI_SWINV_PAIR) {
+                start |= (1ull << 63);
+                end |= (1ull << 63);
+                inc = 16;
+        }
+        /* Default (older HW) */
+        else
+                inc = 128;
+
+        end |= inc - 1;         /* round up end to be different than start */
+
+        mb(); /* Ensure above stores are visible */
+        while (start <= end) {
+                __raw_writeq(start, invalidate);
+                start += inc;
+        }
+        /* The iommu layer will do another mb() for us on build() and
+         * we don't care on free()
+         */
+}
+
+
 static int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
                          unsigned long uaddr, enum dma_data_direction direction,
                          struct dma_attrs *attrs)
 {
         u64 proto_tce;
-        u64 *tcep;
+        u64 *tcep, *tces;
         u64 rpn;
 
         proto_tce = TCE_PCI_READ; // Read allowed
@@ -270,25 +411,33 @@ static int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
         if (direction != DMA_TO_DEVICE)
                 proto_tce |= TCE_PCI_WRITE;
 
-        tcep = ((u64 *)tbl->it_base) + index;
+        tces = tcep = ((u64 *)tbl->it_base) + index - tbl->it_offset;
+        rpn = __pa(uaddr) >> TCE_SHIFT;
 
-        while (npages--) {
-                /* can't move this out since we might cross LMB boundary */
-                rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT;
-                *tcep = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
+        while (npages--)
+                *(tcep++) = proto_tce | (rpn++ << TCE_RPN_SHIFT);
+
+        /* Some implementations won't cache invalid TCEs and thus may not
+         * need that flush. We'll probably turn it_type into a bit mask
+         * of flags if that becomes the case
+         */
+        if (tbl->it_type & TCE_PCI_SWINV_CREATE)
+                pnv_tce_invalidate(tbl, tces, tcep - 1);
 
-                uaddr += TCE_PAGE_SIZE;
-                tcep++;
-        }
         return 0;
 }
 
 static void pnv_tce_free(struct iommu_table *tbl, long index, long npages)
 {
-        u64 *tcep = ((u64 *)tbl->it_base) + index;
+        u64 *tcep, *tces;
+
+        tces = tcep = ((u64 *)tbl->it_base) + index - tbl->it_offset;
 
         while (npages--)
                 *(tcep++) = 0;
+
+        if (tbl->it_type & TCE_PCI_SWINV_FREE)
+                pnv_tce_invalidate(tbl, tces, tcep - 1);
 }
 
 void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
@@ -308,13 +457,14 @@ static struct iommu_table * __devinit
 pnv_pci_setup_bml_iommu(struct pci_controller *hose)
 {
         struct iommu_table *tbl;
-        const __be64 *basep;
+        const __be64 *basep, *swinvp;
         const __be32 *sizep;
 
         basep = of_get_property(hose->dn, "linux,tce-base", NULL);
         sizep = of_get_property(hose->dn, "linux,tce-size", NULL);
         if (basep == NULL || sizep == NULL) {
-                pr_err("PCI: %s has missing tce entries !\n", hose->dn->full_name);
+                pr_err("PCI: %s has missing tce entries !\n",
+                       hose->dn->full_name);
                 return NULL;
         }
         tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL, hose->node);
@@ -323,6 +473,15 @@ pnv_pci_setup_bml_iommu(struct pci_controller *hose)
         pnv_pci_setup_iommu_table(tbl, __va(be64_to_cpup(basep)),
                                   be32_to_cpup(sizep), 0);
         iommu_init_table(tbl, hose->node);
+
+        /* Deal with SW invalidated TCEs when needed (BML way) */
+        swinvp = of_get_property(hose->dn, "linux,tce-sw-invalidate-info",
+                                 NULL);
+        if (swinvp) {
+                tbl->it_busno = swinvp[1];
+                tbl->it_index = (unsigned long)ioremap(swinvp[0], 8);
+                tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
+        }
         return tbl;
 }
 
@@ -356,6 +515,13 @@ static void __devinit pnv_pci_dma_dev_setup(struct pci_dev *pdev)
                 pnv_pci_dma_fallback_setup(hose, pdev);
 }
 
+/* Fixup wrong class code in p7ioc root complex */
+static void __devinit pnv_p7ioc_rc_quirk(struct pci_dev *dev)
+{
+        dev->class = PCI_CLASS_BRIDGE_PCI << 8;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IBM, 0x3b9, pnv_p7ioc_rc_quirk);
+
 static int pnv_pci_probe_mode(struct pci_bus *bus)
 {
         struct pci_controller *hose = pci_bus_to_host(bus);
@@ -400,12 +566,24 @@ void __init pnv_pci_init(void)
                 init_pci_config_tokens();
                 find_and_init_phbs();
 #endif /* CONFIG_PPC_POWERNV_RTAS */
-        } else {
-                /* OPAL is here, do our normal stuff */
+        }
+        /* OPAL is here, do our normal stuff */
+        else {
+                int found_ioda = 0;
+
+                /* Look for IODA IO-Hubs. We don't support mixing IODA
+                 * and p5ioc2 due to the need to change some global
+                 * probing flags
+                 */
+                for_each_compatible_node(np, NULL, "ibm,ioda-hub") {
+                        pnv_pci_init_ioda_hub(np);
+                        found_ioda = 1;
+                }
 
                 /* Look for p5ioc2 IO-Hubs */
-                for_each_compatible_node(np, NULL, "ibm,p5ioc2")
-                        pnv_pci_init_p5ioc2_hub(np);
+                if (!found_ioda)
+                        for_each_compatible_node(np, NULL, "ibm,p5ioc2")
+                                pnv_pci_init_p5ioc2_hub(np);
         }
 
         /* Setup the linkage between OF nodes and PHBs */
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index d4dbc4950936..8bc479634643 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -9,9 +9,63 @@ enum pnv_phb_type {
         PNV_PHB_IODA2,
 };
 
+/* Precise PHB model for error management */
+enum pnv_phb_model {
+        PNV_PHB_MODEL_UNKNOWN,
+        PNV_PHB_MODEL_P5IOC2,
+        PNV_PHB_MODEL_P7IOC,
+};
+
+#define PNV_PCI_DIAG_BUF_SIZE   4096
+
+/* Data associated with a PE, including IOMMU tracking etc.. */
+struct pnv_ioda_pe {
+        /* A PE can be associated with a single device or an
+         * entire bus (& children). In the former case, pdev
+         * is populated, in the later case, pbus is.
+         */
+        struct pci_dev          *pdev;
+        struct pci_bus          *pbus;
+
+        /* Effective RID (device RID for a device PE and base bus
+         * RID with devfn 0 for a bus PE)
+         */
+        unsigned int            rid;
+
+        /* PE number */
+        unsigned int            pe_number;
+
+        /* "Weight" assigned to the PE for the sake of DMA resource
+         * allocations
+         */
+        unsigned int            dma_weight;
+
+        /* This is a PCI-E -> PCI-X bridge, this points to the
+         * corresponding bus PE
+         */
+        struct pnv_ioda_pe      *bus_pe;
+
+        /* "Base" iommu table, ie, 4K TCEs, 32-bit DMA */
+        int                     tce32_seg;
+        int                     tce32_segcount;
+        struct iommu_table      tce32_table;
+
+        /* XXX TODO: Add support for additional 64-bit iommus */
+
+        /* MSIs. MVE index is identical for for 32 and 64 bit MSI
+         * and -1 if not supported. (It's actually identical to the
+         * PE number)
+         */
+        int                     mve_number;
+
+        /* Link in list of PE#s */
+        struct list_head        link;
+};
+
 struct pnv_phb {
         struct pci_controller   *hose;
         enum pnv_phb_type       type;
+        enum pnv_phb_model      model;
         u64                     opal_id;
         void __iomem            *regs;
         spinlock_t              lock;
@@ -34,7 +88,52 @@ struct pnv_phb {
                 struct {
                         struct iommu_table iommu_table;
                 } p5ioc2;
+
+                struct {
+                        /* Global bridge info */
+                        unsigned int            total_pe;
+                        unsigned int            m32_size;
+                        unsigned int            m32_segsize;
+                        unsigned int            m32_pci_base;
+                        unsigned int            io_size;
+                        unsigned int            io_segsize;
+                        unsigned int            io_pci_base;
+
+                        /* PE allocation bitmap */
+                        unsigned long           *pe_alloc;
+
+                        /* M32 & IO segment maps */
+                        unsigned int            *m32_segmap;
+                        unsigned int            *io_segmap;
+                        struct pnv_ioda_pe      *pe_array;
+
+                        /* Reverse map of PEs, will have to extend if
+                         * we are to support more than 256 PEs, indexed
+                         * bus { bus, devfn }
+                         */
+                        unsigned char           pe_rmap[0x10000];
+
+                        /* 32-bit TCE tables allocation */
+                        unsigned long           tce32_count;
+
+                        /* Total "weight" for the sake of DMA resources
+                         * allocation
+                         */
+                        unsigned int            dma_weight;
+                        unsigned int            dma_pe_count;
+
+                        /* Sorted list of used PE's, sorted at
+                         * boot for resource allocation purposes
+                         */
+                        struct list_head        pe_list;
+                } ioda;
         };
+
+        /* PHB status structure */
+        union {
+                unsigned char                   blob[PNV_PCI_DIAG_BUF_SIZE];
+                struct OpalIoP7IOCPhbErrorData  p7ioc;
+        } diag;
 };
 
 extern struct pci_ops pnv_pci_ops;
@@ -43,6 +142,7 @@ extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
                                       void *tce_mem, u64 tce_size,
                                       u64 dma_offset);
 extern void pnv_pci_init_p5ioc2_hub(struct device_node *np);
+extern void pnv_pci_init_ioda_hub(struct device_node *np);
 
 
 #endif /* __POWERNV_PCI_H */
diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c
index e87736685243..17210c526c52 100644
--- a/arch/powerpc/platforms/powernv/smp.c
+++ b/arch/powerpc/platforms/powernv/smp.c
@@ -75,7 +75,7 @@ int __devinit pnv_smp_kick_cpu(int nr)
         /* On OPAL v2 the CPU are still spinning inside OPAL itself,
          * get them back now
          */
-        if (firmware_has_feature(FW_FEATURE_OPALv2)) {
+        if (!paca[nr].cpu_start && firmware_has_feature(FW_FEATURE_OPALv2)) {
                 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
                 rc = opal_start_cpu(pcpu, start_here);
                 if (rc != OPAL_SUCCESS)
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 404bc52b7806..617efa12a3a5 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -31,18 +31,18 @@
 
 #if defined(DEBUG)
 #define DBG udbg_printf
+#define FAIL udbg_printf
 #else
-#define DBG pr_debug
+#define DBG pr_devel
+#define FAIL pr_debug
 #endif
 
 /**
  * struct ps3_bmp - a per cpu irq status and mask bitmap structure
  * @status: 256 bit status bitmap indexed by plug
- * @unused_1:
+ * @unused_1: Alignment
  * @mask: 256 bit mask bitmap indexed by plug
- * @unused_2:
- * @lock:
- * @ipi_debug_brk_mask:
+ * @unused_2: Alignment
  *
  * The HV maintains per SMT thread mappings of HV outlet to HV plug on
  * behalf of the guest.  These mappings are implemented as 256 bit guest
@@ -73,21 +73,25 @@ struct ps3_bmp {
                 unsigned long mask;
                 u64 unused_2[3];
         };
-        u64 ipi_debug_brk_mask;
-        spinlock_t lock;
 };
 
 /**
  * struct ps3_private - a per cpu data structure
  * @bmp: ps3_bmp structure
+ * @bmp_lock: Syncronize access to bmp.
+ * @ipi_debug_brk_mask: Mask for debug break IPIs
  * @ppe_id: HV logical_ppe_id
  * @thread_id: HV thread_id
+ * @ipi_mask: Mask of IPI virqs
  */
 
 struct ps3_private {
         struct ps3_bmp bmp __attribute__ ((aligned (PS3_BMP_MINALIGN)));
+        spinlock_t bmp_lock;
         u64 ppe_id;
         u64 thread_id;
+        unsigned long ipi_debug_brk_mask;
+        unsigned long ipi_mask;
 };
 
 static DEFINE_PER_CPU(struct ps3_private, ps3_private);
@@ -104,7 +108,7 @@ static void ps3_chip_mask(struct irq_data *d)
         struct ps3_private *pd = irq_data_get_irq_chip_data(d);
         unsigned long flags;
 
-        pr_debug("%s:%d: thread_id %llu, virq %d\n", __func__, __LINE__,
+        DBG("%s:%d: thread_id %llu, virq %d\n", __func__, __LINE__,
                 pd->thread_id, d->irq);
 
         local_irq_save(flags);
@@ -125,7 +129,7 @@ static void ps3_chip_unmask(struct irq_data *d)
         struct ps3_private *pd = irq_data_get_irq_chip_data(d);
         unsigned long flags;
 
-        pr_debug("%s:%d: thread_id %llu, virq %d\n", __func__, __LINE__,
+        DBG("%s:%d: thread_id %llu, virq %d\n", __func__, __LINE__,
                 pd->thread_id, d->irq);
 
         local_irq_save(flags);
@@ -144,7 +148,11 @@ static void ps3_chip_unmask(struct irq_data *d)
 static void ps3_chip_eoi(struct irq_data *d)
 {
         const struct ps3_private *pd = irq_data_get_irq_chip_data(d);
-        lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, d->irq);
+
+        /* non-IPIs are EOIed here. */
+
+        if (!test_bit(63 - d->irq, &pd->ipi_mask))
+                lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, d->irq);
 }
 
 /**
@@ -185,19 +193,19 @@ static int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
         *virq = irq_create_mapping(NULL, outlet);
 
         if (*virq == NO_IRQ) {
-                pr_debug("%s:%d: irq_create_mapping failed: outlet %lu\n",
+                FAIL("%s:%d: irq_create_mapping failed: outlet %lu\n",
                         __func__, __LINE__, outlet);
                 result = -ENOMEM;
                 goto fail_create;
         }
 
-        pr_debug("%s:%d: outlet %lu => cpu %u, virq %u\n", __func__, __LINE__,
+        DBG("%s:%d: outlet %lu => cpu %u, virq %u\n", __func__, __LINE__,
                 outlet, cpu, *virq);
 
         result = irq_set_chip_data(*virq, pd);
 
         if (result) {
-                pr_debug("%s:%d: irq_set_chip_data failed\n",
+                FAIL("%s:%d: irq_set_chip_data failed\n",
                         __func__, __LINE__);
                 goto fail_set;
         }
@@ -223,13 +231,13 @@ static int ps3_virq_destroy(unsigned int virq)
 {
         const struct ps3_private *pd = irq_get_chip_data(virq);
 
-        pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
+        DBG("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
                 __LINE__, pd->ppe_id, pd->thread_id, virq);
 
         irq_set_chip_data(virq, NULL);
         irq_dispose_mapping(virq);
 
-        pr_debug("%s:%d <-\n", __func__, __LINE__);
+        DBG("%s:%d <-\n", __func__, __LINE__);
         return 0;
 }
 
@@ -252,7 +260,7 @@ int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
         result = ps3_virq_setup(cpu, outlet, virq);
 
         if (result) {
-                pr_debug("%s:%d: ps3_virq_setup failed\n", __func__, __LINE__);
+                FAIL("%s:%d: ps3_virq_setup failed\n", __func__, __LINE__);
                 goto fail_setup;
         }
 
@@ -264,7 +272,7 @@ int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
                 outlet, 0);
 
         if (result) {
-                pr_info("%s:%d: lv1_connect_irq_plug_ext failed: %s\n",
+                FAIL("%s:%d: lv1_connect_irq_plug_ext failed: %s\n",
                 __func__, __LINE__, ps3_result(result));
                 result = -EPERM;
                 goto fail_connect;
@@ -293,7 +301,7 @@ int ps3_irq_plug_destroy(unsigned int virq)
         int result;
         const struct ps3_private *pd = irq_get_chip_data(virq);
 
-        pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
+        DBG("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
                 __LINE__, pd->ppe_id, pd->thread_id, virq);
 
         ps3_chip_mask(irq_get_irq_data(virq));
@@ -301,7 +309,7 @@ int ps3_irq_plug_destroy(unsigned int virq)
         result = lv1_disconnect_irq_plug_ext(pd->ppe_id, pd->thread_id, virq);
 
         if (result)
-                pr_info("%s:%d: lv1_disconnect_irq_plug_ext failed: %s\n",
+                FAIL("%s:%d: lv1_disconnect_irq_plug_ext failed: %s\n",
                 __func__, __LINE__, ps3_result(result));
 
         ps3_virq_destroy(virq);
@@ -329,7 +337,7 @@ int ps3_event_receive_port_setup(enum ps3_cpu_binding cpu, unsigned int *virq)
         result = lv1_construct_event_receive_port(&outlet);
 
         if (result) {
-                pr_debug("%s:%d: lv1_construct_event_receive_port failed: %s\n",
+                FAIL("%s:%d: lv1_construct_event_receive_port failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
                 *virq = NO_IRQ;
                 return result;
@@ -355,14 +363,14 @@ int ps3_event_receive_port_destroy(unsigned int virq)
 {
         int result;
 
-        pr_debug(" -> %s:%d virq %u\n", __func__, __LINE__, virq);
+        DBG(" -> %s:%d virq %u\n", __func__, __LINE__, virq);
 
         ps3_chip_mask(irq_get_irq_data(virq));
 
         result = lv1_destruct_event_receive_port(virq_to_hw(virq));
 
         if (result)
-                pr_debug("%s:%d: lv1_destruct_event_receive_port failed: %s\n",
+                FAIL("%s:%d: lv1_destruct_event_receive_port failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
 
         /*
@@ -370,7 +378,7 @@ int ps3_event_receive_port_destroy(unsigned int virq)
          * calls from interrupt context (smp_call_function) when kexecing.
          */
 
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        DBG(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 
@@ -406,7 +414,7 @@ int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev,
                 dev->dev_id, virq_to_hw(*virq), dev->interrupt_id);
 
         if (result) {
-                pr_debug("%s:%d: lv1_connect_interrupt_event_receive_port"
+                FAIL("%s:%d: lv1_connect_interrupt_event_receive_port"
                         " failed: %s\n", __func__, __LINE__,
                         ps3_result(result));
                 ps3_event_receive_port_destroy(*virq);
@@ -414,7 +422,7 @@ int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev,
                 return result;
         }
 
-        pr_debug("%s:%d: interrupt_id %u, virq %u\n", __func__, __LINE__,
+        DBG("%s:%d: interrupt_id %u, virq %u\n", __func__, __LINE__,
                 dev->interrupt_id, *virq);
 
         return 0;
@@ -428,14 +436,14 @@ int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev,
 
         int result;
 
-        pr_debug(" -> %s:%d: interrupt_id %u, virq %u\n", __func__, __LINE__,
+        DBG(" -> %s:%d: interrupt_id %u, virq %u\n", __func__, __LINE__,
                 dev->interrupt_id, virq);
 
         result = lv1_disconnect_interrupt_event_receive_port(dev->bus_id,
                 dev->dev_id, virq_to_hw(virq), dev->interrupt_id);
 
         if (result)
-                pr_debug("%s:%d: lv1_disconnect_interrupt_event_receive_port"
+                FAIL("%s:%d: lv1_disconnect_interrupt_event_receive_port"
                         " failed: %s\n", __func__, __LINE__,
                         ps3_result(result));
 
@@ -450,7 +458,7 @@ int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev,
         result = ps3_virq_destroy(virq);
         BUG_ON(result);
 
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        DBG(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 EXPORT_SYMBOL(ps3_sb_event_receive_port_destroy);
@@ -475,7 +483,7 @@ int ps3_io_irq_setup(enum ps3_cpu_binding cpu, unsigned int interrupt_id,
         result = lv1_construct_io_irq_outlet(interrupt_id, &outlet);
 
         if (result) {
-                pr_debug("%s:%d: lv1_construct_io_irq_outlet failed: %s\n",
+                FAIL("%s:%d: lv1_construct_io_irq_outlet failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
                 return result;
         }
@@ -505,7 +513,7 @@ int ps3_io_irq_destroy(unsigned int virq)
         result = lv1_destruct_io_irq_outlet(outlet);
 
         if (result)
-                pr_debug("%s:%d: lv1_destruct_io_irq_outlet failed: %s\n",
+                FAIL("%s:%d: lv1_destruct_io_irq_outlet failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
 
         return result;
@@ -537,7 +545,7 @@ int ps3_vuart_irq_setup(enum ps3_cpu_binding cpu, void* virt_addr_bmp,
         result = lv1_configure_virtual_uart_irq(lpar_addr, &outlet);
 
         if (result) {
-                pr_debug("%s:%d: lv1_configure_virtual_uart_irq failed: %s\n",
+                FAIL("%s:%d: lv1_configure_virtual_uart_irq failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
                 return result;
         }
@@ -557,7 +565,7 @@ int ps3_vuart_irq_destroy(unsigned int virq)
         result = lv1_deconfigure_virtual_uart_irq();
 
         if (result) {
-                pr_debug("%s:%d: lv1_configure_virtual_uart_irq failed: %s\n",
+                FAIL("%s:%d: lv1_configure_virtual_uart_irq failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
                 return result;
         }
@@ -590,7 +598,7 @@ int ps3_spe_irq_setup(enum ps3_cpu_binding cpu, unsigned long spe_id,
         result = lv1_get_spe_irq_outlet(spe_id, class, &outlet);
 
         if (result) {
-                pr_debug("%s:%d: lv1_get_spe_irq_outlet failed: %s\n",
+                FAIL("%s:%d: lv1_get_spe_irq_outlet failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
                 return result;
         }
@@ -621,7 +629,7 @@ int ps3_spe_irq_destroy(unsigned int virq)
 static void _dump_64_bmp(const char *header, const u64 *p, unsigned cpu,
         const char* func, int line)
 {
-        pr_debug("%s:%d: %s %u {%04lx_%04lx_%04lx_%04lx}\n",
+        pr_debug("%s:%d: %s %u {%04llx_%04llx_%04llx_%04llx}\n",
                 func, line, header, cpu,
                 *p >> 48, (*p >> 32) & 0xffff, (*p >> 16) & 0xffff,
                 *p & 0xffff);
@@ -630,7 +638,7 @@ static void _dump_64_bmp(const char *header, const u64 *p, unsigned cpu,
 static void __maybe_unused _dump_256_bmp(const char *header,
         const u64 *p, unsigned cpu, const char* func, int line)
 {
-        pr_debug("%s:%d: %s %u {%016lx:%016lx:%016lx:%016lx}\n",
+        pr_debug("%s:%d: %s %u {%016llx:%016llx:%016llx:%016llx}\n",
                 func, line, header, cpu, p[0], p[1], p[2], p[3]);
 }
 
@@ -639,10 +647,10 @@ static void _dump_bmp(struct ps3_private* pd, const char* func, int line)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&pd->bmp.lock, flags);
+        spin_lock_irqsave(&pd->bmp_lock, flags);
         _dump_64_bmp("stat", &pd->bmp.status, pd->thread_id, func, line);
-        _dump_64_bmp("mask", &pd->bmp.mask, pd->thread_id, func, line);
-        spin_unlock_irqrestore(&pd->bmp.lock, flags);
+        _dump_64_bmp("mask", (u64*)&pd->bmp.mask, pd->thread_id, func, line);
+        spin_unlock_irqrestore(&pd->bmp_lock, flags);
 }
 
 #define dump_mask(_x) _dump_mask(_x, __func__, __LINE__)
@@ -651,9 +659,9 @@ static void __maybe_unused _dump_mask(struct ps3_private *pd,
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&pd->bmp.lock, flags);
-        _dump_64_bmp("mask", &pd->bmp.mask, pd->thread_id, func, line);
-        spin_unlock_irqrestore(&pd->bmp.lock, flags);
+        spin_lock_irqsave(&pd->bmp_lock, flags);
+        _dump_64_bmp("mask", (u64*)&pd->bmp.mask, pd->thread_id, func, line);
+        spin_unlock_irqrestore(&pd->bmp_lock, flags);
 }
 #else
 static void dump_bmp(struct ps3_private* pd) {};
@@ -662,7 +670,7 @@ static void dump_bmp(struct ps3_private* pd) {};
 static int ps3_host_map(struct irq_host *h, unsigned int virq,
         irq_hw_number_t hwirq)
 {
-        pr_debug("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq,
+        DBG("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq,
                 virq);
 
         irq_set_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq);
@@ -685,10 +693,20 @@ void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq)
 {
         struct ps3_private *pd = &per_cpu(ps3_private, cpu);
 
-        pd->bmp.ipi_debug_brk_mask = 0x8000000000000000UL >> virq;
+        set_bit(63 - virq, &pd->ipi_debug_brk_mask);
 
-        pr_debug("%s:%d: cpu %u, virq %u, mask %llxh\n", __func__, __LINE__,
-                cpu, virq, pd->bmp.ipi_debug_brk_mask);
+        DBG("%s:%d: cpu %u, virq %u, mask %lxh\n", __func__, __LINE__,
+                cpu, virq, pd->ipi_debug_brk_mask);
+}
+
+void __init ps3_register_ipi_irq(unsigned int cpu, unsigned int virq)
+{
+        struct ps3_private *pd = &per_cpu(ps3_private, cpu);
+
+        set_bit(63 - virq, &pd->ipi_mask);
+
+        DBG("%s:%d: cpu %u, virq %u, ipi_mask %lxh\n", __func__, __LINE__,
+                cpu, virq, pd->ipi_mask);
 }
 
 static unsigned int ps3_get_irq(void)
@@ -699,14 +717,14 @@ static unsigned int ps3_get_irq(void)
 
         /* check for ipi break first to stop this cpu ASAP */
 
-        if (x & pd->bmp.ipi_debug_brk_mask)
-                x &= pd->bmp.ipi_debug_brk_mask;
+        if (x & pd->ipi_debug_brk_mask)
+                x &= pd->ipi_debug_brk_mask;
 
         asm volatile("cntlzd %0,%1" : "=r" (plug) : "r" (x));
         plug &= 0x3f;
 
         if (unlikely(plug == NO_IRQ)) {
-                pr_debug("%s:%d: no plug found: thread_id %llu\n", __func__,
+                DBG("%s:%d: no plug found: thread_id %llu\n", __func__,
                         __LINE__, pd->thread_id);
                 dump_bmp(&per_cpu(ps3_private, 0));
                 dump_bmp(&per_cpu(ps3_private, 1));
@@ -720,6 +738,12 @@ static unsigned int ps3_get_irq(void)
                 BUG();
         }
 #endif
+
+        /* IPIs are EOIed here. */
+
+        if (test_bit(63 - plug, &pd->ipi_mask))
+                lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, plug);
+
         return plug;
 }
 
@@ -739,9 +763,9 @@ void __init ps3_init_IRQ(void)
 
                 lv1_get_logical_ppe_id(&pd->ppe_id);
                 pd->thread_id = get_hard_smp_processor_id(cpu);
-                spin_lock_init(&pd->bmp.lock);
+                spin_lock_init(&pd->bmp_lock);
 
-                pr_debug("%s:%d: ppe_id %llu, thread_id %llu, bmp %lxh\n",
+                DBG("%s:%d: ppe_id %llu, thread_id %llu, bmp %lxh\n",
                         __func__, __LINE__, pd->ppe_id, pd->thread_id,
                         ps3_mm_phys_to_lpar(__pa(&pd->bmp)));
 
@@ -749,7 +773,7 @@ void __init ps3_init_IRQ(void)
                         pd->thread_id, ps3_mm_phys_to_lpar(__pa(&pd->bmp)));
 
                 if (result)
-                        pr_debug("%s:%d: lv1_configure_irq_state_bitmap failed:"
+                        FAIL("%s:%d: lv1_configure_irq_state_bitmap failed:"
                                 " %s\n", __func__, __LINE__,
                                 ps3_result(result));
         }
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index 72714ad27842..8bd6ba542691 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -319,7 +319,6 @@ static int __init ps3_mm_add_memory(void)
         }
 
         memblock_add(start_addr, map.r1.size);
-        memblock_analyze();
 
         result = online_pages(start_pfn, nr_pages);
 
diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h
index 9a196a88eda7..1a633ed0fe98 100644
--- a/arch/powerpc/platforms/ps3/platform.h
+++ b/arch/powerpc/platforms/ps3/platform.h
@@ -43,6 +43,7 @@ void ps3_mm_shutdown(void);
 void ps3_init_IRQ(void);
 void ps3_shutdown_IRQ(int cpu);
 void __init ps3_register_ipi_debug_brk(unsigned int cpu, unsigned int virq);
+void __init ps3_register_ipi_irq(unsigned int cpu, unsigned int virq);
 
 /* smp */
 
diff --git a/arch/powerpc/platforms/ps3/repository.c b/arch/powerpc/platforms/ps3/repository.c
index ca40f6afd35d..7bdfea336f5e 100644
--- a/arch/powerpc/platforms/ps3/repository.c
+++ b/arch/powerpc/platforms/ps3/repository.c
@@ -44,7 +44,7 @@ static void _dump_field(const char *hdr, u64 n, const char *func, int line)
                 s[i] = (in[i] <= 126 && in[i] >= 32) ? in[i] : '.';
         s[i] = 0;
 
-        pr_debug("%s:%d: %s%016llx : %s\n", func, line, hdr, n, s);
+        pr_devel("%s:%d: %s%016llx : %s\n", func, line, hdr, n, s);
 #endif
 }
 
@@ -53,7 +53,7 @@ static void _dump_field(const char *hdr, u64 n, const char *func, int line)
 static void _dump_node_name(unsigned int lpar_id, u64 n1, u64 n2, u64 n3,
         u64 n4, const char *func, int line)
 {
-        pr_debug("%s:%d: lpar: %u\n", func, line, lpar_id);
+        pr_devel("%s:%d: lpar: %u\n", func, line, lpar_id);
         _dump_field("n1: ", n1, func, line);
         _dump_field("n2: ", n2, func, line);
         _dump_field("n3: ", n3, func, line);
@@ -65,13 +65,13 @@ static void _dump_node_name(unsigned int lpar_id, u64 n1, u64 n2, u64 n3,
 static void _dump_node(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, u64 n4,
         u64 v1, u64 v2, const char *func, int line)
 {
-        pr_debug("%s:%d: lpar: %u\n", func, line, lpar_id);
+        pr_devel("%s:%d: lpar: %u\n", func, line, lpar_id);
         _dump_field("n1: ", n1, func, line);
         _dump_field("n2: ", n2, func, line);
         _dump_field("n3: ", n3, func, line);
         _dump_field("n4: ", n4, func, line);
-        pr_debug("%s:%d: v1: %016llx\n", func, line, v1);
-        pr_debug("%s:%d: v2: %016llx\n", func, line, v2);
+        pr_devel("%s:%d: v1: %016llx\n", func, line, v1);
+        pr_devel("%s:%d: v2: %016llx\n", func, line, v2);
 }
 
 /**
@@ -131,11 +131,11 @@ static int read_node(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, u64 n4,
                 lpar_id = id;
         }
 
-        result = lv1_get_repository_node_value(lpar_id, n1, n2, n3, n4, &v1,
+        result = lv1_read_repository_node(lpar_id, n1, n2, n3, n4, &v1,
                 &v2);
 
         if (result) {
-                pr_debug("%s:%d: lv1_get_repository_node_value failed: %s\n",
+                pr_warn("%s:%d: lv1_read_repository_node failed: %s\n",
                         __func__, __LINE__, ps3_result(result));
                 dump_node_name(lpar_id, n1, n2, n3, n4);
                 return -ENOENT;
@@ -149,10 +149,10 @@ static int read_node(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, u64 n4,
                 *_v2 = v2;
 
         if (v1 && !_v1)
-                pr_debug("%s:%d: warning: discarding non-zero v1: %016llx\n",
+                pr_devel("%s:%d: warning: discarding non-zero v1: %016llx\n",
                         __func__, __LINE__, v1);
         if (v2 && !_v2)
-                pr_debug("%s:%d: warning: discarding non-zero v2: %016llx\n",
+                pr_devel("%s:%d: warning: discarding non-zero v2: %016llx\n",
                         __func__, __LINE__, v2);
 
         return 0;
@@ -323,16 +323,16 @@ int ps3_repository_find_device(struct ps3_repository_device *repo)
         result = ps3_repository_read_bus_num_dev(tmp.bus_index, &num_dev);
 
         if (result) {
-                pr_debug("%s:%d read_bus_num_dev failed\n", __func__, __LINE__);
+                pr_devel("%s:%d read_bus_num_dev failed\n", __func__, __LINE__);
                 return result;
         }
 
-        pr_debug("%s:%d: bus_type %u, bus_index %u, bus_id %llu, num_dev %u\n",
+        pr_devel("%s:%d: bus_type %u, bus_index %u, bus_id %llu, num_dev %u\n",
                 __func__, __LINE__, tmp.bus_type, tmp.bus_index, tmp.bus_id,
                 num_dev);
 
         if (tmp.dev_index >= num_dev) {
-                pr_debug("%s:%d: no device found\n", __func__, __LINE__);
+                pr_devel("%s:%d: no device found\n", __func__, __LINE__);
                 return -ENODEV;
         }
 
@@ -340,7 +340,7 @@ int ps3_repository_find_device(struct ps3_repository_device *repo)
                 &tmp.dev_type);
 
         if (result) {
-                pr_debug("%s:%d read_dev_type failed\n", __func__, __LINE__);
+                pr_devel("%s:%d read_dev_type failed\n", __func__, __LINE__);
                 return result;
         }
 
@@ -348,12 +348,12 @@ int ps3_repository_find_device(struct ps3_repository_device *repo)
                 &tmp.dev_id);
 
         if (result) {
-                pr_debug("%s:%d ps3_repository_read_dev_id failed\n", __func__,
+                pr_devel("%s:%d ps3_repository_read_dev_id failed\n", __func__,
                 __LINE__);
                 return result;
         }
 
-        pr_debug("%s:%d: found: dev_type %u, dev_index %u, dev_id %llu\n",
+        pr_devel("%s:%d: found: dev_type %u, dev_index %u, dev_id %llu\n",
                 __func__, __LINE__, tmp.dev_type, tmp.dev_index, tmp.dev_id);
 
         *repo = tmp;
@@ -367,14 +367,14 @@ int ps3_repository_find_device_by_id(struct ps3_repository_device *repo,
         struct ps3_repository_device tmp;
         unsigned int num_dev;
 
-        pr_debug(" -> %s:%u: find device by id %llu:%llu\n", __func__, __LINE__,
+        pr_devel(" -> %s:%u: find device by id %llu:%llu\n", __func__, __LINE__,
                  bus_id, dev_id);
 
         for (tmp.bus_index = 0; tmp.bus_index < 10; tmp.bus_index++) {
                 result = ps3_repository_read_bus_id(tmp.bus_index,
                                                     &tmp.bus_id);
                 if (result) {
-                        pr_debug("%s:%u read_bus_id(%u) failed\n", __func__,
+                        pr_devel("%s:%u read_bus_id(%u) failed\n", __func__,
                                  __LINE__, tmp.bus_index);
                         return result;
                 }
@@ -382,23 +382,23 @@ int ps3_repository_find_device_by_id(struct ps3_repository_device *repo,
                 if (tmp.bus_id == bus_id)
                         goto found_bus;
 
-                pr_debug("%s:%u: skip, bus_id %llu\n", __func__, __LINE__,
+                pr_devel("%s:%u: skip, bus_id %llu\n", __func__, __LINE__,
                          tmp.bus_id);
         }
-        pr_debug(" <- %s:%u: bus not found\n", __func__, __LINE__);
+        pr_devel(" <- %s:%u: bus not found\n", __func__, __LINE__);
         return result;
 
 found_bus:
         result = ps3_repository_read_bus_type(tmp.bus_index, &tmp.bus_type);
         if (result) {
-                pr_debug("%s:%u read_bus_type(%u) failed\n", __func__,
+                pr_devel("%s:%u read_bus_type(%u) failed\n", __func__,
                          __LINE__, tmp.bus_index);
                 return result;
         }
 
         result = ps3_repository_read_bus_num_dev(tmp.bus_index, &num_dev);
         if (result) {
-                pr_debug("%s:%u read_bus_num_dev failed\n", __func__,
+                pr_devel("%s:%u read_bus_num_dev failed\n", __func__,
                          __LINE__);
                 return result;
         }
@@ -408,7 +408,7 @@ found_bus:
                                                     tmp.dev_index,
                                                     &tmp.dev_id);
                 if (result) {
-                        pr_debug("%s:%u read_dev_id(%u:%u) failed\n", __func__,
+                        pr_devel("%s:%u read_dev_id(%u:%u) failed\n", __func__,
                                  __LINE__, tmp.bus_index, tmp.dev_index);
                         return result;
                 }
@@ -416,21 +416,21 @@ found_bus:
                 if (tmp.dev_id == dev_id)
                         goto found_dev;
 
-                pr_debug("%s:%u: skip, dev_id %llu\n", __func__, __LINE__,
+                pr_devel("%s:%u: skip, dev_id %llu\n", __func__, __LINE__,
                          tmp.dev_id);
         }
-        pr_debug(" <- %s:%u: dev not found\n", __func__, __LINE__);
+        pr_devel(" <- %s:%u: dev not found\n", __func__, __LINE__);
         return result;
 
 found_dev:
         result = ps3_repository_read_dev_type(tmp.bus_index, tmp.dev_index,
                                               &tmp.dev_type);
         if (result) {
-                pr_debug("%s:%u read_dev_type failed\n", __func__, __LINE__);
+                pr_devel("%s:%u read_dev_type failed\n", __func__, __LINE__);
                 return result;
         }
 
-        pr_debug(" <- %s:%u: found: type (%u:%u) index (%u:%u) id (%llu:%llu)\n",
+        pr_devel(" <- %s:%u: found: type (%u:%u) index (%u:%u) id (%llu:%llu)\n",
                  __func__, __LINE__, tmp.bus_type, tmp.dev_type, tmp.bus_index,
                  tmp.dev_index, tmp.bus_id, tmp.dev_id);
         *repo = tmp;
@@ -443,18 +443,18 @@ int __devinit ps3_repository_find_devices(enum ps3_bus_type bus_type,
         int result = 0;
         struct ps3_repository_device repo;
 
-        pr_debug(" -> %s:%d: find bus_type %u\n", __func__, __LINE__, bus_type);
+        pr_devel(" -> %s:%d: find bus_type %u\n", __func__, __LINE__, bus_type);
 
         repo.bus_type = bus_type;
         result = ps3_repository_find_bus(repo.bus_type, 0, &repo.bus_index);
         if (result) {
-                pr_debug(" <- %s:%u: bus not found\n", __func__, __LINE__);
+                pr_devel(" <- %s:%u: bus not found\n", __func__, __LINE__);
                 return result;
         }
 
         result = ps3_repository_read_bus_id(repo.bus_index, &repo.bus_id);
         if (result) {
-                pr_debug("%s:%d read_bus_id(%u) failed\n", __func__, __LINE__,
+                pr_devel("%s:%d read_bus_id(%u) failed\n", __func__, __LINE__,
                          repo.bus_index);
                 return result;
         }
@@ -469,13 +469,13 @@ int __devinit ps3_repository_find_devices(enum ps3_bus_type bus_type,
 
                 result = callback(&repo);
                 if (result) {
-                        pr_debug("%s:%d: abort at callback\n", __func__,
+                        pr_devel("%s:%d: abort at callback\n", __func__,
                                 __LINE__);
                         break;
                 }
         }
 
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        pr_devel(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 
@@ -489,7 +489,7 @@ int ps3_repository_find_bus(enum ps3_bus_type bus_type, unsigned int from,
         for (i = from; i < 10; i++) {
                 error = ps3_repository_read_bus_type(i, &type);
                 if (error) {
-                        pr_debug("%s:%d read_bus_type failed\n",
+                        pr_devel("%s:%d read_bus_type failed\n",
                                 __func__, __LINE__);
                         *bus_index = UINT_MAX;
                         return error;
@@ -509,7 +509,7 @@ int ps3_repository_find_interrupt(const struct ps3_repository_device *repo,
         int result = 0;
         unsigned int res_index;
 
-        pr_debug("%s:%d: find intr_type %u\n", __func__, __LINE__, intr_type);
+        pr_devel("%s:%d: find intr_type %u\n", __func__, __LINE__, intr_type);
 
         *interrupt_id = UINT_MAX;
 
@@ -521,7 +521,7 @@ int ps3_repository_find_interrupt(const struct ps3_repository_device *repo,
                         repo->dev_index, res_index, &t, &id);
 
                 if (result) {
-                        pr_debug("%s:%d read_dev_intr failed\n",
+                        pr_devel("%s:%d read_dev_intr failed\n",
                                 __func__, __LINE__);
                         return result;
                 }
@@ -535,7 +535,7 @@ int ps3_repository_find_interrupt(const struct ps3_repository_device *repo,
         if (res_index == 10)
                 return -ENODEV;
 
-        pr_debug("%s:%d: found intr_type %u at res_index %u\n",
+        pr_devel("%s:%d: found intr_type %u at res_index %u\n",
                 __func__, __LINE__, intr_type, res_index);
 
         return result;
@@ -547,7 +547,7 @@ int ps3_repository_find_reg(const struct ps3_repository_device *repo,
         int result = 0;
         unsigned int res_index;
 
-        pr_debug("%s:%d: find reg_type %u\n", __func__, __LINE__, reg_type);
+        pr_devel("%s:%d: find reg_type %u\n", __func__, __LINE__, reg_type);
 
         *bus_addr = *len = 0;
 
@@ -560,7 +560,7 @@ int ps3_repository_find_reg(const struct ps3_repository_device *repo,
                         repo->dev_index, res_index, &t, &a, &l);
 
                 if (result) {
-                        pr_debug("%s:%d read_dev_reg failed\n",
+                        pr_devel("%s:%d read_dev_reg failed\n",
                                 __func__, __LINE__);
                         return result;
                 }
@@ -575,7 +575,7 @@ int ps3_repository_find_reg(const struct ps3_repository_device *repo,
         if (res_index == 10)
                 return -ENODEV;
 
-        pr_debug("%s:%d: found reg_type %u at res_index %u\n",
+        pr_devel("%s:%d: found reg_type %u at res_index %u\n",
                 __func__, __LINE__, reg_type, res_index);
 
         return result;
@@ -1009,7 +1009,7 @@ int ps3_repository_dump_resource_info(const struct ps3_repository_device *repo)
         int result = 0;
         unsigned int res_index;
 
-        pr_debug(" -> %s:%d: (%u:%u)\n", __func__, __LINE__,
+        pr_devel(" -> %s:%d: (%u:%u)\n", __func__, __LINE__,
                 repo->bus_index, repo->dev_index);
 
         for (res_index = 0; res_index < 10; res_index++) {
@@ -1021,13 +1021,13 @@ int ps3_repository_dump_resource_info(const struct ps3_repository_device *repo)
 
                 if (result) {
                         if (result !=  LV1_NO_ENTRY)
-                                pr_debug("%s:%d ps3_repository_read_dev_intr"
+                                pr_devel("%s:%d ps3_repository_read_dev_intr"
                                         " (%u:%u) failed\n", __func__, __LINE__,
                                         repo->bus_index, repo->dev_index);
                         break;
                 }
 
-                pr_debug("%s:%d (%u:%u) intr_type %u, interrupt_id %u\n",
+                pr_devel("%s:%d (%u:%u) intr_type %u, interrupt_id %u\n",
                         __func__, __LINE__, repo->bus_index, repo->dev_index,
                         intr_type, interrupt_id);
         }
@@ -1042,18 +1042,18 @@ int ps3_repository_dump_resource_info(const struct ps3_repository_device *repo)
 
                 if (result) {
                         if (result !=  LV1_NO_ENTRY)
-                                pr_debug("%s:%d ps3_repository_read_dev_reg"
+                                pr_devel("%s:%d ps3_repository_read_dev_reg"
                                         " (%u:%u) failed\n", __func__, __LINE__,
                                         repo->bus_index, repo->dev_index);
                         break;
                 }
 
-                pr_debug("%s:%d (%u:%u) reg_type %u, bus_addr %lxh, len %lxh\n",
+                pr_devel("%s:%d (%u:%u) reg_type %u, bus_addr %llxh, len %llxh\n",
                         __func__, __LINE__, repo->bus_index, repo->dev_index,
                         reg_type, bus_addr, len);
         }
 
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        pr_devel(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 
@@ -1063,22 +1063,22 @@ static int dump_stor_dev_info(struct ps3_repository_device *repo)
         unsigned int num_regions, region_index;
         u64 port, blk_size, num_blocks;
 
-        pr_debug(" -> %s:%d: (%u:%u)\n", __func__, __LINE__,
+        pr_devel(" -> %s:%d: (%u:%u)\n", __func__, __LINE__,
                 repo->bus_index, repo->dev_index);
 
         result = ps3_repository_read_stor_dev_info(repo->bus_index,
                 repo->dev_index, &port, &blk_size, &num_blocks, &num_regions);
         if (result) {
-                pr_debug("%s:%d ps3_repository_read_stor_dev_info"
+                pr_devel("%s:%d ps3_repository_read_stor_dev_info"
                         " (%u:%u) failed\n", __func__, __LINE__,
                         repo->bus_index, repo->dev_index);
                 goto out;
         }
 
-        pr_debug("%s:%d  (%u:%u): port %lu, blk_size %lu, num_blocks "
-                 "%lu, num_regions %u\n",
-                 __func__, __LINE__, repo->bus_index, repo->dev_index, port,
-                 blk_size, num_blocks, num_regions);
+        pr_devel("%s:%d  (%u:%u): port %llu, blk_size %llu, num_blocks "
+                 "%llu, num_regions %u\n",
+                 __func__, __LINE__, repo->bus_index, repo->dev_index,
+                port, blk_size, num_blocks, num_regions);
 
         for (region_index = 0; region_index < num_regions; region_index++) {
                 unsigned int region_id;
@@ -1088,19 +1088,20 @@ static int dump_stor_dev_info(struct ps3_repository_device *repo)
                         repo->dev_index, region_index, &region_id,
                         &region_start, &region_size);
                 if (result) {
-                         pr_debug("%s:%d ps3_repository_read_stor_dev_region"
+                         pr_devel("%s:%d ps3_repository_read_stor_dev_region"
                                   " (%u:%u) failed\n", __func__, __LINE__,
                                   repo->bus_index, repo->dev_index);
                         break;
                 }
 
-                pr_debug("%s:%d (%u:%u) region_id %u, start %lxh, size %lxh\n",
+                pr_devel("%s:%d (%u:%u) region_id %u, start %lxh, size %lxh\n",
                         __func__, __LINE__, repo->bus_index, repo->dev_index,
-                        region_id, region_start, region_size);
+                        region_id, (unsigned long)region_start,
+                        (unsigned long)region_size);
         }
 
 out:
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        pr_devel(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 
@@ -1109,7 +1110,7 @@ static int dump_device_info(struct ps3_repository_device *repo,
 {
         int result = 0;
 
-        pr_debug(" -> %s:%d: bus_%u\n", __func__, __LINE__, repo->bus_index);
+        pr_devel(" -> %s:%d: bus_%u\n", __func__, __LINE__, repo->bus_index);
 
         for (repo->dev_index = 0; repo->dev_index < num_dev;
                 repo->dev_index++) {
@@ -1118,7 +1119,7 @@ static int dump_device_info(struct ps3_repository_device *repo,
                         repo->dev_index, &repo->dev_type);
 
                 if (result) {
-                        pr_debug("%s:%d ps3_repository_read_dev_type"
+                        pr_devel("%s:%d ps3_repository_read_dev_type"
                                 " (%u:%u) failed\n", __func__, __LINE__,
                                 repo->bus_index, repo->dev_index);
                         break;
@@ -1128,15 +1129,15 @@ static int dump_device_info(struct ps3_repository_device *repo,
                         repo->dev_index, &repo->dev_id);
 
                 if (result) {
-                        pr_debug("%s:%d ps3_repository_read_dev_id"
+                        pr_devel("%s:%d ps3_repository_read_dev_id"
                                 " (%u:%u) failed\n", __func__, __LINE__,
                                 repo->bus_index, repo->dev_index);
                         continue;
                 }
 
-                pr_debug("%s:%d  (%u:%u): dev_type %u, dev_id %lu\n", __func__,
+                pr_devel("%s:%d  (%u:%u): dev_type %u, dev_id %lu\n", __func__,
                         __LINE__, repo->bus_index, repo->dev_index,
-                        repo->dev_type, repo->dev_id);
+                        repo->dev_type, (unsigned long)repo->dev_id);
 
                 ps3_repository_dump_resource_info(repo);
 
@@ -1144,7 +1145,7 @@ static int dump_device_info(struct ps3_repository_device *repo,
                         dump_stor_dev_info(repo);
         }
 
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        pr_devel(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 
@@ -1153,7 +1154,7 @@ int ps3_repository_dump_bus_info(void)
         int result = 0;
         struct ps3_repository_device repo;
 
-        pr_debug(" -> %s:%d\n", __func__, __LINE__);
+        pr_devel(" -> %s:%d\n", __func__, __LINE__);
 
         memset(&repo, 0, sizeof(repo));
 
@@ -1164,7 +1165,7 @@ int ps3_repository_dump_bus_info(void)
                         &repo.bus_type);
 
                 if (result) {
-                        pr_debug("%s:%d read_bus_type(%u) failed\n",
+                        pr_devel("%s:%d read_bus_type(%u) failed\n",
                                 __func__, __LINE__, repo.bus_index);
                         break;
                 }
@@ -1173,32 +1174,32 @@ int ps3_repository_dump_bus_info(void)
                         &repo.bus_id);
 
                 if (result) {
-                        pr_debug("%s:%d read_bus_id(%u) failed\n",
+                        pr_devel("%s:%d read_bus_id(%u) failed\n",
                                 __func__, __LINE__, repo.bus_index);
                         continue;
                 }
 
                 if (repo.bus_index != repo.bus_id)
-                        pr_debug("%s:%d bus_index != bus_id\n",
+                        pr_devel("%s:%d bus_index != bus_id\n",
                                 __func__, __LINE__);
 
                 result = ps3_repository_read_bus_num_dev(repo.bus_index,
                         &num_dev);
 
                 if (result) {
-                        pr_debug("%s:%d read_bus_num_dev(%u) failed\n",
+                        pr_devel("%s:%d read_bus_num_dev(%u) failed\n",
                                 __func__, __LINE__, repo.bus_index);
                         continue;
                 }
 
-                pr_debug("%s:%d bus_%u: bus_type %u, bus_id %lu, num_dev %u\n",
+                pr_devel("%s:%d bus_%u: bus_type %u, bus_id %lu, num_dev %u\n",
                         __func__, __LINE__, repo.bus_index, repo.bus_type,
-                        repo.bus_id, num_dev);
+                        (unsigned long)repo.bus_id, num_dev);
 
                 dump_device_info(&repo, num_dev);
         }
 
-        pr_debug(" <- %s:%d\n", __func__, __LINE__);
+        pr_devel(" <- %s:%d\n", __func__, __LINE__);
         return result;
 }
 
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c
index e8ec1b2bfffd..2d664c5a83b0 100644
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -193,10 +193,12 @@ static int ps3_set_dabr(unsigned long dabr)
 
 static void __init ps3_setup_arch(void)
 {
+        u64 tmp;
 
         DBG(" -> %s:%d\n", __func__, __LINE__);
 
-        lv1_get_version_info(&ps3_firmware_version.raw);
+        lv1_get_version_info(&ps3_firmware_version.raw, &tmp);
+
         printk(KERN_INFO "PS3 firmware version %u.%u.%u\n",
                ps3_firmware_version.major, ps3_firmware_version.minor,
                ps3_firmware_version.rev);
diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c
index 4c44794faac0..4b35166229fe 100644
--- a/arch/powerpc/platforms/ps3/smp.c
+++ b/arch/powerpc/platforms/ps3/smp.c
@@ -57,48 +57,51 @@ static void ps3_smp_message_pass(int cpu, int msg)
                         " (%d)\n", __func__, __LINE__, cpu, msg, result);
 }
 
-static int ps3_smp_probe(void)
+static int __init ps3_smp_probe(void)
 {
-        return 2;
-}
+        int cpu;
 
-static void __init ps3_smp_setup_cpu(int cpu)
-{
-        int result;
-        unsigned int *virqs = per_cpu(ps3_ipi_virqs, cpu);
-        int i;
+        for (cpu = 0; cpu < 2; cpu++) {
+                int result;
+                unsigned int *virqs = per_cpu(ps3_ipi_virqs, cpu);
+                int i;
 
-        DBG(" -> %s:%d: (%d)\n", __func__, __LINE__, cpu);
+                DBG(" -> %s:%d: (%d)\n", __func__, __LINE__, cpu);
 
-        /*
-         * Check assumptions on ps3_ipi_virqs[] indexing. If this
-         * check fails, then a different mapping of PPC_MSG_
-         * to index needs to be setup.
-         */
+                /*
+                * Check assumptions on ps3_ipi_virqs[] indexing. If this
+                * check fails, then a different mapping of PPC_MSG_
+                * to index needs to be setup.
+                */
 
-        BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION    != 0);
-        BUILD_BUG_ON(PPC_MSG_RESCHEDULE       != 1);
-        BUILD_BUG_ON(PPC_MSG_CALL_FUNC_SINGLE != 2);
-        BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK   != 3);
+                BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION    != 0);
+                BUILD_BUG_ON(PPC_MSG_RESCHEDULE       != 1);
+                BUILD_BUG_ON(PPC_MSG_CALL_FUNC_SINGLE != 2);
+                BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK   != 3);
 
-        for (i = 0; i < MSG_COUNT; i++) {
-                result = ps3_event_receive_port_setup(cpu, &virqs[i]);
+                for (i = 0; i < MSG_COUNT; i++) {
+                        result = ps3_event_receive_port_setup(cpu, &virqs[i]);
 
-                if (result)
-                        continue;
+                        if (result)
+                                continue;
 
-                DBG("%s:%d: (%d, %d) => virq %u\n",
-                        __func__, __LINE__, cpu, i, virqs[i]);
+                        DBG("%s:%d: (%d, %d) => virq %u\n",
+                                __func__, __LINE__, cpu, i, virqs[i]);
 
-                result = smp_request_message_ipi(virqs[i], i);
+                        result = smp_request_message_ipi(virqs[i], i);
 
-                if (result)
-                        virqs[i] = NO_IRQ;
-        }
+                        if (result)
+                                virqs[i] = NO_IRQ;
+                        else
+                                ps3_register_ipi_irq(cpu, virqs[i]);
+                }
 
-        ps3_register_ipi_debug_brk(cpu, virqs[PPC_MSG_DEBUGGER_BREAK]);
+                ps3_register_ipi_debug_brk(cpu, virqs[PPC_MSG_DEBUGGER_BREAK]);
 
-        DBG(" <- %s:%d: (%d)\n", __func__, __LINE__, cpu);
+                DBG(" <- %s:%d: (%d)\n", __func__, __LINE__, cpu);
+        }
+
+        return 2;
 }
 
 void ps3_smp_cleanup_cpu(int cpu)
@@ -121,7 +124,6 @@ static struct smp_ops_t ps3_smp_ops = {
         .probe          = ps3_smp_probe,
         .message_pass   = ps3_smp_message_pass,
         .kick_cpu       = smp_generic_kick_cpu,
-        .setup_cpu      = ps3_smp_setup_cpu,
 };
 
 void smp_init_ps3(void)
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index 451fad1c92a8..e17fa1432d80 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -154,7 +154,7 @@ static unsigned long get_vas_id(void)
         u64 id;
 
         lv1_get_logical_ppe_id(&id);
-        lv1_get_virtual_address_space_id_of_ppe(id, &id);
+        lv1_get_virtual_address_space_id_of_ppe(&id);
 
         return id;
 }
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index c81f6bb9c10f..ae7b6d41fed3 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -120,3 +120,12 @@ config DTL
           which are accessible through a debugfs file.
 
           Say N if you are unsure.
+
+config PSERIES_IDLE
+        tristate "Cpuidle driver for pSeries platforms"
+        depends on CPU_IDLE
+        depends on PPC_PSERIES
+        default y
+        help
+          Select this option to enable processor idle state management
+          through cpuidle subsystem.
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 3556e402cbf5..236db46b4078 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_PHYP_DUMP)		+= phyp_dump.o
 obj-$(CONFIG_CMM)               += cmm.o
 obj-$(CONFIG_DTL)               += dtl.o
 obj-$(CONFIG_IO_EVENT_IRQ)      += io_event_irq.o
+obj-$(CONFIG_PSERIES_IDLE)      += processor_idle.o
 
 ifeq ($(CONFIG_PPC_PSERIES),y)
 obj-$(CONFIG_SUSPEND)           += suspend.o
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index 3cafc306b971..c638535753df 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -33,7 +33,7 @@
 #include <linux/sched.h>
 #include <linux/stringify.h>
 #include <linux/swap.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <asm/firmware.h>
 #include <asm/hvcall.h>
 #include <asm/mmu.h>
@@ -65,7 +65,7 @@ static unsigned int oom_kb = CMM_OOM_KB;
 static unsigned int cmm_debug = CMM_DEBUG;
 static unsigned int cmm_disabled = CMM_DISABLE;
 static unsigned long min_mem_mb = CMM_MIN_MEM_MB;
-static struct sys_device cmm_sysdev;
+static struct device cmm_dev;
 
 MODULE_AUTHOR("Brian King <brking@linux.vnet.ibm.com>");
 MODULE_DESCRIPTION("IBM System p Collaborative Memory Manager");
@@ -347,25 +347,25 @@ static int cmm_thread(void *dummy)
 }
 
 #define CMM_SHOW(name, format, args...)                 \
-        static ssize_t show_##name(struct sys_device *dev,      \
-                                   struct sysdev_attribute *attr,       \
+        static ssize_t show_##name(struct device *dev,  \
+                                   struct device_attribute *attr,       \
                                    char *buf)                   \
         {                                                       \
                 return sprintf(buf, format, ##args);            \
         }                                                       \
-        static SYSDEV_ATTR(name, S_IRUGO, show_##name, NULL)
+        static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
 
 CMM_SHOW(loaned_kb, "%lu\n", PAGES2KB(loaned_pages));
 CMM_SHOW(loaned_target_kb, "%lu\n", PAGES2KB(loaned_pages_target));
 
-static ssize_t show_oom_pages(struct sys_device *dev,
-                              struct sysdev_attribute *attr, char *buf)
+static ssize_t show_oom_pages(struct device *dev,
+                              struct device_attribute *attr, char *buf)
 {
         return sprintf(buf, "%lu\n", PAGES2KB(oom_freed_pages));
 }
 
-static ssize_t store_oom_pages(struct sys_device *dev,
-                               struct sysdev_attribute *attr,
+static ssize_t store_oom_pages(struct device *dev,
+                               struct device_attribute *attr,
                                const char *buf, size_t count)
 {
         unsigned long val = simple_strtoul (buf, NULL, 10);
@@ -379,17 +379,18 @@ static ssize_t store_oom_pages(struct sys_device *dev,
         return count;
 }
 
-static SYSDEV_ATTR(oom_freed_kb, S_IWUSR| S_IRUGO,
+static DEVICE_ATTR(oom_freed_kb, S_IWUSR | S_IRUGO,
                    show_oom_pages, store_oom_pages);
 
-static struct sysdev_attribute *cmm_attrs[] = {
-        &attr_loaned_kb,
-        &attr_loaned_target_kb,
-        &attr_oom_freed_kb,
+static struct device_attribute *cmm_attrs[] = {
+        &dev_attr_loaned_kb,
+        &dev_attr_loaned_target_kb,
+        &dev_attr_oom_freed_kb,
 };
 
-static struct sysdev_class cmm_sysdev_class = {
+static struct bus_type cmm_subsys = {
         .name = "cmm",
+        .dev_name = "cmm",
 };
 
 /**
@@ -398,21 +399,21 @@ static struct sysdev_class cmm_sysdev_class = {
  * Return value:
  *      0 on success / other on failure
  **/
-static int cmm_sysfs_register(struct sys_device *sysdev)
+static int cmm_sysfs_register(struct device *dev)
 {
         int i, rc;
 
-        if ((rc = sysdev_class_register(&cmm_sysdev_class)))
+        if ((rc = subsys_system_register(&cmm_subsys, NULL)))
                 return rc;
 
-        sysdev->id = 0;
-        sysdev->cls = &cmm_sysdev_class;
+        dev->id = 0;
+        dev->bus = &cmm_subsys;
 
-        if ((rc = sysdev_register(sysdev)))
-                goto class_unregister;
+        if ((rc = device_register(dev)))
+                goto subsys_unregister;
 
         for (i = 0; i < ARRAY_SIZE(cmm_attrs); i++) {
-                if ((rc = sysdev_create_file(sysdev, cmm_attrs[i])))
+                if ((rc = device_create_file(dev, cmm_attrs[i])))
                         goto fail;
         }
 
@@ -420,10 +421,10 @@ static int cmm_sysfs_register(struct sys_device *sysdev)
 
 fail:
         while (--i >= 0)
-                sysdev_remove_file(sysdev, cmm_attrs[i]);
-        sysdev_unregister(sysdev);
-class_unregister:
-        sysdev_class_unregister(&cmm_sysdev_class);
+                device_remove_file(dev, cmm_attrs[i]);
+        device_unregister(dev);
+subsys_unregister:
+        bus_unregister(&cmm_subsys);
         return rc;
 }
 
@@ -431,14 +432,14 @@ class_unregister:
  * cmm_unregister_sysfs - Unregister from sysfs
  *
  **/
-static void cmm_unregister_sysfs(struct sys_device *sysdev)
+static void cmm_unregister_sysfs(struct device *dev)
 {
         int i;
 
         for (i = 0; i < ARRAY_SIZE(cmm_attrs); i++)
-                sysdev_remove_file(sysdev, cmm_attrs[i]);
-        sysdev_unregister(sysdev);
-        sysdev_class_unregister(&cmm_sysdev_class);
+                device_remove_file(dev, cmm_attrs[i]);
+        device_unregister(dev);
+        bus_unregister(&cmm_subsys);
 }
 
 /**
@@ -657,7 +658,7 @@ static int cmm_init(void)
         if ((rc = register_reboot_notifier(&cmm_reboot_nb)))
                 goto out_oom_notifier;
 
-        if ((rc = cmm_sysfs_register(&cmm_sysdev)))
+        if ((rc = cmm_sysfs_register(&cmm_dev)))
                 goto out_reboot_notifier;
 
         if (register_memory_notifier(&cmm_mem_nb) ||
@@ -678,7 +679,7 @@ static int cmm_init(void)
 out_unregister_notifier:
         unregister_memory_notifier(&cmm_mem_nb);
         unregister_memory_isolate_notifier(&cmm_mem_isolate_nb);
-        cmm_unregister_sysfs(&cmm_sysdev);
+        cmm_unregister_sysfs(&cmm_dev);
 out_reboot_notifier:
         unregister_reboot_notifier(&cmm_reboot_nb);
 out_oom_notifier:
@@ -701,7 +702,7 @@ static void cmm_exit(void)
         unregister_memory_notifier(&cmm_mem_nb);
         unregister_memory_isolate_notifier(&cmm_mem_isolate_nb);
         cmm_free_pages(loaned_pages);
-        cmm_unregister_sysfs(&cmm_sysdev);
+        cmm_unregister_sysfs(&cmm_dev);
 }
 
 /**
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index f106662f4381..c9311cfdfcac 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -109,7 +109,7 @@ static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long
         if (opcode > MAX_HCALL_OPCODE)
                 return;
 
-        h = &get_cpu_var(hcall_stats)[opcode / 4];
+        h = &__get_cpu_var(hcall_stats)[opcode / 4];
         h->tb_start = mftb();
         h->purr_start = mfspr(SPRN_PURR);
 }
@@ -126,8 +126,6 @@ static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long
         h->num_calls++;
         h->tb_total += mftb() - h->tb_start;
         h->purr_total += mfspr(SPRN_PURR) - h->purr_start;
-
-        put_cpu_var(hcall_stats);
 }
 
 static int __init hcall_inst_init(void)
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index b719d9709730..c442f2b1980f 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -52,13 +52,42 @@
 #include "plpar_wrappers.h"
 
 
+static void tce_invalidate_pSeries_sw(struct iommu_table *tbl,
+                                      u64 *startp, u64 *endp)
+{
+        u64 __iomem *invalidate = (u64 __iomem *)tbl->it_index;
+        unsigned long start, end, inc;
+
+        start = __pa(startp);
+        end = __pa(endp);
+        inc = L1_CACHE_BYTES; /* invalidate a cacheline of TCEs at a time */
+
+        /* If this is non-zero, change the format.  We shift the
+         * address and or in the magic from the device tree. */
+        if (tbl->it_busno) {
+                start <<= 12;
+                end <<= 12;
+                inc <<= 12;
+                start |= tbl->it_busno;
+                end |= tbl->it_busno;
+        }
+
+        end |= inc - 1; /* round up end to be different than start */
+
+        mb(); /* Make sure TCEs in memory are written */
+        while (start <= end) {
+                out_be64(invalidate, start);
+                start += inc;
+        }
+}
+
 static int tce_build_pSeries(struct iommu_table *tbl, long index,
                               long npages, unsigned long uaddr,
                               enum dma_data_direction direction,
                               struct dma_attrs *attrs)
 {
         u64 proto_tce;
-        u64 *tcep;
+        u64 *tcep, *tces;
         u64 rpn;
 
         proto_tce = TCE_PCI_READ; // Read allowed
@@ -66,7 +95,7 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
         if (direction != DMA_TO_DEVICE)
                 proto_tce |= TCE_PCI_WRITE;
 
-        tcep = ((u64 *)tbl->it_base) + index;
+        tces = tcep = ((u64 *)tbl->it_base) + index;
 
         while (npages--) {
                 /* can't move this out since we might cross MEMBLOCK boundary */
@@ -76,18 +105,24 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
                 uaddr += TCE_PAGE_SIZE;
                 tcep++;
         }
+
+        if (tbl->it_type == TCE_PCI_SWINV_CREATE)
+                tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
         return 0;
 }
 
 
 static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
 {
-        u64 *tcep;
+        u64 *tcep, *tces;
 
-        tcep = ((u64 *)tbl->it_base) + index;
+        tces = tcep = ((u64 *)tbl->it_base) + index;
 
         while (npages--)
                 *(tcep++) = 0;
+
+        if (tbl->it_type == TCE_PCI_SWINV_FREE)
+                tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
 }
 
 static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
@@ -425,7 +460,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
                                  struct iommu_table *tbl)
 {
         struct device_node *node;
-        const unsigned long *basep;
+        const unsigned long *basep, *sw_inval;
         const u32 *sizep;
 
         node = phb->dn;
@@ -462,6 +497,22 @@ static void iommu_table_setparms(struct pci_controller *phb,
         tbl->it_index = 0;
         tbl->it_blocksize = 16;
         tbl->it_type = TCE_PCI;
+
+        sw_inval = of_get_property(node, "linux,tce-sw-invalidate-info", NULL);
+        if (sw_inval) {
+                /*
+                 * This property contains information on how to
+                 * invalidate the TCE entry.  The first property is
+                 * the base MMIO address used to invalidate entries.
+                 * The second property tells us the format of the TCE
+                 * invalidate (whether it needs to be shifted) and
+                 * some magic routing info to add to our invalidate
+                 * command.
+                 */
+                tbl->it_index = (unsigned long) ioremap(sw_inval[0], 8);
+                tbl->it_busno = sw_inval[1]; /* overload this with magic */
+                tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
+        }
 }
 
 /*
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 27a49508b410..948e0e3b3547 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -554,7 +554,10 @@ void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
                 goto out;
 
         (*depth)++;
+        preempt_disable();
         trace_hcall_entry(opcode, args);
+        if (opcode == H_CEDE)
+                rcu_idle_enter();
         (*depth)--;
 
 out:
@@ -575,7 +578,10 @@ void __trace_hcall_exit(long opcode, unsigned long retval,
                 goto out;
 
         (*depth)++;
+        if (opcode == H_CEDE)
+                rcu_idle_exit();
         trace_hcall_exit(opcode, retval, retbuf);
+        preempt_enable();
         (*depth)--;
 
 out:
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index a76b22844d18..330a57b7c17c 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -625,6 +625,8 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
 {
         static unsigned int oops_count = 0;
         static bool panicking = false;
+        static DEFINE_SPINLOCK(lock);
+        unsigned long flags;
         size_t text_len;
         unsigned int err_type = ERR_TYPE_KERNEL_PANIC_GZ;
         int rc = -1;
@@ -655,6 +657,9 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
         if (clobbering_unread_rtas_event())
                 return;
 
+        if (!spin_trylock_irqsave(&lock, flags))
+                return;
+
         if (big_oops_buf) {
                 text_len = capture_last_msgs(old_msgs, old_len,
                         new_msgs, new_len, big_oops_buf, big_oops_buf_sz);
@@ -670,4 +675,6 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
 
         (void) nvram_write_os_partition(&oops_log_partition, oops_buf,
                 (int) (sizeof(*oops_len) + *oops_len), err_type, ++oops_count);
+
+        spin_unlock_irqrestore(&lock, flags);
 }
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
new file mode 100644
index 000000000000..085fd3f45ad2
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -0,0 +1,329 @@
+/*
+ *  processor_idle - idle state cpuidle driver.
+ *  Adapted from drivers/idle/intel_idle.c and
+ *  drivers/acpi/processor_idle.c
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/moduleparam.h>
+#include <linux/cpuidle.h>
+#include <linux/cpu.h>
+
+#include <asm/paca.h>
+#include <asm/reg.h>
+#include <asm/system.h>
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+
+#include "plpar_wrappers.h"
+#include "pseries.h"
+
+struct cpuidle_driver pseries_idle_driver = {
+        .name =         "pseries_idle",
+        .owner =        THIS_MODULE,
+};
+
+#define MAX_IDLE_STATE_COUNT    2
+
+static int max_idle_state = MAX_IDLE_STATE_COUNT - 1;
+static struct cpuidle_device __percpu *pseries_cpuidle_devices;
+static struct cpuidle_state *cpuidle_state_table;
+
+void update_smt_snooze_delay(int snooze)
+{
+        struct cpuidle_driver *drv = cpuidle_get_driver();
+        if (drv)
+                drv->states[0].target_residency = snooze;
+}
+
+static inline void idle_loop_prolog(unsigned long *in_purr, ktime_t *kt_before)
+{
+
+        *kt_before = ktime_get_real();
+        *in_purr = mfspr(SPRN_PURR);
+        /*
+         * Indicate to the HV that we are idle. Now would be
+         * a good time to find other work to dispatch.
+         */
+        get_lppaca()->idle = 1;
+}
+
+static inline  s64 idle_loop_epilog(unsigned long in_purr, ktime_t kt_before)
+{
+        get_lppaca()->wait_state_cycles += mfspr(SPRN_PURR) - in_purr;
+        get_lppaca()->idle = 0;
+
+        return ktime_to_us(ktime_sub(ktime_get_real(), kt_before));
+}
+
+static int snooze_loop(struct cpuidle_device *dev,
+                        struct cpuidle_driver *drv,
+                        int index)
+{
+        unsigned long in_purr;
+        ktime_t kt_before;
+        unsigned long start_snooze;
+        long snooze = drv->states[0].target_residency;
+
+        idle_loop_prolog(&in_purr, &kt_before);
+
+        if (snooze) {
+                start_snooze = get_tb() + snooze * tb_ticks_per_usec;
+                local_irq_enable();
+                set_thread_flag(TIF_POLLING_NRFLAG);
+
+                while ((snooze < 0) || (get_tb() < start_snooze)) {
+                        if (need_resched() || cpu_is_offline(dev->cpu))
+                                goto out;
+                        ppc64_runlatch_off();
+                        HMT_low();
+                        HMT_very_low();
+                }
+
+                HMT_medium();
+                clear_thread_flag(TIF_POLLING_NRFLAG);
+                smp_mb();
+                local_irq_disable();
+        }
+
+out:
+        HMT_medium();
+        dev->last_residency =
+                (int)idle_loop_epilog(in_purr, kt_before);
+        return index;
+}
+
+static int dedicated_cede_loop(struct cpuidle_device *dev,
+                                struct cpuidle_driver *drv,
+                                int index)
+{
+        unsigned long in_purr;
+        ktime_t kt_before;
+
+        idle_loop_prolog(&in_purr, &kt_before);
+        get_lppaca()->donate_dedicated_cpu = 1;
+
+        ppc64_runlatch_off();
+        HMT_medium();
+        cede_processor();
+
+        get_lppaca()->donate_dedicated_cpu = 0;
+        dev->last_residency =
+                (int)idle_loop_epilog(in_purr, kt_before);
+        return index;
+}
+
+static int shared_cede_loop(struct cpuidle_device *dev,
+                        struct cpuidle_driver *drv,
+                        int index)
+{
+        unsigned long in_purr;
+        ktime_t kt_before;
+
+        idle_loop_prolog(&in_purr, &kt_before);
+
+        /*
+         * Yield the processor to the hypervisor.  We return if
+         * an external interrupt occurs (which are driven prior
+         * to returning here) or if a prod occurs from another
+         * processor. When returning here, external interrupts
+         * are enabled.
+         */
+        cede_processor();
+
+        dev->last_residency =
+                (int)idle_loop_epilog(in_purr, kt_before);
+        return index;
+}
+
+/*
+ * States for dedicated partition case.
+ */
+static struct cpuidle_state dedicated_states[MAX_IDLE_STATE_COUNT] = {
+        { /* Snooze */
+                .name = "snooze",
+                .desc = "snooze",
+                .flags = CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 0,
+                .target_residency = 0,
+                .enter = &snooze_loop },
+        { /* CEDE */
+                .name = "CEDE",
+                .desc = "CEDE",
+                .flags = CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 1,
+                .target_residency = 10,
+                .enter = &dedicated_cede_loop },
+};
+
+/*
+ * States for shared partition case.
+ */
+static struct cpuidle_state shared_states[MAX_IDLE_STATE_COUNT] = {
+        { /* Shared Cede */
+                .name = "Shared Cede",
+                .desc = "Shared Cede",
+                .flags = CPUIDLE_FLAG_TIME_VALID,
+                .exit_latency = 0,
+                .target_residency = 0,
+                .enter = &shared_cede_loop },
+};
+
+int pseries_notify_cpuidle_add_cpu(int cpu)
+{
+        struct cpuidle_device *dev =
+                        per_cpu_ptr(pseries_cpuidle_devices, cpu);
+        if (dev && cpuidle_get_driver()) {
+                cpuidle_disable_device(dev);
+                cpuidle_enable_device(dev);
+        }
+        return 0;
+}
+
+/*
+ * pseries_cpuidle_driver_init()
+ */
+static int pseries_cpuidle_driver_init(void)
+{
+        int idle_state;
+        struct cpuidle_driver *drv = &pseries_idle_driver;
+
+        drv->state_count = 0;
+
+        for (idle_state = 0; idle_state < MAX_IDLE_STATE_COUNT; ++idle_state) {
+
+                if (idle_state > max_idle_state)
+                        break;
+
+                /* is the state not enabled? */
+                if (cpuidle_state_table[idle_state].enter == NULL)
+                        continue;
+
+                drv->states[drv->state_count] = /* structure copy */
+                        cpuidle_state_table[idle_state];
+
+                if (cpuidle_state_table == dedicated_states)
+                        drv->states[drv->state_count].target_residency =
+                                __get_cpu_var(smt_snooze_delay);
+
+                drv->state_count += 1;
+        }
+
+        return 0;
+}
+
+/* pseries_idle_devices_uninit(void)
+ * unregister cpuidle devices and de-allocate memory
+ */
+static void pseries_idle_devices_uninit(void)
+{
+        int i;
+        struct cpuidle_device *dev;
+
+        for_each_possible_cpu(i) {
+                dev = per_cpu_ptr(pseries_cpuidle_devices, i);
+                cpuidle_unregister_device(dev);
+        }
+
+        free_percpu(pseries_cpuidle_devices);
+        return;
+}
+
+/* pseries_idle_devices_init()
+ * allocate, initialize and register cpuidle device
+ */
+static int pseries_idle_devices_init(void)
+{
+        int i;
+        struct cpuidle_driver *drv = &pseries_idle_driver;
+        struct cpuidle_device *dev;
+
+        pseries_cpuidle_devices = alloc_percpu(struct cpuidle_device);
+        if (pseries_cpuidle_devices == NULL)
+                return -ENOMEM;
+
+        for_each_possible_cpu(i) {
+                dev = per_cpu_ptr(pseries_cpuidle_devices, i);
+                dev->state_count = drv->state_count;
+                dev->cpu = i;
+                if (cpuidle_register_device(dev)) {
+                        printk(KERN_DEBUG \
+                                "cpuidle_register_device %d failed!\n", i);
+                        return -EIO;
+                }
+        }
+
+        return 0;
+}
+
+/*
+ * pseries_idle_probe()
+ * Choose state table for shared versus dedicated partition
+ */
+static int pseries_idle_probe(void)
+{
+
+        if (!firmware_has_feature(FW_FEATURE_SPLPAR))
+                return -ENODEV;
+
+        if (cpuidle_disable != IDLE_NO_OVERRIDE)
+                return -ENODEV;
+
+        if (max_idle_state == 0) {
+                printk(KERN_DEBUG "pseries processor idle disabled.\n");
+                return -EPERM;
+        }
+
+        if (get_lppaca()->shared_proc)
+                cpuidle_state_table = shared_states;
+        else
+                cpuidle_state_table = dedicated_states;
+
+        return 0;
+}
+
+static int __init pseries_processor_idle_init(void)
+{
+        int retval;
+
+        retval = pseries_idle_probe();
+        if (retval)
+                return retval;
+
+        pseries_cpuidle_driver_init();
+        retval = cpuidle_register_driver(&pseries_idle_driver);
+        if (retval) {
+                printk(KERN_DEBUG "Registration of pseries driver failed.\n");
+                return retval;
+        }
+
+        retval = pseries_idle_devices_init();
+        if (retval) {
+                pseries_idle_devices_uninit();
+                cpuidle_unregister_driver(&pseries_idle_driver);
+                return retval;
+        }
+
+        printk(KERN_DEBUG "pseries_idle_driver registered\n");
+
+        return 0;
+}
+
+static void __exit pseries_processor_idle_exit(void)
+{
+
+        pseries_idle_devices_uninit();
+        cpuidle_unregister_driver(&pseries_idle_driver);
+
+        return;
+}
+
+module_init(pseries_processor_idle_init);
+module_exit(pseries_processor_idle_exit);
+
+MODULE_AUTHOR("Deepthi Dharwar <deepthi@linux.vnet.ibm.com>");
+MODULE_DESCRIPTION("Cpuidle driver for POWER");
+MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 24c7162f11d9..9a3dda07566f 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -57,4 +57,7 @@ extern struct device_node *dlpar_configure_connector(u32);
 extern int dlpar_attach_node(struct device_node *);
 extern int dlpar_detach_node(struct device_node *);
 
+/* Snooze Delay, pseries_idle */
+DECLARE_PER_CPU(long, smt_snooze_delay);
+
 #endif /* _PSERIES_PSERIES_H */
diff --git a/arch/powerpc/platforms/pseries/pseries_energy.c b/arch/powerpc/platforms/pseries/pseries_energy.c
index c8b3c69fe891..af281dce510a 100644
--- a/arch/powerpc/platforms/pseries/pseries_energy.c
+++ b/arch/powerpc/platforms/pseries/pseries_energy.c
@@ -15,7 +15,7 @@
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/seq_file.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/of.h>
 #include <asm/cputhreads.h>
@@ -184,7 +184,7 @@ static ssize_t get_best_energy_list(char *page, int activate)
         return s-page;
 }
 
-static ssize_t get_best_energy_data(struct sys_device *dev,
+static ssize_t get_best_energy_data(struct device *dev,
                                         char *page, int activate)
 {
         int rc;
@@ -207,26 +207,26 @@ static ssize_t get_best_energy_data(struct sys_device *dev,
 
 /* Wrapper functions */
 
-static ssize_t cpu_activate_hint_list_show(struct sysdev_class *class,
-                        struct sysdev_class_attribute *attr, char *page)
+static ssize_t cpu_activate_hint_list_show(struct device *dev,
+                        struct device_attribute *attr, char *page)
 {
         return get_best_energy_list(page, 1);
 }
 
-static ssize_t cpu_deactivate_hint_list_show(struct sysdev_class *class,
-                        struct sysdev_class_attribute *attr, char *page)
+static ssize_t cpu_deactivate_hint_list_show(struct device *dev,
+                        struct device_attribute *attr, char *page)
 {
         return get_best_energy_list(page, 0);
 }
 
-static ssize_t percpu_activate_hint_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *page)
+static ssize_t percpu_activate_hint_show(struct device *dev,
+                        struct device_attribute *attr, char *page)
 {
         return get_best_energy_data(dev, page, 1);
 }
 
-static ssize_t percpu_deactivate_hint_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *page)
+static ssize_t percpu_deactivate_hint_show(struct device *dev,
+                        struct device_attribute *attr, char *page)
 {
         return get_best_energy_data(dev, page, 0);
 }
@@ -241,48 +241,48 @@ static ssize_t percpu_deactivate_hint_show(struct sys_device *dev,
  *      Per-cpu value of the hint
  */
 
-struct sysdev_class_attribute attr_cpu_activate_hint_list =
-                _SYSDEV_CLASS_ATTR(pseries_activate_hint_list, 0444,
+struct device_attribute attr_cpu_activate_hint_list =
+                __ATTR(pseries_activate_hint_list, 0444,
                 cpu_activate_hint_list_show, NULL);
 
-struct sysdev_class_attribute attr_cpu_deactivate_hint_list =
-                _SYSDEV_CLASS_ATTR(pseries_deactivate_hint_list, 0444,
+struct device_attribute attr_cpu_deactivate_hint_list =
+                __ATTR(pseries_deactivate_hint_list, 0444,
                 cpu_deactivate_hint_list_show, NULL);
 
-struct sysdev_attribute attr_percpu_activate_hint =
-                _SYSDEV_ATTR(pseries_activate_hint, 0444,
+struct device_attribute attr_percpu_activate_hint =
+                __ATTR(pseries_activate_hint, 0444,
                 percpu_activate_hint_show, NULL);
 
-struct sysdev_attribute attr_percpu_deactivate_hint =
-                _SYSDEV_ATTR(pseries_deactivate_hint, 0444,
+struct device_attribute attr_percpu_deactivate_hint =
+                __ATTR(pseries_deactivate_hint, 0444,
                 percpu_deactivate_hint_show, NULL);
 
 static int __init pseries_energy_init(void)
 {
         int cpu, err;
-        struct sys_device *cpu_sys_dev;
+        struct device *cpu_dev;
 
         if (!check_for_h_best_energy()) {
                 printk(KERN_INFO "Hypercall H_BEST_ENERGY not supported\n");
                 return 0;
         }
         /* Create the sysfs files */
-        err = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
-                                &attr_cpu_activate_hint_list.attr);
+        err = device_create_file(cpu_subsys.dev_root,
+                                &attr_cpu_activate_hint_list);
         if (!err)
-                err = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
-                                &attr_cpu_deactivate_hint_list.attr);
+                err = device_create_file(cpu_subsys.dev_root,
+                                &attr_cpu_deactivate_hint_list);
 
         if (err)
                 return err;
         for_each_possible_cpu(cpu) {
-                cpu_sys_dev = get_cpu_sysdev(cpu);
-                err = sysfs_create_file(&cpu_sys_dev->kobj,
-                                &attr_percpu_activate_hint.attr);
+                cpu_dev = get_cpu_device(cpu);
+                err = device_create_file(cpu_dev,
+                                &attr_percpu_activate_hint);
                 if (err)
                         break;
-                err = sysfs_create_file(&cpu_sys_dev->kobj,
-                                &attr_percpu_deactivate_hint.attr);
+                err = device_create_file(cpu_dev,
+                                &attr_percpu_deactivate_hint);
                 if (err)
                         break;
         }
@@ -298,23 +298,20 @@ static int __init pseries_energy_init(void)
 static void __exit pseries_energy_cleanup(void)
 {
         int cpu;
-        struct sys_device *cpu_sys_dev;
+        struct device *cpu_dev;
 
         if (!sysfs_entries)
                 return;
 
         /* Remove the sysfs files */
-        sysfs_remove_file(&cpu_sysdev_class.kset.kobj,
-                                &attr_cpu_activate_hint_list.attr);
-
-        sysfs_remove_file(&cpu_sysdev_class.kset.kobj,
-                                &attr_cpu_deactivate_hint_list.attr);
+        device_remove_file(cpu_subsys.dev_root, &attr_cpu_activate_hint_list);
+        device_remove_file(cpu_subsys.dev_root, &attr_cpu_deactivate_hint_list);
 
         for_each_possible_cpu(cpu) {
-                cpu_sys_dev = get_cpu_sysdev(cpu);
-                sysfs_remove_file(&cpu_sys_dev->kobj,
+                cpu_dev = get_cpu_device(cpu);
+                sysfs_remove_file(&cpu_dev->kobj,
                                 &attr_percpu_activate_hint.attr);
-                sysfs_remove_file(&cpu_sys_dev->kobj,
+                sysfs_remove_file(&cpu_dev->kobj,
                                 &attr_percpu_deactivate_hint.attr);
         }
 }
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index c3408ca8855e..f79f1278dfca 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -39,6 +39,7 @@
 #include <linux/irq.h>
 #include <linux/seq_file.h>
 #include <linux/root_dev.h>
+#include <linux/cpuidle.h>
 
 #include <asm/mmu.h>
 #include <asm/processor.h>
@@ -74,9 +75,6 @@ EXPORT_SYMBOL(CMO_PageSize);
 
 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
 
-static void pseries_shared_idle_sleep(void);
-static void pseries_dedicated_idle_sleep(void);
-
 static struct device_node *pSeries_mpic_node;
 
 static void pSeries_show_cpuinfo(struct seq_file *m)
@@ -192,8 +190,7 @@ static void __init pseries_mpic_init_IRQ(void)
         BUG_ON(openpic_addr == 0);
 
         /* Setup the openpic driver */
-        mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
-                          MPIC_PRIMARY,
+        mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, 0,
                           16, 250, /* isu size, irq count */
                           " MPIC     ");
         BUG_ON(mpic == NULL);
@@ -352,8 +349,25 @@ static int alloc_dispatch_log_kmem_cache(void)
 }
 early_initcall(alloc_dispatch_log_kmem_cache);
 
+static void pSeries_idle(void)
+{
+        /* This would call on the cpuidle framework, and the back-end pseries
+         * driver to  go to idle states
+         */
+        if (cpuidle_idle_call()) {
+                /* On error, execute default handler
+                 * to go into low thread priority and possibly
+                 * low power mode.
+                 */
+                HMT_low();
+                HMT_very_low();
+        }
+}
+
 static void __init pSeries_setup_arch(void)
 {
+        panic_timeout = 10;
+
         /* Discover PIC type and setup ppc_md accordingly */
         pseries_discover_pic();
 
@@ -374,18 +388,9 @@ static void __init pSeries_setup_arch(void)
 
         pSeries_nvram_init();
 
-        /* Choose an idle loop */
         if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
                 vpa_init(boot_cpuid);
-                if (get_lppaca()->shared_proc) {
-                        printk(KERN_DEBUG "Using shared processor idle loop\n");
-                        ppc_md.power_save = pseries_shared_idle_sleep;
-                } else {
-                        printk(KERN_DEBUG "Using dedicated idle loop\n");
-                        ppc_md.power_save = pseries_dedicated_idle_sleep;
-                }
-        } else {
-                printk(KERN_DEBUG "Using default idle loop\n");
+                ppc_md.power_save = pSeries_idle;
         }
 
         if (firmware_has_feature(FW_FEATURE_LPAR))
@@ -586,80 +591,6 @@ static int __init pSeries_probe(void)
         return 1;
 }
 
-
-DECLARE_PER_CPU(long, smt_snooze_delay);
-
-static void pseries_dedicated_idle_sleep(void)
-{ 
-        unsigned int cpu = smp_processor_id();
-        unsigned long start_snooze;
-        unsigned long in_purr, out_purr;
-        long snooze = __get_cpu_var(smt_snooze_delay);
-
-        /*
-         * Indicate to the HV that we are idle. Now would be
-         * a good time to find other work to dispatch.
-         */
-        get_lppaca()->idle = 1;
-        get_lppaca()->donate_dedicated_cpu = 1;
-        in_purr = mfspr(SPRN_PURR);
-
-        /*
-         * We come in with interrupts disabled, and need_resched()
-         * has been checked recently.  If we should poll for a little
-         * while, do so.
-         */
-        if (snooze) {
-                start_snooze = get_tb() + snooze * tb_ticks_per_usec;
-                local_irq_enable();
-                set_thread_flag(TIF_POLLING_NRFLAG);
-
-                while ((snooze < 0) || (get_tb() < start_snooze)) {
-                        if (need_resched() || cpu_is_offline(cpu))
-                                goto out;
-                        ppc64_runlatch_off();
-                        HMT_low();
-                        HMT_very_low();
-                }
-
-                HMT_medium();
-                clear_thread_flag(TIF_POLLING_NRFLAG);
-                smp_mb();
-                local_irq_disable();
-                if (need_resched() || cpu_is_offline(cpu))
-                        goto out;
-        }
-
-        cede_processor();
-
-out:
-        HMT_medium();
-        out_purr = mfspr(SPRN_PURR);
-        get_lppaca()->wait_state_cycles += out_purr - in_purr;
-        get_lppaca()->donate_dedicated_cpu = 0;
-        get_lppaca()->idle = 0;
-}
-
-static void pseries_shared_idle_sleep(void)
-{
-        /*
-         * Indicate to the HV that we are idle. Now would be
-         * a good time to find other work to dispatch.
-         */
-        get_lppaca()->idle = 1;
-
-        /*
-         * Yield the processor to the hypervisor.  We return if
-         * an external interrupt occurs (which are driven prior
-         * to returning here) or if a prod occurs from another
-         * processor. When returning here, external interrupts
-         * are enabled.
-         */
-        cede_processor();
-
-        get_lppaca()->idle = 0;
-}
-
 static int pSeries_pci_probe_mode(struct pci_bus *bus)
 {
         if (firmware_has_feature(FW_FEATURE_LPAR))
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 26e93fd4c62b..eadba9521a35 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -22,7 +22,7 @@
 #include <linux/spinlock.h>
 #include <linux/cache.h>
 #include <linux/err.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 
 #include <asm/ptrace.h>
@@ -148,6 +148,7 @@ static void __devinit smp_xics_setup_cpu(int cpu)
         set_cpu_current_state(cpu, CPU_STATE_ONLINE);
         set_default_offline_state(cpu);
 #endif
+        pseries_notify_cpuidle_add_cpu(cpu);
 }
 
 static int __devinit smp_pSeries_kick_cpu(int nr)
diff --git a/arch/powerpc/platforms/pseries/suspend.c b/arch/powerpc/platforms/pseries/suspend.c
index d3de0849f296..b84a8b2238dd 100644
--- a/arch/powerpc/platforms/pseries/suspend.c
+++ b/arch/powerpc/platforms/pseries/suspend.c
@@ -26,7 +26,7 @@
 #include <asm/rtas.h>
 
 static u64 stream_id;
-static struct sys_device suspend_sysdev;
+static struct device suspend_dev;
 static DECLARE_COMPLETION(suspend_work);
 static struct rtas_suspend_me_data suspend_data;
 static atomic_t suspending;
@@ -110,8 +110,8 @@ static int pseries_prepare_late(void)
 
 /**
  * store_hibernate - Initiate partition hibernation
- * @classdev:   sysdev class struct
- * @attr:               class device attribute struct
+ * @dev:                subsys root device
+ * @attr:               device attribute struct
  * @buf:                buffer
  * @count:              buffer size
  *
@@ -121,8 +121,8 @@ static int pseries_prepare_late(void)
  * Return value:
  *      number of bytes printed to buffer / other on failure
  **/
-static ssize_t store_hibernate(struct sysdev_class *classdev,
-                               struct sysdev_class_attribute *attr,
+static ssize_t store_hibernate(struct device *dev,
+                               struct device_attribute *attr,
                                const char *buf, size_t count)
 {
         int rc;
@@ -148,10 +148,11 @@ static ssize_t store_hibernate(struct sysdev_class *classdev,
         return rc;
 }
 
-static SYSDEV_CLASS_ATTR(hibernate, S_IWUSR, NULL, store_hibernate);
+static DEVICE_ATTR(hibernate, S_IWUSR, NULL, store_hibernate);
 
-static struct sysdev_class suspend_sysdev_class = {
+static struct bus_type suspend_subsys = {
         .name = "power",
+        .dev_name = "power",
 };
 
 static const struct platform_suspend_ops pseries_suspend_ops = {
@@ -167,23 +168,23 @@ static const struct platform_suspend_ops pseries_suspend_ops = {
  * Return value:
  *      0 on success / other on failure
  **/
-static int pseries_suspend_sysfs_register(struct sys_device *sysdev)
+static int pseries_suspend_sysfs_register(struct device *dev)
 {
         int rc;
 
-        if ((rc = sysdev_class_register(&suspend_sysdev_class)))
+        if ((rc = subsys_system_register(&suspend_subsys, NULL)))
                 return rc;
 
-        sysdev->id = 0;
-        sysdev->cls = &suspend_sysdev_class;
+        dev->id = 0;
+        dev->bus = &suspend_subsys;
 
-        if ((rc = sysdev_class_create_file(&suspend_sysdev_class, &attr_hibernate)))
-                goto class_unregister;
+        if ((rc = device_create_file(suspend_subsys.dev_root, &dev_attr_hibernate)))
+                goto subsys_unregister;
 
         return 0;
 
-class_unregister:
-        sysdev_class_unregister(&suspend_sysdev_class);
+subsys_unregister:
+        bus_unregister(&suspend_subsys);
         return rc;
 }
 
@@ -204,7 +205,7 @@ static int __init pseries_suspend_init(void)
         if (suspend_data.token == RTAS_UNKNOWN_SERVICE)
                 return 0;
 
-        if ((rc = pseries_suspend_sysfs_register(&suspend_sysdev)))
+        if ((rc = pseries_suspend_sysfs_register(&suspend_dev)))
                 return rc;
 
         ppc_md.suspend_disable_cpu = pseries_suspend_cpu;
diff --git a/arch/powerpc/platforms/wsp/Kconfig b/arch/powerpc/platforms/wsp/Kconfig
index bd560c786ed6..57d22a2f4ba9 100644
--- a/arch/powerpc/platforms/wsp/Kconfig
+++ b/arch/powerpc/platforms/wsp/Kconfig
@@ -1,20 +1,28 @@
 config PPC_WSP
         bool
         select PPC_A2
+        select GENERIC_TBSYNC
+        select PPC_ICSWX
         select PPC_SCOM
         select PPC_XICS
         select PPC_ICP_NATIVE
         select PCI
         select PPC_IO_WORKAROUNDS if PCI
         select PPC_INDIRECT_PIO if PCI
+        select PPC_WSP_COPRO
         default n
 
 menu "WSP platform selection"
         depends on PPC_BOOK3E_64
 
 config PPC_PSR2
-        bool "PSR-2 platform"
-        select GENERIC_TBSYNC
+        bool "PowerEN System Reference Platform 2"
+        select EPAPR_BOOT
+        select PPC_WSP
+        default y
+
+config PPC_CHROMA
+        bool "PowerEN PCIe Chroma Card"
         select EPAPR_BOOT
         select PPC_WSP
         default y
diff --git a/arch/powerpc/platforms/wsp/Makefile b/arch/powerpc/platforms/wsp/Makefile
index a1486b436f02..56817ac98fc9 100644
--- a/arch/powerpc/platforms/wsp/Makefile
+++ b/arch/powerpc/platforms/wsp/Makefile
@@ -1,8 +1,10 @@
 ccflags-y                       += -mno-minimal-toc
 
-obj-y                           += setup.o ics.o
-obj-$(CONFIG_PPC_PSR2)          += psr2.o opb_pic.o
+obj-y                           += setup.o ics.o wsp.o
+obj-$(CONFIG_PPC_PSR2)          += psr2.o
+obj-$(CONFIG_PPC_CHROMA)        += chroma.o h8.o
+obj-$(CONFIG_PPC_WSP)           += opb_pic.o
 obj-$(CONFIG_PPC_WSP)           += scom_wsp.o
 obj-$(CONFIG_SMP)               += smp.o scom_smp.o
 obj-$(CONFIG_PCI)               += wsp_pci.o
-obj-$(CONFIG_PCI_MSI)           += msi.o
\ No newline at end of file
+obj-$(CONFIG_PCI_MSI)           += msi.o
diff --git a/arch/powerpc/platforms/wsp/chroma.c b/arch/powerpc/platforms/wsp/chroma.c
new file mode 100644
index 000000000000..ca6fa26f6e63
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/chroma.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2008-2011, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/of.h>
+#include <linux/smp.h>
+#include <linux/time.h>
+
+#include <asm/machdep.h>
+#include <asm/system.h>
+#include <asm/udbg.h>
+
+#include "ics.h"
+#include "wsp.h"
+
+void __init chroma_setup_arch(void)
+{
+        wsp_setup_arch();
+        wsp_setup_h8();
+
+}
+
+static int __init chroma_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (!of_flat_dt_is_compatible(root, "ibm,wsp-chroma"))
+                return 0;
+
+        return 1;
+}
+
+define_machine(chroma_md) {
+        .name                   = "Chroma PCIe",
+        .probe                  = chroma_probe,
+        .setup_arch             = chroma_setup_arch,
+        .restart                = wsp_h8_restart,
+        .power_off              = wsp_h8_power_off,
+        .halt                   = wsp_halt,
+        .calibrate_decr         = generic_calibrate_decr,
+        .init_IRQ               = wsp_setup_irq,
+        .progress               = udbg_progress,
+        .power_save             = book3e_idle,
+};
+
+machine_arch_initcall(chroma_md, wsp_probe_devices);
diff --git a/arch/powerpc/platforms/wsp/h8.c b/arch/powerpc/platforms/wsp/h8.c
new file mode 100644
index 000000000000..d18e6cc19df3
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/h8.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright 2008-2011, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/io.h>
+
+#include "wsp.h"
+
+/*
+ * The UART connection to the H8 is over ttyS1 which is just a 16550.
+ * We assume that FW has it setup right and no one messes with it.
+ */
+
+
+static u8 __iomem *h8;
+
+#define RBR 0           /* Receiver Buffer Register */
+#define THR 0           /* Transmitter Holding Register */
+#define LSR 5           /* Line Status Register */
+#define LSR_DR 0x01     /* LSR value for Data-Ready */
+#define LSR_THRE 0x20   /* LSR value for Transmitter-Holding-Register-Empty */
+static void wsp_h8_putc(int c)
+{
+        u8 lsr;
+
+        do {
+                lsr = readb(h8 + LSR);
+        } while ((lsr & LSR_THRE) != LSR_THRE);
+        writeb(c, h8 + THR);
+}
+
+static int wsp_h8_getc(void)
+{
+        u8 lsr;
+
+        do {
+                lsr = readb(h8 + LSR);
+        } while ((lsr & LSR_DR) != LSR_DR);
+
+        return readb(h8 + RBR);
+}
+
+static void wsp_h8_puts(const char *s, int sz)
+{
+        int i;
+
+        for (i = 0; i < sz; i++) {
+                wsp_h8_putc(s[i]);
+
+                /* no flow control so wait for echo */
+                wsp_h8_getc();
+        }
+        wsp_h8_putc('\r');
+        wsp_h8_putc('\n');
+}
+
+static void wsp_h8_terminal_cmd(const char *cmd, int sz)
+{
+        hard_irq_disable();
+        wsp_h8_puts(cmd, sz);
+        /* should never return, but just in case */
+        for (;;)
+                continue;
+}
+
+
+void wsp_h8_restart(char *cmd)
+{
+        static const char restart[] = "warm-reset";
+
+        (void)cmd;
+        wsp_h8_terminal_cmd(restart, sizeof(restart) - 1);
+}
+
+void wsp_h8_power_off(void)
+{
+        static const char off[] = "power-off";
+
+        wsp_h8_terminal_cmd(off, sizeof(off) - 1);
+}
+
+static void __iomem *wsp_h8_getaddr(void)
+{
+        struct device_node *aliases;
+        struct device_node *uart;
+        struct property *path;
+        void __iomem *va = NULL;
+
+        /*
+         * there is nothing in the devtree to tell us which is mapped
+         * to the H8, but se know it is the second serial port.
+         */
+
+        aliases = of_find_node_by_path("/aliases");
+        if (aliases == NULL)
+                return NULL;
+
+        path = of_find_property(aliases, "serial1", NULL);
+        if (path == NULL)
+                goto out;
+
+        uart = of_find_node_by_path(path->value);
+        if (uart == NULL)
+                goto out;
+
+        va = of_iomap(uart, 0);
+
+        /* remove it so no one messes with it */
+        of_detach_node(uart);
+        of_node_put(uart);
+
+out:
+        of_node_put(aliases);
+
+        return va;
+}
+
+void __init wsp_setup_h8(void)
+{
+        h8 = wsp_h8_getaddr();
+
+        /* Devtree change? lets hard map it anyway */
+        if (h8 == NULL) {
+                pr_warn("UART to H8 could not be found");
+                h8 = ioremap(0xffc0008000ULL, 0x100);
+        }
+}
diff --git a/arch/powerpc/platforms/wsp/opb_pic.c b/arch/powerpc/platforms/wsp/opb_pic.c
index be05631a3c1c..19f353dfcd03 100644
--- a/arch/powerpc/platforms/wsp/opb_pic.c
+++ b/arch/powerpc/platforms/wsp/opb_pic.c
@@ -320,7 +320,8 @@ void __init opb_pic_init(void)
                 }
 
                 /* Attach opb interrupt handler to new virtual IRQ */
-                rc = request_irq(virq, opb_irq_handler, 0, "OPB LS Cascade", opb);
+                rc = request_irq(virq, opb_irq_handler, IRQF_NO_THREAD,
+                                 "OPB LS Cascade", opb);
                 if (rc) {
                         printk("opb: request_irq failed: %d\n", rc);
                         continue;
diff --git a/arch/powerpc/platforms/wsp/psr2.c b/arch/powerpc/platforms/wsp/psr2.c
index 166f2e4b4bee..0c1ae06d0be1 100644
--- a/arch/powerpc/platforms/wsp/psr2.c
+++ b/arch/powerpc/platforms/wsp/psr2.c
@@ -14,10 +14,10 @@
 #include <linux/mm.h>
 #include <linux/of.h>
 #include <linux/smp.h>
+#include <linux/time.h>
 
 #include <asm/machdep.h>
 #include <asm/system.h>
-#include <asm/time.h>
 #include <asm/udbg.h>
 
 #include "ics.h"
@@ -27,7 +27,8 @@
 static void psr2_spin(void)
 {
         hard_irq_disable();
-        for (;;) ;
+        for (;;)
+                continue;
 }
 
 static void psr2_restart(char *cmd)
@@ -35,65 +36,32 @@ static void psr2_restart(char *cmd)
         psr2_spin();
 }
 
-static int psr2_probe_devices(void)
-{
-        struct device_node *np;
-
-        /* Our RTC is a ds1500. It seems to be programatically compatible
-         * with the ds1511 for which we have a driver so let's use that
-         */
-        np = of_find_compatible_node(NULL, NULL, "dallas,ds1500");
-        if (np != NULL) {
-                struct resource res;
-                if (of_address_to_resource(np, 0, &res) == 0)
-                        platform_device_register_simple("ds1511", 0, &res, 1);
-        }
-        return 0;
-}
-machine_arch_initcall(psr2_md, psr2_probe_devices);
-
-static void __init psr2_setup_arch(void)
-{
-        /* init to some ~sane value until calibrate_delay() runs */
-        loops_per_jiffy = 50000000;
-
-        scom_init_wsp();
-
-        /* Setup SMP callback */
-#ifdef CONFIG_SMP
-        a2_setup_smp();
-#endif
-#ifdef CONFIG_PCI
-        wsp_setup_pci();
-#endif
-
-}
-
 static int __init psr2_probe(void)
 {
         unsigned long root = of_get_flat_dt_root();
 
+        if (of_flat_dt_is_compatible(root, "ibm,wsp-chroma")) {
+                /* chroma systems also claim they are psr2s */
+                return 0;
+        }
+
         if (!of_flat_dt_is_compatible(root, "ibm,psr2"))
                 return 0;
 
         return 1;
 }
 
-static void __init psr2_init_irq(void)
-{
-        wsp_init_irq();
-        opb_pic_init();
-}
-
 define_machine(psr2_md) {
         .name                   = "PSR2 A2",
         .probe                  = psr2_probe,
-        .setup_arch             = psr2_setup_arch,
+        .setup_arch             = wsp_setup_arch,
         .restart                = psr2_restart,
         .power_off              = psr2_spin,
         .halt                   = psr2_spin,
         .calibrate_decr         = generic_calibrate_decr,
-        .init_IRQ               = psr2_init_irq,
+        .init_IRQ               = wsp_setup_irq,
         .progress               = udbg_progress,
         .power_save             = book3e_idle,
 };
+
+machine_arch_initcall(psr2_md, wsp_probe_devices);
diff --git a/arch/powerpc/platforms/wsp/wsp.c b/arch/powerpc/platforms/wsp/wsp.c
new file mode 100644
index 000000000000..d25cc96c21b8
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/wsp.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright 2008-2011, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/smp.h>
+#include <linux/delay.h>
+#include <linux/time.h>
+
+#include <asm/scom.h>
+
+#include "wsp.h"
+#include "ics.h"
+
+#define WSP_SOC_COMPATIBLE      "ibm,wsp-soc"
+#define PBIC_COMPATIBLE         "ibm,wsp-pbic"
+#define COPRO_COMPATIBLE        "ibm,wsp-coprocessor"
+
+static int __init wsp_probe_buses(void)
+{
+        static __initdata struct of_device_id bus_ids[] = {
+                /*
+                 * every node in between needs to be here or you won't
+                 * find it
+                 */
+                { .compatible = WSP_SOC_COMPATIBLE, },
+                { .compatible = PBIC_COMPATIBLE, },
+                { .compatible = COPRO_COMPATIBLE, },
+                {},
+        };
+        of_platform_bus_probe(NULL, bus_ids, NULL);
+
+        return 0;
+}
+
+void __init wsp_setup_arch(void)
+{
+        /* init to some ~sane value until calibrate_delay() runs */
+        loops_per_jiffy = 50000000;
+
+        scom_init_wsp();
+
+        /* Setup SMP callback */
+#ifdef CONFIG_SMP
+        a2_setup_smp();
+#endif
+#ifdef CONFIG_PCI
+        wsp_setup_pci();
+#endif
+}
+
+void __init wsp_setup_irq(void)
+{
+        wsp_init_irq();
+        opb_pic_init();
+}
+
+
+int __init wsp_probe_devices(void)
+{
+        struct device_node *np;
+
+        /* Our RTC is a ds1500. It seems to be programatically compatible
+         * with the ds1511 for which we have a driver so let's use that
+         */
+        np = of_find_compatible_node(NULL, NULL, "dallas,ds1500");
+        if (np != NULL) {
+                struct resource res;
+                if (of_address_to_resource(np, 0, &res) == 0)
+                        platform_device_register_simple("ds1511", 0, &res, 1);
+        }
+
+        wsp_probe_buses();
+
+        return 0;
+}
+
+void wsp_halt(void)
+{
+        u64 val;
+        scom_map_t m;
+        struct device_node *dn;
+        struct device_node *mine;
+        struct device_node *me;
+
+        me = of_get_cpu_node(smp_processor_id(), NULL);
+        mine = scom_find_parent(me);
+
+        /* This will halt all the A2s but not power off the chip */
+        for_each_node_with_property(dn, "scom-controller") {
+                if (dn == mine)
+                        continue;
+                m = scom_map(dn, 0, 1);
+
+                /* read-modify-write it so the HW probe does not get
+                 * confused */
+                val = scom_read(m, 0);
+                val |= 1;
+                scom_write(m, 0, val);
+                scom_unmap(m);
+        }
+        m = scom_map(mine, 0, 1);
+        val = scom_read(m, 0);
+        val |= 1;
+        scom_write(m, 0, val);
+        /* should never return */
+        scom_unmap(m);
+}
diff --git a/arch/powerpc/platforms/wsp/wsp.h b/arch/powerpc/platforms/wsp/wsp.h
index 33479818f62a..10c1d1fff362 100644
--- a/arch/powerpc/platforms/wsp/wsp.h
+++ b/arch/powerpc/platforms/wsp/wsp.h
@@ -6,15 +6,25 @@
 /* Devtree compatible strings for major devices */
 #define PCIE_COMPATIBLE     "ibm,wsp-pciex"
 
+extern void wsp_setup_arch(void);
+extern void wsp_setup_irq(void);
+extern int wsp_probe_devices(void);
+extern void wsp_halt(void);
+
 extern void wsp_setup_pci(void);
 extern void scom_init_wsp(void);
 
 extern void a2_setup_smp(void);
 extern int a2_scom_startup_cpu(unsigned int lcpu, int thr_idx,
                                struct device_node *np);
-int smp_a2_cpu_bootable(unsigned int nr);
-int __devinit smp_a2_kick_cpu(int nr);
+extern int smp_a2_cpu_bootable(unsigned int nr);
+extern int __devinit smp_a2_kick_cpu(int nr);
+
+extern void opb_pic_init(void);
 
-void opb_pic_init(void);
+/* chroma specific managment */
+extern void wsp_h8_restart(char *cmd);
+extern void wsp_h8_power_off(void);
+extern void __init wsp_setup_h8(void);
 
 #endif /*  __WSP_H */
diff --git a/arch/powerpc/relocs_check.pl b/arch/powerpc/relocs_check.pl
index d2571096c3e9..7f5b83808862 100755
--- a/arch/powerpc/relocs_check.pl
+++ b/arch/powerpc/relocs_check.pl
@@ -32,8 +32,18 @@ while (<FD>) {
         next if (!/\s+R_/);
 
         # These relocations are okay
-        next if (/R_PPC64_RELATIVE/ or /R_PPC64_NONE/ or
-                 /R_PPC64_ADDR64\s+mach_/);
+        # On PPC64:
+        #       R_PPC64_RELATIVE, R_PPC64_NONE, R_PPC64_ADDR64
+        # On PPC:
+        #       R_PPC_RELATIVE, R_PPC_ADDR16_HI, 
+        #       R_PPC_ADDR16_HA,R_PPC_ADDR16_LO,
+        #       R_PPC_NONE
+
+        next if (/\bR_PPC64_RELATIVE\b/ or /\bR_PPC64_NONE\b/ or
+                 /\bR_PPC64_ADDR64\s+mach_/);
+        next if (/\bR_PPC_ADDR16_LO\b/ or /\bR_PPC_ADDR16_HI\b/ or
+                 /\bR_PPC_ADDR16_HA\b/ or /\bR_PPC_RELATIVE\b/ or
+                 /\bR_PPC_NONE\b/);
 
         # If we see this type of relcoation it's an idication that
         # we /may/ be using an old version of binutils.
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 84e13253aec5..5e37b4717864 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -17,10 +17,11 @@ obj-$(CONFIG_FSL_SOC)		+= fsl_soc.o
 obj-$(CONFIG_FSL_PCI)           += fsl_pci.o $(fsl-msi-obj-y)
 obj-$(CONFIG_FSL_PMC)           += fsl_pmc.o
 obj-$(CONFIG_FSL_LBC)           += fsl_lbc.o
+obj-$(CONFIG_FSL_IFC)           += fsl_ifc.o
 obj-$(CONFIG_FSL_GTM)           += fsl_gtm.o
 obj-$(CONFIG_FSL_85XX_CACHE_SRAM)       += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
 obj-$(CONFIG_SIMPLE_GPIO)       += simple_gpio.o
-obj-$(CONFIG_FSL_RIO)           += fsl_rio.o
+obj-$(CONFIG_FSL_RIO)           += fsl_rio.o fsl_rmu.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
 obj-$(CONFIG_QUICC_ENGINE)      += qe_lib/
 obj-$(CONFIG_PPC_BESTCOMM)      += bestcomm/
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index ba4271919062..1c16141c031c 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -25,7 +25,6 @@
 
 #include <linux/bio.h>
 #include <linux/blkdev.h>
-#include <linux/buffer_head.h>
 #include <linux/device.h>
 #include <linux/errno.h>
 #include <linux/fs.h>
diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c
index af1a5df46b3e..b6731e4a6646 100644
--- a/arch/powerpc/sysdev/ehv_pic.c
+++ b/arch/powerpc/sysdev/ehv_pic.c
@@ -280,6 +280,7 @@ void __init ehv_pic_init(void)
 
         if (!ehv_pic->irqhost) {
                 of_node_put(np);
+                kfree(ehv_pic);
                 return;
         }
 
diff --git a/arch/powerpc/sysdev/fsl_ifc.c b/arch/powerpc/sysdev/fsl_ifc.c
new file mode 100644
index 000000000000..b31f19f61031
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_ifc.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc
+ *
+ * Freescale Integrated Flash Controller
+ *
+ * Author: Dipen Dudhat <Dipen.Dudhat@freescale.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/compiler.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <asm/prom.h>
+#include <asm/fsl_ifc.h>
+
+struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
+EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
+
+/*
+ * convert_ifc_address - convert the base address
+ * @addr_base:  base address of the memory bank
+ */
+unsigned int convert_ifc_address(phys_addr_t addr_base)
+{
+        return addr_base & CSPR_BA;
+}
+EXPORT_SYMBOL(convert_ifc_address);
+
+/*
+ * fsl_ifc_find - find IFC bank
+ * @addr_base:  base address of the memory bank
+ *
+ * This function walks IFC banks comparing "Base address" field of the CSPR
+ * registers with the supplied addr_base argument. When bases match this
+ * function returns bank number (starting with 0), otherwise it returns
+ * appropriate errno value.
+ */
+int fsl_ifc_find(phys_addr_t addr_base)
+{
+        int i = 0;
+
+        if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->regs)
+                return -ENODEV;
+
+        for (i = 0; i < ARRAY_SIZE(fsl_ifc_ctrl_dev->regs->cspr_cs); i++) {
+                __be32 cspr = in_be32(&fsl_ifc_ctrl_dev->regs->cspr_cs[i].cspr);
+                if (cspr & CSPR_V && (cspr & CSPR_BA) ==
+                                convert_ifc_address(addr_base))
+                        return i;
+        }
+
+        return -ENOENT;
+}
+EXPORT_SYMBOL(fsl_ifc_find);
+
+static int __devinit fsl_ifc_ctrl_init(struct fsl_ifc_ctrl *ctrl)
+{
+        struct fsl_ifc_regs __iomem *ifc = ctrl->regs;
+
+        /*
+         * Clear all the common status and event registers
+         */
+        if (in_be32(&ifc->cm_evter_stat) & IFC_CM_EVTER_STAT_CSER)
+                out_be32(&ifc->cm_evter_stat, IFC_CM_EVTER_STAT_CSER);
+
+        /* enable all error and events */
+        out_be32(&ifc->cm_evter_en, IFC_CM_EVTER_EN_CSEREN);
+
+        /* enable all error and event interrupts */
+        out_be32(&ifc->cm_evter_intr_en, IFC_CM_EVTER_INTR_EN_CSERIREN);
+        out_be32(&ifc->cm_erattr0, 0x0);
+        out_be32(&ifc->cm_erattr1, 0x0);
+
+        return 0;
+}
+
+static int fsl_ifc_ctrl_remove(struct platform_device *dev)
+{
+        struct fsl_ifc_ctrl *ctrl = dev_get_drvdata(&dev->dev);
+
+        free_irq(ctrl->nand_irq, ctrl);
+        free_irq(ctrl->irq, ctrl);
+
+        irq_dispose_mapping(ctrl->nand_irq);
+        irq_dispose_mapping(ctrl->irq);
+
+        iounmap(ctrl->regs);
+
+        dev_set_drvdata(&dev->dev, NULL);
+        kfree(ctrl);
+
+        return 0;
+}
+
+/*
+ * NAND events are split between an operational interrupt which only
+ * receives OPC, and an error interrupt that receives everything else,
+ * including non-NAND errors.  Whichever interrupt gets to it first
+ * records the status and wakes the wait queue.
+ */
+static DEFINE_SPINLOCK(nand_irq_lock);
+
+static u32 check_nand_stat(struct fsl_ifc_ctrl *ctrl)
+{
+        struct fsl_ifc_regs __iomem *ifc = ctrl->regs;
+        unsigned long flags;
+        u32 stat;
+
+        spin_lock_irqsave(&nand_irq_lock, flags);
+
+        stat = in_be32(&ifc->ifc_nand.nand_evter_stat);
+        if (stat) {
+                out_be32(&ifc->ifc_nand.nand_evter_stat, stat);
+                ctrl->nand_stat = stat;
+                wake_up(&ctrl->nand_wait);
+        }
+
+        spin_unlock_irqrestore(&nand_irq_lock, flags);
+
+        return stat;
+}
+
+static irqreturn_t fsl_ifc_nand_irq(int irqno, void *data)
+{
+        struct fsl_ifc_ctrl *ctrl = data;
+
+        if (check_nand_stat(ctrl))
+                return IRQ_HANDLED;
+
+        return IRQ_NONE;
+}
+
+/*
+ * NOTE: This interrupt is used to report ifc events of various kinds,
+ * such as transaction errors on the chipselects.
+ */
+static irqreturn_t fsl_ifc_ctrl_irq(int irqno, void *data)
+{
+        struct fsl_ifc_ctrl *ctrl = data;
+        struct fsl_ifc_regs __iomem *ifc = ctrl->regs;
+        u32 err_axiid, err_srcid, status, cs_err, err_addr;
+        irqreturn_t ret = IRQ_NONE;
+
+        /* read for chip select error */
+        cs_err = in_be32(&ifc->cm_evter_stat);
+        if (cs_err) {
+                dev_err(ctrl->dev, "transaction sent to IFC is not mapped to"
+                                "any memory bank 0x%08X\n", cs_err);
+                /* clear the chip select error */
+                out_be32(&ifc->cm_evter_stat, IFC_CM_EVTER_STAT_CSER);
+
+                /* read error attribute registers print the error information */
+                status = in_be32(&ifc->cm_erattr0);
+                err_addr = in_be32(&ifc->cm_erattr1);
+
+                if (status & IFC_CM_ERATTR0_ERTYP_READ)
+                        dev_err(ctrl->dev, "Read transaction error"
+                                "CM_ERATTR0 0x%08X\n", status);
+                else
+                        dev_err(ctrl->dev, "Write transaction error"
+                                "CM_ERATTR0 0x%08X\n", status);
+
+                err_axiid = (status & IFC_CM_ERATTR0_ERAID) >>
+                                        IFC_CM_ERATTR0_ERAID_SHIFT;
+                dev_err(ctrl->dev, "AXI ID of the error"
+                                        "transaction 0x%08X\n", err_axiid);
+
+                err_srcid = (status & IFC_CM_ERATTR0_ESRCID) >>
+                                        IFC_CM_ERATTR0_ESRCID_SHIFT;
+                dev_err(ctrl->dev, "SRC ID of the error"
+                                        "transaction 0x%08X\n", err_srcid);
+
+                dev_err(ctrl->dev, "Transaction Address corresponding to error"
+                                        "ERADDR 0x%08X\n", err_addr);
+
+                ret = IRQ_HANDLED;
+        }
+
+        if (check_nand_stat(ctrl))
+                ret = IRQ_HANDLED;
+
+        return ret;
+}
+
+/*
+ * fsl_ifc_ctrl_probe
+ *
+ * called by device layer when it finds a device matching
+ * one our driver can handled. This code allocates all of
+ * the resources needed for the controller only.  The
+ * resources for the NAND banks themselves are allocated
+ * in the chip probe function.
+*/
+static int __devinit fsl_ifc_ctrl_probe(struct platform_device *dev)
+{
+        int ret = 0;
+
+
+        dev_info(&dev->dev, "Freescale Integrated Flash Controller\n");
+
+        fsl_ifc_ctrl_dev = kzalloc(sizeof(*fsl_ifc_ctrl_dev), GFP_KERNEL);
+        if (!fsl_ifc_ctrl_dev)
+                return -ENOMEM;
+
+        dev_set_drvdata(&dev->dev, fsl_ifc_ctrl_dev);
+
+        /* IOMAP the entire IFC region */
+        fsl_ifc_ctrl_dev->regs = of_iomap(dev->dev.of_node, 0);
+        if (!fsl_ifc_ctrl_dev->regs) {
+                dev_err(&dev->dev, "failed to get memory region\n");
+                ret = -ENODEV;
+                goto err;
+        }
+
+        /* get the Controller level irq */
+        fsl_ifc_ctrl_dev->irq = irq_of_parse_and_map(dev->dev.of_node, 0);
+        if (fsl_ifc_ctrl_dev->irq == NO_IRQ) {
+                dev_err(&dev->dev, "failed to get irq resource "
+                                                        "for IFC\n");
+                ret = -ENODEV;
+                goto err;
+        }
+
+        /* get the nand machine irq */
+        fsl_ifc_ctrl_dev->nand_irq =
+                        irq_of_parse_and_map(dev->dev.of_node, 1);
+        if (fsl_ifc_ctrl_dev->nand_irq == NO_IRQ) {
+                dev_err(&dev->dev, "failed to get irq resource "
+                                                "for NAND Machine\n");
+                ret = -ENODEV;
+                goto err;
+        }
+
+        fsl_ifc_ctrl_dev->dev = &dev->dev;
+
+        ret = fsl_ifc_ctrl_init(fsl_ifc_ctrl_dev);
+        if (ret < 0)
+                goto err;
+
+        init_waitqueue_head(&fsl_ifc_ctrl_dev->nand_wait);
+
+        ret = request_irq(fsl_ifc_ctrl_dev->irq, fsl_ifc_ctrl_irq, IRQF_SHARED,
+                          "fsl-ifc", fsl_ifc_ctrl_dev);
+        if (ret != 0) {
+                dev_err(&dev->dev, "failed to install irq (%d)\n",
+                        fsl_ifc_ctrl_dev->irq);
+                goto err_irq;
+        }
+
+        ret = request_irq(fsl_ifc_ctrl_dev->nand_irq, fsl_ifc_nand_irq, 0,
+                          "fsl-ifc-nand", fsl_ifc_ctrl_dev);
+        if (ret != 0) {
+                dev_err(&dev->dev, "failed to install irq (%d)\n",
+                        fsl_ifc_ctrl_dev->nand_irq);
+                goto err_nandirq;
+        }
+
+        return 0;
+
+err_nandirq:
+        free_irq(fsl_ifc_ctrl_dev->nand_irq, fsl_ifc_ctrl_dev);
+        irq_dispose_mapping(fsl_ifc_ctrl_dev->nand_irq);
+err_irq:
+        free_irq(fsl_ifc_ctrl_dev->irq, fsl_ifc_ctrl_dev);
+        irq_dispose_mapping(fsl_ifc_ctrl_dev->irq);
+err:
+        return ret;
+}
+
+static const struct of_device_id fsl_ifc_match[] = {
+        {
+                .compatible = "fsl,ifc",
+        },
+        {},
+};
+
+static struct platform_driver fsl_ifc_ctrl_driver = {
+        .driver = {
+                .name   = "fsl-ifc",
+                .of_match_table = fsl_ifc_match,
+        },
+        .probe       = fsl_ifc_ctrl_probe,
+        .remove      = fsl_ifc_ctrl_remove,
+};
+
+module_platform_driver(fsl_ifc_ctrl_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Freescale Semiconductor");
+MODULE_DESCRIPTION("Freescale Integrated Flash Controller driver");
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index c4d96fa32ba5..483126d7b3c0 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -328,9 +328,42 @@ static int __devinit fsl_lbc_ctrl_probe(struct platform_device *dev)
 err:
         iounmap(fsl_lbc_ctrl_dev->regs);
         kfree(fsl_lbc_ctrl_dev);
+        fsl_lbc_ctrl_dev = NULL;
         return ret;
 }
 
+#ifdef CONFIG_SUSPEND
+
+/* save lbc registers */
+static int fsl_lbc_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct fsl_lbc_ctrl *ctrl = dev_get_drvdata(&pdev->dev);
+        struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
+
+        ctrl->saved_regs = kmalloc(sizeof(struct fsl_lbc_regs), GFP_KERNEL);
+        if (!ctrl->saved_regs)
+                return -ENOMEM;
+
+        _memcpy_fromio(ctrl->saved_regs, lbc, sizeof(struct fsl_lbc_regs));
+        return 0;
+}
+
+/* restore lbc registers */
+static int fsl_lbc_resume(struct platform_device *pdev)
+{
+        struct fsl_lbc_ctrl *ctrl = dev_get_drvdata(&pdev->dev);
+        struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
+
+        if (ctrl->saved_regs) {
+                _memcpy_toio(lbc, ctrl->saved_regs,
+                                sizeof(struct fsl_lbc_regs));
+                kfree(ctrl->saved_regs);
+                ctrl->saved_regs = NULL;
+        }
+        return 0;
+}
+#endif /* CONFIG_SUSPEND */
+
 static const struct of_device_id fsl_lbc_match[] = {
         { .compatible = "fsl,elbc", },
         { .compatible = "fsl,pq3-localbus", },
@@ -345,6 +378,10 @@ static struct platform_driver fsl_lbc_ctrl_driver = {
                 .of_match_table = fsl_lbc_match,
         },
         .probe = fsl_lbc_ctrl_probe,
+#ifdef CONFIG_SUSPEND
+        .suspend     = fsl_lbc_suspend,
+        .resume      = fsl_lbc_resume,
+#endif
 };
 
 static int __init fsl_lbc_init(void)
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index e5c344d336ea..ecb5c1946d22 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -23,6 +23,8 @@
 #include <asm/hw_irq.h>
 #include <asm/ppc-pci.h>
 #include <asm/mpic.h>
+#include <asm/fsl_hcalls.h>
+
 #include "fsl_msi.h"
 #include "fsl_pci.h"
 
@@ -148,14 +150,49 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
 
 static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 {
+        struct pci_controller *hose = pci_bus_to_host(pdev->bus);
+        struct device_node *np;
+        phandle phandle = 0;
         int rc, hwirq = -ENOMEM;
         unsigned int virq;
         struct msi_desc *entry;
         struct msi_msg msg;
         struct fsl_msi *msi_data;
 
+        /*
+         * If the PCI node has an fsl,msi property, then we need to use it
+         * to find the specific MSI.
+         */
+        np = of_parse_phandle(hose->dn, "fsl,msi", 0);
+        if (np) {
+                if (of_device_is_compatible(np, "fsl,mpic-msi") ||
+                    of_device_is_compatible(np, "fsl,vmpic-msi"))
+                        phandle = np->phandle;
+                else {
+                        dev_err(&pdev->dev,
+                                "node %s has an invalid fsl,msi phandle %u\n",
+                                hose->dn->full_name, np->phandle);
+                        return -EINVAL;
+                }
+        }
+
         list_for_each_entry(entry, &pdev->msi_list, list) {
+                /*
+                 * Loop over all the MSI devices until we find one that has an
+                 * available interrupt.
+                 */
                 list_for_each_entry(msi_data, &msi_head, list) {
+                        /*
+                         * If the PCI node has an fsl,msi property, then we
+                         * restrict our search to the corresponding MSI node.
+                         * The simplest way is to skip over MSI nodes with the
+                         * wrong phandle. Under the Freescale hypervisor, this
+                         * has the additional benefit of skipping over MSI
+                         * nodes that are not mapped in the PAMU.
+                         */
+                        if (phandle && (phandle != msi_data->phandle))
+                                continue;
+
                         hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
                         if (hwirq >= 0)
                                 break;
@@ -163,16 +200,14 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 
                 if (hwirq < 0) {
                         rc = hwirq;
-                        pr_debug("%s: fail allocating msi interrupt\n",
-                                        __func__);
+                        dev_err(&pdev->dev, "could not allocate MSI interrupt\n");
                         goto out_free;
                 }
 
                 virq = irq_create_mapping(msi_data->irqhost, hwirq);
 
                 if (virq == NO_IRQ) {
-                        pr_debug("%s: fail mapping hwirq 0x%x\n",
-                                        __func__, hwirq);
+                        dev_err(&pdev->dev, "fail mapping hwirq %i\n", hwirq);
                         msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
                         rc = -ENOSPC;
                         goto out_free;
@@ -201,6 +236,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
         u32 intr_index;
         u32 have_shift = 0;
         struct fsl_msi_cascade_data *cascade_data;
+        unsigned int ret;
 
         cascade_data = irq_get_handler_data(irq);
         msi_data = cascade_data->msi_data;
@@ -232,6 +268,14 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
         case FSL_PIC_IP_IPIC:
                 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
                 break;
+        case FSL_PIC_IP_VMPIC:
+                ret = fh_vmpic_get_msir(virq_to_hw(irq), &msir_value);
+                if (ret) {
+                        pr_err("fsl-msi: fh_vmpic_get_msir() failed for "
+                               "irq %u (ret=%u)\n", irq, ret);
+                        msir_value = 0;
+                }
+                break;
         }
 
         while (msir_value) {
@@ -249,6 +293,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
 
         switch (msi_data->feature & FSL_PIC_IP_MASK) {
         case FSL_PIC_IP_MPIC:
+        case FSL_PIC_IP_VMPIC:
                 chip->irq_eoi(idata);
                 break;
         case FSL_PIC_IP_IPIC:
@@ -278,7 +323,8 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
         }
         if (msi->bitmap.bitmap)
                 msi_bitmap_free(&msi->bitmap);
-        iounmap(msi->msi_regs);
+        if ((msi->feature & FSL_PIC_IP_MASK) != FSL_PIC_IP_VMPIC)
+                iounmap(msi->msi_regs);
         kfree(msi);
 
         return 0;
@@ -350,25 +396,37 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
                 goto error_out;
         }
 
-        /* Get the MSI reg base */
-        err = of_address_to_resource(dev->dev.of_node, 0, &res);
-        if (err) {
-                dev_err(&dev->dev, "%s resource error!\n",
+        /*
+         * Under the Freescale hypervisor, the msi nodes don't have a 'reg'
+         * property.  Instead, we use hypercalls to access the MSI.
+         */
+        if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) != FSL_PIC_IP_VMPIC) {
+                err = of_address_to_resource(dev->dev.of_node, 0, &res);
+                if (err) {
+                        dev_err(&dev->dev, "invalid resource for node %s\n",
                                 dev->dev.of_node->full_name);
-                goto error_out;
-        }
+                        goto error_out;
+                }
 
-        msi->msi_regs = ioremap(res.start, resource_size(&res));
-        if (!msi->msi_regs) {
-                dev_err(&dev->dev, "ioremap problem failed\n");
-                goto error_out;
+                msi->msi_regs = ioremap(res.start, resource_size(&res));
+                if (!msi->msi_regs) {
+                        dev_err(&dev->dev, "could not map node %s\n",
+                                dev->dev.of_node->full_name);
+                        goto error_out;
+                }
+                msi->msiir_offset =
+                        features->msiir_offset + (res.start & 0xfffff);
         }
 
         msi->feature = features->fsl_pic_ip;
 
         msi->irqhost->host_data = msi;
 
-        msi->msiir_offset = features->msiir_offset + (res.start & 0xfffff);
+        /*
+         * Remember the phandle, so that we can match with any PCI nodes
+         * that have an "fsl,msi" property.
+         */
+        msi->phandle = dev->dev.of_node->phandle;
 
         rc = fsl_msi_init_allocator(msi);
         if (rc) {
@@ -437,6 +495,11 @@ static const struct fsl_msi_feature ipic_msi_feature = {
         .msiir_offset = 0x38,
 };
 
+static const struct fsl_msi_feature vmpic_msi_feature = {
+        .fsl_pic_ip = FSL_PIC_IP_VMPIC,
+        .msiir_offset = 0,
+};
+
 static const struct of_device_id fsl_of_msi_ids[] = {
         {
                 .compatible = "fsl,mpic-msi",
@@ -446,6 +509,10 @@ static const struct of_device_id fsl_of_msi_ids[] = {
                 .compatible = "fsl,ipic-msi",
                 .data = (void *)&ipic_msi_feature,
         },
+        {
+                .compatible = "fsl,vmpic-msi",
+                .data = (void *)&vmpic_msi_feature,
+        },
         {}
 };
 
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
index 1313abbc5200..f6c646a52541 100644
--- a/arch/powerpc/sysdev/fsl_msi.h
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -13,15 +13,17 @@
 #ifndef _POWERPC_SYSDEV_FSL_MSI_H
 #define _POWERPC_SYSDEV_FSL_MSI_H
 
+#include <linux/of.h>
 #include <asm/msi_bitmap.h>
 
 #define NR_MSI_REG              8
 #define IRQS_PER_MSI_REG        32
 #define NR_MSI_IRQS     (NR_MSI_REG * IRQS_PER_MSI_REG)
 
-#define FSL_PIC_IP_MASK 0x0000000F
-#define FSL_PIC_IP_MPIC 0x00000001
-#define FSL_PIC_IP_IPIC 0x00000002
+#define FSL_PIC_IP_MASK   0x0000000F
+#define FSL_PIC_IP_MPIC   0x00000001
+#define FSL_PIC_IP_IPIC   0x00000002
+#define FSL_PIC_IP_VMPIC  0x00000003
 
 struct fsl_msi {
         struct irq_host *irqhost;
@@ -36,6 +38,8 @@ struct fsl_msi {
         struct msi_bitmap bitmap;
 
         struct list_head list;          /* support multiple MSI banks */
+
+        phandle phandle;
 };
 
 #endif /* _POWERPC_SYSDEV_FSL_MSI_H */
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4ce547e00473..3b61e8cf3421 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -65,6 +65,30 @@ static int __init fsl_pcie_check_link(struct pci_controller *hose)
 }
 
 #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
+
+#define MAX_PHYS_ADDR_BITS      40
+static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS;
+
+static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
+{
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+
+        /*
+         * Fixup PCI devices that are able to DMA to above the physical
+         * address width of the SoC such that we can address any internal
+         * SoC address from across PCI if needed
+         */
+        if ((dev->bus == &pci_bus_type) &&
+            dma_mask >= DMA_BIT_MASK(MAX_PHYS_ADDR_BITS)) {
+                set_dma_ops(dev, &dma_direct_ops);
+                set_dma_offset(dev, pci64_dma_offset);
+        }
+
+        *dev->dma_mask = dma_mask;
+        return 0;
+}
+
 static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
         unsigned int index, const struct resource *res,
         resource_size_t offset)
@@ -113,6 +137,8 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
         u32 piwar = PIWAR_EN | PIWAR_PF | PIWAR_TGI_LOCAL |
                         PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP;
         char *name = hose->dn->full_name;
+        const u64 *reg;
+        int len;
 
         pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
                  (u64)rsrc->start, (u64)resource_size(rsrc));
@@ -205,6 +231,33 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
 
         /* Setup inbound mem window */
         mem = memblock_end_of_DRAM();
+
+        /*
+         * The msi-address-64 property, if it exists, indicates the physical
+         * address of the MSIIR register.  Normally, this register is located
+         * inside CCSR, so the ATMU that covers all of CCSR is used. But if
+         * this property exists, then we normally need to create a new ATMU
+         * for it.  For now, however, we cheat.  The only entity that creates
+         * this property is the Freescale hypervisor, and the address is
+         * specified in the partition configuration.  Typically, the address
+         * is located in the page immediately after the end of DDR.  If so, we
+         * can avoid allocating a new ATMU by extending the DDR ATMU by one
+         * page.
+         */
+        reg = of_get_property(hose->dn, "msi-address-64", &len);
+        if (reg && (len == sizeof(u64))) {
+                u64 address = be64_to_cpup(reg);
+
+                if ((address >= mem) && (address < (mem + PAGE_SIZE))) {
+                        pr_info("%s: extending DDR ATMU to cover MSIIR", name);
+                        mem += PAGE_SIZE;
+                } else {
+                        /* TODO: Create a new ATMU for MSIIR */
+                        pr_warn("%s: msi-address-64 address of %llx is "
+                                "unsupported\n", name, address);
+                }
+        }
+
         sz = min(mem, paddr_lo);
         mem_log = __ilog2_u64(sz);
 
@@ -228,6 +281,37 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
 
                 hose->dma_window_base_cur = 0x00000000;
                 hose->dma_window_size = (resource_size_t)sz;
+
+                /*
+                 * if we have >4G of memory setup second PCI inbound window to
+                 * let devices that are 64-bit address capable to work w/o
+                 * SWIOTLB and access the full range of memory
+                 */
+                if (sz != mem) {
+                        mem_log = __ilog2_u64(mem);
+
+                        /* Size window up if we dont fit in exact power-of-2 */
+                        if ((1ull << mem_log) != mem)
+                                mem_log++;
+
+                        piwar = (piwar & ~PIWAR_SZ_MASK) | (mem_log - 1);
+
+                        /* Setup inbound memory window */
+                        out_be32(&pci->piw[win_idx].pitar,  0x00000000);
+                        out_be32(&pci->piw[win_idx].piwbear,
+                                        pci64_dma_offset >> 44);
+                        out_be32(&pci->piw[win_idx].piwbar,
+                                        pci64_dma_offset >> 12);
+                        out_be32(&pci->piw[win_idx].piwar,  piwar);
+
+                        /*
+                         * install our own dma_set_mask handler to fixup dma_ops
+                         * and dma_offset
+                         */
+                        ppc_md.dma_set_mask = fsl_pci_dma_set_mask;
+
+                        pr_info("%s: Setup 64-bit PCI DMA window\n", name);
+                }
         } else {
                 u64 paddr = 0;
 
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 22ffccd8bef5..a4c4f4a932d8 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -10,7 +10,7 @@
  * - Added Port-Write message handling
  * - Added Machine Check exception handling
  *
- * Copyright (C) 2007, 2008, 2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
  * Zhang Wei <wei.zhang@freescale.com>
  *
  * Copyright 2005 MontaVista Software, Inc.
@@ -28,240 +28,33 @@
 #include <linux/dma-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/device.h>
-#include <linux/rio.h>
-#include <linux/rio_drv.h>
 #include <linux/of_platform.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
-#include <linux/kfifo.h>
 
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
 #include <asm/machdep.h>
-#include <asm/uaccess.h>
 
-#undef DEBUG_PW /* Port-Write debugging */
+#include "fsl_rio.h"
 
-/* RapidIO definition irq, which read from OF-tree */
-#define IRQ_RIO_BELL(m)         (((struct rio_priv *)(m->priv))->bellirq)
-#define IRQ_RIO_TX(m)           (((struct rio_priv *)(m->priv))->txirq)
-#define IRQ_RIO_RX(m)           (((struct rio_priv *)(m->priv))->rxirq)
-#define IRQ_RIO_PW(m)           (((struct rio_priv *)(m->priv))->pwirq)
-
-#define IPWSR_CLEAR             0x98
-#define OMSR_CLEAR              0x1cb3
-#define IMSR_CLEAR              0x491
-#define IDSR_CLEAR              0x91
-#define ODSR_CLEAR              0x1c00
-#define LTLEECSR_ENABLE_ALL     0xFFC000FC
-#define ESCSR_CLEAR             0x07120204
-#define IECSR_CLEAR             0x80000000
+#undef DEBUG_PW /* Port-Write debugging */
 
 #define RIO_PORT1_EDCSR         0x0640
 #define RIO_PORT2_EDCSR         0x0680
 #define RIO_PORT1_IECSR         0x10130
 #define RIO_PORT2_IECSR         0x101B0
-#define RIO_IM0SR               0x13064
-#define RIO_IM1SR               0x13164
-#define RIO_OM0SR               0x13004
-#define RIO_OM1SR               0x13104
-
-#define RIO_ATMU_REGS_OFFSET    0x10c00
-#define RIO_P_MSG_REGS_OFFSET   0x11000
-#define RIO_S_MSG_REGS_OFFSET   0x13000
+
 #define RIO_GCCSR               0x13c
 #define RIO_ESCSR               0x158
+#define ESCSR_CLEAR             0x07120204
 #define RIO_PORT2_ESCSR         0x178
 #define RIO_CCSR                0x15c
-#define RIO_LTLEDCSR            0x0608
 #define RIO_LTLEDCSR_IER        0x80000000
 #define RIO_LTLEDCSR_PRT        0x01000000
-#define RIO_LTLEECSR            0x060c
-#define RIO_EPWISR              0x10010
+#define IECSR_CLEAR             0x80000000
 #define RIO_ISR_AACR            0x10120
 #define RIO_ISR_AACR_AA         0x1     /* Accept All ID */
-#define RIO_MAINT_WIN_SIZE      0x400000
-#define RIO_DBELL_WIN_SIZE      0x1000
-
-#define RIO_MSG_OMR_MUI         0x00000002
-#define RIO_MSG_OSR_TE          0x00000080
-#define RIO_MSG_OSR_QOI         0x00000020
-#define RIO_MSG_OSR_QFI         0x00000010
-#define RIO_MSG_OSR_MUB         0x00000004
-#define RIO_MSG_OSR_EOMI        0x00000002
-#define RIO_MSG_OSR_QEI         0x00000001
-
-#define RIO_MSG_IMR_MI          0x00000002
-#define RIO_MSG_ISR_TE          0x00000080
-#define RIO_MSG_ISR_QFI         0x00000010
-#define RIO_MSG_ISR_DIQI        0x00000001
-
-#define RIO_IPWMR_SEN           0x00100000
-#define RIO_IPWMR_QFIE          0x00000100
-#define RIO_IPWMR_EIE           0x00000020
-#define RIO_IPWMR_CQ            0x00000002
-#define RIO_IPWMR_PWE           0x00000001
-
-#define RIO_IPWSR_QF            0x00100000
-#define RIO_IPWSR_TE            0x00000080
-#define RIO_IPWSR_QFI           0x00000010
-#define RIO_IPWSR_PWD           0x00000008
-#define RIO_IPWSR_PWB           0x00000004
-
-/* EPWISR Error match value */
-#define RIO_EPWISR_PINT1        0x80000000
-#define RIO_EPWISR_PINT2        0x40000000
-#define RIO_EPWISR_MU           0x00000002
-#define RIO_EPWISR_PW           0x00000001
-
-#define RIO_MSG_DESC_SIZE       32
-#define RIO_MSG_BUFFER_SIZE     4096
-#define RIO_MIN_TX_RING_SIZE    2
-#define RIO_MAX_TX_RING_SIZE    2048
-#define RIO_MIN_RX_RING_SIZE    2
-#define RIO_MAX_RX_RING_SIZE    2048
-
-#define DOORBELL_DMR_DI         0x00000002
-#define DOORBELL_DSR_TE         0x00000080
-#define DOORBELL_DSR_QFI        0x00000010
-#define DOORBELL_DSR_DIQI       0x00000001
-#define DOORBELL_TID_OFFSET     0x02
-#define DOORBELL_SID_OFFSET     0x04
-#define DOORBELL_INFO_OFFSET    0x06
-
-#define DOORBELL_MESSAGE_SIZE   0x08
-#define DBELL_SID(x)            (*(u16 *)(x + DOORBELL_SID_OFFSET))
-#define DBELL_TID(x)            (*(u16 *)(x + DOORBELL_TID_OFFSET))
-#define DBELL_INF(x)            (*(u16 *)(x + DOORBELL_INFO_OFFSET))
-
-struct rio_atmu_regs {
-        u32 rowtar;
-        u32 rowtear;
-        u32 rowbar;
-        u32 pad2;
-        u32 rowar;
-        u32 pad3[3];
-};
-
-struct rio_msg_regs {
-        u32 omr;        /* 0xD_3000 - Outbound message 0 mode register */
-        u32 osr;        /* 0xD_3004 - Outbound message 0 status register */
-        u32 pad1;
-        u32 odqdpar;    /* 0xD_300C - Outbound message 0 descriptor queue
-                           dequeue pointer address register */
-        u32 pad2;
-        u32 osar;       /* 0xD_3014 - Outbound message 0 source address
-                           register */
-        u32 odpr;       /* 0xD_3018 - Outbound message 0 destination port
-                           register */
-        u32 odatr;      /* 0xD_301C - Outbound message 0 destination attributes
-                           Register*/
-        u32 odcr;       /* 0xD_3020 - Outbound message 0 double-word count
-                           register */
-        u32 pad3;
-        u32 odqepar;    /* 0xD_3028 - Outbound message 0 descriptor queue
-                           enqueue pointer address register */
-        u32 pad4[13];
-        u32 imr;        /* 0xD_3060 - Inbound message 0 mode register */
-        u32 isr;        /* 0xD_3064 - Inbound message 0 status register */
-        u32 pad5;
-        u32 ifqdpar;    /* 0xD_306C - Inbound message 0 frame queue dequeue
-                           pointer address register*/
-        u32 pad6;
-        u32 ifqepar;    /* 0xD_3074 - Inbound message 0 frame queue enqueue
-                           pointer address register */
-        u32 pad7[226];
-        u32 odmr;       /* 0xD_3400 - Outbound doorbell mode register */
-        u32 odsr;       /* 0xD_3404 - Outbound doorbell status register */
-        u32 res0[4];
-        u32 oddpr;      /* 0xD_3418 - Outbound doorbell destination port
-                           register */
-        u32 oddatr;     /* 0xD_341c - Outbound doorbell destination attributes
-                           register */
-        u32 res1[3];
-        u32 odretcr;    /* 0xD_342C - Outbound doorbell retry error threshold
-                           configuration register */
-        u32 res2[12];
-        u32 dmr;        /* 0xD_3460 - Inbound doorbell mode register */
-        u32 dsr;        /* 0xD_3464 - Inbound doorbell status register */
-        u32 pad8;
-        u32 dqdpar;     /* 0xD_346C - Inbound doorbell queue dequeue Pointer
-                           address register */
-        u32 pad9;
-        u32 dqepar;     /* 0xD_3474 - Inbound doorbell Queue enqueue pointer
-                           address register */
-        u32 pad10[26];
-        u32 pwmr;       /* 0xD_34E0 - Inbound port-write mode register */
-        u32 pwsr;       /* 0xD_34E4 - Inbound port-write status register */
-        u32 epwqbar;    /* 0xD_34E8 - Extended Port-Write Queue Base Address
-                           register */
-        u32 pwqbar;     /* 0xD_34EC - Inbound port-write queue base address
-                           register */
-};
-
-struct rio_tx_desc {
-        u32 res1;
-        u32 saddr;
-        u32 dport;
-        u32 dattr;
-        u32 res2;
-        u32 res3;
-        u32 dwcnt;
-        u32 res4;
-};
-
-struct rio_dbell_ring {
-        void *virt;
-        dma_addr_t phys;
-};
-
-struct rio_msg_tx_ring {
-        void *virt;
-        dma_addr_t phys;
-        void *virt_buffer[RIO_MAX_TX_RING_SIZE];
-        dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
-        int tx_slot;
-        int size;
-        void *dev_id;
-};
-
-struct rio_msg_rx_ring {
-        void *virt;
-        dma_addr_t phys;
-        void *virt_buffer[RIO_MAX_RX_RING_SIZE];
-        int rx_slot;
-        int size;
-        void *dev_id;
-};
-
-struct rio_port_write_msg {
-        void *virt;
-        dma_addr_t phys;
-        u32 msg_count;
-        u32 err_count;
-        u32 discard_count;
-};
-
-struct rio_priv {
-        struct device *dev;
-        void __iomem *regs_win;
-        struct rio_atmu_regs __iomem *atmu_regs;
-        struct rio_atmu_regs __iomem *maint_atmu_regs;
-        struct rio_atmu_regs __iomem *dbell_atmu_regs;
-        void __iomem *dbell_win;
-        void __iomem *maint_win;
-        struct rio_msg_regs __iomem *msg_regs;
-        struct rio_dbell_ring dbell_ring;
-        struct rio_msg_tx_ring msg_tx_ring;
-        struct rio_msg_rx_ring msg_rx_ring;
-        struct rio_port_write_msg port_write_msg;
-        int bellirq;
-        int txirq;
-        int rxirq;
-        int pwirq;
-        struct work_struct pw_work;
-        struct kfifo pw_fifo;
-        spinlock_t pw_fifo_lock;
-};
 
 #define __fsl_read_rio_config(x, addr, err, op)         \
         __asm__ __volatile__(                           \
@@ -279,7 +72,12 @@ struct rio_priv {
                 : "=r" (err), "=r" (x)                  \
                 : "b" (addr), "i" (-EFAULT), "0" (err))
 
-static void __iomem *rio_regs_win;
+void __iomem *rio_regs_win;
+void __iomem *rmu_regs_win;
+resource_size_t rio_law_start;
+
+struct fsl_rio_dbell *dbell;
+struct fsl_rio_pw *pw;
 
 #ifdef CONFIG_E500
 int fsl_rio_mcheck_exception(struct pt_regs *regs)
@@ -311,42 +109,6 @@ EXPORT_SYMBOL_GPL(fsl_rio_mcheck_exception);
 #endif
 
 /**
- * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
- * @mport: RapidIO master port info
- * @index: ID of RapidIO interface
- * @destid: Destination ID of target device
- * @data: 16-bit info field of RapidIO doorbell message
- *
- * Sends a MPC85xx doorbell message. Returns %0 on success or
- * %-EINVAL on failure.
- */
-static int fsl_rio_doorbell_send(struct rio_mport *mport,
-                                int index, u16 destid, u16 data)
-{
-        struct rio_priv *priv = mport->priv;
-        pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n",
-                 index, destid, data);
-        switch (mport->phy_type) {
-        case RIO_PHY_PARALLEL:
-                out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22);
-                out_be16(priv->dbell_win, data);
-                break;
-        case RIO_PHY_SERIAL:
-                /* In the serial version silicons, such as MPC8548, MPC8641,
-                 * below operations is must be.
-                 */
-                out_be32(&priv->msg_regs->odmr, 0x00000000);
-                out_be32(&priv->msg_regs->odretcr, 0x00000004);
-                out_be32(&priv->msg_regs->oddpr, destid << 16);
-                out_be32(&priv->msg_regs->oddatr, data);
-                out_be32(&priv->msg_regs->odmr, 0x00000001);
-                break;
-        }
-
-        return 0;
-}
-
-/**
  * fsl_local_config_read - Generate a MPC85xx local config space read
  * @mport: RapidIO master port info
  * @index: ID of RapdiIO interface
@@ -384,8 +146,8 @@ static int fsl_local_config_write(struct rio_mport *mport,
 {
         struct rio_priv *priv = mport->priv;
         pr_debug
-            ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n",
-             index, offset, data);
+                ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n",
+                index, offset, data);
         out_be32(priv->regs_win + offset, data);
 
         return 0;
@@ -413,8 +175,9 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
         u32 rval, err = 0;
 
         pr_debug
-            ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
-             index, destid, hopcount, offset, len);
+                ("fsl_rio_config_read:"
+                " index %d destid %d hopcount %d offset %8.8x len %d\n",
+                index, destid, hopcount, offset, len);
 
         /* 16MB maintenance window possible */
         /* allow only aligned access to maintenance registers */
@@ -423,7 +186,7 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
 
         out_be32(&priv->maint_atmu_regs->rowtar,
                  (destid << 22) | (hopcount << 12) | (offset >> 12));
-        out_be32(&priv->maint_atmu_regs->rowtear,  (destid >> 10));
+        out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
 
         data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1));
         switch (len) {
@@ -470,8 +233,9 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
         struct rio_priv *priv = mport->priv;
         u8 *data;
         pr_debug
-            ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
-             index, destid, hopcount, offset, len, val);
+                ("fsl_rio_config_write:"
+                " index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
+                index, destid, hopcount, offset, len, val);
 
         /* 16MB maintenance windows possible */
         /* allow only aligned access to maintenance registers */
@@ -480,7 +244,7 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
 
         out_be32(&priv->maint_atmu_regs->rowtar,
                  (destid << 22) | (hopcount << 12) | (offset >> 12));
-        out_be32(&priv->maint_atmu_regs->rowtear,  (destid >> 10));
+        out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10));
 
         data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1));
         switch (len) {
@@ -500,590 +264,7 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
         return 0;
 }
 
-/**
- * fsl_add_outb_message - Add message to the MPC85xx outbound message queue
- * @mport: Master port with outbound message queue
- * @rdev: Target of outbound message
- * @mbox: Outbound mailbox
- * @buffer: Message to add to outbound queue
- * @len: Length of message
- *
- * Adds the @buffer message to the MPC85xx outbound message queue. Returns
- * %0 on success or %-EINVAL on failure.
- */
-static int
-fsl_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
-                        void *buffer, size_t len)
-{
-        struct rio_priv *priv = mport->priv;
-        u32 omr;
-        struct rio_tx_desc *desc = (struct rio_tx_desc *)priv->msg_tx_ring.virt
-                                        + priv->msg_tx_ring.tx_slot;
-        int ret = 0;
-
-        pr_debug("RIO: fsl_add_outb_message(): destid %4.4x mbox %d buffer " \
-                 "%8.8x len %8.8x\n", rdev->destid, mbox, (int)buffer, len);
-
-        if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
-                ret = -EINVAL;
-                goto out;
-        }
-
-        /* Copy and clear rest of buffer */
-        memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer,
-                        len);
-        if (len < (RIO_MAX_MSG_SIZE - 4))
-                memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot]
-                                + len, 0, RIO_MAX_MSG_SIZE - len);
-
-        switch (mport->phy_type) {
-        case RIO_PHY_PARALLEL:
-                /* Set mbox field for message */
-                desc->dport = mbox & 0x3;
-
-                /* Enable EOMI interrupt, set priority, and set destid */
-                desc->dattr = 0x28000000 | (rdev->destid << 2);
-                break;
-        case RIO_PHY_SERIAL:
-                /* Set mbox field for message, and set destid */
-                desc->dport = (rdev->destid << 16) | (mbox & 0x3);
-
-                /* Enable EOMI interrupt and priority */
-                desc->dattr = 0x28000000;
-                break;
-        }
-
-        /* Set transfer size aligned to next power of 2 (in double words) */
-        desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
-
-        /* Set snooping and source buffer address */
-        desc->saddr = 0x00000004
-                | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot];
-
-        /* Increment enqueue pointer */
-        omr = in_be32(&priv->msg_regs->omr);
-        out_be32(&priv->msg_regs->omr, omr | RIO_MSG_OMR_MUI);
-
-        /* Go to next descriptor */
-        if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size)
-                priv->msg_tx_ring.tx_slot = 0;
-
-      out:
-        return ret;
-}
-
-/**
- * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler
- * @irq: Linux interrupt number
- * @dev_instance: Pointer to interrupt-specific data
- *
- * Handles outbound message interrupts. Executes a register outbound
- * mailbox event handler and acks the interrupt occurrence.
- */
-static irqreturn_t
-fsl_rio_tx_handler(int irq, void *dev_instance)
-{
-        int osr;
-        struct rio_mport *port = (struct rio_mport *)dev_instance;
-        struct rio_priv *priv = port->priv;
-
-        osr = in_be32(&priv->msg_regs->osr);
-
-        if (osr & RIO_MSG_OSR_TE) {
-                pr_info("RIO: outbound message transmission error\n");
-                out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE);
-                goto out;
-        }
-
-        if (osr & RIO_MSG_OSR_QOI) {
-                pr_info("RIO: outbound message queue overflow\n");
-                out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI);
-                goto out;
-        }
-
-        if (osr & RIO_MSG_OSR_EOMI) {
-                u32 dqp = in_be32(&priv->msg_regs->odqdpar);
-                int slot = (dqp - priv->msg_tx_ring.phys) >> 5;
-                port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1,
-                                slot);
-
-                /* Ack the end-of-message interrupt */
-                out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI);
-        }
-
-      out:
-        return IRQ_HANDLED;
-}
-
-/**
- * fsl_open_outb_mbox - Initialize MPC85xx outbound mailbox
- * @mport: Master port implementing the outbound message unit
- * @dev_id: Device specific pointer to pass on event
- * @mbox: Mailbox to open
- * @entries: Number of entries in the outbound mailbox ring
- *
- * Initializes buffer ring, request the outbound message interrupt,
- * and enables the outbound message unit. Returns %0 on success and
- * %-EINVAL or %-ENOMEM on failure.
- */
-static int
-fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
-{
-        int i, j, rc = 0;
-        struct rio_priv *priv = mport->priv;
-
-        if ((entries < RIO_MIN_TX_RING_SIZE) ||
-            (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
-                rc = -EINVAL;
-                goto out;
-        }
-
-        /* Initialize shadow copy ring */
-        priv->msg_tx_ring.dev_id = dev_id;
-        priv->msg_tx_ring.size = entries;
-
-        for (i = 0; i < priv->msg_tx_ring.size; i++) {
-                priv->msg_tx_ring.virt_buffer[i] =
-                        dma_alloc_coherent(priv->dev, RIO_MSG_BUFFER_SIZE,
-                                &priv->msg_tx_ring.phys_buffer[i], GFP_KERNEL);
-                if (!priv->msg_tx_ring.virt_buffer[i]) {
-                        rc = -ENOMEM;
-                        for (j = 0; j < priv->msg_tx_ring.size; j++)
-                                if (priv->msg_tx_ring.virt_buffer[j])
-                                        dma_free_coherent(priv->dev,
-                                                        RIO_MSG_BUFFER_SIZE,
-                                                        priv->msg_tx_ring.
-                                                        virt_buffer[j],
-                                                        priv->msg_tx_ring.
-                                                        phys_buffer[j]);
-                        goto out;
-                }
-        }
-
-        /* Initialize outbound message descriptor ring */
-        priv->msg_tx_ring.virt = dma_alloc_coherent(priv->dev,
-                                priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
-                                &priv->msg_tx_ring.phys, GFP_KERNEL);
-        if (!priv->msg_tx_ring.virt) {
-                rc = -ENOMEM;
-                goto out_dma;
-        }
-        memset(priv->msg_tx_ring.virt, 0,
-                        priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE);
-        priv->msg_tx_ring.tx_slot = 0;
-
-        /* Point dequeue/enqueue pointers at first entry in ring */
-        out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys);
-        out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys);
-
-        /* Configure for snooping */
-        out_be32(&priv->msg_regs->osar, 0x00000004);
-
-        /* Clear interrupt status */
-        out_be32(&priv->msg_regs->osr, 0x000000b3);
-
-        /* Hook up outbound message handler */
-        rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0,
-                         "msg_tx", (void *)mport);
-        if (rc < 0)
-                goto out_irq;
-
-        /*
-         * Configure outbound message unit
-         *      Snooping
-         *      Interrupts (all enabled, except QEIE)
-         *      Chaining mode
-         *      Disable
-         */
-        out_be32(&priv->msg_regs->omr, 0x00100220);
-
-        /* Set number of entries */
-        out_be32(&priv->msg_regs->omr,
-                 in_be32(&priv->msg_regs->omr) |
-                 ((get_bitmask_order(entries) - 2) << 12));
-
-        /* Now enable the unit */
-        out_be32(&priv->msg_regs->omr, in_be32(&priv->msg_regs->omr) | 0x1);
-
-      out:
-        return rc;
-
-      out_irq:
-        dma_free_coherent(priv->dev,
-                          priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
-                          priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
-
-      out_dma:
-        for (i = 0; i < priv->msg_tx_ring.size; i++)
-                dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE,
-                                  priv->msg_tx_ring.virt_buffer[i],
-                                  priv->msg_tx_ring.phys_buffer[i]);
-
-        return rc;
-}
-
-/**
- * fsl_close_outb_mbox - Shut down MPC85xx outbound mailbox
- * @mport: Master port implementing the outbound message unit
- * @mbox: Mailbox to close
- *
- * Disables the outbound message unit, free all buffers, and
- * frees the outbound message interrupt.
- */
-static void fsl_close_outb_mbox(struct rio_mport *mport, int mbox)
-{
-        struct rio_priv *priv = mport->priv;
-        /* Disable inbound message unit */
-        out_be32(&priv->msg_regs->omr, 0);
-
-        /* Free ring */
-        dma_free_coherent(priv->dev,
-                          priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
-                          priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
-
-        /* Free interrupt */
-        free_irq(IRQ_RIO_TX(mport), (void *)mport);
-}
-
-/**
- * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler
- * @irq: Linux interrupt number
- * @dev_instance: Pointer to interrupt-specific data
- *
- * Handles inbound message interrupts. Executes a registered inbound
- * mailbox event handler and acks the interrupt occurrence.
- */
-static irqreturn_t
-fsl_rio_rx_handler(int irq, void *dev_instance)
-{
-        int isr;
-        struct rio_mport *port = (struct rio_mport *)dev_instance;
-        struct rio_priv *priv = port->priv;
-
-        isr = in_be32(&priv->msg_regs->isr);
-
-        if (isr & RIO_MSG_ISR_TE) {
-                pr_info("RIO: inbound message reception error\n");
-                out_be32((void *)&priv->msg_regs->isr, RIO_MSG_ISR_TE);
-                goto out;
-        }
-
-        /* XXX Need to check/dispatch until queue empty */
-        if (isr & RIO_MSG_ISR_DIQI) {
-                /*
-                 * We implement *only* mailbox 0, but can receive messages
-                 * for any mailbox/letter to that mailbox destination. So,
-                 * make the callback with an unknown/invalid mailbox number
-                 * argument.
-                 */
-                port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1);
-
-                /* Ack the queueing interrupt */
-                out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI);
-        }
-
-      out:
-        return IRQ_HANDLED;
-}
-
-/**
- * fsl_open_inb_mbox - Initialize MPC85xx inbound mailbox
- * @mport: Master port implementing the inbound message unit
- * @dev_id: Device specific pointer to pass on event
- * @mbox: Mailbox to open
- * @entries: Number of entries in the inbound mailbox ring
- *
- * Initializes buffer ring, request the inbound message interrupt,
- * and enables the inbound message unit. Returns %0 on success
- * and %-EINVAL or %-ENOMEM on failure.
- */
-static int
-fsl_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
-{
-        int i, rc = 0;
-        struct rio_priv *priv = mport->priv;
-
-        if ((entries < RIO_MIN_RX_RING_SIZE) ||
-            (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
-                rc = -EINVAL;
-                goto out;
-        }
-
-        /* Initialize client buffer ring */
-        priv->msg_rx_ring.dev_id = dev_id;
-        priv->msg_rx_ring.size = entries;
-        priv->msg_rx_ring.rx_slot = 0;
-        for (i = 0; i < priv->msg_rx_ring.size; i++)
-                priv->msg_rx_ring.virt_buffer[i] = NULL;
-
-        /* Initialize inbound message ring */
-        priv->msg_rx_ring.virt = dma_alloc_coherent(priv->dev,
-                                priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
-                                &priv->msg_rx_ring.phys, GFP_KERNEL);
-        if (!priv->msg_rx_ring.virt) {
-                rc = -ENOMEM;
-                goto out;
-        }
-
-        /* Point dequeue/enqueue pointers at first entry in ring */
-        out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys);
-        out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys);
-
-        /* Clear interrupt status */
-        out_be32(&priv->msg_regs->isr, 0x00000091);
-
-        /* Hook up inbound message handler */
-        rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0,
-                         "msg_rx", (void *)mport);
-        if (rc < 0) {
-                dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE,
-                                  priv->msg_tx_ring.virt_buffer[i],
-                                  priv->msg_tx_ring.phys_buffer[i]);
-                goto out;
-        }
-
-        /*
-         * Configure inbound message unit:
-         *      Snooping
-         *      4KB max message size
-         *      Unmask all interrupt sources
-         *      Disable
-         */
-        out_be32(&priv->msg_regs->imr, 0x001b0060);
-
-        /* Set number of queue entries */
-        setbits32(&priv->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12);
-
-        /* Now enable the unit */
-        setbits32(&priv->msg_regs->imr, 0x1);
-
-      out:
-        return rc;
-}
-
-/**
- * fsl_close_inb_mbox - Shut down MPC85xx inbound mailbox
- * @mport: Master port implementing the inbound message unit
- * @mbox: Mailbox to close
- *
- * Disables the inbound message unit, free all buffers, and
- * frees the inbound message interrupt.
- */
-static void fsl_close_inb_mbox(struct rio_mport *mport, int mbox)
-{
-        struct rio_priv *priv = mport->priv;
-        /* Disable inbound message unit */
-        out_be32(&priv->msg_regs->imr, 0);
-
-        /* Free ring */
-        dma_free_coherent(priv->dev, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
-                          priv->msg_rx_ring.virt, priv->msg_rx_ring.phys);
-
-        /* Free interrupt */
-        free_irq(IRQ_RIO_RX(mport), (void *)mport);
-}
-
-/**
- * fsl_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
- * @mport: Master port implementing the inbound message unit
- * @mbox: Inbound mailbox number
- * @buf: Buffer to add to inbound queue
- *
- * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
- * %0 on success or %-EINVAL on failure.
- */
-static int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
-{
-        int rc = 0;
-        struct rio_priv *priv = mport->priv;
-
-        pr_debug("RIO: fsl_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
-                 priv->msg_rx_ring.rx_slot);
-
-        if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) {
-                printk(KERN_ERR
-                       "RIO: error adding inbound buffer %d, buffer exists\n",
-                       priv->msg_rx_ring.rx_slot);
-                rc = -EINVAL;
-                goto out;
-        }
-
-        priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf;
-        if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size)
-                priv->msg_rx_ring.rx_slot = 0;
-
-      out:
-        return rc;
-}
-
-/**
- * fsl_get_inb_message - Fetch inbound message from the MPC85xx message unit
- * @mport: Master port implementing the inbound message unit
- * @mbox: Inbound mailbox number
- *
- * Gets the next available inbound message from the inbound message queue.
- * A pointer to the message is returned on success or NULL on failure.
- */
-static void *fsl_get_inb_message(struct rio_mport *mport, int mbox)
-{
-        struct rio_priv *priv = mport->priv;
-        u32 phys_buf, virt_buf;
-        void *buf = NULL;
-        int buf_idx;
-
-        phys_buf = in_be32(&priv->msg_regs->ifqdpar);
-
-        /* If no more messages, then bail out */
-        if (phys_buf == in_be32(&priv->msg_regs->ifqepar))
-                goto out2;
-
-        virt_buf = (u32) priv->msg_rx_ring.virt + (phys_buf
-                                                - priv->msg_rx_ring.phys);
-        buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
-        buf = priv->msg_rx_ring.virt_buffer[buf_idx];
-
-        if (!buf) {
-                printk(KERN_ERR
-                       "RIO: inbound message copy failed, no buffers\n");
-                goto out1;
-        }
-
-        /* Copy max message size, caller is expected to allocate that big */
-        memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
-
-        /* Clear the available buffer */
-        priv->msg_rx_ring.virt_buffer[buf_idx] = NULL;
-
-      out1:
-        setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI);
-
-      out2:
-        return buf;
-}
-
-/**
- * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler
- * @irq: Linux interrupt number
- * @dev_instance: Pointer to interrupt-specific data
- *
- * Handles doorbell interrupts. Parses a list of registered
- * doorbell event handlers and executes a matching event handler.
- */
-static irqreturn_t
-fsl_rio_dbell_handler(int irq, void *dev_instance)
-{
-        int dsr;
-        struct rio_mport *port = (struct rio_mport *)dev_instance;
-        struct rio_priv *priv = port->priv;
-
-        dsr = in_be32(&priv->msg_regs->dsr);
-
-        if (dsr & DOORBELL_DSR_TE) {
-                pr_info("RIO: doorbell reception error\n");
-                out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE);
-                goto out;
-        }
-
-        if (dsr & DOORBELL_DSR_QFI) {
-                pr_info("RIO: doorbell queue full\n");
-                out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI);
-        }
-
-        /* XXX Need to check/dispatch until queue empty */
-        if (dsr & DOORBELL_DSR_DIQI) {
-                u32 dmsg =
-                    (u32) priv->dbell_ring.virt +
-                    (in_be32(&priv->msg_regs->dqdpar) & 0xfff);
-                struct rio_dbell *dbell;
-                int found = 0;
-
-                pr_debug
-                    ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
-                     DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
-
-                list_for_each_entry(dbell, &port->dbells, node) {
-                        if ((dbell->res->start <= DBELL_INF(dmsg)) &&
-                            (dbell->res->end >= DBELL_INF(dmsg))) {
-                                found = 1;
-                                break;
-                        }
-                }
-                if (found) {
-                        dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
-                                    DBELL_INF(dmsg));
-                } else {
-                        pr_debug
-                            ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
-                             DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
-                }
-                setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI);
-                out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI);
-        }
-
-      out:
-        return IRQ_HANDLED;
-}
-
-/**
- * fsl_rio_doorbell_init - MPC85xx doorbell interface init
- * @mport: Master port implementing the inbound doorbell unit
- *
- * Initializes doorbell unit hardware and inbound DMA buffer
- * ring. Called from fsl_rio_setup(). Returns %0 on success
- * or %-ENOMEM on failure.
- */
-static int fsl_rio_doorbell_init(struct rio_mport *mport)
-{
-        struct rio_priv *priv = mport->priv;
-        int rc = 0;
-
-        /* Map outbound doorbell window immediately after maintenance window */
-        priv->dbell_win = ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
-                            RIO_DBELL_WIN_SIZE);
-        if (!priv->dbell_win) {
-                printk(KERN_ERR
-                       "RIO: unable to map outbound doorbell window\n");
-                rc = -ENOMEM;
-                goto out;
-        }
-
-        /* Initialize inbound doorbells */
-        priv->dbell_ring.virt = dma_alloc_coherent(priv->dev, 512 *
-                    DOORBELL_MESSAGE_SIZE, &priv->dbell_ring.phys, GFP_KERNEL);
-        if (!priv->dbell_ring.virt) {
-                printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
-                rc = -ENOMEM;
-                iounmap(priv->dbell_win);
-                goto out;
-        }
-
-        /* Point dequeue/enqueue pointers at first entry in ring */
-        out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys);
-        out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys);
-
-        /* Clear interrupt status */
-        out_be32(&priv->msg_regs->dsr, 0x00000091);
-
-        /* Hook up doorbell handler */
-        rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0,
-                         "dbell_rx", (void *)mport);
-        if (rc < 0) {
-                iounmap(priv->dbell_win);
-                dma_free_coherent(priv->dev, 512 * DOORBELL_MESSAGE_SIZE,
-                                  priv->dbell_ring.virt, priv->dbell_ring.phys);
-                printk(KERN_ERR
-                       "MPC85xx RIO: unable to request inbound doorbell irq");
-                goto out;
-        }
-
-        /* Configure doorbells for snooping, 512 entries, and enable */
-        out_be32(&priv->msg_regs->dmr, 0x00108161);
-
-      out:
-        return rc;
-}
-
-static void port_error_handler(struct rio_mport *port, int offset)
+void fsl_rio_port_error_handler(int offset)
 {
         /*XXX: Error recovery is not implemented, we just clear errors */
         out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
@@ -1098,263 +279,6 @@ static void port_error_handler(struct rio_mport *port, int offset)
                 out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
         }
 }
-
-static void msg_unit_error_handler(struct rio_mport *port)
-{
-        struct rio_priv *priv = port->priv;
-
-        /*XXX: Error recovery is not implemented, we just clear errors */
-        out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
-
-        out_be32((u32 *)(rio_regs_win + RIO_IM0SR), IMSR_CLEAR);
-        out_be32((u32 *)(rio_regs_win + RIO_IM1SR), IMSR_CLEAR);
-        out_be32((u32 *)(rio_regs_win + RIO_OM0SR), OMSR_CLEAR);
-        out_be32((u32 *)(rio_regs_win + RIO_OM1SR), OMSR_CLEAR);
-
-        out_be32(&priv->msg_regs->odsr, ODSR_CLEAR);
-        out_be32(&priv->msg_regs->dsr, IDSR_CLEAR);
-
-        out_be32(&priv->msg_regs->pwsr, IPWSR_CLEAR);
-}
-
-/**
- * fsl_rio_port_write_handler - MPC85xx port write interrupt handler
- * @irq: Linux interrupt number
- * @dev_instance: Pointer to interrupt-specific data
- *
- * Handles port write interrupts. Parses a list of registered
- * port write event handlers and executes a matching event handler.
- */
-static irqreturn_t
-fsl_rio_port_write_handler(int irq, void *dev_instance)
-{
-        u32 ipwmr, ipwsr;
-        struct rio_mport *port = (struct rio_mport *)dev_instance;
-        struct rio_priv *priv = port->priv;
-        u32 epwisr, tmp;
-
-        epwisr = in_be32(priv->regs_win + RIO_EPWISR);
-        if (!(epwisr & RIO_EPWISR_PW))
-                goto pw_done;
-
-        ipwmr = in_be32(&priv->msg_regs->pwmr);
-        ipwsr = in_be32(&priv->msg_regs->pwsr);
-
-#ifdef DEBUG_PW
-        pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr);
-        if (ipwsr & RIO_IPWSR_QF)
-                pr_debug(" QF");
-        if (ipwsr & RIO_IPWSR_TE)
-                pr_debug(" TE");
-        if (ipwsr & RIO_IPWSR_QFI)
-                pr_debug(" QFI");
-        if (ipwsr & RIO_IPWSR_PWD)
-                pr_debug(" PWD");
-        if (ipwsr & RIO_IPWSR_PWB)
-                pr_debug(" PWB");
-        pr_debug(" )\n");
-#endif
-        /* Schedule deferred processing if PW was received */
-        if (ipwsr & RIO_IPWSR_QFI) {
-                /* Save PW message (if there is room in FIFO),
-                 * otherwise discard it.
-                 */
-                if (kfifo_avail(&priv->pw_fifo) >= RIO_PW_MSG_SIZE) {
-                        priv->port_write_msg.msg_count++;
-                        kfifo_in(&priv->pw_fifo, priv->port_write_msg.virt,
-                                 RIO_PW_MSG_SIZE);
-                } else {
-                        priv->port_write_msg.discard_count++;
-                        pr_debug("RIO: ISR Discarded Port-Write Msg(s) (%d)\n",
-                                 priv->port_write_msg.discard_count);
-                }
-                /* Clear interrupt and issue Clear Queue command. This allows
-                 * another port-write to be received.
-                 */
-                out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_QFI);
-                out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ);
-
-                schedule_work(&priv->pw_work);
-        }
-
-        if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) {
-                priv->port_write_msg.err_count++;
-                pr_debug("RIO: Port-Write Transaction Err (%d)\n",
-                         priv->port_write_msg.err_count);
-                /* Clear Transaction Error: port-write controller should be
-                 * disabled when clearing this error
-                 */
-                out_be32(&priv->msg_regs->pwmr, ipwmr & ~RIO_IPWMR_PWE);
-                out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_TE);
-                out_be32(&priv->msg_regs->pwmr, ipwmr);
-        }
-
-        if (ipwsr & RIO_IPWSR_PWD) {
-                priv->port_write_msg.discard_count++;
-                pr_debug("RIO: Port Discarded Port-Write Msg(s) (%d)\n",
-                         priv->port_write_msg.discard_count);
-                out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_PWD);
-        }
-
-pw_done:
-        if (epwisr & RIO_EPWISR_PINT1) {
-                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
-                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
-                port_error_handler(port, 0);
-        }
-
-        if (epwisr & RIO_EPWISR_PINT2) {
-                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
-                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
-                port_error_handler(port, 1);
-        }
-
-        if (epwisr & RIO_EPWISR_MU) {
-                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
-                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
-                msg_unit_error_handler(port);
-        }
-
-        return IRQ_HANDLED;
-}
-
-static void fsl_pw_dpc(struct work_struct *work)
-{
-        struct rio_priv *priv = container_of(work, struct rio_priv, pw_work);
-        unsigned long flags;
-        u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)];
-
-        /*
-         * Process port-write messages
-         */
-        spin_lock_irqsave(&priv->pw_fifo_lock, flags);
-        while (kfifo_out(&priv->pw_fifo, (unsigned char *)msg_buffer,
-                         RIO_PW_MSG_SIZE)) {
-                /* Process one message */
-                spin_unlock_irqrestore(&priv->pw_fifo_lock, flags);
-#ifdef DEBUG_PW
-                {
-                u32 i;
-                pr_debug("%s : Port-Write Message:", __func__);
-                for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) {
-                        if ((i%4) == 0)
-                                pr_debug("\n0x%02x: 0x%08x", i*4,
-                                         msg_buffer[i]);
-                        else
-                                pr_debug(" 0x%08x", msg_buffer[i]);
-                }
-                pr_debug("\n");
-                }
-#endif
-                /* Pass the port-write message to RIO core for processing */
-                rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer);
-                spin_lock_irqsave(&priv->pw_fifo_lock, flags);
-        }
-        spin_unlock_irqrestore(&priv->pw_fifo_lock, flags);
-}
-
-/**
- * fsl_rio_pw_enable - enable/disable port-write interface init
- * @mport: Master port implementing the port write unit
- * @enable:    1=enable; 0=disable port-write message handling
- */
-static int fsl_rio_pw_enable(struct rio_mport *mport, int enable)
-{
-        struct rio_priv *priv = mport->priv;
-        u32 rval;
-
-        rval = in_be32(&priv->msg_regs->pwmr);
-
-        if (enable)
-                rval |= RIO_IPWMR_PWE;
-        else
-                rval &= ~RIO_IPWMR_PWE;
-
-        out_be32(&priv->msg_regs->pwmr, rval);
-
-        return 0;
-}
-
-/**
- * fsl_rio_port_write_init - MPC85xx port write interface init
- * @mport: Master port implementing the port write unit
- *
- * Initializes port write unit hardware and DMA buffer
- * ring. Called from fsl_rio_setup(). Returns %0 on success
- * or %-ENOMEM on failure.
- */
-static int fsl_rio_port_write_init(struct rio_mport *mport)
-{
-        struct rio_priv *priv = mport->priv;
-        int rc = 0;
-
-        /* Following configurations require a disabled port write controller */
-        out_be32(&priv->msg_regs->pwmr,
-                 in_be32(&priv->msg_regs->pwmr) & ~RIO_IPWMR_PWE);
-
-        /* Initialize port write */
-        priv->port_write_msg.virt = dma_alloc_coherent(priv->dev,
-                                        RIO_PW_MSG_SIZE,
-                                        &priv->port_write_msg.phys, GFP_KERNEL);
-        if (!priv->port_write_msg.virt) {
-                pr_err("RIO: unable allocate port write queue\n");
-                return -ENOMEM;
-        }
-
-        priv->port_write_msg.err_count = 0;
-        priv->port_write_msg.discard_count = 0;
-
-        /* Point dequeue/enqueue pointers at first entry */
-        out_be32(&priv->msg_regs->epwqbar, 0);
-        out_be32(&priv->msg_regs->pwqbar, (u32) priv->port_write_msg.phys);
-
-        pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n",
-                 in_be32(&priv->msg_regs->epwqbar),
-                 in_be32(&priv->msg_regs->pwqbar));
-
-        /* Clear interrupt status IPWSR */
-        out_be32(&priv->msg_regs->pwsr,
-                 (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD));
-
-        /* Configure port write contoller for snooping enable all reporting,
-           clear queue full */
-        out_be32(&priv->msg_regs->pwmr,
-                 RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ);
-
-
-        /* Hook up port-write handler */
-        rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler,
-                        IRQF_SHARED, "port-write", (void *)mport);
-        if (rc < 0) {
-                pr_err("MPC85xx RIO: unable to request inbound doorbell irq");
-                goto err_out;
-        }
-        /* Enable Error Interrupt */
-        out_be32((u32 *)(rio_regs_win + RIO_LTLEECSR), LTLEECSR_ENABLE_ALL);
-
-        INIT_WORK(&priv->pw_work, fsl_pw_dpc);
-        spin_lock_init(&priv->pw_fifo_lock);
-        if (kfifo_alloc(&priv->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) {
-                pr_err("FIFO allocation failed\n");
-                rc = -ENOMEM;
-                goto err_out_irq;
-        }
-
-        pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n",
-                 in_be32(&priv->msg_regs->pwmr),
-                 in_be32(&priv->msg_regs->pwsr));
-
-        return rc;
-
-err_out_irq:
-        free_irq(IRQ_RIO_PW(mport), (void *)mport);
-err_out:
-        dma_free_coherent(priv->dev, RIO_PW_MSG_SIZE,
-                          priv->port_write_msg.virt,
-                          priv->port_write_msg.phys);
-        return rc;
-}
-
 static inline void fsl_rio_info(struct device *dev, u32 ccsr)
 {
         const char *str;
@@ -1411,16 +335,21 @@ int fsl_rio_setup(struct platform_device *dev)
         struct rio_mport *port;
         struct rio_priv *priv;
         int rc = 0;
-        const u32 *dt_range, *cell;
-        struct resource regs;
+        const u32 *dt_range, *cell, *port_index;
+        u32 active_ports = 0;
+        struct resource regs, rmu_regs;
+        struct device_node *np, *rmu_node;
         int rlen;
         u32 ccsr;
-        u64 law_start, law_size;
+        u64 range_start, range_size;
         int paw, aw, sw;
+        u32 i;
+        static int tmp;
+        struct device_node *rmu_np[MAX_MSG_UNIT_NUM] = {NULL};
 
         if (!dev->dev.of_node) {
                 dev_err(&dev->dev, "Device OF-Node is NULL");
-                return -EFAULT;
+                return -ENODEV;
         }
 
         rc = of_address_to_resource(dev->dev.of_node, 0, &regs);
@@ -1429,37 +358,17 @@ int fsl_rio_setup(struct platform_device *dev)
                                 dev->dev.of_node->full_name);
                 return -EFAULT;
         }
-        dev_info(&dev->dev, "Of-device full name %s\n", dev->dev.of_node->full_name);
+        dev_info(&dev->dev, "Of-device full name %s\n",
+                        dev->dev.of_node->full_name);
         dev_info(&dev->dev, "Regs: %pR\n", &regs);
 
-        dt_range = of_get_property(dev->dev.of_node, "ranges", &rlen);
-        if (!dt_range) {
-                dev_err(&dev->dev, "Can't get %s property 'ranges'\n",
-                                dev->dev.of_node->full_name);
-                return -EFAULT;
+        rio_regs_win = ioremap(regs.start, resource_size(&regs));
+        if (!rio_regs_win) {
+                dev_err(&dev->dev, "Unable to map rio register window\n");
+                rc = -ENOMEM;
+                goto err_rio_regs;
         }
 
-        /* Get node address wide */
-        cell = of_get_property(dev->dev.of_node, "#address-cells", NULL);
-        if (cell)
-                aw = *cell;
-        else
-                aw = of_n_addr_cells(dev->dev.of_node);
-        /* Get node size wide */
-        cell = of_get_property(dev->dev.of_node, "#size-cells", NULL);
-        if (cell)
-                sw = *cell;
-        else
-                sw = of_n_size_cells(dev->dev.of_node);
-        /* Get parent address wide wide */
-        paw = of_n_addr_cells(dev->dev.of_node);
-
-        law_start = of_read_number(dt_range + aw, paw);
-        law_size = of_read_number(dt_range + aw + paw, sw);
-
-        dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n",
-                        law_start, law_size);
-
         ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL);
         if (!ops) {
                 rc = -ENOMEM;
@@ -1479,143 +388,257 @@ int fsl_rio_setup(struct platform_device *dev)
         ops->add_inb_buffer = fsl_add_inb_buffer;
         ops->get_inb_message = fsl_get_inb_message;
 
-        port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
-        if (!port) {
+        rmu_node = of_parse_phandle(dev->dev.of_node, "fsl,srio-rmu-handle", 0);
+        if (!rmu_node)
+                goto err_rmu;
+        rc = of_address_to_resource(rmu_node, 0, &rmu_regs);
+        if (rc) {
+                dev_err(&dev->dev, "Can't get %s property 'reg'\n",
+                                rmu_node->full_name);
+                goto err_rmu;
+        }
+        rmu_regs_win = ioremap(rmu_regs.start, resource_size(&rmu_regs));
+        if (!rmu_regs_win) {
+                dev_err(&dev->dev, "Unable to map rmu register window\n");
                 rc = -ENOMEM;
-                goto err_port;
+                goto err_rmu;
+        }
+        for_each_compatible_node(np, NULL, "fsl,srio-msg-unit") {
+                rmu_np[tmp] = np;
+                tmp++;
         }
-        port->index = 0;
 
-        priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
-        if (!priv) {
-                printk(KERN_ERR "Can't alloc memory for 'priv'\n");
+        /*set up doobell node*/
+        np = of_find_compatible_node(NULL, NULL, "fsl,srio-dbell-unit");
+        if (!np) {
+                rc = -ENODEV;
+                goto err_dbell;
+        }
+        dbell = kzalloc(sizeof(struct fsl_rio_dbell), GFP_KERNEL);
+        if (!(dbell)) {
+                dev_err(&dev->dev, "Can't alloc memory for 'fsl_rio_dbell'\n");
                 rc = -ENOMEM;
-                goto err_priv;
+                goto err_dbell;
         }
+        dbell->dev = &dev->dev;
+        dbell->bellirq = irq_of_parse_and_map(np, 1);
+        dev_info(&dev->dev, "bellirq: %d\n", dbell->bellirq);
 
-        INIT_LIST_HEAD(&port->dbells);
-        port->iores.start = law_start;
-        port->iores.end = law_start + law_size - 1;
-        port->iores.flags = IORESOURCE_MEM;
-        port->iores.name = "rio_io_win";
-
-        if (request_resource(&iomem_resource, &port->iores) < 0) {
-                dev_err(&dev->dev, "RIO: Error requesting master port region"
-                        " 0x%016llx-0x%016llx\n",
-                        (u64)port->iores.start, (u64)port->iores.end);
-                        rc = -ENOMEM;
-                        goto err_res;
+        aw = of_n_addr_cells(np);
+        dt_range = of_get_property(np, "reg", &rlen);
+        if (!dt_range) {
+                pr_err("%s: unable to find 'reg' property\n",
+                        np->full_name);
+                rc = -ENOMEM;
+                goto err_pw;
         }
+        range_start = of_read_number(dt_range, aw);
+        dbell->dbell_regs = (struct rio_dbell_regs *)(rmu_regs_win +
+                                (u32)range_start);
 
-        priv->pwirq   = irq_of_parse_and_map(dev->dev.of_node, 0);
-        priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2);
-        priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3);
-        priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4);
-        dev_info(&dev->dev, "pwirq: %d, bellirq: %d, txirq: %d, rxirq %d\n",
-                 priv->pwirq, priv->bellirq, priv->txirq, priv->rxirq);
-
-        rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
-        rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
-        rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
-        strcpy(port->name, "RIO0 mport");
-
-        priv->dev = &dev->dev;
-
-        port->ops = ops;
-        port->priv = priv;
-        port->phys_efptr = 0x100;
-
-        priv->regs_win = ioremap(regs.start, resource_size(&regs));
-        rio_regs_win = priv->regs_win;
-
-        /* Probe the master port phy type */
-        ccsr = in_be32(priv->regs_win + RIO_CCSR);
-        port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL;
-        dev_info(&dev->dev, "RapidIO PHY type: %s\n",
-                        (port->phy_type == RIO_PHY_PARALLEL) ? "parallel" :
-                        ((port->phy_type == RIO_PHY_SERIAL) ? "serial" :
-                         "unknown"));
-        /* Checking the port training status */
-        if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
-                dev_err(&dev->dev, "Port is not ready. "
-                                   "Try to restart connection...\n");
-                switch (port->phy_type) {
-                case RIO_PHY_SERIAL:
+        /*set up port write node*/
+        np = of_find_compatible_node(NULL, NULL, "fsl,srio-port-write-unit");
+        if (!np) {
+                rc = -ENODEV;
+                goto err_pw;
+        }
+        pw = kzalloc(sizeof(struct fsl_rio_pw), GFP_KERNEL);
+        if (!(pw)) {
+                dev_err(&dev->dev, "Can't alloc memory for 'fsl_rio_pw'\n");
+                rc = -ENOMEM;
+                goto err_pw;
+        }
+        pw->dev = &dev->dev;
+        pw->pwirq = irq_of_parse_and_map(np, 0);
+        dev_info(&dev->dev, "pwirq: %d\n", pw->pwirq);
+        aw = of_n_addr_cells(np);
+        dt_range = of_get_property(np, "reg", &rlen);
+        if (!dt_range) {
+                pr_err("%s: unable to find 'reg' property\n",
+                        np->full_name);
+                rc = -ENOMEM;
+                goto err;
+        }
+        range_start = of_read_number(dt_range, aw);
+        pw->pw_regs = (struct rio_pw_regs *)(rmu_regs_win + (u32)range_start);
+
+        /*set up ports node*/
+        for_each_child_of_node(dev->dev.of_node, np) {
+                port_index = of_get_property(np, "cell-index", NULL);
+                if (!port_index) {
+                        dev_err(&dev->dev, "Can't get %s property 'cell-index'\n",
+                                        np->full_name);
+                        continue;
+                }
+
+                dt_range = of_get_property(np, "ranges", &rlen);
+                if (!dt_range) {
+                        dev_err(&dev->dev, "Can't get %s property 'ranges'\n",
+                                        np->full_name);
+                        continue;
+                }
+
+                /* Get node address wide */
+                cell = of_get_property(np, "#address-cells", NULL);
+                if (cell)
+                        aw = *cell;
+                else
+                        aw = of_n_addr_cells(np);
+                /* Get node size wide */
+                cell = of_get_property(np, "#size-cells", NULL);
+                if (cell)
+                        sw = *cell;
+                else
+                        sw = of_n_size_cells(np);
+                /* Get parent address wide wide */
+                paw = of_n_addr_cells(np);
+                range_start = of_read_number(dt_range + aw, paw);
+                range_size = of_read_number(dt_range + aw + paw, sw);
+
+                dev_info(&dev->dev, "%s: LAW start 0x%016llx, size 0x%016llx.\n",
+                                np->full_name, range_start, range_size);
+
+                port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
+                if (!port)
+                        continue;
+
+                i = *port_index - 1;
+                port->index = (unsigned char)i;
+
+                priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
+                if (!priv) {
+                        dev_err(&dev->dev, "Can't alloc memory for 'priv'\n");
+                        kfree(port);
+                        continue;
+                }
+
+                INIT_LIST_HEAD(&port->dbells);
+                port->iores.start = range_start;
+                port->iores.end = port->iores.start + range_size - 1;
+                port->iores.flags = IORESOURCE_MEM;
+                port->iores.name = "rio_io_win";
+
+                if (request_resource(&iomem_resource, &port->iores) < 0) {
+                        dev_err(&dev->dev, "RIO: Error requesting master port region"
+                                " 0x%016llx-0x%016llx\n",
+                                (u64)port->iores.start, (u64)port->iores.end);
+                                kfree(priv);
+                                kfree(port);
+                                continue;
+                }
+                sprintf(port->name, "RIO mport %d", i);
+
+                priv->dev = &dev->dev;
+                port->ops = ops;
+                port->priv = priv;
+                port->phys_efptr = 0x100;
+                priv->regs_win = rio_regs_win;
+
+                /* Probe the master port phy type */
+                ccsr = in_be32(priv->regs_win + RIO_CCSR + i*0x20);
+                port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL;
+                if (port->phy_type == RIO_PHY_PARALLEL) {
+                        dev_err(&dev->dev, "RIO: Parallel PHY type, unsupported port type!\n");
+                        release_resource(&port->iores);
+                        kfree(priv);
+                        kfree(port);
+                        continue;
+                }
+                dev_info(&dev->dev, "RapidIO PHY type: Serial\n");
+                /* Checking the port training status */
+                if (in_be32((priv->regs_win + RIO_ESCSR + i*0x20)) & 1) {
+                        dev_err(&dev->dev, "Port %d is not ready. "
+                        "Try to restart connection...\n", i);
                         /* Disable ports */
-                        out_be32(priv->regs_win + RIO_CCSR, 0);
+                        out_be32(priv->regs_win
+                                + RIO_CCSR + i*0x20, 0);
                         /* Set 1x lane */
-                        setbits32(priv->regs_win + RIO_CCSR, 0x02000000);
+                        setbits32(priv->regs_win
+                                + RIO_CCSR + i*0x20, 0x02000000);
                         /* Enable ports */
-                        setbits32(priv->regs_win + RIO_CCSR, 0x00600000);
-                        break;
-                case RIO_PHY_PARALLEL:
-                        /* Disable ports */
-                        out_be32(priv->regs_win + RIO_CCSR, 0x22000000);
-                        /* Enable ports */
-                        out_be32(priv->regs_win + RIO_CCSR, 0x44000000);
-                        break;
-                }
-                msleep(100);
-                if (in_be32((priv->regs_win + RIO_ESCSR)) & 1) {
-                        dev_err(&dev->dev, "Port restart failed.\n");
-                        rc = -ENOLINK;
-                        goto err;
+                        setbits32(priv->regs_win
+                                + RIO_CCSR + i*0x20, 0x00600000);
+                        msleep(100);
+                        if (in_be32((priv->regs_win
+                                        + RIO_ESCSR + i*0x20)) & 1) {
+                                dev_err(&dev->dev,
+                                        "Port %d restart failed.\n", i);
+                                release_resource(&port->iores);
+                                kfree(priv);
+                                kfree(port);
+                                continue;
+                        }
+                        dev_info(&dev->dev, "Port %d restart success!\n", i);
                 }
-                dev_info(&dev->dev, "Port restart success!\n");
-        }
-        fsl_rio_info(&dev->dev, ccsr);
+                fsl_rio_info(&dev->dev, ccsr);
 
-        port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR))
+                port->sys_size = (in_be32((priv->regs_win + RIO_PEF_CAR))
                                         & RIO_PEF_CTLS) >> 4;
-        dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n",
-                        port->sys_size ? 65536 : 256);
+                dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n",
+                                port->sys_size ? 65536 : 256);
+
+                if (rio_register_mport(port)) {
+                        release_resource(&port->iores);
+                        kfree(priv);
+                        kfree(port);
+                        continue;
+                }
+                if (port->host_deviceid >= 0)
+                        out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST |
+                                RIO_PORT_GEN_MASTER | RIO_PORT_GEN_DISCOVERED);
+                else
+                        out_be32(priv->regs_win + RIO_GCCSR,
+                                RIO_PORT_GEN_MASTER);
+
+                priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win
+                        + ((i == 0) ? RIO_ATMU_REGS_PORT1_OFFSET :
+                        RIO_ATMU_REGS_PORT2_OFFSET));
 
-        if (rio_register_mport(port))
+                priv->maint_atmu_regs = priv->atmu_regs + 1;
+
+                /* Set to receive any dist ID for serial RapidIO controller. */
+                if (port->phy_type == RIO_PHY_SERIAL)
+                        out_be32((priv->regs_win
+                                + RIO_ISR_AACR + i*0x80), RIO_ISR_AACR_AA);
+
+                /* Configure maintenance transaction window */
+                out_be32(&priv->maint_atmu_regs->rowbar,
+                        port->iores.start >> 12);
+                out_be32(&priv->maint_atmu_regs->rowar,
+                         0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1));
+
+                priv->maint_win = ioremap(port->iores.start,
+                                RIO_MAINT_WIN_SIZE);
+
+                rio_law_start = range_start;
+
+                fsl_rio_setup_rmu(port, rmu_np[i]);
+
+                dbell->mport[i] = port;
+
+                active_ports++;
+        }
+
+        if (!active_ports) {
+                rc = -ENOLINK;
                 goto err;
+        }
 
-        if (port->host_deviceid >= 0)
-                out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST |
-                        RIO_PORT_GEN_MASTER | RIO_PORT_GEN_DISCOVERED);
-        else
-                out_be32(priv->regs_win + RIO_GCCSR, 0x00000000);
-
-        priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win
-                                        + RIO_ATMU_REGS_OFFSET);
-        priv->maint_atmu_regs = priv->atmu_regs + 1;
-        priv->dbell_atmu_regs = priv->atmu_regs + 2;
-        priv->msg_regs = (struct rio_msg_regs *)(priv->regs_win +
-                                ((port->phy_type == RIO_PHY_SERIAL) ?
-                                RIO_S_MSG_REGS_OFFSET : RIO_P_MSG_REGS_OFFSET));
-
-        /* Set to receive any dist ID for serial RapidIO controller. */
-        if (port->phy_type == RIO_PHY_SERIAL)
-                out_be32((priv->regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA);
-
-        /* Configure maintenance transaction window */
-        out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12);
-        out_be32(&priv->maint_atmu_regs->rowar,
-                 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1));
-
-        priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE);
-
-        /* Configure outbound doorbell window */
-        out_be32(&priv->dbell_atmu_regs->rowbar,
-                        (law_start + RIO_MAINT_WIN_SIZE) >> 12);
-        out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b);    /* 4k */
-        fsl_rio_doorbell_init(port);
-        fsl_rio_port_write_init(port);
+        fsl_rio_doorbell_init(dbell);
+        fsl_rio_port_write_init(pw);
 
         return 0;
 err:
-        iounmap(priv->regs_win);
-        release_resource(&port->iores);
-err_res:
-        kfree(priv);
-err_priv:
-        kfree(port);
-err_port:
+        kfree(pw);
+err_pw:
+        kfree(dbell);
+err_dbell:
+        iounmap(rmu_regs_win);
+err_rmu:
         kfree(ops);
 err_ops:
+        iounmap(rio_regs_win);
+err_rio_regs:
         return rc;
 }
 
@@ -1631,7 +654,7 @@ static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev)
 
 static const struct of_device_id fsl_of_rio_rpn_ids[] = {
         {
-                .compatible = "fsl,rapidio-delta",
+                .compatible = "fsl,srio",
         },
         {},
 };
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
new file mode 100644
index 000000000000..ae8e27405a0d
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -0,0 +1,135 @@
+/*
+ * Freescale MPC85xx/MPC86xx RapidIO support
+ *
+ * Copyright 2009 Sysgo AG
+ * Thomas Moll <thomas.moll@sysgo.com>
+ * - fixed maintenance access routines, check for aligned access
+ *
+ * Copyright 2009 Integrated Device Technology, Inc.
+ * Alex Bounine <alexandre.bounine@idt.com>
+ * - Added Port-Write message handling
+ * - Added Machine Check exception handling
+ *
+ * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
+ * Zhang Wei <wei.zhang@freescale.com>
+ * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
+ * Liu Gang <Gang.Liu@freescale.com>
+ *
+ * Copyright 2005 MontaVista Software, Inc.
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __FSL_RIO_H
+#define __FSL_RIO_H
+
+#include <linux/rio.h>
+#include <linux/rio_drv.h>
+#include <linux/kfifo.h>
+
+#define RIO_REGS_WIN(mport)     (((struct rio_priv *)(mport->priv))->regs_win)
+
+#define RIO_MAINT_WIN_SIZE      0x400000
+#define RIO_LTLEDCSR            0x0608
+
+#define DOORBELL_ROWAR_EN       0x80000000
+#define DOORBELL_ROWAR_TFLOWLV  0x08000000 /* highest priority level */
+#define DOORBELL_ROWAR_PCI      0x02000000 /* PCI window */
+#define DOORBELL_ROWAR_NREAD    0x00040000 /* NREAD */
+#define DOORBELL_ROWAR_MAINTRD  0x00070000  /* maintenance read */
+#define DOORBELL_ROWAR_RES      0x00002000 /* wrtpy: reserverd */
+#define DOORBELL_ROWAR_MAINTWD  0x00007000
+#define DOORBELL_ROWAR_SIZE     0x0000000b /* window size is 4k */
+
+#define RIO_ATMU_REGS_PORT1_OFFSET      0x10c00
+#define RIO_ATMU_REGS_PORT2_OFFSET      0x10e00
+#define RIO_S_DBELL_REGS_OFFSET 0x13400
+#define RIO_S_PW_REGS_OFFSET    0x134e0
+#define RIO_ATMU_REGS_DBELL_OFFSET      0x10C40
+
+#define MAX_MSG_UNIT_NUM        2
+#define MAX_PORT_NUM            4
+
+struct rio_atmu_regs {
+         u32 rowtar;
+         u32 rowtear;
+         u32 rowbar;
+         u32 pad1;
+         u32 rowar;
+         u32 pad2[3];
+};
+
+struct rio_dbell_ring {
+        void *virt;
+        dma_addr_t phys;
+};
+
+struct rio_port_write_msg {
+         void *virt;
+         dma_addr_t phys;
+         u32 msg_count;
+         u32 err_count;
+         u32 discard_count;
+};
+
+struct fsl_rio_dbell {
+        struct rio_mport *mport[MAX_PORT_NUM];
+        struct device *dev;
+        struct rio_dbell_regs __iomem *dbell_regs;
+        struct rio_dbell_ring dbell_ring;
+        int bellirq;
+};
+
+struct fsl_rio_pw {
+        struct device *dev;
+        struct rio_pw_regs __iomem *pw_regs;
+        struct rio_port_write_msg port_write_msg;
+        int pwirq;
+        struct work_struct pw_work;
+        struct kfifo pw_fifo;
+        spinlock_t pw_fifo_lock;
+};
+
+struct rio_priv {
+        struct device *dev;
+        void __iomem *regs_win;
+        struct rio_atmu_regs __iomem *atmu_regs;
+        struct rio_atmu_regs __iomem *maint_atmu_regs;
+        void __iomem *maint_win;
+        void *rmm_handle; /* RapidIO message manager(unit) Handle */
+};
+
+extern void __iomem *rio_regs_win;
+extern void __iomem *rmu_regs_win;
+
+extern resource_size_t rio_law_start;
+
+extern struct fsl_rio_dbell *dbell;
+extern struct fsl_rio_pw *pw;
+
+extern int fsl_rio_setup_rmu(struct rio_mport *mport,
+        struct device_node *node);
+extern int fsl_rio_port_write_init(struct fsl_rio_pw *pw);
+extern int fsl_rio_pw_enable(struct rio_mport *mport, int enable);
+extern void fsl_rio_port_error_handler(int offset);
+extern int fsl_rio_doorbell_init(struct fsl_rio_dbell *dbell);
+
+extern int fsl_rio_doorbell_send(struct rio_mport *mport,
+                                int index, u16 destid, u16 data);
+extern int fsl_add_outb_message(struct rio_mport *mport,
+        struct rio_dev *rdev,
+        int mbox, void *buffer, size_t len);
+extern int fsl_open_outb_mbox(struct rio_mport *mport,
+        void *dev_id, int mbox, int entries);
+extern void fsl_close_outb_mbox(struct rio_mport *mport, int mbox);
+extern int fsl_open_inb_mbox(struct rio_mport *mport,
+        void *dev_id, int mbox, int entries);
+extern void fsl_close_inb_mbox(struct rio_mport *mport, int mbox);
+extern int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf);
+extern void *fsl_get_inb_message(struct rio_mport *mport, int mbox);
+
+#endif
diff --git a/arch/powerpc/sysdev/fsl_rmu.c b/arch/powerpc/sysdev/fsl_rmu.c
new file mode 100644
index 000000000000..15485789e9db
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_rmu.c
@@ -0,0 +1,1104 @@
+/*
+ * Freescale MPC85xx/MPC86xx RapidIO RMU support
+ *
+ * Copyright 2009 Sysgo AG
+ * Thomas Moll <thomas.moll@sysgo.com>
+ * - fixed maintenance access routines, check for aligned access
+ *
+ * Copyright 2009 Integrated Device Technology, Inc.
+ * Alex Bounine <alexandre.bounine@idt.com>
+ * - Added Port-Write message handling
+ * - Added Machine Check exception handling
+ *
+ * Copyright (C) 2007, 2008, 2010, 2011 Freescale Semiconductor, Inc.
+ * Zhang Wei <wei.zhang@freescale.com>
+ * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
+ * Liu Gang <Gang.Liu@freescale.com>
+ *
+ * Copyright 2005 MontaVista Software, Inc.
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/types.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+
+#include "fsl_rio.h"
+
+#define GET_RMM_HANDLE(mport) \
+                (((struct rio_priv *)(mport->priv))->rmm_handle)
+
+/* RapidIO definition irq, which read from OF-tree */
+#define IRQ_RIO_PW(m)           (((struct fsl_rio_pw *)(m))->pwirq)
+#define IRQ_RIO_BELL(m) (((struct fsl_rio_dbell *)(m))->bellirq)
+#define IRQ_RIO_TX(m) (((struct fsl_rmu *)(GET_RMM_HANDLE(m)))->txirq)
+#define IRQ_RIO_RX(m) (((struct fsl_rmu *)(GET_RMM_HANDLE(m)))->rxirq)
+
+#define RIO_MIN_TX_RING_SIZE    2
+#define RIO_MAX_TX_RING_SIZE    2048
+#define RIO_MIN_RX_RING_SIZE    2
+#define RIO_MAX_RX_RING_SIZE    2048
+
+#define RIO_IPWMR_SEN           0x00100000
+#define RIO_IPWMR_QFIE          0x00000100
+#define RIO_IPWMR_EIE           0x00000020
+#define RIO_IPWMR_CQ            0x00000002
+#define RIO_IPWMR_PWE           0x00000001
+
+#define RIO_IPWSR_QF            0x00100000
+#define RIO_IPWSR_TE            0x00000080
+#define RIO_IPWSR_QFI           0x00000010
+#define RIO_IPWSR_PWD           0x00000008
+#define RIO_IPWSR_PWB           0x00000004
+
+#define RIO_EPWISR              0x10010
+/* EPWISR Error match value */
+#define RIO_EPWISR_PINT1        0x80000000
+#define RIO_EPWISR_PINT2        0x40000000
+#define RIO_EPWISR_MU           0x00000002
+#define RIO_EPWISR_PW           0x00000001
+
+#define IPWSR_CLEAR             0x98
+#define OMSR_CLEAR              0x1cb3
+#define IMSR_CLEAR              0x491
+#define IDSR_CLEAR              0x91
+#define ODSR_CLEAR              0x1c00
+#define LTLEECSR_ENABLE_ALL     0xFFC000FC
+#define RIO_LTLEECSR            0x060c
+
+#define RIO_IM0SR               0x64
+#define RIO_IM1SR               0x164
+#define RIO_OM0SR               0x4
+#define RIO_OM1SR               0x104
+
+#define RIO_DBELL_WIN_SIZE      0x1000
+
+#define RIO_MSG_OMR_MUI         0x00000002
+#define RIO_MSG_OSR_TE          0x00000080
+#define RIO_MSG_OSR_QOI         0x00000020
+#define RIO_MSG_OSR_QFI         0x00000010
+#define RIO_MSG_OSR_MUB         0x00000004
+#define RIO_MSG_OSR_EOMI        0x00000002
+#define RIO_MSG_OSR_QEI         0x00000001
+
+#define RIO_MSG_IMR_MI          0x00000002
+#define RIO_MSG_ISR_TE          0x00000080
+#define RIO_MSG_ISR_QFI         0x00000010
+#define RIO_MSG_ISR_DIQI        0x00000001
+
+#define RIO_MSG_DESC_SIZE       32
+#define RIO_MSG_BUFFER_SIZE     4096
+
+#define DOORBELL_DMR_DI         0x00000002
+#define DOORBELL_DSR_TE         0x00000080
+#define DOORBELL_DSR_QFI        0x00000010
+#define DOORBELL_DSR_DIQI       0x00000001
+#define DOORBELL_TID_OFFSET     0x02
+#define DOORBELL_SID_OFFSET     0x04
+#define DOORBELL_INFO_OFFSET    0x06
+
+#define DOORBELL_MESSAGE_SIZE   0x08
+#define DBELL_SID(x)            (*(u16 *)(x + DOORBELL_SID_OFFSET))
+#define DBELL_TID(x)            (*(u16 *)(x + DOORBELL_TID_OFFSET))
+#define DBELL_INF(x)            (*(u16 *)(x + DOORBELL_INFO_OFFSET))
+
+struct rio_msg_regs {
+        u32 omr;
+        u32 osr;
+        u32 pad1;
+        u32 odqdpar;
+        u32 pad2;
+        u32 osar;
+        u32 odpr;
+        u32 odatr;
+        u32 odcr;
+        u32 pad3;
+        u32 odqepar;
+        u32 pad4[13];
+        u32 imr;
+        u32 isr;
+        u32 pad5;
+        u32 ifqdpar;
+        u32 pad6;
+        u32 ifqepar;
+};
+
+struct rio_dbell_regs {
+        u32 odmr;
+        u32 odsr;
+        u32 pad1[4];
+        u32 oddpr;
+        u32 oddatr;
+        u32 pad2[3];
+        u32 odretcr;
+        u32 pad3[12];
+        u32 dmr;
+        u32 dsr;
+        u32 pad4;
+        u32 dqdpar;
+        u32 pad5;
+        u32 dqepar;
+};
+
+struct rio_pw_regs {
+        u32 pwmr;
+        u32 pwsr;
+        u32 epwqbar;
+        u32 pwqbar;
+};
+
+
+struct rio_tx_desc {
+        u32 pad1;
+        u32 saddr;
+        u32 dport;
+        u32 dattr;
+        u32 pad2;
+        u32 pad3;
+        u32 dwcnt;
+        u32 pad4;
+};
+
+struct rio_msg_tx_ring {
+        void *virt;
+        dma_addr_t phys;
+        void *virt_buffer[RIO_MAX_TX_RING_SIZE];
+        dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
+        int tx_slot;
+        int size;
+        void *dev_id;
+};
+
+struct rio_msg_rx_ring {
+        void *virt;
+        dma_addr_t phys;
+        void *virt_buffer[RIO_MAX_RX_RING_SIZE];
+        int rx_slot;
+        int size;
+        void *dev_id;
+};
+
+struct fsl_rmu {
+        struct rio_msg_regs __iomem *msg_regs;
+        struct rio_msg_tx_ring msg_tx_ring;
+        struct rio_msg_rx_ring msg_rx_ring;
+        int txirq;
+        int rxirq;
+};
+
+/**
+ * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles outbound message interrupts. Executes a register outbound
+ * mailbox event handler and acks the interrupt occurrence.
+ */
+static irqreturn_t
+fsl_rio_tx_handler(int irq, void *dev_instance)
+{
+        int osr;
+        struct rio_mport *port = (struct rio_mport *)dev_instance;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(port);
+
+        osr = in_be32(&rmu->msg_regs->osr);
+
+        if (osr & RIO_MSG_OSR_TE) {
+                pr_info("RIO: outbound message transmission error\n");
+                out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_TE);
+                goto out;
+        }
+
+        if (osr & RIO_MSG_OSR_QOI) {
+                pr_info("RIO: outbound message queue overflow\n");
+                out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_QOI);
+                goto out;
+        }
+
+        if (osr & RIO_MSG_OSR_EOMI) {
+                u32 dqp = in_be32(&rmu->msg_regs->odqdpar);
+                int slot = (dqp - rmu->msg_tx_ring.phys) >> 5;
+                if (port->outb_msg[0].mcback != NULL) {
+                        port->outb_msg[0].mcback(port, rmu->msg_tx_ring.dev_id,
+                                        -1,
+                                        slot);
+                }
+                /* Ack the end-of-message interrupt */
+                out_be32(&rmu->msg_regs->osr, RIO_MSG_OSR_EOMI);
+        }
+
+out:
+        return IRQ_HANDLED;
+}
+
+/**
+ * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles inbound message interrupts. Executes a registered inbound
+ * mailbox event handler and acks the interrupt occurrence.
+ */
+static irqreturn_t
+fsl_rio_rx_handler(int irq, void *dev_instance)
+{
+        int isr;
+        struct rio_mport *port = (struct rio_mport *)dev_instance;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(port);
+
+        isr = in_be32(&rmu->msg_regs->isr);
+
+        if (isr & RIO_MSG_ISR_TE) {
+                pr_info("RIO: inbound message reception error\n");
+                out_be32((void *)&rmu->msg_regs->isr, RIO_MSG_ISR_TE);
+                goto out;
+        }
+
+        /* XXX Need to check/dispatch until queue empty */
+        if (isr & RIO_MSG_ISR_DIQI) {
+                /*
+                * Can receive messages for any mailbox/letter to that
+                * mailbox destination. So, make the callback with an
+                * unknown/invalid mailbox number argument.
+                */
+                if (port->inb_msg[0].mcback != NULL)
+                        port->inb_msg[0].mcback(port, rmu->msg_rx_ring.dev_id,
+                                -1,
+                                -1);
+
+                /* Ack the queueing interrupt */
+                out_be32(&rmu->msg_regs->isr, RIO_MSG_ISR_DIQI);
+        }
+
+out:
+        return IRQ_HANDLED;
+}
+
+/**
+ * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles doorbell interrupts. Parses a list of registered
+ * doorbell event handlers and executes a matching event handler.
+ */
+static irqreturn_t
+fsl_rio_dbell_handler(int irq, void *dev_instance)
+{
+        int dsr;
+        struct fsl_rio_dbell *fsl_dbell = (struct fsl_rio_dbell *)dev_instance;
+        int i;
+
+        dsr = in_be32(&fsl_dbell->dbell_regs->dsr);
+
+        if (dsr & DOORBELL_DSR_TE) {
+                pr_info("RIO: doorbell reception error\n");
+                out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_TE);
+                goto out;
+        }
+
+        if (dsr & DOORBELL_DSR_QFI) {
+                pr_info("RIO: doorbell queue full\n");
+                out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_QFI);
+        }
+
+        /* XXX Need to check/dispatch until queue empty */
+        if (dsr & DOORBELL_DSR_DIQI) {
+                u32 dmsg =
+                        (u32) fsl_dbell->dbell_ring.virt +
+                        (in_be32(&fsl_dbell->dbell_regs->dqdpar) & 0xfff);
+                struct rio_dbell *dbell;
+                int found = 0;
+
+                pr_debug
+                        ("RIO: processing doorbell,"
+                        " sid %2.2x tid %2.2x info %4.4x\n",
+                        DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
+
+                for (i = 0; i < MAX_PORT_NUM; i++) {
+                        if (fsl_dbell->mport[i]) {
+                                list_for_each_entry(dbell,
+                                        &fsl_dbell->mport[i]->dbells, node) {
+                                        if ((dbell->res->start
+                                                <= DBELL_INF(dmsg))
+                                                && (dbell->res->end
+                                                >= DBELL_INF(dmsg))) {
+                                                found = 1;
+                                                break;
+                                        }
+                                }
+                                if (found && dbell->dinb) {
+                                        dbell->dinb(fsl_dbell->mport[i],
+                                                dbell->dev_id, DBELL_SID(dmsg),
+                                                DBELL_TID(dmsg),
+                                                DBELL_INF(dmsg));
+                                        break;
+                                }
+                        }
+                }
+
+                if (!found) {
+                        pr_debug
+                                ("RIO: spurious doorbell,"
+                                " sid %2.2x tid %2.2x info %4.4x\n",
+                                DBELL_SID(dmsg), DBELL_TID(dmsg),
+                                DBELL_INF(dmsg));
+                }
+                setbits32(&fsl_dbell->dbell_regs->dmr, DOORBELL_DMR_DI);
+                out_be32(&fsl_dbell->dbell_regs->dsr, DOORBELL_DSR_DIQI);
+        }
+
+out:
+        return IRQ_HANDLED;
+}
+
+void msg_unit_error_handler(void)
+{
+
+        /*XXX: Error recovery is not implemented, we just clear errors */
+        out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
+
+        out_be32((u32 *)(rmu_regs_win + RIO_IM0SR), IMSR_CLEAR);
+        out_be32((u32 *)(rmu_regs_win + RIO_IM1SR), IMSR_CLEAR);
+        out_be32((u32 *)(rmu_regs_win + RIO_OM0SR), OMSR_CLEAR);
+        out_be32((u32 *)(rmu_regs_win + RIO_OM1SR), OMSR_CLEAR);
+
+        out_be32(&dbell->dbell_regs->odsr, ODSR_CLEAR);
+        out_be32(&dbell->dbell_regs->dsr, IDSR_CLEAR);
+
+        out_be32(&pw->pw_regs->pwsr, IPWSR_CLEAR);
+}
+
+/**
+ * fsl_rio_port_write_handler - MPC85xx port write interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles port write interrupts. Parses a list of registered
+ * port write event handlers and executes a matching event handler.
+ */
+static irqreturn_t
+fsl_rio_port_write_handler(int irq, void *dev_instance)
+{
+        u32 ipwmr, ipwsr;
+        struct fsl_rio_pw *pw = (struct fsl_rio_pw *)dev_instance;
+        u32 epwisr, tmp;
+
+        epwisr = in_be32(rio_regs_win + RIO_EPWISR);
+        if (!(epwisr & RIO_EPWISR_PW))
+                goto pw_done;
+
+        ipwmr = in_be32(&pw->pw_regs->pwmr);
+        ipwsr = in_be32(&pw->pw_regs->pwsr);
+
+#ifdef DEBUG_PW
+        pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr);
+        if (ipwsr & RIO_IPWSR_QF)
+                pr_debug(" QF");
+        if (ipwsr & RIO_IPWSR_TE)
+                pr_debug(" TE");
+        if (ipwsr & RIO_IPWSR_QFI)
+                pr_debug(" QFI");
+        if (ipwsr & RIO_IPWSR_PWD)
+                pr_debug(" PWD");
+        if (ipwsr & RIO_IPWSR_PWB)
+                pr_debug(" PWB");
+        pr_debug(" )\n");
+#endif
+        /* Schedule deferred processing if PW was received */
+        if (ipwsr & RIO_IPWSR_QFI) {
+                /* Save PW message (if there is room in FIFO),
+                 * otherwise discard it.
+                 */
+                if (kfifo_avail(&pw->pw_fifo) >= RIO_PW_MSG_SIZE) {
+                        pw->port_write_msg.msg_count++;
+                        kfifo_in(&pw->pw_fifo, pw->port_write_msg.virt,
+                                 RIO_PW_MSG_SIZE);
+                } else {
+                        pw->port_write_msg.discard_count++;
+                        pr_debug("RIO: ISR Discarded Port-Write Msg(s) (%d)\n",
+                                 pw->port_write_msg.discard_count);
+                }
+                /* Clear interrupt and issue Clear Queue command. This allows
+                 * another port-write to be received.
+                 */
+                out_be32(&pw->pw_regs->pwsr,    RIO_IPWSR_QFI);
+                out_be32(&pw->pw_regs->pwmr, ipwmr | RIO_IPWMR_CQ);
+
+                schedule_work(&pw->pw_work);
+        }
+
+        if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) {
+                pw->port_write_msg.err_count++;
+                pr_debug("RIO: Port-Write Transaction Err (%d)\n",
+                         pw->port_write_msg.err_count);
+                /* Clear Transaction Error: port-write controller should be
+                 * disabled when clearing this error
+                 */
+                out_be32(&pw->pw_regs->pwmr, ipwmr & ~RIO_IPWMR_PWE);
+                out_be32(&pw->pw_regs->pwsr,    RIO_IPWSR_TE);
+                out_be32(&pw->pw_regs->pwmr, ipwmr);
+        }
+
+        if (ipwsr & RIO_IPWSR_PWD) {
+                pw->port_write_msg.discard_count++;
+                pr_debug("RIO: Port Discarded Port-Write Msg(s) (%d)\n",
+                         pw->port_write_msg.discard_count);
+                out_be32(&pw->pw_regs->pwsr, RIO_IPWSR_PWD);
+        }
+
+pw_done:
+        if (epwisr & RIO_EPWISR_PINT1) {
+                tmp = in_be32(rio_regs_win + RIO_LTLEDCSR);
+                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
+                fsl_rio_port_error_handler(0);
+        }
+
+        if (epwisr & RIO_EPWISR_PINT2) {
+                tmp = in_be32(rio_regs_win + RIO_LTLEDCSR);
+                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
+                fsl_rio_port_error_handler(1);
+        }
+
+        if (epwisr & RIO_EPWISR_MU) {
+                tmp = in_be32(rio_regs_win + RIO_LTLEDCSR);
+                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
+                msg_unit_error_handler();
+        }
+
+        return IRQ_HANDLED;
+}
+
+static void fsl_pw_dpc(struct work_struct *work)
+{
+        struct fsl_rio_pw *pw = container_of(work, struct fsl_rio_pw, pw_work);
+        u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)];
+
+        /*
+         * Process port-write messages
+         */
+        while (kfifo_out_spinlocked(&pw->pw_fifo, (unsigned char *)msg_buffer,
+                         RIO_PW_MSG_SIZE, &pw->pw_fifo_lock)) {
+                /* Process one message */
+#ifdef DEBUG_PW
+                {
+                u32 i;
+                pr_debug("%s : Port-Write Message:", __func__);
+                for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) {
+                        if ((i%4) == 0)
+                                pr_debug("\n0x%02x: 0x%08x", i*4,
+                                         msg_buffer[i]);
+                        else
+                                pr_debug(" 0x%08x", msg_buffer[i]);
+                }
+                pr_debug("\n");
+                }
+#endif
+                /* Pass the port-write message to RIO core for processing */
+                rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer);
+        }
+}
+
+/**
+ * fsl_rio_pw_enable - enable/disable port-write interface init
+ * @mport: Master port implementing the port write unit
+ * @enable:    1=enable; 0=disable port-write message handling
+ */
+int fsl_rio_pw_enable(struct rio_mport *mport, int enable)
+{
+        u32 rval;
+
+        rval = in_be32(&pw->pw_regs->pwmr);
+
+        if (enable)
+                rval |= RIO_IPWMR_PWE;
+        else
+                rval &= ~RIO_IPWMR_PWE;
+
+        out_be32(&pw->pw_regs->pwmr, rval);
+
+        return 0;
+}
+
+/**
+ * fsl_rio_port_write_init - MPC85xx port write interface init
+ * @mport: Master port implementing the port write unit
+ *
+ * Initializes port write unit hardware and DMA buffer
+ * ring. Called from fsl_rio_setup(). Returns %0 on success
+ * or %-ENOMEM on failure.
+ */
+
+int fsl_rio_port_write_init(struct fsl_rio_pw *pw)
+{
+        int rc = 0;
+
+        /* Following configurations require a disabled port write controller */
+        out_be32(&pw->pw_regs->pwmr,
+                 in_be32(&pw->pw_regs->pwmr) & ~RIO_IPWMR_PWE);
+
+        /* Initialize port write */
+        pw->port_write_msg.virt = dma_alloc_coherent(pw->dev,
+                                        RIO_PW_MSG_SIZE,
+                                        &pw->port_write_msg.phys, GFP_KERNEL);
+        if (!pw->port_write_msg.virt) {
+                pr_err("RIO: unable allocate port write queue\n");
+                return -ENOMEM;
+        }
+
+        pw->port_write_msg.err_count = 0;
+        pw->port_write_msg.discard_count = 0;
+
+        /* Point dequeue/enqueue pointers at first entry */
+        out_be32(&pw->pw_regs->epwqbar, 0);
+        out_be32(&pw->pw_regs->pwqbar, (u32) pw->port_write_msg.phys);
+
+        pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n",
+                 in_be32(&pw->pw_regs->epwqbar),
+                 in_be32(&pw->pw_regs->pwqbar));
+
+        /* Clear interrupt status IPWSR */
+        out_be32(&pw->pw_regs->pwsr,
+                 (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD));
+
+        /* Configure port write contoller for snooping enable all reporting,
+           clear queue full */
+        out_be32(&pw->pw_regs->pwmr,
+                 RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ);
+
+
+        /* Hook up port-write handler */
+        rc = request_irq(IRQ_RIO_PW(pw), fsl_rio_port_write_handler,
+                        IRQF_SHARED, "port-write", (void *)pw);
+        if (rc < 0) {
+                pr_err("MPC85xx RIO: unable to request inbound doorbell irq");
+                goto err_out;
+        }
+        /* Enable Error Interrupt */
+        out_be32((u32 *)(rio_regs_win + RIO_LTLEECSR), LTLEECSR_ENABLE_ALL);
+
+        INIT_WORK(&pw->pw_work, fsl_pw_dpc);
+        spin_lock_init(&pw->pw_fifo_lock);
+        if (kfifo_alloc(&pw->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) {
+                pr_err("FIFO allocation failed\n");
+                rc = -ENOMEM;
+                goto err_out_irq;
+        }
+
+        pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n",
+                 in_be32(&pw->pw_regs->pwmr),
+                 in_be32(&pw->pw_regs->pwsr));
+
+        return rc;
+
+err_out_irq:
+        free_irq(IRQ_RIO_PW(pw), (void *)pw);
+err_out:
+        dma_free_coherent(pw->dev, RIO_PW_MSG_SIZE,
+                pw->port_write_msg.virt,
+                pw->port_write_msg.phys);
+        return rc;
+}
+
+/**
+ * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
+ * @mport: RapidIO master port info
+ * @index: ID of RapidIO interface
+ * @destid: Destination ID of target device
+ * @data: 16-bit info field of RapidIO doorbell message
+ *
+ * Sends a MPC85xx doorbell message. Returns %0 on success or
+ * %-EINVAL on failure.
+ */
+int fsl_rio_doorbell_send(struct rio_mport *mport,
+                                int index, u16 destid, u16 data)
+{
+        pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n",
+                 index, destid, data);
+
+        /* In the serial version silicons, such as MPC8548, MPC8641,
+         * below operations is must be.
+         */
+        out_be32(&dbell->dbell_regs->odmr, 0x00000000);
+        out_be32(&dbell->dbell_regs->odretcr, 0x00000004);
+        out_be32(&dbell->dbell_regs->oddpr, destid << 16);
+        out_be32(&dbell->dbell_regs->oddatr, (index << 20) | data);
+        out_be32(&dbell->dbell_regs->odmr, 0x00000001);
+
+        return 0;
+}
+
+/**
+ * fsl_add_outb_message - Add message to the MPC85xx outbound message queue
+ * @mport: Master port with outbound message queue
+ * @rdev: Target of outbound message
+ * @mbox: Outbound mailbox
+ * @buffer: Message to add to outbound queue
+ * @len: Length of message
+ *
+ * Adds the @buffer message to the MPC85xx outbound message queue. Returns
+ * %0 on success or %-EINVAL on failure.
+ */
+int
+fsl_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
+                        void *buffer, size_t len)
+{
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+        u32 omr;
+        struct rio_tx_desc *desc = (struct rio_tx_desc *)rmu->msg_tx_ring.virt
+                                        + rmu->msg_tx_ring.tx_slot;
+        int ret = 0;
+
+        pr_debug("RIO: fsl_add_outb_message(): destid %4.4x mbox %d buffer " \
+                 "%8.8x len %8.8x\n", rdev->destid, mbox, (int)buffer, len);
+        if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
+                ret = -EINVAL;
+                goto out;
+        }
+
+        /* Copy and clear rest of buffer */
+        memcpy(rmu->msg_tx_ring.virt_buffer[rmu->msg_tx_ring.tx_slot], buffer,
+                        len);
+        if (len < (RIO_MAX_MSG_SIZE - 4))
+                memset(rmu->msg_tx_ring.virt_buffer[rmu->msg_tx_ring.tx_slot]
+                                + len, 0, RIO_MAX_MSG_SIZE - len);
+
+        /* Set mbox field for message, and set destid */
+        desc->dport = (rdev->destid << 16) | (mbox & 0x3);
+
+        /* Enable EOMI interrupt and priority */
+        desc->dattr = 0x28000000 | ((mport->index) << 20);
+
+        /* Set transfer size aligned to next power of 2 (in double words) */
+        desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
+
+        /* Set snooping and source buffer address */
+        desc->saddr = 0x00000004
+                | rmu->msg_tx_ring.phys_buffer[rmu->msg_tx_ring.tx_slot];
+
+        /* Increment enqueue pointer */
+        omr = in_be32(&rmu->msg_regs->omr);
+        out_be32(&rmu->msg_regs->omr, omr | RIO_MSG_OMR_MUI);
+
+        /* Go to next descriptor */
+        if (++rmu->msg_tx_ring.tx_slot == rmu->msg_tx_ring.size)
+                rmu->msg_tx_ring.tx_slot = 0;
+
+out:
+        return ret;
+}
+
+/**
+ * fsl_open_outb_mbox - Initialize MPC85xx outbound mailbox
+ * @mport: Master port implementing the outbound message unit
+ * @dev_id: Device specific pointer to pass on event
+ * @mbox: Mailbox to open
+ * @entries: Number of entries in the outbound mailbox ring
+ *
+ * Initializes buffer ring, request the outbound message interrupt,
+ * and enables the outbound message unit. Returns %0 on success and
+ * %-EINVAL or %-ENOMEM on failure.
+ */
+int
+fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+{
+        int i, j, rc = 0;
+        struct rio_priv *priv = mport->priv;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+
+        if ((entries < RIO_MIN_TX_RING_SIZE) ||
+                (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
+                rc = -EINVAL;
+                goto out;
+        }
+
+        /* Initialize shadow copy ring */
+        rmu->msg_tx_ring.dev_id = dev_id;
+        rmu->msg_tx_ring.size = entries;
+
+        for (i = 0; i < rmu->msg_tx_ring.size; i++) {
+                rmu->msg_tx_ring.virt_buffer[i] =
+                        dma_alloc_coherent(priv->dev, RIO_MSG_BUFFER_SIZE,
+                                &rmu->msg_tx_ring.phys_buffer[i], GFP_KERNEL);
+                if (!rmu->msg_tx_ring.virt_buffer[i]) {
+                        rc = -ENOMEM;
+                        for (j = 0; j < rmu->msg_tx_ring.size; j++)
+                                if (rmu->msg_tx_ring.virt_buffer[j])
+                                        dma_free_coherent(priv->dev,
+                                                        RIO_MSG_BUFFER_SIZE,
+                                                        rmu->msg_tx_ring.
+                                                        virt_buffer[j],
+                                                        rmu->msg_tx_ring.
+                                                        phys_buffer[j]);
+                        goto out;
+                }
+        }
+
+        /* Initialize outbound message descriptor ring */
+        rmu->msg_tx_ring.virt = dma_alloc_coherent(priv->dev,
+                                rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+                                &rmu->msg_tx_ring.phys, GFP_KERNEL);
+        if (!rmu->msg_tx_ring.virt) {
+                rc = -ENOMEM;
+                goto out_dma;
+        }
+        memset(rmu->msg_tx_ring.virt, 0,
+                        rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE);
+        rmu->msg_tx_ring.tx_slot = 0;
+
+        /* Point dequeue/enqueue pointers at first entry in ring */
+        out_be32(&rmu->msg_regs->odqdpar, rmu->msg_tx_ring.phys);
+        out_be32(&rmu->msg_regs->odqepar, rmu->msg_tx_ring.phys);
+
+        /* Configure for snooping */
+        out_be32(&rmu->msg_regs->osar, 0x00000004);
+
+        /* Clear interrupt status */
+        out_be32(&rmu->msg_regs->osr, 0x000000b3);
+
+        /* Hook up outbound message handler */
+        rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0,
+                         "msg_tx", (void *)mport);
+        if (rc < 0)
+                goto out_irq;
+
+        /*
+         * Configure outbound message unit
+         *      Snooping
+         *      Interrupts (all enabled, except QEIE)
+         *      Chaining mode
+         *      Disable
+         */
+        out_be32(&rmu->msg_regs->omr, 0x00100220);
+
+        /* Set number of entries */
+        out_be32(&rmu->msg_regs->omr,
+                 in_be32(&rmu->msg_regs->omr) |
+                 ((get_bitmask_order(entries) - 2) << 12));
+
+        /* Now enable the unit */
+        out_be32(&rmu->msg_regs->omr, in_be32(&rmu->msg_regs->omr) | 0x1);
+
+out:
+        return rc;
+
+out_irq:
+        dma_free_coherent(priv->dev,
+                rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+                rmu->msg_tx_ring.virt, rmu->msg_tx_ring.phys);
+
+out_dma:
+        for (i = 0; i < rmu->msg_tx_ring.size; i++)
+                dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE,
+                rmu->msg_tx_ring.virt_buffer[i],
+                rmu->msg_tx_ring.phys_buffer[i]);
+
+        return rc;
+}
+
+/**
+ * fsl_close_outb_mbox - Shut down MPC85xx outbound mailbox
+ * @mport: Master port implementing the outbound message unit
+ * @mbox: Mailbox to close
+ *
+ * Disables the outbound message unit, free all buffers, and
+ * frees the outbound message interrupt.
+ */
+void fsl_close_outb_mbox(struct rio_mport *mport, int mbox)
+{
+        struct rio_priv *priv = mport->priv;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+
+        /* Disable inbound message unit */
+        out_be32(&rmu->msg_regs->omr, 0);
+
+        /* Free ring */
+        dma_free_coherent(priv->dev,
+        rmu->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+        rmu->msg_tx_ring.virt, rmu->msg_tx_ring.phys);
+
+        /* Free interrupt */
+        free_irq(IRQ_RIO_TX(mport), (void *)mport);
+}
+
+/**
+ * fsl_open_inb_mbox - Initialize MPC85xx inbound mailbox
+ * @mport: Master port implementing the inbound message unit
+ * @dev_id: Device specific pointer to pass on event
+ * @mbox: Mailbox to open
+ * @entries: Number of entries in the inbound mailbox ring
+ *
+ * Initializes buffer ring, request the inbound message interrupt,
+ * and enables the inbound message unit. Returns %0 on success
+ * and %-EINVAL or %-ENOMEM on failure.
+ */
+int
+fsl_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+{
+        int i, rc = 0;
+        struct rio_priv *priv = mport->priv;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+
+        if ((entries < RIO_MIN_RX_RING_SIZE) ||
+                (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
+                rc = -EINVAL;
+                goto out;
+        }
+
+        /* Initialize client buffer ring */
+        rmu->msg_rx_ring.dev_id = dev_id;
+        rmu->msg_rx_ring.size = entries;
+        rmu->msg_rx_ring.rx_slot = 0;
+        for (i = 0; i < rmu->msg_rx_ring.size; i++)
+                rmu->msg_rx_ring.virt_buffer[i] = NULL;
+
+        /* Initialize inbound message ring */
+        rmu->msg_rx_ring.virt = dma_alloc_coherent(priv->dev,
+                                rmu->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
+                                &rmu->msg_rx_ring.phys, GFP_KERNEL);
+        if (!rmu->msg_rx_ring.virt) {
+                rc = -ENOMEM;
+                goto out;
+        }
+
+        /* Point dequeue/enqueue pointers at first entry in ring */
+        out_be32(&rmu->msg_regs->ifqdpar, (u32) rmu->msg_rx_ring.phys);
+        out_be32(&rmu->msg_regs->ifqepar, (u32) rmu->msg_rx_ring.phys);
+
+        /* Clear interrupt status */
+        out_be32(&rmu->msg_regs->isr, 0x00000091);
+
+        /* Hook up inbound message handler */
+        rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0,
+                         "msg_rx", (void *)mport);
+        if (rc < 0) {
+                dma_free_coherent(priv->dev, RIO_MSG_BUFFER_SIZE,
+                        rmu->msg_tx_ring.virt_buffer[i],
+                        rmu->msg_tx_ring.phys_buffer[i]);
+                goto out;
+        }
+
+        /*
+         * Configure inbound message unit:
+         *      Snooping
+         *      4KB max message size
+         *      Unmask all interrupt sources
+         *      Disable
+         */
+        out_be32(&rmu->msg_regs->imr, 0x001b0060);
+
+        /* Set number of queue entries */
+        setbits32(&rmu->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12);
+
+        /* Now enable the unit */
+        setbits32(&rmu->msg_regs->imr, 0x1);
+
+out:
+        return rc;
+}
+
+/**
+ * fsl_close_inb_mbox - Shut down MPC85xx inbound mailbox
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Mailbox to close
+ *
+ * Disables the inbound message unit, free all buffers, and
+ * frees the inbound message interrupt.
+ */
+void fsl_close_inb_mbox(struct rio_mport *mport, int mbox)
+{
+        struct rio_priv *priv = mport->priv;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+
+        /* Disable inbound message unit */
+        out_be32(&rmu->msg_regs->imr, 0);
+
+        /* Free ring */
+        dma_free_coherent(priv->dev, rmu->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
+        rmu->msg_rx_ring.virt, rmu->msg_rx_ring.phys);
+
+        /* Free interrupt */
+        free_irq(IRQ_RIO_RX(mport), (void *)mport);
+}
+
+/**
+ * fsl_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Inbound mailbox number
+ * @buf: Buffer to add to inbound queue
+ *
+ * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
+ * %0 on success or %-EINVAL on failure.
+ */
+int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
+{
+        int rc = 0;
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+
+        pr_debug("RIO: fsl_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
+                 rmu->msg_rx_ring.rx_slot);
+
+        if (rmu->msg_rx_ring.virt_buffer[rmu->msg_rx_ring.rx_slot]) {
+                printk(KERN_ERR
+                        "RIO: error adding inbound buffer %d, buffer exists\n",
+                        rmu->msg_rx_ring.rx_slot);
+                rc = -EINVAL;
+                goto out;
+        }
+
+        rmu->msg_rx_ring.virt_buffer[rmu->msg_rx_ring.rx_slot] = buf;
+        if (++rmu->msg_rx_ring.rx_slot == rmu->msg_rx_ring.size)
+                rmu->msg_rx_ring.rx_slot = 0;
+
+out:
+        return rc;
+}
+
+/**
+ * fsl_get_inb_message - Fetch inbound message from the MPC85xx message unit
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Inbound mailbox number
+ *
+ * Gets the next available inbound message from the inbound message queue.
+ * A pointer to the message is returned on success or NULL on failure.
+ */
+void *fsl_get_inb_message(struct rio_mport *mport, int mbox)
+{
+        struct fsl_rmu *rmu = GET_RMM_HANDLE(mport);
+        u32 phys_buf, virt_buf;
+        void *buf = NULL;
+        int buf_idx;
+
+        phys_buf = in_be32(&rmu->msg_regs->ifqdpar);
+
+        /* If no more messages, then bail out */
+        if (phys_buf == in_be32(&rmu->msg_regs->ifqepar))
+                goto out2;
+
+        virt_buf = (u32) rmu->msg_rx_ring.virt + (phys_buf
+                                                - rmu->msg_rx_ring.phys);
+        buf_idx = (phys_buf - rmu->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
+        buf = rmu->msg_rx_ring.virt_buffer[buf_idx];
+
+        if (!buf) {
+                printk(KERN_ERR
+                        "RIO: inbound message copy failed, no buffers\n");
+                goto out1;
+        }
+
+        /* Copy max message size, caller is expected to allocate that big */
+        memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
+
+        /* Clear the available buffer */
+        rmu->msg_rx_ring.virt_buffer[buf_idx] = NULL;
+
+out1:
+        setbits32(&rmu->msg_regs->imr, RIO_MSG_IMR_MI);
+
+out2:
+        return buf;
+}
+
+/**
+ * fsl_rio_doorbell_init - MPC85xx doorbell interface init
+ * @mport: Master port implementing the inbound doorbell unit
+ *
+ * Initializes doorbell unit hardware and inbound DMA buffer
+ * ring. Called from fsl_rio_setup(). Returns %0 on success
+ * or %-ENOMEM on failure.
+ */
+int fsl_rio_doorbell_init(struct fsl_rio_dbell *dbell)
+{
+        int rc = 0;
+
+        /* Initialize inbound doorbells */
+        dbell->dbell_ring.virt = dma_alloc_coherent(dbell->dev, 512 *
+                DOORBELL_MESSAGE_SIZE, &dbell->dbell_ring.phys, GFP_KERNEL);
+        if (!dbell->dbell_ring.virt) {
+                printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
+                rc = -ENOMEM;
+                goto out;
+        }
+
+        /* Point dequeue/enqueue pointers at first entry in ring */
+        out_be32(&dbell->dbell_regs->dqdpar, (u32) dbell->dbell_ring.phys);
+        out_be32(&dbell->dbell_regs->dqepar, (u32) dbell->dbell_ring.phys);
+
+        /* Clear interrupt status */
+        out_be32(&dbell->dbell_regs->dsr, 0x00000091);
+
+        /* Hook up doorbell handler */
+        rc = request_irq(IRQ_RIO_BELL(dbell), fsl_rio_dbell_handler, 0,
+                         "dbell_rx", (void *)dbell);
+        if (rc < 0) {
+                dma_free_coherent(dbell->dev, 512 * DOORBELL_MESSAGE_SIZE,
+                         dbell->dbell_ring.virt, dbell->dbell_ring.phys);
+                printk(KERN_ERR
+                        "MPC85xx RIO: unable to request inbound doorbell irq");
+                goto out;
+        }
+
+        /* Configure doorbells for snooping, 512 entries, and enable */
+        out_be32(&dbell->dbell_regs->dmr, 0x00108161);
+
+out:
+        return rc;
+}
+
+int fsl_rio_setup_rmu(struct rio_mport *mport, struct device_node *node)
+{
+        struct rio_priv *priv;
+        struct fsl_rmu *rmu;
+        u64 msg_start;
+        const u32 *msg_addr;
+        int mlen;
+        int aw;
+
+        if (!mport || !mport->priv)
+                return -EINVAL;
+
+        priv = mport->priv;
+
+        if (!node) {
+                dev_warn(priv->dev, "Can't get %s property 'fsl,rmu'\n",
+                        priv->dev->of_node->full_name);
+                return -EINVAL;
+        }
+
+        rmu = kzalloc(sizeof(struct fsl_rmu), GFP_KERNEL);
+        if (!rmu)
+                return -ENOMEM;
+
+        aw = of_n_addr_cells(node);
+        msg_addr = of_get_property(node, "reg", &mlen);
+        if (!msg_addr) {
+                pr_err("%s: unable to find 'reg' property of message-unit\n",
+                        node->full_name);
+                kfree(rmu);
+                return -ENOMEM;
+        }
+        msg_start = of_read_number(msg_addr, aw);
+
+        rmu->msg_regs = (struct rio_msg_regs *)
+                        (rmu_regs_win + (u32)msg_start);
+
+        rmu->txirq = irq_of_parse_and_map(node, 0);
+        rmu->rxirq = irq_of_parse_and_map(node, 1);
+        printk(KERN_INFO "%s: txirq: %d, rxirq %d\n",
+                node->full_name, rmu->txirq, rmu->rxirq);
+
+        priv->rmm_handle = rmu;
+
+        rio_init_dbell_res(&mport->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
+        rio_init_mbox_res(&mport->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
+        rio_init_mbox_res(&mport->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
+
+        return 0;
+}
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8c7e8528e7c4..4e9ccb1015de 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -154,7 +154,7 @@ static inline unsigned int mpic_processor_id(struct mpic *mpic)
 {
         unsigned int cpu = 0;
 
-        if (mpic->flags & MPIC_PRIMARY)
+        if (!(mpic->flags & MPIC_SECONDARY))
                 cpu = hard_smp_processor_id();
 
         return cpu;
@@ -315,29 +315,25 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,
 }
 
 #ifdef CONFIG_PPC_DCR
-static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
-                          struct mpic_reg_bank *rb,
+static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
                           unsigned int offset, unsigned int size)
 {
-        const u32 *dbasep;
-
-        dbasep = of_get_property(node, "dcr-reg", NULL);
-
-        rb->dhost = dcr_map(node, *dbasep + offset, size);
+        phys_addr_t phys_addr = dcr_resource_start(mpic->node, 0);
+        rb->dhost = dcr_map(mpic->node, phys_addr + offset, size);
         BUG_ON(!DCR_MAP_OK(rb->dhost));
 }
 
-static inline void mpic_map(struct mpic *mpic, struct device_node *node,
+static inline void mpic_map(struct mpic *mpic,
                             phys_addr_t phys_addr, struct mpic_reg_bank *rb,
                             unsigned int offset, unsigned int size)
 {
         if (mpic->flags & MPIC_USES_DCR)
-                _mpic_map_dcr(mpic, node, rb, offset, size);
+                _mpic_map_dcr(mpic, rb, offset, size);
         else
                 _mpic_map_mmio(mpic, phys_addr, rb, offset, size);
 }
 #else /* CONFIG_PPC_DCR */
-#define mpic_map(m,n,p,b,o,s)   _mpic_map_mmio(m,p,b,o,s)
+#define mpic_map(m,p,b,o,s)     _mpic_map_mmio(m,p,b,o,s)
 #endif /* !CONFIG_PPC_DCR */
 
 
@@ -901,7 +897,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
         if (vold != vnew)
                 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vnew);
 
-        return IRQ_SET_MASK_OK_NOCOPY;;
+        return IRQ_SET_MASK_OK_NOCOPY;
 }
 
 void mpic_set_vector(unsigned int virq, unsigned int vector)
@@ -990,7 +986,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
 
 #ifdef CONFIG_SMP
         else if (hw >= mpic->ipi_vecs[0]) {
-                WARN_ON(!(mpic->flags & MPIC_PRIMARY));
+                WARN_ON(mpic->flags & MPIC_SECONDARY);
 
                 DBG("mpic: mapping as IPI\n");
                 irq_set_chip_data(virq, mpic);
@@ -1001,7 +997,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
 #endif /* CONFIG_SMP */
 
         if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) {
-                WARN_ON(!(mpic->flags & MPIC_PRIMARY));
+                WARN_ON(mpic->flags & MPIC_SECONDARY);
 
                 DBG("mpic: mapping as timer\n");
                 irq_set_chip_data(virq, mpic);
@@ -1115,17 +1111,28 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
         return 0;
 }
 
+/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
+static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct mpic *mpic = irq_desc_get_handler_data(desc);
+        unsigned int virq;
+
+        BUG_ON(!(mpic->flags & MPIC_SECONDARY));
+
+        virq = mpic_get_one_irq(mpic);
+        if (virq != NO_IRQ)
+                generic_handle_irq(virq);
+
+        chip->irq_eoi(&desc->irq_data);
+}
+
 static struct irq_host_ops mpic_host_ops = {
         .match = mpic_host_match,
         .map = mpic_host_map,
         .xlate = mpic_host_xlate,
 };
 
-static int mpic_reset_prohibited(struct device_node *node)
-{
-        return node && of_get_property(node, "pic-no-reset", NULL);
-}
-
 /*
  * Exported functions
  */
@@ -1137,27 +1144,60 @@ struct mpic * __init mpic_alloc(struct device_node *node,
                                 unsigned int irq_count,
                                 const char *name)
 {
-        struct mpic     *mpic;
-        u32             greg_feature;
-        const char      *vers;
-        int             i;
-        int             intvec_top;
-        u64             paddr = phys_addr;
+        int i, psize, intvec_top;
+        struct mpic *mpic;
+        u32 greg_feature;
+        const char *vers;
+        const u32 *psrc;
+
+        /* Default MPIC search parameters */
+        static const struct of_device_id __initconst mpic_device_id[] = {
+                { .type       = "open-pic", },
+                { .compatible = "open-pic", },
+                {},
+        };
+
+        /*
+         * If we were not passed a device-tree node, then perform the default
+         * search for standardized a standardized OpenPIC.
+         */
+        if (node) {
+                node = of_node_get(node);
+        } else {
+                node = of_find_matching_node(NULL, mpic_device_id);
+                if (!node)
+                        return NULL;
+        }
+
+        /* Pick the physical address from the device tree if unspecified */
+        if (!phys_addr) {
+                /* Check if it is DCR-based */
+                if (of_get_property(node, "dcr-reg", NULL)) {
+                        flags |= MPIC_USES_DCR;
+                } else {
+                        struct resource r;
+                        if (of_address_to_resource(node, 0, &r))
+                                goto err_of_node_put;
+                        phys_addr = r.start;
+                }
+        }
 
         mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
         if (mpic == NULL)
-                return NULL;
+                goto err_of_node_put;
 
         mpic->name = name;
+        mpic->node = node;
+        mpic->paddr = phys_addr;
 
         mpic->hc_irq = mpic_irq_chip;
         mpic->hc_irq.name = name;
-        if (flags & MPIC_PRIMARY)
+        if (!(flags & MPIC_SECONDARY))
                 mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
 #ifdef CONFIG_MPIC_U3_HT_IRQS
         mpic->hc_ht_irq = mpic_irq_ht_chip;
         mpic->hc_ht_irq.name = name;
-        if (flags & MPIC_PRIMARY)
+        if (!(flags & MPIC_SECONDARY))
                 mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
 
@@ -1194,28 +1234,22 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         mpic->spurious_vec  = intvec_top;
 
         /* Check for "big-endian" in device-tree */
-        if (node && of_get_property(node, "big-endian", NULL) != NULL)
+        if (of_get_property(mpic->node, "big-endian", NULL) != NULL)
                 mpic->flags |= MPIC_BIG_ENDIAN;
-        if (node && of_device_is_compatible(node, "fsl,mpic"))
+        if (of_device_is_compatible(mpic->node, "fsl,mpic"))
                 mpic->flags |= MPIC_FSL;
 
         /* Look for protected sources */
-        if (node) {
-                int psize;
-                unsigned int bits, mapsize;
-                const u32 *psrc =
-                        of_get_property(node, "protected-sources", &psize);
-                if (psrc) {
-                        psize /= 4;
-                        bits = intvec_top + 1;
-                        mapsize = BITS_TO_LONGS(bits) * sizeof(unsigned long);
-                        mpic->protected = kzalloc(mapsize, GFP_KERNEL);
-                        BUG_ON(mpic->protected == NULL);
-                        for (i = 0; i < psize; i++) {
-                                if (psrc[i] > intvec_top)
-                                        continue;
-                                __set_bit(psrc[i], mpic->protected);
-                        }
+        psrc = of_get_property(mpic->node, "protected-sources", &psize);
+        if (psrc) {
+                /* Allocate a bitmap with one bit per interrupt */
+                unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
+                mpic->protected = kzalloc(mapsize*sizeof(long), GFP_KERNEL);
+                BUG_ON(mpic->protected == NULL);
+                for (i = 0; i < psize/sizeof(u32); i++) {
+                        if (psrc[i] > intvec_top)
+                                continue;
+                        __set_bit(psrc[i], mpic->protected);
                 }
         }
 
@@ -1224,42 +1258,32 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 #endif
 
         /* default register type */
-        mpic->reg_type = (flags & MPIC_BIG_ENDIAN) ?
-                mpic_access_mmio_be : mpic_access_mmio_le;
-
-        /* If no physical address is passed in, a device-node is mandatory */
-        BUG_ON(paddr == 0 && node == NULL);
+        if (flags & MPIC_BIG_ENDIAN)
+                mpic->reg_type = mpic_access_mmio_be;
+        else
+                mpic->reg_type = mpic_access_mmio_le;
 
-        /* If no physical address passed in, check if it's dcr based */
-        if (paddr == 0 && of_get_property(node, "dcr-reg", NULL) != NULL) {
+        /*
+         * An MPIC with a "dcr-reg" property must be accessed that way, but
+         * only if the kernel includes DCR support.
+         */
 #ifdef CONFIG_PPC_DCR
-                mpic->flags |= MPIC_USES_DCR;
+        if (flags & MPIC_USES_DCR)
                 mpic->reg_type = mpic_access_dcr;
 #else
-                BUG();
-#endif /* CONFIG_PPC_DCR */
-        }
-
-        /* If the MPIC is not DCR based, and no physical address was passed
-         * in, try to obtain one
-         */
-        if (paddr == 0 && !(mpic->flags & MPIC_USES_DCR)) {
-                const u32 *reg = of_get_property(node, "reg", NULL);
-                BUG_ON(reg == NULL);
-                paddr = of_translate_address(node, reg);
-                BUG_ON(paddr == OF_BAD_ADDR);
-        }
+        BUG_ON(flags & MPIC_USES_DCR);
+#endif
 
         /* Map the global registers */
-        mpic_map(mpic, node, paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
-        mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
+        mpic_map(mpic, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
+        mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
 
         /* Reset */
 
         /* When using a device-node, reset requests are only honored if the MPIC
          * is allowed to reset.
          */
-        if (mpic_reset_prohibited(node))
+        if (of_get_property(mpic->node, "pic-no-reset", NULL))
                 mpic->flags |= MPIC_NO_RESET;
 
         if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) {
@@ -1307,7 +1331,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         for_each_possible_cpu(i) {
                 unsigned int cpu = get_hard_smp_processor_id(i);
 
-                mpic_map(mpic, node, paddr, &mpic->cpuregs[cpu],
+                mpic_map(mpic, mpic->paddr, &mpic->cpuregs[cpu],
                          MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
                          0x1000);
         }
@@ -1315,16 +1339,21 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         /* Initialize main ISU if none provided */
         if (mpic->isu_size == 0) {
                 mpic->isu_size = mpic->num_sources;
-                mpic_map(mpic, node, paddr, &mpic->isus[0],
+                mpic_map(mpic, mpic->paddr, &mpic->isus[0],
                          MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
         }
         mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
         mpic->isu_mask = (1 << mpic->isu_shift) - 1;
 
-        mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
+        mpic->irqhost = irq_alloc_host(mpic->node, IRQ_HOST_MAP_LINEAR,
                                        isu_size ? isu_size : mpic->num_sources,
                                        &mpic_host_ops,
                                        flags & MPIC_LARGE_VECTORS ? 2048 : 256);
+
+        /*
+         * FIXME: The code leaks the MPIC object and mappings here; this
+         * is very unlikely to fail but it ought to be fixed anyways.
+         */
         if (mpic->irqhost == NULL)
                 return NULL;
 
@@ -1347,19 +1376,23 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         }
         printk(KERN_INFO "mpic: Setting up MPIC \"%s\" version %s at %llx,"
                " max %d CPUs\n",
-               name, vers, (unsigned long long)paddr, num_possible_cpus());
+               name, vers, (unsigned long long)mpic->paddr, num_possible_cpus());
         printk(KERN_INFO "mpic: ISU size: %d, shift: %d, mask: %x\n",
                mpic->isu_size, mpic->isu_shift, mpic->isu_mask);
 
         mpic->next = mpics;
         mpics = mpic;
 
-        if (flags & MPIC_PRIMARY) {
+        if (!(flags & MPIC_SECONDARY)) {
                 mpic_primary = mpic;
                 irq_set_default_host(mpic->irqhost);
         }
 
         return mpic;
+
+err_of_node_put:
+        of_node_put(node);
+        return NULL;
 }
 
 void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
@@ -1369,7 +1402,7 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
 
         BUG_ON(isu_num >= MPIC_MAX_ISU);
 
-        mpic_map(mpic, mpic->irqhost->of_node,
+        mpic_map(mpic,
                  paddr, &mpic->isus[isu_num], 0,
                  MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
 
@@ -1385,8 +1418,7 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
 
 void __init mpic_init(struct mpic *mpic)
 {
-        int i;
-        int cpu;
+        int i, cpu;
 
         BUG_ON(mpic->num_sources == 0);
 
@@ -1424,7 +1456,7 @@ void __init mpic_init(struct mpic *mpic)
 
         /* Do the HT PIC fixups on U3 broken mpic */
         DBG("MPIC flags: %x\n", mpic->flags);
-        if ((mpic->flags & MPIC_U3_HT_IRQS) && (mpic->flags & MPIC_PRIMARY)) {
+        if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) {
                 mpic_scan_ht_pics(mpic);
                 mpic_u3msi_init(mpic);
         }
@@ -1471,6 +1503,17 @@ void __init mpic_init(struct mpic *mpic)
                                   GFP_KERNEL);
         BUG_ON(mpic->save_data == NULL);
 #endif
+
+        /* Check if this MPIC is chained from a parent interrupt controller */
+        if (mpic->flags & MPIC_SECONDARY) {
+                int virq = irq_of_parse_and_map(mpic->node, 0);
+                if (virq != NO_IRQ) {
+                        printk(KERN_INFO "%s: hooking up to IRQ %d\n",
+                                        mpic->node->full_name, virq);
+                        irq_set_handler_data(virq, mpic);
+                        irq_set_chained_handler(virq, &mpic_cascade);
+                }
+        }
 }
 
 void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
diff --git a/arch/powerpc/sysdev/ppc4xx_cpm.c b/arch/powerpc/sysdev/ppc4xx_cpm.c
index 73b86cc5ea74..82e2cfe35c62 100644
--- a/arch/powerpc/sysdev/ppc4xx_cpm.c
+++ b/arch/powerpc/sysdev/ppc4xx_cpm.c
@@ -179,12 +179,12 @@ static struct kobj_attribute cpm_idle_attr =
 
 static void cpm_idle_config_sysfs(void)
 {
-        struct sys_device *sys_dev;
+        struct device *dev;
         unsigned long ret;
 
-        sys_dev = get_cpu_sysdev(0);
+        dev = get_cpu_device(0);
 
-        ret = sysfs_create_file(&sys_dev->kobj,
+        ret = sysfs_create_file(&dev->kobj,
                                 &cpm_idle_attr.attr);
         if (ret)
                 printk(KERN_WARNING
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 862f11b3821e..4f05f7542346 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -185,9 +185,15 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
  out:
         dma_offset_set = 1;
         pci_dram_offset = res->start;
+        hose->dma_window_base_cur = res->start;
+        hose->dma_window_size = resource_size(res);
 
         printk(KERN_INFO "4xx PCI DMA offset set to 0x%08lx\n",
                pci_dram_offset);
+        printk(KERN_INFO "4xx PCI DMA window base to 0x%016llx\n",
+               (unsigned long long)hose->dma_window_base_cur);
+        printk(KERN_INFO "DMA window size 0x%016llx\n",
+               (unsigned long long)hose->dma_window_size);
         return 0;
 }
 
@@ -647,6 +653,7 @@ static unsigned int ppc4xx_pciex_port_count;
 
 struct ppc4xx_pciex_hwops
 {
+        bool want_sdr;
         int (*core_init)(struct device_node *np);
         int (*port_init_hw)(struct ppc4xx_pciex_port *port);
         int (*setup_utl)(struct ppc4xx_pciex_port *port);
@@ -916,6 +923,7 @@ static int ppc440speB_pciex_init_utl(struct ppc4xx_pciex_port *port)
 
 static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
 {
+        .want_sdr       = true,
         .core_init      = ppc440spe_pciex_core_init,
         .port_init_hw   = ppc440speA_pciex_init_port_hw,
         .setup_utl      = ppc440speA_pciex_init_utl,
@@ -924,6 +932,7 @@ static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
 
 static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata =
 {
+        .want_sdr       = true,
         .core_init      = ppc440spe_pciex_core_init,
         .port_init_hw   = ppc440speB_pciex_init_port_hw,
         .setup_utl      = ppc440speB_pciex_init_utl,
@@ -1034,6 +1043,7 @@ static int ppc460ex_pciex_init_utl(struct ppc4xx_pciex_port *port)
 
 static struct ppc4xx_pciex_hwops ppc460ex_pcie_hwops __initdata =
 {
+        .want_sdr       = true,
         .core_init      = ppc460ex_pciex_core_init,
         .port_init_hw   = ppc460ex_pciex_init_port_hw,
         .setup_utl      = ppc460ex_pciex_init_utl,
@@ -1181,6 +1191,7 @@ done:
 }
 
 static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = {
+        .want_sdr       = true,
         .core_init      = ppc460sx_pciex_core_init,
         .port_init_hw   = ppc460sx_pciex_init_port_hw,
         .setup_utl      = ppc460sx_pciex_init_utl,
@@ -1276,6 +1287,7 @@ static int ppc405ex_pciex_init_utl(struct ppc4xx_pciex_port *port)
 
 static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata =
 {
+        .want_sdr       = true,
         .core_init      = ppc405ex_pciex_core_init,
         .port_init_hw   = ppc405ex_pciex_init_port_hw,
         .setup_utl      = ppc405ex_pciex_init_utl,
@@ -1284,6 +1296,52 @@ static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata =
 
 #endif /* CONFIG_40x */
 
+#ifdef CONFIG_476FPE
+static int __init ppc_476fpe_pciex_core_init(struct device_node *np)
+{
+        return 4;
+}
+
+static void __init ppc_476fpe_pciex_check_link(struct ppc4xx_pciex_port *port)
+{
+        u32 timeout_ms = 20;
+        u32 val = 0, mask = (PECFG_TLDLP_LNKUP|PECFG_TLDLP_PRESENT);
+        void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000,
+                                      0x1000);
+
+        printk(KERN_INFO "PCIE%d: Checking link...\n", port->index);
+
+        if (mbase == NULL) {
+                printk(KERN_WARNING "PCIE%d: failed to get cfg space\n",
+                                    port->index);
+                return;
+        }
+                
+        while (timeout_ms--) {
+                val = in_le32(mbase + PECFG_TLDLP);
+
+                if ((val & mask) == mask)
+                        break;
+                msleep(10);
+        }
+
+        if (val & PECFG_TLDLP_PRESENT) {
+                printk(KERN_INFO "PCIE%d: link is up !\n", port->index);
+                port->link = 1;
+        } else
+                printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index);
+
+        iounmap(mbase);
+        return;
+}
+
+static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata =
+{
+        .core_init      = ppc_476fpe_pciex_core_init,
+        .check_link     = ppc_476fpe_pciex_check_link,
+};
+#endif /* CONFIG_476FPE */
+
 /* Check that the core has been initied and if not, do it */
 static int __init ppc4xx_pciex_check_core_init(struct device_node *np)
 {
@@ -1309,6 +1367,10 @@ static int __init ppc4xx_pciex_check_core_init(struct device_node *np)
         if (of_device_is_compatible(np, "ibm,plb-pciex-405ex"))
                 ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops;
 #endif
+#ifdef CONFIG_476FPE
+        if (of_device_is_compatible(np, "ibm,plb-pciex-476fpe"))
+                ppc4xx_pciex_hwops = &ppc_476fpe_pcie_hwops;
+#endif
         if (ppc4xx_pciex_hwops == NULL) {
                 printk(KERN_WARNING "PCIE: unknown host type %s\n",
                        np->full_name);
@@ -1617,6 +1679,10 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port	*port,
                         dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
                                 sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT
                                         | DCRO_PEGPL_OMRxMSKL_VAL);
+                else if (of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe"))
+                        dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
+                                sa | DCRO_PEGPL_476FPE_OMR1MSKL_UOT
+                                        | DCRO_PEGPL_OMRxMSKL_VAL);
                 else
                         dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
                                 sa | DCRO_PEGPL_OMR1MSKL_UOT
@@ -1739,9 +1805,10 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
                 /* Calculate window size */
                 sa = (0xffffffffffffffffull << ilog2(size));
                 if (res->flags & IORESOURCE_PREFETCH)
-                        sa |= 0x8;
+                        sa |= PCI_BASE_ADDRESS_MEM_PREFETCH;
 
-                if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx"))
+                if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx") ||
+                    of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe"))
                         sa |= PCI_BASE_ADDRESS_MEM_TYPE_64;
 
                 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
@@ -1972,13 +2039,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
         }
 
         port->node = of_node_get(np);
-        pval = of_get_property(np, "sdr-base", NULL);
-        if (pval == NULL) {
-                printk(KERN_ERR "PCIE: missing sdr-base for %s\n",
-                       np->full_name);
-                return;
+        if (ppc4xx_pciex_hwops->want_sdr) {
+                pval = of_get_property(np, "sdr-base", NULL);
+                if (pval == NULL) {
+                        printk(KERN_ERR "PCIE: missing sdr-base for %s\n",
+                               np->full_name);
+                        return;
+                }
+                port->sdr_base = *pval;
         }
-        port->sdr_base = *pval;
 
         /* Check if device_type property is set to "pci" or "pci-endpoint".
          * Resulting from this setup this PCIe port will be configured
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h
index 32ce763a375a..bb4821938ab1 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.h
+++ b/arch/powerpc/sysdev/ppc4xx_pci.h
@@ -476,6 +476,13 @@
 #define DCRO_PEGPL_OMR1MSKL_UOT  0x00000002
 #define DCRO_PEGPL_OMR3MSKL_IO   0x00000002
 
+/* 476FPE */
+#define PCCFG_LCPA                      0x270
+#define PECFG_TLDLP                     0x3F8
+#define PECFG_TLDLP_LNKUP               0x00000008
+#define PECFG_TLDLP_PRESENT             0x00000010
+#define DCRO_PEGPL_476FPE_OMR1MSKL_UOT   0x00000004
+
 /* SDR Bit Mappings */
 #define PESDRx_RCSSET_HLDPLB    0x10000000
 #define PESDRx_RCSSET_RSTGU     0x01000000
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c
index e23f23cf9f5c..521e67a49dc4 100644
--- a/arch/powerpc/sysdev/qe_lib/gpio.c
+++ b/arch/powerpc/sysdev/qe_lib/gpio.c
@@ -139,14 +139,10 @@ struct qe_pin {
 struct qe_pin *qe_pin_request(struct device_node *np, int index)
 {
         struct qe_pin *qe_pin;
-        struct device_node *gpio_np;
         struct gpio_chip *gc;
         struct of_mm_gpio_chip *mm_gc;
         struct qe_gpio_chip *qe_gc;
         int err;
-        int size;
-        const void *gpio_spec;
-        const u32 *gpio_cells;
         unsigned long flags;
 
         qe_pin = kzalloc(sizeof(*qe_pin), GFP_KERNEL);
@@ -155,45 +151,25 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index)
                 return ERR_PTR(-ENOMEM);
         }
 
-        err = of_parse_phandles_with_args(np, "gpios", "#gpio-cells", index,
-                                          &gpio_np, &gpio_spec);
-        if (err) {
-                pr_debug("%s: can't parse gpios property\n", __func__);
+        err = of_get_gpio(np, index);
+        if (err < 0)
+                goto err0;
+        gc = gpio_to_chip(err);
+        if (WARN_ON(!gc))
                 goto err0;
-        }
 
-        if (!of_device_is_compatible(gpio_np, "fsl,mpc8323-qe-pario-bank")) {
+        if (!of_device_is_compatible(gc->of_node, "fsl,mpc8323-qe-pario-bank")) {
                 pr_debug("%s: tried to get a non-qe pin\n", __func__);
                 err = -EINVAL;
-                goto err1;
-        }
-
-        gc = of_node_to_gpiochip(gpio_np);
-        if (!gc) {
-                pr_debug("%s: gpio controller %s isn't registered\n",
-                         np->full_name, gpio_np->full_name);
-                err = -ENODEV;
-                goto err1;
-        }
-
-        gpio_cells = of_get_property(gpio_np, "#gpio-cells", &size);
-        if (!gpio_cells || size != sizeof(*gpio_cells) ||
-                        *gpio_cells != gc->of_gpio_n_cells) {
-                pr_debug("%s: wrong #gpio-cells for %s\n",
-                         np->full_name, gpio_np->full_name);
-                err = -EINVAL;
-                goto err1;
+                goto err0;
         }
 
-        err = gc->of_xlate(gc, np, gpio_spec, NULL);
-        if (err < 0)
-                goto err1;
-
         mm_gc = to_of_mm_gpio_chip(gc);
         qe_gc = to_qe_gpio_chip(mm_gc);
 
         spin_lock_irqsave(&qe_gc->lock, flags);
 
+        err -= gc->base;
         if (test_and_set_bit(QE_PIN_REQUESTED, &qe_gc->pin_flags[err]) == 0) {
                 qe_pin->controller = qe_gc;
                 qe_pin->num = err;
@@ -206,8 +182,6 @@ struct qe_pin *qe_pin_request(struct device_node *np, int index)
 
         if (!err)
                 return qe_pin;
-err1:
-        of_node_put(gpio_np);
 err0:
         kfree(qe_pin);
         pr_debug("%s failed with status %d\n", __func__, err);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 3363fbc964f8..ceb09cbd2329 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -216,7 +216,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
         /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
            that the BRG divisor must be even if you're not using divide-by-16
            mode. */
-        if (!div16 && (divisor & 1))
+        if (!div16 && (divisor & 1) && (divisor > 3))
                 divisor++;
 
         tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 18e75ca19fe6..73034bd203c4 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -22,7 +22,6 @@
 #include <linux/stddef.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
-#include <linux/sysdev.h>
 #include <linux/device.h>
 #include <linux/bootmem.h>
 #include <linux/spinlock.h>
@@ -484,13 +483,14 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high)
         return 0;
 }
 
-static struct sysdev_class qe_ic_sysclass = {
+static struct bus_type qe_ic_subsys = {
         .name = "qe_ic",
+        .dev_name = "qe_ic",
 };
 
-static struct sys_device device_qe_ic = {
+static struct device device_qe_ic = {
         .id = 0,
-        .cls = &qe_ic_sysclass,
+        .bus = &qe_ic_subsys,
 };
 
 static int __init init_qe_ic_sysfs(void)
@@ -499,12 +499,12 @@ static int __init init_qe_ic_sysfs(void)
 
         printk(KERN_DEBUG "Registering qe_ic with sysfs...\n");
 
-        rc = sysdev_class_register(&qe_ic_sysclass);
+        rc = subsys_system_register(&qe_ic_subsys, NULL);
         if (rc) {
                 printk(KERN_ERR "Failed registering qe_ic sys class\n");
                 return -ENODEV;
         }
-        rc = sysdev_register(&device_qe_ic);
+        rc = device_register(&device_qe_ic);
         if (rc) {
                 printk(KERN_ERR "Failed registering qe_ic sys device\n");
                 return -ENODEV;
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 3330feca7502..063c901b1265 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -18,7 +18,6 @@
 #include <linux/stddef.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
-#include <linux/sysdev.h>
 #include <linux/device.h>
 #include <linux/bootmem.h>
 #include <linux/spinlock.h>
diff --git a/arch/powerpc/sysdev/xics/icp-hv.c b/arch/powerpc/sysdev/xics/icp-hv.c
index 9518d367a64f..253dce98c16e 100644
--- a/arch/powerpc/sysdev/xics/icp-hv.c
+++ b/arch/powerpc/sysdev/xics/icp-hv.c
@@ -27,33 +27,50 @@ static inline unsigned int icp_hv_get_xirr(unsigned char cppr)
 {
         unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
         long rc;
+        unsigned int ret = XICS_IRQ_SPURIOUS;
 
         rc = plpar_hcall(H_XIRR, retbuf, cppr);
-        if (rc != H_SUCCESS)
-                panic(" bad return code xirr - rc = %lx\n", rc);
-        return (unsigned int)retbuf[0];
-}
+        if (rc == H_SUCCESS) {
+                ret = (unsigned int)retbuf[0];
+        } else {
+                pr_err("%s: bad return code xirr cppr=0x%x returned %ld\n",
+                        __func__, cppr, rc);
+                WARN_ON_ONCE(1);
+        }
 
-static inline void icp_hv_set_xirr(unsigned int value)
-{
-        long rc = plpar_hcall_norets(H_EOI, value);
-        if (rc != H_SUCCESS)
-                panic("bad return code EOI - rc = %ld, value=%x\n", rc, value);
+        return ret;
 }
 
 static inline void icp_hv_set_cppr(u8 value)
 {
         long rc = plpar_hcall_norets(H_CPPR, value);
-        if (rc != H_SUCCESS)
-                panic("bad return code cppr - rc = %lx\n", rc);
+        if (rc != H_SUCCESS) {
+                pr_err("%s: bad return code cppr cppr=0x%x returned %ld\n",
+                        __func__, value, rc);
+                WARN_ON_ONCE(1);
+        }
+}
+
+static inline void icp_hv_set_xirr(unsigned int value)
+{
+        long rc = plpar_hcall_norets(H_EOI, value);
+        if (rc != H_SUCCESS) {
+                pr_err("%s: bad return code eoi xirr=0x%x returned %ld\n",
+                        __func__, value, rc);
+                WARN_ON_ONCE(1);
+                icp_hv_set_cppr(value >> 24);
+        }
 }
 
 static inline void icp_hv_set_qirr(int n_cpu , u8 value)
 {
-        long rc = plpar_hcall_norets(H_IPI, get_hard_smp_processor_id(n_cpu),
-                                     value);
-        if (rc != H_SUCCESS)
-                panic("bad return code qirr - rc = %lx\n", rc);
+        int hw_cpu = get_hard_smp_processor_id(n_cpu);
+        long rc = plpar_hcall_norets(H_IPI, hw_cpu, value);
+        if (rc != H_SUCCESS) {
+                pr_err("%s: bad return code qirr cpu=%d hw_cpu=%d mfrr=0x%x "
+                        "returned %ld\n", __func__, n_cpu, hw_cpu, value, rc);
+                WARN_ON_ONCE(1);
+        }
 }
 
 static void icp_hv_eoi(struct irq_data *d)
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
index 63762c672a03..d72eda6a4c05 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -137,7 +137,7 @@ static void xics_request_ipi(void)
          * IPIs are marked IRQF_PERCPU. The handler was set in map.
          */
         BUG_ON(request_irq(ipi, icp_ops->ipi_action,
-                           IRQF_PERCPU, "IPI", NULL));
+                           IRQF_PERCPU | IRQF_NO_THREAD, "IPI", NULL));
 }
 
 int __init xics_smp_probe(void)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 03a217ae3be0..cb95eea74d3d 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -228,13 +228,11 @@ Commands:\n\
   t     print backtrace\n\
   x     exit monitor and recover\n\
   X     exit monitor and dont recover\n"
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
 "  u    dump segment table or SLB\n"
-#endif
-#ifdef CONFIG_PPC_STD_MMU_32
+#elif defined(CONFIG_PPC_STD_MMU_32)
 "  u    dump segment registers\n"
-#endif
-#ifdef CONFIG_44x
+#elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
 "  u    dump TLB\n"
 #endif
 "  ?    help\n"
@@ -340,7 +338,7 @@ int cpus_are_in_xmon(void)
 
 static inline int unrecoverable_excp(struct pt_regs *regs)
 {
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOK3E)
+#if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
         /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
         return 0;
 #else
@@ -885,13 +883,11 @@ cmds(struct pt_regs *excp)
                 case 'u':
                         dump_segments();
                         break;
-#endif
-#ifdef CONFIG_4xx
+#elif defined(CONFIG_4xx)
                 case 'u':
                         dump_tlb_44x();
                         break;
-#endif
-#ifdef CONFIG_PPC_BOOK3E
+#elif defined(CONFIG_PPC_BOOK3E)
                 case 'u':
                         dump_tlb_book3e();
                         break;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 373679b3744a..28d183c42751 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -87,11 +87,13 @@ config S390
         select HAVE_KERNEL_LZMA
         select HAVE_KERNEL_LZO
         select HAVE_KERNEL_XZ
-        select HAVE_GET_USER_PAGES_FAST
         select HAVE_ARCH_MUTEX_CPU_RELAX
         select HAVE_ARCH_JUMP_LABEL if !MARCH_G5
         select HAVE_RCU_TABLE_FREE if SMP
         select ARCH_SAVE_PAGE_KEYS if HIBERNATION
+        select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
+        select ARCH_DISCARD_MEMBLOCK
         select ARCH_INLINE_SPIN_TRYLOCK
         select ARCH_INLINE_SPIN_TRYLOCK_BH
         select ARCH_INLINE_SPIN_LOCK
@@ -345,9 +347,6 @@ config WARN_DYNAMIC_STACK
 
           Say N if you are unsure.
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 comment "Kernel preemption"
 
 source "kernel/Kconfig.preempt"
diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c
index 92f1cb745d69..4de031d6b76c 100644
--- a/arch/s390/appldata/appldata_os.c
+++ b/arch/s390/appldata/appldata_os.c
@@ -115,21 +115,21 @@ static void appldata_get_os_data(void *data)
         j = 0;
         for_each_online_cpu(i) {
                 os_data->os_cpu[j].per_cpu_user =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.user);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_USER]);
                 os_data->os_cpu[j].per_cpu_nice =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.nice);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_NICE]);
                 os_data->os_cpu[j].per_cpu_system =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.system);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_SYSTEM]);
                 os_data->os_cpu[j].per_cpu_idle =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.idle);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_IDLE]);
                 os_data->os_cpu[j].per_cpu_irq =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.irq);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_IRQ]);
                 os_data->os_cpu[j].per_cpu_softirq =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.softirq);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_SOFTIRQ]);
                 os_data->os_cpu[j].per_cpu_iowait =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.iowait);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_IOWAIT]);
                 os_data->os_cpu[j].per_cpu_steal =
-                        cputime_to_jiffies(kstat_cpu(i).cpustat.steal);
+                        cputime_to_jiffies(kcpustat_cpu(i).cpustat[CPUTIME_STEAL]);
                 os_data->os_cpu[j].cpu_id = i;
                 j++;
         }
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index 481f4f76f664..8a2a887478cc 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -97,7 +97,7 @@ static void hypfs_delete_tree(struct dentry *root)
         }
 }
 
-static struct inode *hypfs_make_inode(struct super_block *sb, int mode)
+static struct inode *hypfs_make_inode(struct super_block *sb, umode_t mode)
 {
         struct inode *ret = new_inode(sb);
 
@@ -107,7 +107,7 @@ static struct inode *hypfs_make_inode(struct super_block *sb, int mode)
                 ret->i_uid = hypfs_info->uid;
                 ret->i_gid = hypfs_info->gid;
                 ret->i_atime = ret->i_mtime = ret->i_ctime = CURRENT_TIME;
-                if (mode & S_IFDIR)
+                if (S_ISDIR(mode))
                         set_nlink(ret, 2);
         }
         return ret;
@@ -259,9 +259,9 @@ static int hypfs_parse_options(char *options, struct super_block *sb)
         return 0;
 }
 
-static int hypfs_show_options(struct seq_file *s, struct vfsmount *mnt)
+static int hypfs_show_options(struct seq_file *s, struct dentry *root)
 {
-        struct hypfs_sb_info *hypfs_info = mnt->mnt_sb->s_fs_info;
+        struct hypfs_sb_info *hypfs_info = root->d_sb->s_fs_info;
 
         seq_printf(s, ",uid=%u", hypfs_info->uid);
         seq_printf(s, ",gid=%u", hypfs_info->gid);
@@ -333,7 +333,7 @@ static void hypfs_kill_super(struct super_block *sb)
 
 static struct dentry *hypfs_create_file(struct super_block *sb,
                                         struct dentry *parent, const char *name,
-                                        char *data, mode_t mode)
+                                        char *data, umode_t mode)
 {
         struct dentry *dentry;
         struct inode *inode;
@@ -350,13 +350,13 @@ static struct dentry *hypfs_create_file(struct super_block *sb,
                 dentry = ERR_PTR(-ENOMEM);
                 goto fail;
         }
-        if (mode & S_IFREG) {
+        if (S_ISREG(mode)) {
                 inode->i_fop = &hypfs_file_ops;
                 if (data)
                         inode->i_size = strlen(data);
                 else
                         inode->i_size = 0;
-        } else if (mode & S_IFDIR) {
+        } else if (S_ISDIR(mode)) {
                 inode->i_op = &simple_dir_inode_operations;
                 inode->i_fop = &simple_dir_operations;
                 inc_nlink(parent->d_inode);
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 081434878296..c23c3900c304 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -16,114 +16,100 @@
 
 /* We want to use full resolution of the CPU timer: 2**-12 micro-seconds. */
 
-typedef unsigned long long cputime_t;
-typedef unsigned long long cputime64_t;
+typedef unsigned long long __nocast cputime_t;
+typedef unsigned long long __nocast cputime64_t;
 
-#ifndef __s390x__
-
-static inline unsigned int
-__div(unsigned long long n, unsigned int base)
+static inline unsigned long __div(unsigned long long n, unsigned long base)
 {
+#ifndef __s390x__
         register_pair rp;
 
         rp.pair = n >> 1;
         asm ("dr %0,%1" : "+d" (rp) : "d" (base >> 1));
         return rp.subreg.odd;
+#else /* __s390x__ */
+        return n / base;
+#endif /* __s390x__ */
 }
 
-#else /* __s390x__ */
+#define cputime_one_jiffy               jiffies_to_cputime(1)
+
+/*
+ * Convert cputime to jiffies and back.
+ */
+static inline unsigned long cputime_to_jiffies(const cputime_t cputime)
+{
+        return __div((__force unsigned long long) cputime, 4096000000ULL / HZ);
+}
 
-static inline unsigned int
-__div(unsigned long long n, unsigned int base)
+static inline cputime_t jiffies_to_cputime(const unsigned int jif)
 {
-        return n / base;
+        return (__force cputime_t)(jif * (4096000000ULL / HZ));
 }
 
-#endif /* __s390x__ */
+static inline u64 cputime64_to_jiffies64(cputime64_t cputime)
+{
+        unsigned long long jif = (__force unsigned long long) cputime;
+        do_div(jif, 4096000000ULL / HZ);
+        return jif;
+}
 
-#define cputime_zero                    (0ULL)
-#define cputime_one_jiffy               jiffies_to_cputime(1)
-#define cputime_max                     ((~0UL >> 1) - 1)
-#define cputime_add(__a, __b)           ((__a) +  (__b))
-#define cputime_sub(__a, __b)           ((__a) -  (__b))
-#define cputime_div(__a, __n) ({                \
-        unsigned long long __div = (__a);       \
-        do_div(__div,__n);                      \
-        __div;                                  \
-})
-#define cputime_halve(__a)              ((__a) >> 1)
-#define cputime_eq(__a, __b)            ((__a) == (__b))
-#define cputime_gt(__a, __b)            ((__a) >  (__b))
-#define cputime_ge(__a, __b)            ((__a) >= (__b))
-#define cputime_lt(__a, __b)            ((__a) <  (__b))
-#define cputime_le(__a, __b)            ((__a) <= (__b))
-#define cputime_to_jiffies(__ct)        (__div((__ct), 4096000000ULL / HZ))
-#define cputime_to_scaled(__ct)         (__ct)
-#define jiffies_to_cputime(__hz)        ((cputime_t)(__hz) * (4096000000ULL / HZ))
-
-#define cputime64_zero                  (0ULL)
-#define cputime64_add(__a, __b)         ((__a) + (__b))
-#define cputime_to_cputime64(__ct)      (__ct)
-
-static inline u64
-cputime64_to_jiffies64(cputime64_t cputime)
-{
-        do_div(cputime, 4096000000ULL / HZ);
-        return cputime;
+static inline cputime64_t jiffies64_to_cputime64(const u64 jif)
+{
+        return (__force cputime64_t)(jif * (4096000000ULL / HZ));
 }
 
 /*
  * Convert cputime to microseconds and back.
  */
-static inline unsigned int
-cputime_to_usecs(const cputime_t cputime)
+static inline unsigned int cputime_to_usecs(const cputime_t cputime)
 {
-        return cputime_div(cputime, 4096);
+        return (__force unsigned long long) cputime >> 12;
 }
 
-static inline cputime_t
-usecs_to_cputime(const unsigned int m)
+static inline cputime_t usecs_to_cputime(const unsigned int m)
 {
-        return (cputime_t) m * 4096;
+        return (__force cputime_t)(m * 4096ULL);
 }
 
+#define usecs_to_cputime64(m)           usecs_to_cputime(m)
+
 /*
  * Convert cputime to milliseconds and back.
  */
-static inline unsigned int
-cputime_to_secs(const cputime_t cputime)
+static inline unsigned int cputime_to_secs(const cputime_t cputime)
 {
-        return __div(cputime, 2048000000) >> 1;
+        return __div((__force unsigned long long) cputime, 2048000000) >> 1;
 }
 
-static inline cputime_t
-secs_to_cputime(const unsigned int s)
+static inline cputime_t secs_to_cputime(const unsigned int s)
 {
-        return (cputime_t) s * 4096000000ULL;
+        return (__force cputime_t)(s * 4096000000ULL);
 }
 
 /*
  * Convert cputime to timespec and back.
  */
-static inline cputime_t
-timespec_to_cputime(const struct timespec *value)
+static inline cputime_t timespec_to_cputime(const struct timespec *value)
 {
-        return value->tv_nsec * 4096 / 1000 + (u64) value->tv_sec * 4096000000ULL;
+        unsigned long long ret = value->tv_sec * 4096000000ULL;
+        return (__force cputime_t)(ret + value->tv_nsec * 4096 / 1000);
 }
 
-static inline void
-cputime_to_timespec(const cputime_t cputime, struct timespec *value)
+static inline void cputime_to_timespec(const cputime_t cputime,
+                                       struct timespec *value)
 {
+        unsigned long long __cputime = (__force unsigned long long) cputime;
 #ifndef __s390x__
         register_pair rp;
 
-        rp.pair = cputime >> 1;
+        rp.pair = __cputime >> 1;
         asm ("dr %0,%1" : "+d" (rp) : "d" (2048000000UL));
         value->tv_nsec = rp.subreg.even * 1000 / 4096;
         value->tv_sec = rp.subreg.odd;
 #else
-        value->tv_nsec = (cputime % 4096000000ULL) * 1000 / 4096;
-        value->tv_sec = cputime / 4096000000ULL;
+        value->tv_nsec = (__cputime % 4096000000ULL) * 1000 / 4096;
+        value->tv_sec = __cputime / 4096000000ULL;
 #endif
 }
 
@@ -132,50 +118,52 @@ cputime_to_timespec(const cputime_t cputime, struct timespec *value)
  * Since cputime and timeval have the same resolution (microseconds)
  * this is easy.
  */
-static inline cputime_t
-timeval_to_cputime(const struct timeval *value)
+static inline cputime_t timeval_to_cputime(const struct timeval *value)
 {
-        return value->tv_usec * 4096 + (u64) value->tv_sec * 4096000000ULL;
+        unsigned long long ret = value->tv_sec * 4096000000ULL;
+        return (__force cputime_t)(ret + value->tv_usec * 4096ULL);
 }
 
-static inline void
-cputime_to_timeval(const cputime_t cputime, struct timeval *value)
+static inline void cputime_to_timeval(const cputime_t cputime,
+                                      struct timeval *value)
 {
+        unsigned long long __cputime = (__force unsigned long long) cputime;
 #ifndef __s390x__
         register_pair rp;
 
-        rp.pair = cputime >> 1;
+        rp.pair = __cputime >> 1;
         asm ("dr %0,%1" : "+d" (rp) : "d" (2048000000UL));
         value->tv_usec = rp.subreg.even / 4096;
         value->tv_sec = rp.subreg.odd;
 #else
-        value->tv_usec = (cputime % 4096000000ULL) / 4096;
-        value->tv_sec = cputime / 4096000000ULL;
+        value->tv_usec = (__cputime % 4096000000ULL) / 4096;
+        value->tv_sec = __cputime / 4096000000ULL;
 #endif
 }
 
 /*
  * Convert cputime to clock and back.
  */
-static inline clock_t
-cputime_to_clock_t(cputime_t cputime)
+static inline clock_t cputime_to_clock_t(cputime_t cputime)
 {
-        return cputime_div(cputime, 4096000000ULL / USER_HZ);
+        unsigned long long clock = (__force unsigned long long) cputime;
+        do_div(clock, 4096000000ULL / USER_HZ);
+        return clock;
 }
 
-static inline cputime_t
-clock_t_to_cputime(unsigned long x)
+static inline cputime_t clock_t_to_cputime(unsigned long x)
 {
-        return (cputime_t) x * (4096000000ULL / USER_HZ);
+        return (__force cputime_t)(x * (4096000000ULL / USER_HZ));
 }
 
 /*
  * Convert cputime64 to clock.
  */
-static inline clock_t
-cputime64_to_clock_t(cputime64_t cputime)
+static inline clock_t cputime64_to_clock_t(cputime64_t cputime)
 {
-       return cputime_div(cputime, 4096000000ULL / USER_HZ);
+        unsigned long long clock = (__force unsigned long long) cputime;
+        do_div(clock, 4096000000ULL / USER_HZ);
+        return clock;
 }
 
 struct s390_idle_data {
diff --git a/arch/s390/include/asm/debug.h b/arch/s390/include/asm/debug.h
index 18124b75a7ab..9d88db1f55d0 100644
--- a/arch/s390/include/asm/debug.h
+++ b/arch/s390/include/asm/debug.h
@@ -73,7 +73,7 @@ typedef struct debug_info {
         struct dentry* debugfs_entries[DEBUG_MAX_VIEWS];
         struct debug_view* views[DEBUG_MAX_VIEWS];      
         char name[DEBUG_MAX_NAME_LEN];
-        mode_t mode;
+        umode_t mode;
 } debug_info_t;
 
 typedef int (debug_header_proc_t) (debug_info_t* id,
@@ -124,7 +124,7 @@ debug_info_t *debug_register(const char *name, int pages, int nr_areas,
                              int buf_size);
 
 debug_info_t *debug_register_mode(const char *name, int pages, int nr_areas,
-                                  int buf_size, mode_t mode, uid_t uid,
+                                  int buf_size, umode_t mode, uid_t uid,
                                   gid_t gid);
 
 void debug_unregister(debug_info_t* id);
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index 24e18473d926..b0c235cb6ad5 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -47,7 +47,7 @@ struct sca_block {
 #define KVM_HPAGE_MASK(x)       (~(KVM_HPAGE_SIZE(x) - 1))
 #define KVM_PAGES_PER_HPAGE(x)  (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
 
-#define CPUSTAT_HOST       0x80000000
+#define CPUSTAT_STOPPED    0x80000000
 #define CPUSTAT_WAIT       0x10000000
 #define CPUSTAT_ECALL_PEND 0x08000000
 #define CPUSTAT_STOP_INT   0x04000000
@@ -139,6 +139,7 @@ struct kvm_vcpu_stat {
         u32 instruction_stfl;
         u32 instruction_tprot;
         u32 instruction_sigp_sense;
+        u32 instruction_sigp_sense_running;
         u32 instruction_sigp_external_call;
         u32 instruction_sigp_emergency;
         u32 instruction_sigp_stop;
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 524d23b8610c..4f289ff0b7fe 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -599,10 +599,10 @@ static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
         skey = page_get_storage_key(address);
         bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
         /* Clear page changed & referenced bit in the storage key */
-        if (bits) {
-                skey ^= bits;
-                page_set_storage_key(address, skey, 1);
-        }
+        if (bits & _PAGE_CHANGED)
+                page_set_storage_key(address, skey ^ bits, 1);
+        else if (bits)
+                page_reset_referenced(address);
         /* Transfer page changed & referenced bit to guest bits in pgste */
         pgste_val(pgste) |= bits << 48;         /* RCP_GR_BIT & RCP_GC_BIT */
         /* Get host changed & referenced bits from pgste */
diff --git a/arch/s390/include/asm/socket.h b/arch/s390/include/asm/socket.h
index fdff1e995c73..67b5c1b14b51 100644
--- a/arch/s390/include/asm/socket.h
+++ b/arch/s390/include/asm/socket.h
@@ -70,4 +70,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index a23183423b14..a73038155e0d 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -102,7 +102,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     19      /* restore signal mask in do_signal() */
 #define TIF_SINGLE_STEP         20      /* This task is single stepped */
-#define TIF_FREEZE              21      /* thread is freezing for suspend */
 
 #define _TIF_SYSCALL            (1<<TIF_SYSCALL)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
@@ -119,7 +118,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_31BIT              (1<<TIF_31BIT)
 #define _TIF_SINGLE_STEP        (1<<TIF_SINGLE_STEP)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #ifdef CONFIG_64BIT
 #define is_32bit_task()         (test_thread_flag(TIF_31BIT))
diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h
index eeb52ccf499f..05ebbcdbbf6b 100644
--- a/arch/s390/include/asm/types.h
+++ b/arch/s390/include/asm/types.h
@@ -13,8 +13,6 @@
 
 #ifndef __ASSEMBLY__
 
-typedef unsigned short umode_t;
-
 /* A address type so that arithmetic can be done on it & it can be upgraded to
    64 bit when necessary 
 */
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index 5ad6bc078bfd..6848828b962e 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -74,7 +74,7 @@ static ssize_t debug_input(struct file *file, const char __user *user_buf,
 static int debug_open(struct inode *inode, struct file *file);
 static int debug_close(struct inode *inode, struct file *file);
 static debug_info_t *debug_info_create(const char *name, int pages_per_area,
-                        int nr_areas, int buf_size, mode_t mode);
+                        int nr_areas, int buf_size, umode_t mode);
 static void debug_info_get(debug_info_t *);
 static void debug_info_put(debug_info_t *);
 static int debug_prolog_level_fn(debug_info_t * id,
@@ -330,7 +330,7 @@ debug_info_free(debug_info_t* db_info){
 
 static debug_info_t*
 debug_info_create(const char *name, int pages_per_area, int nr_areas,
-                  int buf_size, mode_t mode)
+                  int buf_size, umode_t mode)
 {
         debug_info_t* rc;
 
@@ -688,7 +688,7 @@ debug_close(struct inode *inode, struct file *file)
  */
 
 debug_info_t *debug_register_mode(const char *name, int pages_per_area,
-                                  int nr_areas, int buf_size, mode_t mode,
+                                  int nr_areas, int buf_size, umode_t mode,
                                   uid_t uid, gid_t gid)
 {
         debug_info_t *rc = NULL;
@@ -1090,7 +1090,7 @@ debug_register_view(debug_info_t * id, struct debug_view *view)
         int rc = 0;
         int i;
         unsigned long flags;
-        mode_t mode;
+        umode_t mode;
         struct dentry *pde;
 
         if (!id)
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 9451b210a1b4..3201ae447990 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -91,10 +91,12 @@ static void default_idle(void)
 void cpu_idle(void)
 {
         for (;;) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched())
                         default_idle();
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 450931a45b68..573bc29551ef 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -296,13 +296,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
                      ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))))
                         /* Invalid psw mask. */
                         return -EINVAL;
-                if (addr == (addr_t) &dummy->regs.psw.addr)
-                        /*
-                         * The debugger changed the instruction address,
-                         * reset system call restart, see signal.c:do_signal
-                         */
-                        task_thread_info(child)->system_call = 0;
-
                 *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
 
         } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) {
@@ -614,11 +607,6 @@ static int __poke_user_compat(struct task_struct *child,
                         /* Transfer 31 bit amode bit to psw mask. */
                         regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) |
                                 (__u64)(tmp & PSW32_ADDR_AMODE);
-                        /*
-                         * The debugger changed the instruction address,
-                         * reset system call restart, see signal.c:do_signal
-                         */
-                        task_thread_info(child)->system_call = 0;
                 } else {
                         /* gpr 0-15 */
                         *(__u32*)((addr_t) &regs->psw + addr*2 + 4) = tmp;
@@ -905,6 +893,14 @@ static int s390_last_break_get(struct task_struct *target,
         return 0;
 }
 
+static int s390_last_break_set(struct task_struct *target,
+                               const struct user_regset *regset,
+                               unsigned int pos, unsigned int count,
+                               const void *kbuf, const void __user *ubuf)
+{
+        return 0;
+}
+
 #endif
 
 static int s390_system_call_get(struct task_struct *target,
@@ -951,6 +947,7 @@ static const struct user_regset s390_regsets[] = {
                 .size = sizeof(long),
                 .align = sizeof(long),
                 .get = s390_last_break_get,
+                .set = s390_last_break_set,
         },
 #endif
         [REGSET_SYSTEM_CALL] = {
@@ -1116,6 +1113,14 @@ static int s390_compat_last_break_get(struct task_struct *target,
         return 0;
 }
 
+static int s390_compat_last_break_set(struct task_struct *target,
+                                      const struct user_regset *regset,
+                                      unsigned int pos, unsigned int count,
+                                      const void *kbuf, const void __user *ubuf)
+{
+        return 0;
+}
+
 static const struct user_regset s390_compat_regsets[] = {
         [REGSET_GENERAL] = {
                 .core_note_type = NT_PRSTATUS,
@@ -1139,6 +1144,7 @@ static const struct user_regset s390_compat_regsets[] = {
                 .size = sizeof(long),
                 .align = sizeof(long),
                 .get = s390_compat_last_break_get,
+                .set = s390_compat_last_break_set,
         },
         [REGSET_SYSTEM_CALL] = {
                 .core_note_type = NT_S390_SYSTEM_CALL,
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index e58a462949b1..f11d1b037c50 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -21,6 +21,7 @@
 #include <linux/module.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
+#include <linux/memblock.h>
 #include <linux/mm.h>
 #include <linux/stddef.h>
 #include <linux/unistd.h>
@@ -579,7 +580,7 @@ static unsigned long __init find_crash_base(unsigned long crash_size,
                 *msg = "first memory chunk must be at least crashkernel size";
                 return 0;
         }
-        if (is_kdump_kernel() && (crash_size == OLDMEM_SIZE))
+        if (OLDMEM_BASE && crash_size == OLDMEM_SIZE)
                 return OLDMEM_BASE;
 
         for (i = MEMORY_CHUNKS - 1; i >= 0; i--) {
@@ -820,7 +821,8 @@ setup_memory(void)
                 end_chunk = min(end_chunk, end_pfn);
                 if (start_chunk >= end_chunk)
                         continue;
-                add_active_range(0, start_chunk, end_chunk);
+                memblock_add_node(PFN_PHYS(start_chunk),
+                                  PFN_PHYS(end_chunk - start_chunk), 0);
                 pfn = max(start_chunk, start_pfn);
                 for (; pfn < end_chunk; pfn++)
                         page_set_storage_key(PFN_PHYS(pfn),
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 05a85bc14c98..7f6f9f354545 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -460,9 +460,9 @@ void do_signal(struct pt_regs *regs)
                                                      regs->svc_code >> 16);
                                 break;
                         }
-                        /* No longer in a system call */
-                        clear_thread_flag(TIF_SYSCALL);
                 }
+                /* No longer in a system call */
+                clear_thread_flag(TIF_SYSCALL);
 
                 if ((is_compat_task() ?
                      handle_signal32(signr, &ka, &info, oldset, regs) :
@@ -486,6 +486,7 @@ void do_signal(struct pt_regs *regs)
         }
 
         /* No handlers present - check for system call restart */
+        clear_thread_flag(TIF_SYSCALL);
         if (current_thread_info()->system_call) {
                 regs->svc_code = current_thread_info()->system_call;
                 switch (regs->gprs[2]) {
@@ -500,9 +501,6 @@ void do_signal(struct pt_regs *regs)
                         regs->gprs[2] = regs->orig_gpr2;
                         set_thread_flag(TIF_SYSCALL);
                         break;
-                default:
-                        clear_thread_flag(TIF_SYSCALL);
-                        break;
                 }
         }
 
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 3ea872890da2..66cca03c0282 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -831,8 +831,8 @@ int setup_profiling_timer(unsigned int multiplier)
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-static ssize_t cpu_configure_show(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t cpu_configure_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         ssize_t count;
 
@@ -842,8 +842,8 @@ static ssize_t cpu_configure_show(struct sys_device *dev,
         return count;
 }
 
-static ssize_t cpu_configure_store(struct sys_device *dev,
-                                  struct sysdev_attribute *attr,
+static ssize_t cpu_configure_store(struct device *dev,
+                                  struct device_attribute *attr,
                                   const char *buf, size_t count)
 {
         int cpu = dev->id;
@@ -889,11 +889,11 @@ out:
         put_online_cpus();
         return rc ? rc : count;
 }
-static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
+static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
 #endif /* CONFIG_HOTPLUG_CPU */
 
-static ssize_t cpu_polarization_show(struct sys_device *dev,
-                                     struct sysdev_attribute *attr, char *buf)
+static ssize_t cpu_polarization_show(struct device *dev,
+                                     struct device_attribute *attr, char *buf)
 {
         int cpu = dev->id;
         ssize_t count;
@@ -919,22 +919,22 @@ static ssize_t cpu_polarization_show(struct sys_device *dev,
         mutex_unlock(&smp_cpu_state_mutex);
         return count;
 }
-static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
+static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL);
 
-static ssize_t show_cpu_address(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_cpu_address(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
 }
-static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
+static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
 
 
 static struct attribute *cpu_common_attrs[] = {
 #ifdef CONFIG_HOTPLUG_CPU
-        &attr_configure.attr,
+        &dev_attr_configure.attr,
 #endif
-        &attr_address.attr,
-        &attr_polarization.attr,
+        &dev_attr_address.attr,
+        &dev_attr_polarization.attr,
         NULL,
 };
 
@@ -942,8 +942,8 @@ static struct attribute_group cpu_common_attr_group = {
         .attrs = cpu_common_attrs,
 };
 
-static ssize_t show_capability(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_capability(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         unsigned int capability;
         int rc;
@@ -953,10 +953,10 @@ static ssize_t show_capability(struct sys_device *dev,
                 return rc;
         return sprintf(buf, "%u\n", capability);
 }
-static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
+static DEVICE_ATTR(capability, 0444, show_capability, NULL);
 
-static ssize_t show_idle_count(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_idle_count(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         struct s390_idle_data *idle;
         unsigned long long idle_count;
@@ -976,10 +976,10 @@ repeat:
                 goto repeat;
         return sprintf(buf, "%llu\n", idle_count);
 }
-static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
+static DEVICE_ATTR(idle_count, 0444, show_idle_count, NULL);
 
-static ssize_t show_idle_time(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_idle_time(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         struct s390_idle_data *idle;
         unsigned long long now, idle_time, idle_enter;
@@ -1001,12 +1001,12 @@ repeat:
                 goto repeat;
         return sprintf(buf, "%llu\n", idle_time >> 12);
 }
-static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
+static DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL);
 
 static struct attribute *cpu_online_attrs[] = {
-        &attr_capability.attr,
-        &attr_idle_count.attr,
-        &attr_idle_time_us.attr,
+        &dev_attr_capability.attr,
+        &dev_attr_idle_count.attr,
+        &dev_attr_idle_time_us.attr,
         NULL,
 };
 
@@ -1019,7 +1019,7 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self,
 {
         unsigned int cpu = (unsigned int)(long)hcpu;
         struct cpu *c = &per_cpu(cpu_devices, cpu);
-        struct sys_device *s = &c->sysdev;
+        struct device *s = &c->dev;
         struct s390_idle_data *idle;
         int err = 0;
 
@@ -1045,7 +1045,7 @@ static struct notifier_block __cpuinitdata smp_cpu_nb = {
 static int __devinit smp_add_present_cpu(int cpu)
 {
         struct cpu *c = &per_cpu(cpu_devices, cpu);
-        struct sys_device *s = &c->sysdev;
+        struct device *s = &c->dev;
         int rc;
 
         c->hotpluggable = 1;
@@ -1098,8 +1098,8 @@ out:
         return rc;
 }
 
-static ssize_t __ref rescan_store(struct sysdev_class *class,
-                                  struct sysdev_class_attribute *attr,
+static ssize_t __ref rescan_store(struct device *dev,
+                                  struct device_attribute *attr,
                                   const char *buf,
                                   size_t count)
 {
@@ -1108,11 +1108,11 @@ static ssize_t __ref rescan_store(struct sysdev_class *class,
         rc = smp_rescan_cpus();
         return rc ? rc : count;
 }
-static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
+static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
 #endif /* CONFIG_HOTPLUG_CPU */
 
-static ssize_t dispatching_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t dispatching_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         ssize_t count;
@@ -1123,8 +1123,8 @@ static ssize_t dispatching_show(struct sysdev_class *class,
         return count;
 }
 
-static ssize_t dispatching_store(struct sysdev_class *dev,
-                                 struct sysdev_class_attribute *attr,
+static ssize_t dispatching_store(struct device *dev,
+                                 struct device_attribute *attr,
                                  const char *buf,
                                  size_t count)
 {
@@ -1148,7 +1148,7 @@ out:
         put_online_cpus();
         return rc ? rc : count;
 }
-static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
+static DEVICE_ATTR(dispatching, 0644, dispatching_show,
                          dispatching_store);
 
 static int __init topology_init(void)
@@ -1159,11 +1159,11 @@ static int __init topology_init(void)
         register_cpu_notifier(&smp_cpu_nb);
 
 #ifdef CONFIG_HOTPLUG_CPU
-        rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
+        rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
         if (rc)
                 return rc;
 #endif
-        rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
+        rc = device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching);
         if (rc)
                 return rc;
         for_each_present_cpu(cpu) {
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index ebbfab3c6e5a..fa02f443f5f6 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -27,7 +27,7 @@
 #include <linux/cpu.h>
 #include <linux/stop_machine.h>
 #include <linux/time.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/smp.h>
@@ -1116,34 +1116,35 @@ out_unlock:
 /*
  * Sysfs interface functions
  */
-static struct sysdev_class etr_sysclass = {
-        .name   = "etr",
+static struct bus_type etr_subsys = {
+        .name           = "etr",
+        .dev_name       = "etr",
 };
 
-static struct sys_device etr_port0_dev = {
+static struct device etr_port0_dev = {
         .id     = 0,
-        .cls    = &etr_sysclass,
+        .bus    = &etr_subsys,
 };
 
-static struct sys_device etr_port1_dev = {
+static struct device etr_port1_dev = {
         .id     = 1,
-        .cls    = &etr_sysclass,
+        .bus    = &etr_subsys,
 };
 
 /*
- * ETR class attributes
+ * ETR subsys attributes
  */
-static ssize_t etr_stepping_port_show(struct sysdev_class *class,
-                                        struct sysdev_class_attribute *attr,
+static ssize_t etr_stepping_port_show(struct device *dev,
+                                        struct device_attribute *attr,
                                         char *buf)
 {
         return sprintf(buf, "%i\n", etr_port0.esw.p);
 }
 
-static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
+static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
 
-static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
-                                        struct sysdev_class_attribute *attr,
+static ssize_t etr_stepping_mode_show(struct device *dev,
+                                        struct device_attribute *attr,
                                         char *buf)
 {
         char *mode_str;
@@ -1157,12 +1158,12 @@ static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
         return sprintf(buf, "%s\n", mode_str);
 }
 
-static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
+static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
 
 /*
  * ETR port attributes
  */
-static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
+static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
 {
         if (dev == &etr_port0_dev)
                 return etr_port0_online ? &etr_port0 : NULL;
@@ -1170,8 +1171,8 @@ static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
                 return etr_port1_online ? &etr_port1 : NULL;
 }
 
-static ssize_t etr_online_show(struct sys_device *dev,
-                                struct sysdev_attribute *attr,
+static ssize_t etr_online_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         unsigned int online;
@@ -1180,8 +1181,8 @@ static ssize_t etr_online_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", online);
 }
 
-static ssize_t etr_online_store(struct sys_device *dev,
-                                struct sysdev_attribute *attr,
+static ssize_t etr_online_store(struct device *dev,
+                                struct device_attribute *attr,
                                 const char *buf, size_t count)
 {
         unsigned int value;
@@ -1218,20 +1219,20 @@ out:
         return count;
 }
 
-static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
+static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
 
-static ssize_t etr_stepping_control_show(struct sys_device *dev,
-                                        struct sysdev_attribute *attr,
+static ssize_t etr_stepping_control_show(struct device *dev,
+                                        struct device_attribute *attr,
                                         char *buf)
 {
         return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
                        etr_eacr.e0 : etr_eacr.e1);
 }
 
-static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
+static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
 
-static ssize_t etr_mode_code_show(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_mode_code_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         if (!etr_port0_online && !etr_port1_online)
                 /* Status word is not uptodate if both ports are offline. */
@@ -1240,10 +1241,10 @@ static ssize_t etr_mode_code_show(struct sys_device *dev,
                        etr_port0.esw.psc0 : etr_port0.esw.psc1);
 }
 
-static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
+static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
 
-static ssize_t etr_untuned_show(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_untuned_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1252,10 +1253,10 @@ static ssize_t etr_untuned_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf1.u);
 }
 
-static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
+static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
 
-static ssize_t etr_network_id_show(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_network_id_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1264,10 +1265,10 @@ static ssize_t etr_network_id_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf1.net_id);
 }
 
-static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
+static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
 
-static ssize_t etr_id_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_id_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1276,10 +1277,10 @@ static ssize_t etr_id_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf1.etr_id);
 }
 
-static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
+static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
 
-static ssize_t etr_port_number_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_port_number_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1288,10 +1289,10 @@ static ssize_t etr_port_number_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf1.etr_pn);
 }
 
-static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
+static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
 
-static ssize_t etr_coupled_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_coupled_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1300,10 +1301,10 @@ static ssize_t etr_coupled_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf3.c);
 }
 
-static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
+static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
 
-static ssize_t etr_local_time_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_local_time_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1312,10 +1313,10 @@ static ssize_t etr_local_time_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf3.blto);
 }
 
-static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
+static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
 
-static ssize_t etr_utc_offset_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t etr_utc_offset_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct etr_aib *aib = etr_aib_from_dev(dev);
 
@@ -1324,64 +1325,64 @@ static ssize_t etr_utc_offset_show(struct sys_device *dev,
         return sprintf(buf, "%i\n", aib->edf3.buo);
 }
 
-static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
+static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
 
-static struct sysdev_attribute *etr_port_attributes[] = {
-        &attr_online,
-        &attr_stepping_control,
-        &attr_state_code,
-        &attr_untuned,
-        &attr_network,
-        &attr_id,
-        &attr_port,
-        &attr_coupled,
-        &attr_local_time,
-        &attr_utc_offset,
+static struct device_attribute *etr_port_attributes[] = {
+        &dev_attr_online,
+        &dev_attr_stepping_control,
+        &dev_attr_state_code,
+        &dev_attr_untuned,
+        &dev_attr_network,
+        &dev_attr_id,
+        &dev_attr_port,
+        &dev_attr_coupled,
+        &dev_attr_local_time,
+        &dev_attr_utc_offset,
         NULL
 };
 
-static int __init etr_register_port(struct sys_device *dev)
+static int __init etr_register_port(struct device *dev)
 {
-        struct sysdev_attribute **attr;
+        struct device_attribute **attr;
         int rc;
 
-        rc = sysdev_register(dev);
+        rc = device_register(dev);
         if (rc)
                 goto out;
         for (attr = etr_port_attributes; *attr; attr++) {
-                rc = sysdev_create_file(dev, *attr);
+                rc = device_create_file(dev, *attr);
                 if (rc)
                         goto out_unreg;
         }
         return 0;
 out_unreg:
         for (; attr >= etr_port_attributes; attr--)
-                sysdev_remove_file(dev, *attr);
-        sysdev_unregister(dev);
+                device_remove_file(dev, *attr);
+        device_unregister(dev);
 out:
         return rc;
 }
 
-static void __init etr_unregister_port(struct sys_device *dev)
+static void __init etr_unregister_port(struct device *dev)
 {
-        struct sysdev_attribute **attr;
+        struct device_attribute **attr;
 
         for (attr = etr_port_attributes; *attr; attr++)
-                sysdev_remove_file(dev, *attr);
-        sysdev_unregister(dev);
+                device_remove_file(dev, *attr);
+        device_unregister(dev);
 }
 
 static int __init etr_init_sysfs(void)
 {
         int rc;
 
-        rc = sysdev_class_register(&etr_sysclass);
+        rc = subsys_system_register(&etr_subsys, NULL);
         if (rc)
                 goto out;
-        rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
+        rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
         if (rc)
-                goto out_unreg_class;
-        rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
+                goto out_unreg_subsys;
+        rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
         if (rc)
                 goto out_remove_stepping_port;
         rc = etr_register_port(&etr_port0_dev);
@@ -1395,11 +1396,11 @@ static int __init etr_init_sysfs(void)
 out_remove_port0:
         etr_unregister_port(&etr_port0_dev);
 out_remove_stepping_mode:
-        sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
+        device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
 out_remove_stepping_port:
-        sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
-out_unreg_class:
-        sysdev_class_unregister(&etr_sysclass);
+        device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
+out_unreg_subsys:
+        bus_unregister(&etr_subsys);
 out:
         return rc;
 }
@@ -1599,14 +1600,15 @@ out_unlock:
 }
 
 /*
- * STP class sysfs interface functions
+ * STP subsys sysfs interface functions
  */
-static struct sysdev_class stp_sysclass = {
-        .name   = "stp",
+static struct bus_type stp_subsys = {
+        .name           = "stp",
+        .dev_name       = "stp",
 };
 
-static ssize_t stp_ctn_id_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_ctn_id_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online)
@@ -1615,10 +1617,10 @@ static ssize_t stp_ctn_id_show(struct sysdev_class *class,
                        *(unsigned long long *) stp_info.ctnid);
 }
 
-static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
+static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
 
-static ssize_t stp_ctn_type_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_ctn_type_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online)
@@ -1626,10 +1628,10 @@ static ssize_t stp_ctn_type_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", stp_info.ctn);
 }
 
-static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
+static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
 
-static ssize_t stp_dst_offset_show(struct sysdev_class *class,
-                                   struct sysdev_class_attribute *attr,
+static ssize_t stp_dst_offset_show(struct device *dev,
+                                   struct device_attribute *attr,
                                    char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x2000))
@@ -1637,10 +1639,10 @@ static ssize_t stp_dst_offset_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
 }
 
-static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
+static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
 
-static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
-                                        struct sysdev_class_attribute *attr,
+static ssize_t stp_leap_seconds_show(struct device *dev,
+                                        struct device_attribute *attr,
                                         char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x8000))
@@ -1648,10 +1650,10 @@ static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
 }
 
-static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
+static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
 
-static ssize_t stp_stratum_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_stratum_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online)
@@ -1659,10 +1661,10 @@ static ssize_t stp_stratum_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
 }
 
-static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
+static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
 
-static ssize_t stp_time_offset_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_time_offset_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x0800))
@@ -1670,10 +1672,10 @@ static ssize_t stp_time_offset_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", (int) stp_info.tto);
 }
 
-static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
+static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
 
-static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_time_zone_offset_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online || !(stp_info.vbits & 0x4000))
@@ -1681,11 +1683,11 @@ static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
 }
 
-static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
+static DEVICE_ATTR(time_zone_offset, 0400,
                          stp_time_zone_offset_show, NULL);
 
-static ssize_t stp_timing_mode_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_timing_mode_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online)
@@ -1693,10 +1695,10 @@ static ssize_t stp_timing_mode_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", stp_info.tmd);
 }
 
-static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
+static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
 
-static ssize_t stp_timing_state_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_timing_state_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         if (!stp_online)
@@ -1704,17 +1706,17 @@ static ssize_t stp_timing_state_show(struct sysdev_class *class,
         return sprintf(buf, "%i\n", stp_info.tst);
 }
 
-static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
+static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
 
-static ssize_t stp_online_show(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_online_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *buf)
 {
         return sprintf(buf, "%i\n", stp_online);
 }
 
-static ssize_t stp_online_store(struct sysdev_class *class,
-                                struct sysdev_class_attribute *attr,
+static ssize_t stp_online_store(struct device *dev,
+                                struct device_attribute *attr,
                                 const char *buf, size_t count)
 {
         unsigned int value;
@@ -1736,47 +1738,47 @@ static ssize_t stp_online_store(struct sysdev_class *class,
 }
 
 /*
- * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
- * stp/online but attr_online already exists in this file ..
+ * Can't use DEVICE_ATTR because the attribute should be named
+ * stp/online but dev_attr_online already exists in this file ..
  */
-static struct sysdev_class_attribute attr_stp_online = {
+static struct device_attribute dev_attr_stp_online = {
         .attr = { .name = "online", .mode = 0600 },
         .show   = stp_online_show,
         .store  = stp_online_store,
 };
 
-static struct sysdev_class_attribute *stp_attributes[] = {
-        &attr_ctn_id,
-        &attr_ctn_type,
-        &attr_dst_offset,
-        &attr_leap_seconds,
-        &attr_stp_online,
-        &attr_stratum,
-        &attr_time_offset,
-        &attr_time_zone_offset,
-        &attr_timing_mode,
-        &attr_timing_state,
+static struct device_attribute *stp_attributes[] = {
+        &dev_attr_ctn_id,
+        &dev_attr_ctn_type,
+        &dev_attr_dst_offset,
+        &dev_attr_leap_seconds,
+        &dev_attr_stp_online,
+        &dev_attr_stratum,
+        &dev_attr_time_offset,
+        &dev_attr_time_zone_offset,
+        &dev_attr_timing_mode,
+        &dev_attr_timing_state,
         NULL
 };
 
 static int __init stp_init_sysfs(void)
 {
-        struct sysdev_class_attribute **attr;
+        struct device_attribute **attr;
         int rc;
 
-        rc = sysdev_class_register(&stp_sysclass);
+        rc = subsys_system_register(&stp_subsys, NULL);
         if (rc)
                 goto out;
         for (attr = stp_attributes; *attr; attr++) {
-                rc = sysdev_class_create_file(&stp_sysclass, *attr);
+                rc = device_create_file(stp_subsys.dev_root, *attr);
                 if (rc)
                         goto out_unreg;
         }
         return 0;
 out_unreg:
         for (; attr >= stp_attributes; attr--)
-                sysdev_class_remove_file(&stp_sysclass, *attr);
-        sysdev_class_unregister(&stp_sysclass);
+                device_remove_file(stp_subsys.dev_root, *attr);
+        bus_unregister(&stp_subsys);
 out:
         return rc;
 }
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index fdb5b8cb260f..6e0e29b29a7b 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -261,7 +261,7 @@ void store_topology(struct sysinfo_15_1_x *info)
 int arch_update_cpu_topology(void)
 {
         struct sysinfo_15_1_x *info = tl_info;
-        struct sys_device *sysdev;
+        struct device *dev;
         int cpu;
 
         if (!MACHINE_HAS_TOPOLOGY) {
@@ -273,8 +273,8 @@ int arch_update_cpu_topology(void)
         tl_to_cores(info);
         update_cpu_core_map();
         for_each_online_cpu(cpu) {
-                sysdev = get_cpu_sysdev(cpu);
-                kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
+                dev = get_cpu_device(cpu);
+                kobject_uevent(&dev->kobj, KOBJ_CHANGE);
         }
         return 1;
 }
diff --git a/arch/s390/kvm/diag.c b/arch/s390/kvm/diag.c
index 87cedd61be04..8943e82cd4d9 100644
--- a/arch/s390/kvm/diag.c
+++ b/arch/s390/kvm/diag.c
@@ -70,7 +70,7 @@ static int __diag_ipl_functions(struct kvm_vcpu *vcpu)
                 return -EOPNOTSUPP;
         }
 
-        atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
+        atomic_set_mask(CPUSTAT_STOPPED, &vcpu->arch.sie_block->cpuflags);
         vcpu->run->s390_reset_flags |= KVM_S390_RESET_SUBSYSTEM;
         vcpu->run->s390_reset_flags |= KVM_S390_RESET_IPL;
         vcpu->run->s390_reset_flags |= KVM_S390_RESET_CPU_INIT;
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index c7c51898984e..02434543eabb 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -132,7 +132,6 @@ static int handle_stop(struct kvm_vcpu *vcpu)
         int rc = 0;
 
         vcpu->stat.exit_stop_request++;
-        atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
         spin_lock_bh(&vcpu->arch.local_int.lock);
         if (vcpu->arch.local_int.action_bits & ACTION_STORE_ON_STOP) {
                 vcpu->arch.local_int.action_bits &= ~ACTION_STORE_ON_STOP;
@@ -149,6 +148,8 @@ static int handle_stop(struct kvm_vcpu *vcpu)
         }
 
         if (vcpu->arch.local_int.action_bits & ACTION_STOP_ON_STOP) {
+                atomic_set_mask(CPUSTAT_STOPPED,
+                                &vcpu->arch.sie_block->cpuflags);
                 vcpu->arch.local_int.action_bits &= ~ACTION_STOP_ON_STOP;
                 VCPU_EVENT(vcpu, 3, "%s", "cpu stopped");
                 rc = -EOPNOTSUPP;
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index 87c16705b381..278ee009ce65 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -252,6 +252,7 @@ static void __do_deliver_interrupt(struct kvm_vcpu *vcpu,
                         offsetof(struct _lowcore, restart_psw), sizeof(psw_t));
                 if (rc == -EFAULT)
                         exception = 1;
+                atomic_clear_mask(CPUSTAT_STOPPED, &vcpu->arch.sie_block->cpuflags);
                 break;
 
         case KVM_S390_PROGRAM_INT:
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 0bd3bea1e4cd..d1c445732451 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -65,6 +65,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "instruction_stfl", VCPU_STAT(instruction_stfl) },
         { "instruction_tprot", VCPU_STAT(instruction_tprot) },
         { "instruction_sigp_sense", VCPU_STAT(instruction_sigp_sense) },
+        { "instruction_sigp_sense_running", VCPU_STAT(instruction_sigp_sense_running) },
         { "instruction_sigp_external_call", VCPU_STAT(instruction_sigp_external_call) },
         { "instruction_sigp_emergency", VCPU_STAT(instruction_sigp_emergency) },
         { "instruction_sigp_stop", VCPU_STAT(instruction_sigp_stop) },
@@ -127,6 +128,7 @@ int kvm_dev_ioctl_check_extension(long ext)
         switch (ext) {
         case KVM_CAP_S390_PSW:
         case KVM_CAP_S390_GMAP:
+        case KVM_CAP_SYNC_MMU:
                 r = 1;
                 break;
         default:
@@ -270,10 +272,12 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
         restore_fp_regs(&vcpu->arch.guest_fpregs);
         restore_access_regs(vcpu->arch.guest_acrs);
         gmap_enable(vcpu->arch.gmap);
+        atomic_set_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
 {
+        atomic_clear_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
         gmap_disable(vcpu->arch.gmap);
         save_fp_regs(&vcpu->arch.guest_fpregs);
         save_access_regs(vcpu->arch.guest_acrs);
@@ -301,7 +305,9 @@ static void kvm_s390_vcpu_initial_reset(struct kvm_vcpu *vcpu)
 
 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
 {
-        atomic_set(&vcpu->arch.sie_block->cpuflags, CPUSTAT_ZARCH | CPUSTAT_SM);
+        atomic_set(&vcpu->arch.sie_block->cpuflags, CPUSTAT_ZARCH |
+                                                    CPUSTAT_SM |
+                                                    CPUSTAT_STOPPED);
         vcpu->arch.sie_block->ecb   = 6;
         vcpu->arch.sie_block->eca   = 0xC1002001U;
         vcpu->arch.sie_block->fac   = (int) (long) facilities;
@@ -428,7 +434,7 @@ static int kvm_arch_vcpu_ioctl_set_initial_psw(struct kvm_vcpu *vcpu, psw_t psw)
 {
         int rc = 0;
 
-        if (atomic_read(&vcpu->arch.sie_block->cpuflags) & CPUSTAT_RUNNING)
+        if (!(atomic_read(&vcpu->arch.sie_block->cpuflags) & CPUSTAT_STOPPED))
                 rc = -EBUSY;
         else {
                 vcpu->run->psw_mask = psw.mask;
@@ -501,7 +507,7 @@ rerun_vcpu:
         if (vcpu->sigset_active)
                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
 
-        atomic_set_mask(CPUSTAT_RUNNING, &vcpu->arch.sie_block->cpuflags);
+        atomic_clear_mask(CPUSTAT_STOPPED, &vcpu->arch.sie_block->cpuflags);
 
         BUG_ON(vcpu->kvm->arch.float_int.local_int[vcpu->vcpu_id] == NULL);
 
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 391626361084..d02638959922 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -336,6 +336,7 @@ static int handle_tprot(struct kvm_vcpu *vcpu)
         u64 address1 = disp1 + base1 ? vcpu->arch.guest_gprs[base1] : 0;
         u64 address2 = disp2 + base2 ? vcpu->arch.guest_gprs[base2] : 0;
         struct vm_area_struct *vma;
+        unsigned long user_address;
 
         vcpu->stat.instruction_tprot++;
 
@@ -349,9 +350,14 @@ static int handle_tprot(struct kvm_vcpu *vcpu)
                 return -EOPNOTSUPP;
 
 
+        /* we must resolve the address without holding the mmap semaphore.
+         * This is ok since the userspace hypervisor is not supposed to change
+         * the mapping while the guest queries the memory. Otherwise the guest
+         * might crash or get wrong info anyway. */
+        user_address = (unsigned long) __guestaddr_to_user(vcpu, address1);
+
         down_read(&current->mm->mmap_sem);
-        vma = find_vma(current->mm,
-                        (unsigned long) __guestaddr_to_user(vcpu, address1));
+        vma = find_vma(current->mm, user_address);
         if (!vma) {
                 up_read(&current->mm->mmap_sem);
                 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c
index f815118835f3..0a7941d74bc6 100644
--- a/arch/s390/kvm/sigp.c
+++ b/arch/s390/kvm/sigp.c
@@ -31,9 +31,11 @@
 #define SIGP_SET_PREFIX        0x0d
 #define SIGP_STORE_STATUS_ADDR 0x0e
 #define SIGP_SET_ARCH          0x12
+#define SIGP_SENSE_RUNNING     0x15
 
 /* cpu status bits */
 #define SIGP_STAT_EQUIPMENT_CHECK   0x80000000UL
+#define SIGP_STAT_NOT_RUNNING       0x00000400UL
 #define SIGP_STAT_INCORRECT_STATE   0x00000200UL
 #define SIGP_STAT_INVALID_PARAMETER 0x00000100UL
 #define SIGP_STAT_EXT_CALL_PENDING  0x00000080UL
@@ -57,8 +59,8 @@ static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr,
         spin_lock(&fi->lock);
         if (fi->local_int[cpu_addr] == NULL)
                 rc = 3; /* not operational */
-        else if (atomic_read(fi->local_int[cpu_addr]->cpuflags)
-                 & CPUSTAT_RUNNING) {
+        else if (!(atomic_read(fi->local_int[cpu_addr]->cpuflags)
+                  & CPUSTAT_STOPPED)) {
                 *reg &= 0xffffffff00000000UL;
                 rc = 1; /* status stored */
         } else {
@@ -251,7 +253,7 @@ static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address,
 
         spin_lock_bh(&li->lock);
         /* cpu must be in stopped state */
-        if (atomic_read(li->cpuflags) & CPUSTAT_RUNNING) {
+        if (!(atomic_read(li->cpuflags) & CPUSTAT_STOPPED)) {
                 rc = 1; /* incorrect state */
                 *reg &= SIGP_STAT_INCORRECT_STATE;
                 kfree(inti);
@@ -275,6 +277,38 @@ out_fi:
         return rc;
 }
 
+static int __sigp_sense_running(struct kvm_vcpu *vcpu, u16 cpu_addr,
+                                unsigned long *reg)
+{
+        int rc;
+        struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
+
+        if (cpu_addr >= KVM_MAX_VCPUS)
+                return 3; /* not operational */
+
+        spin_lock(&fi->lock);
+        if (fi->local_int[cpu_addr] == NULL)
+                rc = 3; /* not operational */
+        else {
+                if (atomic_read(fi->local_int[cpu_addr]->cpuflags)
+                    & CPUSTAT_RUNNING) {
+                        /* running */
+                        rc = 1;
+                } else {
+                        /* not running */
+                        *reg &= 0xffffffff00000000UL;
+                        *reg |= SIGP_STAT_NOT_RUNNING;
+                        rc = 0;
+                }
+        }
+        spin_unlock(&fi->lock);
+
+        VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x", cpu_addr,
+                   rc);
+
+        return rc;
+}
+
 int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
 {
         int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
@@ -331,6 +365,11 @@ int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
                 rc = __sigp_set_prefix(vcpu, cpu_addr, parameter,
                                        &vcpu->arch.guest_gprs[r1]);
                 break;
+        case SIGP_SENSE_RUNNING:
+                vcpu->stat.instruction_sigp_sense_running++;
+                rc = __sigp_sense_running(vcpu, cpu_addr,
+                                          &vcpu->arch.guest_gprs[r1]);
+                break;
         case SIGP_RESTART:
                 vcpu->stat.instruction_sigp_restart++;
                 /* user space must know about restart */
diff --git a/arch/s390/oprofile/hwsampler.c b/arch/s390/oprofile/hwsampler.c
index f43c0e4282af..9daee91e6c3f 100644
--- a/arch/s390/oprofile/hwsampler.c
+++ b/arch/s390/oprofile/hwsampler.c
@@ -22,6 +22,7 @@
 #include <asm/irq.h>
 
 #include "hwsampler.h"
+#include "op_counter.h"
 
 #define MAX_NUM_SDB 511
 #define MIN_NUM_SDB 1
@@ -896,6 +897,8 @@ static void add_samples_to_oprofile(unsigned int cpu, unsigned long *sdbt,
                 if (sample_data_ptr->P == 1) {
                         /* userspace sample */
                         unsigned int pid = sample_data_ptr->prim_asn;
+                        if (!counter_config.user)
+                                goto skip_sample;
                         rcu_read_lock();
                         tsk = pid_task(find_vpid(pid), PIDTYPE_PID);
                         if (tsk)
@@ -903,6 +906,8 @@ static void add_samples_to_oprofile(unsigned int cpu, unsigned long *sdbt,
                         rcu_read_unlock();
                 } else {
                         /* kernelspace sample */
+                        if (!counter_config.kernel)
+                                goto skip_sample;
                         regs = task_pt_regs(current);
                 }
 
@@ -910,7 +915,7 @@ static void add_samples_to_oprofile(unsigned int cpu, unsigned long *sdbt,
                 oprofile_add_ext_hw_sample(sample_data_ptr->ia, regs, 0,
                                 !sample_data_ptr->P, tsk);
                 mutex_unlock(&hws_sem);
-
+        skip_sample:
                 sample_data_ptr++;
         }
 }
diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c
index 6efc18b5e60a..2297be406c61 100644
--- a/arch/s390/oprofile/init.c
+++ b/arch/s390/oprofile/init.c
@@ -2,10 +2,11 @@
  * arch/s390/oprofile/init.c
  *
  * S390 Version
- *   Copyright (C) 2003 IBM Deutschland Entwicklung GmbH, IBM Corporation
+ *   Copyright (C) 2002-2011 IBM Deutschland Entwicklung GmbH, IBM Corporation
  *   Author(s): Thomas Spatzier (tspat@de.ibm.com)
  *   Author(s): Mahesh Salgaonkar (mahesh@linux.vnet.ibm.com)
  *   Author(s): Heinz Graalfs (graalfs@linux.vnet.ibm.com)
+ *   Author(s): Andreas Krebbel (krebbel@linux.vnet.ibm.com)
  *
  * @remark Copyright 2002-2011 OProfile authors
  */
@@ -14,6 +15,8 @@
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/fs.h>
+#include <linux/module.h>
+#include <asm/processor.h>
 
 #include "../../../drivers/oprofile/oprof.h"
 
@@ -22,6 +25,7 @@ extern void s390_backtrace(struct pt_regs * const regs, unsigned int depth);
 #ifdef CONFIG_64BIT
 
 #include "hwsampler.h"
+#include "op_counter.h"
 
 #define DEFAULT_INTERVAL        4127518
 
@@ -35,16 +39,41 @@ static unsigned long oprofile_max_interval;
 static unsigned long oprofile_sdbt_blocks = DEFAULT_SDBT_BLOCKS;
 static unsigned long oprofile_sdb_blocks = DEFAULT_SDB_BLOCKS;
 
-static int hwsampler_file;
+static int hwsampler_enabled;
 static int hwsampler_running;   /* start_mutex must be held to change */
+static int hwsampler_available;
 
 static struct oprofile_operations timer_ops;
 
+struct op_counter_config counter_config;
+
+enum __force_cpu_type {
+        reserved = 0,           /* do not force */
+        timer,
+};
+static int force_cpu_type;
+
+static int set_cpu_type(const char *str, struct kernel_param *kp)
+{
+        if (!strcmp(str, "timer")) {
+                force_cpu_type = timer;
+                printk(KERN_INFO "oprofile: forcing timer to be returned "
+                                 "as cpu type\n");
+        } else {
+                force_cpu_type = 0;
+        }
+
+        return 0;
+}
+module_param_call(cpu_type, set_cpu_type, NULL, NULL, 0);
+MODULE_PARM_DESC(cpu_type, "Force legacy basic mode sampling"
+                           "(report cpu_type \"timer\"");
+
 static int oprofile_hwsampler_start(void)
 {
         int retval;
 
-        hwsampler_running = hwsampler_file;
+        hwsampler_running = hwsampler_enabled;
 
         if (!hwsampler_running)
                 return timer_ops.start();
@@ -72,10 +101,16 @@ static void oprofile_hwsampler_stop(void)
         return;
 }
 
+/*
+ * File ops used for:
+ * /dev/oprofile/0/enabled
+ * /dev/oprofile/hwsampling/hwsampler  (cpu_type = timer)
+ */
+
 static ssize_t hwsampler_read(struct file *file, char __user *buf,
                 size_t count, loff_t *offset)
 {
-        return oprofilefs_ulong_to_user(hwsampler_file, buf, count, offset);
+        return oprofilefs_ulong_to_user(hwsampler_enabled, buf, count, offset);
 }
 
 static ssize_t hwsampler_write(struct file *file, char const __user *buf,
@@ -88,9 +123,12 @@ static ssize_t hwsampler_write(struct file *file, char const __user *buf,
                 return -EINVAL;
 
         retval = oprofilefs_ulong_from_user(&val, buf, count);
-        if (retval)
+        if (retval <= 0)
                 return retval;
 
+        if (val != 0 && val != 1)
+                return -EINVAL;
+
         if (oprofile_started)
                 /*
                  * save to do without locking as we set
@@ -99,7 +137,7 @@ static ssize_t hwsampler_write(struct file *file, char const __user *buf,
                  */
                 return -EBUSY;
 
-        hwsampler_file = val;
+        hwsampler_enabled = val;
 
         return count;
 }
@@ -109,38 +147,311 @@ static const struct file_operations hwsampler_fops = {
         .write          = hwsampler_write,
 };
 
+/*
+ * File ops used for:
+ * /dev/oprofile/0/count
+ * /dev/oprofile/hwsampling/hw_interval  (cpu_type = timer)
+ *
+ * Make sure that the value is within the hardware range.
+ */
+
+static ssize_t hw_interval_read(struct file *file, char __user *buf,
+                                size_t count, loff_t *offset)
+{
+        return oprofilefs_ulong_to_user(oprofile_hw_interval, buf,
+                                        count, offset);
+}
+
+static ssize_t hw_interval_write(struct file *file, char const __user *buf,
+                                 size_t count, loff_t *offset)
+{
+        unsigned long val;
+        int retval;
+
+        if (*offset)
+                return -EINVAL;
+        retval = oprofilefs_ulong_from_user(&val, buf, count);
+        if (retval)
+                return retval;
+        if (val < oprofile_min_interval)
+                oprofile_hw_interval = oprofile_min_interval;
+        else if (val > oprofile_max_interval)
+                oprofile_hw_interval = oprofile_max_interval;
+        else
+                oprofile_hw_interval = val;
+
+        return count;
+}
+
+static const struct file_operations hw_interval_fops = {
+        .read           = hw_interval_read,
+        .write          = hw_interval_write,
+};
+
+/*
+ * File ops used for:
+ * /dev/oprofile/0/event
+ * Only a single event with number 0 is supported with this counter.
+ *
+ * /dev/oprofile/0/unit_mask
+ * This is a dummy file needed by the user space tools.
+ * No value other than 0 is accepted or returned.
+ */
+
+static ssize_t hwsampler_zero_read(struct file *file, char __user *buf,
+                                    size_t count, loff_t *offset)
+{
+        return oprofilefs_ulong_to_user(0, buf, count, offset);
+}
+
+static ssize_t hwsampler_zero_write(struct file *file, char const __user *buf,
+                                     size_t count, loff_t *offset)
+{
+        unsigned long val;
+        int retval;
+
+        if (*offset)
+                return -EINVAL;
+
+        retval = oprofilefs_ulong_from_user(&val, buf, count);
+        if (retval)
+                return retval;
+        if (val != 0)
+                return -EINVAL;
+        return count;
+}
+
+static const struct file_operations zero_fops = {
+        .read           = hwsampler_zero_read,
+        .write          = hwsampler_zero_write,
+};
+
+/* /dev/oprofile/0/kernel file ops.  */
+
+static ssize_t hwsampler_kernel_read(struct file *file, char __user *buf,
+                                     size_t count, loff_t *offset)
+{
+        return oprofilefs_ulong_to_user(counter_config.kernel,
+                                        buf, count, offset);
+}
+
+static ssize_t hwsampler_kernel_write(struct file *file, char const __user *buf,
+                                      size_t count, loff_t *offset)
+{
+        unsigned long val;
+        int retval;
+
+        if (*offset)
+                return -EINVAL;
+
+        retval = oprofilefs_ulong_from_user(&val, buf, count);
+        if (retval)
+                return retval;
+
+        if (val != 0 && val != 1)
+                return -EINVAL;
+
+        counter_config.kernel = val;
+
+        return count;
+}
+
+static const struct file_operations kernel_fops = {
+        .read           = hwsampler_kernel_read,
+        .write          = hwsampler_kernel_write,
+};
+
+/* /dev/oprofile/0/user file ops. */
+
+static ssize_t hwsampler_user_read(struct file *file, char __user *buf,
+                                   size_t count, loff_t *offset)
+{
+        return oprofilefs_ulong_to_user(counter_config.user,
+                                        buf, count, offset);
+}
+
+static ssize_t hwsampler_user_write(struct file *file, char const __user *buf,
+                                    size_t count, loff_t *offset)
+{
+        unsigned long val;
+        int retval;
+
+        if (*offset)
+                return -EINVAL;
+
+        retval = oprofilefs_ulong_from_user(&val, buf, count);
+        if (retval)
+                return retval;
+
+        if (val != 0 && val != 1)
+                return -EINVAL;
+
+        counter_config.user = val;
+
+        return count;
+}
+
+static const struct file_operations user_fops = {
+        .read           = hwsampler_user_read,
+        .write          = hwsampler_user_write,
+};
+
+
+/*
+ * File ops used for: /dev/oprofile/timer/enabled
+ * The value always has to be the inverted value of hwsampler_enabled. So
+ * no separate variable is created. That way we do not need locking.
+ */
+
+static ssize_t timer_enabled_read(struct file *file, char __user *buf,
+                                  size_t count, loff_t *offset)
+{
+        return oprofilefs_ulong_to_user(!hwsampler_enabled, buf, count, offset);
+}
+
+static ssize_t timer_enabled_write(struct file *file, char const __user *buf,
+                                   size_t count, loff_t *offset)
+{
+        unsigned long val;
+        int retval;
+
+        if (*offset)
+                return -EINVAL;
+
+        retval = oprofilefs_ulong_from_user(&val, buf, count);
+        if (retval)
+                return retval;
+
+        if (val != 0 && val != 1)
+                return -EINVAL;
+
+        /* Timer cannot be disabled without having hardware sampling.  */
+        if (val == 0 && !hwsampler_available)
+                return -EINVAL;
+
+        if (oprofile_started)
+                /*
+                 * save to do without locking as we set
+                 * hwsampler_running in start() when start_mutex is
+                 * held
+                 */
+                return -EBUSY;
+
+        hwsampler_enabled = !val;
+
+        return count;
+}
+
+static const struct file_operations timer_enabled_fops = {
+        .read           = timer_enabled_read,
+        .write          = timer_enabled_write,
+};
+
+
 static int oprofile_create_hwsampling_files(struct super_block *sb,
-                                                struct dentry *root)
+                                            struct dentry *root)
 {
-        struct dentry *hw_dir;
+        struct dentry *dir;
+
+        dir = oprofilefs_mkdir(sb, root, "timer");
+        if (!dir)
+                return -EINVAL;
+
+        oprofilefs_create_file(sb, dir, "enabled", &timer_enabled_fops);
+
+        if (!hwsampler_available)
+                return 0;
 
         /* reinitialize default values */
-        hwsampler_file = 1;
+        hwsampler_enabled = 1;
+        counter_config.kernel = 1;
+        counter_config.user = 1;
 
-        hw_dir = oprofilefs_mkdir(sb, root, "hwsampling");
-        if (!hw_dir)
-                return -EINVAL;
+        if (!force_cpu_type) {
+                /*
+                 * Create the counter file system.  A single virtual
+                 * counter is created which can be used to
+                 * enable/disable hardware sampling dynamically from
+                 * user space.  The user space will configure a single
+                 * counter with a single event.  The value of 'event'
+                 * and 'unit_mask' are not evaluated by the kernel code
+                 * and can only be set to 0.
+                 */
+
+                dir = oprofilefs_mkdir(sb, root, "0");
+                if (!dir)
+                        return -EINVAL;
 
-        oprofilefs_create_file(sb, hw_dir, "hwsampler", &hwsampler_fops);
-        oprofilefs_create_ulong(sb, hw_dir, "hw_interval",
-                                &oprofile_hw_interval);
-        oprofilefs_create_ro_ulong(sb, hw_dir, "hw_min_interval",
-                                &oprofile_min_interval);
-        oprofilefs_create_ro_ulong(sb, hw_dir, "hw_max_interval",
-                                &oprofile_max_interval);
-        oprofilefs_create_ulong(sb, hw_dir, "hw_sdbt_blocks",
-                                &oprofile_sdbt_blocks);
+                oprofilefs_create_file(sb, dir, "enabled", &hwsampler_fops);
+                oprofilefs_create_file(sb, dir, "event", &zero_fops);
+                oprofilefs_create_file(sb, dir, "count", &hw_interval_fops);
+                oprofilefs_create_file(sb, dir, "unit_mask", &zero_fops);
+                oprofilefs_create_file(sb, dir, "kernel", &kernel_fops);
+                oprofilefs_create_file(sb, dir, "user", &user_fops);
+                oprofilefs_create_ulong(sb, dir, "hw_sdbt_blocks",
+                                        &oprofile_sdbt_blocks);
 
+        } else {
+                /*
+                 * Hardware sampling can be used but the cpu_type is
+                 * forced to timer in order to deal with legacy user
+                 * space tools.  The /dev/oprofile/hwsampling fs is
+                 * provided in that case.
+                 */
+                dir = oprofilefs_mkdir(sb, root, "hwsampling");
+                if (!dir)
+                        return -EINVAL;
+
+                oprofilefs_create_file(sb, dir, "hwsampler",
+                                       &hwsampler_fops);
+                oprofilefs_create_file(sb, dir, "hw_interval",
+                                       &hw_interval_fops);
+                oprofilefs_create_ro_ulong(sb, dir, "hw_min_interval",
+                                           &oprofile_min_interval);
+                oprofilefs_create_ro_ulong(sb, dir, "hw_max_interval",
+                                           &oprofile_max_interval);
+                oprofilefs_create_ulong(sb, dir, "hw_sdbt_blocks",
+                                        &oprofile_sdbt_blocks);
+        }
         return 0;
 }
 
 static int oprofile_hwsampler_init(struct oprofile_operations *ops)
 {
+        /*
+         * Initialize the timer mode infrastructure as well in order
+         * to be able to switch back dynamically.  oprofile_timer_init
+         * is not supposed to fail.
+         */
+        if (oprofile_timer_init(ops))
+                BUG();
+
+        memcpy(&timer_ops, ops, sizeof(timer_ops));
+        ops->create_files = oprofile_create_hwsampling_files;
+
+        /*
+         * If the user space tools do not support newer cpu types,
+         * the force_cpu_type module parameter
+         * can be used to always return \"timer\" as cpu type.
+         */
+        if (force_cpu_type != timer) {
+                struct cpuid id;
+
+                get_cpu_id (&id);
+
+                switch (id.machine) {
+                case 0x2097: case 0x2098: ops->cpu_type = "s390/z10"; break;
+                case 0x2817: case 0x2818: ops->cpu_type = "s390/z196"; break;
+                default: return -ENODEV;
+                }
+        }
+
         if (hwsampler_setup())
                 return -ENODEV;
 
         /*
-         * create hwsampler files only if hwsampler_setup() succeeds.
+         * Query the range for the sampling interval from the
+         * hardware.
          */
         oprofile_min_interval = hwsampler_query_min_interval();
         if (oprofile_min_interval == 0)
@@ -155,23 +466,17 @@ static int oprofile_hwsampler_init(struct oprofile_operations *ops)
         if (oprofile_hw_interval > oprofile_max_interval)
                 oprofile_hw_interval = oprofile_max_interval;
 
-        if (oprofile_timer_init(ops))
-                return -ENODEV;
-
-        printk(KERN_INFO "oprofile: using hardware sampling\n");
-
-        memcpy(&timer_ops, ops, sizeof(timer_ops));
+        printk(KERN_INFO "oprofile: System z hardware sampling "
+               "facility found.\n");
 
         ops->start = oprofile_hwsampler_start;
         ops->stop = oprofile_hwsampler_stop;
-        ops->create_files = oprofile_create_hwsampling_files;
 
         return 0;
 }
 
 static void oprofile_hwsampler_exit(void)
 {
-        oprofile_timer_exit();
         hwsampler_shutdown();
 }
 
@@ -182,7 +487,15 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         ops->backtrace = s390_backtrace;
 
 #ifdef CONFIG_64BIT
-        return oprofile_hwsampler_init(ops);
+
+        /*
+         * -ENODEV is not reported to the caller.  The module itself
+         * will use the timer mode sampling as fallback and this is
+         * always available.
+         */
+        hwsampler_available = oprofile_hwsampler_init(ops) == 0;
+
+        return 0;
 #else
         return -ENODEV;
 #endif
diff --git a/arch/s390/oprofile/op_counter.h b/arch/s390/oprofile/op_counter.h
new file mode 100644
index 000000000000..1a8d3ca09014
--- /dev/null
+++ b/arch/s390/oprofile/op_counter.h
@@ -0,0 +1,23 @@
+/**
+ * arch/s390/oprofile/op_counter.h
+ *
+ *   Copyright (C) 2011 IBM Deutschland Entwicklung GmbH, IBM Corporation
+ *   Author(s): Andreas Krebbel (krebbel@linux.vnet.ibm.com)
+ *
+ * @remark Copyright 2011 OProfile authors
+ */
+
+#ifndef OP_COUNTER_H
+#define OP_COUNTER_H
+
+struct op_counter_config {
+        /* `enabled' maps to the hwsampler_file variable.  */
+        /* `count' maps to the oprofile_hw_interval variable.  */
+        /* `event' and `unit_mask' are unused. */
+        unsigned long kernel;
+        unsigned long user;
+};
+
+extern struct op_counter_config counter_config;
+
+#endif /* OP_COUNTER_H */
diff --git a/arch/score/Kconfig b/arch/score/Kconfig
index df169e84db4e..8b0c9464aa9d 100644
--- a/arch/score/Kconfig
+++ b/arch/score/Kconfig
@@ -4,6 +4,9 @@ config SCORE
        def_bool y
        select HAVE_GENERIC_HARDIRQS
        select GENERIC_IRQ_SHOW
+       select HAVE_MEMBLOCK
+       select HAVE_MEMBLOCK_NODE_MAP
+       select ARCH_DISCARD_MEMBLOCK
 
 choice
         prompt "System type"
@@ -60,9 +63,6 @@ config 32BIT
 config ARCH_FLATMEM_ENABLE
         def_bool y
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 source "mm/Kconfig"
 
 config MEMORY_START
diff --git a/arch/score/kernel/setup.c b/arch/score/kernel/setup.c
index 6f898c057878..b48459afefdd 100644
--- a/arch/score/kernel/setup.c
+++ b/arch/score/kernel/setup.c
@@ -26,6 +26,7 @@
 #include <linux/bootmem.h>
 #include <linux/initrd.h>
 #include <linux/ioport.h>
+#include <linux/memblock.h>
 #include <linux/mm.h>
 #include <linux/seq_file.h>
 #include <linux/screen_info.h>
@@ -54,7 +55,8 @@ static void __init bootmem_init(void)
         /* Initialize the boot-time allocator with low memory only. */
         bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
                                          min_low_pfn, max_low_pfn);
-        add_active_range(0, min_low_pfn, max_low_pfn);
+        memblock_add_node(PFN_PHYS(min_low_pfn),
+                          PFN_PHYS(max_low_pfn - min_low_pfn), 0);
 
         free_bootmem(PFN_PHYS(start_pfn),
                      (max_low_pfn - start_pfn) << PAGE_SHIFT);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5629e2099130..47a2f1c2cb0d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -4,6 +4,7 @@ config SUPERH
         select CLKDEV_LOOKUP
         select HAVE_IDE if HAS_IOPORT
         select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
         select HAVE_OPROFILE
         select HAVE_GENERIC_DMA_COHERENT
         select HAVE_ARCH_TRACEHOOK
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index ec8c84c14b17..895e337c79b6 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -50,9 +50,9 @@ static struct platform_device heartbeat_device = {
 #define GBECONT         0xffc10100
 #define GBECONT_RMII1   BIT(17)
 #define GBECONT_RMII0   BIT(16)
-static void sh7757_eth_set_mdio_gate(unsigned long addr)
+static void sh7757_eth_set_mdio_gate(void *addr)
 {
-        if ((addr & 0x00000fff) < 0x0800)
+        if (((unsigned long)addr & 0x00000fff) < 0x0800)
                 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
         else
                 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
@@ -116,9 +116,9 @@ static struct platform_device sh7757_eth1_device = {
         },
 };
 
-static void sh7757_eth_giga_set_mdio_gate(unsigned long addr)
+static void sh7757_eth_giga_set_mdio_gate(void *addr)
 {
-        if ((addr & 0x00000fff) < 0x0800) {
+        if (((unsigned long)addr & 0x00000fff) < 0x0800) {
                 gpio_set_value(GPIO_PTT4, 1);
                 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
         } else {
@@ -210,8 +210,12 @@ static struct resource sh_mmcif_resources[] = {
 };
 
 static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
-        .chan_priv_tx   = SHDMA_SLAVE_MMCIF_TX,
-        .chan_priv_rx   = SHDMA_SLAVE_MMCIF_RX,
+        .chan_priv_tx   = {
+                .slave_id = SHDMA_SLAVE_MMCIF_TX,
+        },
+        .chan_priv_rx   = {
+                .slave_id = SHDMA_SLAVE_MMCIF_RX,
+        }
 };
 
 static struct sh_mmcif_plat_data sh_mmcif_plat = {
diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c
index 83cc704770d7..b1cb2715ad6e 100644
--- a/arch/sh/drivers/dma/dma-sysfs.c
+++ b/arch/sh/drivers/dma/dma-sysfs.c
@@ -12,18 +12,19 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/stat.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/err.h>
 #include <linux/string.h>
 #include <asm/dma.h>
 
-static struct sysdev_class dma_sysclass = {
+static struct bus_type dma_subsys = {
         .name = "dma",
+        .dev_name = "dma",
 };
 
-static ssize_t dma_show_devices(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t dma_show_devices(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         ssize_t len = 0;
         int i;
@@ -43,29 +44,29 @@ static ssize_t dma_show_devices(struct sys_device *dev,
         return len;
 }
 
-static SYSDEV_ATTR(devices, S_IRUGO, dma_show_devices, NULL);
+static DEVICE_ATTR(devices, S_IRUGO, dma_show_devices, NULL);
 
-static int __init dma_sysclass_init(void)
+static int __init dma_subsys_init(void)
 {
         int ret;
 
-        ret = sysdev_class_register(&dma_sysclass);
+        ret = subsys_system_register(&dma_subsys, NULL);
         if (unlikely(ret))
                 return ret;
 
-        return sysfs_create_file(&dma_sysclass.kset.kobj, &attr_devices.attr);
+        return device_create_file(dma_subsys.dev_root, &dev_attr_devices.attr);
 }
-postcore_initcall(dma_sysclass_init);
+postcore_initcall(dma_subsys_init);
 
-static ssize_t dma_show_dev_id(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t dma_show_dev_id(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         struct dma_channel *channel = to_dma_channel(dev);
         return sprintf(buf, "%s\n", channel->dev_id);
 }
 
-static ssize_t dma_store_dev_id(struct sys_device *dev,
-                                struct sysdev_attribute *attr,
+static ssize_t dma_store_dev_id(struct device *dev,
+                                struct device_attribute *attr,
                                 const char *buf, size_t count)
 {
         struct dma_channel *channel = to_dma_channel(dev);
@@ -73,10 +74,10 @@ static ssize_t dma_store_dev_id(struct sys_device *dev,
         return count;
 }
 
-static SYSDEV_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id);
+static DEVICE_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id);
 
-static ssize_t dma_store_config(struct sys_device *dev,
-                                struct sysdev_attribute *attr,
+static ssize_t dma_store_config(struct device *dev,
+                                struct device_attribute *attr,
                                 const char *buf, size_t count)
 {
         struct dma_channel *channel = to_dma_channel(dev);
@@ -88,17 +89,17 @@ static ssize_t dma_store_config(struct sys_device *dev,
         return count;
 }
 
-static SYSDEV_ATTR(config, S_IWUSR, NULL, dma_store_config);
+static DEVICE_ATTR(config, S_IWUSR, NULL, dma_store_config);
 
-static ssize_t dma_show_mode(struct sys_device *dev,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t dma_show_mode(struct device *dev,
+                                struct device_attribute *attr, char *buf)
 {
         struct dma_channel *channel = to_dma_channel(dev);
         return sprintf(buf, "0x%08x\n", channel->mode);
 }
 
-static ssize_t dma_store_mode(struct sys_device *dev,
-                              struct sysdev_attribute *attr,
+static ssize_t dma_store_mode(struct device *dev,
+                              struct device_attribute *attr,
                               const char *buf, size_t count)
 {
         struct dma_channel *channel = to_dma_channel(dev);
@@ -106,38 +107,38 @@ static ssize_t dma_store_mode(struct sys_device *dev,
         return count;
 }
 
-static SYSDEV_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode);
+static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode);
 
 #define dma_ro_attr(field, fmt)                                         \
-static ssize_t dma_show_##field(struct sys_device *dev,                 \
-                                struct sysdev_attribute *attr, char *buf)\
+static ssize_t dma_show_##field(struct device *dev,             \
+                                struct device_attribute *attr, char *buf)\
 {                                                                       \
         struct dma_channel *channel = to_dma_channel(dev);              \
         return sprintf(buf, fmt, channel->field);                       \
 }                                                                       \
-static SYSDEV_ATTR(field, S_IRUGO, dma_show_##field, NULL);
+static DEVICE_ATTR(field, S_IRUGO, dma_show_##field, NULL);
 
 dma_ro_attr(count, "0x%08x\n");
 dma_ro_attr(flags, "0x%08lx\n");
 
 int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info)
 {
-        struct sys_device *dev = &chan->dev;
+        struct device *dev = &chan->dev;
         char name[16];
         int ret;
 
         dev->id  = chan->vchan;
-        dev->cls = &dma_sysclass;
+        dev->bus = &dma_subsys;
 
-        ret = sysdev_register(dev);
+        ret = device_register(dev);
         if (ret)
                 return ret;
 
-        ret |= sysdev_create_file(dev, &attr_dev_id);
-        ret |= sysdev_create_file(dev, &attr_count);
-        ret |= sysdev_create_file(dev, &attr_mode);
-        ret |= sysdev_create_file(dev, &attr_flags);
-        ret |= sysdev_create_file(dev, &attr_config);
+        ret |= device_create_file(dev, &dev_attr_dev_id);
+        ret |= device_create_file(dev, &dev_attr_count);
+        ret |= device_create_file(dev, &dev_attr_mode);
+        ret |= device_create_file(dev, &dev_attr_flags);
+        ret |= device_create_file(dev, &dev_attr_config);
 
         if (unlikely(ret)) {
                 dev_err(&info->pdev->dev, "Failed creating attrs\n");
@@ -150,17 +151,17 @@ int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info)
 
 void dma_remove_sysfs_files(struct dma_channel *chan, struct dma_info *info)
 {
-        struct sys_device *dev = &chan->dev;
+        struct device *dev = &chan->dev;
         char name[16];
 
-        sysdev_remove_file(dev, &attr_dev_id);
-        sysdev_remove_file(dev, &attr_count);
-        sysdev_remove_file(dev, &attr_mode);
-        sysdev_remove_file(dev, &attr_flags);
-        sysdev_remove_file(dev, &attr_config);
+        device_remove_file(dev, &dev_attr_dev_id);
+        device_remove_file(dev, &dev_attr_count);
+        device_remove_file(dev, &dev_attr_mode);
+        device_remove_file(dev, &dev_attr_flags);
+        device_remove_file(dev, &dev_attr_config);
 
         snprintf(name, sizeof(name), "dma%d", chan->chan);
         sysfs_remove_link(&info->pdev->dev.kobj, name);
 
-        sysdev_unregister(dev);
+        device_unregister(dev);
 }
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h
index 07373a074090..6aa2080c0065 100644
--- a/arch/sh/include/asm/dma.h
+++ b/arch/sh/include/asm/dma.h
@@ -14,7 +14,7 @@
 #include <linux/spinlock.h>
 #include <linux/wait.h>
 #include <linux/sched.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <cpu/dma.h>
 #include <asm-generic/dma.h>
 
@@ -91,7 +91,7 @@ struct dma_channel {
 
         wait_queue_head_t wait_queue;
 
-        struct sys_device dev;
+        struct device dev;
         void *priv_data;
 };
 
diff --git a/arch/sh/include/asm/memblock.h b/arch/sh/include/asm/memblock.h
deleted file mode 100644
index e87063fad2ea..000000000000
--- a/arch/sh/include/asm/memblock.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef __ASM_SH_MEMBLOCK_H
-#define __ASM_SH_MEMBLOCK_H
-
-#endif /* __ASM_SH_MEMBLOCK_H */
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index ea2d5089de1e..20ee40af16e9 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -122,7 +122,6 @@ extern void init_thread_xstate(void);
 #define TIF_SYSCALL_TRACEPOINT  8       /* for ftrace syscall instrumentation */
 #define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
-#define TIF_FREEZE              19      /* Freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
@@ -133,7 +132,6 @@ extern void init_thread_xstate(void);
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 
 /*
  * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index f0907995b4c9..a8140f0bbf6c 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -13,7 +13,7 @@
 #include <linux/init.h>
 #include <linux/cpu.h>
 #include <linux/bitmap.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/slab.h>
@@ -337,9 +337,9 @@ static struct kobj_type ktype_percpu_entry = {
         .default_attrs  = sq_sysfs_attrs,
 };
 
-static int __devinit sq_sysdev_add(struct sys_device *sysdev)
+static int __devinit sq_dev_add(struct device *dev)
 {
-        unsigned int cpu = sysdev->id;
+        unsigned int cpu = dev->id;
         struct kobject *kobj;
         int error;
 
@@ -348,25 +348,27 @@ static int __devinit sq_sysdev_add(struct sys_device *sysdev)
                 return -ENOMEM;
 
         kobj = sq_kobject[cpu];
-        error = kobject_init_and_add(kobj, &ktype_percpu_entry, &sysdev->kobj,
+        error = kobject_init_and_add(kobj, &ktype_percpu_entry, &dev->kobj,
                                      "%s", "sq");
         if (!error)
                 kobject_uevent(kobj, KOBJ_ADD);
         return error;
 }
 
-static int __devexit sq_sysdev_remove(struct sys_device *sysdev)
+static int __devexit sq_dev_remove(struct device *dev)
 {
-        unsigned int cpu = sysdev->id;
+        unsigned int cpu = dev->id;
         struct kobject *kobj = sq_kobject[cpu];
 
         kobject_put(kobj);
         return 0;
 }
 
-static struct sysdev_driver sq_sysdev_driver = {
-        .add            = sq_sysdev_add,
-        .remove         = __devexit_p(sq_sysdev_remove),
+static struct subsys_interface sq_interface = {
+        .name           = "sq"
+        .subsys         = &cpu_subsys,
+        .add_dev        = sq_dev_add,
+        .remove_dev     = __devexit_p(sq_dev_remove),
 };
 
 static int __init sq_api_init(void)
@@ -386,7 +388,7 @@ static int __init sq_api_init(void)
         if (unlikely(!sq_bitmap))
                 goto out;
 
-        ret = sysdev_driver_register(&cpu_sysdev_class, &sq_sysdev_driver);
+        ret = subsys_interface_register(&sq_interface);
         if (unlikely(ret != 0))
                 goto out;
 
@@ -401,7 +403,7 @@ out:
 
 static void __exit sq_api_exit(void)
 {
-        sysdev_driver_unregister(&cpu_sysdev_class, &sq_sysdev_driver);
+        subsys_interface_unregister(&sq_interface);
         kfree(sq_bitmap);
         kmem_cache_destroy(sq_cache);
 }
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index db4ecd731a00..406508d4ce74 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -89,7 +89,8 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
 
                 while (!need_resched()) {
                         check_pgt_cache();
@@ -111,7 +112,8 @@ void cpu_idle(void)
                         start_critical_timings();
                 }
 
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index c5a33f007f88..9fea49f6e667 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -157,9 +157,6 @@ void __init reserve_crashkernel(void)
         unsigned long long crash_size, crash_base;
         int ret;
 
-        /* this is necessary because of memblock_phys_mem_size() */
-        memblock_analyze();
-
         ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
                         &crash_size, &crash_base);
         if (ret == 0 && crash_size > 0) {
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 1a0e946679a4..7b57bf1dc855 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -230,7 +230,8 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
         pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
                          PAGE_KERNEL);
 
-        add_active_range(nid, start_pfn, end_pfn);
+        memblock_set_node(PFN_PHYS(start_pfn),
+                          PFN_PHYS(end_pfn - start_pfn), nid);
 }
 
 void __init __weak plat_early_device_setup(void)
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index c3e61b366493..cb8f9920f4dd 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -143,9 +143,6 @@ config MAX_ACTIVE_REGIONS
                        CPU_SUBTYPE_SH7785)
         default "1"
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 config ARCH_SELECT_MEMORY_MODEL
         def_bool y
 
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 939ca0f356f6..82cc576fab15 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -324,7 +324,6 @@ void __init paging_init(void)
         unsigned long vaddr, end;
         int nid;
 
-        memblock_init();
         sh_mv.mv_mem_init();
 
         early_reserve_mem();
@@ -337,7 +336,7 @@ void __init paging_init(void)
                 sh_mv.mv_mem_reserve();
 
         memblock_enforce_memory_limit(memory_limit);
-        memblock_analyze();
+        memblock_allow_resize();
 
         memblock_dump_all();
 
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index b4c2d2b946dd..e4dd5d5a1115 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -49,7 +49,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         return oprofile_perf_init(ops);
 }
 
-void __exit oprofile_arch_exit(void)
+void oprofile_arch_exit(void)
 {
         oprofile_perf_exit();
         kfree(sh_pmu_op_name);
@@ -60,5 +60,5 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         ops->backtrace = sh_backtrace;
         return -ENODEV;
 }
-void __exit oprofile_arch_exit(void) {}
+void oprofile_arch_exit(void) {}
 #endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index f92602e86607..70ae9d81870e 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -43,6 +43,7 @@ config SPARC64
         select HAVE_KPROBES
         select HAVE_RCU_TABLE_FREE if SMP
         select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
         select HAVE_SYSCALL_WRAPPERS
         select HAVE_DYNAMIC_FTRACE
         select HAVE_FTRACE_MCOUNT_RECORD
@@ -352,9 +353,6 @@ config NODES_SPAN_OTHER_NODES
         def_bool y
         depends on NEED_MULTIPLE_NODES
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y if SPARC64
-
 config ARCH_SELECT_MEMORY_MODEL
         def_bool y if SPARC64
 
diff --git a/arch/sparc/include/asm/memblock.h b/arch/sparc/include/asm/memblock.h
deleted file mode 100644
index c67b047ef85e..000000000000
--- a/arch/sparc/include/asm/memblock.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _SPARC64_MEMBLOCK_H
-#define _SPARC64_MEMBLOCK_H
-
-#include <asm/oplib.h>
-
-#define MEMBLOCK_DBG(fmt...) prom_printf(fmt)
-
-#endif /* !(_SPARC64_MEMBLOCK_H) */
diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h
index 5b31a8e89823..a790cc657476 100644
--- a/arch/sparc/include/asm/pgtable_32.h
+++ b/arch/sparc/include/asm/pgtable_32.h
@@ -431,10 +431,6 @@ extern unsigned long *sparc_valid_addr_bitmap;
 #define kern_addr_valid(addr) \
         (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
 
-extern int io_remap_pfn_range(struct vm_area_struct *vma,
-                              unsigned long from, unsigned long pfn,
-                              unsigned long size, pgprot_t prot);
-
 /*
  * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
  * its high 4 bits.  These macros/functions put it there or get it from there.
@@ -443,6 +439,22 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma,
 #define GET_IOSPACE(pfn)                (pfn >> (BITS_PER_LONG - 4))
 #define GET_PFN(pfn)                    (pfn & 0x0fffffffUL)
 
+extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
+                           unsigned long, pgprot_t);
+
+static inline int io_remap_pfn_range(struct vm_area_struct *vma,
+                                     unsigned long from, unsigned long pfn,
+                                     unsigned long size, pgprot_t prot)
+{
+        unsigned long long offset, space, phys_base;
+
+        offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT;
+        space = GET_IOSPACE(pfn);
+        phys_base = offset | (space << 32ULL);
+
+        return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
+}
+
 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
 ({                                                                        \
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index adf89329af59..38ebb2c60137 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -757,10 +757,6 @@ static inline bool kern_addr_valid(unsigned long addr)
 
 extern int page_in_phys_avail(unsigned long paddr);
 
-extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
-                               unsigned long pfn,
-                               unsigned long size, pgprot_t prot);
-
 /*
  * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
  * its high 4 bits.  These macros/functions put it there or get it from there.
@@ -769,6 +765,22 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
 #define GET_IOSPACE(pfn)                (pfn >> (BITS_PER_LONG - 4))
 #define GET_PFN(pfn)                    (pfn & 0x0fffffffffffffffUL)
 
+extern int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
+                           unsigned long, pgprot_t);
+
+static inline int io_remap_pfn_range(struct vm_area_struct *vma,
+                                     unsigned long from, unsigned long pfn,
+                                     unsigned long size, pgprot_t prot)
+{
+        unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
+        int space = GET_IOSPACE(pfn);
+        unsigned long phys_base;
+
+        phys_base = offset | (((unsigned long) space) << 32UL);
+
+        return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
+}
+
 #include <asm-generic/pgtable.h>
 
 /* We provide our own get_unmapped_area to cope with VA holes and
diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/asm/posix_types.h
index 98d6ebb922fb..dbfc1a34b3a2 100644
--- a/arch/sparc/include/asm/posix_types.h
+++ b/arch/sparc/include/asm/posix_types.h
@@ -20,7 +20,6 @@ typedef unsigned int           __kernel_uid_t;
 typedef unsigned int           __kernel_gid_t;
 typedef unsigned long          __kernel_ino_t;
 typedef unsigned int           __kernel_mode_t;
-typedef unsigned short         __kernel_umode_t;
 typedef unsigned int           __kernel_nlink_t;
 typedef int                    __kernel_daddr_t;
 typedef long                   __kernel_off_t;
@@ -55,7 +54,6 @@ typedef unsigned short         __kernel_uid_t;
 typedef unsigned short         __kernel_gid_t;
 typedef unsigned long          __kernel_ino_t;
 typedef unsigned short         __kernel_mode_t;
-typedef unsigned short         __kernel_umode_t;
 typedef short                  __kernel_nlink_t;
 typedef long                   __kernel_daddr_t;
 typedef long                   __kernel_off_t;
diff --git a/arch/sparc/include/asm/socket.h b/arch/sparc/include/asm/socket.h
index 9d3fefcff2f5..8af1b64168b3 100644
--- a/arch/sparc/include/asm/socket.h
+++ b/arch/sparc/include/asm/socket.h
@@ -58,6 +58,9 @@
 
 #define SO_RXQ_OVFL             0x0024
 
+#define SO_WIFI_STATUS          0x0025
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 /* Security levels - as per NRL IPv6 - don't actually do anything */
 #define SO_SECURITY_AUTHENTICATION              0x5001
 #define SO_SECURITY_ENCRYPTION_TRANSPORT        0x5002
diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h
index fa5753233410..5cc5888ad5a3 100644
--- a/arch/sparc/include/asm/thread_info_32.h
+++ b/arch/sparc/include/asm/thread_info_32.h
@@ -133,7 +133,6 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
 #define TIF_POLLING_NRFLAG      9       /* true if poll_idle() is polling
                                          * TIF_NEED_RESCHED */
 #define TIF_MEMDIE              10      /* is terminating due to OOM killer */
-#define TIF_FREEZE              11      /* is freezing for suspend */
 
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
@@ -147,7 +146,6 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *)
 #define _TIF_DO_NOTIFY_RESUME_MASK      (_TIF_NOTIFY_RESUME | \
                                          _TIF_SIGPENDING | \
                                          _TIF_RESTORE_SIGMASK)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 60d86be1a533..01d057fe6a3f 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -225,7 +225,6 @@ register struct thread_info *current_thread_info_reg asm("g6");
 /* flag bit 12 is available */
 #define TIF_MEMDIE              13      /* is terminating due to OOM killer */
 #define TIF_POLLING_NRFLAG      14
-#define TIF_FREEZE              15      /* is freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
@@ -237,7 +236,6 @@ register struct thread_info *current_thread_info_reg asm("g6");
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #define _TIF_USER_WORK_MASK     ((0xff << TI_FLAG_WSAVED_SHIFT) | \
                                  _TIF_DO_NOTIFY_RESUME_MASK | \
diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h
index 91e5a034f987..383d156cde9c 100644
--- a/arch/sparc/include/asm/types.h
+++ b/arch/sparc/include/asm/types.h
@@ -12,12 +12,6 @@
 
 #include <asm-generic/int-ll64.h>
 
-#ifndef __ASSEMBLY__
-
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
 #endif /* defined(__sparc__) */
 
 #endif /* defined(_SPARC_TYPES_H) */
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index 7429b47c3aca..381edcd5bc29 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -1181,13 +1181,11 @@ static int __devinit ds_probe(struct vio_dev *vdev,
 
         dp->rcv_buf_len = 4096;
 
-        dp->ds_states = kzalloc(sizeof(ds_states_template),
-                                GFP_KERNEL);
+        dp->ds_states = kmemdup(ds_states_template,
+                                sizeof(ds_states_template), GFP_KERNEL);
         if (!dp->ds_states)
                 goto out_free_rcv_buf;
 
-        memcpy(dp->ds_states, ds_states_template,
-               sizeof(ds_states_template));
         dp->num_ds_states = ARRAY_SIZE(ds_states_template);
 
         for (i = 0; i < dp->num_ds_states; i++)
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index e27f8ea8656e..0c218e4c0881 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -42,6 +42,9 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
 extern void fpload(unsigned long *fpregs, unsigned long *fsr);
 
 #else /* CONFIG_SPARC32 */
+
+#include <asm/trap_block.h>
+
 struct popc_3insn_patch_entry {
         unsigned int    addr;
         unsigned int    insns[3];
@@ -57,6 +60,10 @@ extern struct popc_6insn_patch_entry __popc_6insn_patch,
         __popc_6insn_patch_end;
 
 extern void __init per_cpu_patch(void);
+extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
+                                    struct sun4v_1insn_patch_entry *);
+extern void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *,
+                                    struct sun4v_2insn_patch_entry *);
 extern void __init sun4v_patch(void);
 extern void __init boot_cpu_id_too_large(int cpu);
 extern unsigned int dcache_parity_tl1_occurred;
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index da0c6c70ccb2..e5519870c3d9 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -17,6 +17,8 @@
 #include <asm/processor.h>
 #include <asm/spitfire.h>
 
+#include "entry.h"
+
 #ifdef CONFIG_SPARC64
 
 #include <linux/jump_label.h>
@@ -203,6 +205,29 @@ int apply_relocate_add(Elf_Shdr *sechdrs,
 }
 
 #ifdef CONFIG_SPARC64
+static void do_patch_sections(const Elf_Ehdr *hdr,
+                              const Elf_Shdr *sechdrs)
+{
+        const Elf_Shdr *s, *sun4v_1insn = NULL, *sun4v_2insn = NULL;
+        char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
+
+        for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
+                if (!strcmp(".sun4v_1insn_patch", secstrings + s->sh_name))
+                        sun4v_1insn = s;
+                if (!strcmp(".sun4v_2insn_patch", secstrings + s->sh_name))
+                        sun4v_2insn = s;
+        }
+
+        if (sun4v_1insn && tlb_type == hypervisor) {
+                void *p = (void *) sun4v_1insn->sh_addr;
+                sun4v_patch_1insn_range(p, p + sun4v_1insn->sh_size);
+        }
+        if (sun4v_2insn && tlb_type == hypervisor) {
+                void *p = (void *) sun4v_2insn->sh_addr;
+                sun4v_patch_2insn_range(p, p + sun4v_2insn->sh_size);
+        }
+}
+
 int module_finalize(const Elf_Ehdr *hdr,
                     const Elf_Shdr *sechdrs,
                     struct module *me)
@@ -210,6 +235,8 @@ int module_finalize(const Elf_Ehdr *hdr,
         /* make jump label nops */
         jump_label_apply_nops(me);
 
+        do_patch_sections(hdr, sechdrs);
+
         /* Cheetah's I-cache is fully coherent.  */
         if (tlb_type == spitfire) {
                 unsigned long va;
diff --git a/arch/sparc/kernel/pci_sun4v.c b/arch/sparc/kernel/pci_sun4v.c
index b272cda35a01..af5755d20fbe 100644
--- a/arch/sparc/kernel/pci_sun4v.c
+++ b/arch/sparc/kernel/pci_sun4v.c
@@ -849,10 +849,10 @@ static int pci_sun4v_msiq_build_irq(struct pci_pbm_info *pbm,
         if (!irq)
                 return -ENOMEM;
 
-        if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
-                return -EINVAL;
         if (pci_sun4v_msiq_setvalid(pbm->devhandle, msiqid, HV_MSIQ_VALID))
                 return -EINVAL;
+        if (pci_sun4v_msiq_setstate(pbm->devhandle, msiqid, HV_MSIQSTATE_IDLE))
+                return -EINVAL;
 
         return irq;
 }
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index 3739a06a76cb..39d8b05201a2 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -95,12 +95,14 @@ void cpu_idle(void)
         set_thread_flag(TIF_POLLING_NRFLAG);
 
         while(1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
 
                 while (!need_resched() && !cpu_is_offline(cpu))
                         sparc64_yield(cpu);
 
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
 
                 preempt_enable_no_resched();
 
diff --git a/arch/sparc/kernel/prom_common.c b/arch/sparc/kernel/prom_common.c
index 46614807a57f..741df916c124 100644
--- a/arch/sparc/kernel/prom_common.c
+++ b/arch/sparc/kernel/prom_common.c
@@ -58,12 +58,10 @@ int of_set_property(struct device_node *dp, const char *name, void *val, int len
         void *new_val;
         int err;
 
-        new_val = kmalloc(len, GFP_KERNEL);
+        new_val = kmemdup(val, len, GFP_KERNEL);
         if (!new_val)
                 return -ENOMEM;
 
-        memcpy(new_val, val, len);
-
         err = -ENODEV;
 
         mutex_lock(&of_set_property_mutex);
diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c
index fe1e3fc31bc5..ffb883ddd0f0 100644
--- a/arch/sparc/kernel/setup_32.c
+++ b/arch/sparc/kernel/setup_32.c
@@ -84,7 +84,7 @@ static void prom_sync_me(void)
 
         prom_printf("PROM SYNC COMMAND...\n");
         show_free_areas(0);
-        if(current->pid != 0) {
+        if (!is_idle_task(current)) {
                 local_irq_enable();
                 sys_sync();
                 local_irq_disable();
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index c965595aa7e9..a854a1c240ff 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -234,40 +234,50 @@ void __init per_cpu_patch(void)
         }
 }
 
-void __init sun4v_patch(void)
+void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *start,
+                             struct sun4v_1insn_patch_entry *end)
 {
-        extern void sun4v_hvapi_init(void);
-        struct sun4v_1insn_patch_entry *p1;
-        struct sun4v_2insn_patch_entry *p2;
-
-        if (tlb_type != hypervisor)
-                return;
+        while (start < end) {
+                unsigned long addr = start->addr;
 
-        p1 = &__sun4v_1insn_patch;
-        while (p1 < &__sun4v_1insn_patch_end) {
-                unsigned long addr = p1->addr;
-
-                *(unsigned int *) (addr +  0) = p1->insn;
+                *(unsigned int *) (addr +  0) = start->insn;
                 wmb();
                 __asm__ __volatile__("flush     %0" : : "r" (addr +  0));
 
-                p1++;
+                start++;
         }
+}
 
-        p2 = &__sun4v_2insn_patch;
-        while (p2 < &__sun4v_2insn_patch_end) {
-                unsigned long addr = p2->addr;
+void sun4v_patch_2insn_range(struct sun4v_2insn_patch_entry *start,
+                             struct sun4v_2insn_patch_entry *end)
+{
+        while (start < end) {
+                unsigned long addr = start->addr;
 
-                *(unsigned int *) (addr +  0) = p2->insns[0];
+                *(unsigned int *) (addr +  0) = start->insns[0];
                 wmb();
                 __asm__ __volatile__("flush     %0" : : "r" (addr +  0));
 
-                *(unsigned int *) (addr +  4) = p2->insns[1];
+                *(unsigned int *) (addr +  4) = start->insns[1];
                 wmb();
                 __asm__ __volatile__("flush     %0" : : "r" (addr +  4));
 
-                p2++;
+                start++;
         }
+}
+
+void __init sun4v_patch(void)
+{
+        extern void sun4v_hvapi_init(void);
+
+        if (tlb_type != hypervisor)
+                return;
+
+        sun4v_patch_1insn_range(&__sun4v_1insn_patch,
+                                &__sun4v_1insn_patch_end);
+
+        sun4v_patch_2insn_range(&__sun4v_2insn_patch,
+                                &__sun4v_2insn_patch_end);
 
         sun4v_hvapi_init();
 }
diff --git a/arch/sparc/kernel/signal32.c b/arch/sparc/kernel/signal32.c
index 2caa556db86d..023b8860dc97 100644
--- a/arch/sparc/kernel/signal32.c
+++ b/arch/sparc/kernel/signal32.c
@@ -822,21 +822,23 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs
  * want to handle. Thus you cannot kill init even with a SIGKILL even by
  * mistake.
  */
-void do_signal32(sigset_t *oldset, struct pt_regs * regs,
-                 int restart_syscall, unsigned long orig_i0)
+void do_signal32(sigset_t *oldset, struct pt_regs * regs)
 {
         struct k_sigaction ka;
+        unsigned long orig_i0;
+        int restart_syscall;
         siginfo_t info;
         int signr;
         
         signr = get_signal_to_deliver(&info, &ka, regs, NULL);
 
-        /* If the debugger messes with the program counter, it clears
-         * the "in syscall" bit, directing us to not perform a syscall
-         * restart.
-         */
-        if (restart_syscall && !pt_regs_is_syscall(regs))
-                restart_syscall = 0;
+        restart_syscall = 0;
+        orig_i0 = 0;
+        if (pt_regs_is_syscall(regs) &&
+            (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
+                restart_syscall = 1;
+                orig_i0 = regs->u_regs[UREG_G6];
+        }
 
         if (signr > 0) {
                 if (restart_syscall)
diff --git a/arch/sparc/kernel/signal_32.c b/arch/sparc/kernel/signal_32.c
index 8ce247ac04cc..d54c6e53aba0 100644
--- a/arch/sparc/kernel/signal_32.c
+++ b/arch/sparc/kernel/signal_32.c
@@ -519,10 +519,26 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
         siginfo_t info;
         int signr;
 
+        /* It's a lot of work and synchronization to add a new ptrace
+         * register for GDB to save and restore in order to get
+         * orig_i0 correct for syscall restarts when debugging.
+         *
+         * Although it should be the case that most of the global
+         * registers are volatile across a system call, glibc already
+         * depends upon that fact that we preserve them.  So we can't
+         * just use any global register to save away the orig_i0 value.
+         *
+         * In particular %g2, %g3, %g4, and %g5 are all assumed to be
+         * preserved across a system call trap by various pieces of
+         * code in glibc.
+         *
+         * %g7 is used as the "thread register".   %g6 is not used in
+         * any fixed manner.  %g6 is used as a scratch register and
+         * a compiler temporary, but it's value is never used across
+         * a system call.  Therefore %g6 is usable for orig_i0 storage.
+         */
         if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C))
-                restart_syscall = 1;
-        else
-                restart_syscall = 0;
+                regs->u_regs[UREG_G6] = orig_i0;
 
         if (test_thread_flag(TIF_RESTORE_SIGMASK))
                 oldset = &current->saved_sigmask;
@@ -535,8 +551,12 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
          * the software "in syscall" bit, directing us to not perform
          * a syscall restart.
          */
-        if (restart_syscall && !pt_regs_is_syscall(regs))
-                restart_syscall = 0;
+        restart_syscall = 0;
+        if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C)) {
+                restart_syscall = 1;
+                orig_i0 = regs->u_regs[UREG_G6];
+        }
+
 
         if (signr > 0) {
                 if (restart_syscall)
diff --git a/arch/sparc/kernel/signal_64.c b/arch/sparc/kernel/signal_64.c
index a2b81598d905..f0836cd0e2f2 100644
--- a/arch/sparc/kernel/signal_64.c
+++ b/arch/sparc/kernel/signal_64.c
@@ -529,11 +529,27 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
         siginfo_t info;
         int signr;
         
+        /* It's a lot of work and synchronization to add a new ptrace
+         * register for GDB to save and restore in order to get
+         * orig_i0 correct for syscall restarts when debugging.
+         *
+         * Although it should be the case that most of the global
+         * registers are volatile across a system call, glibc already
+         * depends upon that fact that we preserve them.  So we can't
+         * just use any global register to save away the orig_i0 value.
+         *
+         * In particular %g2, %g3, %g4, and %g5 are all assumed to be
+         * preserved across a system call trap by various pieces of
+         * code in glibc.
+         *
+         * %g7 is used as the "thread register".   %g6 is not used in
+         * any fixed manner.  %g6 is used as a scratch register and
+         * a compiler temporary, but it's value is never used across
+         * a system call.  Therefore %g6 is usable for orig_i0 storage.
+         */
         if (pt_regs_is_syscall(regs) &&
-            (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
-                restart_syscall = 1;
-        } else
-                restart_syscall = 0;
+            (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY)))
+                regs->u_regs[UREG_G6] = orig_i0;
 
         if (current_thread_info()->status & TS_RESTORE_SIGMASK)
                 oldset = &current->saved_sigmask;
@@ -542,22 +558,20 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
 
 #ifdef CONFIG_COMPAT
         if (test_thread_flag(TIF_32BIT)) {
-                extern void do_signal32(sigset_t *, struct pt_regs *,
-                                        int restart_syscall,
-                                        unsigned long orig_i0);
-                do_signal32(oldset, regs, restart_syscall, orig_i0);
+                extern void do_signal32(sigset_t *, struct pt_regs *);
+                do_signal32(oldset, regs);
                 return;
         }
 #endif  
 
         signr = get_signal_to_deliver(&info, &ka, regs, NULL);
 
-        /* If the debugger messes with the program counter, it clears
-         * the software "in syscall" bit, directing us to not perform
-         * a syscall restart.
-         */
-        if (restart_syscall && !pt_regs_is_syscall(regs))
-                restart_syscall = 0;
+        restart_syscall = 0;
+        if (pt_regs_is_syscall(regs) &&
+            (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
+                restart_syscall = 1;
+                orig_i0 = regs->u_regs[UREG_G6];
+        }
 
         if (signr > 0) {
                 if (restart_syscall)
diff --git a/arch/sparc/kernel/sigutil_64.c b/arch/sparc/kernel/sigutil_64.c
index e7dc508c38eb..b19570d41a39 100644
--- a/arch/sparc/kernel/sigutil_64.c
+++ b/arch/sparc/kernel/sigutil_64.c
@@ -2,6 +2,7 @@
 #include <linux/types.h>
 #include <linux/thread_info.h>
 #include <linux/uaccess.h>
+#include <linux/errno.h>
 
 #include <asm/sigcontext.h>
 #include <asm/fpumacro.h>
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 75607724d290..3b1bd7c50164 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -840,7 +840,7 @@ static void tsb_sync(void *info)
         struct trap_per_cpu *tp = &trap_block[raw_smp_processor_id()];
         struct mm_struct *mm = info;
 
-        /* It is not valid to test "currrent->active_mm == mm" here.
+        /* It is not valid to test "current->active_mm == mm" here.
          *
          * The value of "current" is not changed atomically with
          * switch_mm().  But that's OK, we just need to check the
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 441521ad8a3f..232df9949530 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -368,11 +368,11 @@ static unsigned long mmap_rnd(void)
         if (current->flags & PF_RANDOMIZE) {
                 unsigned long val = get_random_int();
                 if (test_thread_flag(TIF_32BIT))
-                        rnd = (val % (1UL << (22UL-PAGE_SHIFT)));
+                        rnd = (val % (1UL << (23UL-PAGE_SHIFT)));
                 else
-                        rnd = (val % (1UL << (29UL-PAGE_SHIFT)));
+                        rnd = (val % (1UL << (30UL-PAGE_SHIFT)));
         }
-        return (rnd << PAGE_SHIFT) * 2;
+        return rnd << PAGE_SHIFT;
 }
 
 void arch_pick_mmap_layout(struct mm_struct *mm)
diff --git a/arch/sparc/kernel/sysfs.c b/arch/sparc/kernel/sysfs.c
index 7408201d7efb..654e8aad3bbe 100644
--- a/arch/sparc/kernel/sysfs.c
+++ b/arch/sparc/kernel/sysfs.c
@@ -3,7 +3,7 @@
  * Copyright (C) 2007 David S. Miller <davem@davemloft.net>
  */
 #include <linux/sched.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/smp.h>
 #include <linux/percpu.h>
@@ -16,13 +16,13 @@
 static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64)));
 
 #define SHOW_MMUSTAT_ULONG(NAME) \
-static ssize_t show_##NAME(struct sys_device *dev, \
-                        struct sysdev_attribute *attr, char *buf) \
+static ssize_t show_##NAME(struct device *dev, \
+                        struct device_attribute *attr, char *buf) \
 { \
         struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \
         return sprintf(buf, "%lu\n", p->NAME); \
 } \
-static SYSDEV_ATTR(NAME, 0444, show_##NAME, NULL)
+static DEVICE_ATTR(NAME, 0444, show_##NAME, NULL)
 
 SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte);
 SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte);
@@ -58,38 +58,38 @@ SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_256mb_tte);
 SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte);
 
 static struct attribute *mmu_stat_attrs[] = {
-        &attr_immu_tsb_hits_ctx0_8k_tte.attr,
-        &attr_immu_tsb_ticks_ctx0_8k_tte.attr,
-        &attr_immu_tsb_hits_ctx0_64k_tte.attr,
-        &attr_immu_tsb_ticks_ctx0_64k_tte.attr,
-        &attr_immu_tsb_hits_ctx0_4mb_tte.attr,
-        &attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
-        &attr_immu_tsb_hits_ctx0_256mb_tte.attr,
-        &attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
-        &attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
-        &attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
-        &attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
-        &attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
-        &attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
-        &attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
-        &attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
-        &attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
-        &attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
-        &attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
-        &attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
-        &attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
-        &attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
-        &attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
-        &attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
-        &attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
-        &attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
-        &attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
-        &attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
-        &attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
-        &attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
-        &attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
-        &attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
-        &attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
+        &dev_attr_immu_tsb_hits_ctx0_8k_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctx0_8k_tte.attr,
+        &dev_attr_immu_tsb_hits_ctx0_64k_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctx0_64k_tte.attr,
+        &dev_attr_immu_tsb_hits_ctx0_4mb_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
+        &dev_attr_immu_tsb_hits_ctx0_256mb_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
+        &dev_attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
+        &dev_attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
+        &dev_attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
+        &dev_attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
+        &dev_attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
+        &dev_attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
+        &dev_attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
         NULL,
 };
 
@@ -139,15 +139,15 @@ static unsigned long write_mmustat_enable(unsigned long val)
         return sun4v_mmustat_conf(ra, &orig_ra);
 }
 
-static ssize_t show_mmustat_enable(struct sys_device *s,
-                                struct sysdev_attribute *attr, char *buf)
+static ssize_t show_mmustat_enable(struct device *s,
+                                struct device_attribute *attr, char *buf)
 {
         unsigned long val = run_on_cpu(s->id, read_mmustat_enable, 0);
         return sprintf(buf, "%lx\n", val);
 }
 
-static ssize_t store_mmustat_enable(struct sys_device *s,
-                        struct sysdev_attribute *attr, const char *buf,
+static ssize_t store_mmustat_enable(struct device *s,
+                        struct device_attribute *attr, const char *buf,
                         size_t count)
 {
         unsigned long val, err;
@@ -163,39 +163,39 @@ static ssize_t store_mmustat_enable(struct sys_device *s,
         return count;
 }
 
-static SYSDEV_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);
+static DEVICE_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);
 
 static int mmu_stats_supported;
 
-static int register_mmu_stats(struct sys_device *s)
+static int register_mmu_stats(struct device *s)
 {
         if (!mmu_stats_supported)
                 return 0;
-        sysdev_create_file(s, &attr_mmustat_enable);
+        device_create_file(s, &dev_attr_mmustat_enable);
         return sysfs_create_group(&s->kobj, &mmu_stat_group);
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
-static void unregister_mmu_stats(struct sys_device *s)
+static void unregister_mmu_stats(struct device *s)
 {
         if (!mmu_stats_supported)
                 return;
         sysfs_remove_group(&s->kobj, &mmu_stat_group);
-        sysdev_remove_file(s, &attr_mmustat_enable);
+        device_remove_file(s, &dev_attr_mmustat_enable);
 }
 #endif
 
 #define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \
-static ssize_t show_##NAME(struct sys_device *dev, \
-                struct sysdev_attribute *attr, char *buf) \
+static ssize_t show_##NAME(struct device *dev, \
+                struct device_attribute *attr, char *buf) \
 { \
         cpuinfo_sparc *c = &cpu_data(dev->id); \
         return sprintf(buf, "%lu\n", c->MEMBER); \
 }
 
 #define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \
-static ssize_t show_##NAME(struct sys_device *dev, \
-                struct sysdev_attribute *attr, char *buf) \
+static ssize_t show_##NAME(struct device *dev, \
+                struct device_attribute *attr, char *buf) \
 { \
         cpuinfo_sparc *c = &cpu_data(dev->id); \
         return sprintf(buf, "%u\n", c->MEMBER); \
@@ -209,14 +209,14 @@ SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size);
 SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size);
 SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size);
 
-static struct sysdev_attribute cpu_core_attrs[] = {
-        _SYSDEV_ATTR(clock_tick,          0444, show_clock_tick, NULL),
-        _SYSDEV_ATTR(l1_dcache_size,      0444, show_l1_dcache_size, NULL),
-        _SYSDEV_ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
-        _SYSDEV_ATTR(l1_icache_size,      0444, show_l1_icache_size, NULL),
-        _SYSDEV_ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
-        _SYSDEV_ATTR(l2_cache_size,       0444, show_l2_cache_size, NULL),
-        _SYSDEV_ATTR(l2_cache_line_size,  0444, show_l2_cache_line_size, NULL),
+static struct device_attribute cpu_core_attrs[] = {
+        __ATTR(clock_tick,          0444, show_clock_tick, NULL),
+        __ATTR(l1_dcache_size,      0444, show_l1_dcache_size, NULL),
+        __ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
+        __ATTR(l1_icache_size,      0444, show_l1_icache_size, NULL),
+        __ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
+        __ATTR(l2_cache_size,       0444, show_l2_cache_size, NULL),
+        __ATTR(l2_cache_line_size,  0444, show_l2_cache_line_size, NULL),
 };
 
 static DEFINE_PER_CPU(struct cpu, cpu_devices);
@@ -224,11 +224,11 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices);
 static void register_cpu_online(unsigned int cpu)
 {
         struct cpu *c = &per_cpu(cpu_devices, cpu);
-        struct sys_device *s = &c->sysdev;
+        struct device *s = &c->dev;
         int i;
 
         for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
-                sysdev_create_file(s, &cpu_core_attrs[i]);
+                device_create_file(s, &cpu_core_attrs[i]);
 
         register_mmu_stats(s);
 }
@@ -237,12 +237,12 @@ static void register_cpu_online(unsigned int cpu)
 static void unregister_cpu_online(unsigned int cpu)
 {
         struct cpu *c = &per_cpu(cpu_devices, cpu);
-        struct sys_device *s = &c->sysdev;
+        struct device *s = &c->dev;
         int i;
 
         unregister_mmu_stats(s);
         for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
-                sysdev_remove_file(s, &cpu_core_attrs[i]);
+                device_remove_file(s, &cpu_core_attrs[i]);
 }
 #endif
 
diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile
index e3cda21b5ee9..301421c11291 100644
--- a/arch/sparc/mm/Makefile
+++ b/arch/sparc/mm/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_SPARC64)   += ultra.o tlb.o tsb.o gup.o
 obj-y                   += fault_$(BITS).o
 obj-y                   += init_$(BITS).o
 obj-$(CONFIG_SPARC32)   += loadmmu.o
-obj-y                   += generic_$(BITS).o
 obj-$(CONFIG_SPARC32)   += extable.o btfixup.o srmmu.o iommu.o io-unit.o
 obj-$(CONFIG_SPARC32)   += hypersparc.o viking.o tsunami.o swift.o
 obj-$(CONFIG_SPARC_LEON)+= leon_mm.o
diff --git a/arch/sparc/mm/btfixup.c b/arch/sparc/mm/btfixup.c
index 5175ac2f4820..8a7f81743c12 100644
--- a/arch/sparc/mm/btfixup.c
+++ b/arch/sparc/mm/btfixup.c
@@ -302,8 +302,7 @@ void __init btfixup(void)
                                 case 'i':       /* INT */
                                         if ((insn & 0xc1c00000) == 0x01000000) /* %HI */
                                                 set_addr(addr, q[1], fmangled, (insn & 0xffc00000) | (p[1] >> 10));
-                                        else if ((insn & 0x80002000) == 0x80002000 &&
-                                                 (insn & 0x01800000) != 0x01800000) /* %LO */
+                                        else if ((insn & 0x80002000) == 0x80002000) /* %LO */
                                                 set_addr(addr, q[1], fmangled, (insn & 0xffffe000) | (p[1] & 0x3ff));
                                         else {
                                                 prom_printf(insn_i, p, addr, insn);
diff --git a/arch/sparc/mm/generic_32.c b/arch/sparc/mm/generic_32.c
deleted file mode 100644
index 6ca39a60a196..000000000000
--- a/arch/sparc/mm/generic_32.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * generic.c: Generic Sparc mm routines that are not dependent upon
- *            MMU type but are Sparc specific.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/pagemap.h>
-#include <linux/export.h>
-
-#include <asm/pgalloc.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/cacheflush.h>
-#include <asm/tlbflush.h>
-
-/* Remap IO memory, the same way as remap_pfn_range(), but use
- * the obio memory space.
- *
- * They use a pgprot that sets PAGE_IO and does not check the
- * mem_map table as this is independent of normal memory.
- */
-static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, unsigned long address, unsigned long size,
-        unsigned long offset, pgprot_t prot, int space)
-{
-        unsigned long end;
-
-        address &= ~PMD_MASK;
-        end = address + size;
-        if (end > PMD_SIZE)
-                end = PMD_SIZE;
-        do {
-                set_pte_at(mm, address, pte, mk_pte_io(offset, prot, space));
-                address += PAGE_SIZE;
-                offset += PAGE_SIZE;
-                pte++;
-        } while (address < end);
-}
-
-static inline int io_remap_pmd_range(struct mm_struct *mm, pmd_t * pmd, unsigned long address, unsigned long size,
-        unsigned long offset, pgprot_t prot, int space)
-{
-        unsigned long end;
-
-        address &= ~PGDIR_MASK;
-        end = address + size;
-        if (end > PGDIR_SIZE)
-                end = PGDIR_SIZE;
-        offset -= address;
-        do {
-                pte_t *pte = pte_alloc_map(mm, NULL, pmd, address);
-                if (!pte)
-                        return -ENOMEM;
-                io_remap_pte_range(mm, pte, address, end - address, address + offset, prot, space);
-                address = (address + PMD_SIZE) & PMD_MASK;
-                pmd++;
-        } while (address < end);
-        return 0;
-}
-
-int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
-                       unsigned long pfn, unsigned long size, pgprot_t prot)
-{
-        int error = 0;
-        pgd_t * dir;
-        unsigned long beg = from;
-        unsigned long end = from + size;
-        struct mm_struct *mm = vma->vm_mm;
-        int space = GET_IOSPACE(pfn);
-        unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
-
-        /* See comment in mm/memory.c remap_pfn_range */
-        vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
-        vma->vm_pgoff = (offset >> PAGE_SHIFT) |
-                ((unsigned long)space << 28UL);
-
-        offset -= from;
-        dir = pgd_offset(mm, from);
-        flush_cache_range(vma, beg, end);
-
-        while (from < end) {
-                pmd_t *pmd = pmd_alloc(mm, dir, from);
-                error = -ENOMEM;
-                if (!pmd)
-                        break;
-                error = io_remap_pmd_range(mm, pmd, from, end - from, offset + from, prot, space);
-                if (error)
-                        break;
-                from = (from + PGDIR_SIZE) & PGDIR_MASK;
-                dir++;
-        }
-
-        flush_tlb_range(vma, beg, end);
-        return error;
-}
-EXPORT_SYMBOL(io_remap_pfn_range);
diff --git a/arch/sparc/mm/generic_64.c b/arch/sparc/mm/generic_64.c
deleted file mode 100644
index 9b357ddae39d..000000000000
--- a/arch/sparc/mm/generic_64.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- * generic.c: Generic Sparc mm routines that are not dependent upon
- *            MMU type but are Sparc specific.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/export.h>
-#include <linux/pagemap.h>
-
-#include <asm/pgalloc.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/tlbflush.h>
-
-/* Remap IO memory, the same way as remap_pfn_range(), but use
- * the obio memory space.
- *
- * They use a pgprot that sets PAGE_IO and does not check the
- * mem_map table as this is independent of normal memory.
- */
-static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte,
-                                      unsigned long address,
-                                      unsigned long size,
-                                      unsigned long offset, pgprot_t prot,
-                                      int space)
-{
-        unsigned long end;
-
-        /* clear hack bit that was used as a write_combine side-effect flag */
-        offset &= ~0x1UL;
-        address &= ~PMD_MASK;
-        end = address + size;
-        if (end > PMD_SIZE)
-                end = PMD_SIZE;
-        do {
-                pte_t entry;
-                unsigned long curend = address + PAGE_SIZE;
-                
-                entry = mk_pte_io(offset, prot, space, PAGE_SIZE);
-                if (!(address & 0xffff)) {
-                        if (PAGE_SIZE < (4 * 1024 * 1024) &&
-                            !(address & 0x3fffff) &&
-                            !(offset & 0x3ffffe) &&
-                            end >= address + 0x400000) {
-                                entry = mk_pte_io(offset, prot, space,
-                                                  4 * 1024 * 1024);
-                                curend = address + 0x400000;
-                                offset += 0x400000;
-                        } else if (PAGE_SIZE < (512 * 1024) &&
-                                   !(address & 0x7ffff) &&
-                                   !(offset & 0x7fffe) &&
-                                   end >= address + 0x80000) {
-                                entry = mk_pte_io(offset, prot, space,
-                                                  512 * 1024 * 1024);
-                                curend = address + 0x80000;
-                                offset += 0x80000;
-                        } else if (PAGE_SIZE < (64 * 1024) &&
-                                   !(offset & 0xfffe) &&
-                                   end >= address + 0x10000) {
-                                entry = mk_pte_io(offset, prot, space,
-                                                  64 * 1024);
-                                curend = address + 0x10000;
-                                offset += 0x10000;
-                        } else
-                                offset += PAGE_SIZE;
-                } else
-                        offset += PAGE_SIZE;
-
-                if (pte_write(entry))
-                        entry = pte_mkdirty(entry);
-                do {
-                        BUG_ON(!pte_none(*pte));
-                        set_pte_at(mm, address, pte, entry);
-                        address += PAGE_SIZE;
-                        pte_val(entry) += PAGE_SIZE;
-                        pte++;
-                } while (address < curend);
-        } while (address < end);
-}
-
-static inline int io_remap_pmd_range(struct mm_struct *mm, pmd_t * pmd, unsigned long address, unsigned long size,
-        unsigned long offset, pgprot_t prot, int space)
-{
-        unsigned long end;
-
-        address &= ~PGDIR_MASK;
-        end = address + size;
-        if (end > PGDIR_SIZE)
-                end = PGDIR_SIZE;
-        offset -= address;
-        do {
-                pte_t *pte = pte_alloc_map(mm, NULL, pmd, address);
-                if (!pte)
-                        return -ENOMEM;
-                io_remap_pte_range(mm, pte, address, end - address, address + offset, prot, space);
-                pte_unmap(pte);
-                address = (address + PMD_SIZE) & PMD_MASK;
-                pmd++;
-        } while (address < end);
-        return 0;
-}
-
-static inline int io_remap_pud_range(struct mm_struct *mm, pud_t * pud, unsigned long address, unsigned long size,
-        unsigned long offset, pgprot_t prot, int space)
-{
-        unsigned long end;
-
-        address &= ~PUD_MASK;
-        end = address + size;
-        if (end > PUD_SIZE)
-                end = PUD_SIZE;
-        offset -= address;
-        do {
-                pmd_t *pmd = pmd_alloc(mm, pud, address);
-                if (!pud)
-                        return -ENOMEM;
-                io_remap_pmd_range(mm, pmd, address, end - address, address + offset, prot, space);
-                address = (address + PUD_SIZE) & PUD_MASK;
-                pud++;
-        } while (address < end);
-        return 0;
-}
-
-int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
-                unsigned long pfn, unsigned long size, pgprot_t prot)
-{
-        int error = 0;
-        pgd_t * dir;
-        unsigned long beg = from;
-        unsigned long end = from + size;
-        struct mm_struct *mm = vma->vm_mm;
-        int space = GET_IOSPACE(pfn);
-        unsigned long offset = GET_PFN(pfn) << PAGE_SHIFT;
-        unsigned long phys_base;
-
-        phys_base = offset | (((unsigned long) space) << 32UL);
-
-        /* See comment in mm/memory.c remap_pfn_range */
-        vma->vm_flags |= VM_IO | VM_RESERVED | VM_PFNMAP;
-        vma->vm_pgoff = phys_base >> PAGE_SHIFT;
-
-        offset -= from;
-        dir = pgd_offset(mm, from);
-        flush_cache_range(vma, beg, end);
-
-        while (from < end) {
-                pud_t *pud = pud_alloc(mm, dir, from);
-                error = -ENOMEM;
-                if (!pud)
-                        break;
-                error = io_remap_pud_range(mm, pud, from, end - from, offset + from, prot, space);
-                if (error)
-                        break;
-                from = (from + PGDIR_SIZE) & PGDIR_MASK;
-                dir++;
-        }
-
-        flush_tlb_range(vma, beg, end);
-        return error;
-}
-EXPORT_SYMBOL(io_remap_pfn_range);
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 8e073d802139..b3f5e7dfea51 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -790,7 +790,7 @@ static int find_node(unsigned long addr)
         return -1;
 }
 
-u64 memblock_nid_range(u64 start, u64 end, int *nid)
+static u64 memblock_nid_range(u64 start, u64 end, int *nid)
 {
         *nid = find_node(start);
         start += PAGE_SIZE;
@@ -808,7 +808,7 @@ u64 memblock_nid_range(u64 start, u64 end, int *nid)
         return start;
 }
 #else
-u64 memblock_nid_range(u64 start, u64 end, int *nid)
+static u64 memblock_nid_range(u64 start, u64 end, int *nid)
 {
         *nid = 0;
         return end;
@@ -816,7 +816,7 @@ u64 memblock_nid_range(u64 start, u64 end, int *nid)
 #endif
 
 /* This must be invoked after performing all of the necessary
- * add_active_range() calls for 'nid'.  We need to be able to get
+ * memblock_set_node() calls for 'nid'.  We need to be able to get
  * correct data from get_pfn_range_for_nid().
  */
 static void __init allocate_node_data(int nid)
@@ -987,14 +987,11 @@ static void __init add_node_ranges(void)
 
                         this_end = memblock_nid_range(start, end, &nid);
 
-                        numadbg("Adding active range nid[%d] "
+                        numadbg("Setting memblock NUMA node nid[%d] "
                                 "start[%lx] end[%lx]\n",
                                 nid, start, this_end);
 
-                        add_active_range(nid,
-                                         start >> PAGE_SHIFT,
-                                         this_end >> PAGE_SHIFT);
-
+                        memblock_set_node(start, this_end - start, nid);
                         start = this_end;
                 }
         }
@@ -1282,7 +1279,6 @@ static void __init bootmem_init_nonnuma(void)
 {
         unsigned long top_of_ram = memblock_end_of_DRAM();
         unsigned long total_ram = memblock_phys_mem_size();
-        struct memblock_region *reg;
 
         numadbg("bootmem_init_nonnuma()\n");
 
@@ -1292,20 +1288,8 @@ static void __init bootmem_init_nonnuma(void)
                (top_of_ram - total_ram) >> 20);
 
         init_node_masks_nonnuma();
-
-        for_each_memblock(memory, reg) {
-                unsigned long start_pfn, end_pfn;
-
-                if (!reg->size)
-                        continue;
-
-                start_pfn = memblock_region_memory_base_pfn(reg);
-                end_pfn = memblock_region_memory_end_pfn(reg);
-                add_active_range(0, start_pfn, end_pfn);
-        }
-
+        memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
         allocate_node_data(0);
-
         node_set_online(0);
 }
 
@@ -1769,8 +1753,6 @@ void __init paging_init(void)
                 sun4v_ktsb_init();
         }
 
-        memblock_init();
-
         /* Find available physical memory...
          *
          * Read it twice in order to work around a bug in openfirmware.
@@ -1796,7 +1778,7 @@ void __init paging_init(void)
 
         memblock_enforce_memory_limit(cmdline_memory_size);
 
-        memblock_analyze();
+        memblock_allow_resize();
         memblock_dump_all();
 
         set_bit(0, mmu_context_bmap);
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index 94e9a511de84..f80f8ceabc67 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -74,16 +74,6 @@ enum {
  */
 void tile_irq_activate(unsigned int irq, int tile_irq_type);
 
-/*
- * For onboard, non-PCI (e.g. TILE_IRQ_PERCPU) devices, drivers know
- * how to use enable/disable_percpu_irq() to manage interrupts on each
- * core.  We can't use the generic enable/disable_irq() because they
- * use a single reference count per irq, rather than per cpu per irq.
- */
-void enable_percpu_irq(unsigned int irq);
-void disable_percpu_irq(unsigned int irq);
-
-
 void setup_irq_regs(void);
 
 #endif /* _ASM_TILE_IRQ_H */
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index aa0134db2dd6..02e628065012 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -152,14 +152,13 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
  * Remove an irq from the disabled mask.  If we're in an interrupt
  * context, defer enabling the HW interrupt until we leave.
  */
-void enable_percpu_irq(unsigned int irq)
+static void tile_irq_chip_enable(struct irq_data *d)
 {
-        get_cpu_var(irq_disable_mask) &= ~(1UL << irq);
+        get_cpu_var(irq_disable_mask) &= ~(1UL << d->irq);
         if (__get_cpu_var(irq_depth) == 0)
-                unmask_irqs(1UL << irq);
+                unmask_irqs(1UL << d->irq);
         put_cpu_var(irq_disable_mask);
 }
-EXPORT_SYMBOL(enable_percpu_irq);
 
 /*
  * Add an irq to the disabled mask.  We disable the HW interrupt
@@ -167,13 +166,12 @@ EXPORT_SYMBOL(enable_percpu_irq);
  * in an interrupt context, the return path is careful to avoid
  * unmasking a newly disabled interrupt.
  */
-void disable_percpu_irq(unsigned int irq)
+static void tile_irq_chip_disable(struct irq_data *d)
 {
-        get_cpu_var(irq_disable_mask) |= (1UL << irq);
-        mask_irqs(1UL << irq);
+        get_cpu_var(irq_disable_mask) |= (1UL << d->irq);
+        mask_irqs(1UL << d->irq);
         put_cpu_var(irq_disable_mask);
 }
-EXPORT_SYMBOL(disable_percpu_irq);
 
 /* Mask an interrupt. */
 static void tile_irq_chip_mask(struct irq_data *d)
@@ -209,6 +207,8 @@ static void tile_irq_chip_eoi(struct irq_data *d)
 
 static struct irq_chip tile_irq_chip = {
         .name = "tile_irq_chip",
+        .irq_enable = tile_irq_chip_enable,
+        .irq_disable = tile_irq_chip_disable,
         .irq_ack = tile_irq_chip_ack,
         .irq_eoi = tile_irq_chip_eoi,
         .irq_mask = tile_irq_chip_mask,
diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c
index 658f2ce426a4..b3ed19f8779c 100644
--- a/arch/tile/kernel/pci-dma.c
+++ b/arch/tile/kernel/pci-dma.c
@@ -15,6 +15,7 @@
 #include <linux/mm.h>
 #include <linux/dma-mapping.h>
 #include <linux/vmalloc.h>
+#include <linux/export.h>
 #include <asm/tlbflush.h>
 #include <asm/homecache.h>
 
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 2a8014cb1ff5..9d610d3fb11e 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -24,6 +24,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/uaccess.h>
+#include <linux/export.h>
 
 #include <asm/processor.h>
 #include <asm/sections.h>
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 9c45d8bbdf57..4c1ac6e5347a 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -85,7 +85,8 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched()) {
                         if (cpu_is_offline(cpu))
                                 BUG();  /* no HOTPLUG_CPU */
@@ -105,7 +106,8 @@ void cpu_idle(void)
                                 local_irq_enable();
                         current_thread_info()->status |= TS_POLLING;
                 }
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/tile/kernel/sysfs.c b/arch/tile/kernel/sysfs.c
index b671a86f4515..f862b005eb73 100644
--- a/arch/tile/kernel/sysfs.c
+++ b/arch/tile/kernel/sysfs.c
@@ -14,10 +14,11 @@
  * /sys entry support.
  */
 
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/cpu.h>
 #include <linux/slab.h>
 #include <linux/smp.h>
+#include <linux/stat.h>
 #include <hv/hypervisor.h>
 
 /* Return a string queried from the hypervisor, truncated to page size. */
@@ -31,55 +32,55 @@ static ssize_t get_hv_confstr(char *page, int query)
         return n;
 }
 
-static ssize_t chip_width_show(struct sysdev_class *dev,
-                               struct sysdev_class_attribute *attr,
+static ssize_t chip_width_show(struct device *dev,
+                               struct device_attribute *attr,
                                char *page)
 {
         return sprintf(page, "%u\n", smp_width);
 }
-static SYSDEV_CLASS_ATTR(chip_width, 0444, chip_width_show, NULL);
+static DEVICE_ATTR(chip_width, 0444, chip_width_show, NULL);
 
-static ssize_t chip_height_show(struct sysdev_class *dev,
-                                struct sysdev_class_attribute *attr,
+static ssize_t chip_height_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *page)
 {
         return sprintf(page, "%u\n", smp_height);
 }
-static SYSDEV_CLASS_ATTR(chip_height, 0444, chip_height_show, NULL);
+static DEVICE_ATTR(chip_height, 0444, chip_height_show, NULL);
 
-static ssize_t chip_serial_show(struct sysdev_class *dev,
-                                struct sysdev_class_attribute *attr,
+static ssize_t chip_serial_show(struct device *dev,
+                                struct device_attribute *attr,
                                 char *page)
 {
         return get_hv_confstr(page, HV_CONFSTR_CHIP_SERIAL_NUM);
 }
-static SYSDEV_CLASS_ATTR(chip_serial, 0444, chip_serial_show, NULL);
+static DEVICE_ATTR(chip_serial, 0444, chip_serial_show, NULL);
 
-static ssize_t chip_revision_show(struct sysdev_class *dev,
-                                  struct sysdev_class_attribute *attr,
+static ssize_t chip_revision_show(struct device *dev,
+                                  struct device_attribute *attr,
                                   char *page)
 {
         return get_hv_confstr(page, HV_CONFSTR_CHIP_REV);
 }
-static SYSDEV_CLASS_ATTR(chip_revision, 0444, chip_revision_show, NULL);
+static DEVICE_ATTR(chip_revision, 0444, chip_revision_show, NULL);
 
 
-static ssize_t type_show(struct sysdev_class *dev,
-                            struct sysdev_class_attribute *attr,
+static ssize_t type_show(struct device *dev,
+                            struct device_attribute *attr,
                             char *page)
 {
         return sprintf(page, "tilera\n");
 }
-static SYSDEV_CLASS_ATTR(type, 0444, type_show, NULL);
+static DEVICE_ATTR(type, 0444, type_show, NULL);
 
 #define HV_CONF_ATTR(name, conf)                                        \
-        static ssize_t name ## _show(struct sysdev_class *dev,          \
-                                     struct sysdev_class_attribute *attr, \
+        static ssize_t name ## _show(struct device *dev,                \
+                                     struct device_attribute *attr, \
                                      char *page)                        \
         {                                                               \
                 return get_hv_confstr(page, conf);                      \
         }                                                               \
-        static SYSDEV_CLASS_ATTR(name, 0444, name ## _show, NULL);
+        static DEVICE_ATTR(name, 0444, name ## _show, NULL);
 
 HV_CONF_ATTR(version,           HV_CONFSTR_HV_SW_VER)
 HV_CONF_ATTR(config_version,    HV_CONFSTR_HV_CONFIG_VER)
@@ -95,15 +96,15 @@ HV_CONF_ATTR(mezz_description,	HV_CONFSTR_MEZZ_DESC)
 HV_CONF_ATTR(switch_control,    HV_CONFSTR_SWITCH_CONTROL)
 
 static struct attribute *board_attrs[] = {
-        &attr_board_part.attr,
-        &attr_board_serial.attr,
-        &attr_board_revision.attr,
-        &attr_board_description.attr,
-        &attr_mezz_part.attr,
-        &attr_mezz_serial.attr,
-        &attr_mezz_revision.attr,
-        &attr_mezz_description.attr,
-        &attr_switch_control.attr,
+        &dev_attr_board_part.attr,
+        &dev_attr_board_serial.attr,
+        &dev_attr_board_revision.attr,
+        &dev_attr_board_description.attr,
+        &dev_attr_mezz_part.attr,
+        &dev_attr_mezz_serial.attr,
+        &dev_attr_mezz_revision.attr,
+        &dev_attr_mezz_description.attr,
+        &dev_attr_switch_control.attr,
         NULL
 };
 
@@ -150,12 +151,11 @@ hvconfig_bin_read(struct file *filp, struct kobject *kobj,
 
 static int __init create_sysfs_entries(void)
 {
-        struct sysdev_class *cls = &cpu_sysdev_class;
         int err = 0;
 
 #define create_cpu_attr(name)                                           \
         if (!err)                                                       \
-                err = sysfs_create_file(&cls->kset.kobj, &attr_##name.attr);
+                err = device_create_file(cpu_subsys.dev_root, &dev_attr_##name);
         create_cpu_attr(chip_width);
         create_cpu_attr(chip_height);
         create_cpu_attr(chip_serial);
@@ -163,7 +163,7 @@ static int __init create_sysfs_entries(void)
 
 #define create_hv_attr(name)                                            \
         if (!err)                                                       \
-                err = sysfs_create_file(hypervisor_kobj, &attr_##name.attr);
+                err = sysfs_create_file(hypervisor_kobj, &dev_attr_##name);
         create_hv_attr(type);
         create_hv_attr(version);
         create_hv_attr(config_version);
diff --git a/arch/tile/lib/exports.c b/arch/tile/lib/exports.c
index a87d2a859ba9..2a81d32de0da 100644
--- a/arch/tile/lib/exports.c
+++ b/arch/tile/lib/exports.c
@@ -39,6 +39,9 @@ EXPORT_SYMBOL(finv_user_asm);
 EXPORT_SYMBOL(current_text_addr);
 EXPORT_SYMBOL(dump_stack);
 
+/* arch/tile/kernel/head.S */
+EXPORT_SYMBOL(empty_zero_page);
+
 /* arch/tile/lib/, various memcpy files */
 EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(__copy_to_user_inatomic);
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index 25b7b90fd620..c1eaaa1fcc20 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -54,7 +54,7 @@ static noinline void force_sig_info_fault(const char *type, int si_signo,
         if (unlikely(tsk->pid < 2)) {
                 panic("Signal %d (code %d) at %#lx sent to %s!",
                       si_signo, si_code & 0xffff, address,
-                      tsk->pid ? "init" : "the idle task");
+                      is_idle_task(tsk) ? "the idle task" : "init");
         }
 
         info.si_signo = si_signo;
@@ -515,7 +515,7 @@ no_context:
 
         if (unlikely(tsk->pid < 2)) {
                 panic("Kernel page fault running %s!",
-                      tsk->pid ? "init" : "the idle task");
+                      is_idle_task(tsk) ? "the idle task" : "init");
         }
 
         /*
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c
index cbe6f4f9eca3..1cc6ae477c98 100644
--- a/arch/tile/mm/homecache.c
+++ b/arch/tile/mm/homecache.c
@@ -449,9 +449,12 @@ void homecache_free_pages(unsigned long addr, unsigned int order)
         VM_BUG_ON(!virt_addr_valid((void *)addr));
         page = virt_to_page((void *)addr);
         if (put_page_testzero(page)) {
-                int pages = (1 << order);
                 homecache_change_page_home(page, order, initial_page_home());
-                while (pages--)
-                        __free_page(page++);
+                if (order == 0) {
+                        free_hot_cold_page(page, 0);
+                } else {
+                        init_page_count(page);
+                        __free_pages(page, order);
+                }
         }
 }
diff --git a/arch/um/include/asm/thread_info.h b/arch/um/include/asm/thread_info.h
index 5bd1bad33fab..200c4ab1240c 100644
--- a/arch/um/include/asm/thread_info.h
+++ b/arch/um/include/asm/thread_info.h
@@ -71,7 +71,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_MEMDIE              5       /* is terminating due to OOM killer */
 #define TIF_SYSCALL_AUDIT       6
 #define TIF_RESTORE_SIGMASK     7
-#define TIF_FREEZE              16      /* is freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
@@ -80,6 +79,5 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_MEMDIE             (1 << TIF_MEMDIE)
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 
 #endif
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index c5338351aecd..69f24905abdc 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -246,10 +246,12 @@ void default_idle(void)
                 if (need_resched())
                         schedule();
 
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 nsecs = disable_timer();
                 idle_sleep(nsecs);
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
         }
 }
 
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index a08d9fab81f2..82a6e22f1f35 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -75,8 +75,6 @@ static struct clocksource itimer_clocksource = {
         .rating         = 300,
         .read           = itimer_read,
         .mask           = CLOCKSOURCE_MASK(64),
-        .mult           = 1000,
-        .shift          = 0,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
@@ -94,9 +92,9 @@ static void __init setup_itimer(void)
                 clockevent_delta2ns(60 * HZ, &itimer_clockevent);
         itimer_clockevent.min_delta_ns =
                 clockevent_delta2ns(1, &itimer_clockevent);
-        err = clocksource_register(&itimer_clocksource);
+        err = clocksource_register_hz(&itimer_clocksource, USEC_PER_SEC);
         if (err) {
-                printk(KERN_ERR "clocksource_register returned %d\n", err);
+                printk(KERN_ERR "clocksource_register_hz returned %d\n", err);
                 return;
         }
         clockevents_register_device(&itimer_clockevent);
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index e57dcce9bfda..942ed6174f1d 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -237,13 +237,13 @@ menu "PKUnity NetBook-0916 Features"
 
 config I2C_BATTERY_BQ27200
         tristate "I2C Battery BQ27200 Support"
-        select PUV3_I2C
+        select I2C_PUV3
         select POWER_SUPPLY
         select BATTERY_BQ27x00
 
 config I2C_EEPROM_AT24
         tristate "I2C EEPROMs AT24 support"
-        select PUV3_I2C
+        select I2C_PUV3
         select MISC_DEVICES
         select EEPROM_AT24
 
diff --git a/arch/unicore32/Kconfig.debug b/arch/unicore32/Kconfig.debug
index ae2ec334c3c6..1a3626239843 100644
--- a/arch/unicore32/Kconfig.debug
+++ b/arch/unicore32/Kconfig.debug
@@ -44,18 +44,4 @@ config DEBUG_OCD
           Say Y here if you want the debug print routines to direct their
           output to the UniCore On-Chip-Debugger channel using CP #1.
 
-config DEBUG_OCD_BREAKPOINT
-        bool "Breakpoint support via On-Chip-Debugger"
-        depends on DEBUG_OCD
-
-config DEBUG_UART
-        int "Kernel low-level debugging messages via serial port"
-        depends on DEBUG_LL
-        range 0 1
-        default "0"
-        help
-          Choice for UART for kernel low-level using PKUnity UARTS,
-          should be between zero and one. The port must have been
-          initialised by the boot-loader before use.
-
 endmenu
diff --git a/arch/unicore32/boot/compressed/Makefile b/arch/unicore32/boot/compressed/Makefile
index b0954a2d23cf..950a9afa38f8 100644
--- a/arch/unicore32/boot/compressed/Makefile
+++ b/arch/unicore32/boot/compressed/Makefile
@@ -10,8 +10,8 @@
 # Copyright (C) 2001~2010 GUAN Xue-tao
 #
 
-EXTRA_CFLAGS    := -fpic -fno-builtin
-EXTRA_AFLAGS    := -Wa,-march=all
+ccflags-y       := -fpic -fno-builtin
+asflags-y       := -Wa,-march=all
 
 OBJS            := misc.o
 
diff --git a/arch/unicore32/include/asm/bitops.h b/arch/unicore32/include/asm/bitops.h
index 1628a6328994..401f597bc38c 100644
--- a/arch/unicore32/include/asm/bitops.h
+++ b/arch/unicore32/include/asm/bitops.h
@@ -13,12 +13,6 @@
 #ifndef __UNICORE_BITOPS_H__
 #define __UNICORE_BITOPS_H__
 
-#define find_next_bit           __uc32_find_next_bit
-#define find_next_zero_bit      __uc32_find_next_zero_bit
-
-#define find_first_bit          __uc32_find_first_bit
-#define find_first_zero_bit     __uc32_find_first_zero_bit
-
 #define _ASM_GENERIC_BITOPS_FLS_H_
 #define _ASM_GENERIC_BITOPS___FLS_H_
 #define _ASM_GENERIC_BITOPS_FFS_H_
@@ -44,4 +38,10 @@ static inline int fls(int x)
 
 #include <asm-generic/bitops.h>
 
+/* following definitions: to avoid using codes in lib/find_*.c */
+#define find_next_bit           find_next_bit
+#define find_next_zero_bit      find_next_zero_bit
+#define find_first_bit          find_first_bit
+#define find_first_zero_bit     find_first_zero_bit
+
 #endif /* __UNICORE_BITOPS_H__ */
diff --git a/arch/unicore32/include/asm/processor.h b/arch/unicore32/include/asm/processor.h
index e11cb0786578..f0d780a51f9b 100644
--- a/arch/unicore32/include/asm/processor.h
+++ b/arch/unicore32/include/asm/processor.h
@@ -53,7 +53,6 @@ struct thread_struct {
 #define start_thread(regs, pc, sp)                                      \
 ({                                                                      \
         unsigned long *stack = (unsigned long *)sp;                     \
-        set_fs(USER_DS);                                                \
         memset(regs->uregs, 0, sizeof(regs->uregs));                    \
         regs->UCreg_asr = USER_MODE;                                    \
         regs->UCreg_pc = pc & ~1;       /* pc */                        \
diff --git a/arch/unicore32/include/asm/thread_info.h b/arch/unicore32/include/asm/thread_info.h
index c270e9e04861..89f7557583b8 100644
--- a/arch/unicore32/include/asm/thread_info.h
+++ b/arch/unicore32/include/asm/thread_info.h
@@ -135,14 +135,12 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_NOTIFY_RESUME       2       /* callback before returning to user */
 #define TIF_SYSCALL_TRACE       8
 #define TIF_MEMDIE              18
-#define TIF_FREEZE              19
 #define TIF_RESTORE_SIGMASK     20
 
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
 
 /*
diff --git a/arch/unicore32/kernel/ksyms.c b/arch/unicore32/kernel/ksyms.c
index a8970809428a..d98bd812cae1 100644
--- a/arch/unicore32/kernel/ksyms.c
+++ b/arch/unicore32/kernel/ksyms.c
@@ -24,8 +24,8 @@
 
 #include "ksyms.h"
 
-EXPORT_SYMBOL(__uc32_find_next_zero_bit);
-EXPORT_SYMBOL(__uc32_find_next_bit);
+EXPORT_SYMBOL(find_next_zero_bit);
+EXPORT_SYMBOL(find_next_bit);
 
 EXPORT_SYMBOL(__backtrace);
 
diff --git a/arch/unicore32/kernel/process.c b/arch/unicore32/kernel/process.c
index ba401df971ed..52edc2b62873 100644
--- a/arch/unicore32/kernel/process.c
+++ b/arch/unicore32/kernel/process.c
@@ -55,7 +55,8 @@ void cpu_idle(void)
 {
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched()) {
                         local_irq_disable();
                         stop_critical_timings();
@@ -63,7 +64,8 @@ void cpu_idle(void)
                         local_irq_enable();
                         start_critical_timings();
                 }
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/unicore32/kernel/puv3-core.c b/arch/unicore32/kernel/puv3-core.c
index 1a505a787765..254adeecc61a 100644
--- a/arch/unicore32/kernel/puv3-core.c
+++ b/arch/unicore32/kernel/puv3-core.c
@@ -13,7 +13,6 @@
 
 #include <linux/init.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
diff --git a/arch/unicore32/kernel/puv3-nb0916.c b/arch/unicore32/kernel/puv3-nb0916.c
index e731c561ed4e..37b12a06b499 100644
--- a/arch/unicore32/kernel/puv3-nb0916.c
+++ b/arch/unicore32/kernel/puv3-nb0916.c
@@ -13,7 +13,6 @@
 
 #include <linux/init.h>
 #include <linux/device.h>
-#include <linux/sysdev.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
 #include <linux/io.h>
diff --git a/arch/unicore32/kernel/setup.c b/arch/unicore32/kernel/setup.c
index 471b6bca8da4..673d7a89d8ff 100644
--- a/arch/unicore32/kernel/setup.c
+++ b/arch/unicore32/kernel/setup.c
@@ -37,6 +37,7 @@
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 #include <asm/traps.h>
+#include <asm/memblock.h>
 
 #include "setup.h"
 
diff --git a/arch/unicore32/lib/findbit.S b/arch/unicore32/lib/findbit.S
index c360ce905d8b..c77746247d36 100644
--- a/arch/unicore32/lib/findbit.S
+++ b/arch/unicore32/lib/findbit.S
@@ -17,7 +17,7 @@
  * Purpose  : Find a 'zero' bit
  * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit);
  */
-__uc32_find_first_zero_bit:
+ENTRY(find_first_zero_bit)
                 cxor.a  r1, #0
                 beq     3f
                 mov     r2, #0
@@ -29,13 +29,14 @@ __uc32_find_first_zero_bit:
                 bub     1b
 3:              mov     r0, r1                  @ no free bits
                 mov     pc, lr
+ENDPROC(find_first_zero_bit)
 
 /*
  * Purpose  : Find next 'zero' bit
  * Prototype: int find_next_zero_bit
  *              (void *addr, unsigned int maxbit, int offset)
  */
-ENTRY(__uc32_find_next_zero_bit)
+ENTRY(find_next_zero_bit)
                 cxor.a  r1, #0
                 beq     3b
                 and.a   ip, r2, #7
@@ -47,14 +48,14 @@ ENTRY(__uc32_find_next_zero_bit)
                 or      r2, r2, #7              @ if zero, then no bits here
                 add     r2, r2, #1              @ align bit pointer
                 b       2b                      @ loop for next bit
-ENDPROC(__uc32_find_next_zero_bit)
+ENDPROC(find_next_zero_bit)
 
 /*
  * Purpose  : Find a 'one' bit
  * Prototype: int find_first_bit
  *              (const unsigned long *addr, unsigned int maxbit);
  */
-__uc32_find_first_bit:
+ENTRY(find_first_bit)
                 cxor.a  r1, #0
                 beq     3f
                 mov     r2, #0
@@ -66,13 +67,14 @@ __uc32_find_first_bit:
                 bub     1b
 3:              mov     r0, r1                  @ no free bits
                 mov     pc, lr
+ENDPROC(find_first_bit)
 
 /*
  * Purpose  : Find next 'one' bit
  * Prototype: int find_next_zero_bit
  *              (void *addr, unsigned int maxbit, int offset)
  */
-ENTRY(__uc32_find_next_bit)
+ENTRY(find_next_bit)
                 cxor.a  r1, #0
                 beq     3b
                 and.a   ip, r2, #7
@@ -83,7 +85,7 @@ ENTRY(__uc32_find_next_bit)
                 or      r2, r2, #7              @ if zero, then no bits here
                 add     r2, r2, #1              @ align bit pointer
                 b       2b                      @ loop for next bit
-ENDPROC(__uc32_find_next_bit)
+ENDPROC(find_next_bit)
 
 /*
  * One or more bits in the LSB of r3 are assumed to be set.
diff --git a/arch/unicore32/mm/init.c b/arch/unicore32/mm/init.c
index 3b379cddbc64..de186bde8975 100644
--- a/arch/unicore32/mm/init.c
+++ b/arch/unicore32/mm/init.c
@@ -26,6 +26,7 @@
 #include <asm/setup.h>
 #include <asm/sizes.h>
 #include <asm/tlb.h>
+#include <asm/memblock.h>
 #include <mach/map.h>
 
 #include "mm.h"
@@ -245,7 +246,6 @@ void __init uc32_memblock_init(struct meminfo *mi)
         sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]),
                 meminfo_cmp, NULL);
 
-        memblock_init();
         for (i = 0; i < mi->nr_banks; i++)
                 memblock_add(mi->bank[i].start, mi->bank[i].size);
 
@@ -264,7 +264,7 @@ void __init uc32_memblock_init(struct meminfo *mi)
 
         uc32_mm_memblock_reserve();
 
-        memblock_analyze();
+        memblock_allow_resize();
         memblock_dump_all();
 }
 
diff --git a/arch/unicore32/mm/mmu.c b/arch/unicore32/mm/mmu.c
index 3e5c3e5a0b45..43c20b40e444 100644
--- a/arch/unicore32/mm/mmu.c
+++ b/arch/unicore32/mm/mmu.c
@@ -25,6 +25,7 @@
 #include <asm/setup.h>
 #include <asm/sizes.h>
 #include <asm/tlb.h>
+#include <asm/memblock.h>
 
 #include <mach/map.h>
 
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cb9a1044a771..1d2a69dd36d8 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -26,6 +26,8 @@ config X86
         select HAVE_IOREMAP_PROT
         select HAVE_KPROBES
         select HAVE_MEMBLOCK
+        select HAVE_MEMBLOCK_NODE_MAP
+        select ARCH_DISCARD_MEMBLOCK
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select ARCH_WANT_FRAME_POINTERS
         select HAVE_DMA_ATTRS
@@ -204,9 +206,6 @@ config ZONE_DMA32
         bool
         default X86_64
 
-config ARCH_POPULATES_NODE_MAP
-        def_bool y
-
 config AUDIT_ARCH
         bool
         default X86_64
@@ -343,6 +342,7 @@ config X86_EXTENDED_PLATFORM
 
           If you enable this option then you'll be able to select support
           for the following (non-PC) 64 bit x86 platforms:
+                Numascale NumaChip
                 ScaleMP vSMP
                 SGI Ultraviolet
 
@@ -351,6 +351,18 @@ config X86_EXTENDED_PLATFORM
 endif
 # This is an alphabetically sorted list of 64 bit extended platforms
 # Please maintain the alphabetic order if and when there are additions
+config X86_NUMACHIP
+        bool "Numascale NumaChip"
+        depends on X86_64
+        depends on X86_EXTENDED_PLATFORM
+        depends on NUMA
+        depends on SMP
+        depends on X86_X2APIC
+        depends on !EDAC_AMD64
+        ---help---
+          Adds support for Numascale NumaChip large-SMP systems. Needed to
+          enable more than ~168 cores.
+          If you don't have one of these, you should say N here.
 
 config X86_VSMP
         bool "ScaleMP vSMP"
@@ -390,7 +402,7 @@ config X86_INTEL_CE
           This option compiles in support for the CE4100 SOC for settop
           boxes and media devices.
 
-config X86_INTEL_MID
+config X86_WANT_INTEL_MID
         bool "Intel MID platform support"
         depends on X86_32
         depends on X86_EXTENDED_PLATFORM
@@ -399,7 +411,10 @@ config X86_INTEL_MID
           systems which do not have the PCI legacy interfaces (Moorestown,
           Medfield). If you are building for a PC class system say N here.
 
-if X86_INTEL_MID
+if X86_WANT_INTEL_MID
+
+config X86_INTEL_MID
+        bool
 
 config X86_MRST
        bool "Moorestown MID platform"
@@ -411,6 +426,7 @@ config X86_MRST
         select SPI
         select INTEL_SCU_IPC
         select X86_PLATFORM_DEVICES
+        select X86_INTEL_MID
         ---help---
           Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
           Internet Device(MID) platform. Moorestown consists of two chips:
@@ -1726,7 +1742,7 @@ source "drivers/sfi/Kconfig"
 
 config X86_APM_BOOT
         def_bool y
-        depends on APM || APM_MODULE
+        depends on APM
 
 menuconfig APM
         tristate "APM (Advanced Power Management) BIOS support"
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index a6253ec1b284..3e274564f6bf 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -134,7 +134,7 @@ ENTRY(ia32_sysenter_target)
         CFI_REL_OFFSET rsp,0
         pushfq_cfi
         /*CFI_REL_OFFSET rflags,0*/
-        movl    8*3-THREAD_SIZE+TI_sysenter_return(%rsp), %r10d
+        movl    TI_sysenter_return+THREAD_INFO(%rsp,3*8-KERNEL_STACK_OFFSET),%r10d
         CFI_REGISTER rip,r10
         pushq_cfi $__USER32_CS
         /*CFI_REL_OFFSET cs,0*/
@@ -150,9 +150,8 @@ ENTRY(ia32_sysenter_target)
         .section __ex_table,"a"
         .quad 1b,ia32_badarg
         .previous       
-        GET_THREAD_INFO(%r10)
-        orl    $TS_COMPAT,TI_status(%r10)
-        testl  $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10)
+        orl     $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+        testl   $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         CFI_REMEMBER_STATE
         jnz  sysenter_tracesys
         cmpq    $(IA32_NR_syscalls-1),%rax
@@ -162,13 +161,12 @@ sysenter_do_call:
 sysenter_dispatch:
         call    *ia32_sys_call_table(,%rax,8)
         movq    %rax,RAX-ARGOFFSET(%rsp)
-        GET_THREAD_INFO(%r10)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
-        testl   $_TIF_ALLWORK_MASK,TI_flags(%r10)
+        testl   $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jnz     sysexit_audit
 sysexit_from_sys_call:
-        andl    $~TS_COMPAT,TI_status(%r10)
+        andl    $~TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         /* clear IF, that popfq doesn't enable interrupts early */
         andl  $~0x200,EFLAGS-R11(%rsp) 
         movl    RIP-R11(%rsp),%edx              /* User %eip */
@@ -205,7 +203,7 @@ sysexit_from_sys_call:
         .endm
 
         .macro auditsys_exit exit
-        testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10)
+        testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jnz ia32_ret_from_sys_call
         TRACE_IRQS_ON
         sti
@@ -215,12 +213,11 @@ sysexit_from_sys_call:
         movzbl %al,%edi         /* zero-extend that into %edi */
         inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */
         call audit_syscall_exit
-        GET_THREAD_INFO(%r10)
         movl RAX-ARGOFFSET(%rsp),%eax   /* reload syscall return value */
         movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi
         cli
         TRACE_IRQS_OFF
-        testl %edi,TI_flags(%r10)
+        testl %edi,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jz \exit
         CLEAR_RREGS -ARGOFFSET
         jmp int_with_check
@@ -238,7 +235,7 @@ sysexit_audit:
 
 sysenter_tracesys:
 #ifdef CONFIG_AUDITSYSCALL
-        testl   $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10)
+        testl   $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jz      sysenter_auditsys
 #endif
         SAVE_REST
@@ -309,9 +306,8 @@ ENTRY(ia32_cstar_target)
         .section __ex_table,"a"
         .quad 1b,ia32_badarg
         .previous       
-        GET_THREAD_INFO(%r10)
-        orl   $TS_COMPAT,TI_status(%r10)
-        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10)
+        orl     $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+        testl   $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         CFI_REMEMBER_STATE
         jnz   cstar_tracesys
         cmpq $IA32_NR_syscalls-1,%rax
@@ -321,13 +317,12 @@ cstar_do_call:
 cstar_dispatch:
         call *ia32_sys_call_table(,%rax,8)
         movq %rax,RAX-ARGOFFSET(%rsp)
-        GET_THREAD_INFO(%r10)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
-        testl $_TIF_ALLWORK_MASK,TI_flags(%r10)
+        testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jnz sysretl_audit
 sysretl_from_sys_call:
-        andl $~TS_COMPAT,TI_status(%r10)
+        andl $~TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         RESTORE_ARGS 0,-ARG_SKIP,0,0,0
         movl RIP-ARGOFFSET(%rsp),%ecx
         CFI_REGISTER rip,rcx
@@ -355,7 +350,7 @@ sysretl_audit:
 
 cstar_tracesys:
 #ifdef CONFIG_AUDITSYSCALL
-        testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10)
+        testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jz cstar_auditsys
 #endif
         xchgl %r9d,%ebp
@@ -420,9 +415,8 @@ ENTRY(ia32_syscall)
         /* note the registers are not zero extended to the sf.
            this could be a problem. */
         SAVE_ARGS 0,1,0
-        GET_THREAD_INFO(%r10)
-        orl   $TS_COMPAT,TI_status(%r10)
-        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10)
+        orl $TS_COMPAT,TI_status+THREAD_INFO(%rsp,RIP-ARGOFFSET)
+        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jnz ia32_tracesys
         cmpq $(IA32_NR_syscalls-1),%rax
         ja ia32_badsys
@@ -459,8 +453,8 @@ quiet_ni_syscall:
         CFI_ENDPROC
         
         .macro PTREGSCALL label, func, arg
-        .globl \label
-\label:
+        ALIGN
+GLOBAL(\label)
         leaq \func(%rip),%rax
         leaq -ARGOFFSET+8(%rsp),\arg    /* 8 for return address */
         jmp  ia32_ptregs_common 
@@ -477,7 +471,8 @@ quiet_ni_syscall:
         PTREGSCALL stub32_vfork, sys_vfork, %rdi
         PTREGSCALL stub32_iopl, sys_iopl, %rsi
 
-ENTRY(ia32_ptregs_common)
+        ALIGN
+ia32_ptregs_common:
         popq %r11
         CFI_ENDPROC
         CFI_STARTPROC32 simple
diff --git a/arch/x86/include/asm/alternative-asm.h b/arch/x86/include/asm/alternative-asm.h
index 091508b533b4..952bd0100c5c 100644
--- a/arch/x86/include/asm/alternative-asm.h
+++ b/arch/x86/include/asm/alternative-asm.h
@@ -4,10 +4,10 @@
 
 #ifdef CONFIG_SMP
         .macro LOCK_PREFIX
-1:      lock
+672:    lock
         .section .smp_locks,"a"
         .balign 4
-        .long 1b - .
+        .long 672b - .
         .previous
         .endm
 #else
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 9b7273cb2193..3ab9bdd87e79 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -49,6 +49,7 @@ extern unsigned int apic_verbosity;
 extern int local_apic_timer_c2_ok;
 
 extern int disable_apic;
+extern unsigned int lapic_timer_frequency;
 
 #ifdef CONFIG_SMP
 extern void __inquire_remote_apic(int apicid);
@@ -175,6 +176,7 @@ static inline u64 native_x2apic_icr_read(void)
 }
 
 extern int x2apic_phys;
+extern int x2apic_preenabled;
 extern void check_x2apic(void);
 extern void enable_x2apic(void);
 extern void x2apic_icr_write(u32 low, u32 id);
@@ -197,6 +199,9 @@ static inline void x2apic_force_phys(void)
         x2apic_phys = 1;
 }
 #else
+static inline void disable_x2apic(void)
+{
+}
 static inline void check_x2apic(void)
 {
 }
@@ -211,6 +216,7 @@ static inline void x2apic_force_phys(void)
 {
 }
 
+#define nox2apic        0
 #define x2apic_preenabled 0
 #define x2apic_supported()      0
 #endif
@@ -409,6 +415,7 @@ extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
 #endif
 
 #ifdef CONFIG_X86_LOCAL_APIC
+
 static inline u32 apic_read(u32 reg)
 {
         return apic->read(reg);
diff --git a/arch/x86/include/asm/apic_flat_64.h b/arch/x86/include/asm/apic_flat_64.h
new file mode 100644
index 000000000000..a2d312796440
--- /dev/null
+++ b/arch/x86/include/asm/apic_flat_64.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_X86_APIC_FLAT_64_H
+#define _ASM_X86_APIC_FLAT_64_H
+
+extern void flat_init_apic_ldr(void);
+
+#endif
+
diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index 3925d8007864..134bba00df09 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -144,6 +144,7 @@
 
 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
 #define APIC_BASE_MSR   0x800
+#define XAPIC_ENABLE    (1UL << 11)
 #define X2APIC_ENABLE   (1UL << 10)
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 1775d6e5920e..b97596e2b68c 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -380,6 +380,8 @@ static inline unsigned long __fls(unsigned long word)
         return word;
 }
 
+#undef ADDR
+
 #ifdef __KERNEL__
 /**
  * ffs - find first set bit in word
@@ -395,10 +397,25 @@ static inline unsigned long __fls(unsigned long word)
 static inline int ffs(int x)
 {
         int r;
-#ifdef CONFIG_X86_CMOV
+
+#ifdef CONFIG_X86_64
+        /*
+         * AMD64 says BSFL won't clobber the dest reg if x==0; Intel64 says the
+         * dest reg is undefined if x==0, but their CPU architect says its
+         * value is written to set it to the same as before, except that the
+         * top 32 bits will be cleared.
+         *
+         * We cannot do this on 32 bits because at the very least some
+         * 486 CPUs did not behave this way.
+         */
+        long tmp = -1;
+        asm("bsfl %1,%0"
+            : "=r" (r)
+            : "rm" (x), "0" (tmp));
+#elif defined(CONFIG_X86_CMOV)
         asm("bsfl %1,%0\n\t"
             "cmovzl %2,%0"
-            : "=r" (r) : "rm" (x), "r" (-1));
+            : "=&r" (r) : "rm" (x), "r" (-1));
 #else
         asm("bsfl %1,%0\n\t"
             "jnz 1f\n\t"
@@ -422,7 +439,22 @@ static inline int ffs(int x)
 static inline int fls(int x)
 {
         int r;
-#ifdef CONFIG_X86_CMOV
+
+#ifdef CONFIG_X86_64
+        /*
+         * AMD64 says BSRL won't clobber the dest reg if x==0; Intel64 says the
+         * dest reg is undefined if x==0, but their CPU architect says its
+         * value is written to set it to the same as before, except that the
+         * top 32 bits will be cleared.
+         *
+         * We cannot do this on 32 bits because at the very least some
+         * 486 CPUs did not behave this way.
+         */
+        long tmp = -1;
+        asm("bsrl %1,%0"
+            : "=r" (r)
+            : "rm" (x), "0" (tmp));
+#elif defined(CONFIG_X86_CMOV)
         asm("bsrl %1,%0\n\t"
             "cmovzl %2,%0"
             : "=&r" (r) : "rm" (x), "rm" (-1));
@@ -434,11 +466,35 @@ static inline int fls(int x)
 #endif
         return r + 1;
 }
-#endif /* __KERNEL__ */
-
-#undef ADDR
 
-#ifdef __KERNEL__
+/**
+ * fls64 - find last set bit in a 64-bit word
+ * @x: the word to search
+ *
+ * This is defined in a similar way as the libc and compiler builtin
+ * ffsll, but returns the position of the most significant set bit.
+ *
+ * fls64(value) returns 0 if value is 0 or the position of the last
+ * set bit if value is nonzero. The last (most significant) bit is
+ * at position 64.
+ */
+#ifdef CONFIG_X86_64
+static __always_inline int fls64(__u64 x)
+{
+        long bitpos = -1;
+        /*
+         * AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the
+         * dest reg is undefined if x==0, but their CPU architect says its
+         * value is written to set it to the same as before.
+         */
+        asm("bsrq %1,%0"
+            : "+r" (bitpos)
+            : "rm" (x));
+        return bitpos + 1;
+}
+#else
+#include <asm-generic/bitops/fls64.h>
+#endif
 
 #include <asm-generic/bitops/find.h>
 
@@ -450,12 +506,6 @@ static inline int fls(int x)
 
 #include <asm-generic/bitops/const_hweight.h>
 
-#endif /* __KERNEL__ */
-
-#include <asm-generic/bitops/fls64.h>
-
-#ifdef __KERNEL__
-
 #include <asm-generic/bitops/le.h>
 
 #include <asm-generic/bitops/ext2-atomic-setbit.h>
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index 5d3acdf5a7a6..0c9fa2745f13 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -14,6 +14,8 @@ extern void __cmpxchg_wrong_size(void)
         __compiletime_error("Bad argument size for cmpxchg");
 extern void __xadd_wrong_size(void)
         __compiletime_error("Bad argument size for xadd");
+extern void __add_wrong_size(void)
+        __compiletime_error("Bad argument size for add");
 
 /*
  * Constants for operation sizes. On 32-bit, the 64-bit size it set to
@@ -31,60 +33,47 @@ extern void __xadd_wrong_size(void)
 #define __X86_CASE_Q    -1              /* sizeof will never return -1 */
 #endif
 
+/* 
+ * An exchange-type operation, which takes a value and a pointer, and
+ * returns a the old value.
+ */
+#define __xchg_op(ptr, arg, op, lock)                                   \
+        ({                                                              \
+                __typeof__ (*(ptr)) __ret = (arg);                      \
+                switch (sizeof(*(ptr))) {                               \
+                case __X86_CASE_B:                                      \
+                        asm volatile (lock #op "b %b0, %1\n"            \
+                                      : "+r" (__ret), "+m" (*(ptr))     \
+                                      : : "memory", "cc");              \
+                        break;                                          \
+                case __X86_CASE_W:                                      \
+                        asm volatile (lock #op "w %w0, %1\n"            \
+                                      : "+r" (__ret), "+m" (*(ptr))     \
+                                      : : "memory", "cc");              \
+                        break;                                          \
+                case __X86_CASE_L:                                      \
+                        asm volatile (lock #op "l %0, %1\n"             \
+                                      : "+r" (__ret), "+m" (*(ptr))     \
+                                      : : "memory", "cc");              \
+                        break;                                          \
+                case __X86_CASE_Q:                                      \
+                        asm volatile (lock #op "q %q0, %1\n"            \
+                                      : "+r" (__ret), "+m" (*(ptr))     \
+                                      : : "memory", "cc");              \
+                        break;                                          \
+                default:                                                \
+                        __ ## op ## _wrong_size();                      \
+                }                                                       \
+                __ret;                                                  \
+        })
+
 /*
  * Note: no "lock" prefix even on SMP: xchg always implies lock anyway.
  * Since this is generally used to protect other memory information, we
  * use "asm volatile" and "memory" clobbers to prevent gcc from moving
  * information around.
  */
-#define __xchg(x, ptr, size)                                            \
-({                                                                      \
-        __typeof(*(ptr)) __x = (x);                                     \
-        switch (size) {                                                 \
-        case __X86_CASE_B:                                              \
-        {                                                               \
-                volatile u8 *__ptr = (volatile u8 *)(ptr);              \
-                asm volatile("xchgb %0,%1"                              \
-                             : "=q" (__x), "+m" (*__ptr)                \
-                             : "0" (__x)                                \
-                             : "memory");                               \
-                break;                                                  \
-        }                                                               \
-        case __X86_CASE_W:                                              \
-        {                                                               \
-                volatile u16 *__ptr = (volatile u16 *)(ptr);            \
-                asm volatile("xchgw %0,%1"                              \
-                             : "=r" (__x), "+m" (*__ptr)                \
-                             : "0" (__x)                                \
-                             : "memory");                               \
-                break;                                                  \
-        }                                                               \
-        case __X86_CASE_L:                                              \
-        {                                                               \
-                volatile u32 *__ptr = (volatile u32 *)(ptr);            \
-                asm volatile("xchgl %0,%1"                              \
-                             : "=r" (__x), "+m" (*__ptr)                \
-                             : "0" (__x)                                \
-                             : "memory");                               \
-                break;                                                  \
-        }                                                               \
-        case __X86_CASE_Q:                                              \
-        {                                                               \
-                volatile u64 *__ptr = (volatile u64 *)(ptr);            \
-                asm volatile("xchgq %0,%1"                              \
-                             : "=r" (__x), "+m" (*__ptr)                \
-                             : "0" (__x)                                \
-                             : "memory");                               \
-                break;                                                  \
-        }                                                               \
-        default:                                                        \
-                __xchg_wrong_size();                                    \
-        }                                                               \
-        __x;                                                            \
-})
-
-#define xchg(ptr, v)                                                    \
-        __xchg((v), (ptr), sizeof(*ptr))
+#define xchg(ptr, v)    __xchg_op((ptr), (v), xchg, "")
 
 /*
  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
@@ -165,46 +154,80 @@ extern void __xadd_wrong_size(void)
         __cmpxchg_local((ptr), (old), (new), sizeof(*ptr))
 #endif
 
-#define __xadd(ptr, inc, lock)                                          \
+/*
+ * xadd() adds "inc" to "*ptr" and atomically returns the previous
+ * value of "*ptr".
+ *
+ * xadd() is locked when multiple CPUs are online
+ * xadd_sync() is always locked
+ * xadd_local() is never locked
+ */
+#define __xadd(ptr, inc, lock)  __xchg_op((ptr), (inc), xadd, lock)
+#define xadd(ptr, inc)          __xadd((ptr), (inc), LOCK_PREFIX)
+#define xadd_sync(ptr, inc)     __xadd((ptr), (inc), "lock; ")
+#define xadd_local(ptr, inc)    __xadd((ptr), (inc), "")
+
+#define __add(ptr, inc, lock)                                           \
         ({                                                              \
                 __typeof__ (*(ptr)) __ret = (inc);                      \
                 switch (sizeof(*(ptr))) {                               \
                 case __X86_CASE_B:                                      \
-                        asm volatile (lock "xaddb %b0, %1\n"            \
-                                      : "+r" (__ret), "+m" (*(ptr))     \
-                                      : : "memory", "cc");              \
+                        asm volatile (lock "addb %b1, %0\n"             \
+                                      : "+m" (*(ptr)) : "ri" (inc)      \
+                                      : "memory", "cc");                \
                         break;                                          \
                 case __X86_CASE_W:                                      \
-                        asm volatile (lock "xaddw %w0, %1\n"            \
-                                      : "+r" (__ret), "+m" (*(ptr))     \
-                                      : : "memory", "cc");              \
+                        asm volatile (lock "addw %w1, %0\n"             \
+                                      : "+m" (*(ptr)) : "ri" (inc)      \
+                                      : "memory", "cc");                \
                         break;                                          \
                 case __X86_CASE_L:                                      \
-                        asm volatile (lock "xaddl %0, %1\n"             \
-                                      : "+r" (__ret), "+m" (*(ptr))     \
-                                      : : "memory", "cc");              \
+                        asm volatile (lock "addl %1, %0\n"              \
+                                      : "+m" (*(ptr)) : "ri" (inc)      \
+                                      : "memory", "cc");                \
                         break;                                          \
                 case __X86_CASE_Q:                                      \
-                        asm volatile (lock "xaddq %q0, %1\n"            \
-                                      : "+r" (__ret), "+m" (*(ptr))     \
-                                      : : "memory", "cc");              \
+                        asm volatile (lock "addq %1, %0\n"              \
+                                      : "+m" (*(ptr)) : "ri" (inc)      \
+                                      : "memory", "cc");                \
                         break;                                          \
                 default:                                                \
-                        __xadd_wrong_size();                            \
+                        __add_wrong_size();                             \
                 }                                                       \
                 __ret;                                                  \
         })
 
 /*
- * xadd() adds "inc" to "*ptr" and atomically returns the previous
- * value of "*ptr".
+ * add_*() adds "inc" to "*ptr"
  *
- * xadd() is locked when multiple CPUs are online
- * xadd_sync() is always locked
- * xadd_local() is never locked
+ * __add() takes a lock prefix
+ * add_smp() is locked when multiple CPUs are online
+ * add_sync() is always locked
  */
-#define xadd(ptr, inc)          __xadd((ptr), (inc), LOCK_PREFIX)
-#define xadd_sync(ptr, inc)     __xadd((ptr), (inc), "lock; ")
-#define xadd_local(ptr, inc)    __xadd((ptr), (inc), "")
+#define add_smp(ptr, inc)       __add((ptr), (inc), LOCK_PREFIX)
+#define add_sync(ptr, inc)      __add((ptr), (inc), "lock; ")
+
+#define __cmpxchg_double(pfx, p1, p2, o1, o2, n1, n2)                   \
+({                                                                      \
+        bool __ret;                                                     \
+        __typeof__(*(p1)) __old1 = (o1), __new1 = (n1);                 \
+        __typeof__(*(p2)) __old2 = (o2), __new2 = (n2);                 \
+        BUILD_BUG_ON(sizeof(*(p1)) != sizeof(long));                    \
+        BUILD_BUG_ON(sizeof(*(p2)) != sizeof(long));                    \
+        VM_BUG_ON((unsigned long)(p1) % (2 * sizeof(long)));            \
+        VM_BUG_ON((unsigned long)((p1) + 1) != (unsigned long)(p2));    \
+        asm volatile(pfx "cmpxchg%c4b %2; sete %0"                      \
+                     : "=a" (__ret), "+d" (__old2),                     \
+                       "+m" (*(p1)), "+m" (*(p2))                       \
+                     : "i" (2 * sizeof(long)), "a" (__old1),            \
+                       "b" (__new1), "c" (__new2));                     \
+        __ret;                                                          \
+})
+
+#define cmpxchg_double(p1, p2, o1, o2, n1, n2) \
+        __cmpxchg_double(LOCK_PREFIX, p1, p2, o1, o2, n1, n2)
+
+#define cmpxchg_double_local(p1, p2, o1, o2, n1, n2) \
+        __cmpxchg_double(, p1, p2, o1, o2, n1, n2)
 
 #endif  /* ASM_X86_CMPXCHG_H */
diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxchg_32.h
index fbebb07dd80b..53f4b219336b 100644
--- a/arch/x86/include/asm/cmpxchg_32.h
+++ b/arch/x86/include/asm/cmpxchg_32.h
@@ -166,52 +166,6 @@ static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old,
 
 #endif
 
-#define cmpxchg8b(ptr, o1, o2, n1, n2)                          \
-({                                                              \
-        char __ret;                                             \
-        __typeof__(o2) __dummy;                                 \
-        __typeof__(*(ptr)) __old1 = (o1);                       \
-        __typeof__(o2) __old2 = (o2);                           \
-        __typeof__(*(ptr)) __new1 = (n1);                       \
-        __typeof__(o2) __new2 = (n2);                           \
-        asm volatile(LOCK_PREFIX "cmpxchg8b %2; setz %1"        \
-                       : "=d"(__dummy), "=a" (__ret), "+m" (*ptr)\
-                       : "a" (__old1), "d"(__old2),             \
-                         "b" (__new1), "c" (__new2)             \
-                       : "memory");                             \
-        __ret; })
-
-
-#define cmpxchg8b_local(ptr, o1, o2, n1, n2)                    \
-({                                                              \
-        char __ret;                                             \
-        __typeof__(o2) __dummy;                                 \
-        __typeof__(*(ptr)) __old1 = (o1);                       \
-        __typeof__(o2) __old2 = (o2);                           \
-        __typeof__(*(ptr)) __new1 = (n1);                       \
-        __typeof__(o2) __new2 = (n2);                           \
-        asm volatile("cmpxchg8b %2; setz %1"                    \
-                       : "=d"(__dummy), "=a"(__ret), "+m" (*ptr)\
-                       : "a" (__old), "d"(__old2),              \
-                         "b" (__new1), "c" (__new2),            \
-                       : "memory");                             \
-        __ret; })
-
-
-#define cmpxchg_double(ptr, o1, o2, n1, n2)                             \
-({                                                                      \
-        BUILD_BUG_ON(sizeof(*(ptr)) != 4);                              \
-        VM_BUG_ON((unsigned long)(ptr) % 8);                            \
-        cmpxchg8b((ptr), (o1), (o2), (n1), (n2));                       \
-})
-
-#define cmpxchg_double_local(ptr, o1, o2, n1, n2)                       \
-({                                                                      \
-       BUILD_BUG_ON(sizeof(*(ptr)) != 4);                               \
-       VM_BUG_ON((unsigned long)(ptr) % 8);                             \
-       cmpxchg16b_local((ptr), (o1), (o2), (n1), (n2));                 \
-})
-
 #define system_has_cmpxchg_double() cpu_has_cx8
 
 #endif /* _ASM_X86_CMPXCHG_32_H */
diff --git a/arch/x86/include/asm/cmpxchg_64.h b/arch/x86/include/asm/cmpxchg_64.h
index 285da02c38fa..614be87f1a9b 100644
--- a/arch/x86/include/asm/cmpxchg_64.h
+++ b/arch/x86/include/asm/cmpxchg_64.h
@@ -20,49 +20,6 @@ static inline void set_64bit(volatile u64 *ptr, u64 val)
         cmpxchg_local((ptr), (o), (n));                                 \
 })
 
-#define cmpxchg16b(ptr, o1, o2, n1, n2)                         \
-({                                                              \
-        char __ret;                                             \
-        __typeof__(o2) __junk;                                  \
-        __typeof__(*(ptr)) __old1 = (o1);                       \
-        __typeof__(o2) __old2 = (o2);                           \
-        __typeof__(*(ptr)) __new1 = (n1);                       \
-        __typeof__(o2) __new2 = (n2);                           \
-        asm volatile(LOCK_PREFIX "cmpxchg16b %2;setz %1"        \
-                       : "=d"(__junk), "=a"(__ret), "+m" (*ptr) \
-                       : "b"(__new1), "c"(__new2),              \
-                         "a"(__old1), "d"(__old2));             \
-        __ret; })
-
-
-#define cmpxchg16b_local(ptr, o1, o2, n1, n2)                   \
-({                                                              \
-        char __ret;                                             \
-        __typeof__(o2) __junk;                                  \
-        __typeof__(*(ptr)) __old1 = (o1);                       \
-        __typeof__(o2) __old2 = (o2);                           \
-        __typeof__(*(ptr)) __new1 = (n1);                       \
-        __typeof__(o2) __new2 = (n2);                           \
-        asm volatile("cmpxchg16b %2;setz %1"                    \
-                       : "=d"(__junk), "=a"(__ret), "+m" (*ptr) \
-                       : "b"(__new1), "c"(__new2),              \
-                         "a"(__old1), "d"(__old2));             \
-        __ret; })
-
-#define cmpxchg_double(ptr, o1, o2, n1, n2)                             \
-({                                                                      \
-        BUILD_BUG_ON(sizeof(*(ptr)) != 8);                              \
-        VM_BUG_ON((unsigned long)(ptr) % 16);                           \
-        cmpxchg16b((ptr), (o1), (o2), (n1), (n2));                      \
-})
-
-#define cmpxchg_double_local(ptr, o1, o2, n1, n2)                       \
-({                                                                      \
-        BUILD_BUG_ON(sizeof(*(ptr)) != 8);                              \
-        VM_BUG_ON((unsigned long)(ptr) % 16);                           \
-        cmpxchg16b_local((ptr), (o1), (o2), (n1), (n2));                \
-})
-
 #define system_has_cmpxchg_double() cpu_has_cx16
 
 #endif /* _ASM_X86_CMPXCHG_64_H */
diff --git a/arch/x86/include/asm/div64.h b/arch/x86/include/asm/div64.h
index 9a2d644c08ef..ced283ac79df 100644
--- a/arch/x86/include/asm/div64.h
+++ b/arch/x86/include/asm/div64.h
@@ -4,6 +4,7 @@
 #ifdef CONFIG_X86_32
 
 #include <linux/types.h>
+#include <linux/log2.h>
 
 /*
  * do_div() is NOT a C function. It wants to return
@@ -21,15 +22,20 @@
 ({                                                              \
         unsigned long __upper, __low, __high, __mod, __base;    \
         __base = (base);                                        \
-        asm("":"=a" (__low), "=d" (__high) : "A" (n));          \
-        __upper = __high;                                       \
-        if (__high) {                                           \
-                __upper = __high % (__base);                    \
-                __high = __high / (__base);                     \
+        if (__builtin_constant_p(__base) && is_power_of_2(__base)) { \
+                __mod = n & (__base - 1);                       \
+                n >>= ilog2(__base);                            \
+        } else {                                                \
+                asm("" : "=a" (__low), "=d" (__high) : "A" (n));\
+                __upper = __high;                               \
+                if (__high) {                                   \
+                        __upper = __high % (__base);            \
+                        __high = __high / (__base);             \
+                }                                               \
+                asm("divl %2" : "=a" (__low), "=d" (__mod)      \
+                        : "rm" (__base), "0" (__low), "1" (__upper));   \
+                asm("" : "=A" (n) : "a" (__low), "d" (__high)); \
         }                                                       \
-        asm("divl %2":"=a" (__low), "=d" (__mod)                \
-            : "rm" (__base), "0" (__low), "1" (__upper));       \
-        asm("":"=A" (n) : "a" (__low), "d" (__high));           \
         __mod;                                                  \
 })
 
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 908b96957d88..37782566af24 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -117,7 +117,7 @@ static inline void early_memtest(unsigned long start, unsigned long end)
 
 extern unsigned long e820_end_of_ram_pfn(void);
 extern unsigned long e820_end_of_low_ram_pfn(void);
-extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align);
+extern u64 early_reserve_e820(u64 sizet, u64 align);
 
 void memblock_x86_fill(void);
 void memblock_find_dma_reserve(void);
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 55e4de613f0e..da0b3ca815b7 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -11,6 +11,7 @@ typedef struct {
 #ifdef CONFIG_X86_LOCAL_APIC
         unsigned int apic_timer_irqs;   /* arch dependent */
         unsigned int irq_spurious_count;
+        unsigned int icr_read_retry_count;
 #endif
         unsigned int x86_platform_ipis; /* arch dependent */
         unsigned int apic_perf_irqs;
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index c9e09ea05644..6919e936345b 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -218,7 +218,7 @@ static inline void fpu_fxsave(struct fpu *fpu)
 #ifdef CONFIG_SMP
 #define safe_address (__per_cpu_offset[0])
 #else
-#define safe_address (kstat_cpu(0).cpustat.user)
+#define safe_address (__get_cpu_var(kernel_cpustat).cpustat[CPUTIME_USER])
 #endif
 
 /*
diff --git a/arch/x86/include/asm/insn.h b/arch/x86/include/asm/insn.h
index 88c765e16410..74df3f1eddfd 100644
--- a/arch/x86/include/asm/insn.h
+++ b/arch/x86/include/asm/insn.h
@@ -137,6 +137,13 @@ static inline int insn_is_avx(struct insn *insn)
         return (insn->vex_prefix.value != 0);
 }
 
+/* Ensure this instruction is decoded completely */
+static inline int insn_complete(struct insn *insn)
+{
+        return insn->opcode.got && insn->modrm.got && insn->sib.got &&
+                insn->displacement.got && insn->immediate.got;
+}
+
 static inline insn_byte_t insn_vex_m_bits(struct insn *insn)
 {
         if (insn->vex_prefix.nbytes == 2)       /* 2 bytes VEX */
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h
index 4420993acc47..925b605eb5c6 100644
--- a/arch/x86/include/asm/intel_scu_ipc.h
+++ b/arch/x86/include/asm/intel_scu_ipc.h
@@ -3,11 +3,15 @@
 
 #include <linux/notifier.h>
 
-#define IPCMSG_VRTC     0xFA     /* Set vRTC device */
-
-/* Command id associated with message IPCMSG_VRTC */
-#define IPC_CMD_VRTC_SETTIME      1 /* Set time */
-#define IPC_CMD_VRTC_SETALARM     2 /* Set alarm */
+#define IPCMSG_WARM_RESET       0xF0
+#define IPCMSG_COLD_RESET       0xF1
+#define IPCMSG_SOFT_RESET       0xF2
+#define IPCMSG_COLD_BOOT        0xF3
+
+#define IPCMSG_VRTC             0xFA     /* Set vRTC device */
+        /* Command id associated with message IPCMSG_VRTC */
+        #define IPC_CMD_VRTC_SETTIME      1 /* Set time */
+        #define IPC_CMD_VRTC_SETALARM     2 /* Set alarm */
 
 /* Read single register */
 int intel_scu_ipc_ioread8(u16 addr, u8 *data);
diff --git a/arch/x86/include/asm/mach_timer.h b/arch/x86/include/asm/mach_timer.h
index 853728519ae9..88d0c3c74c13 100644
--- a/arch/x86/include/asm/mach_timer.h
+++ b/arch/x86/include/asm/mach_timer.h
@@ -15,7 +15,7 @@
 
 #define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
 #define CALIBRATE_LATCH \
-        ((CLOCK_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
+        ((PIT_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
 
 static inline void mach_prepare_counter(void)
 {
diff --git a/arch/x86/include/asm/mach_traps.h b/arch/x86/include/asm/mach_traps.h
index 72a8b52e7dfd..a01e7ec7d237 100644
--- a/arch/x86/include/asm/mach_traps.h
+++ b/arch/x86/include/asm/mach_traps.h
@@ -17,7 +17,7 @@
 #define NMI_REASON_CLEAR_IOCHK  0x08
 #define NMI_REASON_CLEAR_MASK   0x0f
 
-static inline unsigned char get_nmi_reason(void)
+static inline unsigned char default_get_nmi_reason(void)
 {
         return inb(NMI_REASON_PORT);
 }
diff --git a/arch/x86/include/asm/mc146818rtc.h b/arch/x86/include/asm/mc146818rtc.h
index 01fdf5674e24..0e8e85bb7c51 100644
--- a/arch/x86/include/asm/mc146818rtc.h
+++ b/arch/x86/include/asm/mc146818rtc.h
@@ -81,8 +81,8 @@ static inline unsigned char current_lock_cmos_reg(void)
 #else
 #define lock_cmos_prefix(reg) do {} while (0)
 #define lock_cmos_suffix(reg) do {} while (0)
-#define lock_cmos(reg)
-#define unlock_cmos()
+#define lock_cmos(reg) do { } while (0)
+#define unlock_cmos() do { } while (0)
 #define do_i_have_lock_cmos() 0
 #define current_lock_cmos_reg() 0
 #endif
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index c9321f34e55b..f35ce43c1a77 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -50,10 +50,11 @@
 #define MCJ_CTX_MASK            3
 #define MCJ_CTX(flags)          ((flags) & MCJ_CTX_MASK)
 #define MCJ_CTX_RANDOM          0    /* inject context: random */
-#define MCJ_CTX_PROCESS         1    /* inject context: process */
-#define MCJ_CTX_IRQ             2    /* inject context: IRQ */
-#define MCJ_NMI_BROADCAST       4    /* do NMI broadcasting */
-#define MCJ_EXCEPTION           8    /* raise as exception */
+#define MCJ_CTX_PROCESS         0x1  /* inject context: process */
+#define MCJ_CTX_IRQ             0x2  /* inject context: IRQ */
+#define MCJ_NMI_BROADCAST       0x4  /* do NMI broadcasting */
+#define MCJ_EXCEPTION           0x8  /* raise as exception */
+#define MCJ_IRQ_BRAODCAST       0x10 /* do IRQ broadcasting */
 
 /* Fields are zero when not available */
 struct mce {
@@ -120,7 +121,8 @@ struct mce_log {
 
 #ifdef __KERNEL__
 
-extern struct atomic_notifier_head x86_mce_decoder_chain;
+extern void mce_register_decode_chain(struct notifier_block *nb);
+extern void mce_unregister_decode_chain(struct notifier_block *nb);
 
 #include <linux/percpu.h>
 #include <linux/init.h>
@@ -149,7 +151,7 @@ static inline void enable_p5_mce(void) {}
 
 void mce_setup(struct mce *m);
 void mce_log(struct mce *m);
-DECLARE_PER_CPU(struct sys_device, mce_sysdev);
+DECLARE_PER_CPU(struct device, mce_device);
 
 /*
  * Maximum banks number.
@@ -201,7 +203,10 @@ int mce_notify_irq(void);
 void mce_notify_process(void);
 
 DECLARE_PER_CPU(struct mce, injectm);
-extern struct file_operations mce_chrdev_ops;
+
+extern void register_mce_write_callback(ssize_t (*)(struct file *filp,
+                                    const char __user *ubuf,
+                                    size_t usize, loff_t *off));
 
 /*
  * Exception handler
diff --git a/arch/x86/include/asm/memblock.h b/arch/x86/include/asm/memblock.h
deleted file mode 100644
index 0cd3800f33b9..000000000000
--- a/arch/x86/include/asm/memblock.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef _X86_MEMBLOCK_H
-#define _X86_MEMBLOCK_H
-
-#define ARCH_DISCARD_MEMBLOCK
-
-u64 memblock_x86_find_in_range_size(u64 start, u64 *sizep, u64 align);
-
-void memblock_x86_reserve_range(u64 start, u64 end, char *name);
-void memblock_x86_free_range(u64 start, u64 end);
-struct range;
-int __get_free_all_memory_range(struct range **range, int nodeid,
-                         unsigned long start_pfn, unsigned long end_pfn);
-int get_free_all_memory_range(struct range **rangep, int nodeid);
-
-void memblock_x86_register_active_regions(int nid, unsigned long start_pfn,
-                                         unsigned long last_pfn);
-u64 memblock_x86_hole_size(u64 start, u64 end);
-u64 memblock_x86_find_in_range_node(int nid, u64 start, u64 end, u64 size, u64 align);
-u64 memblock_x86_free_memory_in_range(u64 addr, u64 limit);
-u64 memblock_x86_memory_in_range(u64 addr, u64 limit);
-bool memblock_x86_check_reserved_size(u64 *addrp, u64 *sizep, u64 align);
-
-#endif
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 24215072d0e1..4ebe157bf73d 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -48,6 +48,7 @@ static inline struct microcode_ops * __init init_intel_microcode(void)
 
 #ifdef CONFIG_MICROCODE_AMD
 extern struct microcode_ops * __init init_amd_microcode(void);
+extern void __exit exit_amd_microcode(void);
 
 static inline void get_ucode_data(void *to, const u8 *from, size_t n)
 {
@@ -59,6 +60,7 @@ static inline struct microcode_ops * __init init_amd_microcode(void)
 {
         return NULL;
 }
+static inline void __exit exit_amd_microcode(void) {}
 #endif
 
 #endif /* _ASM_X86_MICROCODE_H */
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 719f00b28ff5..93f79094c224 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -31,11 +31,20 @@ enum mrst_cpu_type {
 };
 
 extern enum mrst_cpu_type __mrst_cpu_chip;
+
+#ifdef CONFIG_X86_INTEL_MID
+
 static inline enum mrst_cpu_type mrst_identify_cpu(void)
 {
         return __mrst_cpu_chip;
 }
 
+#else /* !CONFIG_X86_INTEL_MID */
+
+#define mrst_identify_cpu()    (0)
+
+#endif /* !CONFIG_X86_INTEL_MID */
+
 enum mrst_timer_options {
         MRST_TIMER_DEFAULT,
         MRST_TIMER_APBT_ONLY,
@@ -44,6 +53,13 @@ enum mrst_timer_options {
 
 extern enum mrst_timer_options mrst_timer_options;
 
+/*
+ * Penwell uses spread spectrum clock, so the freq number is not exactly
+ * the same as reported by MSR based on SDM.
+ */
+#define PENWELL_FSB_FREQ_83SKU         83200
+#define PENWELL_FSB_FREQ_100SKU        99840
+
 #define SFI_MTMR_MAX_NUM 8
 #define SFI_MRTC_MAX    8
 
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 084ef95274cd..95203d40ffdd 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -169,7 +169,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
         return native_write_msr_safe(msr, low, high);
 }
 
-/* rdmsr with exception handling */
+/*
+ * rdmsr with exception handling.
+ *
+ * Please note that the exception handling works only after we've
+ * switched to the "smart" #GP handler in trap_init() which knows about
+ * exception tables - using this macro earlier than that causes machine
+ * hangs on boxes which do not implement the @msr in the first argument.
+ */
 #define rdmsr_safe(msr, p1, p2)                                 \
 ({                                                              \
         int __err;                                              \
diff --git a/arch/x86/include/asm/numachip/numachip_csr.h b/arch/x86/include/asm/numachip/numachip_csr.h
new file mode 100644
index 000000000000..660f843df928
--- /dev/null
+++ b/arch/x86/include/asm/numachip/numachip_csr.h
@@ -0,0 +1,167 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Numascale NumaConnect-Specific Header file
+ *
+ * Copyright (C) 2011 Numascale AS. All rights reserved.
+ *
+ * Send feedback to <support@numascale.com>
+ *
+ */
+
+#ifndef _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
+#define _ASM_X86_NUMACHIP_NUMACHIP_CSR_H
+
+#include <linux/numa.h>
+#include <linux/percpu.h>
+#include <linux/io.h>
+#include <linux/swab.h>
+#include <asm/types.h>
+#include <asm/processor.h>
+
+#define CSR_NODE_SHIFT          16
+#define CSR_NODE_BITS(p)        (((unsigned long)(p)) << CSR_NODE_SHIFT)
+#define CSR_NODE_MASK           0x0fff          /* 4K nodes */
+
+/* 32K CSR space, b15 indicates geo/non-geo */
+#define CSR_OFFSET_MASK 0x7fffUL
+
+/* Global CSR space covers all 4K possible nodes with 64K CSR space per node */
+#define NUMACHIP_GCSR_BASE      0x3fff00000000ULL
+#define NUMACHIP_GCSR_LIM       0x3fff0fffffffULL
+#define NUMACHIP_GCSR_SIZE      (NUMACHIP_GCSR_LIM - NUMACHIP_GCSR_BASE + 1)
+
+/*
+ * Local CSR space starts in global CSR space with "nodeid" = 0xfff0, however
+ * when using the direct mapping on x86_64, both start and size needs to be
+ * aligned with PMD_SIZE which is 2M
+ */
+#define NUMACHIP_LCSR_BASE      0x3ffffe000000ULL
+#define NUMACHIP_LCSR_LIM       0x3fffffffffffULL
+#define NUMACHIP_LCSR_SIZE      (NUMACHIP_LCSR_LIM - NUMACHIP_LCSR_BASE + 1)
+
+static inline void *gcsr_address(int node, unsigned long offset)
+{
+        return __va(NUMACHIP_GCSR_BASE | (1UL << 15) |
+                CSR_NODE_BITS(node & CSR_NODE_MASK) | (offset & CSR_OFFSET_MASK));
+}
+
+static inline void *lcsr_address(unsigned long offset)
+{
+        return __va(NUMACHIP_LCSR_BASE | (1UL << 15) |
+                CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK));
+}
+
+static inline unsigned int read_gcsr(int node, unsigned long offset)
+{
+        return swab32(readl(gcsr_address(node, offset)));
+}
+
+static inline void write_gcsr(int node, unsigned long offset, unsigned int val)
+{
+        writel(swab32(val), gcsr_address(node, offset));
+}
+
+static inline unsigned int read_lcsr(unsigned long offset)
+{
+        return swab32(readl(lcsr_address(offset)));
+}
+
+static inline void write_lcsr(unsigned long offset, unsigned int val)
+{
+        writel(swab32(val), lcsr_address(offset));
+}
+
+/* ========================================================================= */
+/*                   CSR_G0_STATE_CLEAR                                      */
+/* ========================================================================= */
+
+#define CSR_G0_STATE_CLEAR (0x000 + (0 << 12))
+union numachip_csr_g0_state_clear {
+        unsigned int v;
+        struct numachip_csr_g0_state_clear_s {
+                unsigned int _state:2;
+                unsigned int _rsvd_2_6:5;
+                unsigned int _lost:1;
+                unsigned int _rsvd_8_31:24;
+        } s;
+};
+
+/* ========================================================================= */
+/*                   CSR_G0_NODE_IDS                                         */
+/* ========================================================================= */
+
+#define CSR_G0_NODE_IDS (0x008 + (0 << 12))
+union numachip_csr_g0_node_ids {
+        unsigned int v;
+        struct numachip_csr_g0_node_ids_s {
+                unsigned int _initialid:16;
+                unsigned int _nodeid:12;
+                unsigned int _rsvd_28_31:4;
+        } s;
+};
+
+/* ========================================================================= */
+/*                   CSR_G3_EXT_IRQ_GEN                                      */
+/* ========================================================================= */
+
+#define CSR_G3_EXT_IRQ_GEN (0x030 + (3 << 12))
+union numachip_csr_g3_ext_irq_gen {
+        unsigned int v;
+        struct numachip_csr_g3_ext_irq_gen_s {
+                unsigned int _vector:8;
+                unsigned int _msgtype:3;
+                unsigned int _index:5;
+                unsigned int _destination_apic_id:16;
+        } s;
+};
+
+/* ========================================================================= */
+/*                   CSR_G3_EXT_IRQ_STATUS                                   */
+/* ========================================================================= */
+
+#define CSR_G3_EXT_IRQ_STATUS (0x034 + (3 << 12))
+union numachip_csr_g3_ext_irq_status {
+        unsigned int v;
+        struct numachip_csr_g3_ext_irq_status_s {
+                unsigned int _result:32;
+        } s;
+};
+
+/* ========================================================================= */
+/*                   CSR_G3_EXT_IRQ_DEST                                     */
+/* ========================================================================= */
+
+#define CSR_G3_EXT_IRQ_DEST (0x038 + (3 << 12))
+union numachip_csr_g3_ext_irq_dest {
+        unsigned int v;
+        struct numachip_csr_g3_ext_irq_dest_s {
+                unsigned int _irq:8;
+                unsigned int _rsvd_8_31:24;
+        } s;
+};
+
+/* ========================================================================= */
+/*                   CSR_G3_NC_ATT_MAP_SELECT                                */
+/* ========================================================================= */
+
+#define CSR_G3_NC_ATT_MAP_SELECT (0x7fc + (3 << 12))
+union numachip_csr_g3_nc_att_map_select {
+        unsigned int v;
+        struct numachip_csr_g3_nc_att_map_select_s {
+                unsigned int _upper_address_bits:4;
+                unsigned int _select_ram:4;
+                unsigned int _rsvd_8_31:24;
+        } s;
+};
+
+/* ========================================================================= */
+/*                   CSR_G3_NC_ATT_MAP_SELECT_0-255                          */
+/* ========================================================================= */
+
+#define CSR_G3_NC_ATT_MAP_SELECT_0 (0x800 + (3 << 12))
+
+#endif /* _ASM_X86_NUMACHIP_NUMACHIP_CSR_H */
+
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 3470c9d0ebba..529bf07e8067 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -451,23 +451,20 @@ do {									\
 #endif /* !CONFIG_M386 */
 
 #ifdef CONFIG_X86_CMPXCHG64
-#define percpu_cmpxchg8b_double(pcp1, o1, o2, n1, n2)                   \
+#define percpu_cmpxchg8b_double(pcp1, pcp2, o1, o2, n1, n2)             \
 ({                                                                      \
-        char __ret;                                                     \
-        typeof(o1) __o1 = o1;                                           \
-        typeof(o1) __n1 = n1;                                           \
-        typeof(o2) __o2 = o2;                                           \
-        typeof(o2) __n2 = n2;                                           \
-        typeof(o2) __dummy = n2;                                        \
+        bool __ret;                                                     \
+        typeof(pcp1) __o1 = (o1), __n1 = (n1);                          \
+        typeof(pcp2) __o2 = (o2), __n2 = (n2);                          \
         asm volatile("cmpxchg8b "__percpu_arg(1)"\n\tsetz %0\n\t"       \
-                    : "=a"(__ret), "=m" (pcp1), "=d"(__dummy)           \
-                    :  "b"(__n1), "c"(__n2), "a"(__o1), "d"(__o2));     \
+                    : "=a" (__ret), "+m" (pcp1), "+m" (pcp2), "+d" (__o2) \
+                    :  "b" (__n1), "c" (__n2), "a" (__o1));             \
         __ret;                                                          \
 })
 
-#define __this_cpu_cmpxchg_double_4(pcp1, pcp2, o1, o2, n1, n2)         percpu_cmpxchg8b_double(pcp1, o1, o2, n1, n2)
-#define this_cpu_cmpxchg_double_4(pcp1, pcp2, o1, o2, n1, n2)           percpu_cmpxchg8b_double(pcp1, o1, o2, n1, n2)
-#define irqsafe_cpu_cmpxchg_double_4(pcp1, pcp2, o1, o2, n1, n2)        percpu_cmpxchg8b_double(pcp1, o1, o2, n1, n2)
+#define __this_cpu_cmpxchg_double_4     percpu_cmpxchg8b_double
+#define this_cpu_cmpxchg_double_4       percpu_cmpxchg8b_double
+#define irqsafe_cpu_cmpxchg_double_4    percpu_cmpxchg8b_double
 #endif /* CONFIG_X86_CMPXCHG64 */
 
 /*
@@ -508,31 +505,23 @@ do {									\
  * it in software.  The address used in the cmpxchg16 instruction must be
  * aligned to a 16 byte boundary.
  */
-#ifdef CONFIG_SMP
-#define CMPXCHG16B_EMU_CALL "call this_cpu_cmpxchg16b_emu\n\t" ASM_NOP3
-#else
-#define CMPXCHG16B_EMU_CALL "call this_cpu_cmpxchg16b_emu\n\t" ASM_NOP2
-#endif
-#define percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)                  \
+#define percpu_cmpxchg16b_double(pcp1, pcp2, o1, o2, n1, n2)            \
 ({                                                                      \
-        char __ret;                                                     \
-        typeof(o1) __o1 = o1;                                           \
-        typeof(o1) __n1 = n1;                                           \
-        typeof(o2) __o2 = o2;                                           \
-        typeof(o2) __n2 = n2;                                           \
-        typeof(o2) __dummy;                                             \
-        alternative_io(CMPXCHG16B_EMU_CALL,                             \
-                       "cmpxchg16b " __percpu_prefix "(%%rsi)\n\tsetz %0\n\t",  \
+        bool __ret;                                                     \
+        typeof(pcp1) __o1 = (o1), __n1 = (n1);                          \
+        typeof(pcp2) __o2 = (o2), __n2 = (n2);                          \
+        alternative_io("leaq %P1,%%rsi\n\tcall this_cpu_cmpxchg16b_emu\n\t", \
+                       "cmpxchg16b " __percpu_arg(1) "\n\tsetz %0\n\t", \
                        X86_FEATURE_CX16,                                \
-                       ASM_OUTPUT2("=a"(__ret), "=d"(__dummy)),         \
-                       "S" (&pcp1), "b"(__n1), "c"(__n2),               \
-                       "a"(__o1), "d"(__o2) : "memory");                \
+                       ASM_OUTPUT2("=a" (__ret), "+m" (pcp1),           \
+                                   "+m" (pcp2), "+d" (__o2)),           \
+                       "b" (__n1), "c" (__n2), "a" (__o1) : "rsi");     \
         __ret;                                                          \
 })
 
-#define __this_cpu_cmpxchg_double_8(pcp1, pcp2, o1, o2, n1, n2)         percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)
-#define this_cpu_cmpxchg_double_8(pcp1, pcp2, o1, o2, n1, n2)           percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)
-#define irqsafe_cpu_cmpxchg_double_8(pcp1, pcp2, o1, o2, n1, n2)        percpu_cmpxchg16b_double(pcp1, o1, o2, n1, n2)
+#define __this_cpu_cmpxchg_double_8     percpu_cmpxchg16b_double
+#define this_cpu_cmpxchg_double_8       percpu_cmpxchg16b_double
+#define irqsafe_cpu_cmpxchg_double_8    percpu_cmpxchg16b_double
 
 #endif
 
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index f61c62f7d5d8..096c975e099f 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -57,6 +57,7 @@
                 (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
 
 #define ARCH_PERFMON_BRANCH_MISSES_RETIRED              6
+#define ARCH_PERFMON_EVENTS_COUNT                       7
 
 /*
  * Intel "Architectural Performance Monitoring" CPUID
@@ -72,6 +73,19 @@ union cpuid10_eax {
         unsigned int full;
 };
 
+union cpuid10_ebx {
+        struct {
+                unsigned int no_unhalted_core_cycles:1;
+                unsigned int no_instructions_retired:1;
+                unsigned int no_unhalted_reference_cycles:1;
+                unsigned int no_llc_reference:1;
+                unsigned int no_llc_misses:1;
+                unsigned int no_branch_instruction_retired:1;
+                unsigned int no_branch_misses_retired:1;
+        } split;
+        unsigned int full;
+};
+
 union cpuid10_edx {
         struct {
                 unsigned int num_counters_fixed:5;
@@ -81,6 +95,15 @@ union cpuid10_edx {
         unsigned int full;
 };
 
+struct x86_pmu_capability {
+        int             version;
+        int             num_counters_gp;
+        int             num_counters_fixed;
+        int             bit_width_gp;
+        int             bit_width_fixed;
+        unsigned int    events_mask;
+        int             events_mask_len;
+};
 
 /*
  * Fixed-purpose performance events:
@@ -89,23 +112,24 @@ union cpuid10_edx {
 /*
  * All 3 fixed-mode PMCs are configured via this single MSR:
  */
-#define MSR_ARCH_PERFMON_FIXED_CTR_CTRL                 0x38d
+#define MSR_ARCH_PERFMON_FIXED_CTR_CTRL 0x38d
 
 /*
  * The counts are available in three separate MSRs:
  */
 
 /* Instr_Retired.Any: */
-#define MSR_ARCH_PERFMON_FIXED_CTR0                     0x309
-#define X86_PMC_IDX_FIXED_INSTRUCTIONS                  (X86_PMC_IDX_FIXED + 0)
+#define MSR_ARCH_PERFMON_FIXED_CTR0     0x309
+#define X86_PMC_IDX_FIXED_INSTRUCTIONS  (X86_PMC_IDX_FIXED + 0)
 
 /* CPU_CLK_Unhalted.Core: */
-#define MSR_ARCH_PERFMON_FIXED_CTR1                     0x30a
-#define X86_PMC_IDX_FIXED_CPU_CYCLES                    (X86_PMC_IDX_FIXED + 1)
+#define MSR_ARCH_PERFMON_FIXED_CTR1     0x30a
+#define X86_PMC_IDX_FIXED_CPU_CYCLES    (X86_PMC_IDX_FIXED + 1)
 
 /* CPU_CLK_Unhalted.Ref: */
-#define MSR_ARCH_PERFMON_FIXED_CTR2                     0x30b
-#define X86_PMC_IDX_FIXED_BUS_CYCLES                    (X86_PMC_IDX_FIXED + 2)
+#define MSR_ARCH_PERFMON_FIXED_CTR2     0x30b
+#define X86_PMC_IDX_FIXED_REF_CYCLES    (X86_PMC_IDX_FIXED + 2)
+#define X86_PMC_MSK_FIXED_REF_CYCLES    (1ULL << X86_PMC_IDX_FIXED_REF_CYCLES)
 
 /*
  * We model BTS tracing as another fixed-mode PMC.
@@ -202,6 +226,7 @@ struct perf_guest_switch_msr {
 };
 
 extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);
+extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap);
 #else
 static inline perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
 {
@@ -209,6 +234,11 @@ static inline perf_guest_switch_msr *perf_guest_get_msrs(int *nr)
         return NULL;
 }
 
+static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
+{
+        memset(cap, 0, sizeof(*cap));
+}
+
 static inline void perf_events_lapic_init(void) { }
 #endif
 
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 18601c86fab1..49afb3f41eb6 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -703,7 +703,7 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm,
         pte_update(mm, addr, ptep);
 }
 
-#define flush_tlb_fix_spurious_fault(vma, address)
+#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
 
 #define mk_pmd(page, pgprot)   pfn_pmd(page_to_pfn(page), (pgprot))
 
diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index 2dddb317bb39..f8ab3eaad128 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -6,6 +6,7 @@
  * EFLAGS bits
  */
 #define X86_EFLAGS_CF   0x00000001 /* Carry Flag */
+#define X86_EFLAGS_BIT1 0x00000002 /* Bit 1 - always on */
 #define X86_EFLAGS_PF   0x00000004 /* Parity Flag */
 #define X86_EFLAGS_AF   0x00000010 /* Auxiliary carry Flag */
 #define X86_EFLAGS_ZF   0x00000040 /* Zero Flag */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b650435ffb53..aa9088c26931 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -99,7 +99,6 @@ struct cpuinfo_x86 {
         u16                     apicid;
         u16                     initial_apicid;
         u16                     x86_clflush_size;
-#ifdef CONFIG_SMP
         /* number of cores as seen by the OS: */
         u16                     booted_cores;
         /* Physical processor id: */
@@ -110,7 +109,6 @@ struct cpuinfo_x86 {
         u8                      compute_unit_id;
         /* Index into per_cpu list: */
         u16                     cpu_index;
-#endif
         u32                     microcode;
 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
 
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 972c260919a3..a82c2bf504b6 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -79,23 +79,10 @@ static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock)
         return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail;
 }
 
-#if (NR_CPUS < 256)
 static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock)
 {
-        asm volatile(UNLOCK_LOCK_PREFIX "incb %0"
-                     : "+m" (lock->head_tail)
-                     :
-                     : "memory", "cc");
+        __add(&lock->tickets.head, 1, UNLOCK_LOCK_PREFIX);
 }
-#else
-static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock)
-{
-        asm volatile(UNLOCK_LOCK_PREFIX "incw %0"
-                     : "+m" (lock->head_tail)
-                     :
-                     : "memory", "cc");
-}
-#endif
 
 static inline int __ticket_spin_is_locked(arch_spinlock_t *lock)
 {
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index c2ff2a1d845e..2d2f01ce6dcb 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -401,6 +401,7 @@ extern unsigned long arch_align_stack(unsigned long sp);
 extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
 
 void default_idle(void);
+bool set_pm_idle_to_default(void);
 
 void stop_this_cpu(void *dummy);
 
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index a1fe5c127b52..74047159d0ab 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -40,7 +40,8 @@ struct thread_info {
                                                 */
         __u8                    supervisor_stack[0];
 #endif
-        int                     uaccess_err;
+        int                     sig_on_uaccess_error:1;
+        int                     uaccess_err:1;  /* uaccess failed */
 };
 
 #define INIT_THREAD_INFO(tsk)                   \
@@ -90,7 +91,6 @@ struct thread_info {
 #define TIF_MEMDIE              20      /* is terminating due to OOM killer */
 #define TIF_DEBUG               21      /* uses debug registers */
 #define TIF_IO_BITMAP           22      /* uses I/O bitmap */
-#define TIF_FREEZE              23      /* is freezing for suspend */
 #define TIF_FORCED_TF           24      /* true if TF in eflags artificially */
 #define TIF_BLOCKSTEP           25      /* set when we want DEBUGCTLMSR_BTF */
 #define TIF_LAZY_MMU_UPDATES    27      /* task is updating the mmu lazily */
@@ -112,7 +112,6 @@ struct thread_info {
 #define _TIF_FORK               (1 << TIF_FORK)
 #define _TIF_DEBUG              (1 << TIF_DEBUG)
 #define _TIF_IO_BITMAP          (1 << TIF_IO_BITMAP)
-#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_FORCED_TF          (1 << TIF_FORCED_TF)
 #define _TIF_BLOCKSTEP          (1 << TIF_BLOCKSTEP)
 #define _TIF_LAZY_MMU_UPDATES   (1 << TIF_LAZY_MMU_UPDATES)
@@ -231,6 +230,12 @@ static inline struct thread_info *current_thread_info(void)
         movq PER_CPU_VAR(kernel_stack),reg ; \
         subq $(THREAD_SIZE-KERNEL_STACK_OFFSET),reg
 
+/*
+ * Same if PER_CPU_VAR(kernel_stack) is, perhaps with some offset, already in
+ * a certain register (to be used in assembler memory operands).
+ */
+#define THREAD_INFO(reg, off) KERNEL_STACK_OFFSET+(off)-THREAD_SIZE(reg)
+
 #endif
 
 #endif /* !X86_32 */
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index fa7b9176b76c..431793e5d484 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -32,6 +32,22 @@ extern int no_timer_check;
  *  (mathieu.desnoyers@polymtl.ca)
  *
  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
+ *
+ * In:
+ *
+ * ns = cycles * cyc2ns_scale / SC
+ *
+ * Although we may still have enough bits to store the value of ns,
+ * in some cases, we may not have enough bits to store cycles * cyc2ns_scale,
+ * leading to an incorrect result.
+ *
+ * To avoid this, we can decompose 'cycles' into quotient and remainder
+ * of division by SC.  Then,
+ *
+ * ns = (quot * SC + rem) * cyc2ns_scale / SC
+ *    = quot * cyc2ns_scale + (rem * cyc2ns_scale) / SC
+ *
+ *                      - sqazi@google.com
  */
 
 DECLARE_PER_CPU(unsigned long, cyc2ns);
@@ -41,9 +57,14 @@ DECLARE_PER_CPU(unsigned long long, cyc2ns_offset);
 
 static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
 {
+        unsigned long long quot;
+        unsigned long long rem;
         int cpu = smp_processor_id();
         unsigned long long ns = per_cpu(cyc2ns_offset, cpu);
-        ns += cyc * per_cpu(cyc2ns, cpu) >> CYC2NS_SCALE_FACTOR;
+        quot = (cyc >> CYC2NS_SCALE_FACTOR);
+        rem = cyc & ((1ULL << CYC2NS_SCALE_FACTOR) - 1);
+        ns += quot * per_cpu(cyc2ns, cpu) +
+                ((rem * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR);
         return ns;
 }
 
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index c00692476e9f..800f77c60051 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -130,10 +130,8 @@ extern void setup_node_to_cpumask_map(void);
         .balance_interval       = 1,                                    \
 }
 
-#ifdef CONFIG_X86_64
 extern int __node_distance(int, int);
 #define node_distance(a, b) __node_distance(a, b)
-#endif
 
 #else /* !CONFIG_NUMA */
 
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 83e2efd181e2..15d99153a96d 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -51,6 +51,8 @@ extern int unsynchronized_tsc(void);
 extern int check_tsc_unstable(void);
 extern unsigned long native_calibrate_tsc(void);
 
+extern int tsc_clocksource_reliable;
+
 /*
  * Boot-time check whether the TSCs are synchronized across
  * all CPUs/cores:
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 36361bf6fdd1..8be5f54d9360 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -462,7 +462,7 @@ struct __large_struct { unsigned long buf[100]; };
         barrier();
 
 #define uaccess_catch(err)                                              \
-        (err) |= current_thread_info()->uaccess_err;                    \
+        (err) |= (current_thread_info()->uaccess_err ? -EFAULT : 0);    \
         current_thread_info()->uaccess_err = prev_err;                  \
 } while (0)
 
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h
index 10474fb1185d..cf1d73643f60 100644
--- a/arch/x86/include/asm/uv/uv_mmrs.h
+++ b/arch/x86/include/asm/uv/uv_mmrs.h
@@ -57,6 +57,7 @@
 
 #define UV1_HUB_PART_NUMBER     0x88a5
 #define UV2_HUB_PART_NUMBER     0x8eb8
+#define UV2_HUB_PART_NUMBER_X   0x1111
 
 /* Compat: if this #define is present, UV headers support UV2 */
 #define UV2_HUB_IS_SUPPORTED    1
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index d3d859035af9..1ac860a09849 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -7,6 +7,7 @@
 struct mpc_bus;
 struct mpc_cpu;
 struct mpc_table;
+struct cpuinfo_x86;
 
 /**
  * struct x86_init_mpparse - platform specific mpparse ops
@@ -147,11 +148,13 @@ struct x86_init_ops {
  */
 struct x86_cpuinit_ops {
         void (*setup_percpu_clockev)(void);
+        void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
 };
 
 /**
  * struct x86_platform_ops - platform specific runtime functions
  * @calibrate_tsc:              calibrate TSC
+ * @wallclock_init:             init the wallclock device
  * @get_wallclock:              get time from HW clock like RTC etc.
  * @set_wallclock:              set time back to HW clock
  * @is_untracked_pat_range      exclude from PAT logic
@@ -160,11 +163,13 @@ struct x86_cpuinit_ops {
  */
 struct x86_platform_ops {
         unsigned long (*calibrate_tsc)(void);
+        void (*wallclock_init)(void);
         unsigned long (*get_wallclock)(void);
         int (*set_wallclock)(unsigned long nowtime);
         void (*iommu_shutdown)(void);
         bool (*is_untracked_pat_range)(u64 start, u64 end);
         void (*nmi_init)(void);
+        unsigned char (*get_nmi_reason)(void);
         int (*i8042_detect)(void);
 };
 
@@ -183,5 +188,6 @@ extern struct x86_msi_ops x86_msi;
 
 extern void x86_init_noop(void);
 extern void x86_init_uint_noop(unsigned int unused);
+extern void x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node);
 
 #endif
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4558f0d0822d..ce664f33ea8e 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -219,6 +219,8 @@ static int __init
 acpi_parse_x2apic(struct acpi_subtable_header *header, const unsigned long end)
 {
         struct acpi_madt_local_x2apic *processor = NULL;
+        int apic_id;
+        u8 enabled;
 
         processor = (struct acpi_madt_local_x2apic *)header;
 
@@ -227,6 +229,8 @@ acpi_parse_x2apic(struct acpi_subtable_header *header, const unsigned long end)
 
         acpi_table_print_madt_entry(header);
 
+        apic_id = processor->local_apic_id;
+        enabled = processor->lapic_flags & ACPI_MADT_ENABLED;
 #ifdef CONFIG_X86_X2APIC
         /*
          * We need to register disabled CPU as well to permit
@@ -235,8 +239,10 @@ acpi_parse_x2apic(struct acpi_subtable_header *header, const unsigned long end)
          * to not preallocating memory for all NR_CPUS
          * when we use CPU hotplug.
          */
-        acpi_register_lapic(processor->local_apic_id,   /* APIC ID */
-                            processor->lapic_flags & ACPI_MADT_ENABLED);
+        if (!cpu_has_x2apic && (apic_id >= 0xff) && enabled)
+                printk(KERN_WARNING PREFIX "x2apic entry ignored\n");
+        else
+                acpi_register_lapic(apic_id, enabled);
 #else
         printk(KERN_WARNING PREFIX "x2apic entry ignored\n");
 #endif
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index c63822816249..1f84794f0759 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -738,5 +738,5 @@ void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
 
         atomic_set(&stop_machine_first, 1);
         wrote_text = 0;
-        __stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
+        __stop_machine(stop_machine_text_poke, (void *)&tpp, cpu_online_mask);
 }
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 4c39baa8facc..013c1810ce72 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -123,16 +123,14 @@ int amd_get_subcaches(int cpu)
 {
         struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
         unsigned int mask;
-        int cuid = 0;
+        int cuid;
 
         if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
                 return 0;
 
         pci_read_config_dword(link, 0x1d4, &mask);
 
-#ifdef CONFIG_SMP
         cuid = cpu_data(cpu).compute_unit_id;
-#endif
         return (mask >> (4 * cuid)) & 0xf;
 }
 
@@ -141,7 +139,7 @@ int amd_set_subcaches(int cpu, int mask)
         static unsigned int reset, ban;
         struct amd_northbridge *nb = node_to_amd_nb(amd_get_nb_id(cpu));
         unsigned int reg;
-        int cuid = 0;
+        int cuid;
 
         if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING) || mask > 0xf)
                 return -EINVAL;
@@ -159,9 +157,7 @@ int amd_set_subcaches(int cpu, int mask)
                 pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);
         }
 
-#ifdef CONFIG_SMP
         cuid = cpu_data(cpu).compute_unit_id;
-#endif
         mask <<= 4 * cuid;
         mask |= (0xf ^ (1 << cuid)) << 26;
 
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 3d2661ca6542..6e76c191a835 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -88,13 +88,13 @@ static u32 __init allocate_aperture(void)
          */
         addr = memblock_find_in_range(GART_MIN_ADDR, GART_MAX_ADDR,
                                       aper_size, aper_size);
-        if (addr == MEMBLOCK_ERROR || addr + aper_size > GART_MAX_ADDR) {
+        if (!addr || addr + aper_size > GART_MAX_ADDR) {
                 printk(KERN_ERR
                         "Cannot allocate aperture memory hole (%lx,%uK)\n",
                                 addr, aper_size>>10);
                 return 0;
         }
-        memblock_x86_reserve_range(addr, addr + aper_size, "aperture64");
+        memblock_reserve(addr, aper_size);
         /*
          * Kmemleak should not scan this block as it may not be mapped via the
          * kernel direct mapping.
diff --git a/arch/x86/kernel/apic/Makefile b/arch/x86/kernel/apic/Makefile
index 767fd04f2843..0ae0323b1f9c 100644
--- a/arch/x86/kernel/apic/Makefile
+++ b/arch/x86/kernel/apic/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SMP)		+= ipi.o
 
 ifeq ($(CONFIG_X86_64),y)
 # APIC probe will depend on the listing order here
+obj-$(CONFIG_X86_NUMACHIP)      += apic_numachip.o
 obj-$(CONFIG_X86_UV)            += x2apic_uv_x.o
 obj-$(CONFIG_X86_X2APIC)        += x2apic_phys.o
 obj-$(CONFIG_X86_X2APIC)        += x2apic_cluster.o
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index a2fd72e0ab35..2eec05b6d1b8 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -146,16 +146,26 @@ __setup("apicpmtimer", setup_apicpmtimer);
 int x2apic_mode;
 #ifdef CONFIG_X86_X2APIC
 /* x2apic enabled before OS handover */
-static int x2apic_preenabled;
+int x2apic_preenabled;
+static int x2apic_disabled;
+static int nox2apic;
 static __init int setup_nox2apic(char *str)
 {
         if (x2apic_enabled()) {
-                pr_warning("Bios already enabled x2apic, "
-                           "can't enforce nox2apic");
-                return 0;
-        }
+                int apicid = native_apic_msr_read(APIC_ID);
+
+                if (apicid >= 255) {
+                        pr_warning("Apicid: %08x, cannot enforce nox2apic\n",
+                                   apicid);
+                        return 0;
+                }
+
+                pr_warning("x2apic already enabled. will disable it\n");
+        } else
+                setup_clear_cpu_cap(X86_FEATURE_X2APIC);
+
+        nox2apic = 1;
 
-        setup_clear_cpu_cap(X86_FEATURE_X2APIC);
         return 0;
 }
 early_param("nox2apic", setup_nox2apic);
@@ -186,7 +196,7 @@ static struct resource lapic_resource = {
         .flags = IORESOURCE_MEM | IORESOURCE_BUSY,
 };
 
-static unsigned int calibration_result;
+unsigned int lapic_timer_frequency = 0;
 
 static void apic_pm_activate(void);
 
@@ -250,6 +260,7 @@ u32 native_safe_apic_wait_icr_idle(void)
                 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
                 if (!send_status)
                         break;
+                inc_irq_stat(icr_read_retry_count);
                 udelay(100);
         } while (timeout++ < 1000);
 
@@ -454,7 +465,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
         case CLOCK_EVT_MODE_ONESHOT:
-                __setup_APIC_LVTT(calibration_result,
+                __setup_APIC_LVTT(lapic_timer_frequency,
                                   mode != CLOCK_EVT_MODE_PERIODIC, 1);
                 break;
         case CLOCK_EVT_MODE_UNUSED:
@@ -638,6 +649,25 @@ static int __init calibrate_APIC_clock(void)
         long delta, deltatsc;
         int pm_referenced = 0;
 
+        /**
+         * check if lapic timer has already been calibrated by platform
+         * specific routine, such as tsc calibration code. if so, we just fill
+         * in the clockevent structure and return.
+         */
+
+        if (lapic_timer_frequency) {
+                apic_printk(APIC_VERBOSE, "lapic timer already calibrated %d\n",
+                                lapic_timer_frequency);
+                lapic_clockevent.mult = div_sc(lapic_timer_frequency/APIC_DIVISOR,
+                                        TICK_NSEC, lapic_clockevent.shift);
+                lapic_clockevent.max_delta_ns =
+                        clockevent_delta2ns(0x7FFFFF, &lapic_clockevent);
+                lapic_clockevent.min_delta_ns =
+                        clockevent_delta2ns(0xF, &lapic_clockevent);
+                lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
+                return 0;
+        }
+
         local_irq_disable();
 
         /* Replace the global interrupt handler */
@@ -679,12 +709,12 @@ static int __init calibrate_APIC_clock(void)
         lapic_clockevent.min_delta_ns =
                 clockevent_delta2ns(0xF, &lapic_clockevent);
 
-        calibration_result = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS;
+        lapic_timer_frequency = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS;
 
         apic_printk(APIC_VERBOSE, "..... delta %ld\n", delta);
         apic_printk(APIC_VERBOSE, "..... mult: %u\n", lapic_clockevent.mult);
         apic_printk(APIC_VERBOSE, "..... calibration result: %u\n",
-                    calibration_result);
+                    lapic_timer_frequency);
 
         if (cpu_has_tsc) {
                 apic_printk(APIC_VERBOSE, "..... CPU clock speed is "
@@ -695,13 +725,13 @@ static int __init calibrate_APIC_clock(void)
 
         apic_printk(APIC_VERBOSE, "..... host bus clock speed is "
                     "%u.%04u MHz.\n",
-                    calibration_result / (1000000 / HZ),
-                    calibration_result % (1000000 / HZ));
+                    lapic_timer_frequency / (1000000 / HZ),
+                    lapic_timer_frequency % (1000000 / HZ));
 
         /*
          * Do a sanity check on the APIC calibration result
          */
-        if (calibration_result < (1000000 / HZ)) {
+        if (lapic_timer_frequency < (1000000 / HZ)) {
                 local_irq_enable();
                 pr_warning("APIC frequency too slow, disabling apic timer\n");
                 return -1;
@@ -857,8 +887,8 @@ void __irq_entry smp_apic_timer_interrupt(struct pt_regs *regs)
          * Besides, if we don't timer interrupts ignore the global
          * interrupt lock, which is the WrongThing (tm) to do.
          */
-        exit_idle();
         irq_enter();
+        exit_idle();
         local_apic_timer_interrupt();
         irq_exit();
 
@@ -1412,6 +1442,45 @@ void __init bsp_end_local_APIC_setup(void)
 }
 
 #ifdef CONFIG_X86_X2APIC
+/*
+ * Need to disable xapic and x2apic at the same time and then enable xapic mode
+ */
+static inline void __disable_x2apic(u64 msr)
+{
+        wrmsrl(MSR_IA32_APICBASE,
+               msr & ~(X2APIC_ENABLE | XAPIC_ENABLE));
+        wrmsrl(MSR_IA32_APICBASE, msr & ~X2APIC_ENABLE);
+}
+
+static __init void disable_x2apic(void)
+{
+        u64 msr;
+
+        if (!cpu_has_x2apic)
+                return;
+
+        rdmsrl(MSR_IA32_APICBASE, msr);
+        if (msr & X2APIC_ENABLE) {
+                u32 x2apic_id = read_apic_id();
+
+                if (x2apic_id >= 255)
+                        panic("Cannot disable x2apic, id: %08x\n", x2apic_id);
+
+                pr_info("Disabling x2apic\n");
+                __disable_x2apic(msr);
+
+                if (nox2apic) {
+                        clear_cpu_cap(&cpu_data(0), X86_FEATURE_X2APIC);
+                        setup_clear_cpu_cap(X86_FEATURE_X2APIC);
+                }
+
+                x2apic_disabled = 1;
+                x2apic_mode = 0;
+
+                register_lapic_address(mp_lapic_addr);
+        }
+}
+
 void check_x2apic(void)
 {
         if (x2apic_enabled()) {
@@ -1422,15 +1491,20 @@ void check_x2apic(void)
 
 void enable_x2apic(void)
 {
-        int msr, msr2;
+        u64 msr;
+
+        rdmsrl(MSR_IA32_APICBASE, msr);
+        if (x2apic_disabled) {
+                __disable_x2apic(msr);
+                return;
+        }
 
         if (!x2apic_mode)
                 return;
 
-        rdmsr(MSR_IA32_APICBASE, msr, msr2);
         if (!(msr & X2APIC_ENABLE)) {
                 printk_once(KERN_INFO "Enabling x2apic\n");
-                wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, msr2);
+                wrmsrl(MSR_IA32_APICBASE, msr | X2APIC_ENABLE);
         }
 }
 #endif /* CONFIG_X86_X2APIC */
@@ -1467,25 +1541,34 @@ void __init enable_IR_x2apic(void)
         ret = save_ioapic_entries();
         if (ret) {
                 pr_info("Saving IO-APIC state failed: %d\n", ret);
-                goto out;
+                return;
         }
 
         local_irq_save(flags);
         legacy_pic->mask_all();
         mask_ioapic_entries();
 
+        if (x2apic_preenabled && nox2apic)
+                disable_x2apic();
+
         if (dmar_table_init_ret)
                 ret = -1;
         else
                 ret = enable_IR();
 
+        if (!x2apic_supported())
+                goto skip_x2apic;
+
         if (ret < 0) {
                 /* IR is required if there is APIC ID > 255 even when running
                  * under KVM
                  */
                 if (max_physical_apicid > 255 ||
-                    !hypervisor_x2apic_available())
-                        goto nox2apic;
+                    !hypervisor_x2apic_available()) {
+                        if (x2apic_preenabled)
+                                disable_x2apic();
+                        goto skip_x2apic;
+                }
                 /*
                  * without IR all CPUs can be addressed by IOAPIC/MSI
                  * only in physical mode
@@ -1493,8 +1576,10 @@ void __init enable_IR_x2apic(void)
                 x2apic_force_phys();
         }
 
-        if (ret == IRQ_REMAP_XAPIC_MODE)
-                goto nox2apic;
+        if (ret == IRQ_REMAP_XAPIC_MODE) {
+                pr_info("x2apic not enabled, IRQ remapping is in xapic mode\n");
+                goto skip_x2apic;
+        }
 
         x2apic_enabled = 1;
 
@@ -1504,22 +1589,11 @@ void __init enable_IR_x2apic(void)
                 pr_info("Enabled x2apic\n");
         }
 
-nox2apic:
+skip_x2apic:
         if (ret < 0) /* IR enabling failed */
                 restore_ioapic_entries();
         legacy_pic->restore_mask();
         local_irq_restore(flags);
-
-out:
-        if (x2apic_enabled || !x2apic_supported())
-                return;
-
-        if (x2apic_preenabled)
-                panic("x2apic: enabled by BIOS but kernel init failed.");
-        else if (ret == IRQ_REMAP_XAPIC_MODE)
-                pr_info("x2apic not enabled, IRQ remapping is in xapic mode\n");
-        else if (ret < 0)
-                pr_info("x2apic not enabled, IRQ remapping init failed\n");
 }
 
 #ifdef CONFIG_X86_64
@@ -1790,8 +1864,8 @@ void smp_spurious_interrupt(struct pt_regs *regs)
 {
         u32 v;
 
-        exit_idle();
         irq_enter();
+        exit_idle();
         /*
          * Check if this really is a spurious interrupt and ACK it
          * if it is a vectored one.  Just in case...
@@ -1827,8 +1901,8 @@ void smp_error_interrupt(struct pt_regs *regs)
                 "Illegal register address",     /* APIC Error Bit 7 */
         };
 
-        exit_idle();
         irq_enter();
+        exit_idle();
         /* First tickle the hardware, only then report what went on. -- REW */
         v0 = apic_read(APIC_ESR);
         apic_write(APIC_ESR, 0);
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index f7a41e4cae47..8c3cdded6f2b 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -62,7 +62,7 @@ static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
  * document number 292116).  So here it goes...
  */
-static void flat_init_apic_ldr(void)
+void flat_init_apic_ldr(void)
 {
         unsigned long val;
         unsigned long num, id;
@@ -171,9 +171,14 @@ static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
         return initial_apic_id >> index_msb;
 }
 
+static int flat_probe(void)
+{
+        return 1;
+}
+
 static struct apic apic_flat =  {
         .name                           = "flat",
-        .probe                          = NULL,
+        .probe                          = flat_probe,
         .acpi_madt_oem_check            = flat_acpi_madt_oem_check,
         .apic_id_registered             = flat_apic_id_registered,
 
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
new file mode 100644
index 000000000000..09d3d8c1cd99
--- /dev/null
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -0,0 +1,294 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Numascale NumaConnect-Specific APIC Code
+ *
+ * Copyright (C) 2011 Numascale AS. All rights reserved.
+ *
+ * Send feedback to <support@numascale.com>
+ *
+ */
+
+#include <linux/errno.h>
+#include <linux/threads.h>
+#include <linux/cpumask.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/ctype.h>
+#include <linux/init.h>
+#include <linux/hardirq.h>
+#include <linux/delay.h>
+
+#include <asm/numachip/numachip_csr.h>
+#include <asm/smp.h>
+#include <asm/apic.h>
+#include <asm/ipi.h>
+#include <asm/apic_flat_64.h>
+
+static int numachip_system __read_mostly;
+
+static struct apic apic_numachip __read_mostly;
+
+static unsigned int get_apic_id(unsigned long x)
+{
+        unsigned long value;
+        unsigned int id;
+
+        rdmsrl(MSR_FAM10H_NODE_ID, value);
+        id = ((x >> 24) & 0xffU) | ((value << 2) & 0x3f00U);
+
+        return id;
+}
+
+static unsigned long set_apic_id(unsigned int id)
+{
+        unsigned long x;
+
+        x = ((id & 0xffU) << 24);
+        return x;
+}
+
+static unsigned int read_xapic_id(void)
+{
+        return get_apic_id(apic_read(APIC_ID));
+}
+
+static int numachip_apic_id_registered(void)
+{
+        return physid_isset(read_xapic_id(), phys_cpu_present_map);
+}
+
+static int numachip_phys_pkg_id(int initial_apic_id, int index_msb)
+{
+        return initial_apic_id >> index_msb;
+}
+
+static const struct cpumask *numachip_target_cpus(void)
+{
+        return cpu_online_mask;
+}
+
+static void numachip_vector_allocation_domain(int cpu, struct cpumask *retmask)
+{
+        cpumask_clear(retmask);
+        cpumask_set_cpu(cpu, retmask);
+}
+
+static int __cpuinit numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
+{
+        union numachip_csr_g3_ext_irq_gen int_gen;
+
+        int_gen.s._destination_apic_id = phys_apicid;
+        int_gen.s._vector = 0;
+        int_gen.s._msgtype = APIC_DM_INIT >> 8;
+        int_gen.s._index = 0;
+
+        write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v);
+
+        int_gen.s._msgtype = APIC_DM_STARTUP >> 8;
+        int_gen.s._vector = start_rip >> 12;
+
+        write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v);
+
+        atomic_set(&init_deasserted, 1);
+        return 0;
+}
+
+static void numachip_send_IPI_one(int cpu, int vector)
+{
+        union numachip_csr_g3_ext_irq_gen int_gen;
+        int apicid = per_cpu(x86_cpu_to_apicid, cpu);
+
+        int_gen.s._destination_apic_id = apicid;
+        int_gen.s._vector = vector;
+        int_gen.s._msgtype = (vector == NMI_VECTOR ? APIC_DM_NMI : APIC_DM_FIXED) >> 8;
+        int_gen.s._index = 0;
+
+        write_lcsr(CSR_G3_EXT_IRQ_GEN, int_gen.v);
+}
+
+static void numachip_send_IPI_mask(const struct cpumask *mask, int vector)
+{
+        unsigned int cpu;
+
+        for_each_cpu(cpu, mask)
+                numachip_send_IPI_one(cpu, vector);
+}
+
+static void numachip_send_IPI_mask_allbutself(const struct cpumask *mask,
+                                                int vector)
+{
+        unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
+
+        for_each_cpu(cpu, mask) {
+                if (cpu != this_cpu)
+                        numachip_send_IPI_one(cpu, vector);
+        }
+}
+
+static void numachip_send_IPI_allbutself(int vector)
+{
+        unsigned int this_cpu = smp_processor_id();
+        unsigned int cpu;
+
+        for_each_online_cpu(cpu) {
+                if (cpu != this_cpu)
+                        numachip_send_IPI_one(cpu, vector);
+        }
+}
+
+static void numachip_send_IPI_all(int vector)
+{
+        numachip_send_IPI_mask(cpu_online_mask, vector);
+}
+
+static void numachip_send_IPI_self(int vector)
+{
+        __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
+}
+
+static unsigned int numachip_cpu_mask_to_apicid(const struct cpumask *cpumask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        cpu = cpumask_first(cpumask);
+        if (likely((unsigned)cpu < nr_cpu_ids))
+                return per_cpu(x86_cpu_to_apicid, cpu);
+
+        return BAD_APICID;
+}
+
+static unsigned int
+numachip_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+                                const struct cpumask *andmask)
+{
+        int cpu;
+
+        /*
+         * We're using fixed IRQ delivery, can only return one phys APIC ID.
+         * May as well be the first.
+         */
+        for_each_cpu_and(cpu, cpumask, andmask) {
+                if (cpumask_test_cpu(cpu, cpu_online_mask))
+                        break;
+        }
+        return per_cpu(x86_cpu_to_apicid, cpu);
+}
+
+static int __init numachip_probe(void)
+{
+        return apic == &apic_numachip;
+}
+
+static void __init map_csrs(void)
+{
+        printk(KERN_INFO "NumaChip: Mapping local CSR space (%016llx - %016llx)\n",
+                NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_BASE + NUMACHIP_LCSR_SIZE - 1);
+        init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE);
+
+        printk(KERN_INFO "NumaChip: Mapping global CSR space (%016llx - %016llx)\n",
+                NUMACHIP_GCSR_BASE, NUMACHIP_GCSR_BASE + NUMACHIP_GCSR_SIZE - 1);
+        init_extra_mapping_uc(NUMACHIP_GCSR_BASE, NUMACHIP_GCSR_SIZE);
+}
+
+static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)
+{
+        c->phys_proc_id = node;
+        per_cpu(cpu_llc_id, smp_processor_id()) = node;
+}
+
+static int __init numachip_system_init(void)
+{
+        unsigned int val;
+
+        if (!numachip_system)
+                return 0;
+
+        x86_cpuinit.fixup_cpu_id = fixup_cpu_id;
+
+        map_csrs();
+
+        val = read_lcsr(CSR_G0_NODE_IDS);
+        printk(KERN_INFO "NumaChip: Local NodeID = %08x\n", val);
+
+        return 0;
+}
+early_initcall(numachip_system_init);
+
+static int numachip_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
+{
+        if (!strncmp(oem_id, "NUMASC", 6)) {
+                numachip_system = 1;
+                return 1;
+        }
+
+        return 0;
+}
+
+static struct apic apic_numachip __refconst = {
+
+        .name                           = "NumaConnect system",
+        .probe                          = numachip_probe,
+        .acpi_madt_oem_check            = numachip_acpi_madt_oem_check,
+        .apic_id_registered             = numachip_apic_id_registered,
+
+        .irq_delivery_mode              = dest_Fixed,
+        .irq_dest_mode                  = 0, /* physical */
+
+        .target_cpus                    = numachip_target_cpus,
+        .disable_esr                    = 0,
+        .dest_logical                   = 0,
+        .check_apicid_used              = NULL,
+        .check_apicid_present           = NULL,
+
+        .vector_allocation_domain       = numachip_vector_allocation_domain,
+        .init_apic_ldr                  = flat_init_apic_ldr,
+
+        .ioapic_phys_id_map             = NULL,
+        .setup_apic_routing             = NULL,
+        .multi_timer_check              = NULL,
+        .cpu_present_to_apicid          = default_cpu_present_to_apicid,
+        .apicid_to_cpu_present          = NULL,
+        .setup_portio_remap             = NULL,
+        .check_phys_apicid_present      = default_check_phys_apicid_present,
+        .enable_apic_mode               = NULL,
+        .phys_pkg_id                    = numachip_phys_pkg_id,
+        .mps_oem_check                  = NULL,
+
+        .get_apic_id                    = get_apic_id,
+        .set_apic_id                    = set_apic_id,
+        .apic_id_mask                   = 0xffU << 24,
+
+        .cpu_mask_to_apicid             = numachip_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = numachip_cpu_mask_to_apicid_and,
+
+        .send_IPI_mask                  = numachip_send_IPI_mask,
+        .send_IPI_mask_allbutself       = numachip_send_IPI_mask_allbutself,
+        .send_IPI_allbutself            = numachip_send_IPI_allbutself,
+        .send_IPI_all                   = numachip_send_IPI_all,
+        .send_IPI_self                  = numachip_send_IPI_self,
+
+        .wakeup_secondary_cpu           = numachip_wakeup_secondary,
+        .trampoline_phys_low            = DEFAULT_TRAMPOLINE_PHYS_LOW,
+        .trampoline_phys_high           = DEFAULT_TRAMPOLINE_PHYS_HIGH,
+        .wait_for_init_deassert         = NULL,
+        .smp_callin_clear_local_apic    = NULL,
+        .inquire_remote_apic            = NULL, /* REMRD not supported */
+
+        .read                           = native_apic_mem_read,
+        .write                          = native_apic_mem_write,
+        .icr_read                       = native_apic_icr_read,
+        .icr_write                      = native_apic_icr_write,
+        .wait_icr_idle                  = native_apic_wait_icr_idle,
+        .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
+};
+apic_driver(apic_numachip);
+
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 3c31fa98af6d..fb072754bc1d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -193,10 +193,8 @@ int __init arch_early_irq_init(void)
         struct irq_cfg *cfg;
         int count, node, i;
 
-        if (!legacy_pic->nr_legacy_irqs) {
-                nr_irqs_gsi = 0;
+        if (!legacy_pic->nr_legacy_irqs)
                 io_apic_irqs = ~0UL;
-        }
 
         for (i = 0; i < nr_ioapics; i++) {
                 ioapics[i].saved_registers =
@@ -1696,6 +1694,7 @@ __apicdebuginit(void) print_IO_APICs(void)
         int ioapic_idx;
         struct irq_cfg *cfg;
         unsigned int irq;
+        struct irq_chip *chip;
 
         printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
         for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
@@ -1716,6 +1715,10 @@ __apicdebuginit(void) print_IO_APICs(void)
         for_each_active_irq(irq) {
                 struct irq_pin_list *entry;
 
+                chip = irq_get_chip(irq);
+                if (chip != &ioapic_chip)
+                        continue;
+
                 cfg = irq_get_chip_data(irq);
                 if (!cfg)
                         continue;
@@ -2418,8 +2421,8 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
         unsigned vector, me;
 
         ack_APIC_irq();
-        exit_idle();
         irq_enter();
+        exit_idle();
 
         me = smp_processor_id();
         for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
@@ -2945,6 +2948,10 @@ static inline void __init check_timer(void)
         }
         local_irq_disable();
         apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n");
+        if (x2apic_preenabled)
+                apic_printk(APIC_QUIET, KERN_INFO
+                            "Perhaps problem with the pre-enabled x2apic mode\n"
+                            "Try booting with x2apic and interrupt-remapping disabled in the bios.\n");
         panic("IO-APIC + timer doesn't work!  Boot with apic=debug and send a "
                 "report.  Then try booting with the 'noapic' option.\n");
 out:
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 62ae3001ae02..9d59bbacd4e3 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -93,6 +93,8 @@ static int __init early_get_pnodeid(void)
 
         if (node_id.s.part_number == UV2_HUB_PART_NUMBER)
                 uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
+        if (node_id.s.part_number == UV2_HUB_PART_NUMBER_X)
+                uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
 
         uv_hub_info->hub_revision = uv_min_hub_revision_id;
         pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1);
diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c
index 452932d34730..5da1269e8ddc 100644
--- a/arch/x86/kernel/check.c
+++ b/arch/x86/kernel/check.c
@@ -62,7 +62,8 @@ early_param("memory_corruption_check_size", set_corruption_check_size);
 
 void __init setup_bios_corruption_check(void)
 {
-        u64 addr = PAGE_SIZE;   /* assume first page is reserved anyway */
+        phys_addr_t start, end;
+        u64 i;
 
         if (memory_corruption_check == -1) {
                 memory_corruption_check =
@@ -82,28 +83,23 @@ void __init setup_bios_corruption_check(void)
 
         corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
 
-        while (addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
-                u64 size;
-                addr = memblock_x86_find_in_range_size(addr, &size, PAGE_SIZE);
+        for_each_free_mem_range(i, MAX_NUMNODES, &start, &end, NULL) {
+                start = clamp_t(phys_addr_t, round_up(start, PAGE_SIZE),
+                                PAGE_SIZE, corruption_check_size);
+                end = clamp_t(phys_addr_t, round_down(end, PAGE_SIZE),
+                              PAGE_SIZE, corruption_check_size);
+                if (start >= end)
+                        continue;
 
-                if (addr == MEMBLOCK_ERROR)
-                        break;
-
-                if (addr >= corruption_check_size)
-                        break;
-
-                if ((addr + size) > corruption_check_size)
-                        size = corruption_check_size - addr;
-
-                memblock_x86_reserve_range(addr, addr + size, "SCAN RAM");
-                scan_areas[num_scan_areas].addr = addr;
-                scan_areas[num_scan_areas].size = size;
-                num_scan_areas++;
+                memblock_reserve(start, end - start);
+                scan_areas[num_scan_areas].addr = start;
+                scan_areas[num_scan_areas].size = end - start;
 
                 /* Assume we've already mapped this early memory */
-                memset(__va(addr), 0, size);
+                memset(__va(start), 0, end - start);
 
-                addr += size;
+                if (++num_scan_areas >= MAX_SCAN_AREAS)
+                        break;
         }
 
         if (num_scan_areas)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index c7e46cb35327..f4773f4aae35 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -148,7 +148,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
 
 static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_SMP
         /* calling is from identify_secondary_cpu() ? */
         if (!c->cpu_index)
                 return;
@@ -192,7 +191,6 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
 
 valid_k7:
         ;
-#endif
 }
 
 static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
@@ -353,6 +351,13 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
         if (node == NUMA_NO_NODE)
                 node = per_cpu(cpu_llc_id, cpu);
 
+        /*
+         * If core numbers are inconsistent, it's likely a multi-fabric platform,
+         * so invoke platform-specific handler
+         */
+        if (c->phys_proc_id != node)
+                x86_cpuinit.fixup_cpu_id(c, node);
+
         if (!node_online(node)) {
                 /*
                  * Two possibilities here:
@@ -442,8 +447,6 @@ static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
 
 static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
 {
-        u32 dummy;
-
         early_init_amd_mc(c);
 
         /*
@@ -473,12 +476,12 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
                         set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
         }
 #endif
-
-        rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
 }
 
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 {
+        u32 dummy;
+
 #ifdef CONFIG_SMP
         unsigned long long value;
 
@@ -657,6 +660,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
                         checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
                 }
         }
+
+        rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index e58d978e0758..159103c0b1f4 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -278,7 +278,7 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
         }
 #ifdef CONFIG_X86_32
         /* Cyrix III family needs CX8 & PGE explicitly enabled. */
-        if (c->x86_model >= 6 && c->x86_model <= 9) {
+        if (c->x86_model >= 6 && c->x86_model <= 13) {
                 rdmsr(MSR_VIA_FCR, lo, hi);
                 lo |= (1<<1 | 1<<7);
                 wrmsr(MSR_VIA_FCR, lo, hi);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index aa003b13a831..850f2963a420 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -676,9 +676,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
         if (this_cpu->c_early_init)
                 this_cpu->c_early_init(c);
 
-#ifdef CONFIG_SMP
         c->cpu_index = 0;
-#endif
         filter_cpuid_features(c, false);
 
         setup_smep(c);
@@ -764,10 +762,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                 c->apicid = c->initial_apicid;
 # endif
 #endif
-
-#ifdef CONFIG_X86_HT
                 c->phys_proc_id = c->initial_apicid;
-#endif
         }
 
         setup_smep(c);
@@ -1141,6 +1136,15 @@ static void dbg_restore_debug_regs(void)
 #endif /* ! CONFIG_KGDB */
 
 /*
+ * Prints an error where the NUMA and configured core-number mismatch and the
+ * platform didn't override this to fix it up
+ */
+void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
+{
+        pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
+}
+
+/*
  * cpu_init() initializes state that is per-CPU. Some data is already
  * initialized (naturally) in the bootstrap process, such as the GDT
  * and IDT. We reload them nevertheless, this function acts as a
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 1b22dcc51af4..8bacc7826fb3 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -1,5 +1,4 @@
 #ifndef ARCH_X86_CPU_H
-
 #define ARCH_X86_CPU_H
 
 struct cpu_model_info {
@@ -35,6 +34,4 @@ extern const struct cpu_dev *const __x86_cpu_dev_start[],
 
 extern void get_cpu_cap(struct cpuinfo_x86 *c);
 extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
-extern void get_cpu_cap(struct cpuinfo_x86 *c);
-
-#endif
+#endif /* ARCH_X86_CPU_H */
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 523131213f08..3e6ff6cbf42a 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -181,7 +181,6 @@ static void __cpuinit trap_init_f00f_bug(void)
 
 static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
 {
-#ifdef CONFIG_SMP
         /* calling is from identify_secondary_cpu() ? */
         if (!c->cpu_index)
                 return;
@@ -198,7 +197,6 @@ static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
                 WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
                                     "with B stepping processors.\n");
         }
-#endif
 }
 
 static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index a3b0811693c9..6b45e5e7a901 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -844,8 +844,7 @@ static int __cpuinit detect_cache_attributes(unsigned int cpu)
 
 #include <linux/kobject.h>
 #include <linux/sysfs.h>
-
-extern struct sysdev_class cpu_sysdev_class; /* from drivers/base/cpu.c */
+#include <linux/cpu.h>
 
 /* pointer to kobject for cpuX/cache */
 static DEFINE_PER_CPU(struct kobject *, ici_cache_kobject);
@@ -1073,9 +1072,9 @@ err_out:
 static DECLARE_BITMAP(cache_dev_map, NR_CPUS);
 
 /* Add/Remove cache interface for CPU device */
-static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
+static int __cpuinit cache_add_dev(struct device *dev)
 {
-        unsigned int cpu = sys_dev->id;
+        unsigned int cpu = dev->id;
         unsigned long i, j;
         struct _index_kobject *this_object;
         struct _cpuid4_info   *this_leaf;
@@ -1087,7 +1086,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
 
         retval = kobject_init_and_add(per_cpu(ici_cache_kobject, cpu),
                                       &ktype_percpu_entry,
-                                      &sys_dev->kobj, "%s", "cache");
+                                      &dev->kobj, "%s", "cache");
         if (retval < 0) {
                 cpuid4_cache_sysfs_exit(cpu);
                 return retval;
@@ -1124,9 +1123,9 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
         return 0;
 }
 
-static void __cpuinit cache_remove_dev(struct sys_device * sys_dev)
+static void __cpuinit cache_remove_dev(struct device *dev)
 {
-        unsigned int cpu = sys_dev->id;
+        unsigned int cpu = dev->id;
         unsigned long i;
 
         if (per_cpu(ici_cpuid4_info, cpu) == NULL)
@@ -1145,17 +1144,17 @@ static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
                                         unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
-        struct sys_device *sys_dev;
+        struct device *dev;
 
-        sys_dev = get_cpu_sysdev(cpu);
+        dev = get_cpu_device(cpu);
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
-                cache_add_dev(sys_dev);
+                cache_add_dev(dev);
                 break;
         case CPU_DEAD:
         case CPU_DEAD_FROZEN:
-                cache_remove_dev(sys_dev);
+                cache_remove_dev(dev);
                 break;
         }
         return NOTIFY_OK;
@@ -1174,9 +1173,9 @@ static int __cpuinit cache_sysfs_init(void)
 
         for_each_online_cpu(i) {
                 int err;
-                struct sys_device *sys_dev = get_cpu_sysdev(i);
+                struct device *dev = get_cpu_device(i);
 
-                err = cache_add_dev(sys_dev);
+                err = cache_add_dev(dev);
                 if (err)
                         return err;
         }
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c
index 6199232161cf..fc4beb393577 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-inject.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c
@@ -17,6 +17,7 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/fs.h>
+#include <linux/preempt.h>
 #include <linux/smp.h>
 #include <linux/notifier.h>
 #include <linux/kdebug.h>
@@ -92,6 +93,18 @@ static int mce_raise_notify(unsigned int cmd, struct pt_regs *regs)
         return NMI_HANDLED;
 }
 
+static void mce_irq_ipi(void *info)
+{
+        int cpu = smp_processor_id();
+        struct mce *m = &__get_cpu_var(injectm);
+
+        if (cpumask_test_cpu(cpu, mce_inject_cpumask) &&
+                        m->inject_flags & MCJ_EXCEPTION) {
+                cpumask_clear_cpu(cpu, mce_inject_cpumask);
+                raise_exception(m, NULL);
+        }
+}
+
 /* Inject mce on current CPU */
 static int raise_local(void)
 {
@@ -139,9 +152,10 @@ static void raise_mce(struct mce *m)
                 return;
 
 #ifdef CONFIG_X86_LOCAL_APIC
-        if (m->inject_flags & MCJ_NMI_BROADCAST) {
+        if (m->inject_flags & (MCJ_IRQ_BRAODCAST | MCJ_NMI_BROADCAST)) {
                 unsigned long start;
                 int cpu;
+
                 get_online_cpus();
                 cpumask_copy(mce_inject_cpumask, cpu_online_mask);
                 cpumask_clear_cpu(get_cpu(), mce_inject_cpumask);
@@ -151,13 +165,25 @@ static void raise_mce(struct mce *m)
                             MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM)
                                 cpumask_clear_cpu(cpu, mce_inject_cpumask);
                 }
-                if (!cpumask_empty(mce_inject_cpumask))
-                        apic->send_IPI_mask(mce_inject_cpumask, NMI_VECTOR);
+                if (!cpumask_empty(mce_inject_cpumask)) {
+                        if (m->inject_flags & MCJ_IRQ_BRAODCAST) {
+                                /*
+                                 * don't wait because mce_irq_ipi is necessary
+                                 * to be sync with following raise_local
+                                 */
+                                preempt_disable();
+                                smp_call_function_many(mce_inject_cpumask,
+                                        mce_irq_ipi, NULL, 0);
+                                preempt_enable();
+                        } else if (m->inject_flags & MCJ_NMI_BROADCAST)
+                                apic->send_IPI_mask(mce_inject_cpumask,
+                                                NMI_VECTOR);
+                }
                 start = jiffies;
                 while (!cpumask_empty(mce_inject_cpumask)) {
                         if (!time_before(jiffies, start + 2*HZ)) {
                                 printk(KERN_ERR
-                                "Timeout waiting for mce inject NMI %lx\n",
+                                "Timeout waiting for mce inject %lx\n",
                                         *cpumask_bits(mce_inject_cpumask));
                                 break;
                         }
@@ -208,7 +234,7 @@ static int inject_init(void)
         if (!alloc_cpumask_var(&mce_inject_cpumask, GFP_KERNEL))
                 return -ENOMEM;
         printk(KERN_INFO "Machine check injector initialized\n");
-        mce_chrdev_ops.write = mce_write;
+        register_mce_write_callback(mce_write);
         register_nmi_handler(NMI_LOCAL, mce_raise_notify, 0,
                                 "mce_notify");
         return 0;
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index fefcc69ee8b5..ed44c8a65858 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -1,4 +1,4 @@
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <asm/mce.h>
 
 enum severity_level {
@@ -17,7 +17,7 @@ enum severity_level {
 struct mce_bank {
         u64                     ctl;                    /* subevents to enable */
         unsigned char init;                             /* initialise bank? */
-        struct sysdev_attribute attr;                   /* sysdev attribute */
+        struct device_attribute attr;                   /* device attribute */
         char                    attrname[ATTR_LEN];     /* attribute name */
 };
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 362056aefeb4..f22a9f7f6390 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -19,7 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/percpu.h>
 #include <linux/string.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/syscore_ops.h>
 #include <linux/delay.h>
 #include <linux/ctype.h>
@@ -95,13 +95,6 @@ static DECLARE_WAIT_QUEUE_HEAD(mce_chrdev_wait);
 static DEFINE_PER_CPU(struct mce, mces_seen);
 static int                      cpu_missing;
 
-/*
- * CPU/chipset specific EDAC code can register a notifier call here to print
- * MCE errors in a human-readable form.
- */
-ATOMIC_NOTIFIER_HEAD(x86_mce_decoder_chain);
-EXPORT_SYMBOL_GPL(x86_mce_decoder_chain);
-
 /* MCA banks polled by the period polling timer for corrected events */
 DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
         [0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
@@ -109,6 +102,12 @@ DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
 
 static DEFINE_PER_CPU(struct work_struct, mce_work);
 
+/*
+ * CPU/chipset specific EDAC code can register a notifier call here to print
+ * MCE errors in a human-readable form.
+ */
+ATOMIC_NOTIFIER_HEAD(x86_mce_decoder_chain);
+
 /* Do initial initialization of a struct mce */
 void mce_setup(struct mce *m)
 {
@@ -119,9 +118,7 @@ void mce_setup(struct mce *m)
         m->time = get_seconds();
         m->cpuvendor = boot_cpu_data.x86_vendor;
         m->cpuid = cpuid_eax(1);
-#ifdef CONFIG_SMP
         m->socketid = cpu_data(m->extcpu).phys_proc_id;
-#endif
         m->apicid = cpu_data(m->extcpu).initial_apicid;
         rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
 }
@@ -190,6 +187,57 @@ void mce_log(struct mce *mce)
         set_bit(0, &mce_need_notify);
 }
 
+static void drain_mcelog_buffer(void)
+{
+        unsigned int next, i, prev = 0;
+
+        next = rcu_dereference_check_mce(mcelog.next);
+
+        do {
+                struct mce *m;
+
+                /* drain what was logged during boot */
+                for (i = prev; i < next; i++) {
+                        unsigned long start = jiffies;
+                        unsigned retries = 1;
+
+                        m = &mcelog.entry[i];
+
+                        while (!m->finished) {
+                                if (time_after_eq(jiffies, start + 2*retries))
+                                        retries++;
+
+                                cpu_relax();
+
+                                if (!m->finished && retries >= 4) {
+                                        pr_err("MCE: skipping error being logged currently!\n");
+                                        break;
+                                }
+                        }
+                        smp_rmb();
+                        atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, m);
+                }
+
+                memset(mcelog.entry + prev, 0, (next - prev) * sizeof(*m));
+                prev = next;
+                next = cmpxchg(&mcelog.next, prev, 0);
+        } while (next != prev);
+}
+
+
+void mce_register_decode_chain(struct notifier_block *nb)
+{
+        atomic_notifier_chain_register(&x86_mce_decoder_chain, nb);
+        drain_mcelog_buffer();
+}
+EXPORT_SYMBOL_GPL(mce_register_decode_chain);
+
+void mce_unregister_decode_chain(struct notifier_block *nb)
+{
+        atomic_notifier_chain_unregister(&x86_mce_decoder_chain, nb);
+}
+EXPORT_SYMBOL_GPL(mce_unregister_decode_chain);
+
 static void print_mce(struct mce *m)
 {
         int ret = 0;
@@ -1634,16 +1682,35 @@ static long mce_chrdev_ioctl(struct file *f, unsigned int cmd,
         }
 }
 
-/* Modified in mce-inject.c, so not static or const */
-struct file_operations mce_chrdev_ops = {
+static ssize_t (*mce_write)(struct file *filp, const char __user *ubuf,
+                            size_t usize, loff_t *off);
+
+void register_mce_write_callback(ssize_t (*fn)(struct file *filp,
+                             const char __user *ubuf,
+                             size_t usize, loff_t *off))
+{
+        mce_write = fn;
+}
+EXPORT_SYMBOL_GPL(register_mce_write_callback);
+
+ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,
+                         size_t usize, loff_t *off)
+{
+        if (mce_write)
+                return mce_write(filp, ubuf, usize, off);
+        else
+                return -EINVAL;
+}
+
+static const struct file_operations mce_chrdev_ops = {
         .open                   = mce_chrdev_open,
         .release                = mce_chrdev_release,
         .read                   = mce_chrdev_read,
+        .write                  = mce_chrdev_write,
         .poll                   = mce_chrdev_poll,
         .unlocked_ioctl         = mce_chrdev_ioctl,
         .llseek                 = no_llseek,
 };
-EXPORT_SYMBOL_GPL(mce_chrdev_ops);
 
 static struct miscdevice mce_chrdev_device = {
         MISC_MCELOG_MINOR,
@@ -1751,7 +1818,7 @@ static struct syscore_ops mce_syscore_ops = {
 };
 
 /*
- * mce_sysdev: Sysfs support
+ * mce_device: Sysfs support
  */
 
 static void mce_cpu_restart(void *data)
@@ -1787,27 +1854,28 @@ static void mce_enable_ce(void *all)
                 __mcheck_cpu_init_timer();
 }
 
-static struct sysdev_class mce_sysdev_class = {
+static struct bus_type mce_subsys = {
         .name           = "machinecheck",
+        .dev_name       = "machinecheck",
 };
 
-DEFINE_PER_CPU(struct sys_device, mce_sysdev);
+DEFINE_PER_CPU(struct device, mce_device);
 
 __cpuinitdata
 void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 
-static inline struct mce_bank *attr_to_bank(struct sysdev_attribute *attr)
+static inline struct mce_bank *attr_to_bank(struct device_attribute *attr)
 {
         return container_of(attr, struct mce_bank, attr);
 }
 
-static ssize_t show_bank(struct sys_device *s, struct sysdev_attribute *attr,
+static ssize_t show_bank(struct device *s, struct device_attribute *attr,
                          char *buf)
 {
         return sprintf(buf, "%llx\n", attr_to_bank(attr)->ctl);
 }
 
-static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
+static ssize_t set_bank(struct device *s, struct device_attribute *attr,
                         const char *buf, size_t size)
 {
         u64 new;
@@ -1822,14 +1890,14 @@ static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
 }
 
 static ssize_t
-show_trigger(struct sys_device *s, struct sysdev_attribute *attr, char *buf)
+show_trigger(struct device *s, struct device_attribute *attr, char *buf)
 {
         strcpy(buf, mce_helper);
         strcat(buf, "\n");
         return strlen(mce_helper) + 1;
 }
 
-static ssize_t set_trigger(struct sys_device *s, struct sysdev_attribute *attr,
+static ssize_t set_trigger(struct device *s, struct device_attribute *attr,
                                 const char *buf, size_t siz)
 {
         char *p;
@@ -1844,8 +1912,8 @@ static ssize_t set_trigger(struct sys_device *s, struct sysdev_attribute *attr,
         return strlen(mce_helper) + !!p;
 }
 
-static ssize_t set_ignore_ce(struct sys_device *s,
-                             struct sysdev_attribute *attr,
+static ssize_t set_ignore_ce(struct device *s,
+                             struct device_attribute *attr,
                              const char *buf, size_t size)
 {
         u64 new;
@@ -1868,8 +1936,8 @@ static ssize_t set_ignore_ce(struct sys_device *s,
         return size;
 }
 
-static ssize_t set_cmci_disabled(struct sys_device *s,
-                                 struct sysdev_attribute *attr,
+static ssize_t set_cmci_disabled(struct device *s,
+                                 struct device_attribute *attr,
                                  const char *buf, size_t size)
 {
         u64 new;
@@ -1891,108 +1959,107 @@ static ssize_t set_cmci_disabled(struct sys_device *s,
         return size;
 }
 
-static ssize_t store_int_with_restart(struct sys_device *s,
-                                      struct sysdev_attribute *attr,
+static ssize_t store_int_with_restart(struct device *s,
+                                      struct device_attribute *attr,
                                       const char *buf, size_t size)
 {
-        ssize_t ret = sysdev_store_int(s, attr, buf, size);
+        ssize_t ret = device_store_int(s, attr, buf, size);
         mce_restart();
         return ret;
 }
 
-static SYSDEV_ATTR(trigger, 0644, show_trigger, set_trigger);
-static SYSDEV_INT_ATTR(tolerant, 0644, tolerant);
-static SYSDEV_INT_ATTR(monarch_timeout, 0644, monarch_timeout);
-static SYSDEV_INT_ATTR(dont_log_ce, 0644, mce_dont_log_ce);
+static DEVICE_ATTR(trigger, 0644, show_trigger, set_trigger);
+static DEVICE_INT_ATTR(tolerant, 0644, tolerant);
+static DEVICE_INT_ATTR(monarch_timeout, 0644, monarch_timeout);
+static DEVICE_INT_ATTR(dont_log_ce, 0644, mce_dont_log_ce);
 
-static struct sysdev_ext_attribute attr_check_interval = {
-        _SYSDEV_ATTR(check_interval, 0644, sysdev_show_int,
-                     store_int_with_restart),
+static struct dev_ext_attribute dev_attr_check_interval = {
+        __ATTR(check_interval, 0644, device_show_int, store_int_with_restart),
         &check_interval
 };
 
-static struct sysdev_ext_attribute attr_ignore_ce = {
-        _SYSDEV_ATTR(ignore_ce, 0644, sysdev_show_int, set_ignore_ce),
+static struct dev_ext_attribute dev_attr_ignore_ce = {
+        __ATTR(ignore_ce, 0644, device_show_int, set_ignore_ce),
         &mce_ignore_ce
 };
 
-static struct sysdev_ext_attribute attr_cmci_disabled = {
-        _SYSDEV_ATTR(cmci_disabled, 0644, sysdev_show_int, set_cmci_disabled),
+static struct dev_ext_attribute dev_attr_cmci_disabled = {
+        __ATTR(cmci_disabled, 0644, device_show_int, set_cmci_disabled),
         &mce_cmci_disabled
 };
 
-static struct sysdev_attribute *mce_sysdev_attrs[] = {
-        &attr_tolerant.attr,
-        &attr_check_interval.attr,
-        &attr_trigger,
-        &attr_monarch_timeout.attr,
-        &attr_dont_log_ce.attr,
-        &attr_ignore_ce.attr,
-        &attr_cmci_disabled.attr,
+static struct device_attribute *mce_device_attrs[] = {
+        &dev_attr_tolerant.attr,
+        &dev_attr_check_interval.attr,
+        &dev_attr_trigger,
+        &dev_attr_monarch_timeout.attr,
+        &dev_attr_dont_log_ce.attr,
+        &dev_attr_ignore_ce.attr,
+        &dev_attr_cmci_disabled.attr,
         NULL
 };
 
-static cpumask_var_t mce_sysdev_initialized;
+static cpumask_var_t mce_device_initialized;
 
-/* Per cpu sysdev init. All of the cpus still share the same ctrl bank: */
-static __cpuinit int mce_sysdev_create(unsigned int cpu)
+/* Per cpu device init. All of the cpus still share the same ctrl bank: */
+static __cpuinit int mce_device_create(unsigned int cpu)
 {
-        struct sys_device *sysdev = &per_cpu(mce_sysdev, cpu);
+        struct device *dev = &per_cpu(mce_device, cpu);
         int err;
         int i, j;
 
         if (!mce_available(&boot_cpu_data))
                 return -EIO;
 
-        memset(&sysdev->kobj, 0, sizeof(struct kobject));
-        sysdev->id  = cpu;
-        sysdev->cls = &mce_sysdev_class;
+        memset(&dev->kobj, 0, sizeof(struct kobject));
+        dev->id  = cpu;
+        dev->bus = &mce_subsys;
 
-        err = sysdev_register(sysdev);
+        err = device_register(dev);
         if (err)
                 return err;
 
-        for (i = 0; mce_sysdev_attrs[i]; i++) {
-                err = sysdev_create_file(sysdev, mce_sysdev_attrs[i]);
+        for (i = 0; mce_device_attrs[i]; i++) {
+                err = device_create_file(dev, mce_device_attrs[i]);
                 if (err)
                         goto error;
         }
         for (j = 0; j < banks; j++) {
-                err = sysdev_create_file(sysdev, &mce_banks[j].attr);
+                err = device_create_file(dev, &mce_banks[j].attr);
                 if (err)
                         goto error2;
         }
-        cpumask_set_cpu(cpu, mce_sysdev_initialized);
+        cpumask_set_cpu(cpu, mce_device_initialized);
 
         return 0;
 error2:
         while (--j >= 0)
-                sysdev_remove_file(sysdev, &mce_banks[j].attr);
+                device_remove_file(dev, &mce_banks[j].attr);
 error:
         while (--i >= 0)
-                sysdev_remove_file(sysdev, mce_sysdev_attrs[i]);
+                device_remove_file(dev, mce_device_attrs[i]);
 
-        sysdev_unregister(sysdev);
+        device_unregister(dev);
 
         return err;
 }
 
-static __cpuinit void mce_sysdev_remove(unsigned int cpu)
+static __cpuinit void mce_device_remove(unsigned int cpu)
 {
-        struct sys_device *sysdev = &per_cpu(mce_sysdev, cpu);
+        struct device *dev = &per_cpu(mce_device, cpu);
         int i;
 
-        if (!cpumask_test_cpu(cpu, mce_sysdev_initialized))
+        if (!cpumask_test_cpu(cpu, mce_device_initialized))
                 return;
 
-        for (i = 0; mce_sysdev_attrs[i]; i++)
-                sysdev_remove_file(sysdev, mce_sysdev_attrs[i]);
+        for (i = 0; mce_device_attrs[i]; i++)
+                device_remove_file(dev, mce_device_attrs[i]);
 
         for (i = 0; i < banks; i++)
-                sysdev_remove_file(sysdev, &mce_banks[i].attr);
+                device_remove_file(dev, &mce_banks[i].attr);
 
-        sysdev_unregister(sysdev);
-        cpumask_clear_cpu(cpu, mce_sysdev_initialized);
+        device_unregister(dev);
+        cpumask_clear_cpu(cpu, mce_device_initialized);
 }
 
 /* Make sure there are no machine checks on offlined CPUs. */
@@ -2042,7 +2109,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
-                mce_sysdev_create(cpu);
+                mce_device_create(cpu);
                 if (threshold_cpu_callback)
                         threshold_cpu_callback(action, cpu);
                 break;
@@ -2050,7 +2117,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
         case CPU_DEAD_FROZEN:
                 if (threshold_cpu_callback)
                         threshold_cpu_callback(action, cpu);
-                mce_sysdev_remove(cpu);
+                mce_device_remove(cpu);
                 break;
         case CPU_DOWN_PREPARE:
         case CPU_DOWN_PREPARE_FROZEN:
@@ -2084,7 +2151,7 @@ static __init void mce_init_banks(void)
 
         for (i = 0; i < banks; i++) {
                 struct mce_bank *b = &mce_banks[i];
-                struct sysdev_attribute *a = &b->attr;
+                struct device_attribute *a = &b->attr;
 
                 sysfs_attr_init(&a->attr);
                 a->attr.name    = b->attrname;
@@ -2104,16 +2171,16 @@ static __init int mcheck_init_device(void)
         if (!mce_available(&boot_cpu_data))
                 return -EIO;
 
-        zalloc_cpumask_var(&mce_sysdev_initialized, GFP_KERNEL);
+        zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL);
 
         mce_init_banks();
 
-        err = sysdev_class_register(&mce_sysdev_class);
+        err = subsys_system_register(&mce_subsys, NULL);
         if (err)
                 return err;
 
         for_each_online_cpu(i) {
-                err = mce_sysdev_create(i);
+                err = mce_device_create(i);
                 if (err)
                         return err;
         }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index f5474218cffe..ba0b94a7e204 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -17,7 +17,6 @@
 #include <linux/notifier.h>
 #include <linux/kobject.h>
 #include <linux/percpu.h>
-#include <linux/sysdev.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/sysfs.h>
@@ -64,11 +63,9 @@ struct threshold_bank {
 };
 static DEFINE_PER_CPU(struct threshold_bank * [NR_BANKS], threshold_banks);
 
-#ifdef CONFIG_SMP
 static unsigned char shared_bank[NR_BANKS] = {
         0, 0, 0, 0, 1
 };
-#endif
 
 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
 
@@ -202,10 +199,9 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
 
                         if (!block)
                                 per_cpu(bank_map, cpu) |= (1 << bank);
-#ifdef CONFIG_SMP
                         if (shared_bank[bank] && c->cpu_core_id)
                                 break;
-#endif
+
                         offset = setup_APIC_mce(offset,
                                                 (high & MASK_LVTOFF_HI) >> 20);
 
@@ -531,7 +527,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
         sprintf(name, "threshold_bank%i", bank);
 
-#ifdef CONFIG_SMP
         if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
                 i = cpumask_first(cpu_llc_shared_mask(cpu));
 
@@ -548,7 +543,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 if (!b)
                         goto out;
 
-                err = sysfs_create_link(&per_cpu(mce_sysdev, cpu).kobj,
+                err = sysfs_create_link(&per_cpu(mce_device, cpu).kobj,
                                         b->kobj, name);
                 if (err)
                         goto out;
@@ -558,7 +553,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
                 goto out;
         }
-#endif
 
         b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
         if (!b) {
@@ -571,7 +565,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 goto out;
         }
 
-        b->kobj = kobject_create_and_add(name, &per_cpu(mce_sysdev, cpu).kobj);
+        b->kobj = kobject_create_and_add(name, &per_cpu(mce_device, cpu).kobj);
         if (!b->kobj)
                 goto out_free;
 
@@ -591,7 +585,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 if (i == cpu)
                         continue;
 
-                err = sysfs_create_link(&per_cpu(mce_sysdev, i).kobj,
+                err = sysfs_create_link(&per_cpu(mce_device, i).kobj,
                                         b->kobj, name);
                 if (err)
                         goto out;
@@ -669,7 +663,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
 #ifdef CONFIG_SMP
         /* sibling symlink */
         if (shared_bank[bank] && b->blocks->cpu != cpu) {
-                sysfs_remove_link(&per_cpu(mce_sysdev, cpu).kobj, name);
+                sysfs_remove_link(&per_cpu(mce_device, cpu).kobj, name);
                 per_cpu(threshold_banks, cpu)[bank] = NULL;
 
                 return;
@@ -681,7 +675,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
                 if (i == cpu)
                         continue;
 
-                sysfs_remove_link(&per_cpu(mce_sysdev, i).kobj, name);
+                sysfs_remove_link(&per_cpu(mce_device, i).kobj, name);
                 per_cpu(threshold_banks, i)[bank] = NULL;
         }
 
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index 787e06c84ea6..67bb17a37a0a 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -19,7 +19,6 @@
 #include <linux/kernel.h>
 #include <linux/percpu.h>
 #include <linux/export.h>
-#include <linux/sysdev.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/smp.h>
@@ -69,16 +68,16 @@ static atomic_t therm_throt_en	= ATOMIC_INIT(0);
 static u32 lvtthmr_init __read_mostly;
 
 #ifdef CONFIG_SYSFS
-#define define_therm_throt_sysdev_one_ro(_name)                         \
-        static SYSDEV_ATTR(_name, 0444,                                 \
-                           therm_throt_sysdev_show_##_name,             \
+#define define_therm_throt_device_one_ro(_name)                         \
+        static DEVICE_ATTR(_name, 0444,                                 \
+                           therm_throt_device_show_##_name,             \
                                    NULL)                                \
 
-#define define_therm_throt_sysdev_show_func(event, name)                \
+#define define_therm_throt_device_show_func(event, name)                \
                                                                         \
-static ssize_t therm_throt_sysdev_show_##event##_##name(                \
-                        struct sys_device *dev,                         \
-                        struct sysdev_attribute *attr,                  \
+static ssize_t therm_throt_device_show_##event##_##name(                \
+                        struct device *dev,                             \
+                        struct device_attribute *attr,                  \
                         char *buf)                                      \
 {                                                                       \
         unsigned int cpu = dev->id;                                     \
@@ -95,20 +94,20 @@ static ssize_t therm_throt_sysdev_show_##event##_##name(		\
         return ret;                                                     \
 }
 
-define_therm_throt_sysdev_show_func(core_throttle, count);
-define_therm_throt_sysdev_one_ro(core_throttle_count);
+define_therm_throt_device_show_func(core_throttle, count);
+define_therm_throt_device_one_ro(core_throttle_count);
 
-define_therm_throt_sysdev_show_func(core_power_limit, count);
-define_therm_throt_sysdev_one_ro(core_power_limit_count);
+define_therm_throt_device_show_func(core_power_limit, count);
+define_therm_throt_device_one_ro(core_power_limit_count);
 
-define_therm_throt_sysdev_show_func(package_throttle, count);
-define_therm_throt_sysdev_one_ro(package_throttle_count);
+define_therm_throt_device_show_func(package_throttle, count);
+define_therm_throt_device_one_ro(package_throttle_count);
 
-define_therm_throt_sysdev_show_func(package_power_limit, count);
-define_therm_throt_sysdev_one_ro(package_power_limit_count);
+define_therm_throt_device_show_func(package_power_limit, count);
+define_therm_throt_device_one_ro(package_power_limit_count);
 
 static struct attribute *thermal_throttle_attrs[] = {
-        &attr_core_throttle_count.attr,
+        &dev_attr_core_throttle_count.attr,
         NULL
 };
 
@@ -223,36 +222,36 @@ static int thresh_event_valid(int event)
 
 #ifdef CONFIG_SYSFS
 /* Add/Remove thermal_throttle interface for CPU device: */
-static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev,
+static __cpuinit int thermal_throttle_add_dev(struct device *dev,
                                 unsigned int cpu)
 {
         int err;
         struct cpuinfo_x86 *c = &cpu_data(cpu);
 
-        err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
+        err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
         if (err)
                 return err;
 
         if (cpu_has(c, X86_FEATURE_PLN))
-                err = sysfs_add_file_to_group(&sys_dev->kobj,
-                                              &attr_core_power_limit_count.attr,
+                err = sysfs_add_file_to_group(&dev->kobj,
+                                              &dev_attr_core_power_limit_count.attr,
                                               thermal_attr_group.name);
         if (cpu_has(c, X86_FEATURE_PTS)) {
-                err = sysfs_add_file_to_group(&sys_dev->kobj,
-                                              &attr_package_throttle_count.attr,
+                err = sysfs_add_file_to_group(&dev->kobj,
+                                              &dev_attr_package_throttle_count.attr,
                                               thermal_attr_group.name);
                 if (cpu_has(c, X86_FEATURE_PLN))
-                        err = sysfs_add_file_to_group(&sys_dev->kobj,
-                                        &attr_package_power_limit_count.attr,
+                        err = sysfs_add_file_to_group(&dev->kobj,
+                                        &dev_attr_package_power_limit_count.attr,
                                         thermal_attr_group.name);
         }
 
         return err;
 }
 
-static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
+static __cpuinit void thermal_throttle_remove_dev(struct device *dev)
 {
-        sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
+        sysfs_remove_group(&dev->kobj, &thermal_attr_group);
 }
 
 /* Mutex protecting device creation against CPU hotplug: */
@@ -265,16 +264,16 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb,
                               void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
-        struct sys_device *sys_dev;
+        struct device *dev;
         int err = 0;
 
-        sys_dev = get_cpu_sysdev(cpu);
+        dev = get_cpu_device(cpu);
 
         switch (action) {
         case CPU_UP_PREPARE:
         case CPU_UP_PREPARE_FROZEN:
                 mutex_lock(&therm_cpu_lock);
-                err = thermal_throttle_add_dev(sys_dev, cpu);
+                err = thermal_throttle_add_dev(dev, cpu);
                 mutex_unlock(&therm_cpu_lock);
                 WARN_ON(err);
                 break;
@@ -283,7 +282,7 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb,
         case CPU_DEAD:
         case CPU_DEAD_FROZEN:
                 mutex_lock(&therm_cpu_lock);
-                thermal_throttle_remove_dev(sys_dev);
+                thermal_throttle_remove_dev(dev);
                 mutex_unlock(&therm_cpu_lock);
                 break;
         }
@@ -310,7 +309,7 @@ static __init int thermal_throttle_init_device(void)
 #endif
         /* connect live CPUs to sysfs */
         for_each_online_cpu(cpu) {
-                err = thermal_throttle_add_dev(get_cpu_sysdev(cpu), cpu);
+                err = thermal_throttle_add_dev(get_cpu_device(cpu), cpu);
                 WARN_ON(err);
         }
 #ifdef CONFIG_HOTPLUG_CPU
@@ -323,17 +322,6 @@ device_initcall(thermal_throttle_init_device);
 
 #endif /* CONFIG_SYSFS */
 
-/*
- * Set up the most two significant bit to notify mce log that this thermal
- * event type.
- * This is a temp solution. May be changed in the future with mce log
- * infrasture.
- */
-#define CORE_THROTTLED          (0)
-#define CORE_POWER_LIMIT        ((__u64)1 << 62)
-#define PACKAGE_THROTTLED       ((__u64)2 << 62)
-#define PACKAGE_POWER_LIMIT     ((__u64)3 << 62)
-
 static void notify_thresholds(__u64 msr_val)
 {
         /* check whether the interrupt handler is defined;
@@ -363,27 +351,23 @@ static void intel_thermal_interrupt(void)
         if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
                                 THERMAL_THROTTLING_EVENT,
                                 CORE_LEVEL) != 0)
-                mce_log_therm_throt_event(CORE_THROTTLED | msr_val);
+                mce_log_therm_throt_event(msr_val);
 
         if (this_cpu_has(X86_FEATURE_PLN))
-                if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
+                therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
                                         POWER_LIMIT_EVENT,
-                                        CORE_LEVEL) != 0)
-                        mce_log_therm_throt_event(CORE_POWER_LIMIT | msr_val);
+                                        CORE_LEVEL);
 
         if (this_cpu_has(X86_FEATURE_PTS)) {
                 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
-                if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
+                therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
                                         THERMAL_THROTTLING_EVENT,
-                                        PACKAGE_LEVEL) != 0)
-                        mce_log_therm_throt_event(PACKAGE_THROTTLED | msr_val);
+                                        PACKAGE_LEVEL);
                 if (this_cpu_has(X86_FEATURE_PLN))
-                        if (therm_throt_process(msr_val &
+                        therm_throt_process(msr_val &
                                         PACKAGE_THERM_STATUS_POWER_LIMIT,
                                         POWER_LIMIT_EVENT,
-                                        PACKAGE_LEVEL) != 0)
-                                mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
-                                                          | msr_val);
+                                        PACKAGE_LEVEL);
         }
 }
 
@@ -397,8 +381,8 @@ static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
 
 asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
 {
-        exit_idle();
         irq_enter();
+        exit_idle();
         inc_irq_stat(irq_thermal_count);
         smp_thermal_vector();
         irq_exit();
diff --git a/arch/x86/kernel/cpu/mcheck/threshold.c b/arch/x86/kernel/cpu/mcheck/threshold.c
index d746df2909c9..aa578cadb940 100644
--- a/arch/x86/kernel/cpu/mcheck/threshold.c
+++ b/arch/x86/kernel/cpu/mcheck/threshold.c
@@ -19,8 +19,8 @@ void (*mce_threshold_vector)(void) = default_threshold_interrupt;
 
 asmlinkage void smp_threshold_interrupt(void)
 {
-        exit_idle();
         irq_enter();
+        exit_idle();
         inc_irq_stat(irq_threshold_count);
         mce_threshold_vector();
         irq_exit();
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index a71efcdbb092..97b26356e9ee 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -547,6 +547,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
 
                 if (tmp != mask_lo) {
                         printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n");
+                        add_taint(TAINT_FIRMWARE_WORKAROUND);
                         mask_lo = tmp;
                 }
         }
@@ -693,6 +694,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
 
         /* Disable MTRRs, and set the default type to uncached */
         mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
+        wbinvd();
 }
 
 static void post_set(void) __releases(set_atomicity_lock)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 640891014b2a..5adce1040b11 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -312,12 +312,8 @@ int x86_setup_perfctr(struct perf_event *event)
                         return -EOPNOTSUPP;
         }
 
-        /*
-         * Do not allow config1 (extended registers) to propagate,
-         * there's no sane user-space generalization yet:
-         */
         if (attr->type == PERF_TYPE_RAW)
-                return 0;
+                return x86_pmu_extra_regs(event->attr.config, event);
 
         if (attr->type == PERF_TYPE_HW_CACHE)
                 return set_ext_hw_attr(hwc, event);
@@ -488,18 +484,195 @@ static inline int is_x86_event(struct perf_event *event)
         return event->pmu == &pmu;
 }
 
+/*
+ * Event scheduler state:
+ *
+ * Assign events iterating over all events and counters, beginning
+ * with events with least weights first. Keep the current iterator
+ * state in struct sched_state.
+ */
+struct sched_state {
+        int     weight;
+        int     event;          /* event index */
+        int     counter;        /* counter index */
+        int     unassigned;     /* number of events to be assigned left */
+        unsigned long used[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
+};
+
+/* Total max is X86_PMC_IDX_MAX, but we are O(n!) limited */
+#define SCHED_STATES_MAX        2
+
+struct perf_sched {
+        int                     max_weight;
+        int                     max_events;
+        struct event_constraint **constraints;
+        struct sched_state      state;
+        int                     saved_states;
+        struct sched_state      saved[SCHED_STATES_MAX];
+};
+
+/*
+ * Initialize interator that runs through all events and counters.
+ */
+static void perf_sched_init(struct perf_sched *sched, struct event_constraint **c,
+                            int num, int wmin, int wmax)
+{
+        int idx;
+
+        memset(sched, 0, sizeof(*sched));
+        sched->max_events       = num;
+        sched->max_weight       = wmax;
+        sched->constraints      = c;
+
+        for (idx = 0; idx < num; idx++) {
+                if (c[idx]->weight == wmin)
+                        break;
+        }
+
+        sched->state.event      = idx;          /* start with min weight */
+        sched->state.weight     = wmin;
+        sched->state.unassigned = num;
+}
+
+static void perf_sched_save_state(struct perf_sched *sched)
+{
+        if (WARN_ON_ONCE(sched->saved_states >= SCHED_STATES_MAX))
+                return;
+
+        sched->saved[sched->saved_states] = sched->state;
+        sched->saved_states++;
+}
+
+static bool perf_sched_restore_state(struct perf_sched *sched)
+{
+        if (!sched->saved_states)
+                return false;
+
+        sched->saved_states--;
+        sched->state = sched->saved[sched->saved_states];
+
+        /* continue with next counter: */
+        clear_bit(sched->state.counter++, sched->state.used);
+
+        return true;
+}
+
+/*
+ * Select a counter for the current event to schedule. Return true on
+ * success.
+ */
+static bool __perf_sched_find_counter(struct perf_sched *sched)
+{
+        struct event_constraint *c;
+        int idx;
+
+        if (!sched->state.unassigned)
+                return false;
+
+        if (sched->state.event >= sched->max_events)
+                return false;
+
+        c = sched->constraints[sched->state.event];
+
+        /* Prefer fixed purpose counters */
+        if (x86_pmu.num_counters_fixed) {
+                idx = X86_PMC_IDX_FIXED;
+                for_each_set_bit_cont(idx, c->idxmsk, X86_PMC_IDX_MAX) {
+                        if (!__test_and_set_bit(idx, sched->state.used))
+                                goto done;
+                }
+        }
+        /* Grab the first unused counter starting with idx */
+        idx = sched->state.counter;
+        for_each_set_bit_cont(idx, c->idxmsk, X86_PMC_IDX_FIXED) {
+                if (!__test_and_set_bit(idx, sched->state.used))
+                        goto done;
+        }
+
+        return false;
+
+done:
+        sched->state.counter = idx;
+
+        if (c->overlap)
+                perf_sched_save_state(sched);
+
+        return true;
+}
+
+static bool perf_sched_find_counter(struct perf_sched *sched)
+{
+        while (!__perf_sched_find_counter(sched)) {
+                if (!perf_sched_restore_state(sched))
+                        return false;
+        }
+
+        return true;
+}
+
+/*
+ * Go through all unassigned events and find the next one to schedule.
+ * Take events with the least weight first. Return true on success.
+ */
+static bool perf_sched_next_event(struct perf_sched *sched)
+{
+        struct event_constraint *c;
+
+        if (!sched->state.unassigned || !--sched->state.unassigned)
+                return false;
+
+        do {
+                /* next event */
+                sched->state.event++;
+                if (sched->state.event >= sched->max_events) {
+                        /* next weight */
+                        sched->state.event = 0;
+                        sched->state.weight++;
+                        if (sched->state.weight > sched->max_weight)
+                                return false;
+                }
+                c = sched->constraints[sched->state.event];
+        } while (c->weight != sched->state.weight);
+
+        sched->state.counter = 0;       /* start with first counter */
+
+        return true;
+}
+
+/*
+ * Assign a counter for each event.
+ */
+static int perf_assign_events(struct event_constraint **constraints, int n,
+                              int wmin, int wmax, int *assign)
+{
+        struct perf_sched sched;
+
+        perf_sched_init(&sched, constraints, n, wmin, wmax);
+
+        do {
+                if (!perf_sched_find_counter(&sched))
+                        break;  /* failed */
+                if (assign)
+                        assign[sched.state.event] = sched.state.counter;
+        } while (perf_sched_next_event(&sched));
+
+        return sched.state.unassigned;
+}
+
 int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
 {
         struct event_constraint *c, *constraints[X86_PMC_IDX_MAX];
         unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
-        int i, j, w, wmax, num = 0;
+        int i, wmin, wmax, num = 0;
         struct hw_perf_event *hwc;
 
         bitmap_zero(used_mask, X86_PMC_IDX_MAX);
 
-        for (i = 0; i < n; i++) {
+        for (i = 0, wmin = X86_PMC_IDX_MAX, wmax = 0; i < n; i++) {
                 c = x86_pmu.get_event_constraints(cpuc, cpuc->event_list[i]);
                 constraints[i] = c;
+                wmin = min(wmin, c->weight);
+                wmax = max(wmax, c->weight);
         }
 
         /*
@@ -525,59 +698,11 @@ int x86_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign)
                 if (assign)
                         assign[i] = hwc->idx;
         }
-        if (i == n)
-                goto done;
-
-        /*
-         * begin slow path
-         */
-
-        bitmap_zero(used_mask, X86_PMC_IDX_MAX);
-
-        /*
-         * weight = number of possible counters
-         *
-         * 1    = most constrained, only works on one counter
-         * wmax = least constrained, works on any counter
-         *
-         * assign events to counters starting with most
-         * constrained events.
-         */
-        wmax = x86_pmu.num_counters;
-
-        /*
-         * when fixed event counters are present,
-         * wmax is incremented by 1 to account
-         * for one more choice
-         */
-        if (x86_pmu.num_counters_fixed)
-                wmax++;
-
-        for (w = 1, num = n; num && w <= wmax; w++) {
-                /* for each event */
-                for (i = 0; num && i < n; i++) {
-                        c = constraints[i];
-                        hwc = &cpuc->event_list[i]->hw;
-
-                        if (c->weight != w)
-                                continue;
 
-                        for_each_set_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
-                                if (!test_bit(j, used_mask))
-                                        break;
-                        }
-
-                        if (j == X86_PMC_IDX_MAX)
-                                break;
+        /* slow path */
+        if (i != n)
+                num = perf_assign_events(constraints, n, wmin, wmax, assign);
 
-                        __set_bit(j, used_mask);
-
-                        if (assign)
-                                assign[i] = j;
-                        num--;
-                }
-        }
-done:
         /*
          * scheduling failed or is just a simulation,
          * free resources if necessary
@@ -588,7 +713,7 @@ done:
                                 x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]);
                 }
         }
-        return num ? -ENOSPC : 0;
+        return num ? -EINVAL : 0;
 }
 
 /*
@@ -607,7 +732,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
 
         if (is_x86_event(leader)) {
                 if (n >= max_count)
-                        return -ENOSPC;
+                        return -EINVAL;
                 cpuc->event_list[n] = leader;
                 n++;
         }
@@ -620,7 +745,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
                         continue;
 
                 if (n >= max_count)
-                        return -ENOSPC;
+                        return -EINVAL;
 
                 cpuc->event_list[n] = event;
                 n++;
@@ -1123,6 +1248,7 @@ static void __init pmu_check_apic(void)
 
 static int __init init_hw_perf_events(void)
 {
+        struct x86_pmu_quirk *quirk;
         struct event_constraint *c;
         int err;
 
@@ -1151,8 +1277,8 @@ static int __init init_hw_perf_events(void)
 
         pr_cont("%s PMU driver.\n", x86_pmu.name);
 
-        if (x86_pmu.quirks)
-                x86_pmu.quirks();
+        for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next)
+                quirk->func();
 
         if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
                 WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
@@ -1175,12 +1301,18 @@ static int __init init_hw_perf_events(void)
 
         unconstrained = (struct event_constraint)
                 __EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1,
-                                   0, x86_pmu.num_counters);
+                                   0, x86_pmu.num_counters, 0);
 
         if (x86_pmu.event_constraints) {
+                /*
+                 * event on fixed counter2 (REF_CYCLES) only works on this
+                 * counter, so do not extend mask to generic counters
+                 */
                 for_each_event_constraint(c, x86_pmu.event_constraints) {
-                        if (c->cmask != X86_RAW_EVENT_MASK)
+                        if (c->cmask != X86_RAW_EVENT_MASK
+                            || c->idxmsk64 == X86_PMC_MSK_FIXED_REF_CYCLES) {
                                 continue;
+                        }
 
                         c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1;
                         c->weight += x86_pmu.num_counters;
@@ -1316,7 +1448,7 @@ static int validate_event(struct perf_event *event)
         c = x86_pmu.get_event_constraints(fake_cpuc, event);
 
         if (!c || !c->weight)
-                ret = -ENOSPC;
+                ret = -EINVAL;
 
         if (x86_pmu.put_event_constraints)
                 x86_pmu.put_event_constraints(fake_cpuc, event);
@@ -1341,7 +1473,7 @@ static int validate_group(struct perf_event *event)
 {
         struct perf_event *leader = event->group_leader;
         struct cpu_hw_events *fake_cpuc;
-        int ret = -ENOSPC, n;
+        int ret = -EINVAL, n;
 
         fake_cpuc = allocate_fake_cpuc();
         if (IS_ERR(fake_cpuc))
@@ -1570,3 +1702,15 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
 
         return misc;
 }
+
+void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
+{
+        cap->version            = x86_pmu.version;
+        cap->num_counters_gp    = x86_pmu.num_counters;
+        cap->num_counters_fixed = x86_pmu.num_counters_fixed;
+        cap->bit_width_gp       = x86_pmu.cntval_bits;
+        cap->bit_width_fixed    = x86_pmu.cntval_bits;
+        cap->events_mask        = (unsigned int)x86_pmu.events_maskl;
+        cap->events_mask_len    = x86_pmu.events_mask_len;
+}
+EXPORT_SYMBOL_GPL(perf_get_x86_pmu_capability);
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index b9698d40ac4b..8944062f46e2 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -45,6 +45,7 @@ struct event_constraint {
         u64     code;
         u64     cmask;
         int     weight;
+        int     overlap;
 };
 
 struct amd_nb {
@@ -151,15 +152,40 @@ struct cpu_hw_events {
         void                            *kfree_on_online;
 };
 
-#define __EVENT_CONSTRAINT(c, n, m, w) {\
+#define __EVENT_CONSTRAINT(c, n, m, w, o) {\
         { .idxmsk64 = (n) },            \
         .code = (c),                    \
         .cmask = (m),                   \
         .weight = (w),                  \
+        .overlap = (o),                 \
 }
 
 #define EVENT_CONSTRAINT(c, n, m)       \
-        __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n))
+        __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 0)
+
+/*
+ * The overlap flag marks event constraints with overlapping counter
+ * masks. This is the case if the counter mask of such an event is not
+ * a subset of any other counter mask of a constraint with an equal or
+ * higher weight, e.g.:
+ *
+ *  c_overlaps = EVENT_CONSTRAINT_OVERLAP(0, 0x09, 0);
+ *  c_another1 = EVENT_CONSTRAINT(0, 0x07, 0);
+ *  c_another2 = EVENT_CONSTRAINT(0, 0x38, 0);
+ *
+ * The event scheduler may not select the correct counter in the first
+ * cycle because it needs to know which subsequent events will be
+ * scheduled. It may fail to schedule the events then. So we set the
+ * overlap flag for such constraints to give the scheduler a hint which
+ * events to select for counter rescheduling.
+ *
+ * Care must be taken as the rescheduling algorithm is O(n!) which
+ * will increase scheduling cycles for an over-commited system
+ * dramatically.  The number of such EVENT_CONSTRAINT_OVERLAP() macros
+ * and its counter masks must be kept at a minimum.
+ */
+#define EVENT_CONSTRAINT_OVERLAP(c, n, m)       \
+        __EVENT_CONSTRAINT(c, n, m, HWEIGHT(n), 1)
 
 /*
  * Constraint on the Event code.
@@ -235,6 +261,11 @@ union perf_capabilities {
         u64     capabilities;
 };
 
+struct x86_pmu_quirk {
+        struct x86_pmu_quirk *next;
+        void (*func)(void);
+};
+
 /*
  * struct x86_pmu - generic x86 pmu
  */
@@ -259,6 +290,11 @@ struct x86_pmu {
         int             num_counters_fixed;
         int             cntval_bits;
         u64             cntval_mask;
+        union {
+                        unsigned long events_maskl;
+                        unsigned long events_mask[BITS_TO_LONGS(ARCH_PERFMON_EVENTS_COUNT)];
+        };
+        int             events_mask_len;
         int             apic;
         u64             max_period;
         struct event_constraint *
@@ -268,7 +304,7 @@ struct x86_pmu {
         void            (*put_event_constraints)(struct cpu_hw_events *cpuc,
                                                  struct perf_event *event);
         struct event_constraint *event_constraints;
-        void            (*quirks)(void);
+        struct x86_pmu_quirk *quirks;
         int             perfctr_second_write;
 
         int             (*cpu_prepare)(int cpu);
@@ -309,6 +345,15 @@ struct x86_pmu {
         struct perf_guest_switch_msr *(*guest_get_msrs)(int *nr);
 };
 
+#define x86_add_quirk(func_)                                            \
+do {                                                                    \
+        static struct x86_pmu_quirk __quirk __initdata = {              \
+                .func = func_,                                          \
+        };                                                              \
+        __quirk.next = x86_pmu.quirks;                                  \
+        x86_pmu.quirks = &__quirk;                                      \
+} while (0)
+
 #define ERF_NO_HT_SHARING       1
 #define ERF_HAS_RSP_1           2
 
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index aeefd45697a2..0397b23be8e9 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -492,7 +492,7 @@ static __initconst const struct x86_pmu amd_pmu = {
 static struct event_constraint amd_f15_PMC0  = EVENT_CONSTRAINT(0, 0x01, 0);
 static struct event_constraint amd_f15_PMC20 = EVENT_CONSTRAINT(0, 0x07, 0);
 static struct event_constraint amd_f15_PMC3  = EVENT_CONSTRAINT(0, 0x08, 0);
-static struct event_constraint amd_f15_PMC30 = EVENT_CONSTRAINT(0, 0x09, 0);
+static struct event_constraint amd_f15_PMC30 = EVENT_CONSTRAINT_OVERLAP(0, 0x09, 0);
 static struct event_constraint amd_f15_PMC50 = EVENT_CONSTRAINT(0, 0x3F, 0);
 static struct event_constraint amd_f15_PMC53 = EVENT_CONSTRAINT(0, 0x38, 0);
 
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index ab6343d21825..3b8a2d30d14e 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void)
                 goto out;
         }
 
-        pr_err(FW_BUG "using offset %d for IBS interrupts\n", offset);
-        pr_err(FW_BUG "workaround enabled for IBS LVT offset\n");
+        pr_info("IBS: LVT offset %d assigned\n", offset);
 
         return 0;
 out:
@@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h
 static __init int amd_ibs_init(void)
 {
         u32 caps;
-        int ret;
+        int ret = -EINVAL;
 
         caps = __get_ibs_caps();
         if (!caps)
                 return -ENODEV; /* ibs not supported by the cpu */
 
-        if (!ibs_eilvt_valid()) {
-                ret = force_ibs_eilvt_setup();
-                if (ret) {
-                        pr_err("Failed to setup IBS, %d\n", ret);
-                        return ret;
-                }
-        }
+        /*
+         * Force LVT offset assignment for family 10h: The offsets are
+         * not assigned by the BIOS for this family, so the OS is
+         * responsible for doing it. If the OS assignment fails, fall
+         * back to BIOS settings and try to setup this.
+         */
+        if (boot_cpu_data.x86 == 0x10)
+                force_ibs_eilvt_setup();
+
+        if (!ibs_eilvt_valid())
+                goto out;
 
         get_online_cpus();
         ibs_caps = caps;
@@ -287,7 +290,11 @@ static __init int amd_ibs_init(void)
         smp_call_function(setup_APIC_ibs, NULL, 1);
         put_online_cpus();
 
-        return perf_event_ibs_init();
+        ret = perf_event_ibs_init();
+out:
+        if (ret)
+                pr_err("Failed to setup IBS, %d\n", ret);
+        return ret;
 }
 
 /* Since we need the pci subsystem to init ibs we can't do this earlier: */
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 2be5ebe99872..3bd37bdf1b8e 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -28,6 +28,7 @@ static u64 intel_perfmon_event_map[PERF_COUNT_HW_MAX] __read_mostly =
   [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]   = 0x00c4,
   [PERF_COUNT_HW_BRANCH_MISSES]         = 0x00c5,
   [PERF_COUNT_HW_BUS_CYCLES]            = 0x013c,
+  [PERF_COUNT_HW_REF_CPU_CYCLES]        = 0x0300, /* pseudo-encoding */
 };
 
 static struct event_constraint intel_core_event_constraints[] __read_mostly =
@@ -45,12 +46,7 @@ static struct event_constraint intel_core2_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
-        /*
-         * Core2 has Fixed Counter 2 listed as CPU_CLK_UNHALTED.REF and event
-         * 0x013c as CPU_CLK_UNHALTED.BUS and specifies there is a fixed
-         * ratio between these counters.
-         */
-        /* FIXED_EVENT_CONSTRAINT(0x013c, 2),  CPU_CLK_UNHALTED.REF */
+        FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */
         INTEL_EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */
         INTEL_EVENT_CONSTRAINT(0x12, 0x2), /* MUL */
@@ -68,7 +64,7 @@ static struct event_constraint intel_nehalem_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
-        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
+        FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x40, 0x3), /* L1D_CACHE_LD */
         INTEL_EVENT_CONSTRAINT(0x41, 0x3), /* L1D_CACHE_ST */
         INTEL_EVENT_CONSTRAINT(0x42, 0x3), /* L1D_CACHE_LOCK */
@@ -90,7 +86,7 @@ static struct event_constraint intel_westmere_event_constraints[] __read_mostly
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
-        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
+        FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x51, 0x3), /* L1D */
         INTEL_EVENT_CONSTRAINT(0x60, 0x1), /* OFFCORE_REQUESTS_OUTSTANDING */
         INTEL_EVENT_CONSTRAINT(0x63, 0x3), /* CACHE_LOCK_CYCLES */
@@ -102,7 +98,7 @@ static struct event_constraint intel_snb_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
-        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
+        FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
         INTEL_EVENT_CONSTRAINT(0x48, 0x4), /* L1D_PEND_MISS.PENDING */
         INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */
         INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */
@@ -125,7 +121,7 @@ static struct event_constraint intel_gen_event_constraints[] __read_mostly =
 {
         FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
         FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
-        /* FIXED_EVENT_CONSTRAINT(0x013c, 2), CPU_CLK_UNHALTED.REF */
+        FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
         EVENT_CONSTRAINT_END
 };
 
@@ -1169,7 +1165,7 @@ again:
                  */
                 c = &unconstrained;
         } else if (intel_try_alt_er(event, orig_idx)) {
-                raw_spin_unlock(&era->lock);
+                raw_spin_unlock_irqrestore(&era->lock, flags);
                 goto again;
         }
         raw_spin_unlock_irqrestore(&era->lock, flags);
@@ -1519,7 +1515,7 @@ static __initconst const struct x86_pmu intel_pmu = {
         .guest_get_msrs         = intel_guest_get_msrs,
 };
 
-static void intel_clovertown_quirks(void)
+static __init void intel_clovertown_quirk(void)
 {
         /*
          * PEBS is unreliable due to:
@@ -1545,12 +1541,60 @@ static void intel_clovertown_quirks(void)
         x86_pmu.pebs_constraints = NULL;
 }
 
+static __init void intel_sandybridge_quirk(void)
+{
+        printk(KERN_WARNING "PEBS disabled due to CPU errata.\n");
+        x86_pmu.pebs = 0;
+        x86_pmu.pebs_constraints = NULL;
+}
+
+static const struct { int id; char *name; } intel_arch_events_map[] __initconst = {
+        { PERF_COUNT_HW_CPU_CYCLES, "cpu cycles" },
+        { PERF_COUNT_HW_INSTRUCTIONS, "instructions" },
+        { PERF_COUNT_HW_BUS_CYCLES, "bus cycles" },
+        { PERF_COUNT_HW_CACHE_REFERENCES, "cache references" },
+        { PERF_COUNT_HW_CACHE_MISSES, "cache misses" },
+        { PERF_COUNT_HW_BRANCH_INSTRUCTIONS, "branch instructions" },
+        { PERF_COUNT_HW_BRANCH_MISSES, "branch misses" },
+};
+
+static __init void intel_arch_events_quirk(void)
+{
+        int bit;
+
+        /* disable event that reported as not presend by cpuid */
+        for_each_set_bit(bit, x86_pmu.events_mask, ARRAY_SIZE(intel_arch_events_map)) {
+                intel_perfmon_event_map[intel_arch_events_map[bit].id] = 0;
+                printk(KERN_WARNING "CPUID marked event: \'%s\' unavailable\n",
+                                intel_arch_events_map[bit].name);
+        }
+}
+
+static __init void intel_nehalem_quirk(void)
+{
+        union cpuid10_ebx ebx;
+
+        ebx.full = x86_pmu.events_maskl;
+        if (ebx.split.no_branch_misses_retired) {
+                /*
+                 * Erratum AAJ80 detected, we work it around by using
+                 * the BR_MISP_EXEC.ANY event. This will over-count
+                 * branch-misses, but it's still much better than the
+                 * architectural event which is often completely bogus:
+                 */
+                intel_perfmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x7f89;
+                ebx.split.no_branch_misses_retired = 0;
+                x86_pmu.events_maskl = ebx.full;
+                printk(KERN_INFO "CPU erratum AAJ80 worked around\n");
+        }
+}
+
 __init int intel_pmu_init(void)
 {
         union cpuid10_edx edx;
         union cpuid10_eax eax;
+        union cpuid10_ebx ebx;
         unsigned int unused;
-        unsigned int ebx;
         int version;
 
         if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
@@ -1567,8 +1611,8 @@ __init int intel_pmu_init(void)
          * Check whether the Architectural PerfMon supports
          * Branch Misses Retired hw_event or not.
          */
-        cpuid(10, &eax.full, &ebx, &unused, &edx.full);
-        if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
+        cpuid(10, &eax.full, &ebx.full, &unused, &edx.full);
+        if (eax.split.mask_length < ARCH_PERFMON_EVENTS_COUNT)
                 return -ENODEV;
 
         version = eax.split.version_id;
@@ -1582,6 +1626,9 @@ __init int intel_pmu_init(void)
         x86_pmu.cntval_bits             = eax.split.bit_width;
         x86_pmu.cntval_mask             = (1ULL << eax.split.bit_width) - 1;
 
+        x86_pmu.events_maskl            = ebx.full;
+        x86_pmu.events_mask_len         = eax.split.mask_length;
+
         /*
          * Quirk: v2 perfmon does not report fixed-purpose events, so
          * assume at least 3 events:
@@ -1601,6 +1648,8 @@ __init int intel_pmu_init(void)
 
         intel_ds_init();
 
+        x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */
+
         /*
          * Install the hw-cache-events table:
          */
@@ -1610,7 +1659,7 @@ __init int intel_pmu_init(void)
                 break;
 
         case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
-                x86_pmu.quirks = intel_clovertown_quirks;
+                x86_add_quirk(intel_clovertown_quirk);
         case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
         case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
         case 29: /* six-core 45 nm xeon "Dunnington" */
@@ -1644,17 +1693,8 @@ __init int intel_pmu_init(void)
                 /* UOPS_EXECUTED.CORE_ACTIVE_CYCLES,c=1,i=1 */
                 intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x1803fb1;
 
-                if (ebx & 0x40) {
-                        /*
-                         * Erratum AAJ80 detected, we work it around by using
-                         * the BR_MISP_EXEC.ANY event. This will over-count
-                         * branch-misses, but it's still much better than the
-                         * architectural event which is often completely bogus:
-                         */
-                        intel_perfmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x7f89;
+                x86_add_quirk(intel_nehalem_quirk);
 
-                        pr_cont("erratum AAJ80 worked around, ");
-                }
                 pr_cont("Nehalem events, ");
                 break;
 
@@ -1694,6 +1734,7 @@ __init int intel_pmu_init(void)
                 break;
 
         case 42: /* SandyBridge */
+                x86_add_quirk(intel_sandybridge_quirk);
         case 45: /* SandyBridge, "Romely-EP" */
                 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
                        sizeof(hw_cache_event_ids));
@@ -1730,5 +1771,6 @@ __init int intel_pmu_init(void)
                         break;
                 }
         }
+
         return 0;
 }
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index c0d238f49db8..73da6b64f5b7 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
         unsigned long from = cpuc->lbr_entries[0].from;
         unsigned long old_to, to = cpuc->lbr_entries[0].to;
         unsigned long ip = regs->ip;
+        int is_64bit = 0;
 
         /*
          * We don't need to fixup if the PEBS assist is fault like
@@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
                 } else
                         kaddr = (void *)to;
 
-                kernel_insn_init(&insn, kaddr);
+#ifdef CONFIG_X86_64
+                is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
+#endif
+                insn_init(&insn, kaddr, is_64bit);
                 insn_get_length(&insn);
                 to += insn.length;
         } while (to < ip);
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index 492bf1358a7c..ef484d9d0a25 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -1268,7 +1268,7 @@ reserve:
         }
 
 done:
-        return num ? -ENOSPC : 0;
+        return num ? -EINVAL : 0;
 }
 
 static __initconst const struct x86_pmu p4_pmu = {
diff --git a/arch/x86/kernel/cpu/powerflags.c b/arch/x86/kernel/cpu/powerflags.c
index 5abbea297e0c..7b3fe56b1c21 100644
--- a/arch/x86/kernel/cpu/powerflags.c
+++ b/arch/x86/kernel/cpu/powerflags.c
@@ -16,5 +16,6 @@ const char *const x86_power_flags[32] = {
         "100mhzsteps",
         "hwpstate",
         "",     /* tsc invariant mapped to constant_tsc */
-                /* nothing */
+        "cpb",  /* core performance boost */
+        "eff_freq_ro", /* Readonly aperf/mperf */
 };
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 14b23140e81f..8022c6681485 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -64,12 +64,10 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
 static int show_cpuinfo(struct seq_file *m, void *v)
 {
         struct cpuinfo_x86 *c = v;
-        unsigned int cpu = 0;
+        unsigned int cpu;
         int i;
 
-#ifdef CONFIG_SMP
         cpu = c->cpu_index;
-#endif
         seq_printf(m, "processor\t: %u\n"
                    "vendor_id\t: %s\n"
                    "cpu family\t: %d\n"
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index 212a6a42527c..a524353d93f2 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -177,7 +177,7 @@ static struct notifier_block __refdata cpuid_class_cpu_notifier =
         .notifier_call = cpuid_class_cpu_callback,
 };
 
-static char *cpuid_devnode(struct device *dev, mode_t *mode)
+static char *cpuid_devnode(struct device *dev, umode_t *mode)
 {
         return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt));
 }
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index 3b97a80ce329..c99f9ed013d5 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -116,16 +116,16 @@ void show_registers(struct pt_regs *regs)
                 for (i = 0; i < code_len; i++, ip++) {
                         if (ip < (u8 *)PAGE_OFFSET ||
                                         probe_kernel_address(ip, c)) {
-                                printk(" Bad EIP value.");
+                                printk(KERN_CONT " Bad EIP value.");
                                 break;
                         }
                         if (ip == (u8 *)regs->ip)
-                                printk("<%02x> ", c);
+                                printk(KERN_CONT "<%02x> ", c);
                         else
-                                printk("%02x ", c);
+                                printk(KERN_CONT "%02x ", c);
                 }
         }
-        printk("\n");
+        printk(KERN_CONT "\n");
 }
 
 int is_valid_bugaddr(unsigned long ip)
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 19853ad8afc5..6d728d9284bd 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -284,16 +284,16 @@ void show_registers(struct pt_regs *regs)
                 for (i = 0; i < code_len; i++, ip++) {
                         if (ip < (u8 *)PAGE_OFFSET ||
                                         probe_kernel_address(ip, c)) {
-                                printk(" Bad RIP value.");
+                                printk(KERN_CONT " Bad RIP value.");
                                 break;
                         }
                         if (ip == (u8 *)regs->ip)
-                                printk("<%02x> ", c);
+                                printk(KERN_CONT "<%02x> ", c);
                         else
-                                printk("%02x ", c);
+                                printk(KERN_CONT "%02x ", c);
                 }
         }
-        printk("\n");
+        printk(KERN_CONT "\n");
 }
 
 int is_valid_bugaddr(unsigned long ip)
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 303a0e48f076..8071e2f3d6eb 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -738,35 +738,17 @@ core_initcall(e820_mark_nvs_memory);
 /*
  * pre allocated 4k and reserved it in memblock and e820_saved
  */
-u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align)
+u64 __init early_reserve_e820(u64 size, u64 align)
 {
-        u64 size = 0;
         u64 addr;
-        u64 start;
 
-        for (start = startt; ; start += size) {
-                start = memblock_x86_find_in_range_size(start, &size, align);
-                if (start == MEMBLOCK_ERROR)
-                        return 0;
-                if (size >= sizet)
-                        break;
+        addr = __memblock_alloc_base(size, align, MEMBLOCK_ALLOC_ACCESSIBLE);
+        if (addr) {
+                e820_update_range_saved(addr, size, E820_RAM, E820_RESERVED);
+                printk(KERN_INFO "update e820_saved for early_reserve_e820\n");
+                update_e820_saved();
         }
 
-#ifdef CONFIG_X86_32
-        if (start >= MAXMEM)
-                return 0;
-        if (start + size > MAXMEM)
-                size = MAXMEM - start;
-#endif
-
-        addr = round_down(start + size - sizet, align);
-        if (addr < start)
-                return 0;
-        memblock_x86_reserve_range(addr, addr + sizet, "new next");
-        e820_update_range_saved(addr, sizet, E820_RAM, E820_RESERVED);
-        printk(KERN_INFO "update e820_saved for early_reserve_e820\n");
-        update_e820_saved();
-
         return addr;
 }
 
@@ -1090,7 +1072,7 @@ void __init memblock_x86_fill(void)
          * We are safe to enable resizing, beause memblock_x86_fill()
          * is rather later for x86
          */
-        memblock_can_resize = 1;
+        memblock_allow_resize();
 
         for (i = 0; i < e820.nr_map; i++) {
                 struct e820entry *ei = &e820.map[i];
@@ -1105,22 +1087,36 @@ void __init memblock_x86_fill(void)
                 memblock_add(ei->addr, ei->size);
         }
 
-        memblock_analyze();
         memblock_dump_all();
 }
 
 void __init memblock_find_dma_reserve(void)
 {
 #ifdef CONFIG_X86_64
-        u64 free_size_pfn;
-        u64 mem_size_pfn;
+        u64 nr_pages = 0, nr_free_pages = 0;
+        unsigned long start_pfn, end_pfn;
+        phys_addr_t start, end;
+        int i;
+        u64 u;
+
         /*
          * need to find out used area below MAX_DMA_PFN
          * need to use memblock to get free size in [0, MAX_DMA_PFN]
          * at first, and assume boot_mem will not take below MAX_DMA_PFN
          */
-        mem_size_pfn = memblock_x86_memory_in_range(0, MAX_DMA_PFN << PAGE_SHIFT) >> PAGE_SHIFT;
-        free_size_pfn = memblock_x86_free_memory_in_range(0, MAX_DMA_PFN << PAGE_SHIFT) >> PAGE_SHIFT;
-        set_dma_reserve(mem_size_pfn - free_size_pfn);
+        for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
+                start_pfn = min_t(unsigned long, start_pfn, MAX_DMA_PFN);
+                end_pfn = min_t(unsigned long, end_pfn, MAX_DMA_PFN);
+                nr_pages += end_pfn - start_pfn;
+        }
+
+        for_each_free_mem_range(u, MAX_NUMNODES, &start, &end, NULL) {
+                start_pfn = min_t(unsigned long, PFN_UP(start), MAX_DMA_PFN);
+                end_pfn = min_t(unsigned long, PFN_DOWN(end), MAX_DMA_PFN);
+                if (start_pfn < end_pfn)
+                        nr_free_pages += end_pfn - start_pfn;
+        }
+
+        set_dma_reserve(nr_pages - nr_free_pages);
 #endif
 }
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index f3f6f5344001..22d0e21b4dd7 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -625,6 +625,8 @@ work_notifysig:				# deal with pending signals and
         movl %esp, %eax
         jne work_notifysig_v86          # returning to kernel-space or
                                         # vm86-space
+        TRACE_IRQS_ON
+        ENABLE_INTERRUPTS(CLBR_NONE)
         xorl %edx, %edx
         call do_notify_resume
         jmp resume_userspace_sig
@@ -638,6 +640,8 @@ work_notifysig_v86:
 #else
         movl %esp, %eax
 #endif
+        TRACE_IRQS_ON
+        ENABLE_INTERRUPTS(CLBR_NONE)
         xorl %edx, %edx
         call do_notify_resume
         jmp resume_userspace_sig
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index faf8d5e74b0b..a20e1cb9dc87 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -221,7 +221,7 @@ ENDPROC(native_usergs_sysret64)
         /*CFI_REL_OFFSET        ss,0*/
         pushq_cfi %rax /* rsp */
         CFI_REL_OFFSET  rsp,0
-        pushq_cfi $X86_EFLAGS_IF /* eflags - interrupts on */
+        pushq_cfi $(X86_EFLAGS_IF|X86_EFLAGS_BIT1) /* eflags - interrupts on */
         /*CFI_REL_OFFSET        rflags,0*/
         pushq_cfi $__KERNEL_CS /* cs */
         /*CFI_REL_OFFSET        cs,0*/
@@ -411,7 +411,7 @@ ENTRY(ret_from_fork)
         RESTORE_REST
 
         testl $3, CS-ARGOFFSET(%rsp)            # from kernel_thread?
-        je   int_ret_from_sys_call
+        jz   retint_restore_args
 
         testl $_TIF_IA32, TI_flags(%rcx)        # 32-bit compat task needs IRET
         jnz  int_ret_from_sys_call
@@ -465,7 +465,7 @@ ENTRY(system_call)
          * after the swapgs, so that it can do the swapgs
          * for the guest and jump here on syscall.
          */
-ENTRY(system_call_after_swapgs)
+GLOBAL(system_call_after_swapgs)
 
         movq    %rsp,PER_CPU_VAR(old_rsp)
         movq    PER_CPU_VAR(kernel_stack),%rsp
@@ -478,8 +478,7 @@ ENTRY(system_call_after_swapgs)
         movq  %rax,ORIG_RAX-ARGOFFSET(%rsp)
         movq  %rcx,RIP-ARGOFFSET(%rsp)
         CFI_REL_OFFSET rip,RIP-ARGOFFSET
-        GET_THREAD_INFO(%rcx)
-        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%rcx)
+        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jnz tracesys
 system_call_fastpath:
         cmpq $__NR_syscall_max,%rax
@@ -496,10 +495,9 @@ ret_from_sys_call:
         /* edi: flagmask */
 sysret_check:
         LOCKDEP_SYS_EXIT
-        GET_THREAD_INFO(%rcx)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
-        movl TI_flags(%rcx),%edx
+        movl TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET),%edx
         andl %edi,%edx
         jnz  sysret_careful
         CFI_REMEMBER_STATE
@@ -583,7 +581,7 @@ sysret_audit:
         /* Do syscall tracing */
 tracesys:
 #ifdef CONFIG_AUDITSYSCALL
-        testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
+        testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
         jz auditsys
 #endif
         SAVE_REST
@@ -612,8 +610,6 @@ tracesys:
 GLOBAL(int_ret_from_sys_call)
         DISABLE_INTERRUPTS(CLBR_NONE)
         TRACE_IRQS_OFF
-        testl $3,CS-ARGOFFSET(%rsp)
-        je retint_restore_args
         movl $_TIF_ALLWORK_MASK,%edi
         /* edi: mask to check */
 GLOBAL(int_with_check)
@@ -953,6 +949,7 @@ END(common_interrupt)
 ENTRY(\sym)
         INTR_FRAME
         pushq_cfi $~(\num)
+.Lcommon_\sym:
         interrupt \do_sym
         jmp ret_from_intr
         CFI_ENDPROC
@@ -976,13 +973,21 @@ apicinterrupt X86_PLATFORM_IPI_VECTOR \
         x86_platform_ipi smp_x86_platform_ipi
 
 #ifdef CONFIG_SMP
-.irp idx,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15, \
+        ALIGN
+        INTR_FRAME
+.irp idx,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15, \
         16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
 .if NUM_INVALIDATE_TLB_VECTORS > \idx
-apicinterrupt (INVALIDATE_TLB_VECTOR_START)+\idx \
-        invalidate_interrupt\idx smp_invalidate_interrupt
+ENTRY(invalidate_interrupt\idx)
+        pushq_cfi $~(INVALIDATE_TLB_VECTOR_START+\idx)
+        jmp .Lcommon_invalidate_interrupt0
+        CFI_ADJUST_CFA_OFFSET -8
+END(invalidate_interrupt\idx)
 .endif
 .endr
+        CFI_ENDPROC
+apicinterrupt INVALIDATE_TLB_VECTOR_START, \
+        invalidate_interrupt0, smp_invalidate_interrupt
 #endif
 
 apicinterrupt THRESHOLD_APIC_VECTOR \
diff --git a/arch/x86/kernel/head.c b/arch/x86/kernel/head.c
index af0699ba48cf..48d9d4ea1020 100644
--- a/arch/x86/kernel/head.c
+++ b/arch/x86/kernel/head.c
@@ -52,5 +52,5 @@ void __init reserve_ebda_region(void)
                 lowmem = 0x9f000;
 
         /* reserve all memory between lowmem and the 1MB mark */
-        memblock_x86_reserve_range(lowmem, 0x100000, "* BIOS reserved");
+        memblock_reserve(lowmem, 0x100000 - lowmem);
 }
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index 3bb08509a7a1..51ff18616d50 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -31,9 +31,8 @@ static void __init i386_default_early_setup(void)
 
 void __init i386_start_kernel(void)
 {
-        memblock_init();
-
-        memblock_x86_reserve_range(__pa_symbol(&_text), __pa_symbol(&__bss_stop), "TEXT DATA BSS");
+        memblock_reserve(__pa_symbol(&_text),
+                         __pa_symbol(&__bss_stop) - __pa_symbol(&_text));
 
 #ifdef CONFIG_BLK_DEV_INITRD
         /* Reserve INITRD */
@@ -42,7 +41,7 @@ void __init i386_start_kernel(void)
                 u64 ramdisk_image = boot_params.hdr.ramdisk_image;
                 u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
                 u64 ramdisk_end   = PAGE_ALIGN(ramdisk_image + ramdisk_size);
-                memblock_x86_reserve_range(ramdisk_image, ramdisk_end, "RAMDISK");
+                memblock_reserve(ramdisk_image, ramdisk_end - ramdisk_image);
         }
 #endif
 
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 5655c2272adb..3a3b779f41d3 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -98,9 +98,8 @@ void __init x86_64_start_reservations(char *real_mode_data)
 {
         copy_bootdata(__va(real_mode_data));
 
-        memblock_init();
-
-        memblock_x86_reserve_range(__pa_symbol(&_text), __pa_symbol(&__bss_stop), "TEXT DATA BSS");
+        memblock_reserve(__pa_symbol(&_text),
+                         __pa_symbol(&__bss_stop) - __pa_symbol(&_text));
 
 #ifdef CONFIG_BLK_DEV_INITRD
         /* Reserve INITRD */
@@ -109,7 +108,7 @@ void __init x86_64_start_reservations(char *real_mode_data)
                 unsigned long ramdisk_image = boot_params.hdr.ramdisk_image;
                 unsigned long ramdisk_size  = boot_params.hdr.ramdisk_size;
                 unsigned long ramdisk_end   = PAGE_ALIGN(ramdisk_image + ramdisk_size);
-                memblock_x86_reserve_range(ramdisk_image, ramdisk_end, "RAMDISK");
+                memblock_reserve(ramdisk_image, ramdisk_end - ramdisk_image);
         }
 #endif
 
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index b946a9eac7d9..ad0de0c2714e 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -2,7 +2,6 @@
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
 #include <linux/export.h>
-#include <linux/sysdev.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/i8253.h>
@@ -32,8 +31,6 @@
 #define HPET_MIN_CYCLES                 128
 #define HPET_MIN_PROG_DELTA             (HPET_MIN_CYCLES + (HPET_MIN_CYCLES >> 1))
 
-#define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
-
 /*
  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  */
@@ -55,6 +52,11 @@ struct hpet_dev {
         char                            name[10];
 };
 
+inline struct hpet_dev *EVT_TO_HPET_DEV(struct clock_event_device *evtdev)
+{
+        return container_of(evtdev, struct hpet_dev, evt);
+}
+
 inline unsigned int hpet_readl(unsigned int a)
 {
         return readl(hpet_virt_address + a);
@@ -1049,6 +1051,14 @@ int hpet_rtc_timer_init(void)
 }
 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
 
+static void hpet_disable_rtc_channel(void)
+{
+        unsigned long cfg;
+        cfg = hpet_readl(HPET_T1_CFG);
+        cfg &= ~HPET_TN_ENABLE;
+        hpet_writel(cfg, HPET_T1_CFG);
+}
+
 /*
  * The functions below are called from rtc driver.
  * Return 0 if HPET is not being used.
@@ -1060,6 +1070,9 @@ int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
                 return 0;
 
         hpet_rtc_flags &= ~bit_mask;
+        if (unlikely(!hpet_rtc_flags))
+                hpet_disable_rtc_channel();
+
         return 1;
 }
 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
@@ -1125,15 +1138,11 @@ EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
 
 static void hpet_rtc_timer_reinit(void)
 {
-        unsigned int cfg, delta;
+        unsigned int delta;
         int lost_ints = -1;
 
-        if (unlikely(!hpet_rtc_flags)) {
-                cfg = hpet_readl(HPET_T1_CFG);
-                cfg &= ~HPET_TN_ENABLE;
-                hpet_writel(cfg, HPET_T1_CFG);
-                return;
-        }
+        if (unlikely(!hpet_rtc_flags))
+                hpet_disable_rtc_channel();
 
         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
                 delta = hpet_default_delta;
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 429e0c92924e..7943e0c21bde 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -74,6 +74,10 @@ int arch_show_interrupts(struct seq_file *p, int prec)
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
         seq_printf(p, "  IRQ work interrupts\n");
+        seq_printf(p, "%*s: ", prec, "RTR");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count);
+        seq_printf(p, "  APIC ICR read retries\n");
 #endif
         if (x86_platform_ipi_callback) {
                 seq_printf(p, "%*s: ", prec, "PLT");
@@ -136,6 +140,7 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
         sum += irq_stats(cpu)->irq_spurious_count;
         sum += irq_stats(cpu)->apic_perf_irqs;
         sum += irq_stats(cpu)->apic_irq_work_irqs;
+        sum += irq_stats(cpu)->icr_read_retry_count;
 #endif
         if (x86_platform_ipi_callback)
                 sum += irq_stats(cpu)->x86_platform_ipis;
@@ -181,8 +186,8 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
         unsigned vector = ~regs->orig_ax;
         unsigned irq;
 
-        exit_idle();
         irq_enter();
+        exit_idle();
 
         irq = __this_cpu_read(vector_irq[vector]);
 
@@ -209,10 +214,10 @@ void smp_x86_platform_ipi(struct pt_regs *regs)
 
         ack_APIC_irq();
 
-        exit_idle();
-
         irq_enter();
 
+        exit_idle();
+
         inc_irq_stat(x86_platform_ipis);
 
         if (x86_platform_ipi_callback)
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index acf8fbf8fbda..69bca468c47a 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -38,6 +38,9 @@ static inline void stack_overflow_check(struct pt_regs *regs)
 #ifdef CONFIG_DEBUG_STACKOVERFLOW
         u64 curbase = (u64)task_stack_page(current);
 
+        if (user_mode_vm(regs))
+                return;
+
         WARN_ONCE(regs->sp >= curbase &&
                   regs->sp <= curbase + THREAD_SIZE &&
                   regs->sp <  curbase + sizeof(struct thread_info) +
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index b3300e6bacef..313fb5cddbce 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -9,7 +9,7 @@
 #include <linux/kprobes.h>
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/bitops.h>
 #include <linux/acpi.h>
 #include <linux/io.h>
diff --git a/arch/x86/kernel/jump_label.c b/arch/x86/kernel/jump_label.c
index ea9d5f2f13ef..2889b3d43882 100644
--- a/arch/x86/kernel/jump_label.c
+++ b/arch/x86/kernel/jump_label.c
@@ -50,7 +50,7 @@ void arch_jump_label_transform(struct jump_entry *entry,
         put_online_cpus();
 }
 
-void arch_jump_label_transform_static(struct jump_entry *entry,
+__init_or_module void arch_jump_label_transform_static(struct jump_entry *entry,
                                       enum jump_label_type type)
 {
         __jump_label_transform(entry, type, text_poke_early);
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index c1a0188e29ae..44842d756b29 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -74,9 +74,10 @@ static cycle_t kvm_clock_read(void)
         struct pvclock_vcpu_time_info *src;
         cycle_t ret;
 
-        src = &get_cpu_var(hv_clock);
+        preempt_disable_notrace();
+        src = &__get_cpu_var(hv_clock);
         ret = pvclock_clocksource_read(src);
-        put_cpu_var(hv_clock);
+        preempt_enable_notrace();
         return ret;
 }
 
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index d494799aafcd..fe86493f3ed1 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -1,14 +1,18 @@
 /*
  *  AMD CPU Microcode Update Driver for Linux
- *  Copyright (C) 2008 Advanced Micro Devices Inc.
+ *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
  *
  *  Author: Peter Oruba <peter.oruba@amd.com>
  *
  *  Based on work by:
  *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  *
- *  This driver allows to upgrade microcode on AMD
- *  family 0x10 and 0x11 processors.
+ *  Maintainers:
+ *  Andreas Herrmann <andreas.herrmann3@amd.com>
+ *  Borislav Petkov <borislav.petkov@amd.com>
+ *
+ *  This driver allows to upgrade microcode on F10h AMD
+ *  CPUs and later.
  *
  *  Licensed under the terms of the GNU General Public
  *  License version 2. See file COPYING for details.
@@ -71,6 +75,9 @@ struct microcode_amd {
 
 static struct equiv_cpu_entry *equiv_cpu_table;
 
+/* page-sized ucode patch buffer */
+void *patch;
+
 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
 {
         struct cpuinfo_x86 *c = &cpu_data(cpu);
@@ -86,27 +93,76 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
         return 0;
 }
 
-static int get_matching_microcode(int cpu, struct microcode_header_amd *mc_hdr,
-                                  int rev)
+static unsigned int verify_ucode_size(int cpu, u32 patch_size,
+                                      unsigned int size)
 {
-        unsigned int current_cpu_id;
-        u16 equiv_cpu_id = 0;
-        unsigned int i = 0;
+        struct cpuinfo_x86 *c = &cpu_data(cpu);
+        u32 max_size;
+
+#define F1XH_MPB_MAX_SIZE 2048
+#define F14H_MPB_MAX_SIZE 1824
+#define F15H_MPB_MAX_SIZE 4096
+
+        switch (c->x86) {
+        case 0x14:
+                max_size = F14H_MPB_MAX_SIZE;
+                break;
+        case 0x15:
+                max_size = F15H_MPB_MAX_SIZE;
+                break;
+        default:
+                max_size = F1XH_MPB_MAX_SIZE;
+                break;
+        }
+
+        if (patch_size > min_t(u32, size, max_size)) {
+                pr_err("patch size mismatch\n");
+                return 0;
+        }
+
+        return patch_size;
+}
+
+static u16 find_equiv_id(void)
+{
+        unsigned int current_cpu_id, i = 0;
 
         BUG_ON(equiv_cpu_table == NULL);
+
         current_cpu_id = cpuid_eax(0x00000001);
 
         while (equiv_cpu_table[i].installed_cpu != 0) {
-                if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
-                        equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
-                        break;
-                }
+                if (current_cpu_id == equiv_cpu_table[i].installed_cpu)
+                        return equiv_cpu_table[i].equiv_cpu;
+
                 i++;
         }
+        return 0;
+}
 
+/*
+ * we signal a good patch is found by returning its size > 0
+ */
+static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
+                                  unsigned int leftover_size, int rev,
+                                  unsigned int *current_size)
+{
+        struct microcode_header_amd *mc_hdr;
+        unsigned int actual_size;
+        u16 equiv_cpu_id;
+
+        /* size of the current patch we're staring at */
+        *current_size = *(u32 *)(ucode_ptr + 4) + SECTION_HDR_SIZE;
+
+        equiv_cpu_id = find_equiv_id();
         if (!equiv_cpu_id)
                 return 0;
 
+        /*
+         * let's look at the patch header itself now
+         */
+        mc_hdr = (struct microcode_header_amd *)(ucode_ptr + SECTION_HDR_SIZE);
+
         if (mc_hdr->processor_rev_id != equiv_cpu_id)
                 return 0;
 
@@ -120,7 +176,20 @@ static int get_matching_microcode(int cpu, struct microcode_header_amd *mc_hdr,
         if (mc_hdr->patch_id <= rev)
                 return 0;
 
-        return 1;
+        /*
+         * now that the header looks sane, verify its size
+         */
+        actual_size = verify_ucode_size(cpu, *current_size, leftover_size);
+        if (!actual_size)
+                return 0;
+
+        /* clear the patch buffer */
+        memset(patch, 0, PAGE_SIZE);
+
+        /* all looks ok, get the binary patch */
+        get_ucode_data(patch, ucode_ptr + SECTION_HDR_SIZE, actual_size);
+
+        return actual_size;
 }
 
 static int apply_microcode_amd(int cpu)
@@ -155,63 +224,6 @@ static int apply_microcode_amd(int cpu)
         return 0;
 }
 
-static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
-{
-        struct cpuinfo_x86 *c = &cpu_data(cpu);
-        u32 max_size, actual_size;
-
-#define F1XH_MPB_MAX_SIZE 2048
-#define F14H_MPB_MAX_SIZE 1824
-#define F15H_MPB_MAX_SIZE 4096
-
-        switch (c->x86) {
-        case 0x14:
-                max_size = F14H_MPB_MAX_SIZE;
-                break;
-        case 0x15:
-                max_size = F15H_MPB_MAX_SIZE;
-                break;
-        default:
-                max_size = F1XH_MPB_MAX_SIZE;
-                break;
-        }
-
-        actual_size = *(u32 *)(buf + 4);
-
-        if (actual_size + SECTION_HDR_SIZE > size || actual_size > max_size) {
-                pr_err("section size mismatch\n");
-                return 0;
-        }
-
-        return actual_size;
-}
-
-static struct microcode_header_amd *
-get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
-{
-        struct microcode_header_amd *mc = NULL;
-        unsigned int actual_size = 0;
-
-        if (*(u32 *)buf != UCODE_UCODE_TYPE) {
-                pr_err("invalid type field in container file section header\n");
-                goto out;
-        }
-
-        actual_size = verify_ucode_size(cpu, buf, size);
-        if (!actual_size)
-                goto out;
-
-        mc = vzalloc(actual_size);
-        if (!mc)
-                goto out;
-
-        get_ucode_data(mc, buf + SECTION_HDR_SIZE, actual_size);
-        *mc_size = actual_size + SECTION_HDR_SIZE;
-
-out:
-        return mc;
-}
-
 static int install_equiv_cpu_table(const u8 *buf)
 {
         unsigned int *ibuf = (unsigned int *)buf;
@@ -247,36 +259,38 @@ generic_load_microcode(int cpu, const u8 *data, size_t size)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
         struct microcode_header_amd *mc_hdr = NULL;
-        unsigned int mc_size, leftover;
+        unsigned int mc_size, leftover, current_size = 0;
         int offset;
         const u8 *ucode_ptr = data;
         void *new_mc = NULL;
         unsigned int new_rev = uci->cpu_sig.rev;
-        enum ucode_state state = UCODE_OK;
+        enum ucode_state state = UCODE_ERROR;
 
         offset = install_equiv_cpu_table(ucode_ptr);
         if (offset < 0) {
                 pr_err("failed to create equivalent cpu table\n");
-                return UCODE_ERROR;
+                goto out;
         }
-
         ucode_ptr += offset;
         leftover = size - offset;
 
-        while (leftover) {
-                mc_hdr = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
-                if (!mc_hdr)
-                        break;
+        if (*(u32 *)ucode_ptr != UCODE_UCODE_TYPE) {
+                pr_err("invalid type field in container file section header\n");
+                goto free_table;
+        }
 
-                if (get_matching_microcode(cpu, mc_hdr, new_rev)) {
-                        vfree(new_mc);
+        while (leftover) {
+                mc_size = get_matching_microcode(cpu, ucode_ptr, leftover,
+                                                 new_rev, &current_size);
+                if (mc_size) {
+                        mc_hdr  = patch;
+                        new_mc  = patch;
                         new_rev = mc_hdr->patch_id;
-                        new_mc  = mc_hdr;
-                } else
-                        vfree(mc_hdr);
+                        goto out_ok;
+                }
 
-                ucode_ptr += mc_size;
-                leftover  -= mc_size;
+                ucode_ptr += current_size;
+                leftover  -= current_size;
         }
 
         if (!new_mc) {
@@ -284,19 +298,16 @@ generic_load_microcode(int cpu, const u8 *data, size_t size)
                 goto free_table;
         }
 
-        if (!leftover) {
-                vfree(uci->mc);
-                uci->mc = new_mc;
-                pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
-                         cpu, uci->cpu_sig.rev, new_rev);
-        } else {
-                vfree(new_mc);
-                state = UCODE_ERROR;
-        }
+out_ok:
+        uci->mc = new_mc;
+        state = UCODE_OK;
+        pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
+                 cpu, uci->cpu_sig.rev, new_rev);
 
 free_table:
         free_equiv_cpu_table();
 
+out:
         return state;
 }
 
@@ -337,7 +348,6 @@ static void microcode_fini_cpu_amd(int cpu)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
-        vfree(uci->mc);
         uci->mc = NULL;
 }
 
@@ -351,5 +361,14 @@ static struct microcode_ops microcode_amd_ops = {
 
 struct microcode_ops * __init init_amd_microcode(void)
 {
+        patch = (void *)get_zeroed_page(GFP_KERNEL);
+        if (!patch)
+                return NULL;
+
         return &microcode_amd_ops;
 }
+
+void __exit exit_amd_microcode(void)
+{
+        free_page((unsigned long)patch);
+}
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index f2d2a664e797..fda91c307104 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -256,7 +256,7 @@ static int __init microcode_dev_init(void)
         return 0;
 }
 
-static void microcode_dev_exit(void)
+static void __exit microcode_dev_exit(void)
 {
         misc_deregister(&microcode_dev);
 }
@@ -292,8 +292,8 @@ static int reload_for_cpu(int cpu)
         return err;
 }
 
-static ssize_t reload_store(struct sys_device *dev,
-                            struct sysdev_attribute *attr,
+static ssize_t reload_store(struct device *dev,
+                            struct device_attribute *attr,
                             const char *buf, size_t size)
 {
         unsigned long val;
@@ -318,30 +318,30 @@ static ssize_t reload_store(struct sys_device *dev,
         return ret;
 }
 
-static ssize_t version_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t version_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
 
         return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
 }
 
-static ssize_t pf_show(struct sys_device *dev,
-                        struct sysdev_attribute *attr, char *buf)
+static ssize_t pf_show(struct device *dev,
+                        struct device_attribute *attr, char *buf)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
 
         return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
 }
 
-static SYSDEV_ATTR(reload, 0200, NULL, reload_store);
-static SYSDEV_ATTR(version, 0400, version_show, NULL);
-static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL);
+static DEVICE_ATTR(reload, 0200, NULL, reload_store);
+static DEVICE_ATTR(version, 0400, version_show, NULL);
+static DEVICE_ATTR(processor_flags, 0400, pf_show, NULL);
 
 static struct attribute *mc_default_attrs[] = {
-        &attr_reload.attr,
-        &attr_version.attr,
-        &attr_processor_flags.attr,
+        &dev_attr_reload.attr,
+        &dev_attr_version.attr,
+        &dev_attr_processor_flags.attr,
         NULL
 };
 
@@ -405,43 +405,45 @@ static enum ucode_state microcode_update_cpu(int cpu)
         return ustate;
 }
 
-static int mc_sysdev_add(struct sys_device *sys_dev)
+static int mc_device_add(struct device *dev, struct subsys_interface *sif)
 {
-        int err, cpu = sys_dev->id;
+        int err, cpu = dev->id;
 
         if (!cpu_online(cpu))
                 return 0;
 
         pr_debug("CPU%d added\n", cpu);
 
-        err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group);
+        err = sysfs_create_group(&dev->kobj, &mc_attr_group);
         if (err)
                 return err;
 
         if (microcode_init_cpu(cpu) == UCODE_ERROR) {
-                sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
+                sysfs_remove_group(&dev->kobj, &mc_attr_group);
                 return -EINVAL;
         }
 
         return err;
 }
 
-static int mc_sysdev_remove(struct sys_device *sys_dev)
+static int mc_device_remove(struct device *dev, struct subsys_interface *sif)
 {
-        int cpu = sys_dev->id;
+        int cpu = dev->id;
 
         if (!cpu_online(cpu))
                 return 0;
 
         pr_debug("CPU%d removed\n", cpu);
         microcode_fini_cpu(cpu);
-        sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
+        sysfs_remove_group(&dev->kobj, &mc_attr_group);
         return 0;
 }
 
-static struct sysdev_driver mc_sysdev_driver = {
-        .add                    = mc_sysdev_add,
-        .remove                 = mc_sysdev_remove,
+static struct subsys_interface mc_cpu_interface = {
+        .name                   = "microcode",
+        .subsys                 = &cpu_subsys,
+        .add_dev                = mc_device_add,
+        .remove_dev             = mc_device_remove,
 };
 
 /**
@@ -464,9 +466,9 @@ static __cpuinit int
 mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
-        struct sys_device *sys_dev;
+        struct device *dev;
 
-        sys_dev = get_cpu_sysdev(cpu);
+        dev = get_cpu_device(cpu);
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
@@ -474,13 +476,13 @@ mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
         case CPU_DOWN_FAILED:
         case CPU_DOWN_FAILED_FROZEN:
                 pr_debug("CPU%d added\n", cpu);
-                if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group))
+                if (sysfs_create_group(&dev->kobj, &mc_attr_group))
                         pr_err("Failed to create group for CPU%d\n", cpu);
                 break;
         case CPU_DOWN_PREPARE:
         case CPU_DOWN_PREPARE_FROZEN:
                 /* Suspend is in progress, only remove the interface */
-                sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
+                sysfs_remove_group(&dev->kobj, &mc_attr_group);
                 pr_debug("CPU%d removed\n", cpu);
                 break;
 
@@ -519,27 +521,23 @@ static int __init microcode_init(void)
 
         microcode_pdev = platform_device_register_simple("microcode", -1,
                                                          NULL, 0);
-        if (IS_ERR(microcode_pdev)) {
-                microcode_dev_exit();
+        if (IS_ERR(microcode_pdev))
                 return PTR_ERR(microcode_pdev);
-        }
 
         get_online_cpus();
         mutex_lock(&microcode_mutex);
 
-        error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver);
+        error = subsys_interface_register(&mc_cpu_interface);
 
         mutex_unlock(&microcode_mutex);
         put_online_cpus();
 
-        if (error) {
-                platform_device_unregister(microcode_pdev);
-                return error;
-        }
+        if (error)
+                goto out_pdev;
 
         error = microcode_dev_init();
         if (error)
-                return error;
+                goto out_driver;
 
         register_syscore_ops(&mc_syscore_ops);
         register_hotcpu_notifier(&mc_cpu_notifier);
@@ -548,11 +546,27 @@ static int __init microcode_init(void)
                 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
 
         return 0;
+
+out_driver:
+        get_online_cpus();
+        mutex_lock(&microcode_mutex);
+
+        subsys_interface_unregister(&mc_cpu_interface);
+
+        mutex_unlock(&microcode_mutex);
+        put_online_cpus();
+
+out_pdev:
+        platform_device_unregister(microcode_pdev);
+        return error;
+
 }
 module_init(microcode_init);
 
 static void __exit microcode_exit(void)
 {
+        struct cpuinfo_x86 *c = &cpu_data(0);
+
         microcode_dev_exit();
 
         unregister_hotcpu_notifier(&mc_cpu_notifier);
@@ -561,7 +575,7 @@ static void __exit microcode_exit(void)
         get_online_cpus();
         mutex_lock(&microcode_mutex);
 
-        sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
+        subsys_interface_unregister(&mc_cpu_interface);
 
         mutex_unlock(&microcode_mutex);
         put_online_cpus();
@@ -570,6 +584,9 @@ static void __exit microcode_exit(void)
 
         microcode_ops = NULL;
 
+        if (c->x86_vendor == X86_VENDOR_AMD)
+                exit_amd_microcode();
+
         pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
 }
 module_exit(microcode_exit);
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 9103b89c145a..ca470e4c92dc 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
         }
 #endif
 
+        set_bit(m->busid, mp_bus_not_pci);
         if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
-                set_bit(m->busid, mp_bus_not_pci);
 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
                 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
 #endif
@@ -564,9 +564,7 @@ void __init default_get_smp_config(unsigned int early)
 
 static void __init smp_reserve_memory(struct mpf_intel *mpf)
 {
-        unsigned long size = get_mpc_size(mpf->physptr);
-
-        memblock_x86_reserve_range(mpf->physptr, mpf->physptr+size, "* MP-table mpc");
+        memblock_reserve(mpf->physptr, get_mpc_size(mpf->physptr));
 }
 
 static int __init smp_scan_config(unsigned long base, unsigned long length)
@@ -595,7 +593,7 @@ static int __init smp_scan_config(unsigned long base, unsigned long length)
                                mpf, (u64)virt_to_phys(mpf));
 
                         mem = virt_to_phys(mpf);
-                        memblock_x86_reserve_range(mem, mem + sizeof(*mpf), "* MP-table mpf");
+                        memblock_reserve(mem, sizeof(*mpf));
                         if (mpf->physptr)
                                 smp_reserve_memory(mpf);
 
@@ -836,10 +834,8 @@ early_param("alloc_mptable", parse_alloc_mptable_opt);
 
 void __init early_reserve_e820_mpc_new(void)
 {
-        if (enable_update_mptable && alloc_mptable) {
-                u64 startt = 0;
-                mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
-        }
+        if (enable_update_mptable && alloc_mptable)
+                mpc_new_phys = early_reserve_e820(mpc_new_length, 4);
 }
 
 static int __init update_mp_table(void)
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 12fcbe2c143e..96356762a51d 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -236,7 +236,7 @@ static struct notifier_block __refdata msr_class_cpu_notifier = {
         .notifier_call = msr_class_cpu_callback,
 };
 
-static char *msr_devnode(struct device *dev, mode_t *mode)
+static char *msr_devnode(struct device *dev, umode_t *mode)
 {
         return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
 }
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index b9c8628974af..e88f37b58ddd 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -29,6 +29,7 @@
 #include <asm/traps.h>
 #include <asm/mach_traps.h>
 #include <asm/nmi.h>
+#include <asm/x86_init.h>
 
 #define NMI_MAX_NAMELEN 16
 struct nmiaction {
@@ -348,7 +349,7 @@ static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
 
         /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
         raw_spin_lock(&nmi_reason_lock);
-        reason = get_nmi_reason();
+        reason = x86_platform.get_nmi_reason();
 
         if (reason & NMI_REASON_MASK) {
                 if (reason & NMI_REASON_SERR)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index b9b3b1a51643..15763af7bfe3 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -293,7 +293,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
         regs.orig_ax = -1;
         regs.ip = (unsigned long) kernel_thread_helper;
         regs.cs = __KERNEL_CS | get_kernel_rpl();
-        regs.flags = X86_EFLAGS_IF | 0x2;
+        regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
 
         /* Ok, create the new process.. */
         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
@@ -403,6 +403,14 @@ void default_idle(void)
 EXPORT_SYMBOL(default_idle);
 #endif
 
+bool set_pm_idle_to_default(void)
+{
+        bool ret = !!pm_idle;
+
+        pm_idle = default_idle;
+
+        return ret;
+}
 void stop_this_cpu(void *dummy)
 {
         local_irq_disable();
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 795b79f984c2..485204f58cda 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -99,7 +99,8 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
+                rcu_idle_enter();
                 while (!need_resched()) {
 
                         check_pgt_cache();
@@ -116,7 +117,8 @@ void cpu_idle(void)
                                 pm_idle();
                         start_critical_timings();
                 }
-                tick_nohz_restart_sched_tick();
+                rcu_idle_exit();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 3bd7e6eebf31..9b9fe4a85c87 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -122,7 +122,7 @@ void cpu_idle(void)
 
         /* endless idle loop with no priority at all */
         while (1) {
-                tick_nohz_stop_sched_tick(1);
+                tick_nohz_idle_enter();
                 while (!need_resched()) {
 
                         rmb();
@@ -139,8 +139,14 @@ void cpu_idle(void)
                         enter_idle();
                         /* Don't trace irqs off for idle */
                         stop_critical_timings();
+
+                        /* enter_idle() needs rcu for notifiers */
+                        rcu_idle_enter();
+
                         if (cpuidle_idle_call())
                                 pm_idle();
+
+                        rcu_idle_exit();
                         start_critical_timings();
 
                         /* In many cases the interrupt that ended idle
@@ -149,7 +155,7 @@ void cpu_idle(void)
                         __exit_idle();
                 }
 
-                tick_nohz_restart_sched_tick();
+                tick_nohz_idle_exit();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
@@ -293,13 +299,12 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
         memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
 
         if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
-                p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL);
+                p->thread.io_bitmap_ptr = kmemdup(me->thread.io_bitmap_ptr,
+                                                  IO_BITMAP_BYTES, GFP_KERNEL);
                 if (!p->thread.io_bitmap_ptr) {
                         p->thread.io_bitmap_max = 0;
                         return -ENOMEM;
                 }
-                memcpy(p->thread.io_bitmap_ptr, me->thread.io_bitmap_ptr,
-                                IO_BITMAP_BYTES);
                 set_tsk_thread_flag(p, TIF_IO_BITMAP);
         }
 
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 82528799c5de..89a04c7b5bb6 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -749,7 +749,8 @@ put:
 /*
  * Handle PTRACE_POKEUSR calls for the debug register area.
  */
-int ptrace_set_debugreg(struct task_struct *tsk, int n, unsigned long val)
+static int ptrace_set_debugreg(struct task_struct *tsk, int n,
+                               unsigned long val)
 {
         struct thread_struct *thread = &(tsk->thread);
         int rc = 0;
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index b78643d0f9a5..03920a15a632 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -553,4 +553,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
                         quirk_amd_nb_node);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
                         quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F0,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F1,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F2,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F5,
+                        quirk_amd_nb_node);
+
 #endif
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index e334be1182b9..37a458b521a6 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -124,7 +124,7 @@ __setup("reboot=", reboot_setup);
  */
 
 /*
- * Some machines require the "reboot=b"  commandline option,
+ * Some machines require the "reboot=b" or "reboot=k"  commandline options,
  * this quirk makes that automatic.
  */
 static int __init set_bios_reboot(const struct dmi_system_id *d)
@@ -136,6 +136,15 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)
         return 0;
 }
 
+static int __init set_kbd_reboot(const struct dmi_system_id *d)
+{
+        if (reboot_type != BOOT_KBD) {
+                reboot_type = BOOT_KBD;
+                printk(KERN_INFO "%s series board detected. Selecting KBD-method for reboot.\n", d->ident);
+        }
+        return 0;
+}
+
 static struct dmi_system_id __initdata reboot_dmi_table[] = {
         {       /* Handle problems with rebooting on Dell E520's */
                 .callback = set_bios_reboot,
@@ -295,7 +304,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
                 },
         },
         { /* Handle reboot issue on Acer Aspire one */
-                .callback = set_bios_reboot,
+                .callback = set_kbd_reboot,
                 .ident = "Acer Aspire One A110",
                 .matches = {
                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
@@ -443,6 +452,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
                         DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"),
                 },
         },
+        {       /* Handle problems with rebooting on the OptiPlex 990. */
+                .callback = set_pci_reboot,
+                .ident = "Dell OptiPlex 990",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
+                },
+        },
         { }
 };
 
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 348ce016a835..af6db6ec5b2a 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -12,6 +12,7 @@
 #include <asm/vsyscall.h>
 #include <asm/x86_init.h>
 #include <asm/time.h>
+#include <asm/mrst.h>
 
 #ifdef CONFIG_X86_32
 /*
@@ -242,6 +243,10 @@ static __init int add_rtc_cmos(void)
         if (of_have_populated_dt())
                 return 0;
 
+        /* Intel MID platforms don't have ioport rtc */
+        if (mrst_identify_cpu())
+                return -ENODEV;
+
         platform_device_register(&rtc_device);
         dev_info(&rtc_device.dev,
                  "registered platform RTC device (no PNP device found)\n");
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index afaf38447ef5..d05444ac2aea 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -306,7 +306,8 @@ static void __init cleanup_highmap(void)
 static void __init reserve_brk(void)
 {
         if (_brk_end > _brk_start)
-                memblock_x86_reserve_range(__pa(_brk_start), __pa(_brk_end), "BRK");
+                memblock_reserve(__pa(_brk_start),
+                                 __pa(_brk_end) - __pa(_brk_start));
 
         /* Mark brk area as locked down and no longer taking any
            new allocations */
@@ -331,13 +332,13 @@ static void __init relocate_initrd(void)
         ramdisk_here = memblock_find_in_range(0, end_of_lowmem, area_size,
                                          PAGE_SIZE);
 
-        if (ramdisk_here == MEMBLOCK_ERROR)
+        if (!ramdisk_here)
                 panic("Cannot find place for new RAMDISK of size %lld\n",
                          ramdisk_size);
 
         /* Note: this includes all the lowmem currently occupied by
            the initrd, we rely on that fact to keep the data intact. */
-        memblock_x86_reserve_range(ramdisk_here, ramdisk_here + area_size, "NEW RAMDISK");
+        memblock_reserve(ramdisk_here, area_size);
         initrd_start = ramdisk_here + PAGE_OFFSET;
         initrd_end   = initrd_start + ramdisk_size;
         printk(KERN_INFO "Allocated new RAMDISK: %08llx - %08llx\n",
@@ -393,7 +394,7 @@ static void __init reserve_initrd(void)
         initrd_start = 0;
 
         if (ramdisk_size >= (end_of_lowmem>>1)) {
-                memblock_x86_free_range(ramdisk_image, ramdisk_end);
+                memblock_free(ramdisk_image, ramdisk_end - ramdisk_image);
                 printk(KERN_ERR "initrd too large to handle, "
                        "disabling initrd\n");
                 return;
@@ -416,7 +417,7 @@ static void __init reserve_initrd(void)
 
         relocate_initrd();
 
-        memblock_x86_free_range(ramdisk_image, ramdisk_end);
+        memblock_free(ramdisk_image, ramdisk_end - ramdisk_image);
 }
 #else
 static void __init reserve_initrd(void)
@@ -490,15 +491,13 @@ static void __init memblock_x86_reserve_range_setup_data(void)
 {
         struct setup_data *data;
         u64 pa_data;
-        char buf[32];
 
         if (boot_params.hdr.version < 0x0209)
                 return;
         pa_data = boot_params.hdr.setup_data;
         while (pa_data) {
                 data = early_memremap(pa_data, sizeof(*data));
-                sprintf(buf, "setup data %x", data->type);
-                memblock_x86_reserve_range(pa_data, pa_data+sizeof(*data)+data->len, buf);
+                memblock_reserve(pa_data, sizeof(*data) + data->len);
                 pa_data = data->next;
                 early_iounmap(data, sizeof(*data));
         }
@@ -554,7 +553,7 @@ static void __init reserve_crashkernel(void)
                 crash_base = memblock_find_in_range(alignment,
                                CRASH_KERNEL_ADDR_MAX, crash_size, alignment);
 
-                if (crash_base == MEMBLOCK_ERROR) {
+                if (!crash_base) {
                         pr_info("crashkernel reservation failed - No suitable area found.\n");
                         return;
                 }
@@ -568,7 +567,7 @@ static void __init reserve_crashkernel(void)
                         return;
                 }
         }
-        memblock_x86_reserve_range(crash_base, crash_base + crash_size, "CRASH KERNEL");
+        memblock_reserve(crash_base, crash_size);
 
         printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
                         "for crashkernel (System RAM: %ldMB)\n",
@@ -626,7 +625,7 @@ static __init void reserve_ibft_region(void)
         addr = find_ibft_region(&size);
 
         if (size)
-                memblock_x86_reserve_range(addr, addr + size, "* ibft");
+                memblock_reserve(addr, size);
 }
 
 static unsigned reserve_low = CONFIG_X86_RESERVE_LOW << 10;
@@ -1045,6 +1044,8 @@ void __init setup_arch(char **cmdline_p)
 
         x86_init.timers.wallclock_init();
 
+        x86_platform.wallclock_init();
+
         mcheck_init();
 
         arch_init_ideal_nops();
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 9f548cb4a958..e38e21754eea 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -840,7 +840,8 @@ int __cpuinit native_cpu_up(unsigned int cpu)
         pr_debug("++++++++++++++++++++=_---CPU UP  %u\n", cpu);
 
         if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
-            !physid_isset(apicid, phys_cpu_present_map)) {
+            !physid_isset(apicid, phys_cpu_present_map) ||
+            (!x2apic_mode && apicid >= 255)) {
                 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
                 return -EINVAL;
         }
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c
index a91ae7709b49..a73b61055ad6 100644
--- a/arch/x86/kernel/trampoline.c
+++ b/arch/x86/kernel/trampoline.c
@@ -14,11 +14,11 @@ void __init setup_trampolines(void)
 
         /* Has to be in very low memory so we can execute real-mode AP code. */
         mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
-        if (mem == MEMBLOCK_ERROR)
+        if (!mem)
                 panic("Cannot allocate trampoline\n");
 
         x86_trampoline_base = __va(mem);
-        memblock_x86_reserve_range(mem, mem + size, "TRAMPOLINE");
+        memblock_reserve(mem, size);
 
         printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",
                x86_trampoline_base, (unsigned long long)mem, size);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index a8e3eb83466c..fa1191fb679d 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -306,15 +306,10 @@ dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
                         == NOTIFY_STOP)
                 return;
 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
-#ifdef CONFIG_KPROBES
+
         if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
                         == NOTIFY_STOP)
                 return;
-#else
-        if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
-                        == NOTIFY_STOP)
-                return;
-#endif
 
         preempt_conditional_sti(regs);
         do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index db483369f10b..2c9cf0fd78f5 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -35,7 +35,7 @@ static int __read_mostly tsc_unstable;
    erroneous rdtsc usage on !cpu_has_tsc processors */
 static int __read_mostly tsc_disabled = -1;
 
-static int tsc_clocksource_reliable;
+int tsc_clocksource_reliable;
 /*
  * Scheduler clock - returns current time in nanosec units.
  */
@@ -178,11 +178,11 @@ static unsigned long calc_pmtimer_ref(u64 deltatsc, u64 pm1, u64 pm2)
 }
 
 #define CAL_MS          10
-#define CAL_LATCH       (CLOCK_TICK_RATE / (1000 / CAL_MS))
+#define CAL_LATCH       (PIT_TICK_RATE / (1000 / CAL_MS))
 #define CAL_PIT_LOOPS   1000
 
 #define CAL2_MS         50
-#define CAL2_LATCH      (CLOCK_TICK_RATE / (1000 / CAL2_MS))
+#define CAL2_LATCH      (PIT_TICK_RATE / (1000 / CAL2_MS))
 #define CAL2_PIT_LOOPS  5000
 
 
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index 0aa5fed8b9e6..9eba29b46cb7 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -113,7 +113,7 @@ void __cpuinit check_tsc_sync_source(int cpu)
         if (unsynchronized_tsc())
                 return;
 
-        if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
+        if (tsc_clocksource_reliable) {
                 if (cpu == (nr_cpu_ids-1) || system_state != SYSTEM_BOOTING)
                         pr_info(
                         "Skipped synchronization checks as TSC is reliable.\n");
@@ -172,7 +172,7 @@ void __cpuinit check_tsc_sync_target(void)
 {
         int cpus = 2;
 
-        if (unsynchronized_tsc() || boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
+        if (unsynchronized_tsc() || tsc_clocksource_reliable)
                 return;
 
         /*
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index e4d4a22e8b94..b07ba9393564 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -57,7 +57,7 @@ DEFINE_VVAR(struct vsyscall_gtod_data, vsyscall_gtod_data) =
         .lock = __SEQLOCK_UNLOCKED(__vsyscall_gtod_data.lock),
 };
 
-static enum { EMULATE, NATIVE, NONE } vsyscall_mode = NATIVE;
+static enum { EMULATE, NATIVE, NONE } vsyscall_mode = EMULATE;
 
 static int __init vsyscall_setup(char *str)
 {
@@ -140,11 +140,40 @@ static int addr_to_vsyscall_nr(unsigned long addr)
         return nr;
 }
 
+static bool write_ok_or_segv(unsigned long ptr, size_t size)
+{
+        /*
+         * XXX: if access_ok, get_user, and put_user handled
+         * sig_on_uaccess_error, this could go away.
+         */
+
+        if (!access_ok(VERIFY_WRITE, (void __user *)ptr, size)) {
+                siginfo_t info;
+                struct thread_struct *thread = &current->thread;
+
+                thread->error_code      = 6;  /* user fault, no page, write */
+                thread->cr2             = ptr;
+                thread->trap_no         = 14;
+
+                memset(&info, 0, sizeof(info));
+                info.si_signo           = SIGSEGV;
+                info.si_errno           = 0;
+                info.si_code            = SEGV_MAPERR;
+                info.si_addr            = (void __user *)ptr;
+
+                force_sig_info(SIGSEGV, &info, current);
+                return false;
+        } else {
+                return true;
+        }
+}
+
 bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
 {
         struct task_struct *tsk;
         unsigned long caller;
         int vsyscall_nr;
+        int prev_sig_on_uaccess_error;
         long ret;
 
         /*
@@ -180,35 +209,65 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
         if (seccomp_mode(&tsk->seccomp))
                 do_exit(SIGKILL);
 
+        /*
+         * With a real vsyscall, page faults cause SIGSEGV.  We want to
+         * preserve that behavior to make writing exploits harder.
+         */
+        prev_sig_on_uaccess_error = current_thread_info()->sig_on_uaccess_error;
+        current_thread_info()->sig_on_uaccess_error = 1;
+
+        /*
+         * 0 is a valid user pointer (in the access_ok sense) on 32-bit and
+         * 64-bit, so we don't need to special-case it here.  For all the
+         * vsyscalls, 0 means "don't write anything" not "write it at
+         * address 0".
+         */
+        ret = -EFAULT;
         switch (vsyscall_nr) {
         case 0:
+                if (!write_ok_or_segv(regs->di, sizeof(struct timeval)) ||
+                    !write_ok_or_segv(regs->si, sizeof(struct timezone)))
+                        break;
+
                 ret = sys_gettimeofday(
                         (struct timeval __user *)regs->di,
                         (struct timezone __user *)regs->si);
                 break;
 
         case 1:
+                if (!write_ok_or_segv(regs->di, sizeof(time_t)))
+                        break;
+
                 ret = sys_time((time_t __user *)regs->di);
                 break;
 
         case 2:
+                if (!write_ok_or_segv(regs->di, sizeof(unsigned)) ||
+                    !write_ok_or_segv(regs->si, sizeof(unsigned)))
+                        break;
+
                 ret = sys_getcpu((unsigned __user *)regs->di,
                                  (unsigned __user *)regs->si,
                                  0);
                 break;
         }
 
+        current_thread_info()->sig_on_uaccess_error = prev_sig_on_uaccess_error;
+
         if (ret == -EFAULT) {
-                /*
-                 * Bad news -- userspace fed a bad pointer to a vsyscall.
-                 *
-                 * With a real vsyscall, that would have caused SIGSEGV.
-                 * To make writing reliable exploits using the emulated
-                 * vsyscalls harder, generate SIGSEGV here as well.
-                 */
+                /* Bad news -- userspace fed a bad pointer to a vsyscall. */
                 warn_bad_vsyscall(KERN_INFO, regs,
                                   "vsyscall fault (exploit attempt?)");
-                goto sigsegv;
+
+                /*
+                 * If we failed to generate a signal for any reason,
+                 * generate one here.  (This should be impossible.)
+                 */
+                if (WARN_ON_ONCE(!sigismember(&tsk->pending.signal, SIGBUS) &&
+                                 !sigismember(&tsk->pending.signal, SIGSEGV)))
+                        goto sigsegv;
+
+                return true;  /* Don't emulate the ret. */
         }
 
         regs->ax = ret;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 6f164bd5e14d..91f83e21b989 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -21,12 +21,14 @@
 #include <asm/pat.h>
 #include <asm/tsc.h>
 #include <asm/iommu.h>
+#include <asm/mach_traps.h>
 
 void __cpuinit x86_init_noop(void) { }
 void __init x86_init_uint_noop(unsigned int unused) { }
 void __init x86_init_pgd_noop(pgd_t *unused) { }
 int __init iommu_init_noop(void) { return 0; }
 void iommu_shutdown_noop(void) { }
+void wallclock_init_noop(void) { }
 
 /*
  * The platform setup functions are preset with the default functions
@@ -90,6 +92,7 @@ struct x86_init_ops x86_init __initdata = {
 
 struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
         .setup_percpu_clockev           = setup_secondary_APIC_clock,
+        .fixup_cpu_id                   = x86_default_fixup_cpu_id,
 };
 
 static void default_nmi_init(void) { };
@@ -97,11 +100,13 @@ static int default_i8042_detect(void) { return 1; };
 
 struct x86_platform_ops x86_platform = {
         .calibrate_tsc                  = native_calibrate_tsc,
+        .wallclock_init                 = wallclock_init_noop,
         .get_wallclock                  = mach_get_cmos_time,
         .set_wallclock                  = mach_set_rtc_mmss,
         .iommu_shutdown                 = iommu_shutdown_noop,
         .is_untracked_pat_range         = is_ISA_range,
         .nmi_init                       = default_nmi_init,
+        .get_nmi_reason                 = default_get_nmi_reason,
         .i8042_detect                   = default_i8042_detect
 };
 
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 76e3f1cd0369..405f2620392f 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
                 return HRTIMER_NORESTART;
 }
 
-static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
+static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
 {
+        struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
         struct kvm_timer *pt = &ps->pit_timer;
         s64 interval;
 
+        if (!irqchip_in_kernel(kvm))
+                return;
+
         interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
 
         pr_debug("create pit timer, interval is %llu nsec\n", interval);
@@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
         /* FIXME: enhance mode 4 precision */
         case 4:
                 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
-                        create_pit_timer(ps, val, 0);
+                        create_pit_timer(kvm, val, 0);
                 }
                 break;
         case 2:
         case 3:
                 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
-                        create_pit_timer(ps, val, 1);
+                        create_pit_timer(kvm, val, 1);
                 }
                 break;
         default:
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a0d6bd9ad442..579a0b51696a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -39,6 +39,7 @@
 #include <asm/mce.h>
 #include <asm/i387.h>
 #include <asm/xcr.h>
+#include <asm/perf_event.h>
 
 #include "trace.h"
 
@@ -118,7 +119,7 @@ module_param(ple_gap, int, S_IRUGO);
 static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW;
 module_param(ple_window, int, S_IRUGO);
 
-#define NR_AUTOLOAD_MSRS 1
+#define NR_AUTOLOAD_MSRS 8
 #define VMCS02_POOL_SIZE 1
 
 struct vmcs {
@@ -622,6 +623,7 @@ static unsigned long *vmx_msr_bitmap_legacy;
 static unsigned long *vmx_msr_bitmap_longmode;
 
 static bool cpu_has_load_ia32_efer;
+static bool cpu_has_load_perf_global_ctrl;
 
 static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
 static DEFINE_SPINLOCK(vmx_vpid_lock);
@@ -1191,15 +1193,34 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
         vmcs_write32(EXCEPTION_BITMAP, eb);
 }
 
+static void clear_atomic_switch_msr_special(unsigned long entry,
+                unsigned long exit)
+{
+        vmcs_clear_bits(VM_ENTRY_CONTROLS, entry);
+        vmcs_clear_bits(VM_EXIT_CONTROLS, exit);
+}
+
 static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
 {
         unsigned i;
         struct msr_autoload *m = &vmx->msr_autoload;
 
-        if (msr == MSR_EFER && cpu_has_load_ia32_efer) {
-                vmcs_clear_bits(VM_ENTRY_CONTROLS, VM_ENTRY_LOAD_IA32_EFER);
-                vmcs_clear_bits(VM_EXIT_CONTROLS, VM_EXIT_LOAD_IA32_EFER);
-                return;
+        switch (msr) {
+        case MSR_EFER:
+                if (cpu_has_load_ia32_efer) {
+                        clear_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
+                                        VM_EXIT_LOAD_IA32_EFER);
+                        return;
+                }
+                break;
+        case MSR_CORE_PERF_GLOBAL_CTRL:
+                if (cpu_has_load_perf_global_ctrl) {
+                        clear_atomic_switch_msr_special(
+                                        VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
+                                        VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
+                        return;
+                }
+                break;
         }
 
         for (i = 0; i < m->nr; ++i)
@@ -1215,25 +1236,55 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
 }
 
+static void add_atomic_switch_msr_special(unsigned long entry,
+                unsigned long exit, unsigned long guest_val_vmcs,
+                unsigned long host_val_vmcs, u64 guest_val, u64 host_val)
+{
+        vmcs_write64(guest_val_vmcs, guest_val);
+        vmcs_write64(host_val_vmcs, host_val);
+        vmcs_set_bits(VM_ENTRY_CONTROLS, entry);
+        vmcs_set_bits(VM_EXIT_CONTROLS, exit);
+}
+
 static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
                                   u64 guest_val, u64 host_val)
 {
         unsigned i;
         struct msr_autoload *m = &vmx->msr_autoload;
 
-        if (msr == MSR_EFER && cpu_has_load_ia32_efer) {
-                vmcs_write64(GUEST_IA32_EFER, guest_val);
-                vmcs_write64(HOST_IA32_EFER, host_val);
-                vmcs_set_bits(VM_ENTRY_CONTROLS, VM_ENTRY_LOAD_IA32_EFER);
-                vmcs_set_bits(VM_EXIT_CONTROLS, VM_EXIT_LOAD_IA32_EFER);
-                return;
+        switch (msr) {
+        case MSR_EFER:
+                if (cpu_has_load_ia32_efer) {
+                        add_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
+                                        VM_EXIT_LOAD_IA32_EFER,
+                                        GUEST_IA32_EFER,
+                                        HOST_IA32_EFER,
+                                        guest_val, host_val);
+                        return;
+                }
+                break;
+        case MSR_CORE_PERF_GLOBAL_CTRL:
+                if (cpu_has_load_perf_global_ctrl) {
+                        add_atomic_switch_msr_special(
+                                        VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
+                                        VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL,
+                                        GUEST_IA32_PERF_GLOBAL_CTRL,
+                                        HOST_IA32_PERF_GLOBAL_CTRL,
+                                        guest_val, host_val);
+                        return;
+                }
+                break;
         }
 
         for (i = 0; i < m->nr; ++i)
                 if (m->guest[i].index == msr)
                         break;
 
-        if (i == m->nr) {
+        if (i == NR_AUTOLOAD_MSRS) {
+                printk_once(KERN_WARNING"Not enough mst switch entries. "
+                                "Can't add msr %x\n", msr);
+                return;
+        } else if (i == m->nr) {
                 ++m->nr;
                 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
                 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
@@ -2455,6 +2506,42 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
                 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
                                    VM_EXIT_LOAD_IA32_EFER);
 
+        cpu_has_load_perf_global_ctrl =
+                allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
+                                VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
+                && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
+                                   VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
+
+        /*
+         * Some cpus support VM_ENTRY_(LOAD|SAVE)_IA32_PERF_GLOBAL_CTRL
+         * but due to arrata below it can't be used. Workaround is to use
+         * msr load mechanism to switch IA32_PERF_GLOBAL_CTRL.
+         *
+         * VM Exit May Incorrectly Clear IA32_PERF_GLOBAL_CTRL [34:32]
+         *
+         * AAK155             (model 26)
+         * AAP115             (model 30)
+         * AAT100             (model 37)
+         * BC86,AAY89,BD102   (model 44)
+         * BA97               (model 46)
+         *
+         */
+        if (cpu_has_load_perf_global_ctrl && boot_cpu_data.x86 == 0x6) {
+                switch (boot_cpu_data.x86_model) {
+                case 26:
+                case 30:
+                case 37:
+                case 44:
+                case 46:
+                        cpu_has_load_perf_global_ctrl = false;
+                        printk_once(KERN_WARNING"kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL "
+                                        "does not work properly. Using workaround\n");
+                        break;
+                default:
+                        break;
+                }
+        }
+
         return 0;
 }
 
@@ -5968,6 +6055,24 @@ static void vmx_cancel_injection(struct kvm_vcpu *vcpu)
         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);
 }
 
+static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx)
+{
+        int i, nr_msrs;
+        struct perf_guest_switch_msr *msrs;
+
+        msrs = perf_guest_get_msrs(&nr_msrs);
+
+        if (!msrs)
+                return;
+
+        for (i = 0; i < nr_msrs; i++)
+                if (msrs[i].host == msrs[i].guest)
+                        clear_atomic_switch_msr(vmx, msrs[i].msr);
+                else
+                        add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest,
+                                        msrs[i].host);
+}
+
 #ifdef CONFIG_X86_64
 #define R "r"
 #define Q "q"
@@ -6017,6 +6122,8 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
                 vmx_set_interrupt_shadow(vcpu, 0);
 
+        atomic_switch_perf_msrs(vmx);
+
         vmx->__launched = vmx->loaded_vmcs->launched;
         asm(
                 /* Store host registers */
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c38efd7b792e..4c938da2ba00 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
 {
         struct kvm_cpuid_entry2 *best;
         struct kvm_lapic *apic = vcpu->arch.apic;
-        u32 timer_mode_mask;
 
         best = kvm_find_cpuid_entry(vcpu, 1, 0);
         if (!best)
@@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
         }
 
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
-                best->function == 0x1) {
-                best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER);
-                timer_mode_mask = 3 << 17;
-        } else
-                timer_mode_mask = 1 << 17;
-
-        if (apic)
-                apic->lapic_timer.timer_mode_mask = timer_mode_mask;
+        if (apic) {
+                if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
+                        apic->lapic_timer.timer_mode_mask = 3 << 17;
+                else
+                        apic->lapic_timer.timer_mode_mask = 1 << 17;
+        }
 }
 
 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
@@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_TSC_CONTROL:
                 r = kvm_has_tsc_control;
                 break;
+        case KVM_CAP_TSC_DEADLINE_TIMER:
+                r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
+                break;
         default:
                 r = 0;
                 break;
diff --git a/arch/x86/lib/inat.c b/arch/x86/lib/inat.c
index 46fc4ee09fc4..88ad5fbda6e1 100644
--- a/arch/x86/lib/inat.c
+++ b/arch/x86/lib/inat.c
@@ -82,9 +82,16 @@ insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m,
         const insn_attr_t *table;
         if (vex_m > X86_VEX_M_MAX || vex_p > INAT_LSTPFX_MAX)
                 return 0;
-        table = inat_avx_tables[vex_m][vex_p];
+        /* At first, this checks the master table */
+        table = inat_avx_tables[vex_m][0];
         if (!table)
                 return 0;
+        if (!inat_is_group(table[opcode]) && vex_p) {
+                /* If this is not a group, get attribute directly */
+                table = inat_avx_tables[vex_m][vex_p];
+                if (!table)
+                        return 0;
+        }
         return table[opcode];
 }
 
diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c
index 374562ed6704..5a1f9f3e3fbb 100644
--- a/arch/x86/lib/insn.c
+++ b/arch/x86/lib/insn.c
@@ -202,7 +202,7 @@ void insn_get_opcode(struct insn *insn)
                 m = insn_vex_m_bits(insn);
                 p = insn_vex_p_bits(insn);
                 insn->attr = inat_get_avx_attribute(op, m, p);
-                if (!inat_accept_vex(insn->attr))
+                if (!inat_accept_vex(insn->attr) && !inat_is_group(insn->attr))
                         insn->attr = 0; /* This instruction is bad */
                 goto end;       /* VEX has only 1 byte for opcode */
         }
@@ -249,6 +249,8 @@ void insn_get_modrm(struct insn *insn)
                         pfx = insn_last_prefix(insn);
                         insn->attr = inat_get_group_attribute(mod, pfx,
                                                               insn->attr);
+                        if (insn_is_avx(insn) && !inat_accept_vex(insn->attr))
+                                insn->attr = 0; /* This is bad */
                 }
         }
 
diff --git a/arch/x86/lib/string_32.c b/arch/x86/lib/string_32.c
index 82004d2bf05e..bd59090825db 100644
--- a/arch/x86/lib/string_32.c
+++ b/arch/x86/lib/string_32.c
@@ -164,15 +164,13 @@ EXPORT_SYMBOL(strchr);
 size_t strlen(const char *s)
 {
         int d0;
-        int res;
+        size_t res;
         asm volatile("repne\n\t"
-                "scasb\n\t"
-                "notl %0\n\t"
-                "decl %0"
+                "scasb"
                 : "=c" (res), "=&D" (d0)
                 : "1" (s), "a" (0), "0" (0xffffffffu)
                 : "memory");
-        return res;
+        return ~res - 1;
 }
 EXPORT_SYMBOL(strlen);
 #endif
diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
index a793da5e560e..5b83c51c12e0 100644
--- a/arch/x86/lib/x86-opcode-map.txt
+++ b/arch/x86/lib/x86-opcode-map.txt
@@ -1,5 +1,11 @@
 # x86 Opcode Maps
 #
+# This is (mostly) based on following documentations.
+# - Intel(R) 64 and IA-32 Architectures Software Developer's Manual Vol.2
+#   (#325383-040US, October 2011)
+# - Intel(R) Advanced Vector Extensions Programming Reference
+#   (#319433-011,JUNE 2011).
+#
 #<Opcode maps>
 # Table: table-name
 # Referrer: escaped-name
@@ -15,10 +21,13 @@
 # EndTable
 #
 # AVX Superscripts
-#  (VEX): this opcode can accept VEX prefix.
-#  (oVEX): this opcode requires VEX prefix.
-#  (o128): this opcode only supports 128bit VEX.
-#  (o256): this opcode only supports 256bit VEX.
+#  (v): this opcode requires VEX prefix.
+#  (v1): this opcode only supports 128bit VEX.
+#
+# Last Prefix Superscripts
+#  - (66): the last prefix is 0x66
+#  - (F3): the last prefix is 0xF3
+#  - (F2): the last prefix is 0xF2
 #
 
 Table: one byte opcode
@@ -199,8 +208,8 @@ a0: MOV AL,Ob
 a1: MOV rAX,Ov
 a2: MOV Ob,AL
 a3: MOV Ov,rAX
-a4: MOVS/B Xb,Yb
-a5: MOVS/W/D/Q Xv,Yv
+a4: MOVS/B Yb,Xb
+a5: MOVS/W/D/Q Yv,Xv
 a6: CMPS/B Xb,Yb
 a7: CMPS/W/D Xv,Yv
 a8: TEST AL,Ib
@@ -233,8 +242,8 @@ c0: Grp2 Eb,Ib (1A)
 c1: Grp2 Ev,Ib (1A)
 c2: RETN Iw (f64)
 c3: RETN
-c4: LES Gz,Mp (i64) | 3bytes-VEX (Prefix)
-c5: LDS Gz,Mp (i64) | 2bytes-VEX (Prefix)
+c4: LES Gz,Mp (i64) | VEX+2byte (Prefix)
+c5: LDS Gz,Mp (i64) | VEX+1byte (Prefix)
 c6: Grp11 Eb,Ib (1A)
 c7: Grp11 Ev,Iz (1A)
 c8: ENTER Iw,Ib
@@ -320,14 +329,19 @@ AVXcode: 1
 # 3DNow! uses the last imm byte as opcode extension.
 0f: 3DNow! Pq,Qq,Ib
 # 0x0f 0x10-0x1f
-10: movups Vps,Wps (VEX) | movss Vss,Wss (F3),(VEX),(o128) | movupd Vpd,Wpd (66),(VEX) | movsd Vsd,Wsd (F2),(VEX),(o128)
-11: movups Wps,Vps (VEX) | movss Wss,Vss (F3),(VEX),(o128) | movupd Wpd,Vpd (66),(VEX) | movsd Wsd,Vsd (F2),(VEX),(o128)
-12: movlps Vq,Mq (VEX),(o128) | movlpd Vq,Mq (66),(VEX),(o128) | movhlps Vq,Uq (VEX),(o128) | movddup Vq,Wq (F2),(VEX) | movsldup Vq,Wq (F3),(VEX)
-13: mpvlps Mq,Vq (VEX),(o128) | movlpd Mq,Vq (66),(VEX),(o128)
-14: unpcklps Vps,Wq (VEX) | unpcklpd Vpd,Wq (66),(VEX)
-15: unpckhps Vps,Wq (VEX) | unpckhpd Vpd,Wq (66),(VEX)
-16: movhps Vq,Mq (VEX),(o128) | movhpd Vq,Mq (66),(VEX),(o128) | movlsps Vq,Uq (VEX),(o128) | movshdup Vq,Wq (F3),(VEX)
-17: movhps Mq,Vq (VEX),(o128) | movhpd Mq,Vq (66),(VEX),(o128)
+# NOTE: According to Intel SDM opcode map, vmovups and vmovupd has no operands
+# but it actually has operands. And also, vmovss and vmovsd only accept 128bit.
+# MOVSS/MOVSD has too many forms(3) on SDM. This map just shows a typical form.
+# Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
+# Reference A.1
+10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
+11: vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
+12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (F3) | vmovddup Vx,Wx (F2)
+13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
+14: vunpcklps Vx,Hx,Wx | vunpcklpd Vx,Hx,Wx (66)
+15: vunpckhps Vx,Hx,Wx | vunpckhpd Vx,Hx,Wx (66)
+16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,Wx (F3)
+17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
 18: Grp16 (1A)
 19:
 1a:
@@ -345,14 +359,14 @@ AVXcode: 1
 25:
 26:
 27:
-28: movaps Vps,Wps (VEX) | movapd Vpd,Wpd (66),(VEX)
-29: movaps Wps,Vps (VEX) | movapd Wpd,Vpd (66),(VEX)
-2a: cvtpi2ps Vps,Qpi | cvtsi2ss Vss,Ed/q (F3),(VEX),(o128) | cvtpi2pd Vpd,Qpi (66) | cvtsi2sd Vsd,Ed/q (F2),(VEX),(o128)
-2b: movntps Mps,Vps (VEX) | movntpd Mpd,Vpd (66),(VEX)
-2c: cvttps2pi Ppi,Wps | cvttss2si  Gd/q,Wss (F3),(VEX),(o128) | cvttpd2pi Ppi,Wpd (66) | cvttsd2si Gd/q,Wsd (F2),(VEX),(o128)
-2d: cvtps2pi Ppi,Wps | cvtss2si Gd/q,Wss (F3),(VEX),(o128) | cvtpd2pi Qpi,Wpd (66) | cvtsd2si Gd/q,Wsd (F2),(VEX),(o128)
-2e: ucomiss Vss,Wss (VEX),(o128) | ucomisd  Vsd,Wsd (66),(VEX),(o128)
-2f: comiss Vss,Wss (VEX),(o128) | comisd  Vsd,Wsd (66),(VEX),(o128)
+28: vmovaps Vps,Wps | vmovapd Vpd,Wpd (66)
+29: vmovaps Wps,Vps | vmovapd Wpd,Vpd (66)
+2a: cvtpi2ps Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
+2b: vmovntps Mps,Vps | vmovntpd Mpd,Vpd (66)
+2c: cvttps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
+2d: cvtps2pi Ppi,Wps | cvtpd2pi Qpi,Wpd (66) | vcvtss2si Gy,Wss (F3),(v1) | vcvtsd2si Gy,Wsd (F2),(v1)
+2e: vucomiss Vss,Wss (v1) | vucomisd  Vsd,Wsd (66),(v1)
+2f: vcomiss Vss,Wss (v1) | vcomisd  Vsd,Wsd (66),(v1)
 # 0x0f 0x30-0x3f
 30: WRMSR
 31: RDTSC
@@ -388,65 +402,66 @@ AVXcode: 1
 4e: CMOVLE/NG Gv,Ev
 4f: CMOVNLE/G Gv,Ev
 # 0x0f 0x50-0x5f
-50: movmskps Gd/q,Ups (VEX) | movmskpd Gd/q,Upd (66),(VEX)
-51: sqrtps Vps,Wps (VEX) | sqrtss Vss,Wss (F3),(VEX),(o128) | sqrtpd Vpd,Wpd (66),(VEX) | sqrtsd Vsd,Wsd (F2),(VEX),(o128)
-52: rsqrtps Vps,Wps (VEX) | rsqrtss Vss,Wss (F3),(VEX),(o128)
-53: rcpps Vps,Wps (VEX) | rcpss Vss,Wss (F3),(VEX),(o128)
-54: andps Vps,Wps (VEX) | andpd Vpd,Wpd (66),(VEX)
-55: andnps Vps,Wps (VEX) | andnpd Vpd,Wpd (66),(VEX)
-56: orps Vps,Wps (VEX) | orpd Vpd,Wpd (66),(VEX)
-57: xorps Vps,Wps (VEX) | xorpd Vpd,Wpd (66),(VEX)
-58: addps Vps,Wps (VEX) | addss Vss,Wss (F3),(VEX),(o128) | addpd Vpd,Wpd (66),(VEX) | addsd Vsd,Wsd (F2),(VEX),(o128)
-59: mulps Vps,Wps (VEX) | mulss Vss,Wss (F3),(VEX),(o128) | mulpd Vpd,Wpd (66),(VEX) | mulsd Vsd,Wsd (F2),(VEX),(o128)
-5a: cvtps2pd Vpd,Wps (VEX) | cvtss2sd Vsd,Wss (F3),(VEX),(o128) | cvtpd2ps Vps,Wpd (66),(VEX) | cvtsd2ss Vsd,Wsd (F2),(VEX),(o128)
-5b: cvtdq2ps Vps,Wdq (VEX) | cvtps2dq Vdq,Wps (66),(VEX) | cvttps2dq Vdq,Wps (F3),(VEX)
-5c: subps Vps,Wps (VEX) | subss Vss,Wss (F3),(VEX),(o128) | subpd Vpd,Wpd (66),(VEX) | subsd Vsd,Wsd (F2),(VEX),(o128)
-5d: minps Vps,Wps (VEX) | minss Vss,Wss (F3),(VEX),(o128) | minpd Vpd,Wpd (66),(VEX) | minsd Vsd,Wsd (F2),(VEX),(o128)
-5e: divps Vps,Wps (VEX) | divss Vss,Wss (F3),(VEX),(o128) | divpd Vpd,Wpd (66),(VEX) | divsd Vsd,Wsd (F2),(VEX),(o128)
-5f: maxps Vps,Wps (VEX) | maxss Vss,Wss (F3),(VEX),(o128) | maxpd Vpd,Wpd (66),(VEX) | maxsd Vsd,Wsd (F2),(VEX),(o128)
+50: vmovmskps Gy,Ups | vmovmskpd Gy,Upd (66)
+51: vsqrtps Vps,Wps | vsqrtpd Vpd,Wpd (66) | vsqrtss Vss,Hss,Wss (F3),(v1) | vsqrtsd Vsd,Hsd,Wsd (F2),(v1)
+52: vrsqrtps Vps,Wps | vrsqrtss Vss,Hss,Wss (F3),(v1)
+53: vrcpps Vps,Wps | vrcpss Vss,Hss,Wss (F3),(v1)
+54: vandps Vps,Hps,Wps | vandpd Vpd,Hpd,Wpd (66)
+55: vandnps Vps,Hps,Wps | vandnpd Vpd,Hpd,Wpd (66)
+56: vorps Vps,Hps,Wps | vorpd Vpd,Hpd,Wpd (66)
+57: vxorps Vps,Hps,Wps | vxorpd Vpd,Hpd,Wpd (66)
+58: vaddps Vps,Hps,Wps | vaddpd Vpd,Hpd,Wpd (66) | vaddss Vss,Hss,Wss (F3),(v1) | vaddsd Vsd,Hsd,Wsd (F2),(v1)
+59: vmulps Vps,Hps,Wps | vmulpd Vpd,Hpd,Wpd (66) | vmulss Vss,Hss,Wss (F3),(v1) | vmulsd Vsd,Hsd,Wsd (F2),(v1)
+5a: vcvtps2pd Vpd,Wps | vcvtpd2ps Vps,Wpd (66) | vcvtss2sd Vsd,Hx,Wss (F3),(v1) | vcvtsd2ss Vss,Hx,Wsd (F2),(v1)
+5b: vcvtdq2ps Vps,Wdq | vcvtps2dq Vdq,Wps (66) | vcvttps2dq Vdq,Wps (F3)
+5c: vsubps Vps,Hps,Wps | vsubpd Vpd,Hpd,Wpd (66) | vsubss Vss,Hss,Wss (F3),(v1) | vsubsd Vsd,Hsd,Wsd (F2),(v1)
+5d: vminps Vps,Hps,Wps | vminpd Vpd,Hpd,Wpd (66) | vminss Vss,Hss,Wss (F3),(v1) | vminsd Vsd,Hsd,Wsd (F2),(v1)
+5e: vdivps Vps,Hps,Wps | vdivpd Vpd,Hpd,Wpd (66) | vdivss Vss,Hss,Wss (F3),(v1) | vdivsd Vsd,Hsd,Wsd (F2),(v1)
+5f: vmaxps Vps,Hps,Wps | vmaxpd Vpd,Hpd,Wpd (66) | vmaxss Vss,Hss,Wss (F3),(v1) | vmaxsd Vsd,Hsd,Wsd (F2),(v1)
 # 0x0f 0x60-0x6f
-60: punpcklbw Pq,Qd | punpcklbw Vdq,Wdq (66),(VEX),(o128)
-61: punpcklwd Pq,Qd | punpcklwd Vdq,Wdq (66),(VEX),(o128)
-62: punpckldq Pq,Qd | punpckldq Vdq,Wdq (66),(VEX),(o128)
-63: packsswb Pq,Qq | packsswb Vdq,Wdq (66),(VEX),(o128)
-64: pcmpgtb Pq,Qq | pcmpgtb Vdq,Wdq (66),(VEX),(o128)
-65: pcmpgtw Pq,Qq | pcmpgtw Vdq,Wdq (66),(VEX),(o128)
-66: pcmpgtd Pq,Qq | pcmpgtd Vdq,Wdq (66),(VEX),(o128)
-67: packuswb Pq,Qq | packuswb Vdq,Wdq (66),(VEX),(o128)
-68: punpckhbw Pq,Qd | punpckhbw Vdq,Wdq (66),(VEX),(o128)
-69: punpckhwd Pq,Qd | punpckhwd Vdq,Wdq (66),(VEX),(o128)
-6a: punpckhdq Pq,Qd | punpckhdq Vdq,Wdq (66),(VEX),(o128)
-6b: packssdw Pq,Qd | packssdw Vdq,Wdq (66),(VEX),(o128)
-6c: punpcklqdq Vdq,Wdq (66),(VEX),(o128)
-6d: punpckhqdq Vdq,Wdq (66),(VEX),(o128)
-6e: movd/q/ Pd,Ed/q | movd/q Vdq,Ed/q (66),(VEX),(o128)
-6f: movq Pq,Qq | movdqa Vdq,Wdq (66),(VEX) | movdqu Vdq,Wdq (F3),(VEX)
+60: punpcklbw Pq,Qd | vpunpcklbw Vx,Hx,Wx (66),(v1)
+61: punpcklwd Pq,Qd | vpunpcklwd Vx,Hx,Wx (66),(v1)
+62: punpckldq Pq,Qd | vpunpckldq Vx,Hx,Wx (66),(v1)
+63: packsswb Pq,Qq | vpacksswb Vx,Hx,Wx (66),(v1)
+64: pcmpgtb Pq,Qq | vpcmpgtb Vx,Hx,Wx (66),(v1)
+65: pcmpgtw Pq,Qq | vpcmpgtw Vx,Hx,Wx (66),(v1)
+66: pcmpgtd Pq,Qq | vpcmpgtd Vx,Hx,Wx (66),(v1)
+67: packuswb Pq,Qq | vpackuswb Vx,Hx,Wx (66),(v1)
+68: punpckhbw Pq,Qd | vpunpckhbw Vx,Hx,Wx (66),(v1)
+69: punpckhwd Pq,Qd | vpunpckhwd Vx,Hx,Wx (66),(v1)
+6a: punpckhdq Pq,Qd | vpunpckhdq Vx,Hx,Wx (66),(v1)
+6b: packssdw Pq,Qd | vpackssdw Vx,Hx,Wx (66),(v1)
+6c: vpunpcklqdq Vx,Hx,Wx (66),(v1)
+6d: vpunpckhqdq Vx,Hx,Wx (66),(v1)
+6e: movd/q Pd,Ey | vmovd/q Vy,Ey (66),(v1)
+6f: movq Pq,Qq | vmovdqa Vx,Wx (66) | vmovdqu Vx,Wx (F3)
 # 0x0f 0x70-0x7f
-70: pshufw Pq,Qq,Ib | pshufd Vdq,Wdq,Ib (66),(VEX),(o128) | pshufhw Vdq,Wdq,Ib (F3),(VEX),(o128) | pshuflw VdqWdq,Ib (F2),(VEX),(o128)
+70: pshufw Pq,Qq,Ib | vpshufd Vx,Wx,Ib (66),(v1) | vpshufhw Vx,Wx,Ib (F3),(v1) | vpshuflw Vx,Wx,Ib (F2),(v1)
 71: Grp12 (1A)
 72: Grp13 (1A)
 73: Grp14 (1A)
-74: pcmpeqb Pq,Qq | pcmpeqb Vdq,Wdq (66),(VEX),(o128)
-75: pcmpeqw Pq,Qq | pcmpeqw Vdq,Wdq (66),(VEX),(o128)
-76: pcmpeqd Pq,Qq | pcmpeqd Vdq,Wdq (66),(VEX),(o128)
-77: emms/vzeroupper/vzeroall (VEX)
-78: VMREAD Ed/q,Gd/q
-79: VMWRITE Gd/q,Ed/q
+74: pcmpeqb Pq,Qq | vpcmpeqb Vx,Hx,Wx (66),(v1)
+75: pcmpeqw Pq,Qq | vpcmpeqw Vx,Hx,Wx (66),(v1)
+76: pcmpeqd Pq,Qq | vpcmpeqd Vx,Hx,Wx (66),(v1)
+# Note: Remove (v), because vzeroall and vzeroupper becomes emms without VEX.
+77: emms | vzeroupper | vzeroall
+78: VMREAD Ey,Gy
+79: VMWRITE Gy,Ey
 7a:
 7b:
-7c: haddps Vps,Wps (F2),(VEX) | haddpd Vpd,Wpd (66),(VEX)
-7d: hsubps Vps,Wps (F2),(VEX) | hsubpd Vpd,Wpd (66),(VEX)
-7e: movd/q Ed/q,Pd | movd/q Ed/q,Vdq (66),(VEX),(o128) | movq Vq,Wq (F3),(VEX),(o128)
-7f: movq Qq,Pq | movdqa Wdq,Vdq (66),(VEX) | movdqu Wdq,Vdq (F3),(VEX)
+7c: vhaddpd Vpd,Hpd,Wpd (66) | vhaddps Vps,Hps,Wps (F2)
+7d: vhsubpd Vpd,Hpd,Wpd (66) | vhsubps Vps,Hps,Wps (F2)
+7e: movd/q Ey,Pd | vmovd/q Ey,Vy (66),(v1) | vmovq Vq,Wq (F3),(v1)
+7f: movq Qq,Pq | vmovdqa Wx,Vx (66) | vmovdqu Wx,Vx (F3)
 # 0x0f 0x80-0x8f
 80: JO Jz (f64)
 81: JNO Jz (f64)
-82: JB/JNAE/JC Jz (f64)
-83: JNB/JAE/JNC Jz (f64)
-84: JZ/JE Jz (f64)
-85: JNZ/JNE Jz (f64)
+82: JB/JC/JNAE Jz (f64)
+83: JAE/JNB/JNC Jz (f64)
+84: JE/JZ Jz (f64)
+85: JNE/JNZ Jz (f64)
 86: JBE/JNA Jz (f64)
-87: JNBE/JA Jz (f64)
+87: JA/JNBE Jz (f64)
 88: JS Jz (f64)
 89: JNS Jz (f64)
 8a: JP/JPE Jz (f64)
@@ -502,18 +517,18 @@ b8: JMPE | POPCNT Gv,Ev (F3)
 b9: Grp10 (1A)
 ba: Grp8 Ev,Ib (1A)
 bb: BTC Ev,Gv
-bc: BSF Gv,Ev
-bd: BSR Gv,Ev
+bc: BSF Gv,Ev | TZCNT Gv,Ev (F3)
+bd: BSR Gv,Ev | LZCNT Gv,Ev (F3)
 be: MOVSX Gv,Eb
 bf: MOVSX Gv,Ew
 # 0x0f 0xc0-0xcf
 c0: XADD Eb,Gb
 c1: XADD Ev,Gv
-c2: cmpps Vps,Wps,Ib (VEX) | cmpss Vss,Wss,Ib (F3),(VEX),(o128) | cmppd Vpd,Wpd,Ib (66),(VEX) | cmpsd Vsd,Wsd,Ib (F2),(VEX)
-c3: movnti Md/q,Gd/q
-c4: pinsrw Pq,Rd/q/Mw,Ib | pinsrw Vdq,Rd/q/Mw,Ib (66),(VEX),(o128)
-c5: pextrw Gd,Nq,Ib | pextrw Gd,Udq,Ib (66),(VEX),(o128)
-c6: shufps Vps,Wps,Ib (VEX) | shufpd Vpd,Wpd,Ib (66),(VEX)
+c2: vcmpps Vps,Hps,Wps,Ib | vcmppd Vpd,Hpd,Wpd,Ib (66) | vcmpss Vss,Hss,Wss,Ib (F3),(v1) | vcmpsd Vsd,Hsd,Wsd,Ib (F2),(v1)
+c3: movnti My,Gy
+c4: pinsrw Pq,Ry/Mw,Ib | vpinsrw Vdq,Hdq,Ry/Mw,Ib (66),(v1)
+c5: pextrw Gd,Nq,Ib | vpextrw Gd,Udq,Ib (66),(v1)
+c6: vshufps Vps,Hps,Wps,Ib | vshufpd Vpd,Hpd,Wpd,Ib (66)
 c7: Grp9 (1A)
 c8: BSWAP RAX/EAX/R8/R8D
 c9: BSWAP RCX/ECX/R9/R9D
@@ -524,55 +539,55 @@ cd: BSWAP RBP/EBP/R13/R13D
 ce: BSWAP RSI/ESI/R14/R14D
 cf: BSWAP RDI/EDI/R15/R15D
 # 0x0f 0xd0-0xdf
-d0: addsubps Vps,Wps (F2),(VEX) | addsubpd Vpd,Wpd (66),(VEX)
-d1: psrlw Pq,Qq | psrlw Vdq,Wdq (66),(VEX),(o128)
-d2: psrld Pq,Qq | psrld Vdq,Wdq (66),(VEX),(o128)
-d3: psrlq Pq,Qq | psrlq Vdq,Wdq (66),(VEX),(o128)
-d4: paddq Pq,Qq | paddq Vdq,Wdq (66),(VEX),(o128)
-d5: pmullw Pq,Qq | pmullw Vdq,Wdq (66),(VEX),(o128)
-d6: movq Wq,Vq (66),(VEX),(o128) | movq2dq Vdq,Nq (F3) | movdq2q Pq,Uq (F2)
-d7: pmovmskb Gd,Nq | pmovmskb Gd,Udq (66),(VEX),(o128)
-d8: psubusb Pq,Qq | psubusb Vdq,Wdq (66),(VEX),(o128)
-d9: psubusw Pq,Qq | psubusw Vdq,Wdq (66),(VEX),(o128)
-da: pminub Pq,Qq | pminub Vdq,Wdq (66),(VEX),(o128)
-db: pand Pq,Qq | pand Vdq,Wdq (66),(VEX),(o128)
-dc: paddusb Pq,Qq | paddusb Vdq,Wdq (66),(VEX),(o128)
-dd: paddusw Pq,Qq | paddusw Vdq,Wdq (66),(VEX),(o128)
-de: pmaxub Pq,Qq | pmaxub Vdq,Wdq (66),(VEX),(o128)
-df: pandn Pq,Qq | pandn Vdq,Wdq (66),(VEX),(o128)
+d0: vaddsubpd Vpd,Hpd,Wpd (66) | vaddsubps Vps,Hps,Wps (F2)
+d1: psrlw Pq,Qq | vpsrlw Vx,Hx,Wx (66),(v1)
+d2: psrld Pq,Qq | vpsrld Vx,Hx,Wx (66),(v1)
+d3: psrlq Pq,Qq | vpsrlq Vx,Hx,Wx (66),(v1)
+d4: paddq Pq,Qq | vpaddq Vx,Hx,Wx (66),(v1)
+d5: pmullw Pq,Qq | vpmullw Vx,Hx,Wx (66),(v1)
+d6: vmovq Wq,Vq (66),(v1) | movq2dq Vdq,Nq (F3) | movdq2q Pq,Uq (F2)
+d7: pmovmskb Gd,Nq | vpmovmskb Gd,Ux (66),(v1)
+d8: psubusb Pq,Qq | vpsubusb Vx,Hx,Wx (66),(v1)
+d9: psubusw Pq,Qq | vpsubusw Vx,Hx,Wx (66),(v1)
+da: pminub Pq,Qq | vpminub Vx,Hx,Wx (66),(v1)
+db: pand Pq,Qq | vpand Vx,Hx,Wx (66),(v1)
+dc: paddusb Pq,Qq | vpaddusb Vx,Hx,Wx (66),(v1)
+dd: paddusw Pq,Qq | vpaddusw Vx,Hx,Wx (66),(v1)
+de: pmaxub Pq,Qq | vpmaxub Vx,Hx,Wx (66),(v1)
+df: pandn Pq,Qq | vpandn Vx,Hx,Wx (66),(v1)
 # 0x0f 0xe0-0xef
-e0: pavgb Pq,Qq | pavgb Vdq,Wdq (66),(VEX),(o128)
-e1: psraw Pq,Qq | psraw Vdq,Wdq (66),(VEX),(o128)
-e2: psrad Pq,Qq | psrad Vdq,Wdq (66),(VEX),(o128)
-e3: pavgw Pq,Qq | pavgw Vdq,Wdq (66),(VEX),(o128)
-e4: pmulhuw Pq,Qq | pmulhuw Vdq,Wdq (66),(VEX),(o128)
-e5: pmulhw Pq,Qq | pmulhw Vdq,Wdq (66),(VEX),(o128)
-e6: cvtpd2dq Vdq,Wpd (F2),(VEX) | cvttpd2dq Vdq,Wpd (66),(VEX) | cvtdq2pd Vpd,Wdq (F3),(VEX)
-e7: movntq Mq,Pq | movntdq Mdq,Vdq (66),(VEX)
-e8: psubsb Pq,Qq | psubsb Vdq,Wdq (66),(VEX),(o128)
-e9: psubsw Pq,Qq | psubsw Vdq,Wdq (66),(VEX),(o128)
-ea: pminsw Pq,Qq | pminsw Vdq,Wdq (66),(VEX),(o128)
-eb: por Pq,Qq | por Vdq,Wdq (66),(VEX),(o128)
-ec: paddsb Pq,Qq | paddsb Vdq,Wdq (66),(VEX),(o128)
-ed: paddsw Pq,Qq | paddsw Vdq,Wdq (66),(VEX),(o128)
-ee: pmaxsw Pq,Qq | pmaxsw Vdq,Wdq (66),(VEX),(o128)
-ef: pxor Pq,Qq | pxor Vdq,Wdq (66),(VEX),(o128)
+e0: pavgb Pq,Qq | vpavgb Vx,Hx,Wx (66),(v1)
+e1: psraw Pq,Qq | vpsraw Vx,Hx,Wx (66),(v1)
+e2: psrad Pq,Qq | vpsrad Vx,Hx,Wx (66),(v1)
+e3: pavgw Pq,Qq | vpavgw Vx,Hx,Wx (66),(v1)
+e4: pmulhuw Pq,Qq | vpmulhuw Vx,Hx,Wx (66),(v1)
+e5: pmulhw Pq,Qq | vpmulhw Vx,Hx,Wx (66),(v1)
+e6: vcvttpd2dq Vx,Wpd (66) | vcvtdq2pd Vx,Wdq (F3) | vcvtpd2dq Vx,Wpd (F2)
+e7: movntq Mq,Pq | vmovntdq Mx,Vx (66)
+e8: psubsb Pq,Qq | vpsubsb Vx,Hx,Wx (66),(v1)
+e9: psubsw Pq,Qq | vpsubsw Vx,Hx,Wx (66),(v1)
+ea: pminsw Pq,Qq | vpminsw Vx,Hx,Wx (66),(v1)
+eb: por Pq,Qq | vpor Vx,Hx,Wx (66),(v1)
+ec: paddsb Pq,Qq | vpaddsb Vx,Hx,Wx (66),(v1)
+ed: paddsw Pq,Qq | vpaddsw Vx,Hx,Wx (66),(v1)
+ee: pmaxsw Pq,Qq | vpmaxsw Vx,Hx,Wx (66),(v1)
+ef: pxor Pq,Qq | vpxor Vx,Hx,Wx (66),(v1)
 # 0x0f 0xf0-0xff
-f0: lddqu Vdq,Mdq (F2),(VEX)
-f1: psllw Pq,Qq | psllw Vdq,Wdq (66),(VEX),(o128)
-f2: pslld Pq,Qq | pslld Vdq,Wdq (66),(VEX),(o128)
-f3: psllq Pq,Qq | psllq Vdq,Wdq (66),(VEX),(o128)
-f4: pmuludq Pq,Qq | pmuludq Vdq,Wdq (66),(VEX),(o128)
-f5: pmaddwd Pq,Qq | pmaddwd Vdq,Wdq (66),(VEX),(o128)
-f6: psadbw Pq,Qq | psadbw Vdq,Wdq (66),(VEX),(o128)
-f7: maskmovq Pq,Nq | maskmovdqu Vdq,Udq (66),(VEX),(o128)
-f8: psubb Pq,Qq | psubb Vdq,Wdq (66),(VEX),(o128)
-f9: psubw Pq,Qq | psubw Vdq,Wdq (66),(VEX),(o128)
-fa: psubd Pq,Qq | psubd Vdq,Wdq (66),(VEX),(o128)
-fb: psubq Pq,Qq | psubq Vdq,Wdq (66),(VEX),(o128)
-fc: paddb Pq,Qq | paddb Vdq,Wdq (66),(VEX),(o128)
-fd: paddw Pq,Qq | paddw Vdq,Wdq (66),(VEX),(o128)
-fe: paddd Pq,Qq | paddd Vdq,Wdq (66),(VEX),(o128)
+f0: vlddqu Vx,Mx (F2)
+f1: psllw Pq,Qq | vpsllw Vx,Hx,Wx (66),(v1)
+f2: pslld Pq,Qq | vpslld Vx,Hx,Wx (66),(v1)
+f3: psllq Pq,Qq | vpsllq Vx,Hx,Wx (66),(v1)
+f4: pmuludq Pq,Qq | vpmuludq Vx,Hx,Wx (66),(v1)
+f5: pmaddwd Pq,Qq | vpmaddwd Vx,Hx,Wx (66),(v1)
+f6: psadbw Pq,Qq | vpsadbw Vx,Hx,Wx (66),(v1)
+f7: maskmovq Pq,Nq | vmaskmovdqu Vx,Ux (66),(v1)
+f8: psubb Pq,Qq | vpsubb Vx,Hx,Wx (66),(v1)
+f9: psubw Pq,Qq | vpsubw Vx,Hx,Wx (66),(v1)
+fa: psubd Pq,Qq | vpsubd Vx,Hx,Wx (66),(v1)
+fb: psubq Pq,Qq | vpsubq Vx,Hx,Wx (66),(v1)
+fc: paddb Pq,Qq | vpaddb Vx,Hx,Wx (66),(v1)
+fd: paddw Pq,Qq | vpaddw Vx,Hx,Wx (66),(v1)
+fe: paddd Pq,Qq | vpaddd Vx,Hx,Wx (66),(v1)
 ff:
 EndTable
 
@@ -580,155 +595,193 @@ Table: 3-byte opcode 1 (0x0f 0x38)
 Referrer: 3-byte escape 1
 AVXcode: 2
 # 0x0f 0x38 0x00-0x0f
-00: pshufb Pq,Qq | pshufb Vdq,Wdq (66),(VEX),(o128)
-01: phaddw Pq,Qq | phaddw Vdq,Wdq (66),(VEX),(o128)
-02: phaddd Pq,Qq | phaddd Vdq,Wdq (66),(VEX),(o128)
-03: phaddsw Pq,Qq | phaddsw Vdq,Wdq (66),(VEX),(o128)
-04: pmaddubsw Pq,Qq | pmaddubsw Vdq,Wdq (66),(VEX),(o128)
-05: phsubw Pq,Qq | phsubw Vdq,Wdq (66),(VEX),(o128)
-06: phsubd Pq,Qq | phsubd Vdq,Wdq (66),(VEX),(o128)
-07: phsubsw Pq,Qq | phsubsw Vdq,Wdq (66),(VEX),(o128)
-08: psignb Pq,Qq | psignb Vdq,Wdq (66),(VEX),(o128)
-09: psignw Pq,Qq | psignw Vdq,Wdq (66),(VEX),(o128)
-0a: psignd Pq,Qq | psignd Vdq,Wdq (66),(VEX),(o128)
-0b: pmulhrsw Pq,Qq | pmulhrsw Vdq,Wdq (66),(VEX),(o128)
-0c: Vpermilps /r (66),(oVEX)
-0d: Vpermilpd /r (66),(oVEX)
-0e: vtestps /r (66),(oVEX)
-0f: vtestpd /r (66),(oVEX)
+00: pshufb Pq,Qq | vpshufb Vx,Hx,Wx (66),(v1)
+01: phaddw Pq,Qq | vphaddw Vx,Hx,Wx (66),(v1)
+02: phaddd Pq,Qq | vphaddd Vx,Hx,Wx (66),(v1)
+03: phaddsw Pq,Qq | vphaddsw Vx,Hx,Wx (66),(v1)
+04: pmaddubsw Pq,Qq | vpmaddubsw Vx,Hx,Wx (66),(v1)
+05: phsubw Pq,Qq | vphsubw Vx,Hx,Wx (66),(v1)
+06: phsubd Pq,Qq | vphsubd Vx,Hx,Wx (66),(v1)
+07: phsubsw Pq,Qq | vphsubsw Vx,Hx,Wx (66),(v1)
+08: psignb Pq,Qq | vpsignb Vx,Hx,Wx (66),(v1)
+09: psignw Pq,Qq | vpsignw Vx,Hx,Wx (66),(v1)
+0a: psignd Pq,Qq | vpsignd Vx,Hx,Wx (66),(v1)
+0b: pmulhrsw Pq,Qq | vpmulhrsw Vx,Hx,Wx (66),(v1)
+0c: vpermilps Vx,Hx,Wx (66),(v)
+0d: vpermilpd Vx,Hx,Wx (66),(v)
+0e: vtestps Vx,Wx (66),(v)
+0f: vtestpd Vx,Wx (66),(v)
 # 0x0f 0x38 0x10-0x1f
 10: pblendvb Vdq,Wdq (66)
 11:
 12:
-13:
+13: vcvtph2ps Vx,Wx,Ib (66),(v)
 14: blendvps Vdq,Wdq (66)
 15: blendvpd Vdq,Wdq (66)
-16:
-17: ptest Vdq,Wdq (66),(VEX)
-18: vbroadcastss /r (66),(oVEX)
-19: vbroadcastsd /r (66),(oVEX),(o256)
-1a: vbroadcastf128 /r (66),(oVEX),(o256)
+16: vpermps Vqq,Hqq,Wqq (66),(v)
+17: vptest Vx,Wx (66)
+18: vbroadcastss Vx,Wd (66),(v)
+19: vbroadcastsd Vqq,Wq (66),(v)
+1a: vbroadcastf128 Vqq,Mdq (66),(v)
 1b:
-1c: pabsb Pq,Qq | pabsb Vdq,Wdq (66),(VEX),(o128)
-1d: pabsw Pq,Qq | pabsw Vdq,Wdq (66),(VEX),(o128)
-1e: pabsd Pq,Qq | pabsd Vdq,Wdq (66),(VEX),(o128)
+1c: pabsb Pq,Qq | vpabsb Vx,Wx (66),(v1)
+1d: pabsw Pq,Qq | vpabsw Vx,Wx (66),(v1)
+1e: pabsd Pq,Qq | vpabsd Vx,Wx (66),(v1)
 1f:
 # 0x0f 0x38 0x20-0x2f
-20: pmovsxbw Vdq,Udq/Mq (66),(VEX),(o128)
-21: pmovsxbd Vdq,Udq/Md (66),(VEX),(o128)
-22: pmovsxbq Vdq,Udq/Mw (66),(VEX),(o128)
-23: pmovsxwd Vdq,Udq/Mq (66),(VEX),(o128)
-24: pmovsxwq Vdq,Udq/Md (66),(VEX),(o128)
-25: pmovsxdq Vdq,Udq/Mq (66),(VEX),(o128)
+20: vpmovsxbw Vx,Ux/Mq (66),(v1)
+21: vpmovsxbd Vx,Ux/Md (66),(v1)
+22: vpmovsxbq Vx,Ux/Mw (66),(v1)
+23: vpmovsxwd Vx,Ux/Mq (66),(v1)
+24: vpmovsxwq Vx,Ux/Md (66),(v1)
+25: vpmovsxdq Vx,Ux/Mq (66),(v1)
 26:
 27:
-28: pmuldq Vdq,Wdq (66),(VEX),(o128)
-29: pcmpeqq Vdq,Wdq (66),(VEX),(o128)
-2a: movntdqa Vdq,Mdq (66),(VEX),(o128)
-2b: packusdw Vdq,Wdq (66),(VEX),(o128)
-2c: vmaskmovps(ld) /r (66),(oVEX)
-2d: vmaskmovpd(ld) /r (66),(oVEX)
-2e: vmaskmovps(st) /r (66),(oVEX)
-2f: vmaskmovpd(st) /r (66),(oVEX)
+28: vpmuldq Vx,Hx,Wx (66),(v1)
+29: vpcmpeqq Vx,Hx,Wx (66),(v1)
+2a: vmovntdqa Vx,Mx (66),(v1)
+2b: vpackusdw Vx,Hx,Wx (66),(v1)
+2c: vmaskmovps Vx,Hx,Mx (66),(v)
+2d: vmaskmovpd Vx,Hx,Mx (66),(v)
+2e: vmaskmovps Mx,Hx,Vx (66),(v)
+2f: vmaskmovpd Mx,Hx,Vx (66),(v)
 # 0x0f 0x38 0x30-0x3f
-30: pmovzxbw Vdq,Udq/Mq (66),(VEX),(o128)
-31: pmovzxbd Vdq,Udq/Md (66),(VEX),(o128)
-32: pmovzxbq Vdq,Udq/Mw (66),(VEX),(o128)
-33: pmovzxwd Vdq,Udq/Mq (66),(VEX),(o128)
-34: pmovzxwq Vdq,Udq/Md (66),(VEX),(o128)
-35: pmovzxdq Vdq,Udq/Mq (66),(VEX),(o128)
-36:
-37: pcmpgtq Vdq,Wdq (66),(VEX),(o128)
-38: pminsb Vdq,Wdq (66),(VEX),(o128)
-39: pminsd Vdq,Wdq (66),(VEX),(o128)
-3a: pminuw Vdq,Wdq (66),(VEX),(o128)
-3b: pminud Vdq,Wdq (66),(VEX),(o128)
-3c: pmaxsb Vdq,Wdq (66),(VEX),(o128)
-3d: pmaxsd Vdq,Wdq (66),(VEX),(o128)
-3e: pmaxuw Vdq,Wdq (66),(VEX),(o128)
-3f: pmaxud Vdq,Wdq (66),(VEX),(o128)
+30: vpmovzxbw Vx,Ux/Mq (66),(v1)
+31: vpmovzxbd Vx,Ux/Md (66),(v1)
+32: vpmovzxbq Vx,Ux/Mw (66),(v1)
+33: vpmovzxwd Vx,Ux/Mq (66),(v1)
+34: vpmovzxwq Vx,Ux/Md (66),(v1)
+35: vpmovzxdq Vx,Ux/Mq (66),(v1)
+36: vpermd Vqq,Hqq,Wqq (66),(v)
+37: vpcmpgtq Vx,Hx,Wx (66),(v1)
+38: vpminsb Vx,Hx,Wx (66),(v1)
+39: vpminsd Vx,Hx,Wx (66),(v1)
+3a: vpminuw Vx,Hx,Wx (66),(v1)
+3b: vpminud Vx,Hx,Wx (66),(v1)
+3c: vpmaxsb Vx,Hx,Wx (66),(v1)
+3d: vpmaxsd Vx,Hx,Wx (66),(v1)
+3e: vpmaxuw Vx,Hx,Wx (66),(v1)
+3f: vpmaxud Vx,Hx,Wx (66),(v1)
 # 0x0f 0x38 0x40-0x8f
-40: pmulld Vdq,Wdq (66),(VEX),(o128)
-41: phminposuw Vdq,Wdq (66),(VEX),(o128)
-80: INVEPT Gd/q,Mdq (66)
-81: INVPID Gd/q,Mdq (66)
+40: vpmulld Vx,Hx,Wx (66),(v1)
+41: vphminposuw Vdq,Wdq (66),(v1)
+42:
+43:
+44:
+45: vpsrlvd/q Vx,Hx,Wx (66),(v)
+46: vpsravd Vx,Hx,Wx (66),(v)
+47: vpsllvd/q Vx,Hx,Wx (66),(v)
+# Skip 0x48-0x57
+58: vpbroadcastd Vx,Wx (66),(v)
+59: vpbroadcastq Vx,Wx (66),(v)
+5a: vbroadcasti128 Vqq,Mdq (66),(v)
+# Skip 0x5b-0x77
+78: vpbroadcastb Vx,Wx (66),(v)
+79: vpbroadcastw Vx,Wx (66),(v)
+# Skip 0x7a-0x7f
+80: INVEPT Gy,Mdq (66)
+81: INVPID Gy,Mdq (66)
+82: INVPCID Gy,Mdq (66)
+8c: vpmaskmovd/q Vx,Hx,Mx (66),(v)
+8e: vpmaskmovd/q Mx,Vx,Hx (66),(v)
 # 0x0f 0x38 0x90-0xbf (FMA)
-96: vfmaddsub132pd/ps /r (66),(VEX)
-97: vfmsubadd132pd/ps /r (66),(VEX)
-98: vfmadd132pd/ps /r (66),(VEX)
-99: vfmadd132sd/ss /r (66),(VEX),(o128)
-9a: vfmsub132pd/ps /r (66),(VEX)
-9b: vfmsub132sd/ss /r (66),(VEX),(o128)
-9c: vfnmadd132pd/ps /r (66),(VEX)
-9d: vfnmadd132sd/ss /r (66),(VEX),(o128)
-9e: vfnmsub132pd/ps /r (66),(VEX)
-9f: vfnmsub132sd/ss /r (66),(VEX),(o128)
-a6: vfmaddsub213pd/ps /r (66),(VEX)
-a7: vfmsubadd213pd/ps /r (66),(VEX)
-a8: vfmadd213pd/ps /r (66),(VEX)
-a9: vfmadd213sd/ss /r (66),(VEX),(o128)
-aa: vfmsub213pd/ps /r (66),(VEX)
-ab: vfmsub213sd/ss /r (66),(VEX),(o128)
-ac: vfnmadd213pd/ps /r (66),(VEX)
-ad: vfnmadd213sd/ss /r (66),(VEX),(o128)
-ae: vfnmsub213pd/ps /r (66),(VEX)
-af: vfnmsub213sd/ss /r (66),(VEX),(o128)
-b6: vfmaddsub231pd/ps /r (66),(VEX)
-b7: vfmsubadd231pd/ps /r (66),(VEX)
-b8: vfmadd231pd/ps /r (66),(VEX)
-b9: vfmadd231sd/ss /r (66),(VEX),(o128)
-ba: vfmsub231pd/ps /r (66),(VEX)
-bb: vfmsub231sd/ss /r (66),(VEX),(o128)
-bc: vfnmadd231pd/ps /r (66),(VEX)
-bd: vfnmadd231sd/ss /r (66),(VEX),(o128)
-be: vfnmsub231pd/ps /r (66),(VEX)
-bf: vfnmsub231sd/ss /r (66),(VEX),(o128)
+90: vgatherdd/q Vx,Hx,Wx (66),(v)
+91: vgatherqd/q Vx,Hx,Wx (66),(v)
+92: vgatherdps/d Vx,Hx,Wx (66),(v)
+93: vgatherqps/d Vx,Hx,Wx (66),(v)
+94:
+95:
+96: vfmaddsub132ps/d Vx,Hx,Wx (66),(v)
+97: vfmsubadd132ps/d Vx,Hx,Wx (66),(v)
+98: vfmadd132ps/d Vx,Hx,Wx (66),(v)
+99: vfmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
+9a: vfmsub132ps/d Vx,Hx,Wx (66),(v)
+9b: vfmsub132ss/d Vx,Hx,Wx (66),(v),(v1)
+9c: vfnmadd132ps/d Vx,Hx,Wx (66),(v)
+9d: vfnmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
+9e: vfnmsub132ps/d Vx,Hx,Wx (66),(v)
+9f: vfnmsub132ss/d Vx,Hx,Wx (66),(v),(v1)
+a6: vfmaddsub213ps/d Vx,Hx,Wx (66),(v)
+a7: vfmsubadd213ps/d Vx,Hx,Wx (66),(v)
+a8: vfmadd213ps/d Vx,Hx,Wx (66),(v)
+a9: vfmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
+aa: vfmsub213ps/d Vx,Hx,Wx (66),(v)
+ab: vfmsub213ss/d Vx,Hx,Wx (66),(v),(v1)
+ac: vfnmadd213ps/d Vx,Hx,Wx (66),(v)
+ad: vfnmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
+ae: vfnmsub213ps/d Vx,Hx,Wx (66),(v)
+af: vfnmsub213ss/d Vx,Hx,Wx (66),(v),(v1)
+b6: vfmaddsub231ps/d Vx,Hx,Wx (66),(v)
+b7: vfmsubadd231ps/d Vx,Hx,Wx (66),(v)
+b8: vfmadd231ps/d Vx,Hx,Wx (66),(v)
+b9: vfmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
+ba: vfmsub231ps/d Vx,Hx,Wx (66),(v)
+bb: vfmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
+bc: vfnmadd231ps/d Vx,Hx,Wx (66),(v)
+bd: vfnmadd231ss/d Vx,Hx,Wx (66),(v),(v1)
+be: vfnmsub231ps/d Vx,Hx,Wx (66),(v)
+bf: vfnmsub231ss/d Vx,Hx,Wx (66),(v),(v1)
 # 0x0f 0x38 0xc0-0xff
-db: aesimc Vdq,Wdq (66),(VEX),(o128)
-dc: aesenc Vdq,Wdq (66),(VEX),(o128)
-dd: aesenclast Vdq,Wdq (66),(VEX),(o128)
-de: aesdec Vdq,Wdq (66),(VEX),(o128)
-df: aesdeclast Vdq,Wdq (66),(VEX),(o128)
-f0: MOVBE Gv,Mv | CRC32 Gd,Eb (F2)
-f1: MOVBE Mv,Gv | CRC32 Gd,Ev (F2)
+db: VAESIMC Vdq,Wdq (66),(v1)
+dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
+dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
+de: VAESDEC Vdq,Hdq,Wdq (66),(v1)
+df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1)
+f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2)
+f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2)
+f3: ANDN Gy,By,Ey (v)
+f4: Grp17 (1A)
+f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v)
+f6: MULX By,Gy,rDX,Ey (F2),(v)
+f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
 EndTable
 
 Table: 3-byte opcode 2 (0x0f 0x3a)
 Referrer: 3-byte escape 2
 AVXcode: 3
 # 0x0f 0x3a 0x00-0xff
-04: vpermilps /r,Ib (66),(oVEX)
-05: vpermilpd /r,Ib (66),(oVEX)
-06: vperm2f128 /r,Ib (66),(oVEX),(o256)
-08: roundps Vdq,Wdq,Ib (66),(VEX)
-09: roundpd Vdq,Wdq,Ib (66),(VEX)
-0a: roundss Vss,Wss,Ib (66),(VEX),(o128)
-0b: roundsd Vsd,Wsd,Ib (66),(VEX),(o128)
-0c: blendps Vdq,Wdq,Ib (66),(VEX)
-0d: blendpd Vdq,Wdq,Ib (66),(VEX)
-0e: pblendw Vdq,Wdq,Ib (66),(VEX),(o128)
-0f: palignr Pq,Qq,Ib | palignr Vdq,Wdq,Ib (66),(VEX),(o128)
-14: pextrb Rd/Mb,Vdq,Ib (66),(VEX),(o128)
-15: pextrw Rd/Mw,Vdq,Ib (66),(VEX),(o128)
-16: pextrd/pextrq Ed/q,Vdq,Ib (66),(VEX),(o128)
-17: extractps Ed,Vdq,Ib (66),(VEX),(o128)
-18: vinsertf128 /r,Ib (66),(oVEX),(o256)
-19: vextractf128 /r,Ib (66),(oVEX),(o256)
-20: pinsrb Vdq,Rd/q/Mb,Ib (66),(VEX),(o128)
-21: insertps Vdq,Udq/Md,Ib (66),(VEX),(o128)
-22: pinsrd/pinsrq Vdq,Ed/q,Ib (66),(VEX),(o128)
-40: dpps Vdq,Wdq,Ib (66),(VEX)
-41: dppd Vdq,Wdq,Ib (66),(VEX),(o128)
-42: mpsadbw Vdq,Wdq,Ib (66),(VEX),(o128)
-44: pclmulq Vdq,Wdq,Ib (66),(VEX),(o128)
-4a: vblendvps /r,Ib (66),(oVEX)
-4b: vblendvpd /r,Ib (66),(oVEX)
-4c: vpblendvb /r,Ib (66),(oVEX),(o128)
-60: pcmpestrm Vdq,Wdq,Ib (66),(VEX),(o128)
-61: pcmpestri Vdq,Wdq,Ib (66),(VEX),(o128)
-62: pcmpistrm Vdq,Wdq,Ib (66),(VEX),(o128)
-63: pcmpistri Vdq,Wdq,Ib (66),(VEX),(o128)
-df: aeskeygenassist Vdq,Wdq,Ib (66),(VEX),(o128)
+00: vpermq Vqq,Wqq,Ib (66),(v)
+01: vpermpd Vqq,Wqq,Ib (66),(v)
+02: vpblendd Vx,Hx,Wx,Ib (66),(v)
+03:
+04: vpermilps Vx,Wx,Ib (66),(v)
+05: vpermilpd Vx,Wx,Ib (66),(v)
+06: vperm2f128 Vqq,Hqq,Wqq,Ib (66),(v)
+07:
+08: vroundps Vx,Wx,Ib (66)
+09: vroundpd Vx,Wx,Ib (66)
+0a: vroundss Vss,Wss,Ib (66),(v1)
+0b: vroundsd Vsd,Wsd,Ib (66),(v1)
+0c: vblendps Vx,Hx,Wx,Ib (66)
+0d: vblendpd Vx,Hx,Wx,Ib (66)
+0e: vpblendw Vx,Hx,Wx,Ib (66),(v1)
+0f: palignr Pq,Qq,Ib | vpalignr Vx,Hx,Wx,Ib (66),(v1)
+14: vpextrb Rd/Mb,Vdq,Ib (66),(v1)
+15: vpextrw Rd/Mw,Vdq,Ib (66),(v1)
+16: vpextrd/q Ey,Vdq,Ib (66),(v1)
+17: vextractps Ed,Vdq,Ib (66),(v1)
+18: vinsertf128 Vqq,Hqq,Wqq,Ib (66),(v)
+19: vextractf128 Wdq,Vqq,Ib (66),(v)
+1d: vcvtps2ph Wx,Vx,Ib (66),(v)
+20: vpinsrb Vdq,Hdq,Ry/Mb,Ib (66),(v1)
+21: vinsertps Vdq,Hdq,Udq/Md,Ib (66),(v1)
+22: vpinsrd/q Vdq,Hdq,Ey,Ib (66),(v1)
+38: vinserti128 Vqq,Hqq,Wqq,Ib (66),(v)
+39: vextracti128 Wdq,Vqq,Ib (66),(v)
+40: vdpps Vx,Hx,Wx,Ib (66)
+41: vdppd Vdq,Hdq,Wdq,Ib (66),(v1)
+42: vmpsadbw Vx,Hx,Wx,Ib (66),(v1)
+44: vpclmulqdq Vdq,Hdq,Wdq,Ib (66),(v1)
+46: vperm2i128 Vqq,Hqq,Wqq,Ib (66),(v)
+4a: vblendvps Vx,Hx,Wx,Lx (66),(v)
+4b: vblendvpd Vx,Hx,Wx,Lx (66),(v)
+4c: vpblendvb Vx,Hx,Wx,Lx (66),(v1)
+60: vpcmpestrm Vdq,Wdq,Ib (66),(v1)
+61: vpcmpestri Vdq,Wdq,Ib (66),(v1)
+62: vpcmpistrm Vdq,Wdq,Ib (66),(v1)
+63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
+df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
+f0: RORX Gy,Ey,Ib (F2),(v)
 EndTable
 
 GrpTable: Grp1
@@ -790,7 +843,7 @@ GrpTable: Grp5
 2: CALLN Ev (f64)
 3: CALLF Ep
 4: JMPN Ev (f64)
-5: JMPF Ep
+5: JMPF Mp
 6: PUSH Ev (d64)
 7:
 EndTable
@@ -807,7 +860,7 @@ EndTable
 GrpTable: Grp7
 0: SGDT Ms | VMCALL (001),(11B) | VMLAUNCH (010),(11B) | VMRESUME (011),(11B) | VMXOFF (100),(11B)
 1: SIDT Ms | MONITOR (000),(11B) | MWAIT (001)
-2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B)
+2: LGDT Ms | XGETBV (000),(11B) | XSETBV (001),(11B) | VMFUNC (100),(11B)
 3: LIDT Ms
 4: SMSW Mw/Rv
 5:
@@ -824,44 +877,45 @@ EndTable
 
 GrpTable: Grp9
 1: CMPXCHG8B/16B Mq/Mdq
-6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3)
-7: VMPTRST Mq
+6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
+7: VMPTRST Mq | VMPTRST Mq (F3)
 EndTable
 
 GrpTable: Grp10
 EndTable
 
 GrpTable: Grp11
+# Note: the operands are given by group opcode
 0: MOV
 EndTable
 
 GrpTable: Grp12
-2: psrlw Nq,Ib (11B) | psrlw Udq,Ib (66),(11B),(VEX),(o128)
-4: psraw Nq,Ib (11B) | psraw Udq,Ib (66),(11B),(VEX),(o128)
-6: psllw Nq,Ib (11B) | psllw Udq,Ib (66),(11B),(VEX),(o128)
+2: psrlw Nq,Ib (11B) | vpsrlw Hx,Ux,Ib (66),(11B),(v1)
+4: psraw Nq,Ib (11B) | vpsraw Hx,Ux,Ib (66),(11B),(v1)
+6: psllw Nq,Ib (11B) | vpsllw Hx,Ux,Ib (66),(11B),(v1)
 EndTable
 
 GrpTable: Grp13
-2: psrld Nq,Ib (11B) | psrld Udq,Ib (66),(11B),(VEX),(o128)
-4: psrad Nq,Ib (11B) | psrad Udq,Ib (66),(11B),(VEX),(o128)
-6: pslld Nq,Ib (11B) | pslld Udq,Ib (66),(11B),(VEX),(o128)
+2: psrld Nq,Ib (11B) | vpsrld Hx,Ux,Ib (66),(11B),(v1)
+4: psrad Nq,Ib (11B) | vpsrad Hx,Ux,Ib (66),(11B),(v1)
+6: pslld Nq,Ib (11B) | vpslld Hx,Ux,Ib (66),(11B),(v1)
 EndTable
 
 GrpTable: Grp14
-2: psrlq Nq,Ib (11B) | psrlq Udq,Ib (66),(11B),(VEX),(o128)
-3: psrldq Udq,Ib (66),(11B),(VEX),(o128)
-6: psllq Nq,Ib (11B) | psllq Udq,Ib (66),(11B),(VEX),(o128)
-7: pslldq Udq,Ib (66),(11B),(VEX),(o128)
+2: psrlq Nq,Ib (11B) | vpsrlq Hx,Ux,Ib (66),(11B),(v1)
+3: vpsrldq Hx,Ux,Ib (66),(11B),(v1)
+6: psllq Nq,Ib (11B) | vpsllq Hx,Ux,Ib (66),(11B),(v1)
+7: vpslldq Hx,Ux,Ib (66),(11B),(v1)
 EndTable
 
 GrpTable: Grp15
-0: fxsave
-1: fxstor
-2: ldmxcsr (VEX)
-3: stmxcsr (VEX)
+0: fxsave | RDFSBASE Ry (F3),(11B)
+1: fxstor | RDGSBASE Ry (F3),(11B)
+2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B)
+3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B)
 4: XSAVE
 5: XRSTOR | lfence (11B)
-6: mfence (11B)
+6: XSAVEOPT | mfence (11B)
 7: clflush | sfence (11B)
 EndTable
 
@@ -872,6 +926,12 @@ GrpTable: Grp16
 3: prefetch T2
 EndTable
 
+GrpTable: Grp17
+1: BLSR By,Ey (v)
+2: BLSMSK By,Ey (v)
+3: BLSI By,Ey (v)
+EndTable
+
 # AMD's Prefetch Group
 GrpTable: GrpP
 0: PREFETCH
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index 3d11327c9ab4..23d8e5fecf76 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -27,6 +27,4 @@ obj-$(CONFIG_AMD_NUMA)		+= amdtopology.o
 obj-$(CONFIG_ACPI_NUMA)         += srat.o
 obj-$(CONFIG_NUMA_EMU)          += numa_emulation.o
 
-obj-$(CONFIG_HAVE_MEMBLOCK)             += memblock.o
-
 obj-$(CONFIG_MEMTEST)           += memtest.o
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index d0474ad2a6e5..1fb85dbe390a 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -25,7 +25,7 @@ int fixup_exception(struct pt_regs *regs)
         if (fixup) {
                 /* If fixup is less than 16, it means uaccess error */
                 if (fixup->fixup < 16) {
-                        current_thread_info()->uaccess_err = -EFAULT;
+                        current_thread_info()->uaccess_err = 1;
                         regs->ip += fixup->fixup;
                         return 1;
                 }
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 5db0490deb07..9d74824a708d 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -626,7 +626,7 @@ pgtable_bad(struct pt_regs *regs, unsigned long error_code,
 
 static noinline void
 no_context(struct pt_regs *regs, unsigned long error_code,
-           unsigned long address)
+           unsigned long address, int signal, int si_code)
 {
         struct task_struct *tsk = current;
         unsigned long *stackend;
@@ -634,8 +634,17 @@ no_context(struct pt_regs *regs, unsigned long error_code,
         int sig;
 
         /* Are we prepared to handle this kernel fault? */
-        if (fixup_exception(regs))
+        if (fixup_exception(regs)) {
+                if (current_thread_info()->sig_on_uaccess_error && signal) {
+                        tsk->thread.trap_no = 14;
+                        tsk->thread.error_code = error_code | PF_USER;
+                        tsk->thread.cr2 = address;
+
+                        /* XXX: hwpoison faults will set the wrong code. */
+                        force_sig_info_fault(signal, si_code, address, tsk, 0);
+                }
                 return;
+        }
 
         /*
          * 32-bit:
@@ -755,7 +764,7 @@ __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
         if (is_f00f_bug(regs, address))
                 return;
 
-        no_context(regs, error_code, address);
+        no_context(regs, error_code, address, SIGSEGV, si_code);
 }
 
 static noinline void
@@ -819,7 +828,7 @@ do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
 
         /* Kernel mode? Handle exceptions or die: */
         if (!(error_code & PF_USER)) {
-                no_context(regs, error_code, address);
+                no_context(regs, error_code, address, SIGBUS, BUS_ADRERR);
                 return;
         }
 
@@ -854,7 +863,7 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code,
                 if (!(fault & VM_FAULT_RETRY))
                         up_read(&current->mm->mmap_sem);
                 if (!(error_code & PF_USER))
-                        no_context(regs, error_code, address);
+                        no_context(regs, error_code, address, 0, 0);
                 return 1;
         }
         if (!(fault & VM_FAULT_ERROR))
@@ -864,7 +873,8 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code,
                 /* Kernel mode? Handle exceptions or die: */
                 if (!(error_code & PF_USER)) {
                         up_read(&current->mm->mmap_sem);
-                        no_context(regs, error_code, address);
+                        no_context(regs, error_code, address,
+                                   SIGSEGV, SEGV_MAPERR);
                         return 1;
                 }
 
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index ea305856151c..dd74e46828c0 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -201,6 +201,8 @@ static noinline int gup_huge_pud(pud_t pud, unsigned long addr,
         do {
                 VM_BUG_ON(compound_head(page) != head);
                 pages[*nr] = page;
+                if (PageTail(page))
+                        get_huge_page_tail(page);
                 (*nr)++;
                 page++;
                 refs++;
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index b49962662101..f4f29b19fac5 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -45,6 +45,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
         BUG_ON(!pte_none(*(kmap_pte-idx)));
         set_pte(kmap_pte-idx, mk_pte(page, prot));
+        arch_flush_lazy_mmu_mode();
 
         return (void *)vaddr;
 }
@@ -88,6 +89,7 @@ void __kunmap_atomic(void *kvaddr)
                  */
                 kpte_clear_flush(kmap_pte-idx, vaddr);
                 kmap_atomic_idx_pop();
+                arch_flush_lazy_mmu_mode();
         }
 #ifdef CONFIG_DEBUG_HIGHMEM
         else {
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 87488b93a65c..a298914058f9 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -67,7 +67,7 @@ static void __init find_early_table_space(unsigned long end, int use_pse,
         good_end = max_pfn_mapped << PAGE_SHIFT;
 
         base = memblock_find_in_range(start, good_end, tables, PAGE_SIZE);
-        if (base == MEMBLOCK_ERROR)
+        if (!base)
                 panic("Cannot find space for the kernel page tables");
 
         pgt_buf_start = base >> PAGE_SHIFT;
@@ -80,7 +80,7 @@ static void __init find_early_table_space(unsigned long end, int use_pse,
 
 void __init native_pagetable_reserve(u64 start, u64 end)
 {
-        memblock_x86_reserve_range(start, end, "PGTABLE");
+        memblock_reserve(start, end - start);
 }
 
 struct map_range {
@@ -279,8 +279,8 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
          * pgt_buf_end) and free the other ones (pgt_buf_end - pgt_buf_top)
          * so that they can be reused for other purposes.
          *
-         * On native it just means calling memblock_x86_reserve_range, on Xen it
-         * also means marking RW the pagetable pages that we allocated before
+         * On native it just means calling memblock_reserve, on Xen it also
+         * means marking RW the pagetable pages that we allocated before
          * but that haven't been used.
          *
          * In fact on xen we mark RO the whole range pgt_buf_start -
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 29f7c6d98179..0c1da394a634 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -427,23 +427,17 @@ static void __init add_one_highpage_init(struct page *page)
 void __init add_highpages_with_active_regions(int nid,
                          unsigned long start_pfn, unsigned long end_pfn)
 {
-        struct range *range;
-        int nr_range;
-        int i;
-
-        nr_range = __get_free_all_memory_range(&range, nid, start_pfn, end_pfn);
-
-        for (i = 0; i < nr_range; i++) {
-                struct page *page;
-                int node_pfn;
-
-                for (node_pfn = range[i].start; node_pfn < range[i].end;
-                     node_pfn++) {
-                        if (!pfn_valid(node_pfn))
-                                continue;
-                        page = pfn_to_page(node_pfn);
-                        add_one_highpage_init(page);
-                }
+        phys_addr_t start, end;
+        u64 i;
+
+        for_each_free_mem_range(i, nid, &start, &end, NULL) {
+                unsigned long pfn = clamp_t(unsigned long, PFN_UP(start),
+                                            start_pfn, end_pfn);
+                unsigned long e_pfn = clamp_t(unsigned long, PFN_DOWN(end),
+                                              start_pfn, end_pfn);
+                for ( ; pfn < e_pfn; pfn++)
+                        if (pfn_valid(pfn))
+                                add_one_highpage_init(pfn_to_page(pfn));
         }
 }
 #else
@@ -650,18 +644,18 @@ void __init initmem_init(void)
         highstart_pfn = highend_pfn = max_pfn;
         if (max_pfn > max_low_pfn)
                 highstart_pfn = max_low_pfn;
-        memblock_x86_register_active_regions(0, 0, highend_pfn);
-        sparse_memory_present_with_active_regions(0);
         printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",
                 pages_to_mb(highend_pfn - highstart_pfn));
         num_physpages = highend_pfn;
         high_memory = (void *) __va(highstart_pfn * PAGE_SIZE - 1) + 1;
 #else
-        memblock_x86_register_active_regions(0, 0, max_low_pfn);
-        sparse_memory_present_with_active_regions(0);
         num_physpages = max_low_pfn;
         high_memory = (void *) __va(max_low_pfn * PAGE_SIZE - 1) + 1;
 #endif
+
+        memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
+        sparse_memory_present_with_active_regions(0);
+
 #ifdef CONFIG_FLATMEM
         max_mapnr = num_physpages;
 #endif
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index bbaaa005bf0e..a8a56ce3a962 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -608,7 +608,7 @@ kernel_physical_mapping_init(unsigned long start,
 #ifndef CONFIG_NUMA
 void __init initmem_init(void)
 {
-        memblock_x86_register_active_regions(0, 0, max_pfn);
+        memblock_set_node(0, (phys_addr_t)ULLONG_MAX, 0);
 }
 #endif
 
diff --git a/arch/x86/mm/memblock.c b/arch/x86/mm/memblock.c
deleted file mode 100644
index 992da5ec5a64..000000000000
--- a/arch/x86/mm/memblock.c
+++ /dev/null
@@ -1,348 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/bitops.h>
-#include <linux/memblock.h>
-#include <linux/bootmem.h>
-#include <linux/mm.h>
-#include <linux/range.h>
-
-/* Check for already reserved areas */
-bool __init memblock_x86_check_reserved_size(u64 *addrp, u64 *sizep, u64 align)
-{
-        struct memblock_region *r;
-        u64 addr = *addrp, last;
-        u64 size = *sizep;
-        bool changed = false;
-
-again:
-        last = addr + size;
-        for_each_memblock(reserved, r) {
-                if (last > r->base && addr < r->base) {
-                        size = r->base - addr;
-                        changed = true;
-                        goto again;
-                }
-                if (last > (r->base + r->size) && addr < (r->base + r->size)) {
-                        addr = round_up(r->base + r->size, align);
-                        size = last - addr;
-                        changed = true;
-                        goto again;
-                }
-                if (last <= (r->base + r->size) && addr >= r->base) {
-                        *sizep = 0;
-                        return false;
-                }
-        }
-        if (changed) {
-                *addrp = addr;
-                *sizep = size;
-        }
-        return changed;
-}
-
-/*
- * Find next free range after start, and size is returned in *sizep
- */
-u64 __init memblock_x86_find_in_range_size(u64 start, u64 *sizep, u64 align)
-{
-        struct memblock_region *r;
-
-        for_each_memblock(memory, r) {
-                u64 ei_start = r->base;
-                u64 ei_last = ei_start + r->size;
-                u64 addr;
-
-                addr = round_up(ei_start, align);
-                if (addr < start)
-                        addr = round_up(start, align);
-                if (addr >= ei_last)
-                        continue;
-                *sizep = ei_last - addr;
-                while (memblock_x86_check_reserved_size(&addr, sizep, align))
-                        ;
-
-                if (*sizep)
-                        return addr;
-        }
-
-        return MEMBLOCK_ERROR;
-}
-
-static __init struct range *find_range_array(int count)
-{
-        u64 end, size, mem;
-        struct range *range;
-
-        size = sizeof(struct range) * count;
-        end = memblock.current_limit;
-
-        mem = memblock_find_in_range(0, end, size, sizeof(struct range));
-        if (mem == MEMBLOCK_ERROR)
-                panic("can not find more space for range array");
-
-        /*
-         * This range is tempoaray, so don't reserve it, it will not be
-         * overlapped because We will not alloccate new buffer before
-         * We discard this one
-         */
-        range = __va(mem);
-        memset(range, 0, size);
-
-        return range;
-}
-
-static void __init memblock_x86_subtract_reserved(struct range *range, int az)
-{
-        u64 final_start, final_end;
-        struct memblock_region *r;
-
-        /* Take out region array itself at first*/
-        memblock_free_reserved_regions();
-
-        memblock_dbg("Subtract (%ld early reservations)\n", memblock.reserved.cnt);
-
-        for_each_memblock(reserved, r) {
-                memblock_dbg("  [%010llx-%010llx]\n", (u64)r->base, (u64)r->base + r->size - 1);
-                final_start = PFN_DOWN(r->base);
-                final_end = PFN_UP(r->base + r->size);
-                if (final_start >= final_end)
-                        continue;
-                subtract_range(range, az, final_start, final_end);
-        }
-
-        /* Put region array back ? */
-        memblock_reserve_reserved_regions();
-}
-
-struct count_data {
-        int nr;
-};
-
-static int __init count_work_fn(unsigned long start_pfn,
-                                unsigned long end_pfn, void *datax)
-{
-        struct count_data *data = datax;
-
-        data->nr++;
-
-        return 0;
-}
-
-static int __init count_early_node_map(int nodeid)
-{
-        struct count_data data;
-
-        data.nr = 0;
-        work_with_active_regions(nodeid, count_work_fn, &data);
-
-        return data.nr;
-}
-
-int __init __get_free_all_memory_range(struct range **rangep, int nodeid,
-                         unsigned long start_pfn, unsigned long end_pfn)
-{
-        int count;
-        struct range *range;
-        int nr_range;
-
-        count = (memblock.reserved.cnt + count_early_node_map(nodeid)) * 2;
-
-        range = find_range_array(count);
-        nr_range = 0;
-
-        /*
-         * Use early_node_map[] and memblock.reserved.region to get range array
-         * at first
-         */
-        nr_range = add_from_early_node_map(range, count, nr_range, nodeid);
-        subtract_range(range, count, 0, start_pfn);
-        subtract_range(range, count, end_pfn, -1ULL);
-
-        memblock_x86_subtract_reserved(range, count);
-        nr_range = clean_sort_range(range, count);
-
-        *rangep = range;
-        return nr_range;
-}
-
-int __init get_free_all_memory_range(struct range **rangep, int nodeid)
-{
-        unsigned long end_pfn = -1UL;
-
-#ifdef CONFIG_X86_32
-        end_pfn = max_low_pfn;
-#endif
-        return __get_free_all_memory_range(rangep, nodeid, 0, end_pfn);
-}
-
-static u64 __init __memblock_x86_memory_in_range(u64 addr, u64 limit, bool get_free)
-{
-        int i, count;
-        struct range *range;
-        int nr_range;
-        u64 final_start, final_end;
-        u64 free_size;
-        struct memblock_region *r;
-
-        count = (memblock.reserved.cnt + memblock.memory.cnt) * 2;
-
-        range = find_range_array(count);
-        nr_range = 0;
-
-        addr = PFN_UP(addr);
-        limit = PFN_DOWN(limit);
-
-        for_each_memblock(memory, r) {
-                final_start = PFN_UP(r->base);
-                final_end = PFN_DOWN(r->base + r->size);
-                if (final_start >= final_end)
-                        continue;
-                if (final_start >= limit || final_end <= addr)
-                        continue;
-
-                nr_range = add_range(range, count, nr_range, final_start, final_end);
-        }
-        subtract_range(range, count, 0, addr);
-        subtract_range(range, count, limit, -1ULL);
-
-        /* Subtract memblock.reserved.region in range ? */
-        if (!get_free)
-                goto sort_and_count_them;
-        for_each_memblock(reserved, r) {
-                final_start = PFN_DOWN(r->base);
-                final_end = PFN_UP(r->base + r->size);
-                if (final_start >= final_end)
-                        continue;
-                if (final_start >= limit || final_end <= addr)
-                        continue;
-
-                subtract_range(range, count, final_start, final_end);
-        }
-
-sort_and_count_them:
-        nr_range = clean_sort_range(range, count);
-
-        free_size = 0;
-        for (i = 0; i < nr_range; i++)
-                free_size += range[i].end - range[i].start;
-
-        return free_size << PAGE_SHIFT;
-}
-
-u64 __init memblock_x86_free_memory_in_range(u64 addr, u64 limit)
-{
-        return __memblock_x86_memory_in_range(addr, limit, true);
-}
-
-u64 __init memblock_x86_memory_in_range(u64 addr, u64 limit)
-{
-        return __memblock_x86_memory_in_range(addr, limit, false);
-}
-
-void __init memblock_x86_reserve_range(u64 start, u64 end, char *name)
-{
-        if (start == end)
-                return;
-
-        if (WARN_ONCE(start > end, "memblock_x86_reserve_range: wrong range [%#llx, %#llx)\n", start, end))
-                return;
-
-        memblock_dbg("    memblock_x86_reserve_range: [%#010llx-%#010llx] %16s\n", start, end - 1, name);
-
-        memblock_reserve(start, end - start);
-}
-
-void __init memblock_x86_free_range(u64 start, u64 end)
-{
-        if (start == end)
-                return;
-
-        if (WARN_ONCE(start > end, "memblock_x86_free_range: wrong range [%#llx, %#llx)\n", start, end))
-                return;
-
-        memblock_dbg("       memblock_x86_free_range: [%#010llx-%#010llx]\n", start, end - 1);
-
-        memblock_free(start, end - start);
-}
-
-/*
- * Need to call this function after memblock_x86_register_active_regions,
- * so early_node_map[] is filled already.
- */
-u64 __init memblock_x86_find_in_range_node(int nid, u64 start, u64 end, u64 size, u64 align)
-{
-        u64 addr;
-        addr = find_memory_core_early(nid, size, align, start, end);
-        if (addr != MEMBLOCK_ERROR)
-                return addr;
-
-        /* Fallback, should already have start end within node range */
-        return memblock_find_in_range(start, end, size, align);
-}
-
-/*
- * Finds an active region in the address range from start_pfn to last_pfn and
- * returns its range in ei_startpfn and ei_endpfn for the memblock entry.
- */
-static int __init memblock_x86_find_active_region(const struct memblock_region *ei,
-                                  unsigned long start_pfn,
-                                  unsigned long last_pfn,
-                                  unsigned long *ei_startpfn,
-                                  unsigned long *ei_endpfn)
-{
-        u64 align = PAGE_SIZE;
-
-        *ei_startpfn = round_up(ei->base, align) >> PAGE_SHIFT;
-        *ei_endpfn = round_down(ei->base + ei->size, align) >> PAGE_SHIFT;
-
-        /* Skip map entries smaller than a page */
-        if (*ei_startpfn >= *ei_endpfn)
-                return 0;
-
-        /* Skip if map is outside the node */
-        if (*ei_endpfn <= start_pfn || *ei_startpfn >= last_pfn)
-                return 0;
-
-        /* Check for overlaps */
-        if (*ei_startpfn < start_pfn)
-                *ei_startpfn = start_pfn;
-        if (*ei_endpfn > last_pfn)
-                *ei_endpfn = last_pfn;
-
-        return 1;
-}
-
-/* Walk the memblock.memory map and register active regions within a node */
-void __init memblock_x86_register_active_regions(int nid, unsigned long start_pfn,
-                                         unsigned long last_pfn)
-{
-        unsigned long ei_startpfn;
-        unsigned long ei_endpfn;
-        struct memblock_region *r;
-
-        for_each_memblock(memory, r)
-                if (memblock_x86_find_active_region(r, start_pfn, last_pfn,
-                                           &ei_startpfn, &ei_endpfn))
-                        add_active_range(nid, ei_startpfn, ei_endpfn);
-}
-
-/*
- * Find the hole size (in bytes) in the memory range.
- * @start: starting address of the memory range to scan
- * @end: ending address of the memory range to scan
- */
-u64 __init memblock_x86_hole_size(u64 start, u64 end)
-{
-        unsigned long start_pfn = start >> PAGE_SHIFT;
-        unsigned long last_pfn = end >> PAGE_SHIFT;
-        unsigned long ei_startpfn, ei_endpfn, ram = 0;
-        struct memblock_region *r;
-
-        for_each_memblock(memory, r)
-                if (memblock_x86_find_active_region(r, start_pfn, last_pfn,
-                                           &ei_startpfn, &ei_endpfn))
-                        ram += ei_endpfn - ei_startpfn;
-
-        return end - start - ((u64)ram << PAGE_SHIFT);
-}
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c
index 92faf3a1c53e..c80b9fb95734 100644
--- a/arch/x86/mm/memtest.c
+++ b/arch/x86/mm/memtest.c
@@ -34,7 +34,7 @@ static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad)
                (unsigned long long) pattern,
                (unsigned long long) start_bad,
                (unsigned long long) end_bad);
-        memblock_x86_reserve_range(start_bad, end_bad, "BAD RAM");
+        memblock_reserve(start_bad, end_bad - start_bad);
 }
 
 static void __init memtest(u64 pattern, u64 start_phys, u64 size)
@@ -70,24 +70,19 @@ static void __init memtest(u64 pattern, u64 start_phys, u64 size)
 
 static void __init do_one_pass(u64 pattern, u64 start, u64 end)
 {
-        u64 size = 0;
-
-        while (start < end) {
-                start = memblock_x86_find_in_range_size(start, &size, 1);
-
-                /* done ? */
-                if (start >= end)
-                        break;
-                if (start + size > end)
-                        size = end - start;
-
-                printk(KERN_INFO "  %010llx - %010llx pattern %016llx\n",
-                       (unsigned long long) start,
-                       (unsigned long long) start + size,
-                       (unsigned long long) cpu_to_be64(pattern));
-                memtest(pattern, start, size);
-
-                start += size;
+        u64 i;
+        phys_addr_t this_start, this_end;
+
+        for_each_free_mem_range(i, MAX_NUMNODES, &this_start, &this_end, NULL) {
+                this_start = clamp_t(phys_addr_t, this_start, start, end);
+                this_end = clamp_t(phys_addr_t, this_end, start, end);
+                if (this_start < this_end) {
+                        printk(KERN_INFO "  %010llx - %010llx pattern %016llx\n",
+                               (unsigned long long)this_start,
+                               (unsigned long long)this_end,
+                               (unsigned long long)cpu_to_be64(pattern));
+                        memtest(pattern, this_start, this_end - this_start);
+                }
         }
 }
 
diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c
index fbeaaf416610..496f494593bf 100644
--- a/arch/x86/mm/numa.c
+++ b/arch/x86/mm/numa.c
@@ -192,8 +192,6 @@ int __init numa_add_memblk(int nid, u64 start, u64 end)
 /* Initialize NODE_DATA for a node on the local memory */
 static void __init setup_node_data(int nid, u64 start, u64 end)
 {
-        const u64 nd_low = PFN_PHYS(MAX_DMA_PFN);
-        const u64 nd_high = PFN_PHYS(max_pfn_mapped);
         const size_t nd_size = roundup(sizeof(pg_data_t), PAGE_SIZE);
         bool remapped = false;
         u64 nd_pa;
@@ -224,17 +222,12 @@ static void __init setup_node_data(int nid, u64 start, u64 end)
                 nd_pa = __pa(nd);
                 remapped = true;
         } else {
-                nd_pa = memblock_x86_find_in_range_node(nid, nd_low, nd_high,
-                                                nd_size, SMP_CACHE_BYTES);
-                if (nd_pa == MEMBLOCK_ERROR)
-                        nd_pa = memblock_find_in_range(nd_low, nd_high,
-                                                nd_size, SMP_CACHE_BYTES);
-                if (nd_pa == MEMBLOCK_ERROR) {
+                nd_pa = memblock_alloc_nid(nd_size, SMP_CACHE_BYTES, nid);
+                if (!nd_pa) {
                         pr_err("Cannot find %zu bytes in node %d\n",
                                nd_size, nid);
                         return;
                 }
-                memblock_x86_reserve_range(nd_pa, nd_pa + nd_size, "NODE_DATA");
                 nd = __va(nd_pa);
         }
 
@@ -371,8 +364,7 @@ void __init numa_reset_distance(void)
 
         /* numa_distance could be 1LU marking allocation failure, test cnt */
         if (numa_distance_cnt)
-                memblock_x86_free_range(__pa(numa_distance),
-                                        __pa(numa_distance) + size);
+                memblock_free(__pa(numa_distance), size);
         numa_distance_cnt = 0;
         numa_distance = NULL;   /* enable table creation */
 }
@@ -395,13 +387,13 @@ static int __init numa_alloc_distance(void)
 
         phys = memblock_find_in_range(0, PFN_PHYS(max_pfn_mapped),
                                       size, PAGE_SIZE);
-        if (phys == MEMBLOCK_ERROR) {
+        if (!phys) {
                 pr_warning("NUMA: Warning: can't allocate distance table!\n");
                 /* don't retry until explicitly reset */
                 numa_distance = (void *)1LU;
                 return -ENOMEM;
         }
-        memblock_x86_reserve_range(phys, phys + size, "NUMA DIST");
+        memblock_reserve(phys, size);
 
         numa_distance = __va(phys);
         numa_distance_cnt = cnt;
@@ -482,8 +474,8 @@ static bool __init numa_meminfo_cover_memory(const struct numa_meminfo *mi)
                         numaram = 0;
         }
 
-        e820ram = max_pfn - (memblock_x86_hole_size(0,
-                                        PFN_PHYS(max_pfn)) >> PAGE_SHIFT);
+        e820ram = max_pfn - absent_pages_in_range(0, max_pfn);
+
         /* We seem to lose 3 pages somewhere. Allow 1M of slack. */
         if ((s64)(e820ram - numaram) >= (1 << (20 - PAGE_SHIFT))) {
                 printk(KERN_ERR "NUMA: nodes only cover %LuMB of your %LuMB e820 RAM. Not used.\n",
@@ -505,13 +497,10 @@ static int __init numa_register_memblks(struct numa_meminfo *mi)
         if (WARN_ON(nodes_empty(node_possible_map)))
                 return -EINVAL;
 
-        for (i = 0; i < mi->nr_blks; i++)
-                memblock_x86_register_active_regions(mi->blk[i].nid,
-                                        mi->blk[i].start >> PAGE_SHIFT,
-                                        mi->blk[i].end >> PAGE_SHIFT);
-
-        /* for out of order entries */
-        sort_node_map();
+        for (i = 0; i < mi->nr_blks; i++) {
+                struct numa_memblk *mb = &mi->blk[i];
+                memblock_set_node(mb->start, mb->end - mb->start, mb->nid);
+        }
 
         /*
          * If sections array is gonna be used for pfn -> nid mapping, check
@@ -545,6 +534,8 @@ static int __init numa_register_memblks(struct numa_meminfo *mi)
                         setup_node_data(nid, start, end);
         }
 
+        /* Dump memblock with node info and return. */
+        memblock_dump_all();
         return 0;
 }
 
@@ -582,7 +573,7 @@ static int __init numa_init(int (*init_func)(void))
         nodes_clear(node_possible_map);
         nodes_clear(node_online_map);
         memset(&numa_meminfo, 0, sizeof(numa_meminfo));
-        remove_all_active_ranges();
+        WARN_ON(memblock_set_node(0, ULLONG_MAX, MAX_NUMNODES));
         numa_reset_distance();
 
         ret = init_func();
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c
index 3adebe7e536a..534255a36b6b 100644
--- a/arch/x86/mm/numa_32.c
+++ b/arch/x86/mm/numa_32.c
@@ -199,23 +199,23 @@ void __init init_alloc_remap(int nid, u64 start, u64 end)
 
         /* allocate node memory and the lowmem remap area */
         node_pa = memblock_find_in_range(start, end, size, LARGE_PAGE_BYTES);
-        if (node_pa == MEMBLOCK_ERROR) {
+        if (!node_pa) {
                 pr_warning("remap_alloc: failed to allocate %lu bytes for node %d\n",
                            size, nid);
                 return;
         }
-        memblock_x86_reserve_range(node_pa, node_pa + size, "KVA RAM");
+        memblock_reserve(node_pa, size);
 
         remap_pa = memblock_find_in_range(min_low_pfn << PAGE_SHIFT,
                                           max_low_pfn << PAGE_SHIFT,
                                           size, LARGE_PAGE_BYTES);
-        if (remap_pa == MEMBLOCK_ERROR) {
+        if (!remap_pa) {
                 pr_warning("remap_alloc: failed to allocate %lu bytes remap area for node %d\n",
                            size, nid);
-                memblock_x86_free_range(node_pa, node_pa + size);
+                memblock_free(node_pa, size);
                 return;
         }
-        memblock_x86_reserve_range(remap_pa, remap_pa + size, "KVA PG");
+        memblock_reserve(remap_pa, size);
         remap_va = phys_to_virt(remap_pa);
 
         /* perform actual remap */
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index dd27f401f0a0..92e27119ee1a 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -19,7 +19,7 @@ unsigned long __init numa_free_all_bootmem(void)
         for_each_online_node(i)
                 pages += free_all_bootmem_node(NODE_DATA(i));
 
-        pages += free_all_memory_core_early(MAX_NUMNODES);
+        pages += free_low_memory_core_early(MAX_NUMNODES);
 
         return pages;
 }
diff --git a/arch/x86/mm/numa_emulation.c b/arch/x86/mm/numa_emulation.c
index d0ed086b6247..46db56845f18 100644
--- a/arch/x86/mm/numa_emulation.c
+++ b/arch/x86/mm/numa_emulation.c
@@ -28,6 +28,16 @@ static int __init emu_find_memblk_by_nid(int nid, const struct numa_meminfo *mi)
         return -ENOENT;
 }
 
+static u64 mem_hole_size(u64 start, u64 end)
+{
+        unsigned long start_pfn = PFN_UP(start);
+        unsigned long end_pfn = PFN_DOWN(end);
+
+        if (start_pfn < end_pfn)
+                return PFN_PHYS(absent_pages_in_range(start_pfn, end_pfn));
+        return 0;
+}
+
 /*
  * Sets up nid to range from @start to @end.  The return value is -errno if
  * something went wrong, 0 otherwise.
@@ -89,7 +99,7 @@ static int __init split_nodes_interleave(struct numa_meminfo *ei,
          * Calculate target node size.  x86_32 freaks on __udivdi3() so do
          * the division in ulong number of pages and convert back.
          */
-        size = max_addr - addr - memblock_x86_hole_size(addr, max_addr);
+        size = max_addr - addr - mem_hole_size(addr, max_addr);
         size = PFN_PHYS((unsigned long)(size >> PAGE_SHIFT) / nr_nodes);
 
         /*
@@ -135,8 +145,7 @@ static int __init split_nodes_interleave(struct numa_meminfo *ei,
                          * Continue to add memory to this fake node if its
                          * non-reserved memory is less than the per-node size.
                          */
-                        while (end - start -
-                               memblock_x86_hole_size(start, end) < size) {
+                        while (end - start - mem_hole_size(start, end) < size) {
                                 end += FAKE_NODE_MIN_SIZE;
                                 if (end > limit) {
                                         end = limit;
@@ -150,7 +159,7 @@ static int __init split_nodes_interleave(struct numa_meminfo *ei,
                          * this one must extend to the boundary.
                          */
                         if (end < dma32_end && dma32_end - end -
-                            memblock_x86_hole_size(end, dma32_end) < FAKE_NODE_MIN_SIZE)
+                            mem_hole_size(end, dma32_end) < FAKE_NODE_MIN_SIZE)
                                 end = dma32_end;
 
                         /*
@@ -158,8 +167,7 @@ static int __init split_nodes_interleave(struct numa_meminfo *ei,
                          * next node, this one must extend to the end of the
                          * physical node.
                          */
-                        if (limit - end -
-                            memblock_x86_hole_size(end, limit) < size)
+                        if (limit - end - mem_hole_size(end, limit) < size)
                                 end = limit;
 
                         ret = emu_setup_memblk(ei, pi, nid++ % nr_nodes,
@@ -180,7 +188,7 @@ static u64 __init find_end_of_node(u64 start, u64 max_addr, u64 size)
 {
         u64 end = start + size;
 
-        while (end - start - memblock_x86_hole_size(start, end) < size) {
+        while (end - start - mem_hole_size(start, end) < size) {
                 end += FAKE_NODE_MIN_SIZE;
                 if (end > max_addr) {
                         end = max_addr;
@@ -211,8 +219,7 @@ static int __init split_nodes_size_interleave(struct numa_meminfo *ei,
          * creates a uniform distribution of node sizes across the entire
          * machine (but not necessarily over physical nodes).
          */
-        min_size = (max_addr - addr - memblock_x86_hole_size(addr, max_addr)) /
-                                                MAX_NUMNODES;
+        min_size = (max_addr - addr - mem_hole_size(addr, max_addr)) / MAX_NUMNODES;
         min_size = max(min_size, FAKE_NODE_MIN_SIZE);
         if ((min_size & FAKE_NODE_MIN_HASH_MASK) < min_size)
                 min_size = (min_size + FAKE_NODE_MIN_SIZE) &
@@ -252,7 +259,7 @@ static int __init split_nodes_size_interleave(struct numa_meminfo *ei,
                          * this one must extend to the boundary.
                          */
                         if (end < dma32_end && dma32_end - end -
-                            memblock_x86_hole_size(end, dma32_end) < FAKE_NODE_MIN_SIZE)
+                            mem_hole_size(end, dma32_end) < FAKE_NODE_MIN_SIZE)
                                 end = dma32_end;
 
                         /*
@@ -260,8 +267,7 @@ static int __init split_nodes_size_interleave(struct numa_meminfo *ei,
                          * next node, this one must extend to the end of the
                          * physical node.
                          */
-                        if (limit - end -
-                            memblock_x86_hole_size(end, limit) < size)
+                        if (limit - end - mem_hole_size(end, limit) < size)
                                 end = limit;
 
                         ret = emu_setup_memblk(ei, pi, nid++ % MAX_NUMNODES,
@@ -351,11 +357,11 @@ void __init numa_emulation(struct numa_meminfo *numa_meminfo, int numa_dist_cnt)
 
                 phys = memblock_find_in_range(0, PFN_PHYS(max_pfn_mapped),
                                               phys_size, PAGE_SIZE);
-                if (phys == MEMBLOCK_ERROR) {
+                if (!phys) {
                         pr_warning("NUMA: Warning: can't allocate copy of distance table, disabling emulation\n");
                         goto no_emu;
                 }
-                memblock_x86_reserve_range(phys, phys + phys_size, "TMP NUMA DIST");
+                memblock_reserve(phys, phys_size);
                 phys_dist = __va(phys);
 
                 for (i = 0; i < numa_dist_cnt; i++)
@@ -424,7 +430,7 @@ void __init numa_emulation(struct numa_meminfo *numa_meminfo, int numa_dist_cnt)
 
         /* free the copied physical distance table */
         if (phys_dist)
-                memblock_x86_free_range(__pa(phys_dist), __pa(phys_dist) + phys_size);
+                memblock_free(__pa(phys_dist), phys_size);
         return;
 
 no_emu:
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index f9e526742fa1..eda2acbb6e81 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -998,7 +998,7 @@ out_err:
 }
 EXPORT_SYMBOL(set_memory_uc);
 
-int _set_memory_array(unsigned long *addr, int addrinarray,
+static int _set_memory_array(unsigned long *addr, int addrinarray,
                 unsigned long new_type)
 {
         int i, j;
diff --git a/arch/x86/mm/srat.c b/arch/x86/mm/srat.c
index 81dbfdeb080d..fd61b3fb7341 100644
--- a/arch/x86/mm/srat.c
+++ b/arch/x86/mm/srat.c
@@ -69,6 +69,12 @@ acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa)
         if ((pa->flags & ACPI_SRAT_CPU_ENABLED) == 0)
                 return;
         pxm = pa->proximity_domain;
+        apic_id = pa->apic_id;
+        if (!cpu_has_x2apic && (apic_id >= 0xff)) {
+                printk(KERN_INFO "SRAT: PXM %u -> X2APIC 0x%04x ignored\n",
+                         pxm, apic_id);
+                return;
+        }
         node = setup_node(pxm);
         if (node < 0) {
                 printk(KERN_ERR "SRAT: Too many proximity domains %x\n", pxm);
@@ -76,7 +82,6 @@ acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa)
                 return;
         }
 
-        apic_id = pa->apic_id;
         if (apic_id >= MAX_LOCAL_APIC) {
                 printk(KERN_INFO "SRAT: PXM %u -> APIC 0x%04x -> Node %u skipped apicid that is too big\n", pxm, apic_id, node);
                 return;
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index bfab3fa10edc..7b65f752c5f8 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -568,8 +568,8 @@ cond_branch:			f_offset = addrs[i + filter[i].jf] - addrs[i];
                                         break;
                                 }
                                 if (filter[i].jt != 0) {
-                                        if (filter[i].jf)
-                                                t_offset += is_near(f_offset) ? 2 : 6;
+                                        if (filter[i].jf && f_offset)
+                                                t_offset += is_near(f_offset) ? 2 : 5;
                                         EMIT_COND_JMP(t_op, t_offset);
                                         if (filter[i].jf)
                                                 EMIT_JMP(f_offset);
diff --git a/arch/x86/oprofile/Makefile b/arch/x86/oprofile/Makefile
index 446902b2a6b6..1599f568f0e2 100644
--- a/arch/x86/oprofile/Makefile
+++ b/arch/x86/oprofile/Makefile
@@ -4,9 +4,8 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
                 oprof.o cpu_buffer.o buffer_sync.o \
                 event_buffer.o oprofile_files.o \
                 oprofilefs.o oprofile_stats.o  \
-                timer_int.o )
+                timer_int.o nmi_timer_int.o )
 
 oprofile-y                              := $(DRIVER_OBJS) init.o backtrace.o
 oprofile-$(CONFIG_X86_LOCAL_APIC)       += nmi_int.o op_model_amd.o \
                                            op_model_ppro.o op_model_p4.o
-oprofile-$(CONFIG_X86_IO_APIC)          += nmi_timer_int.o
diff --git a/arch/x86/oprofile/init.c b/arch/x86/oprofile/init.c
index cdfe4c54deca..9e138d00ad36 100644
--- a/arch/x86/oprofile/init.c
+++ b/arch/x86/oprofile/init.c
@@ -16,34 +16,23 @@
  * with the NMI mode driver.
  */
 
+#ifdef CONFIG_X86_LOCAL_APIC
 extern int op_nmi_init(struct oprofile_operations *ops);
-extern int op_nmi_timer_init(struct oprofile_operations *ops);
 extern void op_nmi_exit(void);
-extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth);
+#else
+static int op_nmi_init(struct oprofile_operations *ops) { return -ENODEV; }
+static void op_nmi_exit(void) { }
+#endif
 
+extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth);
 
 int __init oprofile_arch_init(struct oprofile_operations *ops)
 {
-        int ret;
-
-        ret = -ENODEV;
-
-#ifdef CONFIG_X86_LOCAL_APIC
-        ret = op_nmi_init(ops);
-#endif
-#ifdef CONFIG_X86_IO_APIC
-        if (ret < 0)
-                ret = op_nmi_timer_init(ops);
-#endif
         ops->backtrace = x86_backtrace;
-
-        return ret;
+        return op_nmi_init(ops);
 }
 
-
 void oprofile_arch_exit(void)
 {
-#ifdef CONFIG_X86_LOCAL_APIC
         op_nmi_exit();
-#endif
 }
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 75f9528e0372..26b8a8514ee5 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -595,24 +595,36 @@ static int __init p4_init(char **cpu_type)
         return 0;
 }
 
-static int force_arch_perfmon;
-static int force_cpu_type(const char *str, struct kernel_param *kp)
+enum __force_cpu_type {
+        reserved = 0,           /* do not force */
+        timer,
+        arch_perfmon,
+};
+
+static int force_cpu_type;
+
+static int set_cpu_type(const char *str, struct kernel_param *kp)
 {
-        if (!strcmp(str, "arch_perfmon")) {
-                force_arch_perfmon = 1;
+        if (!strcmp(str, "timer")) {
+                force_cpu_type = timer;
+                printk(KERN_INFO "oprofile: forcing NMI timer mode\n");
+        } else if (!strcmp(str, "arch_perfmon")) {
+                force_cpu_type = arch_perfmon;
                 printk(KERN_INFO "oprofile: forcing architectural perfmon\n");
+        } else {
+                force_cpu_type = 0;
         }
 
         return 0;
 }
-module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0);
+module_param_call(cpu_type, set_cpu_type, NULL, NULL, 0);
 
 static int __init ppro_init(char **cpu_type)
 {
         __u8 cpu_model = boot_cpu_data.x86_model;
         struct op_x86_model_spec *spec = &op_ppro_spec; /* default */
 
-        if (force_arch_perfmon && cpu_has_arch_perfmon)
+        if (force_cpu_type == arch_perfmon && cpu_has_arch_perfmon)
                 return 0;
 
         /*
@@ -679,6 +691,9 @@ int __init op_nmi_init(struct oprofile_operations *ops)
         if (!cpu_has_apic)
                 return -ENODEV;
 
+        if (force_cpu_type == timer)
+                return -ENODEV;
+
         switch (vendor) {
         case X86_VENDOR_AMD:
                 /* Needs to be at least an Athlon (or hammer in 32bit mode) */
diff --git a/arch/x86/oprofile/nmi_timer_int.c b/arch/x86/oprofile/nmi_timer_int.c
deleted file mode 100644
index 7f8052cd6620..000000000000
--- a/arch/x86/oprofile/nmi_timer_int.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/**
- * @file nmi_timer_int.c
- *
- * @remark Copyright 2003 OProfile authors
- * @remark Read the file COPYING
- *
- * @author Zwane Mwaikambo <zwane@linuxpower.ca>
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/errno.h>
-#include <linux/oprofile.h>
-#include <linux/rcupdate.h>
-#include <linux/kdebug.h>
-
-#include <asm/nmi.h>
-#include <asm/apic.h>
-#include <asm/ptrace.h>
-
-static int profile_timer_exceptions_notify(unsigned int val, struct pt_regs *regs)
-{
-        oprofile_add_sample(regs, 0);
-        return NMI_HANDLED;
-}
-
-static int timer_start(void)
-{
-        if (register_nmi_handler(NMI_LOCAL, profile_timer_exceptions_notify,
-                                        0, "oprofile-timer"))
-                return 1;
-        return 0;
-}
-
-
-static void timer_stop(void)
-{
-        unregister_nmi_handler(NMI_LOCAL, "oprofile-timer");
-        synchronize_sched();  /* Allow already-started NMIs to complete. */
-}
-
-
-int __init op_nmi_timer_init(struct oprofile_operations *ops)
-{
-        ops->start = timer_start;
-        ops->stop = timer_stop;
-        ops->cpu_type = "timer";
-        printk(KERN_INFO "oprofile: using NMI timer interrupt.\n");
-        return 0;
-}
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index db0e9a51e611..da8fe0535ff4 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -44,7 +44,7 @@ static inline void set_bios_x(void)
         pcibios_enabled = 1;
         set_memory_x(PAGE_OFFSET + BIOS_BEGIN, (BIOS_END - BIOS_BEGIN) >> PAGE_SHIFT);
         if (__supported_pte_mask & _PAGE_NX)
-                printk(KERN_INFO "PCI : PCI BIOS aera is rw and x. Use pci=nobios if you want it NX.\n");
+                printk(KERN_INFO "PCI : PCI BIOS area is rw and x. Use pci=nobios if you want it NX.\n");
 }
 
 /*
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 37718f0f053d..4cf9bd0a1653 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -238,7 +238,8 @@ static efi_status_t __init phys_efi_get_time(efi_time_t *tm,
 
         spin_lock_irqsave(&rtc_lock, flags);
         efi_call_phys_prelog();
-        status = efi_call_phys2(efi_phys.get_time, tm, tc);
+        status = efi_call_phys2(efi_phys.get_time, virt_to_phys(tm),
+                                virt_to_phys(tc));
         efi_call_phys_epilog();
         spin_unlock_irqrestore(&rtc_lock, flags);
         return status;
@@ -352,8 +353,7 @@ void __init efi_memblock_x86_reserve_range(void)
                 boot_params.efi_info.efi_memdesc_size;
         memmap.desc_version = boot_params.efi_info.efi_memdesc_version;
         memmap.desc_size = boot_params.efi_info.efi_memdesc_size;
-        memblock_x86_reserve_range(pmap, pmap + memmap.nr_map * memmap.desc_size,
-                      "EFI memmap");
+        memblock_reserve(pmap, memmap.nr_map * memmap.desc_size);
 }
 
 #if EFI_DEBUG
@@ -397,16 +397,14 @@ void __init efi_reserve_boot_services(void)
                 if ((start+size >= virt_to_phys(_text)
                                 && start <= virt_to_phys(_end)) ||
                         !e820_all_mapped(start, start+size, E820_RAM) ||
-                        memblock_x86_check_reserved_size(&start, &size,
-                                                        1<<EFI_PAGE_SHIFT)) {
+                        memblock_is_region_reserved(start, size)) {
                         /* Could not reserve, skip it */
                         md->num_pages = 0;
                         memblock_dbg(PFX "Could not reserve boot range "
                                         "[0x%010llx-0x%010llx]\n",
                                                 start, start+size-1);
                 } else
-                        memblock_x86_reserve_range(start, start+size,
-                                                        "EFI Boot");
+                        memblock_reserve(start, size);
         }
 }
 
diff --git a/arch/x86/platform/efi/efi_32.c b/arch/x86/platform/efi/efi_32.c
index e36bf714cb77..40e446941dd7 100644
--- a/arch/x86/platform/efi/efi_32.c
+++ b/arch/x86/platform/efi/efi_32.c
@@ -39,43 +39,14 @@
  */
 
 static unsigned long efi_rt_eflags;
-static pgd_t efi_bak_pg_dir_pointer[2];
 
 void efi_call_phys_prelog(void)
 {
-        unsigned long cr4;
-        unsigned long temp;
         struct desc_ptr gdt_descr;
 
         local_irq_save(efi_rt_eflags);
 
-        /*
-         * If I don't have PAE, I should just duplicate two entries in page
-         * directory. If I have PAE, I just need to duplicate one entry in
-         * page directory.
-         */
-        cr4 = read_cr4_safe();
-
-        if (cr4 & X86_CR4_PAE) {
-                efi_bak_pg_dir_pointer[0].pgd =
-                    swapper_pg_dir[pgd_index(0)].pgd;
-                swapper_pg_dir[0].pgd =
-                    swapper_pg_dir[pgd_index(PAGE_OFFSET)].pgd;
-        } else {
-                efi_bak_pg_dir_pointer[0].pgd =
-                    swapper_pg_dir[pgd_index(0)].pgd;
-                efi_bak_pg_dir_pointer[1].pgd =
-                    swapper_pg_dir[pgd_index(0x400000)].pgd;
-                swapper_pg_dir[pgd_index(0)].pgd =
-                    swapper_pg_dir[pgd_index(PAGE_OFFSET)].pgd;
-                temp = PAGE_OFFSET + 0x400000;
-                swapper_pg_dir[pgd_index(0x400000)].pgd =
-                    swapper_pg_dir[pgd_index(temp)].pgd;
-        }
-
-        /*
-         * After the lock is released, the original page table is restored.
-         */
+        load_cr3(initial_page_table);
         __flush_tlb_all();
 
         gdt_descr.address = __pa(get_cpu_gdt_table(0));
@@ -85,28 +56,13 @@ void efi_call_phys_prelog(void)
 
 void efi_call_phys_epilog(void)
 {
-        unsigned long cr4;
         struct desc_ptr gdt_descr;
 
         gdt_descr.address = (unsigned long)get_cpu_gdt_table(0);
         gdt_descr.size = GDT_SIZE - 1;
         load_gdt(&gdt_descr);
 
-        cr4 = read_cr4_safe();
-
-        if (cr4 & X86_CR4_PAE) {
-                swapper_pg_dir[pgd_index(0)].pgd =
-                    efi_bak_pg_dir_pointer[0].pgd;
-        } else {
-                swapper_pg_dir[pgd_index(0)].pgd =
-                    efi_bak_pg_dir_pointer[0].pgd;
-                swapper_pg_dir[pgd_index(0x400000)].pgd =
-                    efi_bak_pg_dir_pointer[1].pgd;
-        }
-
-        /*
-         * After the lock is released, the original page table is restored.
-         */
+        load_cr3(swapper_pg_dir);
         __flush_tlb_all();
 
         local_irq_restore(efi_rt_eflags);
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index 541020df0da6..ad4ec1cb097e 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
 EXPORT_SYMBOL_GPL(sfi_mrtc_array);
 int sfi_mrtc_num;
 
+static void mrst_power_off(void)
+{
+        if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
+                intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1);
+}
+
+static void mrst_reboot(void)
+{
+        if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
+                intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
+        else
+                intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
+}
+
 /* parse all the mtimer info to a static mtimer array */
 static int __init sfi_parse_mtmr(struct sfi_table_header *table)
 {
@@ -187,11 +201,34 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)
 static unsigned long __init mrst_calibrate_tsc(void)
 {
         unsigned long flags, fast_calibrate;
-
-        local_irq_save(flags);
-        fast_calibrate = apbt_quick_calibrate();
-        local_irq_restore(flags);
-
+        if (__mrst_cpu_chip == MRST_CPU_CHIP_PENWELL) {
+                u32 lo, hi, ratio, fsb;
+
+                rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
+                pr_debug("IA32 perf status is 0x%x, 0x%0x\n", lo, hi);
+                ratio = (hi >> 8) & 0x1f;
+                pr_debug("ratio is %d\n", ratio);
+                if (!ratio) {
+                        pr_err("read a zero ratio, should be incorrect!\n");
+                        pr_err("force tsc ratio to 16 ...\n");
+                        ratio = 16;
+                }
+                rdmsr(MSR_FSB_FREQ, lo, hi);
+                if ((lo & 0x7) == 0x7)
+                        fsb = PENWELL_FSB_FREQ_83SKU;
+                else
+                        fsb = PENWELL_FSB_FREQ_100SKU;
+                fast_calibrate = ratio * fsb;
+                pr_debug("read penwell tsc %lu khz\n", fast_calibrate);
+                lapic_timer_frequency = fsb * 1000 / HZ;
+                /* mark tsc clocksource as reliable */
+                set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE);
+        } else {
+                local_irq_save(flags);
+                fast_calibrate = apbt_quick_calibrate();
+                local_irq_restore(flags);
+        }
+        
         if (fast_calibrate)
                 return fast_calibrate;
 
@@ -242,15 +279,15 @@ static int mrst_i8042_detect(void)
         return 0;
 }
 
-/* Reboot and power off are handled by the SCU on a MID device */
-static void mrst_power_off(void)
-{
-        intel_scu_ipc_simple_command(0xf1, 1);
-}
-
-static void mrst_reboot(void)
+/*
+ * Moorestown does not have external NMI source nor port 0x61 to report
+ * NMI status. The possible NMI sources are from pmu as a result of NMI
+ * watchdog or lock debug. Reading io port 0x61 results in 0xff which
+ * misled NMI handler.
+ */
+static unsigned char mrst_get_nmi_reason(void)
 {
-        intel_scu_ipc_simple_command(0xf1, 0);
+        return 0;
 }
 
 /*
@@ -274,6 +311,8 @@ void __init x86_mrst_early_setup(void)
         x86_platform.calibrate_tsc = mrst_calibrate_tsc;
         x86_platform.i8042_detect = mrst_i8042_detect;
         x86_init.timers.wallclock_init = mrst_rtc_init;
+        x86_platform.get_nmi_reason = mrst_get_nmi_reason;
+
         x86_init.pci.init = pci_mrst_init;
         x86_init.pci.fixup_irqs = x86_init_noop;
 
@@ -448,6 +487,46 @@ static void __init *max7315_platform_data(void *info)
         return max7315;
 }
 
+static void *tca6416_platform_data(void *info)
+{
+        static struct pca953x_platform_data tca6416;
+        struct i2c_board_info *i2c_info = info;
+        int gpio_base, intr;
+        char base_pin_name[SFI_NAME_LEN + 1];
+        char intr_pin_name[SFI_NAME_LEN + 1];
+
+        strcpy(i2c_info->type, "tca6416");
+        strcpy(base_pin_name, "tca6416_base");
+        strcpy(intr_pin_name, "tca6416_int");
+
+        gpio_base = get_gpio_by_name(base_pin_name);
+        intr = get_gpio_by_name(intr_pin_name);
+
+        if (gpio_base == -1)
+                return NULL;
+        tca6416.gpio_base = gpio_base;
+        if (intr != -1) {
+                i2c_info->irq = intr + MRST_IRQ_OFFSET;
+                tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET;
+        } else {
+                i2c_info->irq = -1;
+                tca6416.irq_base = -1;
+        }
+        return &tca6416;
+}
+
+static void *mpu3050_platform_data(void *info)
+{
+        struct i2c_board_info *i2c_info = info;
+        int intr = get_gpio_by_name("mpu3050_int");
+
+        if (intr == -1)
+                return NULL;
+
+        i2c_info->irq = intr + MRST_IRQ_OFFSET;
+        return NULL;
+}
+
 static void __init *emc1403_platform_data(void *info)
 {
         static short intr2nd_pdata;
@@ -610,12 +689,15 @@ static void *msic_ocd_platform_data(void *info)
 static const struct devs_id __initconst device_ids[] = {
         {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
         {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
+        {"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data},
         {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
         {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
         {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
+        {"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data},
         {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data},
         {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data},
         {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data},
+        {"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data},
 
         /* MSIC subdevices */
         {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data},
diff --git a/arch/x86/platform/uv/uv_sysfs.c b/arch/x86/platform/uv/uv_sysfs.c
index 309c70fb7759..5d4ba301e776 100644
--- a/arch/x86/platform/uv/uv_sysfs.c
+++ b/arch/x86/platform/uv/uv_sysfs.c
@@ -19,7 +19,7 @@
  *  Copyright (c) Russ Anderson
  */
 
-#include <linux/sysdev.h>
+#include <linux/device.h>
 #include <asm/uv/bios.h>
 #include <asm/uv/uv.h>
 
diff --git a/arch/x86/tools/Makefile b/arch/x86/tools/Makefile
index f82082677337..d511aa97533a 100644
--- a/arch/x86/tools/Makefile
+++ b/arch/x86/tools/Makefile
@@ -18,14 +18,21 @@ chkobjdump = $(srctree)/arch/x86/tools/chkobjdump.awk
 quiet_cmd_posttest = TEST    $@
       cmd_posttest = ($(OBJDUMP) -v | $(AWK) -f $(chkobjdump)) || $(OBJDUMP) -d -j .text $(objtree)/vmlinux | $(AWK) -f $(distill_awk) | $(obj)/test_get_len $(posttest_64bit) $(posttest_verbose)
 
-posttest: $(obj)/test_get_len vmlinux
+quiet_cmd_sanitytest = TEST    $@
+      cmd_sanitytest = $(obj)/insn_sanity $(posttest_64bit) -m 1000000
+
+posttest: $(obj)/test_get_len vmlinux $(obj)/insn_sanity
         $(call cmd,posttest)
+        $(call cmd,sanitytest)
 
-hostprogs-y     := test_get_len
+hostprogs-y     += test_get_len insn_sanity
 
 # -I needed for generated C source and C source which in the kernel tree.
 HOSTCFLAGS_test_get_len.o := -Wall -I$(objtree)/arch/x86/lib/ -I$(srctree)/arch/x86/include/ -I$(srctree)/arch/x86/lib/ -I$(srctree)/include/
 
+HOSTCFLAGS_insn_sanity.o := -Wall -I$(objtree)/arch/x86/lib/ -I$(srctree)/arch/x86/include/ -I$(srctree)/arch/x86/lib/ -I$(srctree)/include/
+
 # Dependencies are also needed.
 $(obj)/test_get_len.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
 
+$(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk
index eaf11f52fc0b..5f6a5b6c3a15 100644
--- a/arch/x86/tools/gen-insn-attr-x86.awk
+++ b/arch/x86/tools/gen-insn-attr-x86.awk
@@ -47,7 +47,7 @@ BEGIN {
         sep_expr = "^\\|$"
         group_expr = "^Grp[0-9A-Za-z]+"
 
-        imm_expr = "^[IJAO][a-z]"
+        imm_expr = "^[IJAOL][a-z]"
         imm_flag["Ib"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)"
         imm_flag["Jb"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)"
         imm_flag["Iw"] = "INAT_MAKE_IMM(INAT_IMM_WORD)"
@@ -59,6 +59,7 @@ BEGIN {
         imm_flag["Iv"] = "INAT_MAKE_IMM(INAT_IMM_VWORD)"
         imm_flag["Ob"] = "INAT_MOFFSET"
         imm_flag["Ov"] = "INAT_MOFFSET"
+        imm_flag["Lx"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)"
 
         modrm_expr = "^([CDEGMNPQRSUVW/][a-z]+|NTA|T[012])"
         force64_expr = "\\([df]64\\)"
@@ -70,8 +71,12 @@ BEGIN {
         lprefix3_expr = "\\(F2\\)"
         max_lprefix = 4
 
-        vexok_expr = "\\(VEX\\)"
-        vexonly_expr = "\\(oVEX\\)"
+        # All opcodes starting with lower-case 'v' or with (v1) superscript
+        # accepts VEX prefix
+        vexok_opcode_expr = "^v.*"
+        vexok_expr = "\\(v1\\)"
+        # All opcodes with (v) superscript supports *only* VEX prefix
+        vexonly_expr = "\\(v\\)"
 
         prefix_expr = "\\(Prefix\\)"
         prefix_num["Operand-Size"] = "INAT_PFX_OPNDSZ"
@@ -85,8 +90,8 @@ BEGIN {
         prefix_num["SEG=GS"] = "INAT_PFX_GS"
         prefix_num["SEG=SS"] = "INAT_PFX_SS"
         prefix_num["Address-Size"] = "INAT_PFX_ADDRSZ"
-        prefix_num["2bytes-VEX"] = "INAT_PFX_VEX2"
-        prefix_num["3bytes-VEX"] = "INAT_PFX_VEX3"
+        prefix_num["VEX+1byte"] = "INAT_PFX_VEX2"
+        prefix_num["VEX+2byte"] = "INAT_PFX_VEX3"
 
         clear_vars()
 }
@@ -310,12 +315,10 @@ function convert_operands(count,opnd,       i,j,imm,mod)
                 if (match(opcode, fpu_expr))
                         flags = add_flags(flags, "INAT_MODRM")
 
-                # check VEX only code
+                # check VEX codes
                 if (match(ext, vexonly_expr))
                         flags = add_flags(flags, "INAT_VEXOK | INAT_VEXONLY")
-
-                # check VEX only code
-                if (match(ext, vexok_expr))
+                else if (match(ext, vexok_expr) || match(opcode, vexok_opcode_expr))
                         flags = add_flags(flags, "INAT_VEXOK")
 
                 # check prefixes
diff --git a/arch/x86/tools/insn_sanity.c b/arch/x86/tools/insn_sanity.c
new file mode 100644
index 000000000000..cc2f8c131286
--- /dev/null
+++ b/arch/x86/tools/insn_sanity.c
@@ -0,0 +1,275 @@
+/*
+ * x86 decoder sanity test - based on test_get_insn.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2009
+ * Copyright (C) Hitachi, Ltd., 2011
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+
+#define unlikely(cond) (cond)
+#define ARRAY_SIZE(a)   (sizeof(a)/sizeof(a[0]))
+
+#include <asm/insn.h>
+#include <inat.c>
+#include <insn.c>
+
+/*
+ * Test of instruction analysis against tampering.
+ * Feed random binary to instruction decoder and ensure not to
+ * access out-of-instruction-buffer.
+ */
+
+#define DEFAULT_MAX_ITER        10000
+#define INSN_NOP 0x90
+
+static const char       *prog;          /* Program name */
+static int              verbose;        /* Verbosity */
+static int              x86_64;         /* x86-64 bit mode flag */
+static unsigned int     seed;           /* Random seed */
+static unsigned long    iter_start;     /* Start of iteration number */
+static unsigned long    iter_end = DEFAULT_MAX_ITER;    /* End of iteration number */
+static FILE             *input_file;    /* Input file name */
+
+static void usage(const char *err)
+{
+        if (err)
+                fprintf(stderr, "Error: %s\n\n", err);
+        fprintf(stderr, "Usage: %s [-y|-n|-v] [-s seed[,no]] [-m max] [-i input]\n", prog);
+        fprintf(stderr, "\t-y   64bit mode\n");
+        fprintf(stderr, "\t-n   32bit mode\n");
+        fprintf(stderr, "\t-v   Verbosity(-vv dumps any decoded result)\n");
+        fprintf(stderr, "\t-s   Give a random seed (and iteration number)\n");
+        fprintf(stderr, "\t-m   Give a maximum iteration number\n");
+        fprintf(stderr, "\t-i   Give an input file with decoded binary\n");
+        exit(1);
+}
+
+static void dump_field(FILE *fp, const char *name, const char *indent,
+                       struct insn_field *field)
+{
+        fprintf(fp, "%s.%s = {\n", indent, name);
+        fprintf(fp, "%s\t.value = %d, bytes[] = {%x, %x, %x, %x},\n",
+                indent, field->value, field->bytes[0], field->bytes[1],
+                field->bytes[2], field->bytes[3]);
+        fprintf(fp, "%s\t.got = %d, .nbytes = %d},\n", indent,
+                field->got, field->nbytes);
+}
+
+static void dump_insn(FILE *fp, struct insn *insn)
+{
+        fprintf(fp, "Instruction = {\n");
+        dump_field(fp, "prefixes", "\t",        &insn->prefixes);
+        dump_field(fp, "rex_prefix", "\t",      &insn->rex_prefix);
+        dump_field(fp, "vex_prefix", "\t",      &insn->vex_prefix);
+        dump_field(fp, "opcode", "\t",          &insn->opcode);
+        dump_field(fp, "modrm", "\t",           &insn->modrm);
+        dump_field(fp, "sib", "\t",             &insn->sib);
+        dump_field(fp, "displacement", "\t",    &insn->displacement);
+        dump_field(fp, "immediate1", "\t",      &insn->immediate1);
+        dump_field(fp, "immediate2", "\t",      &insn->immediate2);
+        fprintf(fp, "\t.attr = %x, .opnd_bytes = %d, .addr_bytes = %d,\n",
+                insn->attr, insn->opnd_bytes, insn->addr_bytes);
+        fprintf(fp, "\t.length = %d, .x86_64 = %d, .kaddr = %p}\n",
+                insn->length, insn->x86_64, insn->kaddr);
+}
+
+static void dump_stream(FILE *fp, const char *msg, unsigned long nr_iter,
+                        unsigned char *insn_buf, struct insn *insn)
+{
+        int i;
+
+        fprintf(fp, "%s:\n", msg);
+
+        dump_insn(fp, insn);
+
+        fprintf(fp, "You can reproduce this with below command(s);\n");
+
+        /* Input a decoded instruction sequence directly */
+        fprintf(fp, " $ echo ");
+        for (i = 0; i < MAX_INSN_SIZE; i++)
+                fprintf(fp, " %02x", insn_buf[i]);
+        fprintf(fp, " | %s -i -\n", prog);
+
+        if (!input_file) {
+                fprintf(fp, "Or \n");
+                /* Give a seed and iteration number */
+                fprintf(fp, " $ %s -s 0x%x,%lu\n", prog, seed, nr_iter);
+        }
+}
+
+static void init_random_seed(void)
+{
+        int fd;
+
+        fd = open("/dev/urandom", O_RDONLY);
+        if (fd < 0)
+                goto fail;
+
+        if (read(fd, &seed, sizeof(seed)) != sizeof(seed))
+                goto fail;
+
+        close(fd);
+        return;
+fail:
+        usage("Failed to open /dev/urandom");
+}
+
+/* Read given instruction sequence from the input file */
+static int read_next_insn(unsigned char *insn_buf)
+{
+        char buf[256]  = "", *tmp;
+        int i;
+
+        tmp = fgets(buf, ARRAY_SIZE(buf), input_file);
+        if (tmp == NULL || feof(input_file))
+                return 0;
+
+        for (i = 0; i < MAX_INSN_SIZE; i++) {
+                insn_buf[i] = (unsigned char)strtoul(tmp, &tmp, 16);
+                if (*tmp != ' ')
+                        break;
+        }
+
+        return i;
+}
+
+static int generate_insn(unsigned char *insn_buf)
+{
+        int i;
+
+        if (input_file)
+                return read_next_insn(insn_buf);
+
+        /* Fills buffer with random binary up to MAX_INSN_SIZE */
+        for (i = 0; i < MAX_INSN_SIZE - 1; i += 2)
+                *(unsigned short *)(&insn_buf[i]) = random() & 0xffff;
+
+        while (i < MAX_INSN_SIZE)
+                insn_buf[i++] = random() & 0xff;
+
+        return i;
+}
+
+static void parse_args(int argc, char **argv)
+{
+        int c;
+        char *tmp = NULL;
+        int set_seed = 0;
+
+        prog = argv[0];
+        while ((c = getopt(argc, argv, "ynvs:m:i:")) != -1) {
+                switch (c) {
+                case 'y':
+                        x86_64 = 1;
+                        break;
+                case 'n':
+                        x86_64 = 0;
+                        break;
+                case 'v':
+                        verbose++;
+                        break;
+                case 'i':
+                        if (strcmp("-", optarg) == 0)
+                                input_file = stdin;
+                        else
+                                input_file = fopen(optarg, "r");
+                        if (!input_file)
+                                usage("Failed to open input file");
+                        break;
+                case 's':
+                        seed = (unsigned int)strtoul(optarg, &tmp, 0);
+                        if (*tmp == ',') {
+                                optarg = tmp + 1;
+                                iter_start = strtoul(optarg, &tmp, 0);
+                        }
+                        if (*tmp != '\0' || tmp == optarg)
+                                usage("Failed to parse seed");
+                        set_seed = 1;
+                        break;
+                case 'm':
+                        iter_end = strtoul(optarg, &tmp, 0);
+                        if (*tmp != '\0' || tmp == optarg)
+                                usage("Failed to parse max_iter");
+                        break;
+                default:
+                        usage(NULL);
+                }
+        }
+
+        /* Check errors */
+        if (iter_end < iter_start)
+                usage("Max iteration number must be bigger than iter-num");
+
+        if (set_seed && input_file)
+                usage("Don't use input file (-i) with random seed (-s)");
+
+        /* Initialize random seed */
+        if (!input_file) {
+                if (!set_seed)  /* No seed is given */
+                        init_random_seed();
+                srand(seed);
+        }
+}
+
+int main(int argc, char **argv)
+{
+        struct insn insn;
+        int insns = 0;
+        int errors = 0;
+        unsigned long i;
+        unsigned char insn_buf[MAX_INSN_SIZE * 2];
+
+        parse_args(argc, argv);
+
+        /* Prepare stop bytes with NOPs */
+        memset(insn_buf + MAX_INSN_SIZE, INSN_NOP, MAX_INSN_SIZE);
+
+        for (i = 0; i < iter_end; i++) {
+                if (generate_insn(insn_buf) <= 0)
+                        break;
+
+                if (i < iter_start)     /* Skip to given iteration number */
+                        continue;
+
+                /* Decode an instruction */
+                insn_init(&insn, insn_buf, x86_64);
+                insn_get_length(&insn);
+
+                if (insn.next_byte <= insn.kaddr ||
+                    insn.kaddr + MAX_INSN_SIZE < insn.next_byte) {
+                        /* Access out-of-range memory */
+                        dump_stream(stderr, "Error: Found an access violation", i, insn_buf, &insn);
+                        errors++;
+                } else if (verbose && !insn_complete(&insn))
+                        dump_stream(stdout, "Info: Found an undecodable input", i, insn_buf, &insn);
+                else if (verbose >= 2)
+                        dump_insn(stdout, &insn);
+                insns++;
+        }
+
+        fprintf(stdout, "%s: decoded and checked %d %s instructions with %d errors (seed:0x%x)\n", (errors) ? "Failure" : "Success", insns, (input_file) ? "given" : "random", errors, seed);
+
+        return errors ? 1 : 0;
+}
diff --git a/arch/x86/um/asm/processor.h b/arch/x86/um/asm/processor.h
index 118c143a9cb4..2c32df6fe231 100644
--- a/arch/x86/um/asm/processor.h
+++ b/arch/x86/um/asm/processor.h
@@ -11,7 +11,7 @@
 #endif
 
 #define KSTK_EIP(tsk) KSTK_REG(tsk, HOST_IP)
-#define KSTK_ESP(tsk) KSTK_REG(tsk, HOST_IP)
+#define KSTK_ESP(tsk) KSTK_REG(tsk, HOST_SP)
 #define KSTK_EBP(tsk) KSTK_REG(tsk, HOST_BP)
 
 #define ARCH_IS_STACKGROW(address) \
diff --git a/arch/x86/xen/debugfs.c b/arch/x86/xen/debugfs.c
index 7c0fedd98ea0..ef1db1900d86 100644
--- a/arch/x86/xen/debugfs.c
+++ b/arch/x86/xen/debugfs.c
@@ -109,7 +109,7 @@ static const struct file_operations u32_array_fops = {
         .llseek = no_llseek,
 };
 
-struct dentry *xen_debugfs_create_u32_array(const char *name, mode_t mode,
+struct dentry *xen_debugfs_create_u32_array(const char *name, umode_t mode,
                                             struct dentry *parent,
                                             u32 *array, unsigned elements)
 {
diff --git a/arch/x86/xen/debugfs.h b/arch/x86/xen/debugfs.h
index e28132084832..78d25499be5b 100644
--- a/arch/x86/xen/debugfs.h
+++ b/arch/x86/xen/debugfs.h
@@ -3,7 +3,7 @@
 
 struct dentry * __init xen_init_debugfs(void);
 
-struct dentry *xen_debugfs_create_u32_array(const char *name, mode_t mode,
+struct dentry *xen_debugfs_create_u32_array(const char *name, umode_t mode,
                                             struct dentry *parent,
                                             u32 *array, unsigned elements);
 
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index da8afd576a6b..12eb07bfb267 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1215,8 +1215,6 @@ asmlinkage void __init xen_start_kernel(void)
         local_irq_disable();
         early_boot_irqs_disabled = true;
 
-        memblock_init();
-
         xen_raw_console_write("mapping kernel into physical memory\n");
         pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
         xen_ident_map_ISA();
@@ -1356,7 +1354,7 @@ static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
         int cpu = (long)hcpu;
         switch (action) {
         case CPU_UP_PREPARE:
-                per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
+                xen_vcpu_setup(cpu);
                 if (xen_have_vector_callback)
                         xen_init_lock_cpu(cpu);
                 break;
@@ -1386,7 +1384,6 @@ static void __init xen_hvm_guest_init(void)
         xen_hvm_smp_init();
         register_cpu_notifier(&xen_hvm_cpu_notifier);
         xen_unplug_emulated_devices();
-        have_vcpu_info_placement = 0;
         x86_init.irqs.intr_init = xen_init_IRQ;
         xen_hvm_init_time_ops();
         xen_hvm_init_mmu_ops();
diff --git a/arch/x86/xen/grant-table.c b/arch/x86/xen/grant-table.c
index 6bbfd7ac5e81..5a40d24ba331 100644
--- a/arch/x86/xen/grant-table.c
+++ b/arch/x86/xen/grant-table.c
@@ -71,7 +71,7 @@ int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes,
 
         if (shared == NULL) {
                 struct vm_struct *area =
-                        alloc_vm_area(PAGE_SIZE * max_nr_gframes);
+                        alloc_vm_area(PAGE_SIZE * max_nr_gframes, NULL);
                 BUG_ON(area == NULL);
                 shared = area->addr;
                 *__shared = shared;
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 87f6673b1207..f4bf8aa574f4 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1774,10 +1774,8 @@ pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
         __xen_write_cr3(true, __pa(pgd));
         xen_mc_issue(PARAVIRT_LAZY_CPU);
 
-        memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
-                      __pa(xen_start_info->pt_base +
-                           xen_start_info->nr_pt_frames * PAGE_SIZE),
-                      "XEN PAGETABLES");
+        memblock_reserve(__pa(xen_start_info->pt_base),
+                         xen_start_info->nr_pt_frames * PAGE_SIZE);
 
         return pgd;
 }
@@ -1853,10 +1851,8 @@ pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
                           PFN_DOWN(__pa(initial_page_table)));
         xen_write_cr3(__pa(initial_page_table));
 
-        memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
-                      __pa(xen_start_info->pt_base +
-                           xen_start_info->nr_pt_frames * PAGE_SIZE),
-                      "XEN PAGETABLES");
+        memblock_reserve(__pa(xen_start_info->pt_base),
+                         xen_start_info->nr_pt_frames * PAGE_SIZE));
 
         return initial_page_table;
 }
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 38d0af4fefec..e03c63692176 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -75,7 +75,7 @@ static void __init xen_add_extra_mem(u64 start, u64 size)
         if (i == XEN_EXTRA_MEM_MAX_REGIONS)
                 printk(KERN_WARNING "Warning: not enough extra memory regions\n");
 
-        memblock_x86_reserve_range(start, start + size, "XEN EXTRA");
+        memblock_reserve(start, size);
 
         xen_max_p2m_pfn = PFN_DOWN(start + size);
 
@@ -173,9 +173,21 @@ static unsigned long __init xen_get_max_pages(void)
         domid_t domid = DOMID_SELF;
         int ret;
 
-        ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid);
-        if (ret > 0)
-                max_pages = ret;
+        /*
+         * For the initial domain we use the maximum reservation as
+         * the maximum page.
+         *
+         * For guest domains the current maximum reservation reflects
+         * the current maximum rather than the static maximum. In this
+         * case the e820 map provided to us will cover the static
+         * maximum region.
+         */
+        if (xen_initial_domain()) {
+                ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid);
+                if (ret > 0)
+                        max_pages = ret;
+        }
+
         return min(max_pages, MAX_DOMAIN_PAGES);
 }
 
@@ -299,9 +311,8 @@ char * __init xen_memory_setup(void)
          *  - xen_start_info
          * See comment above "struct start_info" in <xen/interface/xen.h>
          */
-        memblock_x86_reserve_range(__pa(xen_start_info->mfn_list),
-                      __pa(xen_start_info->pt_base),
-                        "XEN START INFO");
+        memblock_reserve(__pa(xen_start_info->mfn_list),
+                         xen_start_info->pt_base - xen_start_info->mfn_list);
 
         sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
 
@@ -410,6 +421,6 @@ void __init xen_arch_setup(void)
 #endif
         disable_cpuidle();
         boot_option_idle_override = IDLE_HALT;
-
+        WARN_ON(set_pm_idle_to_default());
         fiddle_vdso();
 }
diff --git a/arch/xtensa/include/asm/socket.h b/arch/xtensa/include/asm/socket.h
index cbdf2ffaacff..bb06968be227 100644
--- a/arch/xtensa/include/asm/socket.h
+++ b/arch/xtensa/include/asm/socket.h
@@ -73,4 +73,7 @@
 
 #define SO_RXQ_OVFL             40
 
+#define SO_WIFI_STATUS          41
+#define SCM_WIFI_STATUS         SO_WIFI_STATUS
+
 #endif  /* _XTENSA_SOCKET_H */
diff --git a/arch/xtensa/include/asm/thread_info.h b/arch/xtensa/include/asm/thread_info.h
index 7be8accb0b0c..6abbedd09d85 100644
--- a/arch/xtensa/include/asm/thread_info.h
+++ b/arch/xtensa/include/asm/thread_info.h
@@ -132,7 +132,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_MEMDIE              5       /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     6       /* restore signal mask in do_signal() */
 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
-#define TIF_FREEZE              17      /* is freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
@@ -141,7 +140,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_IRET               (1<<TIF_IRET)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
 
 #define _TIF_WORK_MASK          0x0000FFFE      /* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK       0x0000FFFF      /* work to do on any return to u-space */
diff --git a/arch/xtensa/include/asm/types.h b/arch/xtensa/include/asm/types.h
index b1c981e39b52..6d4db7e8ffac 100644
--- a/arch/xtensa/include/asm/types.h
+++ b/arch/xtensa/include/asm/types.h
@@ -23,8 +23,6 @@
 
 #ifndef __ASSEMBLY__
 
-typedef unsigned short umode_t;
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index f3e5eb43f71c..ac62f9cf1e10 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -41,14 +41,6 @@ static struct clocksource ccount_clocksource = {
         .rating = 200,
         .read = ccount_read,
         .mask = CLOCKSOURCE_MASK(32),
-        /*
-         * With a shift of 22 the lower limit of the cpu clock is
-         * 1MHz, where NSEC_PER_CCOUNT is 1000 or a bit less than
-         * 2^10: Since we have 32 bits and the multiplicator can
-         * already take up as much as 10 bits, this leaves us with
-         * remaining upper 22 bits.
-         */
-        .shift = 22,
 };
 
 static irqreturn_t timer_interrupt(int irq, void *dev_id);
@@ -66,10 +58,7 @@ void __init time_init(void)
         printk("%d.%02d MHz\n", (int)ccount_per_jiffy/(1000000/HZ),
                         (int)(ccount_per_jiffy/(10000/HZ))%100);
 #endif
-        ccount_clocksource.mult =
-                clocksource_hz2mult(CCOUNT_PER_JIFFY * HZ,
-                                ccount_clocksource.shift);
-        clocksource_register(&ccount_clocksource);
+        clocksource_register_hz(&ccount_clocksource, CCOUNT_PER_JIFFY * HZ);
 
         /* Initialize the linux timer interrupt. */