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authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /arch/sh/kernel/cpu/sh2a
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a')
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7201.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7203.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7206.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c110
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c23
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7201.c181
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c89
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c89
8 files changed, 299 insertions, 215 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 7814c76159a7..b26264dc2aef 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7201_master_clk_ops = { 40static struct clk_ops sh7201_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7201_master_clk_ops = {
43 43
44static unsigned long module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (__raw_readw(FREQCR) & 0x0007);
47 return clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
@@ -53,7 +53,7 @@ static struct clk_ops sh7201_module_clk_ops = {
53 53
54static unsigned long bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 int idx = (ctrl_inw(FREQCR) & 0x0007); 56 int idx = (__raw_readw(FREQCR) & 0x0007);
57 return clk->parent->rate / pfc_divisors[idx]; 57 return clk->parent->rate / pfc_divisors[idx];
58} 58}
59 59
@@ -63,7 +63,7 @@ static struct clk_ops sh7201_bus_clk_ops = {
63 63
64static unsigned long cpu_clk_recalc(struct clk *clk) 64static unsigned long cpu_clk_recalc(struct clk *clk)
65{ 65{
66 int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007); 66 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
67 return clk->parent->rate / ifc_divisors[idx]; 67 return clk->parent->rate / ifc_divisors[idx];
68} 68}
69 69
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 940986965102..7e75d8f79502 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -39,7 +39,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
39 39
40static void master_clk_init(struct clk *clk) 40static void master_clk_init(struct clk *clk)
41{ 41{
42 clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ; 42 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
43} 43}
44 44
45static struct clk_ops sh7203_master_clk_ops = { 45static struct clk_ops sh7203_master_clk_ops = {
@@ -48,7 +48,7 @@ static struct clk_ops sh7203_master_clk_ops = {
48 48
49static unsigned long module_clk_recalc(struct clk *clk) 49static unsigned long module_clk_recalc(struct clk *clk)
50{ 50{
51 int idx = (ctrl_inw(FREQCR) & 0x0007); 51 int idx = (__raw_readw(FREQCR) & 0x0007);
52 return clk->parent->rate / pfc_divisors[idx]; 52 return clk->parent->rate / pfc_divisors[idx];
53} 53}
54 54
@@ -58,7 +58,7 @@ static struct clk_ops sh7203_module_clk_ops = {
58 58
59static unsigned long bus_clk_recalc(struct clk *clk) 59static unsigned long bus_clk_recalc(struct clk *clk)
60{ 60{
61 int idx = (ctrl_inw(FREQCR) & 0x0007); 61 int idx = (__raw_readw(FREQCR) & 0x0007);
62 return clk->parent->rate / pfc_divisors[idx-2]; 62 return clk->parent->rate / pfc_divisors[idx-2];
63} 63}
64 64
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index c2268bdeceeb..b27a5e2687ab 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7206_master_clk_ops = { 40static struct clk_ops sh7206_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7206_master_clk_ops = {
43 43
44static unsigned long module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (__raw_readw(FREQCR) & 0x0007);
47 return clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
@@ -53,7 +53,7 @@ static struct clk_ops sh7206_module_clk_ops = {
53 53
54static unsigned long bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 56 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
57} 57}
58 58
59static struct clk_ops sh7206_bus_clk_ops = { 59static struct clk_ops sh7206_bus_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh7206_bus_clk_ops = {
62 62
63static unsigned long cpu_clk_recalc(struct clk *clk) 63static unsigned long cpu_clk_recalc(struct clk *clk)
64{ 64{
65 int idx = (ctrl_inw(FREQCR) & 0x0007); 65 int idx = (__raw_readw(FREQCR) & 0x0007);
66 return clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
67} 67}
68 68
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 6df2fb98eb30..488d24e0cdf0 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -25,14 +25,11 @@
25 25
26/* 26/*
27 * Save FPU registers onto task structure. 27 * Save FPU registers onto task structure.
28 * Assume called with FPU enabled (SR.FD=0).
29 */ 28 */
30void 29void save_fpu(struct task_struct *tsk)
31save_fpu(struct task_struct *tsk, struct pt_regs *regs)
32{ 30{
33 unsigned long dummy; 31 unsigned long dummy;
34 32
35 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
36 enable_fpu(); 33 enable_fpu();
37 asm volatile("sts.l fpul, @-%0\n\t" 34 asm volatile("sts.l fpul, @-%0\n\t"
38 "sts.l fpscr, @-%0\n\t" 35 "sts.l fpscr, @-%0\n\t"
@@ -54,17 +51,15 @@ save_fpu(struct task_struct *tsk, struct pt_regs *regs)
54 "fmov.s fr0, @-%0\n\t" 51 "fmov.s fr0, @-%0\n\t"
55 "lds %3, fpscr\n\t" 52 "lds %3, fpscr\n\t"
56 : "=r" (dummy) 53 : "=r" (dummy)
57 : "0" ((char *)(&tsk->thread.fpu.hard.status)), 54 : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)),
58 "r" (FPSCR_RCHG), 55 "r" (FPSCR_RCHG),
59 "r" (FPSCR_INIT) 56 "r" (FPSCR_INIT)
60 : "memory"); 57 : "memory");
61 58
62 disable_fpu(); 59 disable_fpu();
63 release_fpu(regs);
64} 60}
65 61
66static void 62void restore_fpu(struct task_struct *tsk)
67restore_fpu(struct task_struct *tsk)
68{ 63{
69 unsigned long dummy; 64 unsigned long dummy;
70 65
@@ -88,45 +83,12 @@ restore_fpu(struct task_struct *tsk)
88 "lds.l @%0+, fpscr\n\t" 83 "lds.l @%0+, fpscr\n\t"
89 "lds.l @%0+, fpul\n\t" 84 "lds.l @%0+, fpul\n\t"
90 : "=r" (dummy) 85 : "=r" (dummy)
91 : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) 86 : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
92 : "memory"); 87 : "memory");
93 disable_fpu(); 88 disable_fpu();
94} 89}
95 90
96/* 91/*
97 * Load the FPU with signalling NANS. This bit pattern we're using
98 * has the property that no matter wether considered as single or as
99 * double precission represents signaling NANS.
100 */
101
102static void
103fpu_init(void)
104{
105 enable_fpu();
106 asm volatile("lds %0, fpul\n\t"
107 "fsts fpul, fr0\n\t"
108 "fsts fpul, fr1\n\t"
109 "fsts fpul, fr2\n\t"
110 "fsts fpul, fr3\n\t"
111 "fsts fpul, fr4\n\t"
112 "fsts fpul, fr5\n\t"
113 "fsts fpul, fr6\n\t"
114 "fsts fpul, fr7\n\t"
115 "fsts fpul, fr8\n\t"
116 "fsts fpul, fr9\n\t"
117 "fsts fpul, fr10\n\t"
118 "fsts fpul, fr11\n\t"
119 "fsts fpul, fr12\n\t"
120 "fsts fpul, fr13\n\t"
121 "fsts fpul, fr14\n\t"
122 "fsts fpul, fr15\n\t"
123 "lds %2, fpscr\n\t"
124 : /* no output */
125 : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT));
126 disable_fpu();
127}
128
129/*
130 * Emulate arithmetic ops on denormalized number for some FPU insns. 92 * Emulate arithmetic ops on denormalized number for some FPU insns.
131 */ 93 */
132 94
@@ -493,9 +455,9 @@ ieee_fpe_handler (struct pt_regs *regs)
493 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ 455 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
494 struct task_struct *tsk = current; 456 struct task_struct *tsk = current;
495 457
496 if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) { 458 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) {
497 /* FPU error */ 459 /* FPU error */
498 denormal_to_double (&tsk->thread.fpu.hard, 460 denormal_to_double (&tsk->thread.xstate->hardfpu,
499 (finsn >> 8) & 0xf); 461 (finsn >> 8) & 0xf);
500 } else 462 } else
501 return 0; 463 return 0;
@@ -510,9 +472,9 @@ ieee_fpe_handler (struct pt_regs *regs)
510 472
511 n = (finsn >> 8) & 0xf; 473 n = (finsn >> 8) & 0xf;
512 m = (finsn >> 4) & 0xf; 474 m = (finsn >> 4) & 0xf;
513 hx = tsk->thread.fpu.hard.fp_regs[n]; 475 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
514 hy = tsk->thread.fpu.hard.fp_regs[m]; 476 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
515 fpscr = tsk->thread.fpu.hard.fpscr; 477 fpscr = tsk->thread.xstate->hardfpu.fpscr;
516 prec = fpscr & (1 << 19); 478 prec = fpscr & (1 << 19);
517 479
518 if ((fpscr & FPSCR_FPU_ERROR) 480 if ((fpscr & FPSCR_FPU_ERROR)
@@ -522,15 +484,15 @@ ieee_fpe_handler (struct pt_regs *regs)
522 484
523 /* FPU error because of denormal */ 485 /* FPU error because of denormal */
524 llx = ((long long) hx << 32) 486 llx = ((long long) hx << 32)
525 | tsk->thread.fpu.hard.fp_regs[n+1]; 487 | tsk->thread.xstate->hardfpu.fp_regs[n+1];
526 lly = ((long long) hy << 32) 488 lly = ((long long) hy << 32)
527 | tsk->thread.fpu.hard.fp_regs[m+1]; 489 | tsk->thread.xstate->hardfpu.fp_regs[m+1];
528 if ((hx & 0x7fffffff) >= 0x00100000) 490 if ((hx & 0x7fffffff) >= 0x00100000)
529 llx = denormal_muld(lly, llx); 491 llx = denormal_muld(lly, llx);
530 else 492 else
531 llx = denormal_muld(llx, lly); 493 llx = denormal_muld(llx, lly);
532 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 494 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
533 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; 495 tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
534 } else if ((fpscr & FPSCR_FPU_ERROR) 496 } else if ((fpscr & FPSCR_FPU_ERROR)
535 && (!prec && ((hx & 0x7fffffff) < 0x00800000 497 && (!prec && ((hx & 0x7fffffff) < 0x00800000
536 || (hy & 0x7fffffff) < 0x00800000))) { 498 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -539,7 +501,7 @@ ieee_fpe_handler (struct pt_regs *regs)
539 hx = denormal_mulf(hy, hx); 501 hx = denormal_mulf(hy, hx);
540 else 502 else
541 hx = denormal_mulf(hx, hy); 503 hx = denormal_mulf(hx, hy);
542 tsk->thread.fpu.hard.fp_regs[n] = hx; 504 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
543 } else 505 } else
544 return 0; 506 return 0;
545 507
@@ -553,9 +515,9 @@ ieee_fpe_handler (struct pt_regs *regs)
553 515
554 n = (finsn >> 8) & 0xf; 516 n = (finsn >> 8) & 0xf;
555 m = (finsn >> 4) & 0xf; 517 m = (finsn >> 4) & 0xf;
556 hx = tsk->thread.fpu.hard.fp_regs[n]; 518 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
557 hy = tsk->thread.fpu.hard.fp_regs[m]; 519 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
558 fpscr = tsk->thread.fpu.hard.fpscr; 520 fpscr = tsk->thread.xstate->hardfpu.fpscr;
559 prec = fpscr & (1 << 19); 521 prec = fpscr & (1 << 19);
560 522
561 if ((fpscr & FPSCR_FPU_ERROR) 523 if ((fpscr & FPSCR_FPU_ERROR)
@@ -565,15 +527,15 @@ ieee_fpe_handler (struct pt_regs *regs)
565 527
566 /* FPU error because of denormal */ 528 /* FPU error because of denormal */
567 llx = ((long long) hx << 32) 529 llx = ((long long) hx << 32)
568 | tsk->thread.fpu.hard.fp_regs[n+1]; 530 | tsk->thread.xstate->hardfpu.fp_regs[n+1];
569 lly = ((long long) hy << 32) 531 lly = ((long long) hy << 32)
570 | tsk->thread.fpu.hard.fp_regs[m+1]; 532 | tsk->thread.xstate->hardfpu.fp_regs[m+1];
571 if ((finsn & 0xf00f) == 0xf000) 533 if ((finsn & 0xf00f) == 0xf000)
572 llx = denormal_addd(llx, lly); 534 llx = denormal_addd(llx, lly);
573 else 535 else
574 llx = denormal_addd(llx, lly ^ (1LL << 63)); 536 llx = denormal_addd(llx, lly ^ (1LL << 63));
575 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32; 537 tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
576 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff; 538 tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
577 } else if ((fpscr & FPSCR_FPU_ERROR) 539 } else if ((fpscr & FPSCR_FPU_ERROR)
578 && (!prec && ((hx & 0x7fffffff) < 0x00800000 540 && (!prec && ((hx & 0x7fffffff) < 0x00800000
579 || (hy & 0x7fffffff) < 0x00800000))) { 541 || (hy & 0x7fffffff) < 0x00800000))) {
@@ -582,7 +544,7 @@ ieee_fpe_handler (struct pt_regs *regs)
582 hx = denormal_addf(hx, hy); 544 hx = denormal_addf(hx, hy);
583 else 545 else
584 hx = denormal_addf(hx, hy ^ 0x80000000); 546 hx = denormal_addf(hx, hy ^ 0x80000000);
585 tsk->thread.fpu.hard.fp_regs[n] = hx; 547 tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
586 } else 548 } else
587 return 0; 549 return 0;
588 550
@@ -598,37 +560,15 @@ BUILD_TRAP_HANDLER(fpu_error)
598 struct task_struct *tsk = current; 560 struct task_struct *tsk = current;
599 TRAP_HANDLER_DECL; 561 TRAP_HANDLER_DECL;
600 562
601 save_fpu(tsk, regs); 563 __unlazy_fpu(tsk, regs);
602 if (ieee_fpe_handler(regs)) { 564 if (ieee_fpe_handler(regs)) {
603 tsk->thread.fpu.hard.fpscr &= 565 tsk->thread.xstate->hardfpu.fpscr &=
604 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 566 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
605 grab_fpu(regs); 567 grab_fpu(regs);
606 restore_fpu(tsk); 568 restore_fpu(tsk);
607 set_tsk_thread_flag(tsk, TIF_USEDFPU); 569 task_thread_info(tsk)->status |= TS_USEDFPU;
608 return; 570 return;
609 } 571 }
610 572
611 force_sig(SIGFPE, tsk); 573 force_sig(SIGFPE, tsk);
612} 574}
613
614BUILD_TRAP_HANDLER(fpu_state_restore)
615{
616 struct task_struct *tsk = current;
617 TRAP_HANDLER_DECL;
618
619 grab_fpu(regs);
620 if (!user_mode(regs)) {
621 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
622 return;
623 }
624
625 if (used_math()) {
626 /* Using the FPU again. */
627 restore_fpu(tsk);
628 } else {
629 /* First time FPU user. */
630 fpu_init();
631 set_used_math();
632 }
633 set_tsk_thread_flag(tsk, TIF_USEDFPU);
634}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index b67376445315..8f669dc9b0da 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -207,27 +207,23 @@ static struct platform_device mtu2_2_device = {
207 .num_resources = ARRAY_SIZE(mtu2_2_resources), 207 .num_resources = ARRAY_SIZE(mtu2_2_resources),
208}; 208};
209 209
210static struct plat_sci_port sci_platform_data[] = { 210static struct plat_sci_port scif0_platform_data = {
211 { 211 .mapbase = 0xff804000,
212 .mapbase = 0xff804000, 212 .flags = UPF_BOOT_AUTOCONF,
213 .flags = UPF_BOOT_AUTOCONF, 213 .type = PORT_SCIF,
214 .type = PORT_SCIF, 214 .irqs = { 220, 220, 220, 220 },
215 .irqs = { 220, 220, 220, 220 },
216 }, {
217 .flags = 0,
218 }
219}; 215};
220 216
221static struct platform_device sci_device = { 217static struct platform_device scif0_device = {
222 .name = "sh-sci", 218 .name = "sh-sci",
223 .id = -1, 219 .id = 0,
224 .dev = { 220 .dev = {
225 .platform_data = sci_platform_data, 221 .platform_data = &scif0_platform_data,
226 }, 222 },
227}; 223};
228 224
229static struct platform_device *mxg_devices[] __initdata = { 225static struct platform_device *mxg_devices[] __initdata = {
230 &sci_device, 226 &scif0_device,
231 &mtu2_0_device, 227 &mtu2_0_device,
232 &mtu2_1_device, 228 &mtu2_1_device,
233 &mtu2_2_device, 229 &mtu2_2_device,
@@ -246,6 +242,7 @@ void __init plat_irq_setup(void)
246} 242}
247 243
248static struct platform_device *mxg_early_devices[] __initdata = { 244static struct platform_device *mxg_early_devices[] __initdata = {
245 &scif0_device,
249 &mtu2_0_device, 246 &mtu2_0_device,
250 &mtu2_1_device, 247 &mtu2_1_device,
251 &mtu2_2_device, 248 &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index fbde5b75deb9..4ccfeb59eb1a 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -177,57 +177,123 @@ static struct intc_mask_reg mask_registers[] __initdata = {
177static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups, 177static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
178 mask_registers, prio_registers, NULL); 178 mask_registers, prio_registers, NULL);
179 179
180static struct plat_sci_port sci_platform_data[] = { 180static struct plat_sci_port scif0_platform_data = {
181 { 181 .mapbase = 0xfffe8000,
182 .mapbase = 0xfffe8000, 182 .flags = UPF_BOOT_AUTOCONF,
183 .flags = UPF_BOOT_AUTOCONF, 183 .type = PORT_SCIF,
184 .type = PORT_SCIF, 184 .irqs = { 180, 180, 180, 180 }
185 .irqs = { 180, 180, 180, 180 } 185};
186 }, { 186
187 .mapbase = 0xfffe8800, 187static struct platform_device scif0_device = {
188 .flags = UPF_BOOT_AUTOCONF,
189 .type = PORT_SCIF,
190 .irqs = { 184, 184, 184, 184 }
191 }, {
192 .mapbase = 0xfffe9000,
193 .flags = UPF_BOOT_AUTOCONF,
194 .type = PORT_SCIF,
195 .irqs = { 188, 188, 188, 188 }
196 }, {
197 .mapbase = 0xfffe9800,
198 .flags = UPF_BOOT_AUTOCONF,
199 .type = PORT_SCIF,
200 .irqs = { 192, 192, 192, 192 }
201 }, {
202 .mapbase = 0xfffea000,
203 .flags = UPF_BOOT_AUTOCONF,
204 .type = PORT_SCIF,
205 .irqs = { 196, 196, 196, 196 }
206 }, {
207 .mapbase = 0xfffea800,
208 .flags = UPF_BOOT_AUTOCONF,
209 .type = PORT_SCIF,
210 .irqs = { 200, 200, 200, 200 }
211 }, {
212 .mapbase = 0xfffeb000,
213 .flags = UPF_BOOT_AUTOCONF,
214 .type = PORT_SCIF,
215 .irqs = { 204, 204, 204, 204 }
216 }, {
217 .mapbase = 0xfffeb800,
218 .flags = UPF_BOOT_AUTOCONF,
219 .type = PORT_SCIF,
220 .irqs = { 208, 208, 208, 208 }
221 }, {
222 .flags = 0,
223 }
224};
225
226static struct platform_device sci_device = {
227 .name = "sh-sci", 188 .name = "sh-sci",
228 .id = -1, 189 .id = 0,
190 .dev = {
191 .platform_data = &scif0_platform_data,
192 },
193};
194
195static struct plat_sci_port scif1_platform_data = {
196 .mapbase = 0xfffe8800,
197 .flags = UPF_BOOT_AUTOCONF,
198 .type = PORT_SCIF,
199 .irqs = { 184, 184, 184, 184 }
200};
201
202static struct platform_device scif1_device = {
203 .name = "sh-sci",
204 .id = 1,
205 .dev = {
206 .platform_data = &scif1_platform_data,
207 },
208};
209
210static struct plat_sci_port scif2_platform_data = {
211 .mapbase = 0xfffe9000,
212 .flags = UPF_BOOT_AUTOCONF,
213 .type = PORT_SCIF,
214 .irqs = { 188, 188, 188, 188 }
215};
216
217static struct platform_device scif2_device = {
218 .name = "sh-sci",
219 .id = 2,
220 .dev = {
221 .platform_data = &scif2_platform_data,
222 },
223};
224
225static struct plat_sci_port scif3_platform_data = {
226 .mapbase = 0xfffe9800,
227 .flags = UPF_BOOT_AUTOCONF,
228 .type = PORT_SCIF,
229 .irqs = { 192, 192, 192, 192 }
230};
231
232static struct platform_device scif3_device = {
233 .name = "sh-sci",
234 .id = 3,
235 .dev = {
236 .platform_data = &scif3_platform_data,
237 },
238};
239
240static struct plat_sci_port scif4_platform_data = {
241 .mapbase = 0xfffea000,
242 .flags = UPF_BOOT_AUTOCONF,
243 .type = PORT_SCIF,
244 .irqs = { 196, 196, 196, 196 }
245};
246
247static struct platform_device scif4_device = {
248 .name = "sh-sci",
249 .id = 4,
250 .dev = {
251 .platform_data = &scif4_platform_data,
252 },
253};
254
255static struct plat_sci_port scif5_platform_data = {
256 .mapbase = 0xfffea800,
257 .flags = UPF_BOOT_AUTOCONF,
258 .type = PORT_SCIF,
259 .irqs = { 200, 200, 200, 200 }
260};
261
262static struct platform_device scif5_device = {
263 .name = "sh-sci",
264 .id = 5,
265 .dev = {
266 .platform_data = &scif5_platform_data,
267 },
268};
269
270static struct plat_sci_port scif6_platform_data = {
271 .mapbase = 0xfffeb000,
272 .flags = UPF_BOOT_AUTOCONF,
273 .type = PORT_SCIF,
274 .irqs = { 204, 204, 204, 204 }
275};
276
277static struct platform_device scif6_device = {
278 .name = "sh-sci",
279 .id = 6,
280 .dev = {
281 .platform_data = &scif6_platform_data,
282 },
283};
284
285static struct plat_sci_port scif7_platform_data = {
286 .mapbase = 0xfffeb800,
287 .flags = UPF_BOOT_AUTOCONF,
288 .type = PORT_SCIF,
289 .irqs = { 208, 208, 208, 208 }
290};
291
292static struct platform_device scif7_device = {
293 .name = "sh-sci",
294 .id = 7,
229 .dev = { 295 .dev = {
230 .platform_data = sci_platform_data, 296 .platform_data = &scif7_platform_data,
231 }, 297 },
232}; 298};
233 299
@@ -345,7 +411,14 @@ static struct platform_device mtu2_2_device = {
345}; 411};
346 412
347static struct platform_device *sh7201_devices[] __initdata = { 413static struct platform_device *sh7201_devices[] __initdata = {
348 &sci_device, 414 &scif0_device,
415 &scif1_device,
416 &scif2_device,
417 &scif3_device,
418 &scif4_device,
419 &scif5_device,
420 &scif6_device,
421 &scif7_device,
349 &rtc_device, 422 &rtc_device,
350 &mtu2_0_device, 423 &mtu2_0_device,
351 &mtu2_1_device, 424 &mtu2_1_device,
@@ -365,6 +438,14 @@ void __init plat_irq_setup(void)
365} 438}
366 439
367static struct platform_device *sh7201_early_devices[] __initdata = { 440static struct platform_device *sh7201_early_devices[] __initdata = {
441 &scif0_device,
442 &scif1_device,
443 &scif2_device,
444 &scif3_device,
445 &scif4_device,
446 &scif5_device,
447 &scif6_device,
448 &scif7_device,
368 &mtu2_0_device, 449 &mtu2_0_device,
369 &mtu2_1_device, 450 &mtu2_1_device,
370 &mtu2_2_device, 451 &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index d3fd536c9a84..3136966cc9b3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -173,37 +173,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
173static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups, 173static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
174 mask_registers, prio_registers, NULL); 174 mask_registers, prio_registers, NULL);
175 175
176static struct plat_sci_port sci_platform_data[] = { 176static struct plat_sci_port scif0_platform_data = {
177 { 177 .mapbase = 0xfffe8000,
178 .mapbase = 0xfffe8000, 178 .flags = UPF_BOOT_AUTOCONF,
179 .flags = UPF_BOOT_AUTOCONF, 179 .type = PORT_SCIF,
180 .type = PORT_SCIF, 180 .irqs = { 192, 192, 192, 192 },
181 .irqs = { 192, 192, 192, 192 },
182 }, {
183 .mapbase = 0xfffe8800,
184 .flags = UPF_BOOT_AUTOCONF,
185 .type = PORT_SCIF,
186 .irqs = { 196, 196, 196, 196 },
187 }, {
188 .mapbase = 0xfffe9000,
189 .flags = UPF_BOOT_AUTOCONF,
190 .type = PORT_SCIF,
191 .irqs = { 200, 200, 200, 200 },
192 }, {
193 .mapbase = 0xfffe9800,
194 .flags = UPF_BOOT_AUTOCONF,
195 .type = PORT_SCIF,
196 .irqs = { 204, 204, 204, 204 },
197 }, {
198 .flags = 0,
199 }
200}; 181};
201 182
202static struct platform_device sci_device = { 183static struct platform_device scif0_device = {
203 .name = "sh-sci", 184 .name = "sh-sci",
204 .id = -1, 185 .id = 0,
186 .dev = {
187 .platform_data = &scif0_platform_data,
188 },
189};
190
191static struct plat_sci_port scif1_platform_data = {
192 .mapbase = 0xfffe8800,
193 .flags = UPF_BOOT_AUTOCONF,
194 .type = PORT_SCIF,
195 .irqs = { 196, 196, 196, 196 },
196};
197
198static struct platform_device scif1_device = {
199 .name = "sh-sci",
200 .id = 1,
201 .dev = {
202 .platform_data = &scif1_platform_data,
203 },
204};
205
206static struct plat_sci_port scif2_platform_data = {
207 .mapbase = 0xfffe9000,
208 .flags = UPF_BOOT_AUTOCONF,
209 .type = PORT_SCIF,
210 .irqs = { 200, 200, 200, 200 },
211};
212
213static struct platform_device scif2_device = {
214 .name = "sh-sci",
215 .id = 2,
216 .dev = {
217 .platform_data = &scif2_platform_data,
218 },
219};
220
221static struct plat_sci_port scif3_platform_data = {
222 .mapbase = 0xfffe9800,
223 .flags = UPF_BOOT_AUTOCONF,
224 .type = PORT_SCIF,
225 .irqs = { 204, 204, 204, 204 },
226};
227
228static struct platform_device scif3_device = {
229 .name = "sh-sci",
230 .id = 3,
205 .dev = { 231 .dev = {
206 .platform_data = sci_platform_data, 232 .platform_data = &scif3_platform_data,
207 }, 233 },
208}; 234};
209 235
@@ -354,7 +380,10 @@ static struct platform_device rtc_device = {
354}; 380};
355 381
356static struct platform_device *sh7203_devices[] __initdata = { 382static struct platform_device *sh7203_devices[] __initdata = {
357 &sci_device, 383 &scif0_device,
384 &scif1_device,
385 &scif2_device,
386 &scif3_device,
358 &cmt0_device, 387 &cmt0_device,
359 &cmt1_device, 388 &cmt1_device,
360 &mtu2_0_device, 389 &mtu2_0_device,
@@ -375,6 +404,10 @@ void __init plat_irq_setup(void)
375} 404}
376 405
377static struct platform_device *sh7203_early_devices[] __initdata = { 406static struct platform_device *sh7203_early_devices[] __initdata = {
407 &scif0_device,
408 &scif1_device,
409 &scif2_device,
410 &scif3_device,
378 &cmt0_device, 411 &cmt0_device,
379 &cmt1_device, 412 &cmt1_device,
380 &mtu2_0_device, 413 &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index a9ccc5e8d9e9..064873585a8b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -133,37 +133,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
133static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups, 133static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
134 mask_registers, prio_registers, NULL); 134 mask_registers, prio_registers, NULL);
135 135
136static struct plat_sci_port sci_platform_data[] = { 136static struct plat_sci_port scif0_platform_data = {
137 { 137 .mapbase = 0xfffe8000,
138 .mapbase = 0xfffe8000, 138 .flags = UPF_BOOT_AUTOCONF,
139 .flags = UPF_BOOT_AUTOCONF, 139 .type = PORT_SCIF,
140 .type = PORT_SCIF, 140 .irqs = { 240, 240, 240, 240 },
141 .irqs = { 240, 240, 240, 240 },
142 }, {
143 .mapbase = 0xfffe8800,
144 .flags = UPF_BOOT_AUTOCONF,
145 .type = PORT_SCIF,
146 .irqs = { 244, 244, 244, 244 },
147 }, {
148 .mapbase = 0xfffe9000,
149 .flags = UPF_BOOT_AUTOCONF,
150 .type = PORT_SCIF,
151 .irqs = { 248, 248, 248, 248 },
152 }, {
153 .mapbase = 0xfffe9800,
154 .flags = UPF_BOOT_AUTOCONF,
155 .type = PORT_SCIF,
156 .irqs = { 252, 252, 252, 252 },
157 }, {
158 .flags = 0,
159 }
160}; 141};
161 142
162static struct platform_device sci_device = { 143static struct platform_device scif0_device = {
163 .name = "sh-sci", 144 .name = "sh-sci",
164 .id = -1, 145 .id = 0,
146 .dev = {
147 .platform_data = &scif0_platform_data,
148 },
149};
150
151static struct plat_sci_port scif1_platform_data = {
152 .mapbase = 0xfffe8800,
153 .flags = UPF_BOOT_AUTOCONF,
154 .type = PORT_SCIF,
155 .irqs = { 244, 244, 244, 244 },
156};
157
158static struct platform_device scif1_device = {
159 .name = "sh-sci",
160 .id = 1,
161 .dev = {
162 .platform_data = &scif1_platform_data,
163 },
164};
165
166static struct plat_sci_port scif2_platform_data = {
167 .mapbase = 0xfffe9000,
168 .flags = UPF_BOOT_AUTOCONF,
169 .type = PORT_SCIF,
170 .irqs = { 248, 248, 248, 248 },
171};
172
173static struct platform_device scif2_device = {
174 .name = "sh-sci",
175 .id = 2,
176 .dev = {
177 .platform_data = &scif2_platform_data,
178 },
179};
180
181static struct plat_sci_port scif3_platform_data = {
182 .mapbase = 0xfffe9800,
183 .flags = UPF_BOOT_AUTOCONF,
184 .type = PORT_SCIF,
185 .irqs = { 252, 252, 252, 252 },
186};
187
188static struct platform_device scif3_device = {
189 .name = "sh-sci",
190 .id = 3,
165 .dev = { 191 .dev = {
166 .platform_data = sci_platform_data, 192 .platform_data = &scif3_platform_data,
167 }, 193 },
168}; 194};
169 195
@@ -325,7 +351,10 @@ static struct platform_device mtu2_2_device = {
325}; 351};
326 352
327static struct platform_device *sh7206_devices[] __initdata = { 353static struct platform_device *sh7206_devices[] __initdata = {
328 &sci_device, 354 &scif0_device,
355 &scif1_device,
356 &scif2_device,
357 &scif3_device,
329 &cmt0_device, 358 &cmt0_device,
330 &cmt1_device, 359 &cmt1_device,
331 &mtu2_0_device, 360 &mtu2_0_device,
@@ -346,6 +375,10 @@ void __init plat_irq_setup(void)
346} 375}
347 376
348static struct platform_device *sh7206_early_devices[] __initdata = { 377static struct platform_device *sh7206_early_devices[] __initdata = {
378 &scif0_device,
379 &scif1_device,
380 &scif2_device,
381 &scif3_device,
349 &cmt0_device, 382 &cmt0_device,
350 &cmt1_device, 383 &cmt1_device,
351 &mtu2_0_device, 384 &mtu2_0_device,
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-12 03:09:30 -0400