Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

130 files changed, 6836 insertions, 3553 deletions

diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index a2d0a40f3848..02fd3ae8b0ee 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -9,8 +9,13 @@ ifdef CONFIG_FUNCTION_TRACER
 CFLAGS_REMOVE_ftrace.o = -pg
 endif
 
-obj-y   := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o      \
-           machvec.o nmi_debug.o process_$(BITS).o ptrace_$(BITS).o     \
+CFLAGS_REMOVE_return_address.o = -pg
+
+obj-y   := debugtraps.o dma-nommu.o dumpstack.o                         \
+           idle.o io.o io_generic.o irq.o                               \
+           irq_$(BITS).o machvec.o nmi_debug.o process.o                \
+           process_$(BITS).o ptrace_$(BITS).o                           \
+           reboot.o return_address.o                                    \
            setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o            \
            syscalls_$(BITS).o time.o topology.o traps.o                 \
            traps_$(BITS).o unwinder.o
@@ -22,20 +27,20 @@ obj-$(CONFIG_SH_STANDARD_BIOS)	+= sh_bios.o
 obj-$(CONFIG_KGDB)              += kgdb.o
 obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
 obj-$(CONFIG_MODULES)           += sh_ksyms_$(BITS).o module.o
-obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
-obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FTRACE_SYSCALLS)   += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
 obj-$(CONFIG_DUMP_CODE)         += disassemble.o
 obj-$(CONFIG_HIBERNATION)       += swsusp.o
 obj-$(CONFIG_DWARF_UNWINDER)    += dwarf.o
+obj-$(CONFIG_PERF_EVENTS)       += perf_event.o perf_callchain.o
 
+obj-$(CONFIG_HAVE_HW_BREAKPOINT)                += hw_breakpoint.o
 obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += localtimer.o
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index d218e808294e..08a2be775b6c 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -34,5 +34,28 @@ int main(void)
         DEFINE(PBE_NEXT, offsetof(struct pbe, next));
         DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs));
 #endif
+
+        DEFINE(SH_SLEEP_MODE, offsetof(struct sh_sleep_data, mode));
+        DEFINE(SH_SLEEP_SF_PRE, offsetof(struct sh_sleep_data, sf_pre));
+        DEFINE(SH_SLEEP_SF_POST, offsetof(struct sh_sleep_data, sf_post));
+        DEFINE(SH_SLEEP_RESUME, offsetof(struct sh_sleep_data, resume));
+        DEFINE(SH_SLEEP_VBR, offsetof(struct sh_sleep_data, vbr));
+        DEFINE(SH_SLEEP_SPC, offsetof(struct sh_sleep_data, spc));
+        DEFINE(SH_SLEEP_SR, offsetof(struct sh_sleep_data, sr));
+        DEFINE(SH_SLEEP_SP, offsetof(struct sh_sleep_data, sp));
+        DEFINE(SH_SLEEP_BASE_ADDR, offsetof(struct sh_sleep_data, addr));
+        DEFINE(SH_SLEEP_BASE_DATA, offsetof(struct sh_sleep_data, data));
+        DEFINE(SH_SLEEP_REG_STBCR, offsetof(struct sh_sleep_regs, stbcr));
+        DEFINE(SH_SLEEP_REG_BAR, offsetof(struct sh_sleep_regs, bar));
+        DEFINE(SH_SLEEP_REG_PTEH, offsetof(struct sh_sleep_regs, pteh));
+        DEFINE(SH_SLEEP_REG_PTEL, offsetof(struct sh_sleep_regs, ptel));
+        DEFINE(SH_SLEEP_REG_TTB, offsetof(struct sh_sleep_regs, ttb));
+        DEFINE(SH_SLEEP_REG_TEA, offsetof(struct sh_sleep_regs, tea));
+        DEFINE(SH_SLEEP_REG_MMUCR, offsetof(struct sh_sleep_regs, mmucr));
+        DEFINE(SH_SLEEP_REG_PTEA, offsetof(struct sh_sleep_regs, ptea));
+        DEFINE(SH_SLEEP_REG_PASCR, offsetof(struct sh_sleep_regs, pascr));
+        DEFINE(SH_SLEEP_REG_IRMCR, offsetof(struct sh_sleep_regs, irmcr));
+        DEFINE(SH_SLEEP_REG_CCR, offsetof(struct sh_sleep_regs, ccr));
+        DEFINE(SH_SLEEP_REG_RAMCR, offsetof(struct sh_sleep_regs, ramcr));
         return 0;
 }
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 3d6b9312dc47..0e48bc61c272 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -15,8 +15,9 @@ obj-$(CONFIG_ARCH_SHMOBILE)	+= shmobile/
 
 # Common interfaces.
 
-obj-$(CONFIG_UBC_WAKEUP)        += ubc.o
 obj-$(CONFIG_SH_ADC)            += adc.o
 obj-$(CONFIG_SH_CLK_CPG)        += clock-cpg.o
+obj-$(CONFIG_SH_FPU)            += fpu.o
+obj-$(CONFIG_SH_FPU_EMU)        += fpu.o
 
 obj-y   += irq/ init.o clock.o hwblk.o
diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c
index da3d6877f93d..d307571d54b6 100644
--- a/arch/sh/kernel/cpu/adc.c
+++ b/arch/sh/kernel/cpu/adc.c
@@ -18,19 +18,19 @@ int adc_single(unsigned int channel)
 
         off = (channel & 0x03) << 2;
 
-        csr = ctrl_inb(ADCSR);
+        csr = __raw_readb(ADCSR);
         csr = channel | ADCSR_ADST | ADCSR_CKS;
-        ctrl_outb(csr, ADCSR);
+        __raw_writeb(csr, ADCSR);
 
         do {
-                csr = ctrl_inb(ADCSR);
+                csr = __raw_readb(ADCSR);
         } while ((csr & ADCSR_ADF) == 0);
 
         csr &= ~(ADCSR_ADF | ADCSR_ADST);
-        ctrl_outb(csr, ADCSR);
+        __raw_writeb(csr, ADCSR);
 
-        return (((ctrl_inb(ADDRAH + off) << 8) |
-                ctrl_inb(ADDRAL + off)) >> 6);
+        return (((__raw_readb(ADDRAH + off) << 8) |
+                __raw_readb(ADDRAL + off)) >> 6);
 }
 
 EXPORT_SYMBOL(adc_single);
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 6dfe2cced3fc..eed5eaff96ba 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -149,7 +149,8 @@ int __init sh_clk_div6_register(struct clk *clks, int nr)
 
 static unsigned long sh_clk_div4_recalc(struct clk *clk)
 {
-        struct clk_div_mult_table *table = clk->priv;
+        struct clk_div4_table *d4t = clk->priv;
+        struct clk_div_mult_table *table = d4t->div_mult_table;
         unsigned int idx;
 
         clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
@@ -160,17 +161,90 @@ static unsigned long sh_clk_div4_recalc(struct clk *clk)
         return clk->freq_table[idx].frequency;
 }
 
+static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
+{
+        struct clk_div4_table *d4t = clk->priv;
+        struct clk_div_mult_table *table = d4t->div_mult_table;
+        u32 value;
+        int ret;
+
+        if (!strcmp("pll_clk", parent->name))
+                value = __raw_readl(clk->enable_reg) & ~(1 << 7);
+        else
+                value = __raw_readl(clk->enable_reg) | (1 << 7);
+
+        ret = clk_reparent(clk, parent);
+        if (ret < 0)
+                return ret;
+
+        __raw_writel(value, clk->enable_reg);
+
+        /* Rebiuld the frequency table */
+        clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
+                             table, &clk->arch_flags);
+
+        return 0;
+}
+
+static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id)
+{
+        struct clk_div4_table *d4t = clk->priv;
+        unsigned long value;
+        int idx = clk_rate_table_find(clk, clk->freq_table, rate);
+        if (idx < 0)
+                return idx;
+
+        value = __raw_readl(clk->enable_reg);
+        value &= ~(0xf << clk->enable_bit);
+        value |= (idx << clk->enable_bit);
+        __raw_writel(value, clk->enable_reg);
+
+        if (d4t->kick)
+                d4t->kick(clk);
+
+        return 0;
+}
+
+static int sh_clk_div4_enable(struct clk *clk)
+{
+        __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << 8), clk->enable_reg);
+        return 0;
+}
+
+static void sh_clk_div4_disable(struct clk *clk)
+{
+        __raw_writel(__raw_readl(clk->enable_reg) | (1 << 8), clk->enable_reg);
+}
+
 static struct clk_ops sh_clk_div4_clk_ops = {
         .recalc         = sh_clk_div4_recalc,
+        .set_rate       = sh_clk_div4_set_rate,
         .round_rate     = sh_clk_div_round_rate,
 };
 
-int __init sh_clk_div4_register(struct clk *clks, int nr,
-                                struct clk_div_mult_table *table)
+static struct clk_ops sh_clk_div4_enable_clk_ops = {
+        .recalc         = sh_clk_div4_recalc,
+        .set_rate       = sh_clk_div4_set_rate,
+        .round_rate     = sh_clk_div_round_rate,
+        .enable         = sh_clk_div4_enable,
+        .disable        = sh_clk_div4_disable,
+};
+
+static struct clk_ops sh_clk_div4_reparent_clk_ops = {
+        .recalc         = sh_clk_div4_recalc,
+        .set_rate       = sh_clk_div4_set_rate,
+        .round_rate     = sh_clk_div_round_rate,
+        .enable         = sh_clk_div4_enable,
+        .disable        = sh_clk_div4_disable,
+        .set_parent     = sh_clk_div4_set_parent,
+};
+
+static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
+                        struct clk_div4_table *table, struct clk_ops *ops)
 {
         struct clk *clkp;
         void *freq_table;
-        int nr_divs = table->nr_divisors;
+        int nr_divs = table->div_mult_table->nr_divisors;
         int freq_table_size = sizeof(struct cpufreq_frequency_table);
         int ret = 0;
         int k;
@@ -185,7 +259,7 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
         for (k = 0; !ret && (k < nr); k++) {
                 clkp = clks + k;
 
-                clkp->ops = &sh_clk_div4_clk_ops;
+                clkp->ops = ops;
                 clkp->id = -1;
                 clkp->priv = table;
 
@@ -198,6 +272,26 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
         return ret;
 }
 
+int __init sh_clk_div4_register(struct clk *clks, int nr,
+                                struct clk_div4_table *table)
+{
+        return sh_clk_div4_register_ops(clks, nr, table, &sh_clk_div4_clk_ops);
+}
+
+int __init sh_clk_div4_enable_register(struct clk *clks, int nr,
+                                struct clk_div4_table *table)
+{
+        return sh_clk_div4_register_ops(clks, nr, table,
+                                        &sh_clk_div4_enable_clk_ops);
+}
+
+int __init sh_clk_div4_reparent_register(struct clk *clks, int nr,
+                                struct clk_div4_table *table)
+{
+        return sh_clk_div4_register_ops(clks, nr, table,
+                                        &sh_clk_div4_reparent_clk_ops);
+}
+
 #ifdef CONFIG_SH_CLK_CPG_LEGACY
 static struct clk master_clk = {
         .name           = "master_clk",
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index f3a46be2ae81..e9fa1bfed53e 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
  *  If an entry has a device ID, it must match
  *  If an entry has a connection ID, it must match
  * Then we take the most specific entry - with the following
- * order of precidence: dev+con > dev only > con only.
+ * order of precedence: dev+con > dev only > con only.
  */
 static struct clk *clk_find(const char *dev_id, const char *con_id)
 {
@@ -598,7 +598,7 @@ static struct dentry *clk_debugfs_root;
 static int clk_debugfs_register_one(struct clk *c)
 {
         int err;
-        struct dentry *d, *child;
+        struct dentry *d, *child, *child_tmp;
         struct clk *pa = c->parent;
         char s[255];
         char *p = s;
@@ -630,7 +630,7 @@ static int clk_debugfs_register_one(struct clk *c)
 
 err_out:
         d = c->dentry;
-        list_for_each_entry(child, &d->d_subdirs, d_u.d_child)
+        list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
                 debugfs_remove(child);
         debugfs_remove(c->dentry);
         return err;
diff --git a/arch/sh/kernel/cpu/fpu.c b/arch/sh/kernel/cpu/fpu.c
new file mode 100644
index 000000000000..7f1b70cace35
--- /dev/null
+++ b/arch/sh/kernel/cpu/fpu.c
@@ -0,0 +1,85 @@
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <asm/processor.h>
+#include <asm/fpu.h>
+
+int init_fpu(struct task_struct *tsk)
+{
+        if (tsk_used_math(tsk)) {
+                if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
+                        unlazy_fpu(tsk, task_pt_regs(tsk));
+                return 0;
+        }
+
+        /*
+         * Memory allocation at the first usage of the FPU and other state.
+         */
+        if (!tsk->thread.xstate) {
+                tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
+                                                      GFP_KERNEL);
+                if (!tsk->thread.xstate)
+                        return -ENOMEM;
+        }
+
+        if (boot_cpu_data.flags & CPU_HAS_FPU) {
+                struct sh_fpu_hard_struct *fp = &tsk->thread.xstate->hardfpu;
+                memset(fp, 0, xstate_size);
+                fp->fpscr = FPSCR_INIT;
+        } else {
+                struct sh_fpu_soft_struct *fp = &tsk->thread.xstate->softfpu;
+                memset(fp, 0, xstate_size);
+                fp->fpscr = FPSCR_INIT;
+        }
+
+        set_stopped_child_used_math(tsk);
+        return 0;
+}
+
+#ifdef CONFIG_SH_FPU
+void __fpu_state_restore(void)
+{
+        struct task_struct *tsk = current;
+
+        restore_fpu(tsk);
+
+        task_thread_info(tsk)->status |= TS_USEDFPU;
+        tsk->fpu_counter++;
+}
+
+void fpu_state_restore(struct pt_regs *regs)
+{
+        struct task_struct *tsk = current;
+
+        if (unlikely(!user_mode(regs))) {
+                printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
+                BUG();
+                return;
+        }
+
+        if (!tsk_used_math(tsk)) {
+                local_irq_enable();
+                /*
+                 * does a slab alloc which can sleep
+                 */
+                if (init_fpu(tsk)) {
+                        /*
+                         * ran out of memory!
+                         */
+                        do_group_exit(SIGKILL);
+                        return;
+                }
+                local_irq_disable();
+        }
+
+        grab_fpu(regs);
+
+        __fpu_state_restore();
+}
+
+BUILD_TRAP_HANDLER(fpu_state_restore)
+{
+        TRAP_HANDLER_DECL;
+
+        fpu_state_restore(regs);
+}
+#endif /* CONFIG_SH_FPU */
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
index c0ad7d46e784..67a1e811cfe8 100644
--- a/arch/sh/kernel/cpu/hwblk.c
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -1,6 +1,5 @@
 #include <linux/clk.h>
 #include <linux/compiler.h>
-#include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
 #include <asm/suspend.h>
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index e932ebef4738..c736422344eb 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -24,22 +24,32 @@
 #include <asm/elf.h>
 #include <asm/io.h>
 #include <asm/smp.h>
-#ifdef CONFIG_SUPERH32
-#include <asm/ubc.h>
+#include <asm/sh_bios.h>
+
+#ifdef CONFIG_SH_FPU
+#define cpu_has_fpu     1
+#else
+#define cpu_has_fpu     0
+#endif
+
+#ifdef CONFIG_SH_DSP
+#define cpu_has_dsp     1
+#else
+#define cpu_has_dsp     0
 #endif
 
 /*
  * Generic wrapper for command line arguments to disable on-chip
  * peripherals (nofpu, nodsp, and so forth).
  */
-#define onchip_setup(x)                         \
-static int x##_disabled __initdata = 0;         \
-                                                \
-static int __init x##_setup(char *opts)         \
-{                                               \
-        x##_disabled = 1;                       \
-        return 1;                               \
-}                                               \
+#define onchip_setup(x)                                 \
+static int x##_disabled __initdata = !cpu_has_##x;      \
+                                                        \
+static int __init x##_setup(char *opts)                 \
+{                                                       \
+        x##_disabled = 1;                               \
+        return 1;                                       \
+}                                                       \
 __setup("no" __stringify(x), x##_setup);
 
 onchip_setup(fpu);
@@ -52,10 +62,10 @@ onchip_setup(dsp);
 static void __init speculative_execution_init(void)
 {
         /* Clear RABD */
-        ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
+        __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
 
         /* Flush the update */
-        (void)ctrl_inl(CPUOPM);
+        (void)__raw_readl(CPUOPM);
         ctrl_barrier();
 }
 #else
@@ -75,16 +85,11 @@ static void __init expmask_init(void)
         /*
          * Future proofing.
          *
-         * Disable support for slottable sleep instruction
-         * and non-nop instructions in the rte delay slot.
+         * Disable support for slottable sleep instruction, non-nop
+         * instructions in the rte delay slot, and associative writes to
+         * the memory-mapped cache array.
          */
-        expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP);
-
-        /*
-         * Enable associative writes to the memory-mapped cache array
-         * until the cache flush ops have been rewritten.
-         */
-        expmask |= EXPMASK_MMCAW;
+        expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP | EXPMASK_MMCAW);
 
         __raw_writel(expmask, EXPMASK);
         ctrl_barrier();
@@ -94,7 +99,7 @@ static void __init expmask_init(void)
 #endif
 
 /* 2nd-level cache init */
-void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
+void __attribute__ ((weak)) l2_cache_init(void)
 {
 }
 
@@ -102,12 +107,12 @@ void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
  * Generic first-level cache init
  */
 #ifdef CONFIG_SUPERH32
-static void __uses_jump_to_uncached cache_init(void)
+static void cache_init(void)
 {
         unsigned long ccr, flags;
 
         jump_to_uncached();
-        ccr = ctrl_inl(CCR);
+        ccr = __raw_readl(CCR);
 
         /*
          * At this point we don't know whether the cache is enabled or not - a
@@ -151,7 +156,7 @@ static void __uses_jump_to_uncached cache_init(void)
                         for (addr = addrstart;
                              addr < addrstart + waysize;
                              addr += current_cpu_data.dcache.linesz)
-                                ctrl_outl(0, addr);
+                                __raw_writel(0, addr);
 
                         addrstart += current_cpu_data.dcache.way_incr;
                 } while (--ways);
@@ -184,7 +189,7 @@ static void __uses_jump_to_uncached cache_init(void)
 
         l2_cache_init();
 
-        ctrl_outl(flags, CCR);
+        __raw_writel(flags, CCR);
         back_to_cached();
 }
 #else
@@ -212,6 +217,18 @@ static void detect_cache_shape(void)
                 l2_cache_shape = -1; /* No S-cache */
 }
 
+static void __init fpu_init(void)
+{
+        /* Disable the FPU */
+        if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) {
+                printk("FPU Disabled\n");
+                current_cpu_data.flags &= ~CPU_HAS_FPU;
+        }
+
+        disable_fpu();
+        clear_used_math();
+}
+
 #ifdef CONFIG_SH_DSP
 static void __init release_dsp(void)
 {
@@ -249,28 +266,35 @@ static void __init dsp_init(void)
         if (sr & SR_DSP)
                 current_cpu_data.flags |= CPU_HAS_DSP;
 
+        /* Disable the DSP */
+        if (dsp_disabled && (current_cpu_data.flags & CPU_HAS_DSP)) {
+                printk("DSP Disabled\n");
+                current_cpu_data.flags &= ~CPU_HAS_DSP;
+        }
+
         /* Now that we've determined the DSP status, clear the DSP bit. */
         release_dsp();
 }
+#else
+static inline void __init dsp_init(void) { }
 #endif /* CONFIG_SH_DSP */
 
 /**
  * sh_cpu_init
  *
- * This is our initial entry point for each CPU, and is invoked on the boot
- * CPU prior to calling start_kernel(). For SMP, a combination of this and
- * start_secondary() will bring up each processor to a ready state prior
- * to hand forking the idle loop.
+ * This is our initial entry point for each CPU, and is invoked on the
+ * boot CPU prior to calling start_kernel(). For SMP, a combination of
+ * this and start_secondary() will bring up each processor to a ready
+ * state prior to hand forking the idle loop.
  *
- * We do all of the basic processor init here, including setting up the
- * caches, FPU, DSP, kicking the UBC, etc. By the time start_kernel() is
- * hit (and subsequently platform_setup()) things like determining the
- * CPU subtype and initial configuration will all be done.
+ * We do all of the basic processor init here, including setting up
+ * the caches, FPU, DSP, etc. By the time start_kernel() is hit (and
+ * subsequently platform_setup()) things like determining the CPU
+ * subtype and initial configuration will all be done.
  *
  * Each processor family is still responsible for doing its own probing
  * and cache configuration in detect_cpu_and_cache_system().
  */
-
 asmlinkage void __init sh_cpu_init(void)
 {
         current_thread_info()->cpu = hard_smp_processor_id();
@@ -307,18 +331,8 @@ asmlinkage void __init sh_cpu_init(void)
                 detect_cache_shape();
         }
 
-        /* Disable the FPU */
-        if (fpu_disabled) {
-                printk("FPU Disabled\n");
-                current_cpu_data.flags &= ~CPU_HAS_FPU;
-                disable_fpu();
-        }
-
-        /* FPU initialization */
-        if ((current_cpu_data.flags & CPU_HAS_FPU)) {
-                clear_thread_flag(TIF_USEDFPU);
-                clear_used_math();
-        }
+        fpu_init();
+        dsp_init();
 
         /*
          * Initialize the per-CPU ASID cache very early, since the
@@ -326,29 +340,24 @@ asmlinkage void __init sh_cpu_init(void)
          */
         current_cpu_data.asid_cache = NO_CONTEXT;
 
-#ifdef CONFIG_SH_DSP
-        /* Probe for DSP */
-        dsp_init();
+        speculative_execution_init();
+        expmask_init();
 
-        /* Disable the DSP */
-        if (dsp_disabled) {
-                printk("DSP Disabled\n");
-                current_cpu_data.flags &= ~CPU_HAS_DSP;
-                release_dsp();
-        }
-#endif
+        /* Do the rest of the boot processor setup */
+        if (raw_smp_processor_id() == 0) {
+                /* Save off the BIOS VBR, if there is one */
+                sh_bios_vbr_init();
 
-        /*
-         * Some brain-damaged loaders decided it would be a good idea to put
-         * the UBC to sleep. This causes some issues when it comes to things
-         * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB.  So ..
-         * we wake it up and hope that all is well.
-         */
-#ifdef CONFIG_SUPERH32
-        if (raw_smp_processor_id() == 0)
-                ubc_wakeup();
-#endif
+                /*
+                 * Setup VBR for boot CPU. Secondary CPUs do this through
+                 * start_secondary().
+                 */
+                per_cpu_trap_init();
 
-        speculative_execution_init();
-        expmask_init();
+                /*
+                 * Boot processor to setup the FP and extended state
+                 * context info.
+                 */
+                init_thread_xstate();
+        }
 }
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 06e7e2959b54..96a239583948 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -123,7 +123,7 @@ static void enable_intc_irq(unsigned int irq)
                 bitmask = 1 << (irq - 32);
         }
 
-        ctrl_outl(bitmask, reg);
+        __raw_writel(bitmask, reg);
 }
 
 static void disable_intc_irq(unsigned int irq)
@@ -139,7 +139,7 @@ static void disable_intc_irq(unsigned int irq)
                 bitmask = 1 << (irq - 32);
         }
 
-        ctrl_outl(bitmask, reg);
+        __raw_writel(bitmask, reg);
 }
 
 static void mask_and_ack_intc(unsigned int irq)
@@ -170,11 +170,11 @@ void __init plat_irq_setup(void)
 
 
         /* Disable all interrupts and set all priorities to 0 to avoid trouble */
-        ctrl_outl(-1, INTC_INTDSB_0);
-        ctrl_outl(-1, INTC_INTDSB_1);
+        __raw_writel(-1, INTC_INTDSB_0);
+        __raw_writel(-1, INTC_INTDSB_1);
 
         for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8)
-                ctrl_outl( NO_PRIORITY, reg);
+                __raw_writel( NO_PRIORITY, reg);
 
 
 #ifdef CONFIG_SH_CAYMAN
@@ -199,7 +199,7 @@ void __init plat_irq_setup(void)
                         reg = INTC_ICR_SET;
                         i = IRQ_IRL0;
                 }
-                ctrl_outl(INTC_ICR_IRLM, reg);
+                __raw_writel(INTC_ICR_IRLM, reg);
 
                 /* Set interrupt priorities according to platform description */
                 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
@@ -207,7 +207,7 @@ void __init plat_irq_setup(void)
                                 ((i % INTC_INTPRI_PPREG) * 4);
                         if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
                                 /* Upon the 7th, set Priority Register */
-                                ctrl_outl(data, reg);
+                                __raw_writel(data, reg);
                                 data = 0;
                                 reg += 8;
                         }
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index c1508a90fc6a..9282d965a1b6 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -17,16 +17,17 @@
  * for more details.
  */
 #include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/io.h>
-#include <linux/interrupt.h>
 #include <linux/topology.h>
 
 static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
 {
         struct irq_chip *chip = get_irq_chip(irq);
-        return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
+        return container_of(chip, struct ipr_desc, chip);
 }
 
 static void disable_ipr_irq(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 4fe863170e31..0c9f24d7a02f 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -31,7 +31,7 @@ static const int pfc_divisors[] = {1,2,0,4};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_master_clk_ops = {
@@ -40,7 +40,7 @@ static struct clk_ops sh7619_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -50,7 +50,7 @@ static struct clk_ops sh7619_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_bus_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 8555c05e8667..114c7cee7184 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -59,32 +59,48 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
                          NULL, prio_registers, NULL);
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xf8400000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 88, 88, 88, 88 },
-        }, {
-                .mapbase        = 0xf8410000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 92, 92, 92, 92 },
-        }, {
-                .mapbase        = 0xf8420000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 96, 96, 96, 96 },
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xf8400000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 88, 88, 88, 88 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xf8410000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 92, 92, 92, 92 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xf8420000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 96, 96, 96, 96 },
+};
+
+static struct platform_device scif2_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 2,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif2_platform_data,
         },
 };
 
@@ -176,7 +192,9 @@ static struct platform_device cmt1_device = {
 };
 
 static struct platform_device *sh7619_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &eth_device,
         &cmt0_device,
         &cmt1_device,
@@ -195,6 +213,9 @@ void __init plat_irq_setup(void)
 }
 
 static struct platform_device *sh7619_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &cmt0_device,
         &cmt1_device,
 };
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 7814c76159a7..b26264dc2aef 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7201_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7201_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -53,7 +53,7 @@ static struct clk_ops sh7201_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -63,7 +63,7 @@ static struct clk_ops sh7201_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
+        int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 940986965102..7e75d8f79502 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -39,7 +39,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ;
+        clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
 }
 
 static struct clk_ops sh7203_master_clk_ops = {
@@ -48,7 +48,7 @@ static struct clk_ops sh7203_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -58,7 +58,7 @@ static struct clk_ops sh7203_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx-2];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index c2268bdeceeb..b27a5e2687ab 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7206_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -53,7 +53,7 @@ static struct clk_ops sh7206_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_bus_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh7206_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 6df2fb98eb30..488d24e0cdf0 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -25,14 +25,11 @@
 
 /*
  * Save FPU registers onto task structure.
- * Assume called with FPU enabled (SR.FD=0).
  */
-void
-save_fpu(struct task_struct *tsk, struct pt_regs *regs)
+void save_fpu(struct task_struct *tsk)
 {
         unsigned long dummy;
 
-        clear_tsk_thread_flag(tsk, TIF_USEDFPU);
         enable_fpu();
         asm volatile("sts.l     fpul, @-%0\n\t"
                      "sts.l     fpscr, @-%0\n\t"
@@ -54,17 +51,15 @@ save_fpu(struct task_struct *tsk, struct pt_regs *regs)
                      "fmov.s    fr0, @-%0\n\t"
                      "lds       %3, fpscr\n\t"
                      : "=r" (dummy)
-                     : "0" ((char *)(&tsk->thread.fpu.hard.status)),
+                     : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)),
                        "r" (FPSCR_RCHG),
                        "r" (FPSCR_INIT)
                      : "memory");
 
         disable_fpu();
-        release_fpu(regs);
 }
 
-static void
-restore_fpu(struct task_struct *tsk)
+void restore_fpu(struct task_struct *tsk)
 {
         unsigned long dummy;
 
@@ -88,45 +83,12 @@ restore_fpu(struct task_struct *tsk)
                      "lds.l     @%0+, fpscr\n\t"
                      "lds.l     @%0+, fpul\n\t"
                      : "=r" (dummy)
-                     : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG)
+                     : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
                      : "memory");
         disable_fpu();
 }
 
 /*
- * Load the FPU with signalling NANS.  This bit pattern we're using
- * has the property that no matter wether considered as single or as
- * double precission represents signaling NANS.
- */
-
-static void
-fpu_init(void)
-{
-        enable_fpu();
-        asm volatile("lds       %0, fpul\n\t"
-                     "fsts      fpul, fr0\n\t"
-                     "fsts      fpul, fr1\n\t"
-                     "fsts      fpul, fr2\n\t"
-                     "fsts      fpul, fr3\n\t"
-                     "fsts      fpul, fr4\n\t"
-                     "fsts      fpul, fr5\n\t"
-                     "fsts      fpul, fr6\n\t"
-                     "fsts      fpul, fr7\n\t"
-                     "fsts      fpul, fr8\n\t"
-                     "fsts      fpul, fr9\n\t"
-                     "fsts      fpul, fr10\n\t"
-                     "fsts      fpul, fr11\n\t"
-                     "fsts      fpul, fr12\n\t"
-                     "fsts      fpul, fr13\n\t"
-                     "fsts      fpul, fr14\n\t"
-                     "fsts      fpul, fr15\n\t"
-                     "lds       %2, fpscr\n\t"
-                     : /* no output */
-                     : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT));
-        disable_fpu();
-}
-
-/*
  *      Emulate arithmetic ops on denormalized number for some FPU insns.
  */
 
@@ -493,9 +455,9 @@ ieee_fpe_handler (struct pt_regs *regs)
         if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
                 struct task_struct *tsk = current;
 
-                if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) {
+                if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) {
                         /* FPU error */
-                        denormal_to_double (&tsk->thread.fpu.hard,
+                        denormal_to_double (&tsk->thread.xstate->hardfpu,
                                             (finsn >> 8) & 0xf);
                 } else
                         return 0;
@@ -510,9 +472,9 @@ ieee_fpe_handler (struct pt_regs *regs)
 
                 n = (finsn >> 8) & 0xf;
                 m = (finsn >> 4) & 0xf;
-                hx = tsk->thread.fpu.hard.fp_regs[n];
-                hy = tsk->thread.fpu.hard.fp_regs[m];
-                fpscr = tsk->thread.fpu.hard.fpscr;
+                hx = tsk->thread.xstate->hardfpu.fp_regs[n];
+                hy = tsk->thread.xstate->hardfpu.fp_regs[m];
+                fpscr = tsk->thread.xstate->hardfpu.fpscr;
                 prec = fpscr & (1 << 19);
 
                 if ((fpscr & FPSCR_FPU_ERROR)
@@ -522,15 +484,15 @@ ieee_fpe_handler (struct pt_regs *regs)
 
                         /* FPU error because of denormal */
                         llx = ((long long) hx << 32)
-                               | tsk->thread.fpu.hard.fp_regs[n+1];
+                               | tsk->thread.xstate->hardfpu.fp_regs[n+1];
                         lly = ((long long) hy << 32)
-                               | tsk->thread.fpu.hard.fp_regs[m+1];
+                               | tsk->thread.xstate->hardfpu.fp_regs[m+1];
                         if ((hx & 0x7fffffff) >= 0x00100000)
                                 llx = denormal_muld(lly, llx);
                         else
                                 llx = denormal_muld(llx, lly);
-                        tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
-                        tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
+                        tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
                 } else if ((fpscr & FPSCR_FPU_ERROR)
                      && (!prec && ((hx & 0x7fffffff) < 0x00800000
                                    || (hy & 0x7fffffff) < 0x00800000))) {
@@ -539,7 +501,7 @@ ieee_fpe_handler (struct pt_regs *regs)
                                 hx = denormal_mulf(hy, hx);
                         else
                                 hx = denormal_mulf(hx, hy);
-                        tsk->thread.fpu.hard.fp_regs[n] = hx;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
                 } else
                         return 0;
 
@@ -553,9 +515,9 @@ ieee_fpe_handler (struct pt_regs *regs)
 
                 n = (finsn >> 8) & 0xf;
                 m = (finsn >> 4) & 0xf;
-                hx = tsk->thread.fpu.hard.fp_regs[n];
-                hy = tsk->thread.fpu.hard.fp_regs[m];
-                fpscr = tsk->thread.fpu.hard.fpscr;
+                hx = tsk->thread.xstate->hardfpu.fp_regs[n];
+                hy = tsk->thread.xstate->hardfpu.fp_regs[m];
+                fpscr = tsk->thread.xstate->hardfpu.fpscr;
                 prec = fpscr & (1 << 19);
 
                 if ((fpscr & FPSCR_FPU_ERROR)
@@ -565,15 +527,15 @@ ieee_fpe_handler (struct pt_regs *regs)
 
                         /* FPU error because of denormal */
                         llx = ((long long) hx << 32)
-                               | tsk->thread.fpu.hard.fp_regs[n+1];
+                               | tsk->thread.xstate->hardfpu.fp_regs[n+1];
                         lly = ((long long) hy << 32)
-                               | tsk->thread.fpu.hard.fp_regs[m+1];
+                               | tsk->thread.xstate->hardfpu.fp_regs[m+1];
                         if ((finsn & 0xf00f) == 0xf000)
                                 llx = denormal_addd(llx, lly);
                         else
                                 llx = denormal_addd(llx, lly ^ (1LL << 63));
-                        tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
-                        tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
+                        tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
                 } else if ((fpscr & FPSCR_FPU_ERROR)
                      && (!prec && ((hx & 0x7fffffff) < 0x00800000
                                    || (hy & 0x7fffffff) < 0x00800000))) {
@@ -582,7 +544,7 @@ ieee_fpe_handler (struct pt_regs *regs)
                                 hx = denormal_addf(hx, hy);
                         else
                                 hx = denormal_addf(hx, hy ^ 0x80000000);
-                        tsk->thread.fpu.hard.fp_regs[n] = hx;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
                 } else
                         return 0;
 
@@ -598,37 +560,15 @@ BUILD_TRAP_HANDLER(fpu_error)
         struct task_struct *tsk = current;
         TRAP_HANDLER_DECL;
 
-        save_fpu(tsk, regs);
+        __unlazy_fpu(tsk, regs);
         if (ieee_fpe_handler(regs)) {
-                tsk->thread.fpu.hard.fpscr &=
+                tsk->thread.xstate->hardfpu.fpscr &=
                         ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
                 grab_fpu(regs);
                 restore_fpu(tsk);
-                set_tsk_thread_flag(tsk, TIF_USEDFPU);
+                task_thread_info(tsk)->status |= TS_USEDFPU;
                 return;
         }
 
         force_sig(SIGFPE, tsk);
 }
-
-BUILD_TRAP_HANDLER(fpu_state_restore)
-{
-        struct task_struct *tsk = current;
-        TRAP_HANDLER_DECL;
-
-        grab_fpu(regs);
-        if (!user_mode(regs)) {
-                printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
-                return;
-        }
-
-        if (used_math()) {
-                /* Using the FPU again.  */
-                restore_fpu(tsk);
-        } else  {
-                /* First time FPU user.  */
-                fpu_init();
-                set_used_math();
-        }
-        set_tsk_thread_flag(tsk, TIF_USEDFPU);
-}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index b67376445315..8f669dc9b0da 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -207,27 +207,23 @@ static struct platform_device mtu2_2_device = {
         .num_resources  = ARRAY_SIZE(mtu2_2_resources),
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xff804000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 220, 220, 220, 220 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xff804000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 220, 220, 220, 220 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif0_platform_data,
         },
 };
 
 static struct platform_device *mxg_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
         &mtu2_0_device,
         &mtu2_1_device,
         &mtu2_2_device,
@@ -246,6 +242,7 @@ void __init plat_irq_setup(void)
 }
 
 static struct platform_device *mxg_early_devices[] __initdata = {
+        &scif0_device,
         &mtu2_0_device,
         &mtu2_1_device,
         &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index fbde5b75deb9..4ccfeb59eb1a 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -177,57 +177,123 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
                          mask_registers, prio_registers, NULL);
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfffe8000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 180, 180, 180, 180 }
-        }, {
-                .mapbase        = 0xfffe8800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 184, 184, 184, 184 }
-        }, {
-                .mapbase        = 0xfffe9000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 188, 188, 188, 188 }
-        }, {
-                .mapbase        = 0xfffe9800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 192, 192, 192, 192 }
-        }, {
-                .mapbase        = 0xfffea000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 196, 196, 196, 196 }
-        }, {
-                .mapbase        = 0xfffea800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 200, 200, 200, 200 }
-        }, {
-                .mapbase        = 0xfffeb000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 204, 204, 204, 204 }
-        }, {
-                .mapbase        = 0xfffeb800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 208, 208, 208, 208 }
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xfffe8000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 180, 180, 180, 180 }
+};
+
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfffe8800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 184, 184, 184, 184 }
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfffe9000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 188, 188, 188, 188 }
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfffe9800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 192, 192, 192, 192 }
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xfffea000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 196, 196, 196, 196 }
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xfffea800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 200, 200, 200, 200 }
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xfffeb000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 204, 204, 204, 204 }
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xfffeb800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 208, 208, 208, 208 }
+};
+
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif7_platform_data,
         },
 };
 
@@ -345,7 +411,14 @@ static struct platform_device mtu2_2_device = {
 };
 
 static struct platform_device *sh7201_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
         &rtc_device,
         &mtu2_0_device,
         &mtu2_1_device,
@@ -365,6 +438,14 @@ void __init plat_irq_setup(void)
 }
 
 static struct platform_device *sh7201_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
         &mtu2_0_device,
         &mtu2_1_device,
         &mtu2_2_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index d3fd536c9a84..3136966cc9b3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -173,37 +173,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
                          mask_registers, prio_registers, NULL);
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfffe8000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 192, 192, 192, 192 },
-        }, {
-                .mapbase        = 0xfffe8800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 196, 196, 196, 196 },
-        }, {
-                .mapbase        = 0xfffe9000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 200, 200, 200, 200 },
-        }, {
-                .mapbase        = 0xfffe9800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           =  { 204, 204, 204, 204 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xfffe8000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 192, 192, 192, 192 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfffe8800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 196, 196, 196, 196 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfffe9000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 200, 200, 200, 200 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfffe9800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           =  { 204, 204, 204, 204 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif3_platform_data,
         },
 };
 
@@ -354,7 +380,10 @@ static struct platform_device rtc_device = {
 };
 
 static struct platform_device *sh7203_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &cmt0_device,
         &cmt1_device,
         &mtu2_0_device,
@@ -375,6 +404,10 @@ void __init plat_irq_setup(void)
 }
 
 static struct platform_device *sh7203_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &cmt0_device,
         &cmt1_device,
         &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index a9ccc5e8d9e9..064873585a8b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -133,37 +133,63 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
                          mask_registers, prio_registers, NULL);
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfffe8000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 240, 240, 240, 240 },
-        }, {
-                .mapbase        = 0xfffe8800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 244, 244, 244, 244 },
-        }, {
-                .mapbase        = 0xfffe9000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 248, 248, 248, 248 },
-        }, {
-                .mapbase        = 0xfffe9800,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 252, 252, 252, 252 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xfffe8000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 240, 240, 240, 240 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfffe8800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 244, 244, 244, 244 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfffe9000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 248, 248, 248, 248 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfffe9800,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 252, 252, 252, 252 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif3_platform_data,
         },
 };
 
@@ -325,7 +351,10 @@ static struct platform_device mtu2_2_device = {
 };
 
 static struct platform_device *sh7206_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &cmt0_device,
         &cmt1_device,
         &mtu2_0_device,
@@ -346,6 +375,10 @@ void __init plat_irq_setup(void)
 }
 
 static struct platform_device *sh7206_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &cmt0_device,
         &cmt1_device,
         &mtu2_0_device,
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index 27b8738f0b09..b78384afac09 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -28,7 +28,7 @@ static int pfc_divisors[]    = { 1, 2, 3, 4, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -40,7 +40,7 @@ static struct clk_ops sh3_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -52,7 +52,7 @@ static struct clk_ops sh3_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
         return clk->parent->rate / stc_multipliers[idx];
@@ -64,7 +64,7 @@ static struct clk_ops sh3_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index 0ca8f2c3646c..0ecea1451c6f 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -32,7 +32,7 @@ static int pfc_divisors[]    = { 1, 2, 3, 4, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003];
+        clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
 }
 
 static struct clk_ops sh7705_master_clk_ops = {
@@ -41,7 +41,7 @@ static struct clk_ops sh7705_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inw(FRQCR) & 0x0003;
+        int idx = __raw_readw(FRQCR) & 0x0003;
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -51,7 +51,7 @@ static struct clk_ops sh7705_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8;
+        int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
         return clk->parent->rate / stc_multipliers[idx];
 }
 
@@ -61,7 +61,7 @@ static struct clk_ops sh7705_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4;
+        int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index 4bf7887d310a..6f9ff8b57dd6 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7706_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7706_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
         return clk->parent->rate / stc_multipliers[idx];
@@ -60,7 +60,7 @@ static struct clk_ops sh7706_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index e8749505bd2a..f302ba09e681 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7709_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7709_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0080) ?
                 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
 
@@ -61,7 +61,7 @@ static struct clk_ops sh7709_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index 030a58ba18a5..29a87d8946a4 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -26,7 +26,7 @@ static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007];
+        clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
 }
 
 static struct clk_ops sh7710_master_clk_ops = {
@@ -35,7 +35,7 @@ static struct clk_ops sh7710_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0007);
+        int idx = (__raw_readw(FRQCR) & 0x0007);
         return clk->parent->rate / md_table[idx];
 }
 
@@ -45,7 +45,7 @@ static struct clk_ops sh7710_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8;
+        int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
         return clk->parent->rate / md_table[idx];
 }
 
@@ -55,7 +55,7 @@ static struct clk_ops sh7710_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4;
+        int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
         return clk->parent->rate / md_table[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 6428ee6c77ed..b0d0c5203996 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -23,7 +23,7 @@ static int divisors[]    = { 1, 2, 3, 4, 6 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0300) >> 8;
 
         clk->rate *= multipliers[idx];
@@ -35,7 +35,7 @@ static struct clk_ops sh7712_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = frqcr & 0x0007;
 
         return clk->parent->rate / divisors[idx];
@@ -47,7 +47,7 @@ static struct clk_ops sh7712_module_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0030) >> 4;
 
         return clk->parent->rate / divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index bb407ef0b91e..f6a389c996cb 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -132,7 +132,6 @@ ENTRY(tlb_protection_violation_store)
          mov    #1, r5
 
 call_handle_tlbmiss:
-        setup_frame_reg
         mov.l   1f, r0
         mov     r5, r8
         mov.l   @r0, r6
@@ -297,41 +296,8 @@ ENTRY(vbr_base)
 !
         .balign         256,0,256
 general_exception:
-#ifndef CONFIG_CPU_SUBTYPE_SHX3
         bra     handle_exception
          sts    pr, k3          ! save original pr value in k3
-#else
-        mov.l   1f, k4
-        mov.l   @k4, k4
-
-        ! Is EXPEVT larger than 0x800?
-        mov     #0x8, k0
-        shll8   k0
-        cmp/hs  k0, k4
-        bf      0f
-
-        ! then add 0x580 (k2 is 0xd80 or 0xda0)
-        mov     #0x58, k0
-        shll2   k0
-        shll2   k0
-        add     k0, k4
-0:
-        ! Setup stack and save DSP context (k0 contains original r15 on return)
-        bsr     prepare_stack
-         nop
-
-        ! Save registers / Switch to bank 0
-        mov             k4, k2          ! keep vector in k2
-        mov.l   1f, k4          ! SR bits to clear in k4
-        bsr     save_regs       ! needs original pr value in k3
-         nop
-
-        bra     handle_exception_special
-         nop
-
-        .align  2
-1:      .long   EXPEVT
-#endif
 
 ! prepare_stack()
 ! - roll back gRB
@@ -398,6 +364,8 @@ handle_exception:
          mov.l  @k2, k2         ! read out vector and keep in k2
 
 handle_exception_special:
+        setup_frame_reg
+
         ! Setup return address and jump to exception handler
         mov.l   7f, r9          ! fetch return address
         stc     r2_bank, r0     ! k2 (vector)
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 46610c35c232..99b4d020179a 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -49,7 +49,7 @@ ENTRY(exception_handling_table)
         .long   exception_error ! reserved_instruction (filled by trap_init) /* 180 */
         .long   exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
         .long   nmi_trap_handler        /* 1C0 */       ! Allow trap to debugger
-        .long   break_point_trap        /* 1E0 */
+        .long   breakpoint_trap_handler /* 1E0 */
 
         /*
          * Pad the remainder of the table out, exceptions residing in far
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index f9c7df64eb01..295ec4c99e98 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,7 +16,7 @@
 #include <asm/cache.h>
 #include <asm/io.h>
 
-int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
+int detect_cpu_and_cache_system(void)
 {
         unsigned long addr0, addr1, data0, data1, data2, data3;
 
@@ -30,23 +30,23 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
         addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);
 
         /* First, write back & invalidate */
-        data0  = ctrl_inl(addr0);
-        ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
-        data1  = ctrl_inl(addr1);
-        ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
+        data0  = __raw_readl(addr0);
+        __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
+        data1  = __raw_readl(addr1);
+        __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
 
         /* Next, check if there's shadow or not */
-        data0 = ctrl_inl(addr0);
+        data0 = __raw_readl(addr0);
         data0 ^= SH_CACHE_VALID;
-        ctrl_outl(data0, addr0);
-        data1 = ctrl_inl(addr1);
+        __raw_writel(data0, addr0);
+        data1 = __raw_readl(addr1);
         data2 = data1 ^ SH_CACHE_VALID;
-        ctrl_outl(data2, addr1);
-        data3 = ctrl_inl(addr0);
+        __raw_writel(data2, addr1);
+        data3 = __raw_readl(addr0);
 
         /* Lastly, invaliate them. */
-        ctrl_outl(data0&~SH_CACHE_VALID, addr0);
-        ctrl_outl(data2&~SH_CACHE_VALID, addr1);
+        __raw_writel(data0&~SH_CACHE_VALID, addr0);
+        __raw_writel(data2&~SH_CACHE_VALID, addr1);
 
         back_to_cached();
 
@@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
                 boot_cpu_data.dcache.way_incr   = (1 << 13);
                 boot_cpu_data.dcache.entry_mask = 0x1ff0;
                 boot_cpu_data.dcache.sets       = 512;
-                ctrl_outl(CCR_CACHE_32KB, CCR3_REG);
+                __raw_writel(CCR_CACHE_32KB, CCR3_REG);
 #else
-                ctrl_outl(CCR_CACHE_16KB, CCR3_REG);
+                __raw_writel(CCR_CACHE_16KB, CCR3_REG);
 #endif
 #endif
         }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
index c98846857855..53be70b98116 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -58,7 +58,7 @@ static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
 void __init plat_irq_setup_pins(int mode)
 {
         if (mode == IRQ_MODE_IRQ) {
-                ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
+                __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
                 register_intc_controller(&intc_desc_irq0123);
                 return;
         }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index c23105983878..7b892d60e3a0 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -67,27 +67,33 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
                          NULL, prio_registers, NULL);
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xa4410000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 56, 56, 56 },
-        }, {
-                .mapbase        = 0xa4400000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 52, 52 },
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xa4410000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 56, 56, 56 },
+};
+
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4400000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 52, 52 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
         },
 };
 
@@ -210,10 +216,11 @@ static struct platform_device tmu2_device = {
 };
 
 static struct platform_device *sh7705_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
-        &sci_device,
         &rtc_device,
 };
 
@@ -225,6 +232,8 @@ static int __init sh7705_devices_setup(void)
 arch_initcall(sh7705_devices_setup);
 
 static struct platform_device *sh7705_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 347ab35d0697..bc0c4f68c7c7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -106,44 +106,55 @@ static struct platform_device rtc_device = {
         .resource       = rtc_resources,
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfffffe80,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCI,
-                .irqs           = { 23, 23, 23, 0 },
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xfffffe80,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCI,
+        .irqs           = { 23, 23, 23, 0 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
         },
+};
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
-        {
-                .mapbase        = 0xa4000150,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 56, 56, 56, 56 },
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4000150,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 56, 56, 56, 56 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
         },
+};
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
-        {
-                .mapbase        = 0xa4000140,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_IRDA,
-                .irqs           = { 52, 52, 52, 52 },
-        },
-#endif
-        {
-                .flags = 0,
-        }
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xa4000140,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_IRDA,
+        .irqs           = { 52, 52, 52, 52 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif2_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 2,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif2_platform_data,
         },
 };
+#endif
 
 static struct sh_timer_config tmu0_platform_data = {
         .name = "TMU0",
@@ -238,10 +249,19 @@ static struct platform_device tmu2_device = {
 };
 
 static struct platform_device *sh770x_devices[] __initdata = {
+        &scif0_device,
+#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif1_device,
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif2_device,
+#endif
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
-        &sci_device,
         &rtc_device,
 };
 
@@ -253,6 +273,16 @@ static int __init sh770x_devices_setup(void)
 arch_initcall(sh770x_devices_setup);
 
 static struct platform_device *sh770x_early_devices[] __initdata = {
+        &scif0_device,
+#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif1_device,
+#endif
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7709)
+        &scif2_device,
+#endif
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 717e90ae1097..0845a3ad006d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -96,28 +96,33 @@ static struct platform_device rtc_device = {
         },
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xa4400000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 52, 52, 52 },
-        }, {
-                .mapbase        = 0xa4410000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 56, 56, 56, 56 },
-        }, {
-
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xa4400000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 52, 52, 52 },
+};
+
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4410000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 56, 56, 56, 56 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
         },
 };
 
@@ -214,10 +219,11 @@ static struct platform_device tmu2_device = {
 };
 
 static struct platform_device *sh7710_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
-        &sci_device,
         &rtc_device,
 };
 
@@ -229,6 +235,8 @@ static int __init sh7710_devices_setup(void)
 arch_initcall(sh7710_devices_setup);
 
 static struct platform_device *sh7710_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 74d8baaf8e96..a718a6231091 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -48,28 +48,33 @@ static struct platform_device rtc_device = {
         },
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xa4430000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-        }, {
-                .mapbase        = 0xa4438000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-        }, {
-
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xa4430000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+};
+
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xa4438000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
         },
 };
 
@@ -369,6 +374,8 @@ static struct platform_device tmu2_device = {
 };
 
 static struct platform_device *sh7720_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &cmt0_device,
         &cmt1_device,
         &cmt2_device,
@@ -378,7 +385,6 @@ static struct platform_device *sh7720_devices[] __initdata = {
         &tmu1_device,
         &tmu2_device,
         &rtc_device,
-        &sci_device,
         &usb_ohci_device,
         &usbf_device,
 };
@@ -391,6 +397,8 @@ static int __init sh7720_devices_setup(void)
 arch_initcall(sh7720_devices_setup);
 
 static struct platform_device *sh7720_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &cmt0_device,
         &cmt1_device,
         &cmt2_device,
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 203b18347b83..3a1dbc709831 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -9,6 +9,11 @@ obj-$(CONFIG_HIBERNATION)		+= $(addprefix ../sh3/, swsusp.o)
 obj-$(CONFIG_SH_FPU)                    += fpu.o softfloat.o
 obj-$(CONFIG_SH_STORE_QUEUES)           += sq.o
 
+# Perf events
+perf-$(CONFIG_CPU_SUBTYPE_SH7750)       := perf_event.o
+perf-$(CONFIG_CPU_SUBTYPE_SH7750S)      := perf_event.o
+perf-$(CONFIG_CPU_SUBTYPE_SH7091)       := perf_event.o
+
 # CPU subtype setup
 obj-$(CONFIG_CPU_SUBTYPE_SH7750)        += setup-sh7750.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7750R)       += setup-sh7750.o
@@ -27,4 +32,5 @@ endif
 # Additional clocks by subtype
 clock-$(CONFIG_CPU_SUBTYPE_SH4_202)     += clock-sh4-202.o
 
-obj-y   += $(clock-y)
+obj-y                                   += $(clock-y)
+obj-$(CONFIG_PERF_EVENTS)               += $(perf-y)
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 21421e34e7d5..6b80850294da 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -23,7 +23,7 @@ static int frqcr3_values[]   = { 0, 1, 2, 3, 4, 5, 6  };
 
 static unsigned long emi_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007;
+        int idx = __raw_readl(CPG2_FRQCR3) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -52,7 +52,7 @@ static struct clk sh4202_emi_clk = {
 
 static unsigned long femi_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007;
+        int idx = (__raw_readl(CPG2_FRQCR3) >> 3) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -92,7 +92,7 @@ static void shoc_clk_init(struct clk *clk)
 
 static unsigned long shoc_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007;
+        int idx = (__raw_readl(CPG2_FRQCR3) >> 6) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -122,10 +122,10 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
 
         tmp = frqcr3_lookup(clk, rate);
 
-        frqcr3 = ctrl_inl(CPG2_FRQCR3);
+        frqcr3 = __raw_readl(CPG2_FRQCR3);
         frqcr3 &= ~(0x0007 << 6);
         frqcr3 |= tmp << 6;
-        ctrl_outl(frqcr3, CPG2_FRQCR3);
+        __raw_writel(frqcr3, CPG2_FRQCR3);
 
         clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
 
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index 73294d9cd049..5add75c1f539 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007];
+        clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
 }
 
 static struct clk_ops sh4_master_clk_ops = {
@@ -37,7 +37,7 @@ static struct clk_ops sh4_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0007);
+        int idx = (__raw_readw(FRQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -47,7 +47,7 @@ static struct clk_ops sh4_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
+        int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -57,7 +57,7 @@ static struct clk_ops sh4_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
+        int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index e3ea5411da6d..447482d7f65e 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -41,13 +41,11 @@ static unsigned int fpu_exception_flags;
 
 /*
  * Save FPU registers onto task structure.
- * Assume called with FPU enabled (SR.FD=0).
  */
-void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
+void save_fpu(struct task_struct *tsk)
 {
         unsigned long dummy;
 
-        clear_tsk_thread_flag(tsk, TIF_USEDFPU);
         enable_fpu();
         asm volatile ("sts.l    fpul, @-%0\n\t"
                       "sts.l    fpscr, @-%0\n\t"
@@ -87,15 +85,14 @@ void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
                       "fmov.s   fr1, @-%0\n\t"
                       "fmov.s   fr0, @-%0\n\t"
                       "lds      %3, fpscr\n\t":"=r" (dummy)
-                      :"0"((char *)(&tsk->thread.fpu.hard.status)),
+                      :"0"((char *)(&tsk->thread.xstate->hardfpu.status)),
                       "r"(FPSCR_RCHG), "r"(FPSCR_INIT)
                       :"memory");
 
         disable_fpu();
-        release_fpu(regs);
 }
 
-static void restore_fpu(struct task_struct *tsk)
+void restore_fpu(struct task_struct *tsk)
 {
         unsigned long dummy;
 
@@ -138,62 +135,11 @@ static void restore_fpu(struct task_struct *tsk)
                       "lds.l    @%0+, fpscr\n\t"
                       "lds.l    @%0+, fpul\n\t"
                       :"=r" (dummy)
-                      :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG)
+                      :"0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
                       :"memory");
         disable_fpu();
 }
 
-/*
- * Load the FPU with signalling NANS.  This bit pattern we're using
- * has the property that no matter wether considered as single or as
- * double precision represents signaling NANS.
- */
-
-static void fpu_init(void)
-{
-        enable_fpu();
-        asm volatile (  "lds    %0, fpul\n\t"
-                        "lds    %1, fpscr\n\t"
-                        "fsts   fpul, fr0\n\t"
-                        "fsts   fpul, fr1\n\t"
-                        "fsts   fpul, fr2\n\t"
-                        "fsts   fpul, fr3\n\t"
-                        "fsts   fpul, fr4\n\t"
-                        "fsts   fpul, fr5\n\t"
-                        "fsts   fpul, fr6\n\t"
-                        "fsts   fpul, fr7\n\t"
-                        "fsts   fpul, fr8\n\t"
-                        "fsts   fpul, fr9\n\t"
-                        "fsts   fpul, fr10\n\t"
-                        "fsts   fpul, fr11\n\t"
-                        "fsts   fpul, fr12\n\t"
-                        "fsts   fpul, fr13\n\t"
-                        "fsts   fpul, fr14\n\t"
-                        "fsts   fpul, fr15\n\t"
-                        "frchg\n\t"
-                        "fsts   fpul, fr0\n\t"
-                        "fsts   fpul, fr1\n\t"
-                        "fsts   fpul, fr2\n\t"
-                        "fsts   fpul, fr3\n\t"
-                        "fsts   fpul, fr4\n\t"
-                        "fsts   fpul, fr5\n\t"
-                        "fsts   fpul, fr6\n\t"
-                        "fsts   fpul, fr7\n\t"
-                        "fsts   fpul, fr8\n\t"
-                        "fsts   fpul, fr9\n\t"
-                        "fsts   fpul, fr10\n\t"
-                        "fsts   fpul, fr11\n\t"
-                        "fsts   fpul, fr12\n\t"
-                        "fsts   fpul, fr13\n\t"
-                        "fsts   fpul, fr14\n\t"
-                        "fsts   fpul, fr15\n\t"
-                        "frchg\n\t"
-                        "lds    %2, fpscr\n\t"
-                        :       /* no output */
-                        :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT));
-        disable_fpu();
-}
-
 /**
  *      denormal_to_double - Given denormalized float number,
  *                           store double float
@@ -285,10 +231,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
                 /* fcnvsd */
                 struct task_struct *tsk = current;
 
-                save_fpu(tsk, regs);
-                if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR))
+                if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR))
                         /* FPU error */
-                        denormal_to_double(&tsk->thread.fpu.hard,
+                        denormal_to_double(&tsk->thread.xstate->hardfpu,
                                            (finsn >> 8) & 0xf);
                 else
                         return 0;
@@ -304,9 +249,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
 
                 n = (finsn >> 8) & 0xf;
                 m = (finsn >> 4) & 0xf;
-                hx = tsk->thread.fpu.hard.fp_regs[n];
-                hy = tsk->thread.fpu.hard.fp_regs[m];
-                fpscr = tsk->thread.fpu.hard.fpscr;
+                hx = tsk->thread.xstate->hardfpu.fp_regs[n];
+                hy = tsk->thread.xstate->hardfpu.fp_regs[m];
+                fpscr = tsk->thread.xstate->hardfpu.fpscr;
                 prec = fpscr & FPSCR_DBL_PRECISION;
 
                 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -316,18 +261,18 @@ static int ieee_fpe_handler(struct pt_regs *regs)
 
                         /* FPU error because of denormal (doubles) */
                         llx = ((long long)hx << 32)
-                            | tsk->thread.fpu.hard.fp_regs[n + 1];
+                            | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
                         lly = ((long long)hy << 32)
-                            | tsk->thread.fpu.hard.fp_regs[m + 1];
+                            | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
                         llx = float64_mul(llx, lly);
-                        tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
-                        tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
+                        tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
                 } else if ((fpscr & FPSCR_CAUSE_ERROR)
                            && (!prec && ((hx & 0x7fffffff) < 0x00800000
                                          || (hy & 0x7fffffff) < 0x00800000))) {
                         /* FPU error because of denormal (floats) */
                         hx = float32_mul(hx, hy);
-                        tsk->thread.fpu.hard.fp_regs[n] = hx;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
                 } else
                         return 0;
 
@@ -342,9 +287,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
 
                 n = (finsn >> 8) & 0xf;
                 m = (finsn >> 4) & 0xf;
-                hx = tsk->thread.fpu.hard.fp_regs[n];
-                hy = tsk->thread.fpu.hard.fp_regs[m];
-                fpscr = tsk->thread.fpu.hard.fpscr;
+                hx = tsk->thread.xstate->hardfpu.fp_regs[n];
+                hy = tsk->thread.xstate->hardfpu.fp_regs[m];
+                fpscr = tsk->thread.xstate->hardfpu.fpscr;
                 prec = fpscr & FPSCR_DBL_PRECISION;
 
                 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -354,15 +299,15 @@ static int ieee_fpe_handler(struct pt_regs *regs)
 
                         /* FPU error because of denormal (doubles) */
                         llx = ((long long)hx << 32)
-                            | tsk->thread.fpu.hard.fp_regs[n + 1];
+                            | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
                         lly = ((long long)hy << 32)
-                            | tsk->thread.fpu.hard.fp_regs[m + 1];
+                            | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
                         if ((finsn & 0xf00f) == 0xf000)
                                 llx = float64_add(llx, lly);
                         else
                                 llx = float64_sub(llx, lly);
-                        tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
-                        tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
+                        tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
                 } else if ((fpscr & FPSCR_CAUSE_ERROR)
                            && (!prec && ((hx & 0x7fffffff) < 0x00800000
                                          || (hy & 0x7fffffff) < 0x00800000))) {
@@ -371,7 +316,7 @@ static int ieee_fpe_handler(struct pt_regs *regs)
                                 hx = float32_add(hx, hy);
                         else
                                 hx = float32_sub(hx, hy);
-                        tsk->thread.fpu.hard.fp_regs[n] = hx;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
                 } else
                         return 0;
 
@@ -386,9 +331,9 @@ static int ieee_fpe_handler(struct pt_regs *regs)
 
                 n = (finsn >> 8) & 0xf;
                 m = (finsn >> 4) & 0xf;
-                hx = tsk->thread.fpu.hard.fp_regs[n];
-                hy = tsk->thread.fpu.hard.fp_regs[m];
-                fpscr = tsk->thread.fpu.hard.fpscr;
+                hx = tsk->thread.xstate->hardfpu.fp_regs[n];
+                hy = tsk->thread.xstate->hardfpu.fp_regs[m];
+                fpscr = tsk->thread.xstate->hardfpu.fpscr;
                 prec = fpscr & FPSCR_DBL_PRECISION;
 
                 if ((fpscr & FPSCR_CAUSE_ERROR)
@@ -398,20 +343,20 @@ static int ieee_fpe_handler(struct pt_regs *regs)
 
                         /* FPU error because of denormal (doubles) */
                         llx = ((long long)hx << 32)
-                            | tsk->thread.fpu.hard.fp_regs[n + 1];
+                            | tsk->thread.xstate->hardfpu.fp_regs[n + 1];
                         lly = ((long long)hy << 32)
-                            | tsk->thread.fpu.hard.fp_regs[m + 1];
+                            | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
 
                         llx = float64_div(llx, lly);
 
-                        tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
-                        tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
+                        tsk->thread.xstate->hardfpu.fp_regs[n + 1] = llx & 0xffffffff;
                 } else if ((fpscr & FPSCR_CAUSE_ERROR)
                            && (!prec && ((hx & 0x7fffffff) < 0x00800000
                                          || (hy & 0x7fffffff) < 0x00800000))) {
                         /* FPU error because of denormal (floats) */
                         hx = float32_div(hx, hy);
-                        tsk->thread.fpu.hard.fp_regs[n] = hx;
+                        tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
                 } else
                         return 0;
 
@@ -424,17 +369,17 @@ static int ieee_fpe_handler(struct pt_regs *regs)
                 unsigned int hx;
 
                 m = (finsn >> 8) & 0x7;
-                hx = tsk->thread.fpu.hard.fp_regs[m];
+                hx = tsk->thread.xstate->hardfpu.fp_regs[m];
 
-                if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR)
+                if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)
                         && ((hx & 0x7fffffff) < 0x00100000)) {
                         /* subnormal double to float conversion */
                         long long llx;
 
-                        llx = ((long long)tsk->thread.fpu.hard.fp_regs[m] << 32)
-                            | tsk->thread.fpu.hard.fp_regs[m + 1];
+                        llx = ((long long)tsk->thread.xstate->hardfpu.fp_regs[m] << 32)
+                            | tsk->thread.xstate->hardfpu.fp_regs[m + 1];
 
-                        tsk->thread.fpu.hard.fpul = float64_to_float32(llx);
+                        tsk->thread.xstate->hardfpu.fpul = float64_to_float32(llx);
                 } else
                         return 0;
 
@@ -453,7 +398,7 @@ void float_raise(unsigned int flags)
 int float_rounding_mode(void)
 {
         struct task_struct *tsk = current;
-        int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr);
+        int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr);
         return roundingMode;
 }
 
@@ -462,19 +407,19 @@ BUILD_TRAP_HANDLER(fpu_error)
         struct task_struct *tsk = current;
         TRAP_HANDLER_DECL;
 
-        save_fpu(tsk, regs);
+        __unlazy_fpu(tsk, regs);
         fpu_exception_flags = 0;
         if (ieee_fpe_handler(regs)) {
-                tsk->thread.fpu.hard.fpscr &=
+                tsk->thread.xstate->hardfpu.fpscr &=
                     ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
-                tsk->thread.fpu.hard.fpscr |= fpu_exception_flags;
+                tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags;
                 /* Set the FPSCR flag as well as cause bits - simply
                  * replicate the cause */
-                tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10);
+                tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10);
                 grab_fpu(regs);
                 restore_fpu(tsk);
-                set_tsk_thread_flag(tsk, TIF_USEDFPU);
-                if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) &
+                task_thread_info(tsk)->status |= TS_USEDFPU;
+                if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) &
                      (fpu_exception_flags >> 2)) == 0) {
                         return;
                 }
@@ -482,25 +427,3 @@ BUILD_TRAP_HANDLER(fpu_error)
 
         force_sig(SIGFPE, tsk);
 }
-
-BUILD_TRAP_HANDLER(fpu_state_restore)
-{
-        struct task_struct *tsk = current;
-        TRAP_HANDLER_DECL;
-
-        grab_fpu(regs);
-        if (!user_mode(regs)) {
-                printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
-                return;
-        }
-
-        if (used_math()) {
-                /* Using the FPU again.  */
-                restore_fpu(tsk);
-        } else {
-                /* First time FPU user.  */
-                fpu_init();
-                set_used_math();
-        }
-        set_tsk_thread_flag(tsk, TIF_USEDFPU);
-}
diff --git a/arch/sh/kernel/cpu/sh4/perf_event.c b/arch/sh/kernel/cpu/sh4/perf_event.c
new file mode 100644
index 000000000000..7f9ecc9c2d02
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/perf_event.c
@@ -0,0 +1,253 @@
+/*
+ * Performance events support for SH7750-style performance counters
+ *
+ *  Copyright (C) 2009  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/perf_event.h>
+#include <asm/processor.h>
+
+#define PM_CR_BASE      0xff000084      /* 16-bit */
+#define PM_CTR_BASE     0xff100004      /* 32-bit */
+
+#define PMCR(n)         (PM_CR_BASE + ((n) * 0x04))
+#define PMCTRH(n)       (PM_CTR_BASE + 0x00 + ((n) * 0x08))
+#define PMCTRL(n)       (PM_CTR_BASE + 0x04 + ((n) * 0x08))
+
+#define PMCR_PMM_MASK   0x0000003f
+
+#define PMCR_CLKF       0x00000100
+#define PMCR_PMCLR      0x00002000
+#define PMCR_PMST       0x00004000
+#define PMCR_PMEN       0x00008000
+
+static struct sh_pmu sh7750_pmu;
+
+/*
+ * There are a number of events supported by each counter (33 in total).
+ * Since we have 2 counters, each counter will take the event code as it
+ * corresponds to the PMCR PMM setting. Each counter can be configured
+ * independently.
+ *
+ *      Event Code      Description
+ *      ----------      -----------
+ *
+ *      0x01            Operand read access
+ *      0x02            Operand write access
+ *      0x03            UTLB miss
+ *      0x04            Operand cache read miss
+ *      0x05            Operand cache write miss
+ *      0x06            Instruction fetch (w/ cache)
+ *      0x07            Instruction TLB miss
+ *      0x08            Instruction cache miss
+ *      0x09            All operand accesses
+ *      0x0a            All instruction accesses
+ *      0x0b            OC RAM operand access
+ *      0x0d            On-chip I/O space access
+ *      0x0e            Operand access (r/w)
+ *      0x0f            Operand cache miss (r/w)
+ *      0x10            Branch instruction
+ *      0x11            Branch taken
+ *      0x12            BSR/BSRF/JSR
+ *      0x13            Instruction execution
+ *      0x14            Instruction execution in parallel
+ *      0x15            FPU Instruction execution
+ *      0x16            Interrupt
+ *      0x17            NMI
+ *      0x18            trapa instruction execution
+ *      0x19            UBCA match
+ *      0x1a            UBCB match
+ *      0x21            Instruction cache fill
+ *      0x22            Operand cache fill
+ *      0x23            Elapsed time
+ *      0x24            Pipeline freeze by I-cache miss
+ *      0x25            Pipeline freeze by D-cache miss
+ *      0x27            Pipeline freeze by branch instruction
+ *      0x28            Pipeline freeze by CPU register
+ *      0x29            Pipeline freeze by FPU
+ */
+
+static const int sh7750_general_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 0x0023,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 0x000a,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x0006,       /* I-cache */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x0008,       /* I-cache */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x0010,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = -1,
+        [PERF_COUNT_HW_BUS_CYCLES]              = -1,
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+static const int sh7750_cache_events
+                        [PERF_COUNT_HW_CACHE_MAX]
+                        [PERF_COUNT_HW_CACHE_OP_MAX]
+                        [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+        [ C(L1D) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0001,
+                        [ C(RESULT_MISS)   ] = 0x0004,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0002,
+                        [ C(RESULT_MISS)   ] = 0x0005,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(L1I) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0006,
+                        [ C(RESULT_MISS)   ] = 0x0008,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(LL) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(DTLB) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0x0003,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(ITLB) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0x0007,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+        },
+
+        [ C(BPU) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+        },
+};
+
+static int sh7750_event_map(int event)
+{
+        return sh7750_general_events[event];
+}
+
+static u64 sh7750_pmu_read(int idx)
+{
+        return (u64)((u64)(__raw_readl(PMCTRH(idx)) & 0xffff) << 32) |
+                           __raw_readl(PMCTRL(idx));
+}
+
+static void sh7750_pmu_disable(struct hw_perf_event *hwc, int idx)
+{
+        unsigned int tmp;
+
+        tmp = __raw_readw(PMCR(idx));
+        tmp &= ~(PMCR_PMM_MASK | PMCR_PMEN);
+        __raw_writew(tmp, PMCR(idx));
+}
+
+static void sh7750_pmu_enable(struct hw_perf_event *hwc, int idx)
+{
+        __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx));
+        __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx));
+}
+
+static void sh7750_pmu_disable_all(void)
+{
+        int i;
+
+        for (i = 0; i < sh7750_pmu.num_events; i++)
+                __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
+}
+
+static void sh7750_pmu_enable_all(void)
+{
+        int i;
+
+        for (i = 0; i < sh7750_pmu.num_events; i++)
+                __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i));
+}
+
+static struct sh_pmu sh7750_pmu = {
+        .name           = "SH7750",
+        .num_events     = 2,
+        .event_map      = sh7750_event_map,
+        .max_events     = ARRAY_SIZE(sh7750_general_events),
+        .raw_event_mask = PMCR_PMM_MASK,
+        .cache_events   = &sh7750_cache_events,
+        .read           = sh7750_pmu_read,
+        .disable        = sh7750_pmu_disable,
+        .enable         = sh7750_pmu_enable,
+        .disable_all    = sh7750_pmu_disable_all,
+        .enable_all     = sh7750_pmu_enable_all,
+};
+
+static int __init sh7750_pmu_init(void)
+{
+        /*
+         * Make sure this CPU actually has perf counters.
+         */
+        if (!(boot_cpu_data.flags & CPU_HAS_PERF_COUNTER)) {
+                pr_notice("HW perf events unsupported, software events only.\n");
+                return -ENODEV;
+        }
+
+        return register_sh_pmu(&sh7750_pmu);
+}
+arch_initcall(sh7750_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index d36f0c45f55f..822977a06d84 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -28,9 +28,9 @@ int __init detect_cpu_and_cache_system(void)
                 [9] = (1 << 16)
         };
 
-        pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff;
-        prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
-        cvr = (ctrl_inl(CCN_CVR));
+        pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff;
+        prr = (__raw_readl(CCN_PRR) >> 4) & 0xff;
+        cvr = (__raw_readl(CCN_CVR));
 
         /*
          * Setup some sane SH-4 defaults for the icache
@@ -71,11 +71,11 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.dcache.ways = 4;
         } else {
                 /* And some SH-4 defaults.. */
-                boot_cpu_data.flags |= CPU_HAS_PTEA;
+                boot_cpu_data.flags |= CPU_HAS_PTEA | CPU_HAS_FPU;
                 boot_cpu_data.family = CPU_FAMILY_SH4;
         }
 
-        /* FPU detection works for everyone */
+        /* FPU detection works for almost everyone */
         if ((cvr & 0x20000000))
                 boot_cpu_data.flags |= CPU_HAS_FPU;
 
@@ -124,6 +124,7 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.type = CPU_SH7785;
                 break;
         case 0x4004:
+        case 0x4005:
                 boot_cpu_data.type = CPU_SH7786;
                 boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE;
                 break;
@@ -160,6 +161,7 @@ int __init detect_cpu_and_cache_system(void)
                 break;
         case 0x700:
                 boot_cpu_data.type = CPU_SH4_501;
+                boot_cpu_data.flags &= ~CPU_HAS_FPU;
                 boot_cpu_data.icache.ways = 2;
                 boot_cpu_data.dcache.ways = 2;
                 break;
@@ -227,7 +229,7 @@ int __init detect_cpu_and_cache_system(void)
                          * Size calculation is much more sensible
                          * than it is for the L1.
                          *
-                         * Sizes are 128KB, 258KB, 512KB, and 1MB.
+                         * Sizes are 128KB, 256KB, 512KB, and 1MB.
                          */
                         size = (cvr & 0xf) << 17;
 
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index de4827df19aa..b9b7e10ad68f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -15,22 +15,18 @@
 #include <linux/sh_timer.h>
 #include <linux/io.h>
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe80000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 41, 43, 42 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif0_platform_data,
         },
 };
 
@@ -127,7 +123,7 @@ static struct platform_device tmu2_device = {
 };
 
 static struct platform_device *sh4202_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -141,6 +137,7 @@ static int __init sh4202_devices_setup(void)
 arch_initcall(sh4202_devices_setup);
 
 static struct platform_device *sh4202_early_devices[] __initdata = {
+        &scif0_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -201,7 +198,7 @@ void __init plat_irq_setup_pins(int mode)
 {
         switch (mode) {
         case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irlm);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 1b8b122e8f3d..ffd79e57254f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -35,29 +35,33 @@ static struct platform_device rtc_device = {
         .resource       = rtc_resources,
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-#ifndef CONFIG_SH_RTS7751R2D
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCI,
-                .irqs           = { 23, 23, 23, 0 },
-        }, {
-#endif
-                .mapbase        = 0xffe80000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCI,
+        .irqs           = { 23, 23, 23, 0 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe80000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
         },
 };
 
@@ -221,8 +225,9 @@ static struct platform_device tmu4_device = {
 #endif
 
 static struct platform_device *sh7750_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &rtc_device,
-        &sci_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -242,6 +247,8 @@ static int __init sh7750_devices_setup(void)
 arch_initcall(sh7750_devices_setup);
 
 static struct platform_device *sh7750_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -435,7 +442,7 @@ void __init plat_irq_setup_pins(int mode)
 
         switch (mode) {
         case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irlm);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 7fbb7be9284c..a16eb3656f4b 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -126,37 +126,63 @@ static struct intc_vect vectors_irq[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
                          mask_registers, prio_registers, NULL);
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfe600000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55, 54 },
-        }, {
-                .mapbase        = 0xfe610000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 72, 73, 75, 74 },
-        }, {
-                .mapbase        = 0xfe620000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 77, 79, 78 },
-        }, {
-                .mapbase        = 0xfe480000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCI,
-                .irqs           = { 80, 81, 82, 0 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xfe600000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 53, 55, 54 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xfe610000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 72, 73, 75, 74 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfe620000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 77, 79, 78 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfe480000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCI,
+        .irqs           = { 80, 81, 82, 0 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif3_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 3,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif3_platform_data,
         },
 };
 
@@ -254,7 +280,10 @@ static struct platform_device tmu2_device = {
 
 
 static struct platform_device *sh7760_devices[] __initdata = {
-        &sci_device,
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -268,6 +297,10 @@ static int __init sh7760_devices_setup(void)
 arch_initcall(sh7760_devices_setup);
 
 static struct platform_device *sh7760_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -286,7 +319,7 @@ void __init plat_irq_setup_pins(int mode)
 {
         switch (mode) {
         case IRQ_MODE_IRQ:
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irq);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 8a8a993f55ea..14726eef1ce0 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -43,9 +43,9 @@ static unsigned long *sq_bitmap;
 
 #define store_queue_barrier()                   \
 do {                                            \
-        (void)ctrl_inl(P4SEG_STORE_QUE);        \
-        ctrl_outl(0, P4SEG_STORE_QUE + 0);      \
-        ctrl_outl(0, P4SEG_STORE_QUE + 8);      \
+        (void)__raw_readl(P4SEG_STORE_QUE);     \
+        __raw_writel(0, P4SEG_STORE_QUE + 0);   \
+        __raw_writel(0, P4SEG_STORE_QUE + 8);   \
 } while (0);
 
 /**
@@ -100,7 +100,7 @@ static inline void sq_mapping_list_del(struct sq_mapping *map)
         spin_unlock_irq(&sq_mapping_lock);
 }
 
-static int __sq_remap(struct sq_mapping *map, unsigned long flags)
+static int __sq_remap(struct sq_mapping *map, pgprot_t prot)
 {
 #if defined(CONFIG_MMU)
         struct vm_struct *vma;
@@ -113,7 +113,7 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
 
         if (ioremap_page_range((unsigned long)vma->addr,
                                (unsigned long)vma->addr + map->size,
-                               vma->phys_addr, __pgprot(flags))) {
+                               vma->phys_addr, prot)) {
                 vunmap(vma->addr);
                 return -EAGAIN;
         }
@@ -123,8 +123,8 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
          * straightforward, as we can just load up each queue's QACR with
          * the physical address appropriately masked.
          */
-        ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
-        ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
+        __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
+        __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
 #endif
 
         return 0;
@@ -135,14 +135,14 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
  * @phys: Physical address of mapping.
  * @size: Length of mapping.
  * @name: User invoking mapping.
- * @flags: Protection flags.
+ * @prot: Protection bits.
  *
  * Remaps the physical address @phys through the next available store queue
  * address of @size length. @name is logged at boot time as well as through
  * the sysfs interface.
  */
 unsigned long sq_remap(unsigned long phys, unsigned int size,
-                       const char *name, unsigned long flags)
+                       const char *name, pgprot_t prot)
 {
         struct sq_mapping *map;
         unsigned long end;
@@ -177,7 +177,7 @@ unsigned long sq_remap(unsigned long phys, unsigned int size,
 
         map->sq_addr = P4SEG_STORE_QUE + (page << PAGE_SHIFT);
 
-        ret = __sq_remap(map, pgprot_val(PAGE_KERNEL_NOCACHE) | flags);
+        ret = __sq_remap(map, prot);
         if (unlikely(ret != 0))
                 goto out;
 
@@ -309,8 +309,7 @@ static ssize_t mapping_store(const char *buf, size_t count)
                 return -EIO;
 
         if (likely(len)) {
-                int ret = sq_remap(base, len, "Userspace",
-                                   pgprot_val(PAGE_SHARED));
+                int ret = sq_remap(base, len, "Userspace", PAGE_SHARED);
                 if (ret < 0)
                         return ret;
         } else
@@ -327,7 +326,7 @@ static struct attribute *sq_sysfs_attrs[] = {
         NULL,
 };
 
-static struct sysfs_ops sq_sysfs_ops = {
+static const struct sysfs_ops sq_sysfs_ops = {
         .show   = sq_sysfs_show,
         .store  = sq_sysfs_store,
 };
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 490d5dc9e372..b144e8af89dc 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -41,6 +41,8 @@ pinmux-$(CONFIG_CPU_SUBTYPE_SH7757)	:= pinmux-sh7757.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)     := pinmux-sh7785.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)     := pinmux-sh7786.o
 
-obj-y                           += $(clock-y)
-obj-$(CONFIG_SMP)               += $(smp-y)
-obj-$(CONFIG_GENERIC_GPIO)      += $(pinmux-y)
+obj-y                                   += $(clock-y)
+obj-$(CONFIG_SMP)                       += $(smp-y)
+obj-$(CONFIG_GENERIC_GPIO)              += $(pinmux-y)
+obj-$(CONFIG_PERF_EVENTS)               += perf_event.o
+obj-$(CONFIG_HAVE_HW_BREAKPOINT)        += ubc.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 0ee3ee861252..2c16df37eda6 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -107,13 +107,17 @@ struct clk *main_clks[] = {
 static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
 
-static struct clk_div_mult_table div4_table = {
+static struct clk_div_mult_table div4_div_mult_table = {
         .divisors = divisors,
         .nr_divisors = ARRAY_SIZE(divisors),
         .multipliers = multipliers,
         .nr_multipliers = ARRAY_SIZE(multipliers),
 };
 
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+};
+
 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
        DIV4_SIUA, DIV4_SIUB, DIV4_NR };
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index a95ebaba095c..91588d280cd8 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -110,13 +110,17 @@ struct clk *main_clks[] = {
 static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
 
-static struct clk_div_mult_table div4_table = {
+static struct clk_div_mult_table div4_div_mult_table = {
         .divisors = divisors,
         .nr_divisors = ARRAY_SIZE(divisors),
         .multipliers = multipliers,
         .nr_multipliers = ARRAY_SIZE(multipliers),
 };
 
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+};
+
 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
        DIV4_SIUA, DIV4_SIUB, DIV4_NR };
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index ea38b554dc05..15db6d521c5c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -110,19 +110,22 @@ struct clk *main_clks[] = {
 static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
 
-static struct clk_div_mult_table div4_table = {
+static struct clk_div_mult_table div4_div_mult_table = {
         .divisors = divisors,
         .nr_divisors = ARRAY_SIZE(divisors),
         .multipliers = multipliers,
         .nr_multipliers = ARRAY_SIZE(multipliers),
 };
 
-enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
-       DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR };
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+};
 
 #define DIV4(_str, _reg, _bit, _mask, _flags) \
   SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
 
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
+
 struct clk div4_clks[DIV4_NR] = {
         [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
         [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
@@ -130,9 +133,19 @@ struct clk div4_clks[DIV4_NR] = {
         [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
         [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
         [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0),
+};
+
+enum { DIV4_IRDA, DIV4_ENABLE_NR };
+
+struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
+        [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
+};
+
+enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
+
+struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
         [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0),
         [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
-        [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
 };
 
 struct clk div6_clks[] = {
@@ -189,6 +202,14 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
 
         if (!ret)
+                ret = sh_clk_div4_enable_register(div4_enable_clks,
+                                        DIV4_ENABLE_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div4_reparent_register(div4_reparent_clks,
+                                        DIV4_REPARENT_NR, &div4_table);
+
+        if (!ret)
                 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
 
         if (!ret)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 20a31c2255a8..50babe01fe44 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -110,15 +110,18 @@ struct clk *main_clks[] = {
 static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
 static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
 
-static struct clk_div_mult_table div4_table = {
+static struct clk_div_mult_table div4_div_mult_table = {
         .divisors = divisors,
         .nr_divisors = ARRAY_SIZE(divisors),
         .multipliers = multipliers,
         .nr_multipliers = ARRAY_SIZE(multipliers),
 };
 
-enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
-       DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR };
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+};
+
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
 
 #define DIV4(_str, _reg, _bit, _mask, _flags) \
   SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
@@ -130,11 +133,20 @@ struct clk div4_clks[DIV4_NR] = {
         [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
         [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
         [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0),
-        [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0),
-        [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0),
+};
+
+enum { DIV4_IRDA, DIV4_ENABLE_NR };
+
+struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
         [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0),
 };
 
+enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
+
+struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
+        [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0),
+        [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0),
+};
 struct clk div6_clks[] = {
         SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
 };
@@ -216,6 +228,14 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
 
         if (!ret)
+                ret = sh_clk_div4_enable_register(div4_enable_clks,
+                                        DIV4_ENABLE_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div4_reparent_register(div4_reparent_clks,
+                                        DIV4_REPARENT_NR, &div4_table);
+
+        if (!ret)
                 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
 
         if (!ret)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index dfe9192be63e..6707061fbf54 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -127,13 +127,28 @@ struct clk *main_clks[] = {
         &div3_clk,
 };
 
+static void div4_kick(struct clk *clk)
+{
+        unsigned long value;
+
+        /* set KICK bit in FRQCRA to update hardware setting */
+        value = __raw_readl(FRQCRA);
+        value |= (1 << 31);
+        __raw_writel(value, FRQCRA);
+}
+
 static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
 
-static struct clk_div_mult_table div4_table = {
+static struct clk_div_mult_table div4_div_mult_table = {
         .divisors = divisors,
         .nr_divisors = ARRAY_SIZE(divisors),
 };
 
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+        .kick = div4_kick,
+};
+
 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };
 
 #define DIV4(_str, _reg, _bit, _mask, _flags) \
@@ -144,7 +159,7 @@ struct clk div4_clks[DIV4_NR] = {
         [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
         [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
         [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0),
-        [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0),
+        [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
 };
 
 struct clk div6_clks[] = {
@@ -152,7 +167,7 @@ struct clk div6_clks[] = {
         SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0),
         SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0),
         SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0),
-        SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0),
+        SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
 };
 
 #define R_CLK (&r_clk)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index ddc235ca9664..86aae60677dc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -35,7 +35,7 @@ static struct clk_ops sh7757_master_clk_ops = {
 
 static void module_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inl(FRQCR) & 0x0000000f;
+        int idx = __raw_readl(FRQCR) & 0x0000000f;
         clk->rate = clk->parent->rate / p1fc_divisors[idx];
 }
 
@@ -45,7 +45,7 @@ static struct clk_ops sh7757_module_clk_ops = {
 
 static void bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f;
         clk->rate = clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -55,7 +55,7 @@ static struct clk_ops sh7757_bus_clk_ops = {
 
 static void cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
         clk->rate = clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -78,7 +78,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static void shyway_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
         clk->rate = clk->parent->rate / sfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 370cd47642ef..9f401163e71e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07];
+        clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
 }
 
 static struct clk_ops sh7763_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7763_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
         return clk->parent->rate / p0fc_divisors[idx];
 }
 
@@ -41,7 +41,7 @@ static struct clk_ops sh7763_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -68,7 +68,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index e0b896769205..9e3354365d40 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -21,7 +21,7 @@ static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f];
+        clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
 }
 
 static struct clk_ops sh7770_master_clk_ops = {
@@ -30,7 +30,7 @@ static struct clk_ops sh7770_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f);
+        int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -40,7 +40,7 @@ static struct clk_ops sh7770_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) & 0x000f);
+        int idx = (__raw_readl(FRQCR) & 0x000f);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -50,7 +50,7 @@ static struct clk_ops sh7770_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f);
+        int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index a249d823578e..150963a6001e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003];
+        clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
 }
 
 static struct clk_ops sh7780_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7780_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) & 0x0003);
+        int idx = (__raw_readl(FRQCR) & 0x0003);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -41,7 +41,7 @@ static struct clk_ops sh7780_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007);
+        int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -51,7 +51,7 @@ static struct clk_ops sh7780_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001);
+        int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -74,7 +74,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007);
+        int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 73abfbf2f16d..d997f0a25b10 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -57,11 +57,15 @@ static struct clk *clks[] = {
 static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
                                24, 32, 36, 48 };
 
-static struct clk_div_mult_table div4_table = {
+static struct clk_div_mult_table div4_div_mult_table = {
         .divisors = div2,
         .nr_divisors = ARRAY_SIZE(div2),
 };
 
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
+};
+
 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA,
         DIV4_DU, DIV4_P, DIV4_NR };
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index a0e8869071ac..af69fd468703 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -3,11 +3,7 @@
  *
  * SH7786 support for the clock framework
  *
- * Copyright (C) 2008, 2009  Renesas Solutions Corp.
- * Kuninori Morimoto <morimoto.kuninori@renesas.com>
- *
- * Based on SH7785
- *  Copyright (C) 2007  Paul Mundt
+ *  Copyright (C) 2010  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -15,127 +11,127 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/io.h>
 #include <asm/clock.h>
 #include <asm/freq.h>
-#include <asm/io.h>
-
-static int ifc_divisors[] = { 1, 2, 4, 1 };
-static int sfc_divisors[] = { 1, 1, 4, 1 };
-static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 1,
-                             24, 32, 1, 1, 1, 1, 1, 1 };
-static int mfc_divisors[] = { 1, 1, 4, 1 };
-static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 16, 1,
-                              24, 32, 1, 48, 1, 1, 1, 1 };
 
-static void master_clk_init(struct clk *clk)
-{
-        clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f];
-}
-
-static struct clk_ops sh7786_master_clk_ops = {
-        .init           = master_clk_init,
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+static struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
 };
 
-static unsigned long module_clk_recalc(struct clk *clk)
+static unsigned long pll_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQMR1) & 0x000f);
-        return clk->parent->rate / pfc_divisors[idx];
-}
+        int multiplier;
 
-static struct clk_ops sh7786_module_clk_ops = {
-        .recalc         = module_clk_recalc,
-};
+        /*
+         * Clock modes 0, 1, and 2 use an x64 multiplier against PLL1,
+         * while modes 3, 4, and 5 use an x32.
+         */
+        multiplier = (sh_mv.mv_mode_pins() & 0xf) < 3 ? 64 : 32;
 
-static unsigned long bus_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
-        return clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate * multiplier;
 }
 
-static struct clk_ops sh7786_bus_clk_ops = {
-        .recalc         = bus_clk_recalc,
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
 };
 
-static unsigned long cpu_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
-        return clk->parent->rate / ifc_divisors[idx];
-}
-
-static struct clk_ops sh7786_cpu_clk_ops = {
-        .recalc         = cpu_clk_recalc,
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .parent         = &extal_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
 };
 
-static struct clk_ops *sh7786_clk_ops[] = {
-        &sh7786_master_clk_ops,
-        &sh7786_module_clk_ops,
-        &sh7786_bus_clk_ops,
-        &sh7786_cpu_clk_ops,
+static struct clk *clks[] = {
+        &extal_clk,
+        &pll_clk,
 };
 
-void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
-{
-        if (idx < ARRAY_SIZE(sh7786_clk_ops))
-                *ops = sh7786_clk_ops[idx];
-}
+static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
+                               24, 32, 36, 48 };
 
-static unsigned long shyway_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
-        return clk->parent->rate / sfc_divisors[idx];
-}
-
-static struct clk_ops sh7786_shyway_clk_ops = {
-        .recalc         = shyway_clk_recalc,
+static struct clk_div_mult_table div4_div_mult_table = {
+        .divisors = div2,
+        .nr_divisors = ARRAY_SIZE(div2),
 };
 
-static struct clk sh7786_shyway_clk = {
-        .name           = "shyway_clk",
-        .flags          = CLK_ENABLE_ON_INIT,
-        .ops            = &sh7786_shyway_clk_ops,
+static struct clk_div4_table div4_table = {
+        .div_mult_table = &div4_div_mult_table,
 };
 
-static unsigned long ddr_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
-        return clk->parent->rate / mfc_divisors[idx];
-}
+enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR };
 
-static struct clk_ops sh7786_ddr_clk_ops = {
-        .recalc         = ddr_clk_recalc,
-};
+#define DIV4(_str, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags)
 
-static struct clk sh7786_ddr_clk = {
-        .name           = "ddr_clk",
-        .flags          = CLK_ENABLE_ON_INIT,
-        .ops            = &sh7786_ddr_clk_ops,
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_P] = DIV4("peripheral_clk", 0, 0x0b40, 0),
+        [DIV4_DU] = DIV4("du_clk", 4, 0x0010, 0),
+        [DIV4_DDR] = DIV4("ddr_clk", 12, 0x0002, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", 16, 0x0360, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", 20, 0x0002, CLK_ENABLE_ON_INIT),
+        [DIV4_I] = DIV4("cpu_clk", 28, 0x0006, CLK_ENABLE_ON_INIT),
 };
 
-/*
- * Additional SH7786-specific on-chip clocks that aren't already part of the
- * clock framework
- */
-static struct clk *sh7786_onchip_clocks[] = {
-        &sh7786_shyway_clk,
-        &sh7786_ddr_clk,
+#define MSTPCR0         0xffc40030
+#define MSTPCR1         0xffc40034
+
+static struct clk mstp_clks[] = {
+        /* MSTPCR0 */
+        SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
+        SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
+        SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
+        SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
+        SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
+        SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
+        SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0),
+        SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0),
+        SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
+        SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0),
+        SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0),
+        SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0),
+        SH_CLK_MSTP32("i2c_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 15, 0),
+        SH_CLK_MSTP32("i2c_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 14, 0),
+        SH_CLK_MSTP32("tmu9_11_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 11, 0),
+        SH_CLK_MSTP32("tmu678_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 10, 0),
+        SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0),
+        SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0),
+        SH_CLK_MSTP32("sdif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
+        SH_CLK_MSTP32("sdif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 4, 0),
+        SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0),
+
+        /* MSTPCR1 */
+        SH_CLK_MSTP32("usb_fck", -1, NULL, MSTPCR1, 12, 0),
+        SH_CLK_MSTP32("pcie_fck", 2, NULL, MSTPCR1, 10, 0),
+        SH_CLK_MSTP32("pcie_fck", 1, NULL, MSTPCR1, 9, 0),
+        SH_CLK_MSTP32("pcie_fck", 0, NULL, MSTPCR1, 8, 0),
+        SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0),
+        SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0),
+        SH_CLK_MSTP32("du_fck", -1, NULL, MSTPCR1, 3, 0),
+        SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0),
 };
 
 int __init arch_clk_init(void)
 {
-        struct clk *clk;
         int i, ret = 0;
 
-        cpg_clk_init();
-
-        clk = clk_get(NULL, "master_clk");
-        for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
-                struct clk *clkp = sh7786_onchip_clocks[i];
-
-                clkp->parent = clk;
-                ret |= clk_register(clkp);
-        }
+        for (i = 0; i < ARRAY_SIZE(clks); i++)
+                ret |= clk_register(clks[i]);
 
-        clk_put(clk);
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
+                                           &div4_table);
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 23c27d32d982..e75c57bdfa5e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -33,7 +33,7 @@ static int cfc_divisors[] = { 1, 1, 4, 6 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK];
+        clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK];
 }
 
 static struct clk_ops shx3_master_clk_ops = {
@@ -42,7 +42,7 @@ static struct clk_ops shx3_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -52,7 +52,7 @@ static struct clk_ops shx3_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> BFC_POS) & BFC_MSK);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -62,7 +62,7 @@ static struct clk_ops shx3_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> IFC_POS) & IFC_MSK);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -85,7 +85,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> CFC_POS) & CFC_MSK);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/perf_event.c b/arch/sh/kernel/cpu/sh4a/perf_event.c
new file mode 100644
index 000000000000..eddc21973fa1
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/perf_event.c
@@ -0,0 +1,269 @@
+/*
+ * Performance events support for SH-4A performance counters
+ *
+ *  Copyright (C) 2009  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/perf_event.h>
+#include <asm/processor.h>
+
+#define PPC_CCBR(idx)   (0xff200800 + (sizeof(u32) * idx))
+#define PPC_PMCTR(idx)  (0xfc100000 + (sizeof(u32) * idx))
+
+#define CCBR_CIT_MASK   (0x7ff << 6)
+#define CCBR_DUC        (1 << 3)
+#define CCBR_CMDS       (1 << 1)
+#define CCBR_PPCE       (1 << 0)
+
+#define PPC_PMCAT       0xfc100080
+
+#define PMCAT_OVF3      (1 << 27)
+#define PMCAT_CNN3      (1 << 26)
+#define PMCAT_CLR3      (1 << 25)
+#define PMCAT_OVF2      (1 << 19)
+#define PMCAT_CLR2      (1 << 17)
+#define PMCAT_OVF1      (1 << 11)
+#define PMCAT_CNN1      (1 << 10)
+#define PMCAT_CLR1      (1 << 9)
+#define PMCAT_OVF0      (1 << 3)
+#define PMCAT_CLR0      (1 << 1)
+
+static struct sh_pmu sh4a_pmu;
+
+/*
+ * Supported raw event codes:
+ *
+ *      Event Code      Description
+ *      ----------      -----------
+ *
+ *      0x0000          number of elapsed cycles
+ *      0x0200          number of elapsed cycles in privileged mode
+ *      0x0280          number of elapsed cycles while SR.BL is asserted
+ *      0x0202          instruction execution
+ *      0x0203          instruction execution in parallel
+ *      0x0204          number of unconditional branches
+ *      0x0208          number of exceptions
+ *      0x0209          number of interrupts
+ *      0x0220          UTLB miss caused by instruction fetch
+ *      0x0222          UTLB miss caused by operand access
+ *      0x02a0          number of ITLB misses
+ *      0x0028          number of accesses to instruction memories
+ *      0x0029          number of accesses to instruction cache
+ *      0x002a          instruction cache miss
+ *      0x022e          number of access to instruction X/Y memory
+ *      0x0030          number of reads to operand memories
+ *      0x0038          number of writes to operand memories
+ *      0x0031          number of operand cache read accesses
+ *      0x0039          number of operand cache write accesses
+ *      0x0032          operand cache read miss
+ *      0x003a          operand cache write miss
+ *      0x0236          number of reads to operand X/Y memory
+ *      0x023e          number of writes to operand X/Y memory
+ *      0x0237          number of reads to operand U memory
+ *      0x023f          number of writes to operand U memory
+ *      0x0337          number of U memory read buffer misses
+ *      0x02b4          number of wait cycles due to operand read access
+ *      0x02bc          number of wait cycles due to operand write access
+ *      0x0033          number of wait cycles due to operand cache read miss
+ *      0x003b          number of wait cycles due to operand cache write miss
+ */
+
+/*
+ * Special reserved bits used by hardware emulators, read values will
+ * vary, but writes must always be 0.
+ */
+#define PMCAT_EMU_CLR_MASK      ((1 << 24) | (1 << 16) | (1 << 8) | (1 << 0))
+
+static const int sh4a_general_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 0x0000,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 0x0202,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x0029,       /* I-cache */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x002a,       /* I-cache */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x0204,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = -1,
+        [PERF_COUNT_HW_BUS_CYCLES]              = -1,
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+static const int sh4a_cache_events
+                        [PERF_COUNT_HW_CACHE_MAX]
+                        [PERF_COUNT_HW_CACHE_OP_MAX]
+                        [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+        [ C(L1D) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0031,
+                        [ C(RESULT_MISS)   ] = 0x0032,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0039,
+                        [ C(RESULT_MISS)   ] = 0x003a,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(L1I) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0029,
+                        [ C(RESULT_MISS)   ] = 0x002a,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(LL) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0030,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0038,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(DTLB) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0x0222,
+                        [ C(RESULT_MISS)   ] = 0x0220,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0,
+                },
+        },
+
+        [ C(ITLB) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = 0,
+                        [ C(RESULT_MISS)   ] = 0x02a0,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+        },
+
+        [ C(BPU) ] = {
+                [ C(OP_READ) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_WRITE) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+                [ C(OP_PREFETCH) ] = {
+                        [ C(RESULT_ACCESS) ] = -1,
+                        [ C(RESULT_MISS)   ] = -1,
+                },
+        },
+};
+
+static int sh4a_event_map(int event)
+{
+        return sh4a_general_events[event];
+}
+
+static u64 sh4a_pmu_read(int idx)
+{
+        return __raw_readl(PPC_PMCTR(idx));
+}
+
+static void sh4a_pmu_disable(struct hw_perf_event *hwc, int idx)
+{
+        unsigned int tmp;
+
+        tmp = __raw_readl(PPC_CCBR(idx));
+        tmp &= ~(CCBR_CIT_MASK | CCBR_DUC);
+        __raw_writel(tmp, PPC_CCBR(idx));
+}
+
+static void sh4a_pmu_enable(struct hw_perf_event *hwc, int idx)
+{
+        unsigned int tmp;
+
+        tmp = __raw_readl(PPC_PMCAT);
+        tmp &= ~PMCAT_EMU_CLR_MASK;
+        tmp |= idx ? PMCAT_CLR1 : PMCAT_CLR0;
+        __raw_writel(tmp, PPC_PMCAT);
+
+        tmp = __raw_readl(PPC_CCBR(idx));
+        tmp |= (hwc->config << 6) | CCBR_CMDS | CCBR_PPCE;
+        __raw_writel(tmp, PPC_CCBR(idx));
+
+        __raw_writel(__raw_readl(PPC_CCBR(idx)) | CCBR_DUC, PPC_CCBR(idx));
+}
+
+static void sh4a_pmu_disable_all(void)
+{
+        int i;
+
+        for (i = 0; i < sh4a_pmu.num_events; i++)
+                __raw_writel(__raw_readl(PPC_CCBR(i)) & ~CCBR_DUC, PPC_CCBR(i));
+}
+
+static void sh4a_pmu_enable_all(void)
+{
+        int i;
+
+        for (i = 0; i < sh4a_pmu.num_events; i++)
+                __raw_writel(__raw_readl(PPC_CCBR(i)) | CCBR_DUC, PPC_CCBR(i));
+}
+
+static struct sh_pmu sh4a_pmu = {
+        .name           = "SH-4A",
+        .num_events     = 2,
+        .event_map      = sh4a_event_map,
+        .max_events     = ARRAY_SIZE(sh4a_general_events),
+        .raw_event_mask = 0x3ff,
+        .cache_events   = &sh4a_cache_events,
+        .read           = sh4a_pmu_read,
+        .disable        = sh4a_pmu_disable,
+        .enable         = sh4a_pmu_enable,
+        .disable_all    = sh4a_pmu_disable_all,
+        .enable_all     = sh4a_pmu_enable_all,
+};
+
+static int __init sh4a_pmu_init(void)
+{
+        /*
+         * Make sure this CPU actually has perf counters.
+         */
+        if (!(boot_cpu_data.flags & CPU_HAS_PERF_COUNTER)) {
+                pr_notice("HW perf events unsupported, software events only.\n");
+                return -ENODEV;
+        }
+
+        return register_sh_pmu(&sh4a_pmu);
+}
+arch_initcall(sh4a_pmu_init);
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
index cb9d07bd59f8..0688a7502f86 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c
@@ -278,6 +278,7 @@ enum {
         HIZA8_LCDC, HIZA8_HIZ,
         HIZA7_LCDC, HIZA7_HIZ,
         HIZA6_LCDC, HIZA6_HIZ,
+        HIZB4_SIUA, HIZB4_HIZ,
         HIZB1_VIO, HIZB1_HIZ,
         HIZB0_VIO, HIZB0_HIZ,
         HIZC15_IRQ7, HIZC15_HIZ,
@@ -546,7 +547,7 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
                     HIZB0_VIO, FOE_VIO_VD2),
         PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
-                    HIZB1_VIO, HIZB1_VIO, FCE_VIO_HD2),
+                    HIZB1_VIO, FCE_VIO_HD2),
         PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
                     HIZB1_VIO, FRB_VIO_CLK2),
 
@@ -658,14 +659,14 @@ static pinmux_enum_t pinmux_data[] = {
         PINMUX_DATA(SDHICLK_MARK, SDHICLK),
 
         /* SIU - Port A */
-        PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, SIUAOLR_SIOF1_SYNC),
-        PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, SIUAOBT_SIOF1_SCK),
-        PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, SIUAISLD_SIOF1_RXD),
-        PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, SIUAILR_SIOF1_SS2),
-        PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, SIUAIBT_SIOF1_SS1),
-        PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, SIUAOSLD_SIOF1_TXD),
-        PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, PSB1_SIUMCKA, PTK0),
-        PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, PTK0),
+        PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
+        PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
+        PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
+        PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
+        PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
+        PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
+        PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
+        PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
 
         /* SIU - Port B */
         PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
@@ -1612,7 +1613,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
                 0, 0,
                 0, 0,
                 0, 0,
-                0, 0,
+                HIZB4_SIUA, HIZB4_HIZ,
                 0, 0,
                 0, 0,
                 HIZB1_VIO, HIZB1_HIZ,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index ac4d5672ec1a..45eb1bfd42c9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -15,6 +15,71 @@
 #include <linux/sh_timer.h>
 #include <asm/clock.h>
 
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xffe30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 83, 83, 83, 83 },
+        .clk            = "scif3",
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
 static struct resource iic0_resources[] = {
         [0] = {
                 .name   = "IIC0",
@@ -265,52 +330,17 @@ static struct platform_device tmu2_device = {
         .num_resources  = ARRAY_SIZE(tmu2_resources),
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        }, {
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        }, {
-                .mapbase        = 0xffe30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 83, 83, 83, 83 },
-                .clk            = "scif3",
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
-
 static struct platform_device *sh7343_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
         &iic0_device,
         &iic1_device,
-        &sci_device,
         &vpu_device,
         &veu_device,
         &jpu_device,
@@ -328,6 +358,10 @@ static int __init sh7343_devices_setup(void)
 arch_initcall(sh7343_devices_setup);
 
 static struct platform_device *sh7343_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 4a9010bf4fd3..c494c193e3b6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -18,6 +18,22 @@
 #include <linux/usb/r8a66597.h>
 #include <asm/clock.h>
 
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
 static struct resource iic_resources[] = {
         [0] = {
                 .name   = "IIC",
@@ -276,33 +292,13 @@ static struct platform_device tmu2_device = {
         .num_resources  = ARRAY_SIZE(tmu2_resources),
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
-
 static struct platform_device *sh7366_devices[] __initdata = {
+        &scif0_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
         &iic_device,
-        &sci_device,
         &usb_host_device,
         &vpu_device,
         &veu0_device,
@@ -321,6 +317,7 @@ static int __init sh7366_devices_setup(void)
 arch_initcall(sh7366_devices_setup);
 
 static struct platform_device *sh7366_early_devices[] __initdata = {
+        &scif0_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5491b094cf05..fd7e3639e845 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -7,19 +7,216 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-#include <linux/platform_device.h>
 #include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/platform_device.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
-#include <linux/mm.h>
+#include <linux/sh_timer.h>
 #include <linux/uio_driver.h>
 #include <linux/usb/m66592.h>
-#include <linux/sh_timer.h>
+
 #include <asm/clock.h>
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
-#include <asm/dma-sh.h>
+#include <asm/siu.h>
+
+#include <cpu/dma-register.h>
 #include <cpu/sh7722.h>
 
+static struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
+        {
+                .slave_id       = SHDMA_SLAVE_SCIF0_TX,
+                .addr           = 0xffe0000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x21,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF0_RX,
+                .addr           = 0xffe00014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x22,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_TX,
+                .addr           = 0xffe1000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x25,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_RX,
+                .addr           = 0xffe10014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x26,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_TX,
+                .addr           = 0xffe2000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x29,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_RX,
+                .addr           = 0xffe20014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2a,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUA_TX,
+                .addr           = 0xa454c098,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb1,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUA_RX,
+                .addr           = 0xa454c090,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb2,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUB_TX,
+                .addr           = 0xa454c09c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb5,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SIUB_RX,
+                .addr           = 0xa454c094,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
+                .mid_rid        = 0xb6,
+        },
+};
+
+static struct sh_dmae_channel sh7722_dmae_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma_platform_data = {
+        .slave          = sh7722_dmae_slaves,
+        .slave_num      = ARRAY_SIZE(sh7722_dmae_slaves),
+        .channel        = sh7722_dmae_channels,
+        .channel_num    = ARRAY_SIZE(sh7722_dmae_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct resource sh7722_dmae_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe008020,
+                .end    = 0xfe00808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* DMARSx */
+                .start  = 0xfe009000,
+                .end    = 0xfe00900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 78,
+                .end    = 78,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-3 */
+                .start  = 48,
+                .end    = 51,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 4-5 */
+                .start  = 76,
+                .end    = 77,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device dma_device = {
+        .name           = "sh-dma-engine",
+        .id             = -1,
+        .resource       = sh7722_dmae_resources,
+        .num_resources  = ARRAY_SIZE(sh7722_dmae_resources),
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC,
+        },
+};
+
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
 static struct resource rtc_resources[] = {
         [0] = {
                 .start  = 0xa465fec0,
@@ -339,54 +536,43 @@ static struct platform_device tmu2_device = {
         },
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        },
-        {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        },
-        {
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        },
-        {
-                .flags = 0,
-        }
+static struct siu_platform siu_platform_data = {
+        .dma_dev        = &dma_device.dev,
+        .dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
+        .dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
+        .dma_slave_tx_b = SHDMA_SLAVE_SIUB_TX,
+        .dma_slave_rx_b = SHDMA_SLAVE_SIUB_RX,
 };
 
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
+static struct resource siu_resources[] = {
+        [0] = {
+                .start  = 0xa4540000,
+                .end    = 0xa454c10f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 108,
+                .flags  = IORESOURCE_IRQ,
         },
 };
 
-static struct sh_dmae_pdata dma_platform_data = {
-        .mode = 0,
-};
-
-static struct platform_device dma_device = {
-        .name           = "sh-dma-engine",
+static struct platform_device siu_device = {
+        .name           = "sh_siu",
         .id             = -1,
-        .dev            = {
-                .platform_data  = &dma_platform_data,
+        .dev = {
+                .platform_data  = &siu_platform_data,
+        },
+        .resource       = siu_resources,
+        .num_resources  = ARRAY_SIZE(siu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SIU,
         },
 };
 
 static struct platform_device *sh7722_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
@@ -394,10 +580,10 @@ static struct platform_device *sh7722_devices[] __initdata = {
         &rtc_device,
         &usbf_device,
         &iic_device,
-        &sci_device,
         &vpu_device,
         &veu_device,
         &jpu_device,
+        &siu_device,
         &dma_device,
 };
 
@@ -413,6 +599,9 @@ static int __init sh7722_devices_setup(void)
 arch_initcall(sh7722_devices_setup);
 
 static struct platform_device *sh7722_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
@@ -427,6 +616,8 @@ void __init plat_early_device_setup(void)
 
 enum {
         UNUSED=0,
+        ENABLED,
+        DISABLED,
 
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -442,7 +633,6 @@ enum {
         SCIF0, SCIF1, SCIF2, SIOF0, SIOF1, SIO,
         FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
         I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI,
-        SDHI0, SDHI1, SDHI2, SDHI3,
         CMT, TSIF, SIU, TWODG,
         TMU0, TMU1, TMU2,
         IRDA, JPU, LCDC,
@@ -475,8 +665,8 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
         INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20),
         INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60),
-        INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0),
-        INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0),
+        INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
+        INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
         INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
         INTC_VECT(SIU, 0xf80), INTC_VECT(TWODG, 0xfa0),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
@@ -494,7 +684,6 @@ static struct intc_group groups[] __initdata = {
         INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
                    FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
         INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
-        INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
@@ -516,7 +705,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
           { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
             FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
         { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
-          { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, TWODG, SIU } },
+          { DISABLED, DISABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } },
         { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
           { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } },
         { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -554,9 +743,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 };
 
-static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups,
-                             mask_registers, prio_registers, sense_registers,
-                             ack_registers);
+static struct intc_desc intc_desc __initdata = {
+        .name = "sh7722",
+        .force_enable = ENABLED,
+        .force_disable = DISABLED,
+        .hw = INTC_HW_DESC(vectors, groups, mask_registers,
+                           prio_registers, sense_registers, ack_registers),
+};
 
 void __init plat_irq_setup(void)
 {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 4caa5a7ca86e..85c61f624702 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -20,6 +20,103 @@
 #include <asm/mmzone.h>
 #include <cpu/sh7723.h>
 
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xa4e30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 56, 56, 56, 56 },
+        .clk            = "scif3",
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xa4e40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 88, 88, 88, 88 },
+        .clk            = "scif4",
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xa4e50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 109, 109, 109, 109 },
+        .clk            = "scif5",
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
 static struct uio_info vpu_platform_data = {
         .name = "VPU5",
         .version = "0",
@@ -348,56 +445,6 @@ static struct platform_device tmu5_device = {
         },
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
-        },{
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
-        },{
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
-        },{
-                .mapbase        = 0xa4e30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 56, 56, 56, 56 },
-                .clk            = "scif3",
-        },{
-                .mapbase        = 0xa4e40000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 88, 88, 88, 88 },
-                .clk            = "scif4",
-        },{
-                .mapbase        = 0xa4e50000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 109, 109, 109, 109 },
-                .clk            = "scif5",
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
-
 static struct resource rtc_resources[] = {
         [0] = {
                 .start  = 0xa465fec0,
@@ -488,6 +535,12 @@ static struct platform_device iic_device = {
 };
 
 static struct platform_device *sh7723_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
@@ -495,7 +548,6 @@ static struct platform_device *sh7723_devices[] __initdata = {
         &tmu3_device,
         &tmu4_device,
         &tmu5_device,
-        &sci_device,
         &rtc_device,
         &iic_device,
         &sh7723_usb_host_device,
@@ -516,6 +568,12 @@ static int __init sh7723_devices_setup(void)
 arch_initcall(sh7723_devices_setup);
 
 static struct platform_device *sh7723_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
@@ -534,14 +592,17 @@ void __init plat_early_device_setup(void)
 #define RAMCR_CACHE_L2FC        0x0002
 #define RAMCR_CACHE_L2E         0x0001
 #define L2_CACHE_ENABLE         (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
-void __uses_jump_to_uncached l2_cache_init(void)
+
+void l2_cache_init(void)
 {
         /* Enable L2 cache */
-        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+        __raw_writel(L2_CACHE_ENABLE, RAMCR);
 }
 
 enum {
         UNUSED=0,
+        ENABLED,
+        DISABLED,
 
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -564,7 +625,6 @@ enum {
         SCIFA_SCIFA1,
         FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I,
         I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI,
-        SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2,
         CMT_CMTI,
         TSIF_TSIFI,
         SIU_SIUI,
@@ -572,7 +632,6 @@ enum {
         TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
         IRDA_IRDAI,
         ATAPI_ATAPII,
-        SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2,
         VEU2H1_VEU2HI,
         LCDC_LCDCI,
         TMU1_TUNI0,TMU1_TUNI1,TMU1_TUNI2,
@@ -643,9 +702,9 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(I2C_WAITI,0xE40),
         INTC_VECT(I2C_DTEI,0xE60),
 
-        INTC_VECT(SDHI0_SDHII0,0xE80),
-        INTC_VECT(SDHI0_SDHII1,0xEA0),
-        INTC_VECT(SDHI0_SDHII2,0xEC0),
+        INTC_VECT(SDHI0, 0xE80),
+        INTC_VECT(SDHI0, 0xEA0),
+        INTC_VECT(SDHI0, 0xEC0),
 
         INTC_VECT(CMT_CMTI,0xF00),
         INTC_VECT(TSIF_TSIFI,0xF20),
@@ -659,9 +718,9 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(IRDA_IRDAI,0x480),
         INTC_VECT(ATAPI_ATAPII,0x4A0),
 
-        INTC_VECT(SDHI1_SDHII0,0x4E0),
-        INTC_VECT(SDHI1_SDHII1,0x500),
-        INTC_VECT(SDHI1_SDHII2,0x520),
+        INTC_VECT(SDHI1, 0x4E0),
+        INTC_VECT(SDHI1, 0x500),
+        INTC_VECT(SDHI1, 0x520),
 
         INTC_VECT(VEU2H1_VEU2HI,0x560),
         INTC_VECT(LCDC_LCDCI,0x580),
@@ -680,15 +739,14 @@ static struct intc_group groups[] __initdata = {
         INTC_GROUP(FLCTL,FLCTL_FLSTEI,FLCTL_FLTENDI,FLCTL_FLTREQ0I,FLCTL_FLTREQ1I),
         INTC_GROUP(I2C,I2C_ALI,I2C_TACKI,I2C_WAITI,I2C_DTEI),
         INTC_GROUP(_2DG, _2DG_TRI,_2DG_INI,_2DG_CEI),
-        INTC_GROUP(SDHI1, SDHI1_SDHII0,SDHI1_SDHII1,SDHI1_SDHII2),
         INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI),
         INTC_GROUP(DMAC1B, DMAC1B_DEI4,DMAC1B_DEI5,DMAC1B_DADERR),
-        INTC_GROUP(SDHI0,SDHI0_SDHII0,SDHI0_SDHII1,SDHI0_SDHII2),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
         { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
-          { 0,  TMU1_TUNI2,TMU1_TUNI1,TMU1_TUNI0,0,SDHI1_SDHII2,SDHI1_SDHII1,SDHI1_SDHII0} },
+          { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
+            0, DISABLED, ENABLED, ENABLED } },
         { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
           { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
         { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
@@ -705,7 +763,8 @@ static struct intc_mask_reg mask_registers[] __initdata = {
           { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
             FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
         { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
-          { 0,SDHI0_SDHII2,SDHI0_SDHII1,SDHI0_SDHII0,0,0,SCIFA_SCIFA2,SIU_SIUI } },
+          { 0, DISABLED, ENABLED, ENABLED,
+            0, 0, SCIFA_SCIFA2, SIU_SIUI } },
         { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
           { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
         { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -745,9 +804,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 };
 
-static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups,
-                             mask_registers, prio_registers, sense_registers,
-                             ack_registers);
+static struct intc_desc intc_desc __initdata = {
+        .name = "sh7723",
+        .force_enable = ENABLED,
+        .force_disable = DISABLED,
+        .hw = INTC_HW_DESC(vectors, groups, mask_registers,
+                           prio_registers, sense_registers, ack_registers),
+};
 
 void __init plat_irq_setup(void)
 {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index f3851fd757ec..e7fa2a92fc1f 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -20,58 +20,287 @@
 #include <linux/uio_driver.h>
 #include <linux/sh_timer.h>
 #include <linux/io.h>
+#include <linux/notifier.h>
+
+#include <asm/suspend.h>
 #include <asm/clock.h>
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
+
+#include <cpu/dma-register.h>
 #include <cpu/sh7724.h>
 
-/* Serial */
-static struct plat_sci_port sci_platform_data[] = {
+/* DMA */
+static struct sh_dmae_channel sh7724_dmae0_channels[] = {
         {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 80, 80, 80, 80 },
-                .clk            = "scif0",
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
         }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 81, 81, 81, 81 },
-                .clk            = "scif1",
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static struct sh_dmae_channel sh7724_dmae1_channels[] = {
+        {
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
         }, {
-                .mapbase        = 0xffe20000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 82, 82, 82, 82 },
-                .clk            = "scif2",
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
         }, {
-                .mapbase        = 0xa4e30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 56, 56, 56, 56 },
-                .clk            = "scif3",
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
         }, {
-                .mapbase        = 0xa4e40000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 88, 88, 88, 88 },
-                .clk            = "scif4",
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
         }, {
-                .mapbase        = 0xa4e50000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIFA,
-                .irqs           = { 109, 109, 109, 109 },
-                .clk            = "scif5",
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
         }, {
-                .flags = 0,
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
         }
 };
 
-static struct platform_device sci_device = {
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+        .channel        = sh7724_dmae0_channels,
+        .channel_num    = ARRAY_SIZE(sh7724_dmae0_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+        .channel        = sh7724_dmae1_channels,
+        .channel_num    = ARRAY_SIZE(sh7724_dmae1_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+/* Resource order important! */
+static struct resource sh7724_dmae0_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfe008020,
+                .end    = 0xfe00808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfe009000,
+                .end    = 0xfe00900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 78,
+                .end    = 78,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-3 */
+                .start  = 48,
+                .end    = 51,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 4-5 */
+                .start  = 76,
+                .end    = 77,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+/* Resource order important! */
+static struct resource sh7724_dmae1_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xfdc08020,
+                .end    = 0xfdc0808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMARSx */
+                .start  = 0xfdc09000,
+                .end    = 0xfdc0900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* DMA error IRQ */
+                .start  = 74,
+                .end    = 74,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 0-3 */
+                .start  = 40,
+                .end    = 43,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                /* IRQ for channels 4-5 */
+                .start  = 72,
+                .end    = 73,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device dma0_device = {
+        .name           = "sh-dma-engine",
+        .id             = 0,
+        .resource       = sh7724_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7724_dmae0_resources),
+        .dev            = {
+                .platform_data  = &dma0_platform_data,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC0,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7724_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7724_dmae1_resources),
+        .dev            = {
+                .platform_data  = &dma1_platform_data,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_DMAC1,
+        },
+};
+
+/* Serial */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 80, 80, 80, 80 },
+        .clk            = "scif0",
+};
+
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 81, 81, 81, 81 },
+        .clk            = "scif1",
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe20000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 82, 82, 82, 82 },
+        .clk            = "scif2",
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xa4e30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 56, 56, 56, 56 },
+        .clk            = "scif3",
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xa4e40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 88, 88, 88, 88 },
+        .clk            = "scif4",
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xa4e50000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIFA,
+        .irqs           = { 109, 109, 109, 109 },
+        .clk            = "scif5",
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
         },
 };
 
@@ -202,7 +431,7 @@ static struct resource veu0_resources[] = {
         [0] = {
                 .name   = "VEU3F0",
                 .start  = 0xfe920000,
-                .end    = 0xfe9200cb - 1,
+                .end    = 0xfe9200cb,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -234,7 +463,7 @@ static struct resource veu1_resources[] = {
         [0] = {
                 .name   = "VEU3F1",
                 .start  = 0xfe924000,
-                .end    = 0xfe9240cb - 1,
+                .end    = 0xfe9240cb,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -523,7 +752,77 @@ static struct platform_device jpu_device = {
         },
 };
 
+/* SPU2DSP0 */
+static struct uio_info spu0_platform_data = {
+        .name = "SPU2DSP0",
+        .version = "0",
+        .irq = 86,
+};
+
+static struct resource spu0_resources[] = {
+        [0] = {
+                .name   = "SPU2DSP0",
+                .start  = 0xFE200000,
+                .end    = 0xFE2FFFFF,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device spu0_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &spu0_platform_data,
+        },
+        .resource       = spu0_resources,
+        .num_resources  = ARRAY_SIZE(spu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SPU,
+        },
+};
+
+/* SPU2DSP1 */
+static struct uio_info spu1_platform_data = {
+        .name = "SPU2DSP1",
+        .version = "0",
+        .irq = 87,
+};
+
+static struct resource spu1_resources[] = {
+        [0] = {
+                .name   = "SPU2DSP1",
+                .start  = 0xFE300000,
+                .end    = 0xFE3FFFFF,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device spu1_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &spu1_platform_data,
+        },
+        .resource       = spu1_resources,
+        .num_resources  = ARRAY_SIZE(spu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_SPU,
+        },
+};
+
 static struct platform_device *sh7724_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
@@ -531,7 +830,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
         &tmu3_device,
         &tmu4_device,
         &tmu5_device,
-        &sci_device,
+        &dma0_device,
+        &dma1_device,
         &rtc_device,
         &iic0_device,
         &iic1_device,
@@ -539,6 +839,8 @@ static struct platform_device *sh7724_devices[] __initdata = {
         &veu0_device,
         &veu1_device,
         &jpu_device,
+        &spu0_device,
+        &spu1_device,
 };
 
 static int __init sh7724_devices_setup(void)
@@ -547,6 +849,8 @@ static int __init sh7724_devices_setup(void)
         platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
         platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
         platform_resource_setup_memory(&jpu_device,  "jpu",  2 << 20);
+        platform_resource_setup_memory(&spu0_device, "spu0", 2 << 20);
+        platform_resource_setup_memory(&spu1_device, "spu1", 2 << 20);
 
         return platform_add_devices(sh7724_devices,
                                     ARRAY_SIZE(sh7724_devices));
@@ -554,6 +858,12 @@ static int __init sh7724_devices_setup(void)
 arch_initcall(sh7724_devices_setup);
 
 static struct platform_device *sh7724_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &cmt_device,
         &tmu0_device,
         &tmu1_device,
@@ -572,14 +882,17 @@ void __init plat_early_device_setup(void)
 #define RAMCR_CACHE_L2FC        0x0002
 #define RAMCR_CACHE_L2E         0x0001
 #define L2_CACHE_ENABLE         (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
-void __uses_jump_to_uncached l2_cache_init(void)
+
+void l2_cache_init(void)
 {
         /* Enable L2 cache */
-        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+        __raw_writel(L2_CACHE_ENABLE, RAMCR);
 }
 
 enum {
         UNUSED = 0,
+        ENABLED,
+        DISABLED,
 
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -608,14 +921,12 @@ enum {
         ETHI,
         I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
         I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
-        SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3,
         CMT,
         TSIF,
         FSI,
         SCIFA5,
         TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
         IRDA,
-        SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2,
         JPU,
         _2DDMAC,
         MMC_MMC2I, MMC_MMC3I,
@@ -697,10 +1008,10 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(I2C0_WAITI, 0xE40),
         INTC_VECT(I2C0_DTEI, 0xE60),
 
-        INTC_VECT(SDHI0_SDHII0, 0xE80),
-        INTC_VECT(SDHI0_SDHII1, 0xEA0),
-        INTC_VECT(SDHI0_SDHII2, 0xEC0),
-        INTC_VECT(SDHI0_SDHII3, 0xEE0),
+        INTC_VECT(SDHI0, 0xE80),
+        INTC_VECT(SDHI0, 0xEA0),
+        INTC_VECT(SDHI0, 0xEC0),
+        INTC_VECT(SDHI0, 0xEE0),
 
         INTC_VECT(CMT,    0xF00),
         INTC_VECT(TSIF,   0xF20),
@@ -713,9 +1024,9 @@ static struct intc_vect vectors[] __initdata = {
 
         INTC_VECT(IRDA,    0x480),
 
-        INTC_VECT(SDHI1_SDHII0, 0x4E0),
-        INTC_VECT(SDHI1_SDHII1, 0x500),
-        INTC_VECT(SDHI1_SDHII2, 0x520),
+        INTC_VECT(SDHI1, 0x4E0),
+        INTC_VECT(SDHI1, 0x500),
+        INTC_VECT(SDHI1, 0x520),
 
         INTC_VECT(JPU, 0x560),
         INTC_VECT(_2DDMAC, 0x4A0),
@@ -741,8 +1052,6 @@ static struct intc_group groups[] __initdata = {
         INTC_GROUP(DMAC0B, DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR),
         INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
         INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
-        INTC_GROUP(SDHI0, SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3),
-        INTC_GROUP(SDHI1, SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2),
         INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1),
         INTC_GROUP(MMCIF, MMC_MMC2I, MMC_MMC3I),
 };
@@ -750,7 +1059,7 @@ static struct intc_group groups[] __initdata = {
 static struct intc_mask_reg mask_registers[] __initdata = {
         { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
           { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
-            0, SDHI1_SDHII2, SDHI1_SDHII1, SDHI1_SDHII0 } },
+            0, DISABLED, ENABLED, ENABLED } },
         { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
           { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0,
             DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } },
@@ -772,7 +1081,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
           { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
             I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } },
         { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
-          { SDHI0_SDHII3, SDHI0_SDHII2, SDHI0_SDHII1, SDHI0_SDHII0,
+          { DISABLED, DISABLED, ENABLED, ENABLED,
             0, 0, SCIFA5, FSI } },
         { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
           { 0, 0, 0, CMT, 0, USB1, USB0, 0 } },
@@ -819,11 +1128,205 @@ static struct intc_mask_reg ack_registers[] __initdata = {
           { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
 };
 
-static DECLARE_INTC_DESC_ACK(intc_desc, "sh7724", vectors, groups,
-                             mask_registers, prio_registers, sense_registers,
-                             ack_registers);
+static struct intc_desc intc_desc __initdata = {
+        .name = "sh7724",
+        .force_enable = ENABLED,
+        .force_disable = DISABLED,
+        .hw = INTC_HW_DESC(vectors, groups, mask_registers,
+                           prio_registers, sense_registers, ack_registers),
+};
 
 void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
 }
+
+static struct {
+        /* BSC */
+        unsigned long mmselr;
+        unsigned long cs0bcr;
+        unsigned long cs4bcr;
+        unsigned long cs5abcr;
+        unsigned long cs5bbcr;
+        unsigned long cs6abcr;
+        unsigned long cs6bbcr;
+        unsigned long cs4wcr;
+        unsigned long cs5awcr;
+        unsigned long cs5bwcr;
+        unsigned long cs6awcr;
+        unsigned long cs6bwcr;
+        /* INTC */
+        unsigned short ipra;
+        unsigned short iprb;
+        unsigned short iprc;
+        unsigned short iprd;
+        unsigned short ipre;
+        unsigned short iprf;
+        unsigned short iprg;
+        unsigned short iprh;
+        unsigned short ipri;
+        unsigned short iprj;
+        unsigned short iprk;
+        unsigned short iprl;
+        unsigned char imr0;
+        unsigned char imr1;
+        unsigned char imr2;
+        unsigned char imr3;
+        unsigned char imr4;
+        unsigned char imr5;
+        unsigned char imr6;
+        unsigned char imr7;
+        unsigned char imr8;
+        unsigned char imr9;
+        unsigned char imr10;
+        unsigned char imr11;
+        unsigned char imr12;
+        /* RWDT */
+        unsigned short rwtcnt;
+        unsigned short rwtcsr;
+        /* CPG */
+        unsigned long irdaclk;
+        unsigned long spuclk;
+} sh7724_rstandby_state;
+
+static int sh7724_pre_sleep_notifier_call(struct notifier_block *nb,
+                                          unsigned long flags, void *unused)
+{
+        if (!(flags & SUSP_SH_RSTANDBY))
+                return NOTIFY_DONE;
+
+        /* BCR */
+        sh7724_rstandby_state.mmselr = __raw_readl(0xff800020); /* MMSELR */
+        sh7724_rstandby_state.mmselr |= 0xa5a50000;
+        sh7724_rstandby_state.cs0bcr = __raw_readl(0xfec10004); /* CS0BCR */
+        sh7724_rstandby_state.cs4bcr = __raw_readl(0xfec10010); /* CS4BCR */
+        sh7724_rstandby_state.cs5abcr = __raw_readl(0xfec10014); /* CS5ABCR */
+        sh7724_rstandby_state.cs5bbcr = __raw_readl(0xfec10018); /* CS5BBCR */
+        sh7724_rstandby_state.cs6abcr = __raw_readl(0xfec1001c); /* CS6ABCR */
+        sh7724_rstandby_state.cs6bbcr = __raw_readl(0xfec10020); /* CS6BBCR */
+        sh7724_rstandby_state.cs4wcr = __raw_readl(0xfec10030); /* CS4WCR */
+        sh7724_rstandby_state.cs5awcr = __raw_readl(0xfec10034); /* CS5AWCR */
+        sh7724_rstandby_state.cs5bwcr = __raw_readl(0xfec10038); /* CS5BWCR */
+        sh7724_rstandby_state.cs6awcr = __raw_readl(0xfec1003c); /* CS6AWCR */
+        sh7724_rstandby_state.cs6bwcr = __raw_readl(0xfec10040); /* CS6BWCR */
+
+        /* INTC */
+        sh7724_rstandby_state.ipra = __raw_readw(0xa4080000); /* IPRA */
+        sh7724_rstandby_state.iprb = __raw_readw(0xa4080004); /* IPRB */
+        sh7724_rstandby_state.iprc = __raw_readw(0xa4080008); /* IPRC */
+        sh7724_rstandby_state.iprd = __raw_readw(0xa408000c); /* IPRD */
+        sh7724_rstandby_state.ipre = __raw_readw(0xa4080010); /* IPRE */
+        sh7724_rstandby_state.iprf = __raw_readw(0xa4080014); /* IPRF */
+        sh7724_rstandby_state.iprg = __raw_readw(0xa4080018); /* IPRG */
+        sh7724_rstandby_state.iprh = __raw_readw(0xa408001c); /* IPRH */
+        sh7724_rstandby_state.ipri = __raw_readw(0xa4080020); /* IPRI */
+        sh7724_rstandby_state.iprj = __raw_readw(0xa4080024); /* IPRJ */
+        sh7724_rstandby_state.iprk = __raw_readw(0xa4080028); /* IPRK */
+        sh7724_rstandby_state.iprl = __raw_readw(0xa408002c); /* IPRL */
+        sh7724_rstandby_state.imr0 = __raw_readb(0xa4080080); /* IMR0 */
+        sh7724_rstandby_state.imr1 = __raw_readb(0xa4080084); /* IMR1 */
+        sh7724_rstandby_state.imr2 = __raw_readb(0xa4080088); /* IMR2 */
+        sh7724_rstandby_state.imr3 = __raw_readb(0xa408008c); /* IMR3 */
+        sh7724_rstandby_state.imr4 = __raw_readb(0xa4080090); /* IMR4 */
+        sh7724_rstandby_state.imr5 = __raw_readb(0xa4080094); /* IMR5 */
+        sh7724_rstandby_state.imr6 = __raw_readb(0xa4080098); /* IMR6 */
+        sh7724_rstandby_state.imr7 = __raw_readb(0xa408009c); /* IMR7 */
+        sh7724_rstandby_state.imr8 = __raw_readb(0xa40800a0); /* IMR8 */
+        sh7724_rstandby_state.imr9 = __raw_readb(0xa40800a4); /* IMR9 */
+        sh7724_rstandby_state.imr10 = __raw_readb(0xa40800a8); /* IMR10 */
+        sh7724_rstandby_state.imr11 = __raw_readb(0xa40800ac); /* IMR11 */
+        sh7724_rstandby_state.imr12 = __raw_readb(0xa40800b0); /* IMR12 */
+
+        /* RWDT */
+        sh7724_rstandby_state.rwtcnt = __raw_readb(0xa4520000); /* RWTCNT */
+        sh7724_rstandby_state.rwtcnt |= 0x5a00;
+        sh7724_rstandby_state.rwtcsr = __raw_readb(0xa4520004); /* RWTCSR */
+        sh7724_rstandby_state.rwtcsr |= 0xa500;
+        __raw_writew(sh7724_rstandby_state.rwtcsr & 0x07, 0xa4520004);
+
+        /* CPG */
+        sh7724_rstandby_state.irdaclk = __raw_readl(0xa4150018); /* IRDACLKCR */
+        sh7724_rstandby_state.spuclk = __raw_readl(0xa415003c); /* SPUCLKCR */
+
+        return NOTIFY_DONE;
+}
+
+static int sh7724_post_sleep_notifier_call(struct notifier_block *nb,
+                                           unsigned long flags, void *unused)
+{
+        if (!(flags & SUSP_SH_RSTANDBY))
+                return NOTIFY_DONE;
+
+        /* BCR */
+        __raw_writel(sh7724_rstandby_state.mmselr, 0xff800020); /* MMSELR */
+        __raw_writel(sh7724_rstandby_state.cs0bcr, 0xfec10004); /* CS0BCR */
+        __raw_writel(sh7724_rstandby_state.cs4bcr, 0xfec10010); /* CS4BCR */
+        __raw_writel(sh7724_rstandby_state.cs5abcr, 0xfec10014); /* CS5ABCR */
+        __raw_writel(sh7724_rstandby_state.cs5bbcr, 0xfec10018); /* CS5BBCR */
+        __raw_writel(sh7724_rstandby_state.cs6abcr, 0xfec1001c); /* CS6ABCR */
+        __raw_writel(sh7724_rstandby_state.cs6bbcr, 0xfec10020); /* CS6BBCR */
+        __raw_writel(sh7724_rstandby_state.cs4wcr, 0xfec10030); /* CS4WCR */
+        __raw_writel(sh7724_rstandby_state.cs5awcr, 0xfec10034); /* CS5AWCR */
+        __raw_writel(sh7724_rstandby_state.cs5bwcr, 0xfec10038); /* CS5BWCR */
+        __raw_writel(sh7724_rstandby_state.cs6awcr, 0xfec1003c); /* CS6AWCR */
+        __raw_writel(sh7724_rstandby_state.cs6bwcr, 0xfec10040); /* CS6BWCR */
+
+        /* INTC */
+        __raw_writew(sh7724_rstandby_state.ipra, 0xa4080000); /* IPRA */
+        __raw_writew(sh7724_rstandby_state.iprb, 0xa4080004); /* IPRB */
+        __raw_writew(sh7724_rstandby_state.iprc, 0xa4080008); /* IPRC */
+        __raw_writew(sh7724_rstandby_state.iprd, 0xa408000c); /* IPRD */
+        __raw_writew(sh7724_rstandby_state.ipre, 0xa4080010); /* IPRE */
+        __raw_writew(sh7724_rstandby_state.iprf, 0xa4080014); /* IPRF */
+        __raw_writew(sh7724_rstandby_state.iprg, 0xa4080018); /* IPRG */
+        __raw_writew(sh7724_rstandby_state.iprh, 0xa408001c); /* IPRH */
+        __raw_writew(sh7724_rstandby_state.ipri, 0xa4080020); /* IPRI */
+        __raw_writew(sh7724_rstandby_state.iprj, 0xa4080024); /* IPRJ */
+        __raw_writew(sh7724_rstandby_state.iprk, 0xa4080028); /* IPRK */
+        __raw_writew(sh7724_rstandby_state.iprl, 0xa408002c); /* IPRL */
+        __raw_writeb(sh7724_rstandby_state.imr0, 0xa4080080); /* IMR0 */
+        __raw_writeb(sh7724_rstandby_state.imr1, 0xa4080084); /* IMR1 */
+        __raw_writeb(sh7724_rstandby_state.imr2, 0xa4080088); /* IMR2 */
+        __raw_writeb(sh7724_rstandby_state.imr3, 0xa408008c); /* IMR3 */
+        __raw_writeb(sh7724_rstandby_state.imr4, 0xa4080090); /* IMR4 */
+        __raw_writeb(sh7724_rstandby_state.imr5, 0xa4080094); /* IMR5 */
+        __raw_writeb(sh7724_rstandby_state.imr6, 0xa4080098); /* IMR6 */
+        __raw_writeb(sh7724_rstandby_state.imr7, 0xa408009c); /* IMR7 */
+        __raw_writeb(sh7724_rstandby_state.imr8, 0xa40800a0); /* IMR8 */
+        __raw_writeb(sh7724_rstandby_state.imr9, 0xa40800a4); /* IMR9 */
+        __raw_writeb(sh7724_rstandby_state.imr10, 0xa40800a8); /* IMR10 */
+        __raw_writeb(sh7724_rstandby_state.imr11, 0xa40800ac); /* IMR11 */
+        __raw_writeb(sh7724_rstandby_state.imr12, 0xa40800b0); /* IMR12 */
+
+        /* RWDT */
+        __raw_writew(sh7724_rstandby_state.rwtcnt, 0xa4520000); /* RWTCNT */
+        __raw_writew(sh7724_rstandby_state.rwtcsr, 0xa4520004); /* RWTCSR */
+
+        /* CPG */
+        __raw_writel(sh7724_rstandby_state.irdaclk, 0xa4150018); /* IRDACLKCR */
+        __raw_writel(sh7724_rstandby_state.spuclk, 0xa415003c); /* SPUCLKCR */
+
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block sh7724_pre_sleep_notifier = {
+        .notifier_call = sh7724_pre_sleep_notifier_call,
+        .priority = SH_MOBILE_PRE(SH_MOBILE_SLEEP_CPU),
+};
+
+static struct notifier_block sh7724_post_sleep_notifier = {
+        .notifier_call = sh7724_post_sleep_notifier_call,
+        .priority = SH_MOBILE_POST(SH_MOBILE_SLEEP_CPU),
+};
+
+static int __init sh7724_sleep_setup(void)
+{
+        atomic_notifier_chain_register(&sh_mobile_pre_sleep_notifier_list,
+                                       &sh7724_pre_sleep_notifier);
+
+        atomic_notifier_chain_register(&sh_mobile_post_sleep_notifier_list,
+                                       &sh7724_post_sleep_notifier);
+        return 0;
+}
+arch_initcall(sh7724_sleep_setup);
+
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index c470e15f2e03..e75edf58796a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -17,6 +17,51 @@
 #include <linux/mm.h>
 #include <linux/sh_timer.h>
 
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xfe4b0000,           /* SCIF2 */
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xfe4c0000,           /* SCIF3 */
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 76, 76, 76 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xfe4d0000,           /* SCIF4 */
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 104, 104, 104, 104 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
 static struct sh_timer_config tmu0_platform_data = {
         .name = "TMU0",
         .channel_offset = 0x04,
@@ -79,39 +124,12 @@ static struct platform_device tmu1_device = {
         .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xfe4b0000,           /* SCIF2 */
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .mapbase        = 0xfe4c0000,           /* SCIF3 */
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 76, 76, 76 },
-        }, {
-                .mapbase        = 0xfe4d0000,           /* SCIF4 */
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 104, 104, 104, 104 },
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
-
 static struct platform_device *sh7757_devices[] __initdata = {
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
         &tmu0_device,
         &tmu1_device,
-        &sci_device,
 };
 
 static int __init sh7757_devices_setup(void)
@@ -121,6 +139,20 @@ static int __init sh7757_devices_setup(void)
 }
 arch_initcall(sh7757_devices_setup);
 
+static struct platform_device *sh7757_early_devices[] __initdata = {
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &tmu0_device,
+        &tmu1_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7757_early_devices,
+                                   ARRAY_SIZE(sh7757_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
@@ -455,17 +487,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -475,32 +507,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 4659fff6b842..7f6b0a5f7f82 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -16,6 +16,51 @@
 #include <linux/io.h>
 #include <linux/serial_sci.h>
 
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe08000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 76, 76, 76 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 104, 104, 104, 104 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
 static struct resource rtc_resources[] = {
         [0] = {
                 .start  = 0xffe80000,
@@ -36,35 +81,6 @@ static struct platform_device rtc_device = {
         .resource       = rtc_resources,
 };
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-        }, {
-                .mapbase        = 0xffe08000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 76, 76, 76 },
-        }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 104, 104, 104, 104 },
-        }, {
-                .flags = 0,
-        }
-};
-
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
-        },
-};
-
 static struct resource usb_ohci_resources[] = {
         [0] = {
                 .start  = 0xffec8000,
@@ -297,6 +313,9 @@ static struct platform_device tmu5_device = {
 };
 
 static struct platform_device *sh7763_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -304,7 +323,6 @@ static struct platform_device *sh7763_devices[] __initdata = {
         &tmu4_device,
         &tmu5_device,
         &rtc_device,
-        &sci_device,
         &usb_ohci_device,
         &usbf_device,
 };
@@ -317,6 +335,9 @@ static int __init sh7763_devices_setup(void)
 arch_initcall(sh7763_devices_setup);
 
 static struct platform_device *sh7763_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -517,11 +538,11 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         register_intc_controller(&intc_desc);
 }
@@ -531,27 +552,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index eead08d89d32..86d681ecf90e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -14,67 +14,153 @@
 #include <linux/sh_timer.h>
 #include <linux/io.h>
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xff923000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 61, 61, 61, 61 },
-        }, {
-                .mapbase        = 0xff924000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 62, 62, 62, 62 },
-        }, {
-                .mapbase        = 0xff925000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 63, 63, 63, 63 },
-        }, {
-                .mapbase        = 0xff926000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 64, 64, 64, 64 },
-        }, {
-                .mapbase        = 0xff927000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 65, 65, 65, 65 },
-        }, {
-                .mapbase        = 0xff928000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 66, 66, 66, 66 },
-        }, {
-                .mapbase        = 0xff929000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 67, 67, 67, 67 },
-        }, {
-                .mapbase        = 0xff92a000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 68, 68, 68, 68 },
-        }, {
-                .mapbase        = 0xff92b000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 69, 69, 69, 69 },
-        }, {
-                .mapbase        = 0xff92c000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 70, 70, 70, 70 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xff923000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 61, 61, 61, 61 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xff924000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 62, 62, 62, 62 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xff925000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 63, 63, 63, 63 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xff926000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 64, 64, 64, 64 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xff927000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 65, 65, 65, 65 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xff928000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 66, 66, 66, 66 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
+static struct plat_sci_port scif6_platform_data = {
+        .mapbase        = 0xff929000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 67, 67, 67, 67 },
+};
+
+static struct platform_device scif6_device = {
+        .name           = "sh-sci",
+        .id             = 6,
+        .dev            = {
+                .platform_data  = &scif6_platform_data,
+        },
+};
+
+static struct plat_sci_port scif7_platform_data = {
+        .mapbase        = 0xff92a000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 68, 68, 68, 68 },
+};
+
+static struct platform_device scif7_device = {
+        .name           = "sh-sci",
+        .id             = 7,
+        .dev            = {
+                .platform_data  = &scif7_platform_data,
+        },
+};
+
+static struct plat_sci_port scif8_platform_data = {
+        .mapbase        = 0xff92b000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 69, 69, 69, 69 },
+};
+
+static struct platform_device scif8_device = {
+        .name           = "sh-sci",
+        .id             = 8,
+        .dev            = {
+                .platform_data  = &scif8_platform_data,
+        },
+};
+
+static struct plat_sci_port scif9_platform_data = {
+        .mapbase        = 0xff92c000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 70, 70, 70, 70 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif9_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 9,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif9_platform_data,
         },
 };
 
@@ -351,6 +437,16 @@ static struct platform_device tmu8_device = {
 };
 
 static struct platform_device *sh7770_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &scif8_device,
+        &scif9_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -360,7 +456,6 @@ static struct platform_device *sh7770_devices[] __initdata = {
         &tmu6_device,
         &tmu7_device,
         &tmu8_device,
-        &sci_device,
 };
 
 static int __init sh7770_devices_setup(void)
@@ -371,6 +466,16 @@ static int __init sh7770_devices_setup(void)
 arch_initcall(sh7770_devices_setup);
 
 static struct platform_device *sh7770_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
+        &scif6_device,
+        &scif7_device,
+        &scif8_device,
+        &scif9_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -589,17 +694,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -609,27 +714,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 12ff56f19c5c..02e792c90de6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -13,7 +13,40 @@
 #include <linux/io.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
-#include <asm/dma-sh.h>
+
+#include <asm/dmaengine.h>
+
+#include <cpu/dma-register.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffe00000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffe10000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 76, 76, 76, 76 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
 
 static struct sh_timer_config tmu0_platform_data = {
         .name = "TMU0",
@@ -217,43 +250,137 @@ static struct platform_device rtc_device = {
         .resource       = rtc_resources,
 };
 
-static struct plat_sci_port sci_platform_data[] = {
+/* DMA */
+static struct sh_dmae_channel sh7780_dmae0_channels[] = {
         {
-                .mapbase        = 0xffe00000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
+        }, {
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
+        }, {
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
         }, {
-                .mapbase        = 0xffe10000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 76, 76, 76, 76 },
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
         }, {
-                .flags = 0,
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
         }
 };
 
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = sci_platform_data,
+static struct sh_dmae_channel sh7780_dmae1_channels[] = {
+        {
+                .offset = 0,
+        }, {
+                .offset = 0x10,
+        }, {
+                .offset = 0x20,
+        }, {
+                .offset = 0x30,
+        }, {
+                .offset = 0x50,
+        }, {
+                .offset = 0x60,
+        }
+};
+
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+        .channel        = sh7780_dmae0_channels,
+        .channel_num    = ARRAY_SIZE(sh7780_dmae0_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+        .channel        = sh7780_dmae1_channels,
+        .channel_num    = ARRAY_SIZE(sh7780_dmae1_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct resource sh7780_dmae0_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfc808020,
+                .end    = 0xfc80808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* DMARSx */
+                .start  = 0xfc809000,
+                .end    = 0xfc80900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */
+                .start  = 34,
+                .end    = 34,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
         },
 };
 
-static struct sh_dmae_pdata dma_platform_data = {
-        .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),
+static struct resource sh7780_dmae1_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfc818020,
+                .end    = 0xfc81808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* DMAC1 has no DMARS */
+        {
+                /* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */
+                .start  = 46,
+                .end    = 46,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
 };
 
-static struct platform_device dma_device = {
+static struct platform_device dma0_device = {
         .name           = "sh-dma-engine",
-        .id             = -1,
+        .id             = 0,
+        .resource       = sh7780_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7780_dmae0_resources),
         .dev            = {
-                .platform_data  = &dma_platform_data,
+                .platform_data  = &dma0_platform_data,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7780_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7780_dmae1_resources),
+        .dev            = {
+                .platform_data  = &dma1_platform_data,
         },
 };
 
 static struct platform_device *sh7780_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -261,8 +388,8 @@ static struct platform_device *sh7780_devices[] __initdata = {
         &tmu4_device,
         &tmu5_device,
         &rtc_device,
-        &sci_device,
-        &dma_device,
+        &dma0_device,
+        &dma1_device,
 };
 
 static int __init sh7780_devices_setup(void)
@@ -271,8 +398,9 @@ static int __init sh7780_devices_setup(void)
                                     ARRAY_SIZE(sh7780_devices));
 }
 arch_initcall(sh7780_devices_setup);
-
 static struct platform_device *sh7780_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -453,17 +581,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -473,27 +601,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 7f6c718b6c36..1fcd88b1671e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -14,8 +14,108 @@
 #include <linux/io.h>
 #include <linux/mm.h>
 #include <linux/sh_timer.h>
+
+#include <asm/dmaengine.h>
 #include <asm/mmzone.h>
 
+#include <cpu/dma-register.h>
+
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffea0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 40, 40, 40 },
+        .clk            = "scif_fck",
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffeb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 44, 44, 44, 44 },
+        .clk            = "scif_fck",
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffec0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 60, 60, 60, 60 },
+        .clk            = "scif_fck",
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xffed0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 61, 61, 61, 61 },
+        .clk            = "scif_fck",
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xffee0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 62, 62, 62, 62 },
+        .clk            = "scif_fck",
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xffef0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 63, 63, 63, 63 },
+        .clk            = "scif_fck",
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
+        .dev            = {
+                .platform_data  = &scif5_platform_data,
+        },
+};
+
 static struct sh_timer_config tmu0_platform_data = {
         .name = "TMU0",
         .channel_offset = 0x04,
@@ -198,64 +298,149 @@ static struct platform_device tmu5_device = {
         .num_resources  = ARRAY_SIZE(tmu5_resources),
 };
 
-static struct plat_sci_port sci_platform_data[] = {
+/* DMA */
+static struct sh_dmae_channel sh7785_dmae0_channels[] = {
         {
-                .mapbase        = 0xffea0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 40, 40, 40 },
-                .clk            = "scif_fck",
+                .offset = 0,
+                .dmars = 0,
+                .dmars_bit = 0,
         }, {
-                .mapbase        = 0xffeb0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 44, 44, 44, 44 },
-                .clk            = "scif_fck",
+                .offset = 0x10,
+                .dmars = 0,
+                .dmars_bit = 8,
         }, {
-                .mapbase        = 0xffec0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 60, 60, 60, 60 },
-                .clk            = "scif_fck",
+                .offset = 0x20,
+                .dmars = 4,
+                .dmars_bit = 0,
         }, {
-                .mapbase        = 0xffed0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 61, 61, 61, 61 },
-                .clk            = "scif_fck",
+                .offset = 0x30,
+                .dmars = 4,
+                .dmars_bit = 8,
         }, {
-                .mapbase        = 0xffee0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 62, 62, 62, 62 },
-                .clk            = "scif_fck",
+                .offset = 0x50,
+                .dmars = 8,
+                .dmars_bit = 0,
         }, {
-                .mapbase        = 0xffef0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 63, 63, 63, 63 },
-                .clk            = "scif_fck",
+                .offset = 0x60,
+                .dmars = 8,
+                .dmars_bit = 8,
+        }
+};
+
+static struct sh_dmae_channel sh7785_dmae1_channels[] = {
+        {
+                .offset = 0,
         }, {
-                .flags = 0,
+                .offset = 0x10,
+        }, {
+                .offset = 0x20,
+        }, {
+                .offset = 0x30,
+        }, {
+                .offset = 0x50,
+        }, {
+                .offset = 0x60,
         }
 };
 
-static struct platform_device sci_device = {
-        .name           = "sh-sci",
-        .id             = -1,
+static unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+        .channel        = sh7785_dmae0_channels,
+        .channel_num    = ARRAY_SIZE(sh7785_dmae0_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+        .channel        = sh7785_dmae1_channels,
+        .channel_num    = ARRAY_SIZE(sh7785_dmae1_channels),
+        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+        .ts_low_mask    = CHCR_TS_LOW_MASK,
+        .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+        .ts_high_mask   = CHCR_TS_HIGH_MASK,
+        .ts_shift       = ts_shift,
+        .ts_shift_num   = ARRAY_SIZE(ts_shift),
+        .dmaor_init     = DMAOR_INIT,
+};
+
+static struct resource sh7785_dmae0_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfc808020,
+                .end    = 0xfc80808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* DMARSx */
+                .start  = 0xfc809000,
+                .end    = 0xfc80900b,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
+                .start  = 33,
+                .end    = 33,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
+};
+
+static struct resource sh7785_dmae1_resources[] = {
+        [0] = {
+                /* Channel registers and DMAOR */
+                .start  = 0xfcc08020,
+                .end    = 0xfcc0808f,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* DMAC1 has no DMARS */
+        {
+                /* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
+                .start  = 52,
+                .end    = 52,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+        },
+};
+
+static struct platform_device dma0_device = {
+        .name           = "sh-dma-engine",
+        .id             = 0,
+        .resource       = sh7785_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7785_dmae0_resources),
+        .dev            = {
+                .platform_data  = &dma0_platform_data,
+        },
+};
+
+static struct platform_device dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 1,
+        .resource       = sh7785_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7785_dmae1_resources),
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &dma1_platform_data,
         },
 };
 
 static struct platform_device *sh7785_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
         &tmu3_device,
         &tmu4_device,
         &tmu5_device,
-        &sci_device,
+        &dma0_device,
+        &dma1_device,
 };
 
 static int __init sh7785_devices_setup(void)
@@ -266,6 +451,12 @@ static int __init sh7785_devices_setup(void)
 arch_initcall(sh7785_devices_setup);
 
 static struct platform_device *sh7785_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -470,17 +661,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -490,32 +681,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 0104a8ec5369..7e585320710a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -23,51 +23,96 @@
 #include <linux/sh_timer.h>
 #include <asm/mmzone.h>
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffea0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffea0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 41, 43, 42 },
+};
+
+static struct platform_device scif0_device = {
+        .name           = "sh-sci",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
         },
-        /*
-         * The rest of these all have multiplexed IRQs
-         */
-        {
-                .mapbase        = 0xffeb0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 44, 44, 44, 44 },
-        }, {
-                .mapbase        = 0xffec0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 50, 50, 50, 50 },
-        }, {
-                .mapbase        = 0xffed0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 51, 51, 51, 51 },
-        }, {
-                .mapbase        = 0xffee0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 52, 52, 52 },
-        }, {
-                .mapbase        = 0xffef0000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 53, 53, 53, 53 },
-        }, {
-                .flags = 0,
-        }
 };
 
-static struct platform_device sci_device = {
+/*
+ * The rest of these all have multiplexed IRQs
+ */
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffeb0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 44, 44, 44, 44 },
+};
+
+static struct platform_device scif1_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffec0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 50, 50, 50, 50 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
+        },
+};
+
+static struct plat_sci_port scif3_platform_data = {
+        .mapbase        = 0xffed0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 51, 51, 51, 51 },
+};
+
+static struct platform_device scif3_device = {
+        .name           = "sh-sci",
+        .id             = 3,
+        .dev            = {
+                .platform_data  = &scif3_platform_data,
+        },
+};
+
+static struct plat_sci_port scif4_platform_data = {
+        .mapbase        = 0xffee0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 52, 52, 52 },
+};
+
+static struct platform_device scif4_device = {
+        .name           = "sh-sci",
+        .id             = 4,
+        .dev            = {
+                .platform_data  = &scif4_platform_data,
+        },
+};
+
+static struct plat_sci_port scif5_platform_data = {
+        .mapbase        = 0xffef0000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 53, 53, 53, 53 },
+};
+
+static struct platform_device scif5_device = {
+        .name           = "sh-sci",
+        .id             = 5,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif5_platform_data,
         },
 };
 
@@ -459,6 +504,12 @@ static struct platform_device usb_ohci_device = {
 };
 
 static struct platform_device *sh7786_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
+        &scif3_device,
+        &scif4_device,
+        &scif5_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -474,7 +525,6 @@ static struct platform_device *sh7786_early_devices[] __initdata = {
 };
 
 static struct platform_device *sh7786_devices[] __initdata = {
-        &sci_device,
         &usb_ohci_device,
 };
 
@@ -817,14 +867,14 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -834,32 +884,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index e848443deeb9..780ba17a5599 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -15,37 +15,57 @@
 #include <linux/sh_timer.h>
 #include <asm/mmzone.h>
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = 0xffc30000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
-        }, {
-                .mapbase        = 0xffc40000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 44, 45, 47, 46 },
-        }, {
-                .mapbase        = 0xffc50000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 48, 49, 51, 50 },
-        }, {
-                .mapbase        = 0xffc60000,
-                .flags          = UPF_BOOT_AUTOCONF,
-                .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55, 54 },
-        }, {
-                .flags = 0,
-        }
+/*
+ * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
+ * INTEVT values overlap with the FPU EXPEVT ones, requiring special
+ * demuxing in the exception dispatch path.
+ *
+ * As this overlap is something that never should have made it in to
+ * silicon in the first place, we just refuse to deal with the port at
+ * all rather than adding infrastructure to hack around it.
+ */
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = 0xffc30000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 40, 41, 43, 42 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &scif0_platform_data,
+        },
+};
+
+static struct plat_sci_port scif1_platform_data = {
+        .mapbase        = 0xffc40000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 44, 45, 47, 46 },
+};
+
+static struct platform_device scif1_device = {
+        .name           = "sh-sci",
+        .id             = 1,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif1_platform_data,
+        },
+};
+
+static struct plat_sci_port scif2_platform_data = {
+        .mapbase        = 0xffc60000,
+        .flags          = UPF_BOOT_AUTOCONF,
+        .type           = PORT_SCIF,
+        .irqs           = { 52, 53, 55, 54 },
+};
+
+static struct platform_device scif2_device = {
+        .name           = "sh-sci",
+        .id             = 2,
+        .dev            = {
+                .platform_data  = &scif2_platform_data,
         },
 };
 
@@ -232,6 +252,9 @@ static struct platform_device tmu5_device = {
 };
 
 static struct platform_device *shx3_early_devices[] __initdata = {
+        &scif0_device,
+        &scif1_device,
+        &scif2_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
@@ -240,21 +263,10 @@ static struct platform_device *shx3_early_devices[] __initdata = {
         &tmu5_device,
 };
 
-static struct platform_device *shx3_devices[] __initdata = {
-        &sci_device,
-};
-
 static int __init shx3_devices_setup(void)
 {
-        int ret;
-
-        ret = platform_add_devices(shx3_early_devices,
+        return platform_add_devices(shx3_early_devices,
                                    ARRAY_SIZE(shx3_early_devices));
-        if (unlikely(ret != 0))
-                return ret;
-
-        return platform_add_devices(shx3_devices,
-                                    ARRAY_SIZE(shx3_devices));
 }
 arch_initcall(shx3_devices_setup);
 
@@ -268,7 +280,11 @@ enum {
         UNUSED = 0,
 
         /* interrupt sources */
-        IRL, IRQ0, IRQ1, IRQ2, IRQ3,
+        IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
+        IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
+        IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
+        IRL_HHLL, IRL_HHLH, IRL_HHHL,
+        IRQ0, IRQ1, IRQ2, IRQ3,
         HUDII,
         TMU0, TMU1, TMU2, TMU3, TMU4, TMU5,
         PCII0, PCII1, PCII2, PCII3, PCII4,
@@ -291,7 +307,7 @@ enum {
         INTICI4, INTICI5, INTICI6, INTICI7,
 
         /* interrupt groups */
-        PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
+        IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
         DMAC0, DMAC1,
 };
 
@@ -309,8 +325,6 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
         INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
         INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
-        INTC_VECT(SCIF2_ERI, 0x800), INTC_VECT(SCIF2_RXI, 0x820),
-        INTC_VECT(SCIF2_BRI, 0x840), INTC_VECT(SCIF2_TXI, 0x860),
         INTC_VECT(SCIF3_ERI, 0x880), INTC_VECT(SCIF3_RXI, 0x8a0),
         INTC_VECT(SCIF3_BRI, 0x8c0), INTC_VECT(SCIF3_TXI, 0x8e0),
         INTC_VECT(DMAC0_DMINT0, 0x900), INTC_VECT(DMAC0_DMINT1, 0x920),
@@ -344,10 +358,13 @@ static struct intc_vect vectors[] __initdata = {
 };
 
 static struct intc_group groups[] __initdata = {
+        INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
+                   IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
+                   IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
+                   IRL_HHLL, IRL_HHLH, IRL_HHHL),
         INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9),
         INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
         INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
         INTC_GROUP(SCIF3, SCIF3_ERI, SCIF3_RXI, SCIF3_BRI, SCIF3_TXI),
         INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
                    DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
@@ -419,14 +436,14 @@ static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
 
 /* External interrupt pins in IRL mode */
 static struct intc_vect vectors_irl[] __initdata = {
-        INTC_VECT(IRL, 0x200), INTC_VECT(IRL, 0x220),
-        INTC_VECT(IRL, 0x240), INTC_VECT(IRL, 0x260),
-        INTC_VECT(IRL, 0x280), INTC_VECT(IRL, 0x2a0),
-        INTC_VECT(IRL, 0x2c0), INTC_VECT(IRL, 0x2e0),
-        INTC_VECT(IRL, 0x300), INTC_VECT(IRL, 0x320),
-        INTC_VECT(IRL, 0x340), INTC_VECT(IRL, 0x360),
-        INTC_VECT(IRL, 0x380), INTC_VECT(IRL, 0x3a0),
-        INTC_VECT(IRL, 0x3c0),
+        INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
+        INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
+        INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
+        INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
+        INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
+        INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
+        INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
+        INTC_VECT(IRL_HHHL, 0x3c0),
 };
 
 static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 185ec3976a25..11bf4c1e25c0 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -14,6 +14,13 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 
+#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
+#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
+
+#define STBCR_MSTP      0x00000001
+#define STBCR_RESET     0x00000002
+#define STBCR_LTSLP     0x80000000
+
 static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
 {
         unsigned int message = (unsigned int)(long)arg;
@@ -21,9 +28,9 @@ static irqreturn_t ipi_interrupt_handler(int irq, void *arg)
         unsigned int offs = 4 * cpu;
         unsigned int x;
 
-        x = ctrl_inl(0xfe410070 + offs); /* C0INITICI..CnINTICI */
+        x = __raw_readl(0xfe410070 + offs); /* C0INITICI..CnINTICI */
         x &= (1 << (message << 2));
-        ctrl_outl(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */
+        __raw_writel(x, 0xfe410080 + offs); /* C0INTICICLR..CnINTICICLR */
 
         smp_message_recv(message);
 
@@ -37,6 +44,9 @@ void __init plat_smp_setup(void)
 
         init_cpu_possible(cpumask_of(cpu));
 
+        /* Enable light sleep for the boot CPU */
+        __raw_writel(__raw_readl(STBCR_REG(cpu)) | STBCR_LTSLP, STBCR_REG(cpu));
+
         __cpu_number_map[0] = 0;
         __cpu_logical_map[0] = 0;
 
@@ -66,32 +76,26 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
                             "IPI", (void *)(long)i);
 }
 
-#define STBCR_REG(phys_id) (0xfe400004 | (phys_id << 12))
-#define RESET_REG(phys_id) (0xfe400008 | (phys_id << 12))
-
-#define STBCR_MSTP      0x00000001
-#define STBCR_RESET     0x00000002
-#define STBCR_LTSLP     0x80000000
-
-#define STBCR_AP_VAL    (STBCR_RESET | STBCR_LTSLP)
-
 void plat_start_cpu(unsigned int cpu, unsigned long entry_point)
 {
-        ctrl_outl(entry_point, RESET_REG(cpu));
+        if (__in_29bit_mode())
+                __raw_writel(entry_point, RESET_REG(cpu));
+        else
+                __raw_writel(virt_to_phys(entry_point), RESET_REG(cpu));
 
-        if (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP))
-                ctrl_outl(STBCR_MSTP, STBCR_REG(cpu));
+        if (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
+                __raw_writel(STBCR_MSTP, STBCR_REG(cpu));
 
-        while (!(ctrl_inl(STBCR_REG(cpu)) & STBCR_MSTP))
+        while (!(__raw_readl(STBCR_REG(cpu)) & STBCR_MSTP))
                 cpu_relax();
 
         /* Start up secondary processor by sending a reset */
-        ctrl_outl(STBCR_AP_VAL, STBCR_REG(cpu));
+        __raw_writel(STBCR_RESET | STBCR_LTSLP, STBCR_REG(cpu));
 }
 
 int plat_smp_processor_id(void)
 {
-        return ctrl_inl(0xff000048); /* CPIDR */
+        return __raw_readl(0xff000048); /* CPIDR */
 }
 
 void plat_send_ipi(unsigned int cpu, unsigned int message)
@@ -100,5 +104,5 @@ void plat_send_ipi(unsigned int cpu, unsigned int message)
 
         BUG_ON(cpu >= 4);
 
-        ctrl_outl(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
+        __raw_writel(1 << (message << 2), addr); /* C0INTICI..CnINTICI */
 }
diff --git a/arch/sh/kernel/cpu/sh4a/ubc.c b/arch/sh/kernel/cpu/sh4a/ubc.c
new file mode 100644
index 000000000000..efb2745bcb36
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/ubc.c
@@ -0,0 +1,133 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/ubc.c
+ *
+ * On-chip UBC support for SH-4A CPUs.
+ *
+ * Copyright (C) 2009 - 2010  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <asm/hw_breakpoint.h>
+
+#define UBC_CBR(idx)    (0xff200000 + (0x20 * idx))
+#define UBC_CRR(idx)    (0xff200004 + (0x20 * idx))
+#define UBC_CAR(idx)    (0xff200008 + (0x20 * idx))
+#define UBC_CAMR(idx)   (0xff20000c + (0x20 * idx))
+
+#define UBC_CCMFR       0xff200600
+#define UBC_CBCR        0xff200620
+
+/* CRR */
+#define UBC_CRR_PCB     (1 << 1)
+#define UBC_CRR_BIE     (1 << 0)
+
+/* CBR */
+#define UBC_CBR_CE      (1 << 0)
+
+static struct sh_ubc sh4a_ubc;
+
+static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx)
+{
+        __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx));
+        __raw_writel(info->address, UBC_CAR(idx));
+}
+
+static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx)
+{
+        __raw_writel(0, UBC_CBR(idx));
+        __raw_writel(0, UBC_CAR(idx));
+}
+
+static void sh4a_ubc_enable_all(unsigned long mask)
+{
+        int i;
+
+        for (i = 0; i < sh4a_ubc.num_events; i++)
+                if (mask & (1 << i))
+                        __raw_writel(__raw_readl(UBC_CBR(i)) | UBC_CBR_CE,
+                                     UBC_CBR(i));
+}
+
+static void sh4a_ubc_disable_all(void)
+{
+        int i;
+
+        for (i = 0; i < sh4a_ubc.num_events; i++)
+                __raw_writel(__raw_readl(UBC_CBR(i)) & ~UBC_CBR_CE,
+                             UBC_CBR(i));
+}
+
+static unsigned long sh4a_ubc_active_mask(void)
+{
+        unsigned long active = 0;
+        int i;
+
+        for (i = 0; i < sh4a_ubc.num_events; i++)
+                if (__raw_readl(UBC_CBR(i)) & UBC_CBR_CE)
+                        active |= (1 << i);
+
+        return active;
+}
+
+static unsigned long sh4a_ubc_triggered_mask(void)
+{
+        return __raw_readl(UBC_CCMFR);
+}
+
+static void sh4a_ubc_clear_triggered_mask(unsigned long mask)
+{
+        __raw_writel(__raw_readl(UBC_CCMFR) & ~mask, UBC_CCMFR);
+}
+
+static struct sh_ubc sh4a_ubc = {
+        .name                   = "SH-4A",
+        .num_events             = 2,
+        .trap_nr                = 0x1e0,
+        .enable                 = sh4a_ubc_enable,
+        .disable                = sh4a_ubc_disable,
+        .enable_all             = sh4a_ubc_enable_all,
+        .disable_all            = sh4a_ubc_disable_all,
+        .active_mask            = sh4a_ubc_active_mask,
+        .triggered_mask         = sh4a_ubc_triggered_mask,
+        .clear_triggered_mask   = sh4a_ubc_clear_triggered_mask,
+};
+
+static int __init sh4a_ubc_init(void)
+{
+        struct clk *ubc_iclk = clk_get(NULL, "ubc0");
+        int i;
+
+        /*
+         * The UBC MSTP bit is optional, as not all platforms will have
+         * it. Just ignore it if we can't find it.
+         */
+        if (IS_ERR(ubc_iclk))
+                ubc_iclk = NULL;
+
+        clk_enable(ubc_iclk);
+
+        __raw_writel(0, UBC_CBCR);
+
+        for (i = 0; i < sh4a_ubc.num_events; i++) {
+                __raw_writel(0, UBC_CAMR(i));
+                __raw_writel(0, UBC_CBR(i));
+
+                __raw_writel(UBC_CRR_BIE | UBC_CRR_PCB, UBC_CRR(i));
+
+                /* dummy read for write posting */
+                (void)__raw_readl(UBC_CRR(i));
+        }
+
+        clk_disable(ubc_iclk);
+
+        sh4a_ubc.clk = ubc_iclk;
+
+        return register_sh_ubc(&sh4a_ubc);
+}
+arch_initcall(sh4a_ubc_init);
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index 7f864ebc51d3..9cfc19b8dbe4 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -24,7 +24,7 @@ static unsigned long cprc_base;
 
 static void master_clk_init(struct clk *clk)
 {
-        int idx = (ctrl_inl(cprc_base + 0x00) >> 6) & 0x0007;
+        int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007;
         clk->rate *= ifc_table[idx];
 }
 
@@ -34,7 +34,7 @@ static struct clk_ops sh5_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007;
+        int idx = (__raw_readw(cprc_base) >> 12) & 0x0007;
         return clk->parent->rate / ifc_table[idx];
 }
 
@@ -44,7 +44,7 @@ static struct clk_ops sh5_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007;
+        int idx = (__raw_readw(cprc_base) >> 3) & 0x0007;
         return clk->parent->rate / ifc_table[idx];
 }
 
@@ -54,7 +54,7 @@ static struct clk_ops sh5_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) & 0x0007);
+        int idx = (__raw_readw(cprc_base) & 0x0007);
         return clk->parent->rate / ifc_table[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index b0aacf675258..6b80295dd7a4 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -187,7 +187,7 @@ trap_jtable:
         .rept 6
                 .long do_exception_error        /* 0x880 - 0x920 */
         .endr
-        .long   do_software_break_point /* 0x940 */
+        .long   breakpoint_trap_handler /* 0x940 */
         .long   do_exception_error              /* 0x960 */
         .long   do_single_step          /* 0x980 */
 
@@ -933,7 +933,7 @@ ret_with_reschedule:
 
         pta     restore_all, tr1
 
-        movi    (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r8
+        movi    _TIF_SIGPENDING, r8
         and     r8, r7, r8
         pta     work_notifysig, tr0
         bne     r8, ZERO, tr0
@@ -1124,7 +1124,7 @@ fpu_error_or_IRQA:
         pta     its_IRQ, tr0
         beqi/l  r4, EVENT_INTERRUPT, tr0
 #ifdef CONFIG_SH_FPU
-        movi    do_fpu_state_restore, r6
+        movi    fpu_state_restore_trap_handler, r6
 #else
         movi    do_exception_error, r6
 #endif
@@ -1135,7 +1135,7 @@ fpu_error_or_IRQB:
         pta     its_IRQ, tr0
         beqi/l  r4, EVENT_INTERRUPT, tr0
 #ifdef CONFIG_SH_FPU
-        movi    do_fpu_state_restore, r6
+        movi    fpu_state_restore_trap_handler, r6
 #else
         movi    do_exception_error, r6
 #endif
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index dd4f51ffb50e..4b3bb35e99f3 100644
--- a/arch/sh/kernel/cpu/sh5/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -15,26 +15,8 @@
 #include <linux/sched.h>
 #include <linux/signal.h>
 #include <asm/processor.h>
-#include <asm/user.h>
-#include <asm/io.h>
-#include <asm/fpu.h>
 
-/*
- * Initially load the FPU with signalling NANS.  This bit pattern
- * has the property that no matter whether considered as single or as
- * double precision, it still represents a signalling NAN.
- */
-#define sNAN64          0xFFFFFFFFFFFFFFFFULL
-#define sNAN32          0xFFFFFFFFUL
-
-static union sh_fpu_union init_fpuregs = {
-        .hard = {
-                .fp_regs = { [0 ... 63] = sNAN32 },
-                .fpscr = FPSCR_INIT
-        }
-};
-
-void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
+void save_fpu(struct task_struct *tsk)
 {
         asm volatile("fst.p     %0, (0*8), fp0\n\t"
                      "fst.p     %0, (1*8), fp2\n\t"
@@ -72,12 +54,11 @@ void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
                      "fgetscr   fr63\n\t"
                      "fst.s     %0, (32*8), fr63\n\t"
                 : /* no output */
-                : "r" (&tsk->thread.fpu.hard)
+                : "r" (&tsk->thread.xstate->hardfpu)
                 : "memory");
 }
 
-static inline void
-fpload(struct sh_fpu_hard_struct *fpregs)
+void restore_fpu(struct task_struct *tsk)
 {
         asm volatile("fld.p     %0, (0*8), fp0\n\t"
                      "fld.p     %0, (1*8), fp2\n\t"
@@ -116,16 +97,11 @@ fpload(struct sh_fpu_hard_struct *fpregs)
 
                      "fld.p     %0, (31*8), fp62\n\t"
                 : /* no output */
-                : "r" (fpregs) );
-}
-
-void fpinit(struct sh_fpu_hard_struct *fpregs)
-{
-        *fpregs = init_fpuregs.hard;
+                : "r" (&tsk->thread.xstate->hardfpu)
+                : "memory");
 }
 
-asmlinkage void
-do_fpu_error(unsigned long ex, struct pt_regs *regs)
+asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs)
 {
         struct task_struct *tsk = current;
 
@@ -133,35 +109,6 @@ do_fpu_error(unsigned long ex, struct pt_regs *regs)
 
         tsk->thread.trap_no = 11;
         tsk->thread.error_code = 0;
-        force_sig(SIGFPE, tsk);
-}
-
-
-asmlinkage void
-do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
-{
-        void die(const char *str, struct pt_regs *regs, long err);
-
-        if (! user_mode(regs))
-                die("FPU used in kernel", regs, ex);
 
-        regs->sr &= ~SR_FD;
-
-        if (last_task_used_math == current)
-                return;
-
-        enable_fpu();
-        if (last_task_used_math != NULL)
-                /* Other processes fpu state, save away */
-                save_fpu(last_task_used_math, regs);
-
-        last_task_used_math = current;
-        if (used_math()) {
-                fpload(&current->thread.fpu.hard);
-        } else {
-                /* First time FPU user.  */
-                fpload(&init_fpuregs.hard);
-                set_used_math();
-        }
-        disable_fpu();
+        force_sig(SIGFPE, tsk);
 }
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index 6a0f82f70032..e7a3c1e4b604 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -16,22 +16,18 @@
 #include <linux/sh_timer.h>
 #include <asm/addrspace.h>
 
-static struct plat_sci_port sci_platform_data[] = {
-        {
-                .mapbase        = PHYS_PERIPHERAL_BLOCK + 0x01030000,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
-                .type           = PORT_SCIF,
-                .irqs           = { 39, 40, 42, 0 },
-        }, {
-                .flags = 0,
-        }
+static struct plat_sci_port scif0_platform_data = {
+        .mapbase        = PHYS_PERIPHERAL_BLOCK + 0x01030000,
+        .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+        .type           = PORT_SCIF,
+        .irqs           = { 39, 40, 42, 0 },
 };
 
-static struct platform_device sci_device = {
+static struct platform_device scif0_device = {
         .name           = "sh-sci",
-        .id             = -1,
+        .id             = 0,
         .dev            = {
-                .platform_data  = sci_platform_data,
+                .platform_data  = &scif0_platform_data,
         },
 };
 
@@ -164,13 +160,13 @@ static struct platform_device tmu2_device = {
 };
 
 static struct platform_device *sh5_early_devices[] __initdata = {
+        &scif0_device,
         &tmu0_device,
         &tmu1_device,
         &tmu2_device,
 };
 
 static struct platform_device *sh5_devices[] __initdata = {
-        &sci_device,
         &rtc_device,
 };
 
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c
index 1c504bd972c3..83972aa319c2 100644
--- a/arch/sh/kernel/cpu/shmobile/cpuidle.c
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -87,25 +87,31 @@ void sh_mobile_setup_cpuidle(void)
 
         dev->safe_state = state;
 
-        state = &dev->states[i++];
-        snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
-        strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN);
-        state->exit_latency = 100;
-        state->target_residency = 1 * 2;
-        state->power_usage = 1;
-        state->flags = 0;
-        state->flags |= CPUIDLE_FLAG_TIME_VALID;
-        state->enter = cpuidle_sleep_enter;
+        if (sh_mobile_sleep_supported & SUSP_SH_SF) {
+                state = &dev->states[i++];
+                snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
+                strncpy(state->desc, "SuperH Sleep Mode [SF]",
+                        CPUIDLE_DESC_LEN);
+                state->exit_latency = 100;
+                state->target_residency = 1 * 2;
+                state->power_usage = 1;
+                state->flags = 0;
+                state->flags |= CPUIDLE_FLAG_TIME_VALID;
+                state->enter = cpuidle_sleep_enter;
+        }
 
-        state = &dev->states[i++];
-        snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
-        strncpy(state->desc, "SuperH Mobile Standby Mode [SF]", CPUIDLE_DESC_LEN);
-        state->exit_latency = 2300;
-        state->target_residency = 1 * 2;
-        state->power_usage = 1;
-        state->flags = 0;
-        state->flags |= CPUIDLE_FLAG_TIME_VALID;
-        state->enter = cpuidle_sleep_enter;
+        if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) {
+                state = &dev->states[i++];
+                snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
+                strncpy(state->desc, "SuperH Mobile Standby Mode [SF]",
+                        CPUIDLE_DESC_LEN);
+                state->exit_latency = 2300;
+                state->target_residency = 1 * 2;
+                state->power_usage = 1;
+                state->flags = 0;
+                state->flags |= CPUIDLE_FLAG_TIME_VALID;
+                state->enter = cpuidle_sleep_enter;
+        }
 
         dev->state_count = i;
 
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index ee3c2aaf66fb..e55968712706 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -15,6 +15,13 @@
 #include <linux/suspend.h>
 #include <asm/suspend.h>
 #include <asm/uaccess.h>
+#include <asm/cacheflush.h>
+
+/*
+ * Notifier lists for pre/post sleep notification
+ */
+ATOMIC_NOTIFIER_HEAD(sh_mobile_pre_sleep_notifier_list);
+ATOMIC_NOTIFIER_HEAD(sh_mobile_post_sleep_notifier_list);
 
 /*
  * Sleep modes available on SuperH Mobile:
@@ -26,30 +33,106 @@
 #define SUSP_MODE_SLEEP         (SUSP_SH_SLEEP)
 #define SUSP_MODE_SLEEP_SF      (SUSP_SH_SLEEP | SUSP_SH_SF)
 #define SUSP_MODE_STANDBY_SF    (SUSP_SH_STANDBY | SUSP_SH_SF)
+#define SUSP_MODE_RSTANDBY_SF \
+        (SUSP_SH_RSTANDBY | SUSP_SH_MMU | SUSP_SH_REGS | SUSP_SH_SF)
+ /*
+  * U-standby mode is unsupported since it needs bootloader hacks
+  */
 
-/*
- * The following modes are not there yet:
- *
- * R-standby mode is unsupported, but will be added in the future
- * U-standby mode is low priority since it needs bootloader hacks
- */
-
-#define ILRAM_BASE 0xe5200000
-
-extern const unsigned char sh_mobile_standby[];
-extern const unsigned int sh_mobile_standby_size;
+#ifdef CONFIG_CPU_SUBTYPE_SH7724
+#define RAM_BASE 0xfd800000 /* RSMEM */
+#else
+#define RAM_BASE 0xe5200000 /* ILRAM */
+#endif
 
 void sh_mobile_call_standby(unsigned long mode)
 {
-        void *onchip_mem = (void *)ILRAM_BASE;
-        void (*standby_onchip_mem)(unsigned long, unsigned long) = onchip_mem;
+        void *onchip_mem = (void *)RAM_BASE;
+        struct sh_sleep_data *sdp = onchip_mem;
+        void (*standby_onchip_mem)(unsigned long, unsigned long);
+
+        /* code located directly after data structure */
+        standby_onchip_mem = (void *)(sdp + 1);
+
+        atomic_notifier_call_chain(&sh_mobile_pre_sleep_notifier_list,
+                                   mode, NULL);
+
+        /* flush the caches if MMU flag is set */
+        if (mode & SUSP_SH_MMU)
+                flush_cache_all();
 
         /* Let assembly snippet in on-chip memory handle the rest */
-        standby_onchip_mem(mode, ILRAM_BASE);
+        standby_onchip_mem(mode, RAM_BASE);
+
+        atomic_notifier_call_chain(&sh_mobile_post_sleep_notifier_list,
+                                   mode, NULL);
+}
+
+extern char sh_mobile_sleep_enter_start;
+extern char sh_mobile_sleep_enter_end;
+
+extern char sh_mobile_sleep_resume_start;
+extern char sh_mobile_sleep_resume_end;
+
+unsigned long sh_mobile_sleep_supported = SUSP_SH_SLEEP;
+
+void sh_mobile_register_self_refresh(unsigned long flags,
+                                     void *pre_start, void *pre_end,
+                                     void *post_start, void *post_end)
+{
+        void *onchip_mem = (void *)RAM_BASE;
+        void *vp;
+        struct sh_sleep_data *sdp;
+        int n;
+
+        /* part 0: data area */
+        sdp = onchip_mem;
+        sdp->addr.stbcr = 0xa4150020; /* STBCR */
+        sdp->addr.bar = 0xa4150040; /* BAR */
+        sdp->addr.pteh = 0xff000000; /* PTEH */
+        sdp->addr.ptel = 0xff000004; /* PTEL */
+        sdp->addr.ttb = 0xff000008; /* TTB */
+        sdp->addr.tea = 0xff00000c; /* TEA */
+        sdp->addr.mmucr = 0xff000010; /* MMUCR */
+        sdp->addr.ptea = 0xff000034; /* PTEA */
+        sdp->addr.pascr = 0xff000070; /* PASCR */
+        sdp->addr.irmcr = 0xff000078; /* IRMCR */
+        sdp->addr.ccr = 0xff00001c; /* CCR */
+        sdp->addr.ramcr = 0xff000074; /* RAMCR */
+        vp = sdp + 1;
+
+        /* part 1: common code to enter sleep mode */
+        n = &sh_mobile_sleep_enter_end - &sh_mobile_sleep_enter_start;
+        memcpy(vp, &sh_mobile_sleep_enter_start, n);
+        vp += roundup(n, 4);
+
+        /* part 2: board specific code to enter self-refresh mode */
+        n = pre_end - pre_start;
+        memcpy(vp, pre_start, n);
+        sdp->sf_pre = (unsigned long)vp;
+        vp += roundup(n, 4);
+
+        /* part 3: board specific code to resume from self-refresh mode */
+        n = post_end - post_start;
+        memcpy(vp, post_start, n);
+        sdp->sf_post = (unsigned long)vp;
+        vp += roundup(n, 4);
+
+        /* part 4: common code to resume from sleep mode */
+        WARN_ON(vp > (onchip_mem + 0x600));
+        vp = onchip_mem + 0x600; /* located at interrupt vector */
+        n = &sh_mobile_sleep_resume_end - &sh_mobile_sleep_resume_start;
+        memcpy(vp, &sh_mobile_sleep_resume_start, n);
+        sdp->resume = (unsigned long)vp;
+
+        sh_mobile_sleep_supported |= flags;
 }
 
 static int sh_pm_enter(suspend_state_t state)
 {
+        if (!(sh_mobile_sleep_supported & SUSP_MODE_STANDBY_SF))
+                return -ENXIO;
+
         local_irq_disable();
         set_bl_bit();
         sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
@@ -65,13 +148,6 @@ static struct platform_suspend_ops sh_pm_ops = {
 
 static int __init sh_pm_init(void)
 {
-        void *onchip_mem = (void *)ILRAM_BASE;
-
-        /* Copy the assembly snippet to the otherwise ununsed ILRAM */
-        memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
-        wmb();
-        ctrl_barrier();
-
         suspend_set_ops(&sh_pm_ops);
         sh_mobile_setup_cpuidle();
         return 0;
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
index 7c615b17e209..6dcb8166a64d 100644
--- a/arch/sh/kernel/cpu/shmobile/pm_runtime.c
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -45,12 +45,14 @@ static int __platform_pm_runtime_resume(struct platform_device *pdev)
 
         dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
 
-        if (d->driver && d->driver->pm && d->driver->pm->runtime_resume) {
+        if (d->driver) {
                 hwblk_enable(hwblk_info, hwblk);
                 ret = 0;
 
                 if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
-                        ret = d->driver->pm->runtime_resume(d);
+                        if (d->driver->pm && d->driver->pm->runtime_resume)
+                                ret = d->driver->pm->runtime_resume(d);
+
                         if (!ret)
                                 clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
                         else
@@ -73,12 +75,15 @@ static int __platform_pm_runtime_suspend(struct platform_device *pdev)
 
         dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
 
-        if (d->driver && d->driver->pm && d->driver->pm->runtime_suspend) {
+        if (d->driver) {
                 BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
+                ret = 0;
 
-                hwblk_enable(hwblk_info, hwblk);
-                ret = d->driver->pm->runtime_suspend(d);
-                hwblk_disable(hwblk_info, hwblk);
+                if (d->driver->pm && d->driver->pm->runtime_suspend) {
+                        hwblk_enable(hwblk_info, hwblk);
+                        ret = d->driver->pm->runtime_suspend(d);
+                        hwblk_disable(hwblk_info, hwblk);
+                }
 
                 if (!ret) {
                         set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
index a439e6c7824f..e6aac65f5750 100644
--- a/arch/sh/kernel/cpu/shmobile/sleep.S
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -20,79 +20,143 @@
  * Kernel mode register usage, see entry.S:
  *      k0      scratch
  *      k1      scratch
- *      k4      scratch
  */
 #define k0      r0
 #define k1      r1
-#define k4      r4
 
-/* manage self-refresh and enter standby mode.
+/* manage self-refresh and enter standby mode. must be self-contained.
  * this code will be copied to on-chip memory and executed from there.
  */
+        .balign 4
+ENTRY(sh_mobile_sleep_enter_start)
 
-        .balign         4096,0,4096
-ENTRY(sh_mobile_standby)
+        /* save mode flags */
+        mov.l   r4, @(SH_SLEEP_MODE, r5)
 
         /* save original vbr */
-        stc     vbr, r1
-        mova    saved_vbr, r0
-        mov.l   r1, @r0
+        stc     vbr, r0
+        mov.l   r0, @(SH_SLEEP_VBR, r5)
 
         /* point vbr to our on-chip memory page */
         ldc     r5, vbr
 
         /* save return address */
-        mova    saved_spc, r0
-        sts     pr, r5
-        mov.l   r5, @r0
+        sts     pr, r0
+        mov.l   r0, @(SH_SLEEP_SPC, r5)
 
         /* save sr */
-        mova    saved_sr, r0
-        stc     sr, r5
-        mov.l   r5, @r0
+        stc     sr, r0
+        mov.l   r0, @(SH_SLEEP_SR, r5)
+
+        /* save general purpose registers to stack if needed */
+        mov.l   @(SH_SLEEP_MODE, r5), r0
+        tst     #SUSP_SH_REGS, r0
+        bt      skip_regs_save
+
+        sts.l   pr, @-r15
+        mov.l   r14, @-r15
+        mov.l   r13, @-r15
+        mov.l   r12, @-r15
+        mov.l   r11, @-r15
+        mov.l   r10, @-r15
+        mov.l   r9, @-r15
+        mov.l   r8, @-r15
+
+        /* make sure bank0 is selected, save low registers */
+        mov.l   rb_bit, r9
+        not     r9, r9
+        bsr     set_sr
+         mov    #0, r10
+
+        bsr     save_low_regs
+         nop
 
-        /* save mode flags */
-        mova    saved_mode, r0
-        mov.l   r4, @r0
+        /* switch to bank 1, save low registers */
+        mov.l   rb_bit, r10
+        bsr     set_sr
+         mov    #-1, r9
+
+        bsr     save_low_regs
+         nop
+
+        /* switch back to bank 0 */
+        mov.l   rb_bit, r9
+        not     r9, r9
+        bsr     set_sr
+         mov    #0, r10
+
+skip_regs_save:
+
+        /* save sp, also set to internal ram */
+        mov.l   r15, @(SH_SLEEP_SP, r5)
+        mov     r5, r15
+
+        /* save stbcr */
+        bsr     save_register
+         mov    #SH_SLEEP_REG_STBCR, r0
+
+        /* save mmu and cache context if needed */
+        mov.l   @(SH_SLEEP_MODE, r5), r0
+        tst     #SUSP_SH_MMU, r0
+        bt      skip_mmu_save_disable
+
+        /* save mmu state */
+        bsr     save_register
+         mov    #SH_SLEEP_REG_PTEH, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_PTEL, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_TTB, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_TEA, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_MMUCR, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_PTEA, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_PASCR, r0
 
-        /* put mode flags in r0 */
-        mov     r4, r0
+        bsr     save_register
+         mov    #SH_SLEEP_REG_IRMCR, r0
 
+        /* invalidate TLBs and disable the MMU */
+        bsr     get_register
+         mov    #SH_SLEEP_REG_MMUCR, r0
+        mov     #4, r1
+        mov.l   r1, @r0
+        icbi    @r0
+
+        /* save cache registers and disable caches */
+        bsr     save_register
+         mov    #SH_SLEEP_REG_CCR, r0
+
+        bsr     save_register
+         mov    #SH_SLEEP_REG_RAMCR, r0
+
+        bsr     get_register
+         mov    #SH_SLEEP_REG_CCR, r0
+        mov     #0, r1
+        mov.l   r1, @r0
+        icbi    @r0
+
+skip_mmu_save_disable:
+        /* call self-refresh entering code if needed */
+        mov.l   @(SH_SLEEP_MODE, r5), r0
         tst     #SUSP_SH_SF, r0
         bt      skip_set_sf
-#ifdef CONFIG_CPU_SUBTYPE_SH7724
-        /* DBSC: put memory in self-refresh mode */
-        mov.l   dben_reg, r4
-        mov.l   dben_data0, r1
-        mov.l   r1, @r4
-
-        mov.l   dbrfpdn0_reg, r4
-        mov.l   dbrfpdn0_data0, r1
-        mov.l   r1, @r4
-
-        mov.l   dbcmdcnt_reg, r4
-        mov.l   dbcmdcnt_data0, r1
-        mov.l   r1, @r4
-
-        mov.l   dbcmdcnt_reg, r4
-        mov.l   dbcmdcnt_data1, r1
-        mov.l   r1, @r4
-
-        mov.l   dbrfpdn0_reg, r4
-        mov.l   dbrfpdn0_data1, r1
-        mov.l   r1, @r4
-#else
-        /* SBSC: disable power down and put in self-refresh mode */
-        mov.l   1f, r4
-        mov.l   2f, r1
-        mov.l   @r4, r2
-        or      r1, r2
-        mov.l   3f, r3
-        and     r3, r2
-        mov.l   r2, @r4
-#endif
+
+        mov.l   @(SH_SLEEP_SF_PRE, r5), r0
+        jsr     @r0
+         nop
 
 skip_set_sf:
+        mov.l   @(SH_SLEEP_MODE, r5), r0
         tst     #SUSP_SH_STANDBY, r0
         bt      test_rstandby
 
@@ -104,6 +168,12 @@ test_rstandby:
         tst     #SUSP_SH_RSTANDBY, r0
         bt      test_ustandby
 
+        /* setup BAR register */
+        bsr     get_register
+         mov    #SH_SLEEP_REG_BAR, r0
+        mov.l   @(SH_SLEEP_RESUME, r5), r1
+        mov.l   r1, @r0
+
         /* set mode to "r-standby mode" */
         bra     do_sleep
          mov    #0x20, r1
@@ -123,124 +193,213 @@ force_sleep:
 
 do_sleep:
         /* setup and enter selected standby mode */
-        mov.l   5f, r4
-        mov.l   r1, @r4
+        bsr     get_register
+         mov    #SH_SLEEP_REG_STBCR, r0
+        mov.l   r1, @r0
 again:
         sleep
         bra     again
          nop
 
-restore_jump_vbr:
+save_register:
+        add     #SH_SLEEP_BASE_ADDR, r0
+        mov.l   @(r0, r5), r1
+        add     #-SH_SLEEP_BASE_ADDR, r0
+        mov.l   @r1, r1
+        add     #SH_SLEEP_BASE_DATA, r0
+        mov.l   r1, @(r0, r5)
+        add     #-SH_SLEEP_BASE_DATA, r0
+        rts
+         nop
+
+get_register:
+        add     #SH_SLEEP_BASE_ADDR, r0
+        mov.l   @(r0, r5), r0
+        rts
+         nop
+
+set_sr:
+        stc     sr, r8
+        and     r9, r8
+        or      r10, r8
+        ldc     r8, sr
+        rts
+         nop
+
+save_low_regs:
+        mov.l   r7, @-r15
+        mov.l   r6, @-r15
+        mov.l   r5, @-r15
+        mov.l   r4, @-r15
+        mov.l   r3, @-r15
+        mov.l   r2, @-r15
+        mov.l   r1, @-r15
+        rts
+         mov.l  r0, @-r15
+
+        .balign 4
+rb_bit: .long   0x20000000 ! RB=1
+
+ENTRY(sh_mobile_sleep_enter_end)
+
+        .balign 4
+ENTRY(sh_mobile_sleep_resume_start)
+
+        /* figure out start address */
+        bsr     0f
+         nop
+0:
+        sts     pr, k1
+        mov.l   1f, k0
+        and     k0, k1
+
+        /* store pointer to data area in VBR */
+        ldc     k1, vbr
+
+        /* setup sr with saved sr */
+        mov.l   @(SH_SLEEP_SR, k1), k0
+        ldc     k0, sr
+
+        /* now: user register set! */
+        stc     vbr, r5
+
         /* setup spc with return address to c code */
-        mov.l   saved_spc, k0
-        ldc     k0, spc
+        mov.l   @(SH_SLEEP_SPC, r5), r0
+        ldc     r0, spc
 
         /* restore vbr */
-        mov.l   saved_vbr, k0
-        ldc     k0, vbr
+        mov.l   @(SH_SLEEP_VBR, r5), r0
+        ldc     r0, vbr
 
         /* setup ssr with saved sr */
-        mov.l   saved_sr, k0
-        ldc     k0, ssr
+        mov.l   @(SH_SLEEP_SR, r5), r0
+        ldc     r0, ssr
 
-        /* get mode flags */
-        mov.l   saved_mode, k0
+        /* restore sp */
+        mov.l   @(SH_SLEEP_SP, r5), r15
 
-done_sleep:
-        /* reset standby mode to sleep mode */
-        mov.l   5f, k4
-        mov     #0x00, k1
-        mov.l   k1, @k4
+        /* restore sleep mode register */
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_STBCR, r0
 
-        tst     #SUSP_SH_SF, k0
+        /* call self-refresh resume code if needed */
+        mov.l   @(SH_SLEEP_MODE, r5), r0
+        tst     #SUSP_SH_SF, r0
         bt      skip_restore_sf
 
-#ifdef CONFIG_CPU_SUBTYPE_SH7724
-        /* DBSC: put memory in auto-refresh mode */
-        mov.l   dbrfpdn0_reg, k4
-        mov.l   dbrfpdn0_data0, k1
-        mov.l   k1, @k4
-
-        nop /* sleep 140 ns */
-        nop
-        nop
-        nop
-
-        mov.l   dbcmdcnt_reg, k4
-        mov.l   dbcmdcnt_data0, k1
-        mov.l   k1, @k4
-
-        mov.l   dbcmdcnt_reg, k4
-        mov.l   dbcmdcnt_data1, k1
-        mov.l   k1, @k4
-
-        mov.l   dben_reg, k4
-        mov.l   dben_data1, k1
-        mov.l   k1, @k4
-
-        mov.l   dbrfpdn0_reg, k4
-        mov.l   dbrfpdn0_data2, k1
-        mov.l   k1, @k4
-#else
-        /* SBSC: set auto-refresh mode */
-        mov.l   1f, k4
-        mov.l   @k4, k0
-        mov.l   4f, k1
-        and     k1, k0
-        mov.l   k0, @k4
-        mov.l   6f, k4
-        mov.l   8f, k0
-        mov.l   @k4, k1
-        mov     #-1, k4
-        add     k4, k1
-        or      k1, k0
-        mov.l   7f, k1
-        mov.l   k0, @k1
-#endif
+        mov.l   @(SH_SLEEP_SF_POST, r5), r0
+        jsr     @r0
+         nop
+
 skip_restore_sf:
-        /* jump to vbr vector */
-        mov.l   saved_vbr, k0
-        mov.l   offset_vbr, k4
-        add     k4, k0
-        jmp     @k0
+        /* restore mmu and cache state if needed */
+        mov.l   @(SH_SLEEP_MODE, r5), r0
+        tst     #SUSP_SH_MMU, r0
+        bt      skip_restore_mmu
+
+        /* restore mmu state */
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_PTEH, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_PTEL, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_TTB, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_TEA, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_PTEA, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_PASCR, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_IRMCR, r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_MMUCR, r0
+        icbi    @r0
+
+        /* restore cache settings */
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_RAMCR, r0
+        icbi    @r0
+
+        bsr     restore_register
+         mov    #SH_SLEEP_REG_CCR, r0
+        icbi    @r0
+
+skip_restore_mmu:
+
+        /* restore general purpose registers if needed */
+        mov.l   @(SH_SLEEP_MODE, r5), r0
+        tst     #SUSP_SH_REGS, r0
+        bt      skip_restore_regs
+
+        /* switch to bank 1, restore low registers */
+        mov.l   _rb_bit, r10
+        bsr     _set_sr
+         mov    #-1, r9
+
+        bsr     restore_low_regs
          nop
 
-        .balign 4
-saved_mode:     .long   0
-saved_spc:      .long   0
-saved_sr:       .long   0
-saved_vbr:      .long   0
-offset_vbr:     .long   0x600
-#ifdef CONFIG_CPU_SUBTYPE_SH7724
-dben_reg:       .long   0xfd000010 /* DBEN */
-dben_data0:     .long   0
-dben_data1:     .long   1
-dbrfpdn0_reg:   .long   0xfd000040 /* DBRFPDN0 */
-dbrfpdn0_data0: .long   0
-dbrfpdn0_data1: .long   1
-dbrfpdn0_data2: .long   0x00010000
-dbcmdcnt_reg:   .long   0xfd000014 /* DBCMDCNT */
-dbcmdcnt_data0: .long   2
-dbcmdcnt_data1: .long   4
-#else
-1:      .long   0xfe400008 /* SDCR0 */
-2:      .long   0x00000400
-3:      .long   0xffff7fff
-4:      .long   0xfffffbff
-#endif
-5:      .long   0xa4150020 /* STBCR */
-6:      .long   0xfe40001c /* RTCOR */
-7:      .long   0xfe400018 /* RTCNT */
-8:      .long   0xa55a0000
-
-
-/* interrupt vector @ 0x600 */
-        .balign         0x400,0,0x400
-        .long   0xdeadbeef
-        .balign         0x200,0,0x200
-        bra     restore_jump_vbr
+        /* switch to bank0, restore low registers */
+        mov.l   _rb_bit, r9
+        not     r9, r9
+        bsr     _set_sr
+         mov    #0, r10
+
+        bsr     restore_low_regs
          nop
-sh_mobile_standby_end:
 
-ENTRY(sh_mobile_standby_size)
-        .long sh_mobile_standby_end - sh_mobile_standby
+        /* restore the rest of the registers */
+        mov.l   @r15+, r8
+        mov.l   @r15+, r9
+        mov.l   @r15+, r10
+        mov.l   @r15+, r11
+        mov.l   @r15+, r12
+        mov.l   @r15+, r13
+        mov.l   @r15+, r14
+        lds.l   @r15+, pr
+
+skip_restore_regs:
+        rte
+         nop
+
+restore_register:
+        add     #SH_SLEEP_BASE_DATA, r0
+        mov.l   @(r0, r5), r1
+        add     #-SH_SLEEP_BASE_DATA, r0
+        add     #SH_SLEEP_BASE_ADDR, r0
+        mov.l   @(r0, r5), r0
+        mov.l   r1, @r0
+        rts
+         nop
+
+_set_sr:
+        stc     sr, r8
+        and     r9, r8
+        or      r10, r8
+        ldc     r8, sr
+        rts
+         nop
+
+restore_low_regs:
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        rts
+         mov.l  @r15+, r7
+
+        .balign 4
+_rb_bit:        .long   0x20000000 ! RB=1
+1:      .long   ~0x7ff
+ENTRY(sh_mobile_sleep_resume_end)
diff --git a/arch/sh/kernel/cpu/ubc.S b/arch/sh/kernel/cpu/ubc.S
deleted file mode 100644
index 81923079fa12..000000000000
--- a/arch/sh/kernel/cpu/ubc.S
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * arch/sh/kernel/cpu/ubc.S
- *
- * Set of management routines for the User Break Controller (UBC)
- *
- * Copyright (C) 2002 Paul Mundt
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/linkage.h>
-#include <asm/ubc.h>
-
-#define STBCR2          0xffc00010
-
-ENTRY(ubc_sleep)
-        mov     #0, r0
-
-        mov.l   1f, r1          ! Zero out UBC_BBRA ..
-        mov.w   r0, @r1
-
-        mov.l   2f, r1          ! .. same for BBRB ..
-        mov.w   r0, @r1
-
-        mov.l   3f, r1          ! .. and again for BRCR.
-        mov.w   r0, @r1
-
-        mov.w   @r1, r0         ! Dummy read BRCR
-
-        mov.l   4f, r1          ! Set MSTP5 in STBCR2
-        mov.b   @r1, r0
-        or      #0x01, r0
-        mov.b   r0, @r1
-
-        mov.b   @r1, r0         ! Two dummy reads ..
-        mov.b   @r1, r0
-
-        rts
-        nop
-
-ENTRY(ubc_wakeup)
-        mov.l   4f, r1          ! Clear MSTP5
-        mov.b   @r1, r0
-        and     #0xfe, r0
-        mov.b   r0, @r1
-
-        mov.b   @r1, r0         ! Two more dummy reads ..
-        mov.b   @r1, r0
-
-        rts
-        nop
-
-1:      .long   UBC_BBRA
-2:      .long   UBC_BBRB
-3:      .long   UBC_BRCR
-4:      .long   STBCR2
-
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index dce4f3ff0932..0fffacea6ed9 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -48,7 +48,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
                 return -ENODEV;
 
         cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
+        set_cpus_allowed_ptr(current, cpumask_of(cpu));
 
         BUG_ON(smp_processor_id() != cpu);
 
@@ -66,7 +66,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
         freqs.flags     = 0;
 
         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        set_cpus_allowed(current, cpus_allowed);
+        set_cpus_allowed_ptr(current, &cpus_allowed);
         clk_set_rate(cpuclk, freq);
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
diff --git a/arch/sh/kernel/debugtraps.S b/arch/sh/kernel/debugtraps.S
index 591741383ee6..7a1b46fec0f4 100644
--- a/arch/sh/kernel/debugtraps.S
+++ b/arch/sh/kernel/debugtraps.S
@@ -13,7 +13,6 @@
 #include <linux/linkage.h>
 
 #if !defined(CONFIG_KGDB)
-#define breakpoint_trap_handler         debug_trap_handler
 #define singlestep_trap_handler         debug_trap_handler
 #endif
 
diff --git a/arch/sh/kernel/dma-nommu.c b/arch/sh/kernel/dma-nommu.c
new file mode 100644
index 000000000000..3c55b87f8b63
--- /dev/null
+++ b/arch/sh/kernel/dma-nommu.c
@@ -0,0 +1,82 @@
+/*
+ * DMA mapping support for platforms lacking IOMMUs.
+ *
+ * Copyright (C) 2009  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/dma-mapping.h>
+#include <linux/io.h>
+
+static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
+                                 unsigned long offset, size_t size,
+                                 enum dma_data_direction dir,
+                                 struct dma_attrs *attrs)
+{
+        dma_addr_t addr = page_to_phys(page) + offset;
+
+        WARN_ON(size == 0);
+        dma_cache_sync(dev, page_address(page) + offset, size, dir);
+
+        return addr;
+}
+
+static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
+                        int nents, enum dma_data_direction dir,
+                        struct dma_attrs *attrs)
+{
+        struct scatterlist *s;
+        int i;
+
+        WARN_ON(nents == 0 || sg[0].length == 0);
+
+        for_each_sg(sg, s, nents, i) {
+                BUG_ON(!sg_page(s));
+
+                dma_cache_sync(dev, sg_virt(s), s->length, dir);
+
+                s->dma_address = sg_phys(s);
+                s->dma_length = s->length;
+        }
+
+        return nents;
+}
+
+#ifdef CONFIG_DMA_NONCOHERENT
+static void nommu_sync_single(struct device *dev, dma_addr_t addr,
+                              size_t size, enum dma_data_direction dir)
+{
+        dma_cache_sync(dev, phys_to_virt(addr), size, dir);
+}
+
+static void nommu_sync_sg(struct device *dev, struct scatterlist *sg,
+                          int nelems, enum dma_data_direction dir)
+{
+        struct scatterlist *s;
+        int i;
+
+        for_each_sg(sg, s, nelems, i)
+                dma_cache_sync(dev, sg_virt(s), s->length, dir);
+}
+#endif
+
+struct dma_map_ops nommu_dma_ops = {
+        .alloc_coherent         = dma_generic_alloc_coherent,
+        .free_coherent          = dma_generic_free_coherent,
+        .map_page               = nommu_map_page,
+        .map_sg                 = nommu_map_sg,
+#ifdef CONFIG_DMA_NONCOHERENT
+        .sync_single_for_device = nommu_sync_single,
+        .sync_sg_for_device     = nommu_sync_sg,
+#endif
+        .is_phys                = 1,
+};
+
+void __init no_iommu_init(void)
+{
+        if (dma_ops)
+                return;
+        dma_ops = &nommu_dma_ops;
+}
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index d76a23170dbb..a8234b2010d1 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -20,7 +20,9 @@
 #include <linux/list.h>
 #include <linux/mempool.h>
 #include <linux/mm.h>
+#include <linux/elf.h>
 #include <linux/ftrace.h>
+#include <linux/slab.h>
 #include <asm/dwarf.h>
 #include <asm/unwinder.h>
 #include <asm/sections.h>
@@ -38,10 +40,10 @@ static mempool_t *dwarf_frame_pool;
 static struct kmem_cache *dwarf_reg_cachep;
 static mempool_t *dwarf_reg_pool;
 
-static LIST_HEAD(dwarf_cie_list);
+static struct rb_root cie_root;
 static DEFINE_SPINLOCK(dwarf_cie_lock);
 
-static LIST_HEAD(dwarf_fde_list);
+static struct rb_root fde_root;
 static DEFINE_SPINLOCK(dwarf_fde_lock);
 
 static struct dwarf_cie *cached_cie;
@@ -300,7 +302,8 @@ static inline int dwarf_entry_len(char *addr, unsigned long *len)
  */
 static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
 {
-        struct dwarf_cie *cie;
+        struct rb_node **rb_node = &cie_root.rb_node;
+        struct dwarf_cie *cie = NULL;
         unsigned long flags;
 
         spin_lock_irqsave(&dwarf_cie_lock, flags);
@@ -314,16 +317,24 @@ static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
                 goto out;
         }
 
-        list_for_each_entry(cie, &dwarf_cie_list, link) {
-                if (cie->cie_pointer == cie_ptr) {
-                        cached_cie = cie;
-                        break;
+        while (*rb_node) {
+                struct dwarf_cie *cie_tmp;
+
+                cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
+                BUG_ON(!cie_tmp);
+
+                if (cie_ptr == cie_tmp->cie_pointer) {
+                        cie = cie_tmp;
+                        cached_cie = cie_tmp;
+                        goto out;
+                } else {
+                        if (cie_ptr < cie_tmp->cie_pointer)
+                                rb_node = &(*rb_node)->rb_left;
+                        else
+                                rb_node = &(*rb_node)->rb_right;
                 }
         }
 
-        /* Couldn't find the entry in the list. */
-        if (&cie->link == &dwarf_cie_list)
-                cie = NULL;
 out:
         spin_unlock_irqrestore(&dwarf_cie_lock, flags);
         return cie;
@@ -335,25 +346,34 @@ out:
  */
 struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
 {
-        struct dwarf_fde *fde;
+        struct rb_node **rb_node = &fde_root.rb_node;
+        struct dwarf_fde *fde = NULL;
         unsigned long flags;
 
         spin_lock_irqsave(&dwarf_fde_lock, flags);
 
-        list_for_each_entry(fde, &dwarf_fde_list, link) {
-                unsigned long start, end;
+        while (*rb_node) {
+                struct dwarf_fde *fde_tmp;
+                unsigned long tmp_start, tmp_end;
 
-                start = fde->initial_location;
-                end = fde->initial_location + fde->address_range;
+                fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
+                BUG_ON(!fde_tmp);
 
-                if (pc >= start && pc < end)
-                        break;
-        }
+                tmp_start = fde_tmp->initial_location;
+                tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
 
-        /* Couldn't find the entry in the list. */
-        if (&fde->link == &dwarf_fde_list)
-                fde = NULL;
+                if (pc < tmp_start) {
+                        rb_node = &(*rb_node)->rb_left;
+                } else {
+                        if (pc < tmp_end) {
+                                fde = fde_tmp;
+                                goto out;
+                        } else
+                                rb_node = &(*rb_node)->rb_right;
+                }
+        }
 
+out:
         spin_unlock_irqrestore(&dwarf_fde_lock, flags);
 
         return fde;
@@ -530,7 +550,20 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
 }
 
 /**
- *      dwarf_unwind_stack - recursively unwind the stack
+ *      dwarf_free_frame - free the memory allocated for @frame
+ *      @frame: the frame to free
+ */
+void dwarf_free_frame(struct dwarf_frame *frame)
+{
+        dwarf_frame_free_regs(frame);
+        mempool_free(frame, dwarf_frame_pool);
+}
+
+extern void ret_from_irq(void);
+
+/**
+ *      dwarf_unwind_stack - unwind the stack
+ *
  *      @pc: address of the function to unwind
  *      @prev: struct dwarf_frame of the previous stackframe on the callstack
  *
@@ -538,8 +571,8 @@ static int dwarf_cfa_execute_insns(unsigned char *insn_start,
  *      on the callstack. Each of the lower (older) stack frames are
  *      linked via the "prev" member.
  */
-struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
-                                        struct dwarf_frame *prev)
+struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
+                                       struct dwarf_frame *prev)
 {
         struct dwarf_frame *frame;
         struct dwarf_cie *cie;
@@ -548,9 +581,9 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
         unsigned long addr;
 
         /*
-         * If this is the first invocation of this recursive function we
-         * need get the contents of a physical register to get the CFA
-         * in order to begin the virtual unwinding of the stack.
+         * If we're starting at the top of the stack we need get the
+         * contents of a physical register to get the CFA in order to
+         * begin the virtual unwinding of the stack.
          *
          * NOTE: the return address is guaranteed to be setup by the
          * time this function makes its first function call.
@@ -593,9 +626,8 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
         fde = dwarf_lookup_fde(pc);
         if (!fde) {
                 /*
-                 * This is our normal exit path - the one that stops the
-                 * recursion. There's two reasons why we might exit
-                 * here,
+                 * This is our normal exit path. There are two reasons
+                 * why we might exit here,
                  *
                  *      a) pc has no asscociated DWARF frame info and so
                  *      we don't know how to unwind this frame. This is
@@ -637,10 +669,10 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
 
                 } else {
                         /*
-                         * Again, this is the first invocation of this
-                         * recurisve function. We need to physically
-                         * read the contents of a register in order to
-                         * get the Canonical Frame Address for this
+                         * Again, we're starting from the top of the
+                         * stack. We need to physically read
+                         * the contents of a register in order to get
+                         * the Canonical Frame Address for this
                          * function.
                          */
                         frame->cfa = dwarf_read_arch_reg(frame->cfa_register);
@@ -667,17 +699,36 @@ struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
         addr = frame->cfa + reg->addr;
         frame->return_addr = __raw_readl(addr);
 
+        /*
+         * Ah, the joys of unwinding through interrupts.
+         *
+         * Interrupts are tricky - the DWARF info needs to be _really_
+         * accurate and unfortunately I'm seeing a lot of bogus DWARF
+         * info. For example, I've seen interrupts occur in epilogues
+         * just after the frame pointer (r14) had been restored. The
+         * problem was that the DWARF info claimed that the CFA could be
+         * reached by using the value of the frame pointer before it was
+         * restored.
+         *
+         * So until the compiler can be trusted to produce reliable
+         * DWARF info when it really matters, let's stop unwinding once
+         * we've calculated the function that was interrupted.
+         */
+        if (prev && prev->pc == (unsigned long)ret_from_irq)
+                frame->return_addr = 0;
+
         return frame;
 
 bail:
-        dwarf_frame_free_regs(frame);
-        mempool_free(frame, dwarf_frame_pool);
+        dwarf_free_frame(frame);
         return NULL;
 }
 
 static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
-                           unsigned char *end)
+                           unsigned char *end, struct module *mod)
 {
+        struct rb_node **rb_node = &cie_root.rb_node;
+        struct rb_node *parent = *rb_node;
         struct dwarf_cie *cie;
         unsigned long flags;
         int count;
@@ -774,7 +825,28 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
 
         /* Add to list */
         spin_lock_irqsave(&dwarf_cie_lock, flags);
-        list_add_tail(&cie->link, &dwarf_cie_list);
+
+        while (*rb_node) {
+                struct dwarf_cie *cie_tmp;
+
+                cie_tmp = rb_entry(*rb_node, struct dwarf_cie, node);
+
+                parent = *rb_node;
+
+                if (cie->cie_pointer < cie_tmp->cie_pointer)
+                        rb_node = &parent->rb_left;
+                else if (cie->cie_pointer >= cie_tmp->cie_pointer)
+                        rb_node = &parent->rb_right;
+                else
+                        WARN_ON(1);
+        }
+
+        rb_link_node(&cie->node, parent, rb_node);
+        rb_insert_color(&cie->node, &cie_root);
+
+        if (mod != NULL)
+                list_add_tail(&cie->link, &mod->arch.cie_list);
+
         spin_unlock_irqrestore(&dwarf_cie_lock, flags);
 
         return 0;
@@ -782,8 +854,10 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
 
 static int dwarf_parse_fde(void *entry, u32 entry_type,
                            void *start, unsigned long len,
-                           unsigned char *end)
+                           unsigned char *end, struct module *mod)
 {
+        struct rb_node **rb_node = &fde_root.rb_node;
+        struct rb_node *parent = *rb_node;
         struct dwarf_fde *fde;
         struct dwarf_cie *cie;
         unsigned long flags;
@@ -833,7 +907,36 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
 
         /* Add to list. */
         spin_lock_irqsave(&dwarf_fde_lock, flags);
-        list_add_tail(&fde->link, &dwarf_fde_list);
+
+        while (*rb_node) {
+                struct dwarf_fde *fde_tmp;
+                unsigned long tmp_start, tmp_end;
+                unsigned long start, end;
+
+                fde_tmp = rb_entry(*rb_node, struct dwarf_fde, node);
+
+                start = fde->initial_location;
+                end = fde->initial_location + fde->address_range;
+
+                tmp_start = fde_tmp->initial_location;
+                tmp_end = fde_tmp->initial_location + fde_tmp->address_range;
+
+                parent = *rb_node;
+
+                if (start < tmp_start)
+                        rb_node = &parent->rb_left;
+                else if (start >= tmp_end)
+                        rb_node = &parent->rb_right;
+                else
+                        WARN_ON(1);
+        }
+
+        rb_link_node(&fde->node, parent, rb_node);
+        rb_insert_color(&fde->node, &fde_root);
+
+        if (mod != NULL)
+                list_add_tail(&fde->link, &mod->arch.fde_list);
+
         spin_unlock_irqrestore(&dwarf_fde_lock, flags);
 
         return 0;
@@ -854,10 +957,8 @@ static void dwarf_unwinder_dump(struct task_struct *task,
         while (1) {
                 frame = dwarf_unwind_stack(return_addr, _frame);
 
-                if (_frame) {
-                        dwarf_frame_free_regs(_frame);
-                        mempool_free(_frame, dwarf_frame_pool);
-                }
+                if (_frame)
+                        dwarf_free_frame(_frame);
 
                 _frame = frame;
 
@@ -867,6 +968,9 @@ static void dwarf_unwinder_dump(struct task_struct *task,
                 return_addr = frame->return_addr;
                 ops->address(data, return_addr, 1);
         }
+
+        if (frame)
+                dwarf_free_frame(frame);
 }
 
 static struct unwinder dwarf_unwinder = {
@@ -877,67 +981,57 @@ static struct unwinder dwarf_unwinder = {
 
 static void dwarf_unwinder_cleanup(void)
 {
-        struct dwarf_cie *cie;
-        struct dwarf_fde *fde;
+        struct rb_node **fde_rb_node = &fde_root.rb_node;
+        struct rb_node **cie_rb_node = &cie_root.rb_node;
 
         /*
          * Deallocate all the memory allocated for the DWARF unwinder.
          * Traverse all the FDE/CIE lists and remove and free all the
          * memory associated with those data structures.
          */
-        list_for_each_entry(cie, &dwarf_cie_list, link)
-                kfree(cie);
+        while (*fde_rb_node) {
+                struct dwarf_fde *fde;
 
-        list_for_each_entry(fde, &dwarf_fde_list, link)
+                fde = rb_entry(*fde_rb_node, struct dwarf_fde, node);
+                rb_erase(*fde_rb_node, &fde_root);
                 kfree(fde);
+        }
+
+        while (*cie_rb_node) {
+                struct dwarf_cie *cie;
+
+                cie = rb_entry(*cie_rb_node, struct dwarf_cie, node);
+                rb_erase(*cie_rb_node, &cie_root);
+                kfree(cie);
+        }
 
         kmem_cache_destroy(dwarf_reg_cachep);
         kmem_cache_destroy(dwarf_frame_cachep);
 }
 
 /**
- *      dwarf_unwinder_init - initialise the dwarf unwinder
+ *      dwarf_parse_section - parse DWARF section
+ *      @eh_frame_start: start address of the .eh_frame section
+ *      @eh_frame_end: end address of the .eh_frame section
+ *      @mod: the kernel module containing the .eh_frame section
  *
- *      Build the data structures describing the .dwarf_frame section to
- *      make it easier to lookup CIE and FDE entries. Because the
- *      .eh_frame section is packed as tightly as possible it is not
- *      easy to lookup the FDE for a given PC, so we build a list of FDE
- *      and CIE entries that make it easier.
+ *      Parse the information in a .eh_frame section.
  */
-static int __init dwarf_unwinder_init(void)
+static int dwarf_parse_section(char *eh_frame_start, char *eh_frame_end,
+                               struct module *mod)
 {
         u32 entry_type;
         void *p, *entry;
         int count, err = 0;
-        unsigned long len;
+        unsigned long len = 0;
         unsigned int c_entries, f_entries;
         unsigned char *end;
-        INIT_LIST_HEAD(&dwarf_cie_list);
-        INIT_LIST_HEAD(&dwarf_fde_list);
 
         c_entries = 0;
         f_entries = 0;
-        entry = &__start_eh_frame;
-
-        dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
-                        sizeof(struct dwarf_frame), 0,
-                        SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
-
-        dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
-                        sizeof(struct dwarf_reg), 0,
-                        SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
+        entry = eh_frame_start;
 
-        dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
-                                          mempool_alloc_slab,
-                                          mempool_free_slab,
-                                          dwarf_frame_cachep);
-
-        dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
-                                         mempool_alloc_slab,
-                                         mempool_free_slab,
-                                         dwarf_reg_cachep);
-
-        while ((char *)entry < __stop_eh_frame) {
+        while ((char *)entry < eh_frame_end) {
                 p = entry;
 
                 count = dwarf_entry_len(p, &len);
@@ -949,6 +1043,7 @@ static int __init dwarf_unwinder_init(void)
                          * entry and move to the next one because 'len'
                          * tells us where our next entry is.
                          */
+                        err = -EINVAL;
                         goto out;
                 } else
                         p += count;
@@ -960,13 +1055,14 @@ static int __init dwarf_unwinder_init(void)
                 p += 4;
 
                 if (entry_type == DW_EH_FRAME_CIE) {
-                        err = dwarf_parse_cie(entry, p, len, end);
+                        err = dwarf_parse_cie(entry, p, len, end, mod);
                         if (err < 0)
                                 goto out;
                         else
                                 c_entries++;
                 } else {
-                        err = dwarf_parse_fde(entry, entry_type, p, len, end);
+                        err = dwarf_parse_fde(entry, entry_type, p, len,
+                                              end, mod);
                         if (err < 0)
                                 goto out;
                         else
@@ -979,6 +1075,117 @@ static int __init dwarf_unwinder_init(void)
         printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n",
                c_entries, f_entries);
 
+        return 0;
+
+out:
+        return err;
+}
+
+#ifdef CONFIG_MODULES
+int module_dwarf_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
+                          struct module *me)
+{
+        unsigned int i, err;
+        unsigned long start, end;
+        char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
+
+        start = end = 0;
+
+        for (i = 1; i < hdr->e_shnum; i++) {
+                /* Alloc bit cleared means "ignore it." */
+                if ((sechdrs[i].sh_flags & SHF_ALLOC)
+                    && !strcmp(secstrings+sechdrs[i].sh_name, ".eh_frame")) {
+                        start = sechdrs[i].sh_addr;
+                        end = start + sechdrs[i].sh_size;
+                        break;
+                }
+        }
+
+        /* Did we find the .eh_frame section? */
+        if (i != hdr->e_shnum) {
+                INIT_LIST_HEAD(&me->arch.cie_list);
+                INIT_LIST_HEAD(&me->arch.fde_list);
+                err = dwarf_parse_section((char *)start, (char *)end, me);
+                if (err) {
+                        printk(KERN_WARNING "%s: failed to parse DWARF info\n",
+                               me->name);
+                        return err;
+                }
+        }
+
+        return 0;
+}
+
+/**
+ *      module_dwarf_cleanup - remove FDE/CIEs associated with @mod
+ *      @mod: the module that is being unloaded
+ *
+ *      Remove any FDEs and CIEs from the global lists that came from
+ *      @mod's .eh_frame section because @mod is being unloaded.
+ */
+void module_dwarf_cleanup(struct module *mod)
+{
+        struct dwarf_fde *fde, *ftmp;
+        struct dwarf_cie *cie, *ctmp;
+        unsigned long flags;
+
+        spin_lock_irqsave(&dwarf_cie_lock, flags);
+
+        list_for_each_entry_safe(cie, ctmp, &mod->arch.cie_list, link) {
+                list_del(&cie->link);
+                rb_erase(&cie->node, &cie_root);
+                kfree(cie);
+        }
+
+        spin_unlock_irqrestore(&dwarf_cie_lock, flags);
+
+        spin_lock_irqsave(&dwarf_fde_lock, flags);
+
+        list_for_each_entry_safe(fde, ftmp, &mod->arch.fde_list, link) {
+                list_del(&fde->link);
+                rb_erase(&fde->node, &fde_root);
+                kfree(fde);
+        }
+
+        spin_unlock_irqrestore(&dwarf_fde_lock, flags);
+}
+#endif /* CONFIG_MODULES */
+
+/**
+ *      dwarf_unwinder_init - initialise the dwarf unwinder
+ *
+ *      Build the data structures describing the .dwarf_frame section to
+ *      make it easier to lookup CIE and FDE entries. Because the
+ *      .eh_frame section is packed as tightly as possible it is not
+ *      easy to lookup the FDE for a given PC, so we build a list of FDE
+ *      and CIE entries that make it easier.
+ */
+static int __init dwarf_unwinder_init(void)
+{
+        int err;
+
+        dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
+                        sizeof(struct dwarf_frame), 0,
+                        SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
+
+        dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
+                        sizeof(struct dwarf_reg), 0,
+                        SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
+
+        dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
+                                          mempool_alloc_slab,
+                                          mempool_free_slab,
+                                          dwarf_frame_cachep);
+
+        dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
+                                         mempool_alloc_slab,
+                                         mempool_free_slab,
+                                         dwarf_reg_cachep);
+
+        err = dwarf_parse_section(__start_eh_frame, __stop_eh_frame, NULL);
+        if (err)
+                goto out;
+
         err = unwinder_register(&dwarf_unwinder);
         if (err)
                 goto out;
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
deleted file mode 100644
index 81a46145ffa5..000000000000
--- a/arch/sh/kernel/early_printk.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*
- * arch/sh/kernel/early_printk.c
- *
- *  Copyright (C) 1999, 2000  Niibe Yutaka
- *  Copyright (C) 2002  M. R. Brown
- *  Copyright (C) 2004 - 2007  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/console.h>
-#include <linux/tty.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-
-#ifdef CONFIG_SH_STANDARD_BIOS
-#include <asm/sh_bios.h>
-
-/*
- *      Print a string through the BIOS
- */
-static void sh_console_write(struct console *co, const char *s,
-                                 unsigned count)
-{
-        sh_bios_console_write(s, count);
-}
-
-/*
- *      Setup initial baud/bits/parity. We do two things here:
- *      - construct a cflag setting for the first rs_open()
- *      - initialize the serial port
- *      Return non-zero if we didn't find a serial port.
- */
-static int __init sh_console_setup(struct console *co, char *options)
-{
-        int     cflag = CREAD | HUPCL | CLOCAL;
-
-        /*
-         *      Now construct a cflag setting.
-         *      TODO: this is a totally bogus cflag, as we have
-         *      no idea what serial settings the BIOS is using, or
-         *      even if its using the serial port at all.
-         */
-        cflag |= B115200 | CS8 | /*no parity*/0;
-
-        co->cflag = cflag;
-
-        return 0;
-}
-
-static struct console bios_console = {
-        .name           = "bios",
-        .write          = sh_console_write,
-        .setup          = sh_console_setup,
-        .flags          = CON_PRINTBUFFER,
-        .index          = -1,
-};
-#endif
-
-#ifdef CONFIG_EARLY_SCIF_CONSOLE
-#include <linux/serial_core.h>
-#include "../../../drivers/serial/sh-sci.h"
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define EPK_SCSMR_VALUE 0x000
-#define EPK_SCBRR_VALUE 0x00C
-#define EPK_FIFO_SIZE 64
-#define EPK_FIFO_BITS (0x7f00 >> 8)
-#else
-#define EPK_FIFO_SIZE 16
-#define EPK_FIFO_BITS (0x1f00 >> 8)
-#endif
-
-static struct uart_port scif_port = {
-        .type           = PORT_SCIF,
-        .mapbase        = CONFIG_EARLY_SCIF_CONSOLE_PORT,
-        .membase        = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
-};
-
-static void scif_sercon_putc(int c)
-{
-        while (((sci_in(&scif_port, SCFDR) & EPK_FIFO_BITS) >= EPK_FIFO_SIZE))
-                ;
-
-        sci_in(&scif_port, SCxSR);
-        sci_out(&scif_port, SCxSR, 0xf3 & ~(0x20 | 0x40));
-        sci_out(&scif_port, SCxTDR, c);
-
-        while ((sci_in(&scif_port, SCxSR) & 0x40) == 0)
-                ;
-
-        if (c == '\n')
-                scif_sercon_putc('\r');
-}
-
-static void scif_sercon_write(struct console *con, const char *s,
-                              unsigned count)
-{
-        while (count-- > 0)
-                scif_sercon_putc(*s++);
-}
-
-static int __init scif_sercon_setup(struct console *con, char *options)
-{
-        con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8;
-
-        return 0;
-}
-
-static struct console scif_console = {
-        .name           = "sercon",
-        .write          = scif_sercon_write,
-        .setup          = scif_sercon_setup,
-        .flags          = CON_PRINTBUFFER,
-        .index          = -1,
-};
-
-#if !defined(CONFIG_SH_STANDARD_BIOS)
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-static void scif_sercon_init(char *s)
-{
-        sci_out(&scif_port, SCSCR, 0x0000);     /* clear TE and RE */
-        sci_out(&scif_port, SCFCR, 0x4006);     /* reset */
-        sci_out(&scif_port, SCSCR, 0x0000);     /* select internal clock */
-        sci_out(&scif_port, SCSMR, EPK_SCSMR_VALUE);
-        sci_out(&scif_port, SCBRR, EPK_SCBRR_VALUE);
-
-        mdelay(1);      /* wait 1-bit time */
-
-        sci_out(&scif_port, SCFCR, 0x0030);     /* TTRG=b'11 */
-        sci_out(&scif_port, SCSCR, 0x0030);     /* TE, RE */
-}
-#elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
-#define DEFAULT_BAUD 115200
-/*
- * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
- * devices that aren't using sh-ipl+g.
- */
-static void scif_sercon_init(char *s)
-{
-        struct uart_port *port = &scif_port;
-        unsigned baud = DEFAULT_BAUD;
-        unsigned int status;
-        char *e;
-
-        if (*s == ',')
-                ++s;
-
-        if (*s) {
-                /* ignore ioport/device name */
-                s += strcspn(s, ",");
-                if (*s == ',')
-                        s++;
-        }
-
-        if (*s) {
-                baud = simple_strtoul(s, &e, 0);
-                if (baud == 0 || s == e)
-                        baud = DEFAULT_BAUD;
-        }
-
-        do {
-                status = sci_in(port, SCxSR);
-        } while (!(status & SCxSR_TEND(port)));
-
-        sci_out(port, SCSCR, 0);         /* TE=0, RE=0 */
-        sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
-        sci_out(port, SCSMR, 0);
-
-        /* Set baud rate */
-        sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
-                (32 * baud) - 1);
-        udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
-
-        sci_out(port, SCSPTR, 0);
-        sci_out(port, SCxSR, 0x60);
-        sci_out(port, SCLSR, 0);
-
-        sci_out(port, SCFCR, 0);
-        sci_out(port, SCSCR, 0x30);      /* TE=1, RE=1 */
-}
-#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
-#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
-#endif /* CONFIG_EARLY_SCIF_CONSOLE */
-
-/*
- * Setup a default console, if more than one is compiled in, rely on the
- * earlyprintk= parsing to give priority.
- */
-static struct console *early_console =
-#ifdef CONFIG_SH_STANDARD_BIOS
-        &bios_console
-#elif defined(CONFIG_EARLY_SCIF_CONSOLE)
-        &scif_console
-#else
-        NULL
-#endif
-        ;
-
-static int __init setup_early_printk(char *buf)
-{
-        int keep_early = 0;
-
-        if (!buf)
-                return 0;
-
-        if (strstr(buf, "keep"))
-                keep_early = 1;
-
-#ifdef CONFIG_SH_STANDARD_BIOS
-        if (!strncmp(buf, "bios", 4))
-                early_console = &bios_console;
-#endif
-#if defined(CONFIG_EARLY_SCIF_CONSOLE)
-        if (!strncmp(buf, "serial", 6)) {
-                early_console = &scif_console;
-
-#if !defined(CONFIG_SH_STANDARD_BIOS)
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
-                scif_sercon_init(buf + 6);
-#endif
-#endif
-        }
-#endif
-
-        if (likely(early_console)) {
-                if (keep_early)
-                        early_console->flags &= ~CON_BOOT;
-                else
-                        early_console->flags |= CON_BOOT;
-                register_console(early_console);
-        }
-
-        return 0;
-}
-early_param("earlyprintk", setup_early_printk);
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 3eb84931d2aa..2b15ae60c3a0 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -70,8 +70,14 @@ ret_from_exception:
         CFI_STARTPROC simple
         CFI_DEF_CFA r14, 0
         CFI_REL_OFFSET 17, 64
-        CFI_REL_OFFSET 15, 0
+        CFI_REL_OFFSET 15, 60
         CFI_REL_OFFSET 14, 56
+        CFI_REL_OFFSET 13, 52
+        CFI_REL_OFFSET 12, 48
+        CFI_REL_OFFSET 11, 44
+        CFI_REL_OFFSET 10, 40
+        CFI_REL_OFFSET 9, 36
+        CFI_REL_OFFSET 8, 32
         preempt_stop()
 ENTRY(ret_from_irq)
         !
@@ -133,7 +139,7 @@ work_pending:
         ! r8: current_thread_info
         ! t:  result of "tst    #_TIF_NEED_RESCHED, r0"
         bf/s    work_resched
-         tst    #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0
+         tst    #_TIF_SIGPENDING, r0
 work_notifysig:
         bt/s    __restore_all
          mov    r15, r4
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 2c48e267256e..30e13196d35b 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -62,6 +62,150 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
         return ftrace_replaced_code;
 }
 
+/*
+ * Modifying code must take extra care. On an SMP machine, if
+ * the code being modified is also being executed on another CPU
+ * that CPU will have undefined results and possibly take a GPF.
+ * We use kstop_machine to stop other CPUS from exectuing code.
+ * But this does not stop NMIs from happening. We still need
+ * to protect against that. We separate out the modification of
+ * the code to take care of this.
+ *
+ * Two buffers are added: An IP buffer and a "code" buffer.
+ *
+ * 1) Put the instruction pointer into the IP buffer
+ *    and the new code into the "code" buffer.
+ * 2) Wait for any running NMIs to finish and set a flag that says
+ *    we are modifying code, it is done in an atomic operation.
+ * 3) Write the code
+ * 4) clear the flag.
+ * 5) Wait for any running NMIs to finish.
+ *
+ * If an NMI is executed, the first thing it does is to call
+ * "ftrace_nmi_enter". This will check if the flag is set to write
+ * and if it is, it will write what is in the IP and "code" buffers.
+ *
+ * The trick is, it does not matter if everyone is writing the same
+ * content to the code location. Also, if a CPU is executing code
+ * it is OK to write to that code location if the contents being written
+ * are the same as what exists.
+ */
+#define MOD_CODE_WRITE_FLAG (1 << 31)   /* set when NMI should do the write */
+static atomic_t nmi_running = ATOMIC_INIT(0);
+static int mod_code_status;             /* holds return value of text write */
+static void *mod_code_ip;               /* holds the IP to write to */
+static void *mod_code_newcode;          /* holds the text to write to the IP */
+
+static unsigned nmi_wait_count;
+static atomic_t nmi_update_count = ATOMIC_INIT(0);
+
+int ftrace_arch_read_dyn_info(char *buf, int size)
+{
+        int r;
+
+        r = snprintf(buf, size, "%u %u",
+                     nmi_wait_count,
+                     atomic_read(&nmi_update_count));
+        return r;
+}
+
+static void clear_mod_flag(void)
+{
+        int old = atomic_read(&nmi_running);
+
+        for (;;) {
+                int new = old & ~MOD_CODE_WRITE_FLAG;
+
+                if (old == new)
+                        break;
+
+                old = atomic_cmpxchg(&nmi_running, old, new);
+        }
+}
+
+static void ftrace_mod_code(void)
+{
+        /*
+         * Yes, more than one CPU process can be writing to mod_code_status.
+         *    (and the code itself)
+         * But if one were to fail, then they all should, and if one were
+         * to succeed, then they all should.
+         */
+        mod_code_status = probe_kernel_write(mod_code_ip, mod_code_newcode,
+                                             MCOUNT_INSN_SIZE);
+
+        /* if we fail, then kill any new writers */
+        if (mod_code_status)
+                clear_mod_flag();
+}
+
+void ftrace_nmi_enter(void)
+{
+        if (atomic_inc_return(&nmi_running) & MOD_CODE_WRITE_FLAG) {
+                smp_rmb();
+                ftrace_mod_code();
+                atomic_inc(&nmi_update_count);
+        }
+        /* Must have previous changes seen before executions */
+        smp_mb();
+}
+
+void ftrace_nmi_exit(void)
+{
+        /* Finish all executions before clearing nmi_running */
+        smp_mb();
+        atomic_dec(&nmi_running);
+}
+
+static void wait_for_nmi_and_set_mod_flag(void)
+{
+        if (!atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG))
+                return;
+
+        do {
+                cpu_relax();
+        } while (atomic_cmpxchg(&nmi_running, 0, MOD_CODE_WRITE_FLAG));
+
+        nmi_wait_count++;
+}
+
+static void wait_for_nmi(void)
+{
+        if (!atomic_read(&nmi_running))
+                return;
+
+        do {
+                cpu_relax();
+        } while (atomic_read(&nmi_running));
+
+        nmi_wait_count++;
+}
+
+static int
+do_ftrace_mod_code(unsigned long ip, void *new_code)
+{
+        mod_code_ip = (void *)ip;
+        mod_code_newcode = new_code;
+
+        /* The buffers need to be visible before we let NMIs write them */
+        smp_mb();
+
+        wait_for_nmi_and_set_mod_flag();
+
+        /* Make sure all running NMIs have finished before we write the code */
+        smp_mb();
+
+        ftrace_mod_code();
+
+        /* Make sure the write happens before clearing the bit */
+        smp_mb();
+
+        clear_mod_flag();
+        wait_for_nmi();
+
+        return mod_code_status;
+}
+
 static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
                        unsigned char *new_code)
 {
@@ -86,7 +230,7 @@ static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
                 return -EINVAL;
 
         /* replace the text with the new text */
-        if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
+        if (do_ftrace_mod_code(ip, new_code))
                 return -EPERM;
 
         flush_icache_range(ip, ip + MCOUNT_INSN_SIZE);
@@ -255,84 +399,3 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
         }
 }
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
-
-#ifdef CONFIG_FTRACE_SYSCALLS
-
-extern unsigned long __start_syscalls_metadata[];
-extern unsigned long __stop_syscalls_metadata[];
-extern unsigned long *sys_call_table;
-
-static struct syscall_metadata **syscalls_metadata;
-
-static struct syscall_metadata *find_syscall_meta(unsigned long *syscall)
-{
-        struct syscall_metadata *start;
-        struct syscall_metadata *stop;
-        char str[KSYM_SYMBOL_LEN];
-
-
-        start = (struct syscall_metadata *)__start_syscalls_metadata;
-        stop = (struct syscall_metadata *)__stop_syscalls_metadata;
-        kallsyms_lookup((unsigned long) syscall, NULL, NULL, NULL, str);
-
-        for ( ; start < stop; start++) {
-                if (start->name && !strcmp(start->name, str))
-                        return start;
-        }
-
-        return NULL;
-}
-
-struct syscall_metadata *syscall_nr_to_meta(int nr)
-{
-        if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0)
-                return NULL;
-
-        return syscalls_metadata[nr];
-}
-
-int syscall_name_to_nr(char *name)
-{
-        int i;
-
-        if (!syscalls_metadata)
-                return -1;
-        for (i = 0; i < NR_syscalls; i++)
-                if (syscalls_metadata[i])
-                        if (!strcmp(syscalls_metadata[i]->name, name))
-                                return i;
-        return -1;
-}
-
-void set_syscall_enter_id(int num, int id)
-{
-        syscalls_metadata[num]->enter_id = id;
-}
-
-void set_syscall_exit_id(int num, int id)
-{
-        syscalls_metadata[num]->exit_id = id;
-}
-
-static int __init arch_init_ftrace_syscalls(void)
-{
-        int i;
-        struct syscall_metadata *meta;
-        unsigned long **psys_syscall_table = &sys_call_table;
-
-        syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) *
-                                        FTRACE_SYSCALL_MAX, GFP_KERNEL);
-        if (!syscalls_metadata) {
-                WARN_ON(1);
-                return -ENOMEM;
-        }
-
-        for (i = 0; i < FTRACE_SYSCALL_MAX; i++) {
-                meta = find_syscall_meta(psys_syscall_table[i]);
-                syscalls_metadata[i] = meta;
-        }
-
-        return 0;
-}
-arch_initcall(arch_init_ftrace_syscalls);
-#endif /* CONFIG_FTRACE_SYSCALLS */
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
deleted file mode 100644
index d22e5af699f9..000000000000
--- a/arch/sh/kernel/gpio.c
+++ /dev/null
@@ -1,584 +0,0 @@
-/*
- * Pinmuxed GPIO support for SuperH.
- *
- * Copyright (C) 2008 Magnus Damm
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/module.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/bitops.h>
-#include <linux/gpio.h>
-
-static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
-{
-        if (enum_id < r->begin)
-                return 0;
-
-        if (enum_id > r->end)
-                return 0;
-
-        return 1;
-}
-
-static unsigned long gpio_read_raw_reg(unsigned long reg,
-                                       unsigned long reg_width)
-{
-        switch (reg_width) {
-        case 8:
-                return ctrl_inb(reg);
-        case 16:
-                return ctrl_inw(reg);
-        case 32:
-                return ctrl_inl(reg);
-        }
-
-        BUG();
-        return 0;
-}
-
-static void gpio_write_raw_reg(unsigned long reg,
-                               unsigned long reg_width,
-                               unsigned long data)
-{
-        switch (reg_width) {
-        case 8:
-                ctrl_outb(data, reg);
-                return;
-        case 16:
-                ctrl_outw(data, reg);
-                return;
-        case 32:
-                ctrl_outl(data, reg);
-                return;
-        }
-
-        BUG();
-}
-
-static void gpio_write_bit(struct pinmux_data_reg *dr,
-                           unsigned long in_pos, unsigned long value)
-{
-        unsigned long pos;
-
-        pos = dr->reg_width - (in_pos + 1);
-
-#ifdef DEBUG
-        pr_info("write_bit addr = %lx, value = %ld, pos = %ld, "
-                "r_width = %ld\n",
-                dr->reg, !!value, pos, dr->reg_width);
-#endif
-
-        if (value)
-                set_bit(pos, &dr->reg_shadow);
-        else
-                clear_bit(pos, &dr->reg_shadow);
-
-        gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
-}
-
-static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
-                         unsigned long field_width, unsigned long in_pos)
-{
-        unsigned long data, mask, pos;
-
-        data = 0;
-        mask = (1 << field_width) - 1;
-        pos = reg_width - ((in_pos + 1) * field_width);
-
-#ifdef DEBUG
-        pr_info("read_reg: addr = %lx, pos = %ld, "
-                "r_width = %ld, f_width = %ld\n",
-                reg, pos, reg_width, field_width);
-#endif
-
-        data = gpio_read_raw_reg(reg, reg_width);
-        return (data >> pos) & mask;
-}
-
-static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
-                           unsigned long field_width, unsigned long in_pos,
-                           unsigned long value)
-{
-        unsigned long mask, pos;
-
-        mask = (1 << field_width) - 1;
-        pos = reg_width - ((in_pos + 1) * field_width);
-
-#ifdef DEBUG
-        pr_info("write_reg addr = %lx, value = %ld, pos = %ld, "
-                "r_width = %ld, f_width = %ld\n",
-                reg, value, pos, reg_width, field_width);
-#endif
-
-        mask = ~(mask << pos);
-        value = value << pos;
-
-        switch (reg_width) {
-        case 8:
-                ctrl_outb((ctrl_inb(reg) & mask) | value, reg);
-                break;
-        case 16:
-                ctrl_outw((ctrl_inw(reg) & mask) | value, reg);
-                break;
-        case 32:
-                ctrl_outl((ctrl_inl(reg) & mask) | value, reg);
-                break;
-        }
-}
-
-static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
-{
-        struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
-        struct pinmux_data_reg *data_reg;
-        int k, n;
-
-        if (!enum_in_range(gpiop->enum_id, &gpioc->data))
-                return -1;
-
-        k = 0;
-        while (1) {
-                data_reg = gpioc->data_regs + k;
-
-                if (!data_reg->reg_width)
-                        break;
-
-                for (n = 0; n < data_reg->reg_width; n++) {
-                        if (data_reg->enum_ids[n] == gpiop->enum_id) {
-                                gpiop->flags &= ~PINMUX_FLAG_DREG;
-                                gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
-                                gpiop->flags &= ~PINMUX_FLAG_DBIT;
-                                gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
-                                return 0;
-                        }
-                }
-                k++;
-        }
-
-        BUG();
-
-        return -1;
-}
-
-static void setup_data_regs(struct pinmux_info *gpioc)
-{
-        struct pinmux_data_reg *drp;
-        int k;
-
-        for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
-                setup_data_reg(gpioc, k);
-
-        k = 0;
-        while (1) {
-                drp = gpioc->data_regs + k;
-
-                if (!drp->reg_width)
-                        break;
-
-                drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
-                k++;
-        }
-}
-
-static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
-                        struct pinmux_data_reg **drp, int *bitp)
-{
-        struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
-        int k, n;
-
-        if (!enum_in_range(gpiop->enum_id, &gpioc->data))
-                return -1;
-
-        k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
-        n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
-        *drp = gpioc->data_regs + k;
-        *bitp = n;
-        return 0;
-}
-
-static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
-                          struct pinmux_cfg_reg **crp, int *indexp,
-                          unsigned long **cntp)
-{
-        struct pinmux_cfg_reg *config_reg;
-        unsigned long r_width, f_width;
-        int k, n;
-
-        k = 0;
-        while (1) {
-                config_reg = gpioc->cfg_regs + k;
-
-                r_width = config_reg->reg_width;
-                f_width = config_reg->field_width;
-
-                if (!r_width)
-                        break;
-                for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
-                        if (config_reg->enum_ids[n] == enum_id) {
-                                *crp = config_reg;
-                                *indexp = n;
-                                *cntp = &config_reg->cnt[n / (1 << f_width)];
-                                return 0;
-                        }
-                }
-                k++;
-        }
-
-        return -1;
-}
-
-static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
-                            int pos, pinmux_enum_t *enum_idp)
-{
-        pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
-        pinmux_enum_t *data = gpioc->gpio_data;
-        int k;
-
-        if (!enum_in_range(enum_id, &gpioc->data)) {
-                if (!enum_in_range(enum_id, &gpioc->mark)) {
-                        pr_err("non data/mark enum_id for gpio %d\n", gpio);
-                        return -1;
-                }
-        }
-
-        if (pos) {
-                *enum_idp = data[pos + 1];
-                return pos + 1;
-        }
-
-        for (k = 0; k < gpioc->gpio_data_size; k++) {
-                if (data[k] == enum_id) {
-                        *enum_idp = data[k + 1];
-                        return k + 1;
-                }
-        }
-
-        pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
-        return -1;
-}
-
-static void write_config_reg(struct pinmux_info *gpioc,
-                             struct pinmux_cfg_reg *crp,
-                             int index)
-{
-        unsigned long ncomb, pos, value;
-
-        ncomb = 1 << crp->field_width;
-        pos = index / ncomb;
-        value = index % ncomb;
-
-        gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
-}
-
-static int check_config_reg(struct pinmux_info *gpioc,
-                            struct pinmux_cfg_reg *crp,
-                            int index)
-{
-        unsigned long ncomb, pos, value;
-
-        ncomb = 1 << crp->field_width;
-        pos = index / ncomb;
-        value = index % ncomb;
-
-        if (gpio_read_reg(crp->reg, crp->reg_width,
-                          crp->field_width, pos) == value)
-                return 0;
-
-        return -1;
-}
-
-enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
-
-static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
-                              int pinmux_type, int cfg_mode)
-{
-        struct pinmux_cfg_reg *cr = NULL;
-        pinmux_enum_t enum_id;
-        struct pinmux_range *range;
-        int in_range, pos, index;
-        unsigned long *cntp;
-
-        switch (pinmux_type) {
-
-        case PINMUX_TYPE_FUNCTION:
-                range = NULL;
-                break;
-
-        case PINMUX_TYPE_OUTPUT:
-                range = &gpioc->output;
-                break;
-
-        case PINMUX_TYPE_INPUT:
-                range = &gpioc->input;
-                break;
-
-        case PINMUX_TYPE_INPUT_PULLUP:
-                range = &gpioc->input_pu;
-                break;
-
-        case PINMUX_TYPE_INPUT_PULLDOWN:
-                range = &gpioc->input_pd;
-                break;
-
-        default:
-                goto out_err;
-        }
-
-        pos = 0;
-        enum_id = 0;
-        index = 0;
-        while (1) {
-                pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
-                if (pos <= 0)
-                        goto out_err;
-
-                if (!enum_id)
-                        break;
-
-                in_range = enum_in_range(enum_id, &gpioc->function);
-                if (!in_range && range) {
-                        in_range = enum_in_range(enum_id, range);
-
-                        if (in_range && enum_id == range->force)
-                                continue;
-                }
-
-                if (!in_range)
-                        continue;
-
-                if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
-                        goto out_err;
-
-                switch (cfg_mode) {
-                case GPIO_CFG_DRYRUN:
-                        if (!*cntp || !check_config_reg(gpioc, cr, index))
-                                continue;
-                        break;
-
-                case GPIO_CFG_REQ:
-                        write_config_reg(gpioc, cr, index);
-                        *cntp = *cntp + 1;
-                        break;
-
-                case GPIO_CFG_FREE:
-                        *cntp = *cntp - 1;
-                        break;
-                }
-        }
-
-        return 0;
- out_err:
-        return -1;
-}
-
-static DEFINE_SPINLOCK(gpio_lock);
-
-static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
-{
-        return container_of(chip, struct pinmux_info, chip);
-}
-
-static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
-{
-        struct pinmux_info *gpioc = chip_to_pinmux(chip);
-        struct pinmux_data_reg *dummy;
-        unsigned long flags;
-        int i, ret, pinmux_type;
-
-        ret = -EINVAL;
-
-        if (!gpioc)
-                goto err_out;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
-                goto err_unlock;
-
-        /* setup pin function here if no data is associated with pin */
-
-        if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
-                pinmux_type = PINMUX_TYPE_FUNCTION;
-        else
-                pinmux_type = PINMUX_TYPE_GPIO;
-
-        if (pinmux_type == PINMUX_TYPE_FUNCTION) {
-                if (pinmux_config_gpio(gpioc, offset,
-                                       pinmux_type,
-                                       GPIO_CFG_DRYRUN) != 0)
-                        goto err_unlock;
-
-                if (pinmux_config_gpio(gpioc, offset,
-                                       pinmux_type,
-                                       GPIO_CFG_REQ) != 0)
-                        BUG();
-        }
-
-        gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
-        gpioc->gpios[offset].flags |= pinmux_type;
-
-        ret = 0;
- err_unlock:
-        spin_unlock_irqrestore(&gpio_lock, flags);
- err_out:
-        return ret;
-}
-
-static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
-{
-        struct pinmux_info *gpioc = chip_to_pinmux(chip);
-        unsigned long flags;
-        int pinmux_type;
-
-        if (!gpioc)
-                return;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-
-        pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
-        pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
-        gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
-        gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
-
-        spin_unlock_irqrestore(&gpio_lock, flags);
-}
-
-static int pinmux_direction(struct pinmux_info *gpioc,
-                            unsigned gpio, int new_pinmux_type)
-{
-        int pinmux_type;
-        int ret = -EINVAL;
-
-        if (!gpioc)
-                goto err_out;
-
-        pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
-
-        switch (pinmux_type) {
-        case PINMUX_TYPE_GPIO:
-                break;
-        case PINMUX_TYPE_OUTPUT:
-        case PINMUX_TYPE_INPUT:
-        case PINMUX_TYPE_INPUT_PULLUP:
-        case PINMUX_TYPE_INPUT_PULLDOWN:
-                pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
-                break;
-        default:
-                goto err_out;
-        }
-
-        if (pinmux_config_gpio(gpioc, gpio,
-                               new_pinmux_type,
-                               GPIO_CFG_DRYRUN) != 0)
-                goto err_out;
-
-        if (pinmux_config_gpio(gpioc, gpio,
-                               new_pinmux_type,
-                               GPIO_CFG_REQ) != 0)
-                BUG();
-
-        gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
-        gpioc->gpios[gpio].flags |= new_pinmux_type;
-
-        ret = 0;
- err_out:
-        return ret;
-}
-
-static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
-        struct pinmux_info *gpioc = chip_to_pinmux(chip);
-        unsigned long flags;
-        int ret;
-
-        spin_lock_irqsave(&gpio_lock, flags);
-        ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return ret;
-}
-
-static void sh_gpio_set_value(struct pinmux_info *gpioc,
-                             unsigned gpio, int value)
-{
-        struct pinmux_data_reg *dr = NULL;
-        int bit = 0;
-
-        if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
-                BUG();
-        else
-                gpio_write_bit(dr, bit, value);
-}
-
-static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
-                                    int value)
-{
-        struct pinmux_info *gpioc = chip_to_pinmux(chip);
-        unsigned long flags;
-        int ret;
-
-        sh_gpio_set_value(gpioc, offset, value);
-        spin_lock_irqsave(&gpio_lock, flags);
-        ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
-        spin_unlock_irqrestore(&gpio_lock, flags);
-
-        return ret;
-}
-
-static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
-{
-        struct pinmux_data_reg *dr = NULL;
-        int bit = 0;
-
-        if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
-                BUG();
-                return 0;
-        }
-
-        return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
-}
-
-static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
-        return sh_gpio_get_value(chip_to_pinmux(chip), offset);
-}
-
-static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
-        sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
-}
-
-int register_pinmux(struct pinmux_info *pip)
-{
-        struct gpio_chip *chip = &pip->chip;
-
-        pr_info("sh pinmux: %s handling gpio %d -> %d\n",
-                pip->name, pip->first_gpio, pip->last_gpio);
-
-        setup_data_regs(pip);
-
-        chip->request = sh_gpio_request;
-        chip->free = sh_gpio_free;
-        chip->direction_input = sh_gpio_direction_input;
-        chip->get = sh_gpio_get;
-        chip->direction_output = sh_gpio_direction_output;
-        chip->set = sh_gpio_set;
-
-        WARN_ON(pip->first_gpio != 0); /* needs testing */
-
-        chip->label = pip->name;
-        chip->owner = THIS_MODULE;
-        chip->base = pip->first_gpio;
-        chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
-
-        return gpiochip_add(chip);
-}
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index a78be74b8d3e..fe0b743881b0 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -3,6 +3,7 @@
  *  arch/sh/kernel/head.S
  *
  *  Copyright (C) 1999, 2000  Niibe Yutaka & Kaz Kojima
+ *  Copyright (C) 2010  Matt Fleming
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -13,6 +14,8 @@
 #include <linux/init.h>
 #include <linux/linkage.h>
 #include <asm/thread_info.h>
+#include <asm/mmu.h>
+#include <cpu/mmu_context.h>
 
 #ifdef CONFIG_CPU_SH4A
 #define SYNCO()         synco
@@ -82,6 +85,209 @@ ENTRY(_stext)
         ldc     r0, r7_bank     ! ... and initial thread_info
 #endif
 
+#ifdef CONFIG_PMB
+/*
+ * Reconfigure the initial PMB mappings setup by the hardware.
+ *
+ * When we boot in 32-bit MMU mode there are 2 PMB entries already
+ * setup for us.
+ *
+ * Entry       VPN         PPN      V   SZ      C       UB      WT
+ * ---------------------------------------------------------------
+ *   0      0x80000000 0x00000000   1  512MB    1       0       1
+ *   1      0xA0000000 0x00000000   1  512MB    0       0       0
+ *
+ * But we reprogram them here because we want complete control over
+ * our address space and the initial mappings may not map PAGE_OFFSET
+ * to __MEMORY_START (or even map all of our RAM).
+ *
+ * Once we've setup cached and uncached mappings we clear the rest of the
+ * PMB entries. This clearing also deals with the fact that PMB entries
+ * can persist across reboots. The PMB could have been left in any state
+ * when the reboot occurred, so to be safe we clear all entries and start
+ * with with a clean slate.
+ *
+ * The uncached mapping is constructed using the smallest possible
+ * mapping with a single unbufferable page. Only the kernel text needs to
+ * be covered via the uncached mapping so that certain functions can be
+ * run uncached.
+ *
+ * Drivers and the like that have previously abused the 1:1 identity
+ * mapping are unsupported in 32-bit mode and must specify their caching
+ * preference when page tables are constructed.
+ *
+ * This frees up the P2 space for more nefarious purposes.
+ *
+ * Register utilization is as follows:
+ *
+ *      r0 = PMB_DATA data field
+ *      r1 = PMB_DATA address field
+ *      r2 = PMB_ADDR data field
+ *      r3 = PMB_ADDR address field
+ *      r4 = PMB_E_SHIFT
+ *      r5 = remaining amount of RAM to map
+ *      r6 = PMB mapping size we're trying to use
+ *      r7 = cached_to_uncached
+ *      r8 = scratch register
+ *      r9 = scratch register
+ *      r10 = number of PMB entries we've setup
+ */
+
+        mov.l   .LMMUCR, r1     /* Flush the TLB */
+        mov.l   @r1, r0
+        or      #MMUCR_TI, r0
+        mov.l   r0, @r1
+
+        mov.l   .LMEMORY_SIZE, r5
+
+        mov     #PMB_E_SHIFT, r0
+        mov     #0x1, r4
+        shld    r0, r4
+
+        mov.l   .LFIRST_DATA_ENTRY, r0
+        mov.l   .LPMB_DATA, r1
+        mov.l   .LFIRST_ADDR_ENTRY, r2
+        mov.l   .LPMB_ADDR, r3
+
+        /*
+         * First we need to walk the PMB and figure out if there are any
+         * existing mappings that match the initial mappings VPN/PPN.
+         * If these have already been established by the bootloader, we
+         * don't bother setting up new entries here, and let the late PMB
+         * initialization take care of things instead.
+         *
+         * Note that we may need to coalesce and merge entries in order
+         * to reclaim more available PMB slots, which is much more than
+         * we want to do at this early stage.
+         */
+        mov     #0, r10
+        mov     #NR_PMB_ENTRIES, r9
+
+        mov     r1, r7          /* temporary PMB_DATA iter */
+
+.Lvalidate_existing_mappings:
+
+        mov.l   @r7, r8
+        and     r0, r8
+        cmp/eq  r0, r8          /* Check for valid __MEMORY_START mappings */
+        bt      .Lpmb_done
+
+        add     #1, r10         /* Increment the loop counter */
+        cmp/eq  r9, r10
+        bf/s    .Lvalidate_existing_mappings
+         add    r4, r7          /* Increment to the next PMB_DATA entry */
+
+        /*
+         * If we've fallen through, continue with setting up the initial
+         * mappings.
+         */
+
+        mov     r5, r7          /* cached_to_uncached */
+        mov     #0, r10
+
+#ifdef CONFIG_UNCACHED_MAPPING
+        /*
+         * Uncached mapping
+         */
+        mov     #(PMB_SZ_16M >> 2), r9
+        shll2   r9
+
+        mov     #(PMB_UB >> 8), r8
+        shll8   r8
+
+        or      r0, r8
+        or      r9, r8
+        mov.l   r8, @r1
+        mov     r2, r8
+        add     r7, r8
+        mov.l   r8, @r3
+
+        add     r4, r1
+        add     r4, r3
+        add     #1, r10
+#endif
+
+/*
+ * Iterate over all of the available sizes from largest to
+ * smallest for constructing the cached mapping.
+ */
+#define __PMB_ITER_BY_SIZE(size)                        \
+.L##size:                                               \
+        mov     #(size >> 4), r6;                       \
+        shll16  r6;                                     \
+        shll8   r6;                                     \
+                                                        \
+        cmp/hi  r5, r6;                                 \
+        bt      9999f;                                  \
+                                                        \
+        mov     #(PMB_SZ_##size##M >> 2), r9;           \
+        shll2   r9;                                     \
+                                                        \
+        /*                                              \
+         * Cached mapping                               \
+         */                                             \
+        mov     #PMB_C, r8;                             \
+        or      r0, r8;                                 \
+        or      r9, r8;                                 \
+        mov.l   r8, @r1;                                \
+        mov.l   r2, @r3;                                \
+                                                        \
+        /* Increment to the next PMB_DATA entry */      \
+        add     r4, r1;                                 \
+        /* Increment to the next PMB_ADDR entry */      \
+        add     r4, r3;                                 \
+        /* Increment number of PMB entries */           \
+        add     #1, r10;                                \
+                                                        \
+        sub     r6, r5;                                 \
+        add     r6, r0;                                 \
+        add     r6, r2;                                 \
+                                                        \
+        bra     .L##size;                               \
+9999:
+
+        __PMB_ITER_BY_SIZE(512)
+        __PMB_ITER_BY_SIZE(128)
+        __PMB_ITER_BY_SIZE(64)
+        __PMB_ITER_BY_SIZE(16)
+
+#ifdef CONFIG_UNCACHED_MAPPING
+        /*
+         * Now that we can access it, update cached_to_uncached and
+         * uncached_size.
+         */
+        mov.l   .Lcached_to_uncached, r0
+        mov.l   r7, @r0
+
+        mov.l   .Luncached_size, r0
+        mov     #1, r7
+        shll16  r7
+        shll8   r7
+        mov.l   r7, @r0
+#endif
+
+        /*
+         * Clear the remaining PMB entries.
+         *
+         * r3 = entry to begin clearing from
+         * r10 = number of entries we've setup so far
+         */
+        mov     #0, r1
+        mov     #NR_PMB_ENTRIES, r0
+
+.Lagain:
+        mov.l   r1, @r3         /* Clear PMB_ADDR entry */
+        add     #1, r10         /* Increment the loop counter */
+        cmp/eq  r0, r10
+        bf/s    .Lagain
+         add    r4, r3          /* Increment to the next PMB_ADDR entry */
+
+        mov.l   6f, r0
+        icbi    @r0
+
+.Lpmb_done:
+#endif /* CONFIG_PMB */
+
 #ifndef CONFIG_SH_NO_BSS_INIT
         /*
          * Don't clear BSS if running on slow platforms such as an RTL simulation,
@@ -131,3 +337,16 @@ ENTRY(stack_start)
 5:      .long   start_kernel
 6:      .long   sh_cpu_init
 7:      .long   init_thread_union
+
+#ifdef CONFIG_PMB
+.LPMB_ADDR:             .long   PMB_ADDR
+.LPMB_DATA:             .long   PMB_DATA
+.LFIRST_ADDR_ENTRY:     .long   PAGE_OFFSET | PMB_V
+.LFIRST_DATA_ENTRY:     .long   __MEMORY_START | PMB_V
+.LMMUCR:                .long   MMUCR
+.LMEMORY_SIZE:          .long   __MEMORY_SIZE
+#ifdef CONFIG_UNCACHED_MAPPING
+.Lcached_to_uncached:   .long   cached_to_uncached
+.Luncached_size:        .long   uncached_size
+#endif
+#endif
diff --git a/arch/sh/kernel/head_64.S b/arch/sh/kernel/head_64.S
index 3ea765844c74..defd851abefa 100644
--- a/arch/sh/kernel/head_64.S
+++ b/arch/sh/kernel/head_64.S
@@ -220,7 +220,6 @@ clear_DTLB:
         add.l   r22, r63, r22           /* Sign extend */
         putcfg  r21, 0, r22             /* Set MMUDR[0].PTEH */
 
-#ifdef CONFIG_EARLY_PRINTK
         /*
          * Setup a DTLB translation for SCIF phys.
          */
@@ -231,7 +230,6 @@ clear_DTLB:
         movi    0xfa03, r22     /* 0xfa030000, fixed SCIF virt */
         shori   0x0003, r22
         putcfg  r21, 0, r22     /* PTEH last */
-#endif
 
         /*
          * Set cache behaviours.
diff --git a/arch/sh/kernel/hw_breakpoint.c b/arch/sh/kernel/hw_breakpoint.c
new file mode 100644
index 000000000000..675eea7785d9
--- /dev/null
+++ b/arch/sh/kernel/hw_breakpoint.c
@@ -0,0 +1,445 @@
+/*
+ * arch/sh/kernel/hw_breakpoint.c
+ *
+ * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
+ *
+ * Copyright (C) 2009 - 2010  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/perf_event.h>
+#include <linux/hw_breakpoint.h>
+#include <linux/percpu.h>
+#include <linux/kallsyms.h>
+#include <linux/notifier.h>
+#include <linux/kprobes.h>
+#include <linux/kdebug.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <asm/hw_breakpoint.h>
+#include <asm/mmu_context.h>
+#include <asm/ptrace.h>
+
+/*
+ * Stores the breakpoints currently in use on each breakpoint address
+ * register for each cpus
+ */
+static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
+
+/*
+ * A dummy placeholder for early accesses until the CPUs get a chance to
+ * register their UBCs later in the boot process.
+ */
+static struct sh_ubc ubc_dummy = { .num_events = 0 };
+
+static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
+
+/*
+ * Install a perf counter breakpoint.
+ *
+ * We seek a free UBC channel and use it for this breakpoint.
+ *
+ * Atomic: we hold the counter->ctx->lock and we only handle variables
+ * and registers local to this cpu.
+ */
+int arch_install_hw_breakpoint(struct perf_event *bp)
+{
+        struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+        int i;
+
+        for (i = 0; i < sh_ubc->num_events; i++) {
+                struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
+
+                if (!*slot) {
+                        *slot = bp;
+                        break;
+                }
+        }
+
+        if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
+                return -EBUSY;
+
+        clk_enable(sh_ubc->clk);
+        sh_ubc->enable(info, i);
+
+        return 0;
+}
+
+/*
+ * Uninstall the breakpoint contained in the given counter.
+ *
+ * First we search the debug address register it uses and then we disable
+ * it.
+ *
+ * Atomic: we hold the counter->ctx->lock and we only handle variables
+ * and registers local to this cpu.
+ */
+void arch_uninstall_hw_breakpoint(struct perf_event *bp)
+{
+        struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+        int i;
+
+        for (i = 0; i < sh_ubc->num_events; i++) {
+                struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
+
+                if (*slot == bp) {
+                        *slot = NULL;
+                        break;
+                }
+        }
+
+        if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
+                return;
+
+        sh_ubc->disable(info, i);
+        clk_disable(sh_ubc->clk);
+}
+
+static int get_hbp_len(u16 hbp_len)
+{
+        unsigned int len_in_bytes = 0;
+
+        switch (hbp_len) {
+        case SH_BREAKPOINT_LEN_1:
+                len_in_bytes = 1;
+                break;
+        case SH_BREAKPOINT_LEN_2:
+                len_in_bytes = 2;
+                break;
+        case SH_BREAKPOINT_LEN_4:
+                len_in_bytes = 4;
+                break;
+        case SH_BREAKPOINT_LEN_8:
+                len_in_bytes = 8;
+                break;
+        }
+        return len_in_bytes;
+}
+
+/*
+ * Check for virtual address in user space.
+ */
+int arch_check_va_in_userspace(unsigned long va, u16 hbp_len)
+{
+        unsigned int len;
+
+        len = get_hbp_len(hbp_len);
+
+        return (va <= TASK_SIZE - len);
+}
+
+/*
+ * Check for virtual address in kernel space.
+ */
+static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
+{
+        unsigned int len;
+
+        len = get_hbp_len(hbp_len);
+
+        return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
+}
+
+int arch_bp_generic_fields(int sh_len, int sh_type,
+                           int *gen_len, int *gen_type)
+{
+        /* Len */
+        switch (sh_len) {
+        case SH_BREAKPOINT_LEN_1:
+                *gen_len = HW_BREAKPOINT_LEN_1;
+                break;
+        case SH_BREAKPOINT_LEN_2:
+                *gen_len = HW_BREAKPOINT_LEN_2;
+                break;
+        case SH_BREAKPOINT_LEN_4:
+                *gen_len = HW_BREAKPOINT_LEN_4;
+                break;
+        case SH_BREAKPOINT_LEN_8:
+                *gen_len = HW_BREAKPOINT_LEN_8;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        /* Type */
+        switch (sh_type) {
+        case SH_BREAKPOINT_READ:
+                *gen_type = HW_BREAKPOINT_R;
+        case SH_BREAKPOINT_WRITE:
+                *gen_type = HW_BREAKPOINT_W;
+                break;
+        case SH_BREAKPOINT_RW:
+                *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static int arch_build_bp_info(struct perf_event *bp)
+{
+        struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+
+        info->address = bp->attr.bp_addr;
+
+        /* Len */
+        switch (bp->attr.bp_len) {
+        case HW_BREAKPOINT_LEN_1:
+                info->len = SH_BREAKPOINT_LEN_1;
+                break;
+        case HW_BREAKPOINT_LEN_2:
+                info->len = SH_BREAKPOINT_LEN_2;
+                break;
+        case HW_BREAKPOINT_LEN_4:
+                info->len = SH_BREAKPOINT_LEN_4;
+                break;
+        case HW_BREAKPOINT_LEN_8:
+                info->len = SH_BREAKPOINT_LEN_8;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        /* Type */
+        switch (bp->attr.bp_type) {
+        case HW_BREAKPOINT_R:
+                info->type = SH_BREAKPOINT_READ;
+                break;
+        case HW_BREAKPOINT_W:
+                info->type = SH_BREAKPOINT_WRITE;
+                break;
+        case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
+                info->type = SH_BREAKPOINT_RW;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+/*
+ * Validate the arch-specific HW Breakpoint register settings
+ */
+int arch_validate_hwbkpt_settings(struct perf_event *bp,
+                                  struct task_struct *tsk)
+{
+        struct arch_hw_breakpoint *info = counter_arch_bp(bp);
+        unsigned int align;
+        int ret;
+
+        ret = arch_build_bp_info(bp);
+        if (ret)
+                return ret;
+
+        ret = -EINVAL;
+
+        switch (info->len) {
+        case SH_BREAKPOINT_LEN_1:
+                align = 0;
+                break;
+        case SH_BREAKPOINT_LEN_2:
+                align = 1;
+                break;
+        case SH_BREAKPOINT_LEN_4:
+                align = 3;
+                break;
+        case SH_BREAKPOINT_LEN_8:
+                align = 7;
+                break;
+        default:
+                return ret;
+        }
+
+        /*
+         * For kernel-addresses, either the address or symbol name can be
+         * specified.
+         */
+        if (info->name)
+                info->address = (unsigned long)kallsyms_lookup_name(info->name);
+
+        /*
+         * Check that the low-order bits of the address are appropriate
+         * for the alignment implied by len.
+         */
+        if (info->address & align)
+                return -EINVAL;
+
+        /* Check that the virtual address is in the proper range */
+        if (tsk) {
+                if (!arch_check_va_in_userspace(info->address, info->len))
+                        return -EFAULT;
+        } else {
+                if (!arch_check_va_in_kernelspace(info->address, info->len))
+                        return -EFAULT;
+        }
+
+        return 0;
+}
+
+/*
+ * Release the user breakpoints used by ptrace
+ */
+void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
+{
+        int i;
+        struct thread_struct *t = &tsk->thread;
+
+        for (i = 0; i < sh_ubc->num_events; i++) {
+                unregister_hw_breakpoint(t->ptrace_bps[i]);
+                t->ptrace_bps[i] = NULL;
+        }
+}
+
+static int __kprobes hw_breakpoint_handler(struct die_args *args)
+{
+        int cpu, i, rc = NOTIFY_STOP;
+        struct perf_event *bp;
+        unsigned int cmf, resume_mask;
+
+        /*
+         * Do an early return if none of the channels triggered.
+         */
+        cmf = sh_ubc->triggered_mask();
+        if (unlikely(!cmf))
+                return NOTIFY_DONE;
+
+        /*
+         * By default, resume all of the active channels.
+         */
+        resume_mask = sh_ubc->active_mask();
+
+        /*
+         * Disable breakpoints during exception handling.
+         */
+        sh_ubc->disable_all();
+
+        cpu = get_cpu();
+        for (i = 0; i < sh_ubc->num_events; i++) {
+                unsigned long event_mask = (1 << i);
+
+                if (likely(!(cmf & event_mask)))
+                        continue;
+
+                /*
+                 * The counter may be concurrently released but that can only
+                 * occur from a call_rcu() path. We can then safely fetch
+                 * the breakpoint, use its callback, touch its counter
+                 * while we are in an rcu_read_lock() path.
+                 */
+                rcu_read_lock();
+
+                bp = per_cpu(bp_per_reg[i], cpu);
+                if (bp)
+                        rc = NOTIFY_DONE;
+
+                /*
+                 * Reset the condition match flag to denote completion of
+                 * exception handling.
+                 */
+                sh_ubc->clear_triggered_mask(event_mask);
+
+                /*
+                 * bp can be NULL due to concurrent perf counter
+                 * removing.
+                 */
+                if (!bp) {
+                        rcu_read_unlock();
+                        break;
+                }
+
+                /*
+                 * Don't restore the channel if the breakpoint is from
+                 * ptrace, as it always operates in one-shot mode.
+                 */
+                if (bp->overflow_handler == ptrace_triggered)
+                        resume_mask &= ~(1 << i);
+
+                perf_bp_event(bp, args->regs);
+
+                /* Deliver the signal to userspace */
+                if (arch_check_va_in_userspace(bp->attr.bp_addr,
+                                               bp->attr.bp_len)) {
+                        siginfo_t info;
+
+                        info.si_signo = args->signr;
+                        info.si_errno = notifier_to_errno(rc);
+                        info.si_code = TRAP_HWBKPT;
+
+                        force_sig_info(args->signr, &info, current);
+                }
+
+                rcu_read_unlock();
+        }
+
+        if (cmf == 0)
+                rc = NOTIFY_DONE;
+
+        sh_ubc->enable_all(resume_mask);
+
+        put_cpu();
+
+        return rc;
+}
+
+BUILD_TRAP_HANDLER(breakpoint)
+{
+        unsigned long ex = lookup_exception_vector();
+        TRAP_HANDLER_DECL;
+
+        notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
+}
+
+/*
+ * Handle debug exception notifications.
+ */
+int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
+                                    unsigned long val, void *data)
+{
+        struct die_args *args = data;
+
+        if (val != DIE_BREAKPOINT)
+                return NOTIFY_DONE;
+
+        /*
+         * If the breakpoint hasn't been triggered by the UBC, it's
+         * probably from a debugger, so don't do anything more here.
+         *
+         * This also permits the UBC interface clock to remain off for
+         * non-UBC breakpoints, as we don't need to check the triggered
+         * or active channel masks.
+         */
+        if (args->trapnr != sh_ubc->trap_nr)
+                return NOTIFY_DONE;
+
+        return hw_breakpoint_handler(data);
+}
+
+void hw_breakpoint_pmu_read(struct perf_event *bp)
+{
+        /* TODO */
+}
+
+void hw_breakpoint_pmu_unthrottle(struct perf_event *bp)
+{
+        /* TODO */
+}
+
+int register_sh_ubc(struct sh_ubc *ubc)
+{
+        /* Bail if it's already assigned */
+        if (sh_ubc != &ubc_dummy)
+                return -EBUSY;
+        sh_ubc = ubc;
+
+        pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
+
+        WARN_ON(ubc->num_events > HBP_NUM);
+
+        return 0;
+}
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 27ff2dc093c7..273f890b17ae 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -20,10 +20,9 @@
 #include <asm/system.h>
 #include <asm/atomic.h>
 
+void (*pm_idle)(void) = NULL;
+
 static int hlt_counter;
-void (*pm_idle)(void);
-void (*pm_power_off)(void);
-EXPORT_SYMBOL(pm_power_off);
 
 static int __init nohlt_setup(char *__unused)
 {
@@ -39,52 +38,107 @@ static int __init hlt_setup(char *__unused)
 }
 __setup("hlt", hlt_setup);
 
+static inline int hlt_works(void)
+{
+        return !hlt_counter;
+}
+
+/*
+ * On SMP it's slightly faster (but much more power-consuming!)
+ * to poll the ->work.need_resched flag instead of waiting for the
+ * cross-CPU IPI to arrive. Use this option with caution.
+ */
+static void poll_idle(void)
+{
+        local_irq_enable();
+        while (!need_resched())
+                cpu_relax();
+}
+
 void default_idle(void)
 {
-        if (!hlt_counter) {
+        if (hlt_works()) {
                 clear_thread_flag(TIF_POLLING_NRFLAG);
                 smp_mb__after_clear_bit();
-                set_bl_bit();
-                stop_critical_timings();
 
-                while (!need_resched())
+                set_bl_bit();
+                if (!need_resched()) {
+                        local_irq_enable();
                         cpu_sleep();
+                } else
+                        local_irq_enable();
 
-                start_critical_timings();
-                clear_bl_bit();
                 set_thread_flag(TIF_POLLING_NRFLAG);
+                clear_bl_bit();
         } else
-                while (!need_resched())
-                        cpu_relax();
+                poll_idle();
 }
 
+/*
+ * The idle thread. There's no useful work to be done, so just try to conserve
+ * power and have a low exit latency (ie sit in a loop waiting for somebody to
+ * say that they'd like to reschedule)
+ */
 void cpu_idle(void)
 {
+        unsigned int cpu = smp_processor_id();
+
         set_thread_flag(TIF_POLLING_NRFLAG);
 
         /* endless idle loop with no priority at all */
         while (1) {
-                void (*idle)(void) = pm_idle;
+                tick_nohz_stop_sched_tick(1);
 
-                if (!idle)
-                        idle = default_idle;
+                while (!need_resched() && cpu_online(cpu)) {
+                        check_pgt_cache();
+                        rmb();
 
-                tick_nohz_stop_sched_tick(1);
-                while (!need_resched())
-                        idle();
-                tick_nohz_restart_sched_tick();
+                        local_irq_disable();
+                        /* Don't trace irqs off for idle */
+                        stop_critical_timings();
+                        pm_idle();
+                        /*
+                         * Sanity check to ensure that pm_idle() returns
+                         * with IRQs enabled
+                         */
+                        WARN_ON(irqs_disabled());
+                        start_critical_timings();
+                }
 
+                tick_nohz_restart_sched_tick();
                 preempt_enable_no_resched();
                 schedule();
                 preempt_disable();
-                check_pgt_cache();
         }
 }
 
+void __init select_idle_routine(void)
+{
+        /*
+         * If a platform has set its own idle routine, leave it alone.
+         */
+        if (pm_idle)
+                return;
+
+        if (hlt_works())
+                pm_idle = default_idle;
+        else
+                pm_idle = poll_idle;
+}
+
 static void do_nothing(void *unused)
 {
 }
 
+void stop_this_cpu(void *unused)
+{
+        local_irq_disable();
+        cpu_clear(smp_processor_id(), cpu_online_map);
+
+        for (;;)
+                cpu_sleep();
+}
+
 /*
  * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
  * pm_idle and update to new pm_idle value. Required while changing pm_idle
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index b8fa6524760a..e1e1dbd19557 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -24,7 +24,7 @@
 #define dummy_read()
 #endif
 
-unsigned long generic_io_base;
+unsigned long generic_io_base = 0;
 
 u8 generic_inb(unsigned long port)
 {
@@ -147,8 +147,10 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
 
 void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
 {
+#ifdef P1SEG
         if (PXSEG(addr) >= P1SEG)
                 return (void __iomem *)addr;
+#endif
 
         return (void __iomem *)(addr + generic_io_base);
 }
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index 69be603aa2d7..4a8bb4eeb8ad 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -184,31 +184,31 @@ static unsigned long long copy_word(unsigned long src_addr, int src_len,
 
         switch (src_len) {
         case 1:
-                tmp = ctrl_inb(src_addr);
+                tmp = __raw_readb(src_addr);
                 break;
         case 2:
-                tmp = ctrl_inw(src_addr);
+                tmp = __raw_readw(src_addr);
                 break;
         case 4:
-                tmp = ctrl_inl(src_addr);
+                tmp = __raw_readl(src_addr);
                 break;
         case 8:
-                tmp = ctrl_inq(src_addr);
+                tmp = __raw_readq(src_addr);
                 break;
         }
 
         switch (dst_len) {
         case 1:
-                ctrl_outb(tmp, dst_addr);
+                __raw_writeb(tmp, dst_addr);
                 break;
         case 2:
-                ctrl_outw(tmp, dst_addr);
+                __raw_writew(tmp, dst_addr);
                 break;
         case 4:
-                ctrl_outl(tmp, dst_addr);
+                __raw_writel(tmp, dst_addr);
                 break;
         case 8:
-                ctrl_outq(tmp, dst_addr);
+                __raw_writeq(tmp, dst_addr);
                 break;
         }
 
@@ -271,6 +271,8 @@ int handle_trapped_io(struct pt_regs *regs, unsigned long address)
         insn_size_t instruction;
         int tmp;
 
+        if (trapped_io_disable)
+                return 0;
         if (!lookup_tiop(address))
                 return 0;
 
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index eac7da772fc2..d2d41d046657 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -37,7 +37,15 @@ void ack_bad_irq(unsigned int irq)
  */
 static int show_other_interrupts(struct seq_file *p, int prec)
 {
+        int j;
+
+        seq_printf(p, "%*s: ", prec, "NMI");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stat[j].__nmi_count);
+        seq_printf(p, "  Non-maskable interrupts\n");
+
         seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
+
         return 0;
 }
 
@@ -68,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
         if (!desc)
                 return 0;
 
-        spin_lock_irqsave(&desc->lock, flags);
+        raw_spin_lock_irqsave(&desc->lock, flags);
         for_each_online_cpu(j)
                 any_count |= kstat_irqs_cpu(i, j);
         action = desc->action;
@@ -89,7 +97,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
         seq_putc(p, '\n');
 out:
-        spin_unlock_irqrestore(&desc->lock, flags);
+        raw_spin_unlock_irqrestore(&desc->lock, flags);
         return 0;
 }
 #endif
@@ -255,6 +263,12 @@ void __init init_IRQ(void)
 {
         plat_irq_setup();
 
+        /*
+         * Pin any of the legacy IRQ vectors that haven't already been
+         * grabbed by the platform
+         */
+        reserve_irq_legacy();
+
         /* Perform the machine specific initialisation */
         if (sh_mv.mv_init_irq)
                 sh_mv.mv_init_irq();
diff --git a/arch/sh/kernel/irq_32.c b/arch/sh/kernel/irq_32.c
new file mode 100644
index 000000000000..e33ab15831f9
--- /dev/null
+++ b/arch/sh/kernel/irq_32.c
@@ -0,0 +1,57 @@
+/*
+ * SHcompact irqflags support
+ *
+ * Copyright (C) 2006 - 2009 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/irqflags.h>
+#include <linux/module.h>
+
+void notrace raw_local_irq_restore(unsigned long flags)
+{
+        unsigned long __dummy0, __dummy1;
+
+        if (flags == RAW_IRQ_DISABLED) {
+                __asm__ __volatile__ (
+                        "stc    sr, %0\n\t"
+                        "or     #0xf0, %0\n\t"
+                        "ldc    %0, sr\n\t"
+                        : "=&z" (__dummy0)
+                        : /* no inputs */
+                        : "memory"
+                );
+        } else {
+                __asm__ __volatile__ (
+                        "stc    sr, %0\n\t"
+                        "and    %1, %0\n\t"
+#ifdef CONFIG_CPU_HAS_SR_RB
+                        "stc    r6_bank, %1\n\t"
+                        "or     %1, %0\n\t"
+#endif
+                        "ldc    %0, sr\n\t"
+                        : "=&r" (__dummy0), "=r" (__dummy1)
+                        : "1" (~RAW_IRQ_DISABLED)
+                        : "memory"
+                );
+        }
+}
+EXPORT_SYMBOL(raw_local_irq_restore);
+
+unsigned long notrace __raw_local_save_flags(void)
+{
+        unsigned long flags;
+
+        __asm__ __volatile__ (
+                "stc    sr, %0\n\t"
+                "and    #0xf0, %0\n\t"
+                : "=&z" (flags)
+                : /* no inputs */
+                : "memory"
+        );
+
+        return flags;
+}
+EXPORT_SYMBOL(__raw_local_save_flags);
diff --git a/arch/sh/kernel/irq_64.c b/arch/sh/kernel/irq_64.c
new file mode 100644
index 000000000000..32365ba0e039
--- /dev/null
+++ b/arch/sh/kernel/irq_64.c
@@ -0,0 +1,51 @@
+/*
+ * SHmedia irqflags support
+ *
+ * Copyright (C) 2006 - 2009 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/irqflags.h>
+#include <linux/module.h>
+#include <cpu/registers.h>
+
+void notrace raw_local_irq_restore(unsigned long flags)
+{
+        unsigned long long __dummy;
+
+        if (flags == RAW_IRQ_DISABLED) {
+                __asm__ __volatile__ (
+                        "getcon " __SR ", %0\n\t"
+                        "or     %0, %1, %0\n\t"
+                        "putcon %0, " __SR "\n\t"
+                        : "=&r" (__dummy)
+                        : "r" (RAW_IRQ_DISABLED)
+                );
+        } else {
+                __asm__ __volatile__ (
+                        "getcon " __SR ", %0\n\t"
+                        "and    %0, %1, %0\n\t"
+                        "putcon %0, " __SR "\n\t"
+                        : "=&r" (__dummy)
+                        : "r" (~RAW_IRQ_DISABLED)
+                );
+        }
+}
+EXPORT_SYMBOL(raw_local_irq_restore);
+
+unsigned long notrace __raw_local_save_flags(void)
+{
+        unsigned long flags;
+
+        __asm__ __volatile__ (
+                "getcon " __SR ", %0\n\t"
+                "and    %0, %1, %0"
+                : "=&r" (flags)
+                : "r" (RAW_IRQ_DISABLED)
+        );
+
+        return flags;
+}
+EXPORT_SYMBOL(__raw_local_save_flags);
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 3e532d0d4a5c..70c69659b846 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -1,7 +1,7 @@
 /*
  * SuperH KGDB support
  *
- * Copyright (C) 2008  Paul Mundt
+ * Copyright (C) 2008 - 2009  Paul Mundt
  *
  * Single stepping taken from the old stub by Henry Bell and Jeremy Siegel.
  *
@@ -251,24 +251,60 @@ BUILD_TRAP_HANDLER(singlestep)
         local_irq_restore(flags);
 }
 
+static int __kgdb_notify(struct die_args *args, unsigned long cmd)
+{
+        int ret;
+
+        switch (cmd) {
+        case DIE_BREAKPOINT:
+                /*
+                 * This means a user thread is single stepping
+                 * a system call which should be ignored
+                 */
+                if (test_thread_flag(TIF_SINGLESTEP))
+                        return NOTIFY_DONE;
+
+                ret = kgdb_handle_exception(args->trapnr & 0xff, args->signr,
+                                            args->err, args->regs);
+                if (ret)
+                        return NOTIFY_DONE;
+
+                break;
+        }
 
-BUILD_TRAP_HANDLER(breakpoint)
+        return NOTIFY_STOP;
+}
+
+static int
+kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr)
 {
         unsigned long flags;
-        TRAP_HANDLER_DECL;
+        int ret;
 
         local_irq_save(flags);
-        kgdb_handle_exception(vec >> 2, SIGTRAP, 0, regs);
+        ret = __kgdb_notify(ptr, cmd);
         local_irq_restore(flags);
+
+        return ret;
 }
 
+static struct notifier_block kgdb_notifier = {
+        .notifier_call  = kgdb_notify,
+
+        /*
+         * Lowest-prio notifier priority, we want to be notified last:
+         */
+        .priority       = -INT_MAX,
+};
+
 int kgdb_arch_init(void)
 {
-        return 0;
+        return register_die_notifier(&kgdb_notifier);
 }
 
 void kgdb_arch_exit(void)
 {
+        unregister_die_notifier(&kgdb_notifier);
 }
 
 struct kgdb_arch arch_kgdb_ops = {
diff --git a/arch/sh/kernel/kprobes.c b/arch/sh/kernel/kprobes.c
index c96850b061fb..4049d99f76e1 100644
--- a/arch/sh/kernel/kprobes.c
+++ b/arch/sh/kernel/kprobes.c
@@ -13,6 +13,7 @@
 #include <linux/ptrace.h>
 #include <linux/preempt.h>
 #include <linux/kdebug.h>
+#include <linux/slab.h>
 #include <asm/cacheflush.h>
 #include <asm/uaccess.h>
 
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 7ea2704ea033..7672141c841b 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -21,6 +21,8 @@
 #include <asm/mmu_context.h>
 #include <asm/io.h>
 #include <asm/cacheflush.h>
+#include <asm/sh_bios.h>
+#include <asm/reboot.h>
 
 typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
                                       unsigned long reboot_code_buffer,
@@ -28,15 +30,11 @@ typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
 
 extern const unsigned char relocate_new_kernel[];
 extern const unsigned int relocate_new_kernel_size;
-extern void *gdb_vbr_vector;
 extern void *vbr_base;
 
-void machine_shutdown(void)
-{
-}
-
-void machine_crash_shutdown(struct pt_regs *regs)
+void native_machine_crash_shutdown(struct pt_regs *regs)
 {
+        /* Nothing to do for UP, but definitely broken for SMP.. */
 }
 
 /*
@@ -46,12 +44,6 @@ void machine_crash_shutdown(struct pt_regs *regs)
  */
 int machine_kexec_prepare(struct kimage *image)
 {
-        /* older versions of kexec-tools are passing
-         * the zImage entry point as a virtual address.
-         */
-        if (image->start != PHYSADDR(image->start))
-                return -EINVAL; /* upgrade your kexec-tools */
-
         return 0;
 }
 
@@ -123,11 +115,7 @@ void machine_kexec(struct kimage *image)
         kexec_info(image);
         flush_cache_all();
 
-#if defined(CONFIG_SH_STANDARD_BIOS)
-        asm volatile("ldc %0, vbr" :
-                     : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
-                     : "memory");
-#endif
+        sh_bios_vbr_reload();
 
         /* now call it */
         rnk = (relocate_new_kernel_t) reboot_code_buffer;
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index cbce639b108a..1652340ba3f2 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -135,5 +135,9 @@ void __init sh_mv_setup(void)
         if (!sh_mv.mv_nr_irqs)
                 sh_mv.mv_nr_irqs = NR_IRQS;
 
+#ifdef P2SEG
         __set_io_port_base(P2SEG);
+#else
+        __set_io_port_base(0);
+#endif
 }
diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c
index c2efdcde266f..43adddfe4c04 100644
--- a/arch/sh/kernel/module.c
+++ b/arch/sh/kernel/module.c
@@ -32,6 +32,7 @@
 #include <linux/string.h>
 #include <linux/kernel.h>
 #include <asm/unaligned.h>
+#include <asm/dwarf.h>
 
 void *module_alloc(unsigned long size)
 {
@@ -145,10 +146,16 @@ int module_finalize(const Elf_Ehdr *hdr,
                     const Elf_Shdr *sechdrs,
                     struct module *me)
 {
-        return module_bug_finalize(hdr, sechdrs, me);
+        int ret = 0;
+
+        ret |= module_dwarf_finalize(hdr, sechdrs, me);
+        ret |= module_bug_finalize(hdr, sechdrs, me);
+
+        return ret;
 }
 
 void module_arch_cleanup(struct module *mod)
 {
         module_bug_cleanup(mod);
+        module_dwarf_cleanup(mod);
 }
diff --git a/arch/sh/kernel/perf_callchain.c b/arch/sh/kernel/perf_callchain.c
new file mode 100644
index 000000000000..a9dd3abde28e
--- /dev/null
+++ b/arch/sh/kernel/perf_callchain.c
@@ -0,0 +1,95 @@
+/*
+ * Performance event callchain support - SuperH architecture code
+ *
+ * Copyright (C) 2009  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/percpu.h>
+#include <asm/unwinder.h>
+#include <asm/ptrace.h>
+
+static inline void callchain_store(struct perf_callchain_entry *entry, u64 ip)
+{
+        if (entry->nr < PERF_MAX_STACK_DEPTH)
+                entry->ip[entry->nr++] = ip;
+}
+
+static void callchain_warning(void *data, char *msg)
+{
+}
+
+static void
+callchain_warning_symbol(void *data, char *msg, unsigned long symbol)
+{
+}
+
+static int callchain_stack(void *data, char *name)
+{
+        return 0;
+}
+
+static void callchain_address(void *data, unsigned long addr, int reliable)
+{
+        struct perf_callchain_entry *entry = data;
+
+        if (reliable)
+                callchain_store(entry, addr);
+}
+
+static const struct stacktrace_ops callchain_ops = {
+        .warning        = callchain_warning,
+        .warning_symbol = callchain_warning_symbol,
+        .stack          = callchain_stack,
+        .address        = callchain_address,
+};
+
+static void
+perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry)
+{
+        callchain_store(entry, PERF_CONTEXT_KERNEL);
+        callchain_store(entry, regs->pc);
+
+        unwind_stack(NULL, regs, NULL, &callchain_ops, entry);
+}
+
+static void
+perf_do_callchain(struct pt_regs *regs, struct perf_callchain_entry *entry)
+{
+        int is_user;
+
+        if (!regs)
+                return;
+
+        is_user = user_mode(regs);
+
+        if (is_user && current->state != TASK_RUNNING)
+                return;
+
+        /*
+         * Only the kernel side is implemented for now.
+         */
+        if (!is_user)
+                perf_callchain_kernel(regs, entry);
+}
+
+/*
+ * No need for separate IRQ and NMI entries.
+ */
+static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
+
+struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
+{
+        struct perf_callchain_entry *entry = &__get_cpu_var(callchain);
+
+        entry->nr = 0;
+
+        perf_do_callchain(regs, entry);
+
+        return entry;
+}
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
new file mode 100644
index 000000000000..81b6de41ae5d
--- /dev/null
+++ b/arch/sh/kernel/perf_event.c
@@ -0,0 +1,330 @@
+/*
+ * Performance event support framework for SuperH hardware counters.
+ *
+ *  Copyright (C) 2009  Paul Mundt
+ *
+ * Heavily based on the x86 and PowerPC implementations.
+ *
+ * x86:
+ *  Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
+ *  Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar
+ *  Copyright (C) 2009 Jaswinder Singh Rajput
+ *  Copyright (C) 2009 Advanced Micro Devices, Inc., Robert Richter
+ *  Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com>
+ *  Copyright (C) 2009 Intel Corporation, <markus.t.metzger@intel.com>
+ *
+ * ppc:
+ *  Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/perf_event.h>
+#include <asm/processor.h>
+
+struct cpu_hw_events {
+        struct perf_event       *events[MAX_HWEVENTS];
+        unsigned long           used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
+        unsigned long           active_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
+};
+
+DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
+
+static struct sh_pmu *sh_pmu __read_mostly;
+
+/* Number of perf_events counting hardware events */
+static atomic_t num_events;
+/* Used to avoid races in calling reserve/release_pmc_hardware */
+static DEFINE_MUTEX(pmc_reserve_mutex);
+
+/*
+ * Stub these out for now, do something more profound later.
+ */
+int reserve_pmc_hardware(void)
+{
+        return 0;
+}
+
+void release_pmc_hardware(void)
+{
+}
+
+static inline int sh_pmu_initialized(void)
+{
+        return !!sh_pmu;
+}
+
+/*
+ * Release the PMU if this is the last perf_event.
+ */
+static void hw_perf_event_destroy(struct perf_event *event)
+{
+        if (!atomic_add_unless(&num_events, -1, 1)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_dec_return(&num_events) == 0)
+                        release_pmc_hardware();
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+}
+
+static int hw_perf_cache_event(int config, int *evp)
+{
+        unsigned long type, op, result;
+        int ev;
+
+        if (!sh_pmu->cache_events)
+                return -EINVAL;
+
+        /* unpack config */
+        type = config & 0xff;
+        op = (config >> 8) & 0xff;
+        result = (config >> 16) & 0xff;
+
+        if (type >= PERF_COUNT_HW_CACHE_MAX ||
+            op >= PERF_COUNT_HW_CACHE_OP_MAX ||
+            result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
+                return -EINVAL;
+
+        ev = (*sh_pmu->cache_events)[type][op][result];
+        if (ev == 0)
+                return -EOPNOTSUPP;
+        if (ev == -1)
+                return -EINVAL;
+        *evp = ev;
+        return 0;
+}
+
+static int __hw_perf_event_init(struct perf_event *event)
+{
+        struct perf_event_attr *attr = &event->attr;
+        struct hw_perf_event *hwc = &event->hw;
+        int config = -1;
+        int err;
+
+        if (!sh_pmu_initialized())
+                return -ENODEV;
+
+        /*
+         * All of the on-chip counters are "limited", in that they have
+         * no interrupts, and are therefore unable to do sampling without
+         * further work and timer assistance.
+         */
+        if (hwc->sample_period)
+                return -EINVAL;
+
+        /*
+         * See if we need to reserve the counter.
+         *
+         * If no events are currently in use, then we have to take a
+         * mutex to ensure that we don't race with another task doing
+         * reserve_pmc_hardware or release_pmc_hardware.
+         */
+        err = 0;
+        if (!atomic_inc_not_zero(&num_events)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_read(&num_events) == 0 &&
+                    reserve_pmc_hardware())
+                        err = -EBUSY;
+                else
+                        atomic_inc(&num_events);
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+
+        if (err)
+                return err;
+
+        event->destroy = hw_perf_event_destroy;
+
+        switch (attr->type) {
+        case PERF_TYPE_RAW:
+                config = attr->config & sh_pmu->raw_event_mask;
+                break;
+        case PERF_TYPE_HW_CACHE:
+                err = hw_perf_cache_event(attr->config, &config);
+                if (err)
+                        return err;
+                break;
+        case PERF_TYPE_HARDWARE:
+                if (attr->config >= sh_pmu->max_events)
+                        return -EINVAL;
+
+                config = sh_pmu->event_map(attr->config);
+                break;
+        }
+
+        if (config == -1)
+                return -EINVAL;
+
+        hwc->config |= config;
+
+        return 0;
+}
+
+static void sh_perf_event_update(struct perf_event *event,
+                                   struct hw_perf_event *hwc, int idx)
+{
+        u64 prev_raw_count, new_raw_count;
+        s64 delta;
+        int shift = 0;
+
+        /*
+         * Depending on the counter configuration, they may or may not
+         * be chained, in which case the previous counter value can be
+         * updated underneath us if the lower-half overflows.
+         *
+         * Our tactic to handle this is to first atomically read and
+         * exchange a new raw count - then add that new-prev delta
+         * count to the generic counter atomically.
+         *
+         * As there is no interrupt associated with the overflow events,
+         * this is the simplest approach for maintaining consistency.
+         */
+again:
+        prev_raw_count = atomic64_read(&hwc->prev_count);
+        new_raw_count = sh_pmu->read(idx);
+
+        if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
+                             new_raw_count) != prev_raw_count)
+                goto again;
+
+        /*
+         * Now we have the new raw value and have updated the prev
+         * timestamp already. We can now calculate the elapsed delta
+         * (counter-)time and add that to the generic counter.
+         *
+         * Careful, not all hw sign-extends above the physical width
+         * of the count.
+         */
+        delta = (new_raw_count << shift) - (prev_raw_count << shift);
+        delta >>= shift;
+
+        atomic64_add(delta, &event->count);
+}
+
+static void sh_pmu_disable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
+        int idx = hwc->idx;
+
+        clear_bit(idx, cpuc->active_mask);
+        sh_pmu->disable(hwc, idx);
+
+        barrier();
+
+        sh_perf_event_update(event, &event->hw, idx);
+
+        cpuc->events[idx] = NULL;
+        clear_bit(idx, cpuc->used_mask);
+
+        perf_event_update_userpage(event);
+}
+
+static int sh_pmu_enable(struct perf_event *event)
+{
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
+        int idx = hwc->idx;
+
+        if (test_and_set_bit(idx, cpuc->used_mask)) {
+                idx = find_first_zero_bit(cpuc->used_mask, sh_pmu->num_events);
+                if (idx == sh_pmu->num_events)
+                        return -EAGAIN;
+
+                set_bit(idx, cpuc->used_mask);
+                hwc->idx = idx;
+        }
+
+        sh_pmu->disable(hwc, idx);
+
+        cpuc->events[idx] = event;
+        set_bit(idx, cpuc->active_mask);
+
+        sh_pmu->enable(hwc, idx);
+
+        perf_event_update_userpage(event);
+
+        return 0;
+}
+
+static void sh_pmu_read(struct perf_event *event)
+{
+        sh_perf_event_update(event, &event->hw, event->hw.idx);
+}
+
+static const struct pmu pmu = {
+        .enable         = sh_pmu_enable,
+        .disable        = sh_pmu_disable,
+        .read           = sh_pmu_read,
+};
+
+const struct pmu *hw_perf_event_init(struct perf_event *event)
+{
+        int err = __hw_perf_event_init(event);
+        if (unlikely(err)) {
+                if (event->destroy)
+                        event->destroy(event);
+                return ERR_PTR(err);
+        }
+
+        return &pmu;
+}
+
+static void sh_pmu_setup(int cpu)
+{
+        struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
+
+        memset(cpuhw, 0, sizeof(struct cpu_hw_events));
+}
+
+static int __cpuinit
+sh_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (long)hcpu;
+
+        switch (action & ~CPU_TASKS_FROZEN) {
+        case CPU_UP_PREPARE:
+                sh_pmu_setup(cpu);
+                break;
+
+        default:
+                break;
+        }
+
+        return NOTIFY_OK;
+}
+
+void hw_perf_enable(void)
+{
+        if (!sh_pmu_initialized())
+                return;
+
+        sh_pmu->enable_all();
+}
+
+void hw_perf_disable(void)
+{
+        if (!sh_pmu_initialized())
+                return;
+
+        sh_pmu->disable_all();
+}
+
+int __cpuinit register_sh_pmu(struct sh_pmu *pmu)
+{
+        if (sh_pmu)
+                return -EBUSY;
+        sh_pmu = pmu;
+
+        pr_info("Performance Events: %s support registered\n", pmu->name);
+
+        WARN_ON(pmu->num_events > MAX_HWEVENTS);
+
+        perf_cpu_notifier(sh_pmu_notifier);
+        return 0;
+}
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
new file mode 100644
index 000000000000..17f89aa4e1b3
--- /dev/null
+++ b/arch/sh/kernel/process.c
@@ -0,0 +1,101 @@
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+
+struct kmem_cache *task_xstate_cachep = NULL;
+unsigned int xstate_size;
+
+int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
+{
+        *dst = *src;
+
+        if (src->thread.xstate) {
+                dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
+                                                      GFP_KERNEL);
+                if (!dst->thread.xstate)
+                        return -ENOMEM;
+                memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
+        }
+
+        return 0;
+}
+
+void free_thread_xstate(struct task_struct *tsk)
+{
+        if (tsk->thread.xstate) {
+                kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
+                tsk->thread.xstate = NULL;
+        }
+}
+
+#if THREAD_SHIFT < PAGE_SHIFT
+static struct kmem_cache *thread_info_cache;
+
+struct thread_info *alloc_thread_info(struct task_struct *tsk)
+{
+        struct thread_info *ti;
+
+        ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
+        if (unlikely(ti == NULL))
+                return NULL;
+#ifdef CONFIG_DEBUG_STACK_USAGE
+        memset(ti, 0, THREAD_SIZE);
+#endif
+        return ti;
+}
+
+void free_thread_info(struct thread_info *ti)
+{
+        free_thread_xstate(ti->task);
+        kmem_cache_free(thread_info_cache, ti);
+}
+
+void thread_info_cache_init(void)
+{
+        thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
+                                              THREAD_SIZE, SLAB_PANIC, NULL);
+}
+#else
+struct thread_info *alloc_thread_info(struct task_struct *tsk)
+{
+#ifdef CONFIG_DEBUG_STACK_USAGE
+        gfp_t mask = GFP_KERNEL | __GFP_ZERO;
+#else
+        gfp_t mask = GFP_KERNEL;
+#endif
+        return (struct thread_info *)__get_free_pages(mask, THREAD_SIZE_ORDER);
+}
+
+void free_thread_info(struct thread_info *ti)
+{
+        free_thread_xstate(ti->task);
+        free_pages((unsigned long)ti, THREAD_SIZE_ORDER);
+}
+#endif /* THREAD_SHIFT < PAGE_SHIFT */
+
+void arch_task_cache_init(void)
+{
+        if (!xstate_size)
+                return;
+
+        task_xstate_cachep = kmem_cache_create("task_xstate", xstate_size,
+                                               __alignof__(union thread_xstate),
+                                               SLAB_PANIC | SLAB_NOTRACK, NULL);
+}
+
+#ifdef CONFIG_SH_FPU_EMU
+# define HAVE_SOFTFP    1
+#else
+# define HAVE_SOFTFP    0
+#endif
+
+void init_thread_xstate(void)
+{
+        if (boot_cpu_data.flags & CPU_HAS_FPU)
+                xstate_size = sizeof(struct sh_fpu_hard_struct);
+        else if (HAVE_SOFTFP)
+                xstate_size = sizeof(struct sh_fpu_soft_struct);
+        else
+                xstate_size = 0;
+}
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 0673c4746be3..052981972ae6 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -15,66 +15,17 @@
  */
 #include <linux/module.h>
 #include <linux/mm.h>
+#include <linux/slab.h>
 #include <linux/elfcore.h>
-#include <linux/pm.h>
 #include <linux/kallsyms.h>
-#include <linux/kexec.h>
-#include <linux/kdebug.h>
-#include <linux/tick.h>
-#include <linux/reboot.h>
 #include <linux/fs.h>
 #include <linux/ftrace.h>
-#include <linux/preempt.h>
+#include <linux/hw_breakpoint.h>
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
-#include <asm/pgalloc.h>
 #include <asm/system.h>
-#include <asm/ubc.h>
 #include <asm/fpu.h>
 #include <asm/syscalls.h>
-#include <asm/watchdog.h>
-
-int ubc_usercnt = 0;
-
-#ifdef CONFIG_32BIT
-static void watchdog_trigger_immediate(void)
-{
-        sh_wdt_write_cnt(0xFF);
-        sh_wdt_write_csr(0xC2);
-}
-
-void machine_restart(char * __unused)
-{
-        local_irq_disable();
-
-        /* Use watchdog timer to trigger reset */
-        watchdog_trigger_immediate();
-
-        while (1)
-                cpu_sleep();
-}
-#else
-void machine_restart(char * __unused)
-{
-        /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
-        asm volatile("ldc %0, sr\n\t"
-                     "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
-}
-#endif
-
-void machine_halt(void)
-{
-        local_irq_disable();
-
-        while (1)
-                cpu_sleep();
-}
-
-void machine_power_off(void)
-{
-        if (pm_power_off)
-                pm_power_off();
-}
 
 void show_regs(struct pt_regs * regs)
 {
@@ -91,7 +42,7 @@ void show_regs(struct pt_regs * regs)
         printk("PC  : %08lx SP  : %08lx SR  : %08lx ",
                regs->pc, regs->regs[15], regs->sr);
 #ifdef CONFIG_MMU
-        printk("TEA : %08x\n", ctrl_inl(MMU_TEA));
+        printk("TEA : %08x\n", __raw_readl(MMU_TEA));
 #else
         printk("\n");
 #endif
@@ -134,7 +85,10 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
         regs.regs[5] = (unsigned long)fn;
 
         regs.pc = (unsigned long)kernel_thread_helper;
-        regs.sr = (1 << 30);
+        regs.sr = SR_MD;
+#if defined(CONFIG_SH_FPU)
+        regs.sr |= SR_FD;
+#endif
 
         /* Ok, create the new process.. */
         pid = do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
@@ -142,22 +96,36 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
 
         return pid;
 }
+EXPORT_SYMBOL(kernel_thread);
+
+void start_thread(struct pt_regs *regs, unsigned long new_pc,
+                  unsigned long new_sp)
+{
+        set_fs(USER_DS);
+
+        regs->pr = 0;
+        regs->sr = SR_FD;
+        regs->pc = new_pc;
+        regs->regs[15] = new_sp;
+
+        free_thread_xstate(current);
+}
+EXPORT_SYMBOL(start_thread);
 
 /*
  * Free current thread data structures etc..
  */
 void exit_thread(void)
 {
-        if (current->thread.ubc_pc) {
-                current->thread.ubc_pc = 0;
-                ubc_usercnt -= 1;
-        }
 }
 
 void flush_thread(void)
 {
-#if defined(CONFIG_SH_FPU)
         struct task_struct *tsk = current;
+
+        flush_ptrace_hw_breakpoint(tsk);
+
+#if defined(CONFIG_SH_FPU)
         /* Forget lazy FPU state */
         clear_fpu(tsk, task_pt_regs(tsk));
         clear_used_math();
@@ -186,6 +154,16 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
 
         return fpvalid;
 }
+EXPORT_SYMBOL(dump_fpu);
+
+/*
+ * This gets called before we allocate a new thread and copy
+ * the current task into it.
+ */
+void prepare_to_copy(struct task_struct *tsk)
+{
+        unlazy_fpu(tsk, task_pt_regs(tsk));
+}
 
 asmlinkage void ret_from_fork(void);
 
@@ -195,17 +173,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 {
         struct thread_info *ti = task_thread_info(p);
         struct pt_regs *childregs;
-#if defined(CONFIG_SH_FPU) || defined(CONFIG_SH_DSP)
-        struct task_struct *tsk = current;
-#endif
-
-#if defined(CONFIG_SH_FPU)
-        unlazy_fpu(tsk, regs);
-        p->thread.fpu = tsk->thread.fpu;
-        copy_to_stopped_child_used_math(p);
-#endif
 
 #if defined(CONFIG_SH_DSP)
+        struct task_struct *tsk = current;
+
         if (is_dsp_enabled(tsk)) {
                 /* We can use the __save_dsp or just copy the struct:
                  * __save_dsp(p);
@@ -224,6 +195,8 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         } else {
                 childregs->regs[15] = (unsigned long)childregs;
                 ti->addr_limit = KERNEL_DS;
+                ti->status &= ~TS_USEDFPU;
+                p->fpu_counter = 0;
         }
 
         if (clone_flags & CLONE_SETTLS)
@@ -234,53 +207,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         p->thread.sp = (unsigned long) childregs;
         p->thread.pc = (unsigned long) ret_from_fork;
 
-        p->thread.ubc_pc = 0;
+        memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
 
         return 0;
 }
 
-/* Tracing by user break controller.  */
-static void ubc_set_tracing(int asid, unsigned long pc)
-{
-#if defined(CONFIG_CPU_SH4A)
-        unsigned long val;
-
-        val = (UBC_CBR_ID_INST | UBC_CBR_RW_READ | UBC_CBR_CE);
-        val |= (UBC_CBR_AIE | UBC_CBR_AIV_SET(asid));
-
-        ctrl_outl(val, UBC_CBR0);
-        ctrl_outl(pc,  UBC_CAR0);
-        ctrl_outl(0x0, UBC_CAMR0);
-        ctrl_outl(0x0, UBC_CBCR);
-
-        val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE);
-        ctrl_outl(val, UBC_CRR0);
-
-        /* Read UBC register that we wrote last, for checking update */
-        val = ctrl_inl(UBC_CRR0);
-
-#else   /* CONFIG_CPU_SH4A */
-        ctrl_outl(pc, UBC_BARA);
-
-#ifdef CONFIG_MMU
-        ctrl_outb(asid, UBC_BASRA);
-#endif
-
-        ctrl_outl(0, UBC_BAMRA);
-
-        if (current_cpu_data.type == CPU_SH7729 ||
-            current_cpu_data.type == CPU_SH7710 ||
-            current_cpu_data.type == CPU_SH7712 ||
-            current_cpu_data.type == CPU_SH7203){
-                ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
-                ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
-        } else {
-                ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA);
-                ctrl_outw(BRCR_PCBA, UBC_BRCR);
-        }
-#endif  /* CONFIG_CPU_SH4A */
-}
-
 /*
  *      switch_to(x,y) should switch tasks from x to y.
  *
@@ -288,9 +219,13 @@ static void ubc_set_tracing(int asid, unsigned long pc)
 __notrace_funcgraph struct task_struct *
 __switch_to(struct task_struct *prev, struct task_struct *next)
 {
-#if defined(CONFIG_SH_FPU)
+        struct thread_struct *next_t = &next->thread;
+
         unlazy_fpu(prev, task_pt_regs(prev));
-#endif
+
+        /* we're going to use this soon, after a few expensive things */
+        if (next->fpu_counter > 5)
+                prefetch(next_t->xstate);
 
 #ifdef CONFIG_MMU
         /*
@@ -302,24 +237,13 @@ __switch_to(struct task_struct *prev, struct task_struct *next)
                      : "r" (task_thread_info(next)));
 #endif
 
-        /* If no tasks are using the UBC, we're done */
-        if (ubc_usercnt == 0)
-                /* If no tasks are using the UBC, we're done */;
-        else if (next->thread.ubc_pc && next->mm) {
-                int asid = 0;
-#ifdef CONFIG_MMU
-                asid |= cpu_asid(smp_processor_id(), next->mm);
-#endif
-                ubc_set_tracing(asid, next->thread.ubc_pc);
-        } else {
-#if defined(CONFIG_CPU_SH4A)
-                ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
-                ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
-#else
-                ctrl_outw(0, UBC_BBRA);
-                ctrl_outw(0, UBC_BBRB);
-#endif
-        }
+        /*
+         * If the task has used fpu the last 5 timeslices, just do a full
+         * restore of the math state immediately to avoid the trap; the
+         * chances of needing FPU soon are obviously high now
+         */
+        if (next->fpu_counter > 5)
+                __fpu_state_restore();
 
         return prev;
 }
@@ -412,20 +336,3 @@ unsigned long get_wchan(struct task_struct *p)
 
         return pc;
 }
-
-asmlinkage void break_point_trap(void)
-{
-        /* Clear tracing.  */
-#if defined(CONFIG_CPU_SH4A)
-        ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
-        ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
-#else
-        ctrl_outw(0, UBC_BBRA);
-        ctrl_outw(0, UBC_BBRB);
-        ctrl_outl(0, UBC_BRCR);
-#endif
-        current->thread.ubc_pc = 0;
-        ubc_usercnt -= 1;
-
-        force_sig(SIGTRAP, current);
-}
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 1192398ef582..d4ca6480e355 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -21,6 +21,7 @@
 #include <linux/fs.h>
 #include <linux/ptrace.h>
 #include <linux/reboot.h>
+#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/io.h>
@@ -32,30 +33,7 @@
 
 struct task_struct *last_task_used_math = NULL;
 
-void machine_restart(char * __unused)
-{
-        extern void phys_stext(void);
-
-        phys_stext();
-}
-
-void machine_halt(void)
-{
-        for (;;);
-}
-
-void machine_power_off(void)
-{
-        __asm__ __volatile__ (
-                "sleep\n\t"
-                "synci\n\t"
-                "nop;nop;nop;nop\n\t"
-        );
-
-        panic("Unexpected wakeup!\n");
-}
-
-void show_regs(struct pt_regs * regs)
+void show_regs(struct pt_regs *regs)
 {
         unsigned long long ah, al, bh, bl, ch, cl;
 
@@ -335,6 +313,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
                       &regs, 0, NULL, NULL);
 }
+EXPORT_SYMBOL(kernel_thread);
 
 /*
  * Free current thread data structures etc..
@@ -367,7 +346,7 @@ void exit_thread(void)
 void flush_thread(void)
 {
 
-        /* Called by fs/exec.c (flush_old_exec) to remove traces of a
+        /* Called by fs/exec.c (setup_new_exec) to remove traces of a
          * previously running executable. */
 #ifdef CONFIG_SH_FPU
         if (last_task_used_math == current) {
@@ -403,13 +382,13 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
         if (fpvalid) {
                 if (current == last_task_used_math) {
                         enable_fpu();
-                        save_fpu(tsk, regs);
+                        save_fpu(tsk);
                         disable_fpu();
                         last_task_used_math = 0;
                         regs->sr |= SR_FD;
                 }
 
-                memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu));
+                memcpy(fpu, &tsk->thread.xstate->hardfpu, sizeof(*fpu));
         }
 
         return fpvalid;
@@ -417,6 +396,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
         return 0; /* Task didn't use the fpu at all. */
 #endif
 }
+EXPORT_SYMBOL(dump_fpu);
 
 asmlinkage void ret_from_fork(void);
 
@@ -429,7 +409,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 #ifdef CONFIG_SH_FPU
         if(last_task_used_math == current) {
                 enable_fpu();
-                save_fpu(current, regs);
+                save_fpu(current);
                 disable_fpu();
                 last_task_used_math = NULL;
                 regs->sr |= SR_FD;
@@ -525,13 +505,6 @@ out:
         return error;
 }
 
-/*
- * These bracket the sleeping functions..
- */
-extern void interruptible_sleep_on(wait_queue_head_t *q);
-
-#define mid_sched       ((unsigned long) interruptible_sleep_on)
-
 #ifdef CONFIG_FRAME_POINTER
 static int in_sh64_switch_to(unsigned long pc)
 {
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 9be35f348093..7759a9a93211 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -2,7 +2,7 @@
  * SuperH process tracing
  *
  * Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
- * Copyright (C) 2002 - 2008  Paul Mundt
+ * Copyright (C) 2002 - 2009  Paul Mundt
  *
  * Audit support by Yuichi Nakamura <ynakam@hitachisoft.jp>
  *
@@ -17,7 +17,6 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/user.h>
-#include <linux/slab.h>
 #include <linux/security.h>
 #include <linux/signal.h>
 #include <linux/io.h>
@@ -26,6 +25,7 @@
 #include <linux/tracehook.h>
 #include <linux/elf.h>
 #include <linux/regset.h>
+#include <linux/hw_breakpoint.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -63,33 +63,64 @@ static inline int put_stack_long(struct task_struct *task, int offset,
         return 0;
 }
 
-void user_enable_single_step(struct task_struct *child)
+void ptrace_triggered(struct perf_event *bp, int nmi,
+                      struct perf_sample_data *data, struct pt_regs *regs)
 {
-        /* Next scheduling will set up UBC */
-        if (child->thread.ubc_pc == 0)
-                ubc_usercnt += 1;
+        struct perf_event_attr attr;
+
+        /*
+         * Disable the breakpoint request here since ptrace has defined a
+         * one-shot behaviour for breakpoint exceptions.
+         */
+        attr = bp->attr;
+        attr.disabled = true;
+        modify_user_hw_breakpoint(bp, &attr);
+}
+
+static int set_single_step(struct task_struct *tsk, unsigned long addr)
+{
+        struct thread_struct *thread = &tsk->thread;
+        struct perf_event *bp;
+        struct perf_event_attr attr;
+
+        bp = thread->ptrace_bps[0];
+        if (!bp) {
+                hw_breakpoint_init(&attr);
+
+                attr.bp_addr = addr;
+                attr.bp_len = HW_BREAKPOINT_LEN_2;
+                attr.bp_type = HW_BREAKPOINT_R;
+
+                bp = register_user_hw_breakpoint(&attr, ptrace_triggered, tsk);
+                if (IS_ERR(bp))
+                        return PTR_ERR(bp);
+
+                thread->ptrace_bps[0] = bp;
+        } else {
+                int err;
+
+                attr = bp->attr;
+                attr.bp_addr = addr;
+                err = modify_user_hw_breakpoint(bp, &attr);
+                if (unlikely(err))
+                        return err;
+        }
+
+        return 0;
+}
 
-        child->thread.ubc_pc = get_stack_long(child,
-                                offsetof(struct pt_regs, pc));
+void user_enable_single_step(struct task_struct *child)
+{
+        unsigned long pc = get_stack_long(child, offsetof(struct pt_regs, pc));
 
         set_tsk_thread_flag(child, TIF_SINGLESTEP);
+
+        set_single_step(child, pc);
 }
 
 void user_disable_single_step(struct task_struct *child)
 {
         clear_tsk_thread_flag(child, TIF_SINGLESTEP);
-
-        /*
-         * Ensure the UBC is not programmed at the next context switch.
-         *
-         * Normally this is not needed but there are sequences such as
-         * singlestep, signal delivery, and continue that leave the
-         * ubc_pc non-zero leading to spurious SIGTRAPs.
-         */
-        if (child->thread.ubc_pc != 0) {
-                ubc_usercnt -= 1;
-                child->thread.ubc_pc = 0;
-        }
 }
 
 /*
@@ -163,10 +194,10 @@ int fpregs_get(struct task_struct *target,
 
         if ((boot_cpu_data.flags & CPU_HAS_FPU))
                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
-                                           &target->thread.fpu.hard, 0, -1);
+                                           &target->thread.xstate->hardfpu, 0, -1);
 
         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
-                                   &target->thread.fpu.soft, 0, -1);
+                                   &target->thread.xstate->softfpu, 0, -1);
 }
 
 static int fpregs_set(struct task_struct *target,
@@ -184,10 +215,10 @@ static int fpregs_set(struct task_struct *target,
 
         if ((boot_cpu_data.flags & CPU_HAS_FPU))
                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-                                          &target->thread.fpu.hard, 0, -1);
+                                          &target->thread.xstate->hardfpu, 0, -1);
 
         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-                                  &target->thread.fpu.soft, 0, -1);
+                                  &target->thread.xstate->softfpu, 0, -1);
 }
 
 static int fpregs_active(struct task_struct *target,
@@ -333,7 +364,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                 else
                                         tmp = 0;
                         } else
-                                tmp = ((long *)&child->thread.fpu)
+                                tmp = ((long *)child->thread.xstate)
                                         [(addr - (long)&dummy->fpu) >> 2];
                 } else if (addr == (long) &dummy->u_fpvalid)
                         tmp = !!tsk_used_math(child);
@@ -362,7 +393,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 else if (addr >= (long) &dummy->fpu &&
                          addr < (long) &dummy->u_fpvalid) {
                         set_stopped_child_used_math(child);
-                        ((long *)&child->thread.fpu)
+                        ((long *)child->thread.xstate)
                                 [(addr - (long)&dummy->fpu) >> 2] = data;
                         ret = 0;
                 } else if (addr == (long) &dummy->u_fpvalid) {
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 952da83903da..5fd644da7f02 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -82,13 +82,13 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
 
         if (last_task_used_math == task) {
                 enable_fpu();
-                save_fpu(task, regs);
+                save_fpu(task);
                 disable_fpu();
                 last_task_used_math = 0;
                 regs->sr |= SR_FD;
         }
 
-        tmp = ((long *)&task->thread.fpu)[addr / sizeof(unsigned long)];
+        tmp = ((long *)task->thread.xstate)[addr / sizeof(unsigned long)];
         return tmp;
 }
 
@@ -114,17 +114,16 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
         regs = (struct pt_regs*)((unsigned char *)task + THREAD_SIZE) - 1;
 
         if (!tsk_used_math(task)) {
-                fpinit(&task->thread.fpu.hard);
-                set_stopped_child_used_math(task);
+                init_fpu(task);
         } else if (last_task_used_math == task) {
                 enable_fpu();
-                save_fpu(task, regs);
+                save_fpu(task);
                 disable_fpu();
                 last_task_used_math = 0;
                 regs->sr |= SR_FD;
         }
 
-        ((long *)&task->thread.fpu)[addr / sizeof(unsigned long)] = data;
+        ((long *)task->thread.xstate)[addr / sizeof(unsigned long)] = data;
         return 0;
 }
 
@@ -133,6 +132,8 @@ void user_enable_single_step(struct task_struct *child)
         struct pt_regs *regs = child->thread.uregs;
 
         regs->sr |= SR_SSTEP;   /* auto-resetting upon exception */
+
+        set_tsk_thread_flag(child, TIF_SINGLESTEP);
 }
 
 void user_disable_single_step(struct task_struct *child)
@@ -140,6 +141,8 @@ void user_disable_single_step(struct task_struct *child)
         struct pt_regs *regs = child->thread.uregs;
 
         regs->sr &= ~SR_SSTEP;
+
+        clear_tsk_thread_flag(child, TIF_SINGLESTEP);
 }
 
 static int genregs_get(struct task_struct *target,
@@ -222,7 +225,7 @@ int fpregs_get(struct task_struct *target,
                 return ret;
 
         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
-                                   &target->thread.fpu.hard, 0, -1);
+                                   &target->thread.xstate->hardfpu, 0, -1);
 }
 
 static int fpregs_set(struct task_struct *target,
@@ -239,7 +242,7 @@ static int fpregs_set(struct task_struct *target,
         set_stopped_child_used_math(target);
 
         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-                                  &target->thread.fpu.hard, 0, -1);
+                                  &target->thread.xstate->hardfpu, 0, -1);
 }
 
 static int fpregs_active(struct task_struct *target,
@@ -454,6 +457,8 @@ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs)
 
 asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
 {
+        int step;
+
         if (unlikely(current->audit_context))
                 audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]),
                                    regs->regs[9]);
@@ -461,8 +466,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
                 trace_sys_exit(regs, regs->regs[9]);
 
-        if (test_thread_flag(TIF_SYSCALL_TRACE))
-                tracehook_report_syscall_exit(regs, 0);
+        step = test_thread_flag(TIF_SINGLESTEP);
+        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
+                tracehook_report_syscall_exit(regs, step);
 }
 
 /* Called with interrupts disabled */
@@ -479,9 +485,10 @@ asmlinkage void do_single_step(unsigned long long vec, struct pt_regs *regs)
 }
 
 /* Called with interrupts disabled */
-asmlinkage void do_software_break_point(unsigned long long vec,
-                                        struct pt_regs *regs)
+BUILD_TRAP_HANDLER(breakpoint)
 {
+        TRAP_HANDLER_DECL;
+
         /* We need to forward step the PC, to counteract the backstep done
            in signal.c. */
         local_irq_enable();
diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c
new file mode 100644
index 000000000000..b1fca66bb92e
--- /dev/null
+++ b/arch/sh/kernel/reboot.c
@@ -0,0 +1,98 @@
+#include <linux/pm.h>
+#include <linux/kexec.h>
+#include <linux/kernel.h>
+#include <linux/reboot.h>
+#include <linux/module.h>
+#ifdef CONFIG_SUPERH32
+#include <asm/watchdog.h>
+#endif
+#include <asm/addrspace.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void (*pm_power_off)(void);
+EXPORT_SYMBOL(pm_power_off);
+
+#ifdef CONFIG_SUPERH32
+static void watchdog_trigger_immediate(void)
+{
+        sh_wdt_write_cnt(0xFF);
+        sh_wdt_write_csr(0xC2);
+}
+#endif
+
+static void native_machine_restart(char * __unused)
+{
+        local_irq_disable();
+
+        /* Address error with SR.BL=1 first. */
+        trigger_address_error();
+
+#ifdef CONFIG_SUPERH32
+        /* If that fails or is unsupported, go for the watchdog next. */
+        watchdog_trigger_immediate();
+#endif
+
+        /*
+         * Give up and sleep.
+         */
+        while (1)
+                cpu_sleep();
+}
+
+static void native_machine_shutdown(void)
+{
+        smp_send_stop();
+}
+
+static void native_machine_power_off(void)
+{
+        if (pm_power_off)
+                pm_power_off();
+}
+
+static void native_machine_halt(void)
+{
+        /* stop other cpus */
+        machine_shutdown();
+
+        /* stop this cpu */
+        stop_this_cpu(NULL);
+}
+
+struct machine_ops machine_ops = {
+        .power_off      = native_machine_power_off,
+        .shutdown       = native_machine_shutdown,
+        .restart        = native_machine_restart,
+        .halt           = native_machine_halt,
+#ifdef CONFIG_KEXEC
+        .crash_shutdown = native_machine_crash_shutdown,
+#endif
+};
+
+void machine_power_off(void)
+{
+        machine_ops.power_off();
+}
+
+void machine_shutdown(void)
+{
+        machine_ops.shutdown();
+}
+
+void machine_restart(char *cmd)
+{
+        machine_ops.restart(cmd);
+}
+
+void machine_halt(void)
+{
+        machine_ops.halt();
+}
+
+#ifdef CONFIG_KEXEC
+void machine_crash_shutdown(struct pt_regs *regs)
+{
+        machine_ops.crash_shutdown(regs);
+}
+#endif
diff --git a/arch/sh/kernel/return_address.c b/arch/sh/kernel/return_address.c
new file mode 100644
index 000000000000..cbf1dd5372b2
--- /dev/null
+++ b/arch/sh/kernel/return_address.c
@@ -0,0 +1,57 @@
+/*
+ * arch/sh/kernel/return_address.c
+ *
+ * Copyright (C) 2009  Matt Fleming
+ * Copyright (C) 2009  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/dwarf.h>
+
+#ifdef CONFIG_DWARF_UNWINDER
+
+void *return_address(unsigned int depth)
+{
+        struct dwarf_frame *frame;
+        unsigned long ra;
+        int i;
+
+        for (i = 0, frame = NULL, ra = 0; i <= depth; i++) {
+                struct dwarf_frame *tmp;
+
+                tmp = dwarf_unwind_stack(ra, frame);
+
+                if (frame)
+                        dwarf_free_frame(frame);
+
+                frame = tmp;
+
+                if (!frame || !frame->return_addr)
+                        break;
+
+                ra = frame->return_addr;
+        }
+
+        /* Failed to unwind the stack to the specified depth. */
+        WARN_ON(i != depth + 1);
+
+        if (frame)
+                dwarf_free_frame(frame);
+
+        return (void *)ra;
+}
+
+#else
+
+void *return_address(unsigned int depth)
+{
+        return NULL;
+}
+
+#endif
+
+EXPORT_SYMBOL_GPL(return_address);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 99b4fb553bf1..8870d6ba64bf 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -421,8 +421,13 @@ void __init setup_arch(char **cmdline_p)
 
         parse_early_param();
 
+        uncached_init();
+
         plat_early_device_setup();
 
+        /* Let earlyprintk output early console messages */
+        early_platform_driver_probe("earlyprintk", 1, 1);
+
         sh_mv_setup();
 
         /*
@@ -438,7 +443,7 @@ void __init setup_arch(char **cmdline_p)
 
         nodes_clear(node_online_map);
 
-        /* Setup bootmem with available RAM */
+        pmb_init();
         lmb_init();
         setup_memory();
         sparse_init();
@@ -446,13 +451,14 @@ void __init setup_arch(char **cmdline_p)
 #ifdef CONFIG_DUMMY_CONSOLE
         conswitchp = &dummy_con;
 #endif
+        paging_init();
+
+        ioremap_fixed_init();
 
         /* Perform the machine specific initialisation */
         if (likely(sh_mv.mv_setup))
                 sh_mv.mv_setup(cmdline_p);
 
-        paging_init();
-
 #ifdef CONFIG_SMP
         plat_smp_setup();
 #endif
diff --git a/arch/sh/kernel/sh_bios.c b/arch/sh/kernel/sh_bios.c
index c852f7805728..47475cca068a 100644
--- a/arch/sh/kernel/sh_bios.c
+++ b/arch/sh/kernel/sh_bios.c
@@ -1,19 +1,30 @@
 /*
- *  linux/arch/sh/kernel/sh_bios.c
  *  C interface for trapping into the standard LinuxSH BIOS.
  *
  *  Copyright (C) 2000 Greg Banks, Mitch Davis
+ *  Copyright (C) 1999, 2000  Niibe Yutaka
+ *  Copyright (C) 2002  M. R. Brown
+ *  Copyright (C) 2004 - 2010  Paul Mundt
  *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  */
 #include <linux/module.h>
+#include <linux/console.h>
+#include <linux/tty.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/delay.h>
 #include <asm/sh_bios.h>
 
 #define BIOS_CALL_CONSOLE_WRITE         0
 #define BIOS_CALL_ETH_NODE_ADDR         10
 #define BIOS_CALL_SHUTDOWN              11
-#define BIOS_CALL_CHAR_OUT              0x1f    /* TODO: hack */
 #define BIOS_CALL_GDB_DETACH            0xff
 
+void *gdb_vbr_vector = NULL;
+
 static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
                                     long arg3)
 {
@@ -23,6 +34,9 @@ static inline long sh_bios_call(long func, long arg0, long arg1, long arg2,
         register long r6 __asm__("r6") = arg2;
         register long r7 __asm__("r7") = arg3;
 
+        if (!gdb_vbr_vector)
+                return -ENOSYS;
+
         __asm__ __volatile__("trapa     #0x3f":"=z"(r0)
                              :"0"(r0), "r"(r4), "r"(r5), "r"(r6), "r"(r7)
                              :"memory");
@@ -34,11 +48,6 @@ void sh_bios_console_write(const char *buf, unsigned int len)
         sh_bios_call(BIOS_CALL_CONSOLE_WRITE, (long)buf, (long)len, 0, 0);
 }
 
-void sh_bios_char_out(char ch)
-{
-        sh_bios_call(BIOS_CALL_CHAR_OUT, ch, 0, 0, 0);
-}
-
 void sh_bios_gdb_detach(void)
 {
         sh_bios_call(BIOS_CALL_GDB_DETACH, 0, 0, 0, 0);
@@ -55,3 +64,109 @@ void sh_bios_shutdown(unsigned int how)
 {
         sh_bios_call(BIOS_CALL_SHUTDOWN, how, 0, 0, 0);
 }
+
+/*
+ * Read the old value of the VBR register to initialise the vector
+ * through which debug and BIOS traps are delegated by the Linux trap
+ * handler.
+ */
+void sh_bios_vbr_init(void)
+{
+        unsigned long vbr;
+
+        if (unlikely(gdb_vbr_vector))
+                return;
+
+        __asm__ __volatile__ ("stc vbr, %0" : "=r" (vbr));
+
+        if (vbr) {
+                gdb_vbr_vector = (void *)(vbr + 0x100);
+                printk(KERN_NOTICE "Setting GDB trap vector to %p\n",
+                       gdb_vbr_vector);
+        } else
+                printk(KERN_NOTICE "SH-BIOS not detected\n");
+}
+
+/**
+ * sh_bios_vbr_reload - Re-load the system VBR from the BIOS vector.
+ *
+ * This can be used by save/restore code to reinitialize the system VBR
+ * from the fixed BIOS VBR. A no-op if no BIOS VBR is known.
+ */
+void sh_bios_vbr_reload(void)
+{
+        if (gdb_vbr_vector)
+                __asm__ __volatile__ (
+                        "ldc %0, vbr"
+                        :
+                        : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
+                        : "memory"
+                );
+}
+
+/*
+ *      Print a string through the BIOS
+ */
+static void sh_console_write(struct console *co, const char *s,
+                                 unsigned count)
+{
+        sh_bios_console_write(s, count);
+}
+
+/*
+ *      Setup initial baud/bits/parity. We do two things here:
+ *      - construct a cflag setting for the first rs_open()
+ *      - initialize the serial port
+ *      Return non-zero if we didn't find a serial port.
+ */
+static int __init sh_console_setup(struct console *co, char *options)
+{
+        int     cflag = CREAD | HUPCL | CLOCAL;
+
+        /*
+         *      Now construct a cflag setting.
+         *      TODO: this is a totally bogus cflag, as we have
+         *      no idea what serial settings the BIOS is using, or
+         *      even if its using the serial port at all.
+         */
+        cflag |= B115200 | CS8 | /*no parity*/0;
+
+        co->cflag = cflag;
+
+        return 0;
+}
+
+static struct console bios_console = {
+        .name           = "bios",
+        .write          = sh_console_write,
+        .setup          = sh_console_setup,
+        .flags          = CON_PRINTBUFFER,
+        .index          = -1,
+};
+
+static struct console *early_console;
+
+static int __init setup_early_printk(char *buf)
+{
+        int keep_early = 0;
+
+        if (!buf)
+                return 0;
+
+        if (strstr(buf, "keep"))
+                keep_early = 1;
+
+        if (!strncmp(buf, "bios", 4))
+                early_console = &bios_console;
+
+        if (likely(early_console)) {
+                if (keep_early)
+                        early_console->flags &= ~CON_BOOT;
+                else
+                        early_console->flags |= CON_BOOT;
+                register_console(early_console);
+        }
+
+        return 0;
+}
+early_param("earlyprintk", setup_early_printk);
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 444cce3ae921..3896f26efa4a 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -1,37 +1,11 @@
 #include <linux/module.h>
-#include <linux/smp.h>
-#include <linux/user.h>
-#include <linux/elfcore.h>
-#include <linux/sched.h>
-#include <linux/in6.h>
-#include <linux/interrupt.h>
-#include <linux/vmalloc.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <asm/sections.h>
-#include <asm/processor.h>
-#include <asm/uaccess.h>
+#include <linux/string.h>
+#include <linux/uaccess.h>
+#include <linux/delay.h>
+#include <linux/mm.h>
 #include <asm/checksum.h>
-#include <asm/io.h>
-#include <asm/delay.h>
-#include <asm/tlbflush.h>
-#include <asm/cacheflush.h>
-#include <asm/ftrace.h>
-
-extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
-
-/* platform dependent support */
-EXPORT_SYMBOL(dump_fpu);
-EXPORT_SYMBOL(kernel_thread);
-EXPORT_SYMBOL(strlen);
-
-/* PCI exports */
-#ifdef CONFIG_PCI
-EXPORT_SYMBOL(pci_alloc_consistent);
-EXPORT_SYMBOL(pci_free_consistent);
-#endif
+#include <asm/sections.h>
 
-/* mem exports */
 EXPORT_SYMBOL(memchr);
 EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(memset);
@@ -40,6 +14,13 @@ EXPORT_SYMBOL(__copy_user);
 EXPORT_SYMBOL(__udelay);
 EXPORT_SYMBOL(__ndelay);
 EXPORT_SYMBOL(__const_udelay);
+EXPORT_SYMBOL(strlen);
+EXPORT_SYMBOL(csum_partial);
+EXPORT_SYMBOL(csum_partial_copy_generic);
+EXPORT_SYMBOL(copy_page);
+EXPORT_SYMBOL(__clear_user);
+EXPORT_SYMBOL(_ebss);
+EXPORT_SYMBOL(empty_zero_page);
 
 #define DECLARE_EXPORT(name)            \
         extern void name(void);EXPORT_SYMBOL(name)
@@ -107,30 +88,6 @@ DECLARE_EXPORT(__sdivsi3_i4);
 DECLARE_EXPORT(__udivsi3_i4);
 DECLARE_EXPORT(__sdivsi3_i4i);
 DECLARE_EXPORT(__udivsi3_i4i);
-
-#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
-        defined(CONFIG_SH7705_CACHE_32KB))
-/* needed by some modules */
-EXPORT_SYMBOL(flush_cache_all);
-EXPORT_SYMBOL(flush_cache_range);
-EXPORT_SYMBOL(flush_dcache_page);
-#endif
-
 #ifdef CONFIG_MCOUNT
 DECLARE_EXPORT(mcount);
 #endif
-EXPORT_SYMBOL(csum_partial);
-EXPORT_SYMBOL(csum_partial_copy_generic);
-#ifdef CONFIG_IPV6
-EXPORT_SYMBOL(csum_ipv6_magic);
-#endif
-EXPORT_SYMBOL(copy_page);
-EXPORT_SYMBOL(__clear_user);
-EXPORT_SYMBOL(_ebss);
-EXPORT_SYMBOL(empty_zero_page);
-
-#ifndef CONFIG_CACHE_OFF
-EXPORT_SYMBOL(__flush_purge_region);
-EXPORT_SYMBOL(__flush_wback_region);
-EXPORT_SYMBOL(__flush_invalidate_region);
-#endif
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index d008e17eb257..45afa5c51f67 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -24,16 +24,6 @@
 #include <asm/delay.h>
 #include <asm/irq.h>
 
-extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
-
-/* platform dependent support */
-EXPORT_SYMBOL(dump_fpu);
-EXPORT_SYMBOL(kernel_thread);
-
-#ifdef CONFIG_VT
-EXPORT_SYMBOL(screen_info);
-#endif
-
 EXPORT_SYMBOL(__put_user_asm_b);
 EXPORT_SYMBOL(__put_user_asm_w);
 EXPORT_SYMBOL(__put_user_asm_l);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 3db37425210d..579cd2ca358d 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -67,7 +67,8 @@ sys_sigsuspend(old_sigset_t mask,
 
         current->state = TASK_INTERRUPTIBLE;
         schedule();
-        set_thread_flag(TIF_RESTORE_SIGMASK);
+        set_restore_sigmask();
+
         return -ERESTARTNOHAND;
 }
 
@@ -149,7 +150,7 @@ static inline int restore_sigcontext_fpu(struct sigcontext __user *sc)
                 return 0;
 
         set_used_math();
-        return __copy_from_user(&tsk->thread.fpu.hard, &sc->sc_fpregs[0],
+        return __copy_from_user(&tsk->thread.xstate->hardfpu, &sc->sc_fpregs[0],
                                 sizeof(long)*(16*2+2));
 }
 
@@ -174,7 +175,7 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc,
         clear_used_math();
 
         unlazy_fpu(tsk, regs);
-        return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.fpu.hard,
+        return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.xstate->hardfpu,
                               sizeof(long)*(16*2+2));
 }
 #endif /* CONFIG_SH_FPU */
@@ -527,7 +528,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs,
                 /* fallthrough */
                 case -ERESTARTNOINTR:
                         regs->regs[0] = save_r0;
-                        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+                        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
                         break;
         }
 }
@@ -590,7 +591,7 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
         if (try_to_freeze())
                 goto no_signal;
 
-        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK)
                 oldset = &current->saved_sigmask;
         else
                 oldset = &current->blocked;
@@ -602,12 +603,13 @@ static void do_signal(struct pt_regs *regs, unsigned int save_r0)
                 /* Whee!  Actually deliver the signal.  */
                 if (handle_signal(signr, &ka, &info, oldset,
                                   regs, save_r0) == 0) {
-                        /* a signal was successfully delivered; the saved
+                        /*
+                         * A signal was successfully delivered; the saved
                          * sigmask will have been stored in the signal frame,
                          * and will be restored by sigreturn, so we can simply
-                         * clear the TIF_RESTORE_SIGMASK flag */
-                        if (test_thread_flag(TIF_RESTORE_SIGMASK))
-                                clear_thread_flag(TIF_RESTORE_SIGMASK);
+                         * clear the TS_RESTORE_SIGMASK flag
+                         */
+                        current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
 
                         tracehook_signal_handler(signr, &info, &ka, regs,
                                         test_thread_flag(TIF_SINGLESTEP));
@@ -624,17 +626,19 @@ no_signal:
                     regs->regs[0] == -ERESTARTSYS ||
                     regs->regs[0] == -ERESTARTNOINTR) {
                         regs->regs[0] = save_r0;
-                        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+                        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
                 } else if (regs->regs[0] == -ERESTART_RESTARTBLOCK) {
-                        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+                        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
                         regs->regs[3] = __NR_restart_syscall;
                 }
         }
 
-        /* if there's no signal to deliver, we just put the saved sigmask
-         * back */
-        if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
-                clear_thread_flag(TIF_RESTORE_SIGMASK);
+        /*
+         * If there's no signal to deliver, we just put the saved sigmask
+         * back.
+         */
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+                current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
                 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
         }
 }
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 74793c80a57a..5a9f1f10ebf4 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -101,7 +101,7 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
         if (try_to_freeze())
                 goto no_signal;
 
-        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK)
                 oldset = &current->saved_sigmask;
         else if (!oldset)
                 oldset = &current->blocked;
@@ -115,12 +115,12 @@ static int do_signal(struct pt_regs *regs, sigset_t *oldset)
                         /*
                          * If a signal was successfully delivered, the
                          * saved sigmask is in its frame, and we can
-                         * clear the TIF_RESTORE_SIGMASK flag.
+                         * clear the TS_RESTORE_SIGMASK flag.
                          */
-                        if (test_thread_flag(TIF_RESTORE_SIGMASK))
-                                clear_thread_flag(TIF_RESTORE_SIGMASK);
+                        current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
 
-                        tracehook_signal_handler(signr, &info, &ka, regs, 0);
+                        tracehook_signal_handler(signr, &info, &ka, regs,
+                                        test_thread_flag(TIF_SINGLESTEP));
                         return 1;
                 }
         }
@@ -146,8 +146,8 @@ no_signal:
         }
 
         /* No signal to deliver -- put the saved sigmask back */
-        if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
-                clear_thread_flag(TIF_RESTORE_SIGMASK);
+        if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
+                current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
                 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
         }
 
@@ -176,6 +176,7 @@ sys_sigsuspend(old_sigset_t mask,
         while (1) {
                 current->state = TASK_INTERRUPTIBLE;
                 schedule();
+                set_restore_sigmask();
                 regs->pc += 4;    /* because sys_sigreturn decrements the pc */
                 if (do_signal(regs, &saveset)) {
                         /* pc now points at signal handler. Need to decrement
@@ -296,7 +297,7 @@ restore_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
                 regs->sr |= SR_FD;
         }
 
-        err |= __copy_from_user(&current->thread.fpu.hard, &sc->sc_fpregs[0],
+        err |= __copy_from_user(&current->thread.xstate->hardfpu, &sc->sc_fpregs[0],
                                 (sizeof(long long) * 32) + (sizeof(int) * 1));
 
         return err;
@@ -315,13 +316,13 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
 
         if (current == last_task_used_math) {
                 enable_fpu();
-                save_fpu(current, regs);
+                save_fpu(current);
                 disable_fpu();
                 last_task_used_math = NULL;
                 regs->sr |= SR_FD;
         }
 
-        err |= __copy_to_user(&sc->sc_fpregs[0], &current->thread.fpu.hard,
+        err |= __copy_to_user(&sc->sc_fpregs[0], &current->thread.xstate->hardfpu,
                               (sizeof(long long) * 32) + (sizeof(int) * 1));
         clear_used_math();
 
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 160db1003cfb..002cc612deef 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -69,6 +69,7 @@ asmlinkage void __cpuinit start_secondary(void)
         unsigned int cpu;
         struct mm_struct *mm = &init_mm;
 
+        enable_mmu();
         atomic_inc(&mm->mm_count);
         atomic_inc(&mm->mm_users);
         current->active_mm = mm;
@@ -122,7 +123,9 @@ int __cpuinit __cpu_up(unsigned int cpu)
         stack_start.bss_start = 0; /* don't clear bss for secondary cpus */
         stack_start.start_kernel_fn = start_secondary;
 
-        flush_cache_all();
+        flush_icache_range((unsigned long)&stack_start,
+                           (unsigned long)&stack_start + sizeof(stack_start));
+        wmb();
 
         plat_start_cpu(cpu, (unsigned long)_stext);
 
@@ -159,15 +162,6 @@ void smp_send_reschedule(int cpu)
         plat_send_ipi(cpu, SMP_MSG_RESCHEDULE);
 }
 
-static void stop_this_cpu(void *unused)
-{
-        cpu_clear(smp_processor_id(), cpu_online_map);
-        local_irq_disable();
-
-        for (;;)
-                cpu_relax();
-}
-
 void smp_send_stop(void)
 {
         smp_call_function(stop_this_cpu, 0, 0);
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 8aa5d1ceaf14..81f58371613d 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -28,37 +28,13 @@
 #include <asm/cacheflush.h>
 #include <asm/cachectl.h>
 
-static inline long
-do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
-         unsigned long flags, int fd, unsigned long pgoff)
-{
-        int error = -EBADF;
-        struct file *file = NULL;
-
-        flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-        if (!(flags & MAP_ANONYMOUS)) {
-                file = fget(fd);
-                if (!file)
-                        goto out;
-        }
-
-        down_write(&current->mm->mmap_sem);
-        error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
-        up_write(&current->mm->mmap_sem);
-
-        if (file)
-                fput(file);
-out:
-        return error;
-}
-
 asmlinkage int old_mmap(unsigned long addr, unsigned long len,
         unsigned long prot, unsigned long flags,
         int fd, unsigned long off)
 {
         if (off & ~PAGE_MASK)
                 return -EINVAL;
-        return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
+        return sys_mmap_pgoff(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
 }
 
 asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
@@ -74,111 +50,7 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
 
         pgoff >>= PAGE_SHIFT - 12;
 
-        return do_mmap2(addr, len, prot, flags, fd, pgoff);
-}
-
-/*
- * sys_ipc() is the de-multiplexer for the SysV IPC calls..
- *
- * This is really horribly ugly.
- */
-asmlinkage int sys_ipc(uint call, int first, int second,
-                       int third, void __user *ptr, long fifth)
-{
-        int version, ret;
-
-        version = call >> 16; /* hack for backward compatibility */
-        call &= 0xffff;
-
-        if (call <= SEMTIMEDOP)
-                switch (call) {
-                case SEMOP:
-                        return sys_semtimedop(first,
-                                              (struct sembuf __user *)ptr,
-                                              second, NULL);
-                case SEMTIMEDOP:
-                        return sys_semtimedop(first,
-                                (struct sembuf __user *)ptr, second,
-                                (const struct timespec __user *)fifth);
-                case SEMGET:
-                        return sys_semget (first, second, third);
-                case SEMCTL: {
-                        union semun fourth;
-                        if (!ptr)
-                                return -EINVAL;
-                        if (get_user(fourth.__pad, (void __user * __user *) ptr))
-                                return -EFAULT;
-                        return sys_semctl (first, second, third, fourth);
-                        }
-                default:
-                        return -EINVAL;
-                }
-
-        if (call <= MSGCTL)
-                switch (call) {
-                case MSGSND:
-                        return sys_msgsnd (first, (struct msgbuf __user *) ptr,
-                                          second, third);
-                case MSGRCV:
-                        switch (version) {
-                        case 0:
-                        {
-                                struct ipc_kludge tmp;
-
-                                if (!ptr)
-                                        return -EINVAL;
-
-                                if (copy_from_user(&tmp,
-                                        (struct ipc_kludge __user *) ptr,
-                                                   sizeof (tmp)))
-                                        return -EFAULT;
-
-                                return sys_msgrcv (first, tmp.msgp, second,
-                                                   tmp.msgtyp, third);
-                        }
-                        default:
-                                return sys_msgrcv (first,
-                                                   (struct msgbuf __user *) ptr,
-                                                   second, fifth, third);
-                        }
-                case MSGGET:
-                        return sys_msgget ((key_t) first, second);
-                case MSGCTL:
-                        return sys_msgctl (first, second,
-                                           (struct msqid_ds __user *) ptr);
-                default:
-                        return -EINVAL;
-                }
-        if (call <= SHMCTL)
-                switch (call) {
-                case SHMAT:
-                        switch (version) {
-                        default: {
-                                ulong raddr;
-                                ret = do_shmat (first, (char __user *) ptr,
-                                                 second, &raddr);
-                                if (ret)
-                                        return ret;
-                                return put_user (raddr, (ulong __user *) third);
-                        }
-                        case 1: /* iBCS2 emulator entry point */
-                                if (!segment_eq(get_fs(), get_ds()))
-                                        return -EINVAL;
-                                return do_shmat (first, (char __user *) ptr,
-                                                  second, (ulong *) third);
-                        }
-                case SHMDT:
-                        return sys_shmdt ((char __user *)ptr);
-                case SHMGET:
-                        return sys_shmget (first, second, third);
-                case SHMCTL:
-                        return sys_shmctl (first, second,
-                                           (struct shmid_ds __user *) ptr);
-                default:
-                        return -EINVAL;
-                }
-
-        return -EINVAL;
+        return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff);
 }
 
 /* sys_cacheflush -- flush (part of) the processor cache.  */
@@ -221,14 +93,3 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
         up_read(&current->mm->mmap_sem);
         return 0;
 }
-
-asmlinkage int sys_uname(struct old_utsname __user *name)
-{
-        int err;
-        if (!name)
-                return -EFAULT;
-        down_read(&uts_sem);
-        err = copy_to_user(name, utsname(), sizeof(*name));
-        up_read(&uts_sem);
-        return err?-EFAULT:0;
-}
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index 5bfde6c77498..2048a20d7c80 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -391,3 +391,5 @@ sys_call_table:
         .long sys_pwritev
         .long sys_rt_tgsigqueueinfo
         .long sys_perf_event_open
+        .long sys_recvmmsg              /* 365 */
+        .long sys_accept4
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 953fa1613312..8a0072de2bcc 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -39,12 +39,12 @@ static int null_rtc_set_time(const time_t secs)
 void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
 int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
 
-#ifdef CONFIG_GENERIC_CMOS_UPDATE
 void read_persistent_clock(struct timespec *ts)
 {
         rtc_sh_get_time(ts);
 }
 
+#ifdef CONFIG_GENERIC_CMOS_UPDATE
 int update_persistent_clock(struct timespec now)
 {
         return rtc_sh_set_time(now.tv_sec);
@@ -113,9 +113,5 @@ void __init time_init(void)
         hwblk_init();
         clk_init();
 
-        rtc_sh_get_time(&xtime);
-        set_normalized_timespec(&wall_to_monotonic,
-                                -xtime.tv_sec, -xtime.tv_nsec);
-
         late_time_init = sh_late_time_init;
 }
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 0838942b7083..9b0b633b6c92 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -16,6 +16,32 @@
 
 static DEFINE_PER_CPU(struct cpu, cpu_devices);
 
+cpumask_t cpu_core_map[NR_CPUS];
+
+static cpumask_t cpu_coregroup_map(unsigned int cpu)
+{
+        /*
+         * Presently all SH-X3 SMP cores are multi-cores, so just keep it
+         * simple until we have a method for determining topology..
+         */
+        return cpu_possible_map;
+}
+
+const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+{
+        return &cpu_core_map[cpu];
+}
+
+int arch_update_cpu_topology(void)
+{
+        unsigned int cpu;
+
+        for_each_possible_cpu(cpu)
+                cpu_core_map[cpu] = cpu_coregroup_map(cpu);
+
+        return 0;
+}
+
 static int __init topology_init(void)
 {
         int i, ret;
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index a8396f36bd14..0830c2a9f712 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -9,8 +9,8 @@
 #include <asm/unwinder.h>
 #include <asm/system.h>
 
-#ifdef CONFIG_BUG
-void handle_BUG(struct pt_regs *regs)
+#ifdef CONFIG_GENERIC_BUG
+static void handle_BUG(struct pt_regs *regs)
 {
         const struct bug_entry *bug;
         unsigned long bugaddr = regs->pc;
@@ -58,7 +58,7 @@ BUILD_TRAP_HANDLER(debug)
         TRAP_HANDLER_DECL;
 
         /* Rewind */
-        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
 
         if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff,
                        SIGTRAP) == NOTIFY_STOP)
@@ -75,13 +75,13 @@ BUILD_TRAP_HANDLER(bug)
         TRAP_HANDLER_DECL;
 
         /* Rewind */
-        regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
+        regs->pc -= instruction_size(__raw_readw(regs->pc - 4));
 
         if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff,
                        SIGTRAP) == NOTIFY_STOP)
                 return;
 
-#ifdef CONFIG_BUG
+#ifdef CONFIG_GENERIC_BUG
         if (__kernel_text_address(instruction_pointer(regs))) {
                 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs);
                 if (insn == TRAPA_BUG_OPCODE)
@@ -95,9 +95,11 @@ BUILD_TRAP_HANDLER(bug)
 
 BUILD_TRAP_HANDLER(nmi)
 {
+        unsigned int cpu = smp_processor_id();
         TRAP_HANDLER_DECL;
 
         nmi_enter();
+        nmi_count(cpu)++;
 
         switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) {
         case NOTIFY_OK:
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 7a2ee3a6b8e7..c3d86fa71ddf 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -24,10 +24,10 @@
 #include <linux/kdebug.h>
 #include <linux/kexec.h>
 #include <linux/limits.h>
-#include <linux/proc_fs.h>
 #include <linux/sysfs.h>
+#include <linux/uaccess.h>
 #include <asm/system.h>
-#include <asm/uaccess.h>
+#include <asm/alignment.h>
 #include <asm/fpu.h>
 #include <asm/kprobes.h>
 
@@ -46,85 +46,6 @@
 #define TRAP_ILLEGAL_SLOT_INST  13
 #endif
 
-static unsigned long se_user;
-static unsigned long se_sys;
-static unsigned long se_half;
-static unsigned long se_word;
-static unsigned long se_dword;
-static unsigned long se_multi;
-/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
-   valid! */
-static int se_usermode = 3;
-/* 0: no warning 1: print a warning message, disabled by default */
-static int se_kernmode_warn;
-
-#ifdef CONFIG_PROC_FS
-static const char *se_usermode_action[] = {
-        "ignored",
-        "warn",
-        "fixup",
-        "fixup+warn",
-        "signal",
-        "signal+warn"
-};
-
-static int
-proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
-                    void *data)
-{
-        char *p = page;
-        int len;
-
-        p += sprintf(p, "User:\t\t%lu\n", se_user);
-        p += sprintf(p, "System:\t\t%lu\n", se_sys);
-        p += sprintf(p, "Half:\t\t%lu\n", se_half);
-        p += sprintf(p, "Word:\t\t%lu\n", se_word);
-        p += sprintf(p, "DWord:\t\t%lu\n", se_dword);
-        p += sprintf(p, "Multi:\t\t%lu\n", se_multi);
-        p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode,
-                        se_usermode_action[se_usermode]);
-        p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
-                        se_kernmode_warn ? "+warn" : "");
-
-        len = (p - page) - off;
-        if (len < 0)
-                len = 0;
-
-        *eof = (len <= count) ? 1 : 0;
-        *start = page + off;
-
-        return len;
-}
-
-static int proc_alignment_write(struct file *file, const char __user *buffer,
-                                unsigned long count, void *data)
-{
-        char mode;
-
-        if (count > 0) {
-                if (get_user(mode, buffer))
-                        return -EFAULT;
-                if (mode >= '0' && mode <= '5')
-                        se_usermode = mode - '0';
-        }
-        return count;
-}
-
-static int proc_alignment_kern_write(struct file *file, const char __user *buffer,
-                                     unsigned long count, void *data)
-{
-        char mode;
-
-        if (count > 0) {
-                if (get_user(mode, buffer))
-                        return -EFAULT;
-                if (mode >= '0' && mode <= '1')
-                        se_kernmode_warn = mode - '0';
-        }
-        return count;
-}
-#endif
-
 static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
 {
         unsigned long p;
@@ -276,10 +197,10 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
         count = 1<<(instruction&3);
 
         switch (count) {
-        case 1: se_half  += 1; break;
-        case 2: se_word  += 1; break;
-        case 4: se_dword += 1; break;
-        case 8: se_multi += 1; break; /* ??? */
+        case 1: inc_unaligned_byte_access(); break;
+        case 2: inc_unaligned_word_access(); break;
+        case 4: inc_unaligned_dword_access(); break;
+        case 8: inc_unaligned_multi_access(); break;
         }
 
         ret = -EFAULT;
@@ -463,12 +384,8 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
         rm = regs->regs[index];
 
         /* shout about fixups */
-        if (!expected && printk_ratelimit())
-                printk(KERN_NOTICE "Fixing up unaligned %s access "
-                       "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
-                       user_mode(regs) ? "userspace" : "kernel",
-                       current->comm, task_pid_nr(current),
-                       (void *)regs->pc, instruction);
+        if (!expected)
+                unaligned_fixups_notify(current, instruction, regs);
 
         ret = -EFAULT;
         switch (instruction&0xF000) {
@@ -621,10 +538,10 @@ asmlinkage void do_address_error(struct pt_regs *regs,
 
         if (user_mode(regs)) {
                 int si_code = BUS_ADRERR;
+                unsigned int user_action;
 
                 local_irq_enable();
-
-                se_user += 1;
+                inc_unaligned_user_access();
 
                 set_fs(USER_DS);
                 if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
@@ -635,16 +552,12 @@ asmlinkage void do_address_error(struct pt_regs *regs,
                 set_fs(oldfs);
 
                 /* shout about userspace fixups */
-                if (se_usermode & 1)
-                        printk(KERN_NOTICE "Unaligned userspace access "
-                               "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
-                               current->comm, current->pid, (void *)regs->pc,
-                               instruction);
+                unaligned_fixups_notify(current, instruction, regs);
 
-                if (se_usermode & 2)
+                user_action = unaligned_user_action();
+                if (user_action & UM_FIXUP)
                         goto fixup;
-
-                if (se_usermode & 4)
+                if (user_action & UM_SIGNAL)
                         goto uspace_segv;
                 else {
                         /* ignore */
@@ -664,7 +577,7 @@ fixup:
                                               &user_mem_access, 0);
                 set_fs(oldfs);
 
-                if (tmp==0)
+                if (tmp == 0)
                         return; /* sorted */
 uspace_segv:
                 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
@@ -677,7 +590,7 @@ uspace_segv:
                 info.si_addr = (void __user *)address;
                 force_sig_info(SIGBUS, &info, current);
         } else {
-                se_sys += 1;
+                inc_unaligned_kernel_access();
 
                 if (regs->pc & 1)
                         die("unaligned program counter", regs, error_code);
@@ -692,11 +605,7 @@ uspace_segv:
                         die("insn faulting in do_address_error", regs, 0);
                 }
 
-                if (se_kernmode_warn)
-                        printk(KERN_NOTICE "Unaligned kernel access "
-                               "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
-                               current->comm, current->pid, (void *)regs->pc,
-                               instruction);
+                unaligned_fixups_notify(current, instruction, regs);
 
                 handle_unaligned_access(instruction, regs,
                                         &user_mem_access, 0);
@@ -881,35 +790,10 @@ asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
         die_if_kernel("exception", regs, ex);
 }
 
-#if defined(CONFIG_SH_STANDARD_BIOS)
-void *gdb_vbr_vector;
-
-static inline void __init gdb_vbr_init(void)
-{
-        register unsigned long vbr;
-
-        /*
-         * Read the old value of the VBR register to initialise
-         * the vector through which debug and BIOS traps are
-         * delegated by the Linux trap handler.
-         */
-        asm volatile("stc vbr, %0" : "=r" (vbr));
-
-        gdb_vbr_vector = (void *)(vbr + 0x100);
-        printk("Setting GDB trap vector to 0x%08lx\n",
-               (unsigned long)gdb_vbr_vector);
-}
-#endif
-
 void __cpuinit per_cpu_trap_init(void)
 {
         extern void *vbr_base;
 
-#ifdef CONFIG_SH_STANDARD_BIOS
-        if (raw_smp_processor_id() == 0)
-                gdb_vbr_init();
-#endif
-
         /* NOTE: The VBR value should be at P1
            (or P2, virtural "fixed" address space).
            It's definitely should not in physical address.  */
@@ -945,14 +829,9 @@ void __init trap_init(void)
         set_exception_table_evt(0x800, do_reserved_inst);
         set_exception_table_evt(0x820, do_illegal_slot_inst);
 #elif defined(CONFIG_SH_FPU)
-#ifdef CONFIG_CPU_SUBTYPE_SHX3
-        set_exception_table_evt(0xd80, fpu_state_restore_trap_handler);
-        set_exception_table_evt(0xda0, fpu_state_restore_trap_handler);
-#else
         set_exception_table_evt(0x800, fpu_state_restore_trap_handler);
         set_exception_table_evt(0x820, fpu_state_restore_trap_handler);
 #endif
-#endif
 
 #ifdef CONFIG_CPU_SH2
         set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler);
@@ -966,11 +845,8 @@ void __init trap_init(void)
 #endif
 
 #ifdef TRAP_UBC
-        set_exception_table_vec(TRAP_UBC, break_point_trap);
+        set_exception_table_vec(TRAP_UBC, breakpoint_trap_handler);
 #endif
-
-        /* Setup VBR for boot cpu */
-        per_cpu_trap_init();
 }
 
 void show_stack(struct task_struct *tsk, unsigned long *sp)
@@ -995,38 +871,3 @@ void dump_stack(void)
         show_stack(NULL, NULL);
 }
 EXPORT_SYMBOL(dump_stack);
-
-#ifdef CONFIG_PROC_FS
-/*
- * This needs to be done after sysctl_init, otherwise sys/ will be
- * overwritten.  Actually, this shouldn't be in sys/ at all since
- * it isn't a sysctl, and it doesn't contain sysctl information.
- * We now locate it in /proc/cpu/alignment instead.
- */
-static int __init alignment_init(void)
-{
-        struct proc_dir_entry *dir, *res;
-
-        dir = proc_mkdir("cpu", NULL);
-        if (!dir)
-                return -ENOMEM;
-
-        res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir);
-        if (!res)
-                return -ENOMEM;
-
-        res->read_proc = proc_alignment_read;
-        res->write_proc = proc_alignment_write;
-
-        res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir);
-        if (!res)
-                return -ENOMEM;
-
-        res->read_proc = proc_alignment_read;
-        res->write_proc = proc_alignment_kern_write;
-
-        return 0;
-}
-
-fs_initcall(alignment_init);
-#endif
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index 267e5ebbb475..e3f92eb05ffd 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -600,7 +600,7 @@ static int misaligned_fpu_load(struct pt_regs *regs,
                    indexed by register number. */
                 if (last_task_used_math == current) {
                         enable_fpu();
-                        save_fpu(current, regs);
+                        save_fpu(current);
                         disable_fpu();
                         last_task_used_math = NULL;
                         regs->sr |= SR_FD;
@@ -611,19 +611,19 @@ static int misaligned_fpu_load(struct pt_regs *regs,
 
                 switch (width_shift) {
                 case 2:
-                        current->thread.fpu.hard.fp_regs[destreg] = buflo;
+                        current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
                         break;
                 case 3:
                         if (do_paired_load) {
-                                current->thread.fpu.hard.fp_regs[destreg] = buflo;
-                                current->thread.fpu.hard.fp_regs[destreg+1] = bufhi;
+                                current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
+                                current->thread.xstate->hardfpu.fp_regs[destreg+1] = bufhi;
                         } else {
 #if defined(CONFIG_CPU_LITTLE_ENDIAN)
-                                current->thread.fpu.hard.fp_regs[destreg] = bufhi;
-                                current->thread.fpu.hard.fp_regs[destreg+1] = buflo;
+                                current->thread.xstate->hardfpu.fp_regs[destreg] = bufhi;
+                                current->thread.xstate->hardfpu.fp_regs[destreg+1] = buflo;
 #else
-                                current->thread.fpu.hard.fp_regs[destreg] = buflo;
-                                current->thread.fpu.hard.fp_regs[destreg+1] = bufhi;
+                                current->thread.xstate->hardfpu.fp_regs[destreg] = buflo;
+                                current->thread.xstate->hardfpu.fp_regs[destreg+1] = bufhi;
 #endif
                         }
                         break;
@@ -673,7 +673,7 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                    indexed by register number. */
                 if (last_task_used_math == current) {
                         enable_fpu();
-                        save_fpu(current, regs);
+                        save_fpu(current);
                         disable_fpu();
                         last_task_used_math = NULL;
                         regs->sr |= SR_FD;
@@ -681,19 +681,19 @@ static int misaligned_fpu_store(struct pt_regs *regs,
 
                 switch (width_shift) {
                 case 2:
-                        buflo = current->thread.fpu.hard.fp_regs[srcreg];
+                        buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
                         break;
                 case 3:
                         if (do_paired_load) {
-                                buflo = current->thread.fpu.hard.fp_regs[srcreg];
-                                bufhi = current->thread.fpu.hard.fp_regs[srcreg+1];
+                                buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
+                                bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
                         } else {
 #if defined(CONFIG_CPU_LITTLE_ENDIAN)
-                                bufhi = current->thread.fpu.hard.fp_regs[srcreg];
-                                buflo = current->thread.fpu.hard.fp_regs[srcreg+1];
+                                bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg];
+                                buflo = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
 #else
-                                buflo = current->thread.fpu.hard.fp_regs[srcreg];
-                                bufhi = current->thread.fpu.hard.fp_regs[srcreg+1];
+                                buflo = current->thread.xstate->hardfpu.fp_regs[srcreg];
+                                bufhi = current->thread.xstate->hardfpu.fp_regs[srcreg+1];
 #endif
                         }
                         break;
@@ -877,44 +877,39 @@ static int misaligned_fixup(struct pt_regs *regs)
 
 static ctl_table unaligned_table[] = {
         {
-                .ctl_name       = CTL_UNNUMBERED,
                 .procname       = "kernel_reports",
                 .data           = &kernel_mode_unaligned_fixup_count,
                 .maxlen         = sizeof(int),
                 .mode           = 0644,
-                .proc_handler   = &proc_dointvec
+                .proc_handler   = proc_dointvec
         },
         {
-                .ctl_name       = CTL_UNNUMBERED,
                 .procname       = "user_reports",
                 .data           = &user_mode_unaligned_fixup_count,
                 .maxlen         = sizeof(int),
                 .mode           = 0644,
-                .proc_handler   = &proc_dointvec
+                .proc_handler   = proc_dointvec
         },
         {
-                .ctl_name       = CTL_UNNUMBERED,
                 .procname       = "user_enable",
                 .data           = &user_mode_unaligned_fixup_enable,
                 .maxlen         = sizeof(int),
                 .mode           = 0644,
-                .proc_handler   = &proc_dointvec},
+                .proc_handler   = proc_dointvec},
         {}
 };
 
 static ctl_table unaligned_root[] = {
         {
-                .ctl_name       = CTL_UNNUMBERED,
                 .procname       = "unaligned_fixup",
                 .mode           = 0555,
-                unaligned_table
+                .child          = unaligned_table
         },
         {}
 };
 
 static ctl_table sh64_root[] = {
         {
-                .ctl_name       = CTL_UNNUMBERED,
                 .procname       = "sh64",
                 .mode           = 0555,
                 .child          = unaligned_root
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index a1e4ec24f1f5..7f8a709c3ada 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -3,7 +3,7 @@
  * Written by Niibe Yutaka and Paul Mundt
  */
 #ifdef CONFIG_SUPERH64
-#define LOAD_OFFSET     CONFIG_PAGE_OFFSET
+#define LOAD_OFFSET     PAGE_OFFSET
 OUTPUT_ARCH(sh:sh5)
 #else
 #define LOAD_OFFSET     0
@@ -14,17 +14,16 @@ OUTPUT_ARCH(sh)
 #include <asm/cache.h>
 #include <asm/vmlinux.lds.h>
 
+#ifdef CONFIG_PMB
+ #define MEMORY_OFFSET  0
+#else
+ #define MEMORY_OFFSET  __MEMORY_START
+#endif
+
 ENTRY(_start)
 SECTIONS
 {
-#ifdef CONFIG_PMB_FIXED
-        . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
-            CONFIG_ZERO_PAGE_OFFSET;
-#elif defined(CONFIG_32BIT)
-        . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
-#else
-        . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
-#endif
+        . = PAGE_OFFSET + MEMORY_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
 
         _text = .;              /* Text and read-only data */
 
@@ -35,12 +34,7 @@ SECTIONS
         .text : AT(ADDR(.text) - LOAD_OFFSET) {
                 HEAD_TEXT
                 TEXT_TEXT
-
-#ifdef CONFIG_SUPERH64
-                *(.text64)
-                *(.text..SHmedia32)
-#endif
-
+                EXTRA_TEXT
                 SCHED_TEXT
                 LOCK_TEXT
                 KPROBES_TEXT
@@ -51,24 +45,12 @@ SECTIONS
         } = 0x0009
 
         EXCEPTION_TABLE(16)
-
         NOTES
-        RO_DATA(PAGE_SIZE)
-
-        /*
-         * Code which must be executed uncached and the associated data
-         */
-        . = ALIGN(PAGE_SIZE);
-        .uncached : AT(ADDR(.uncached) - LOAD_OFFSET) {
-                __uncached_start = .;
-                *(.uncached.text)
-                *(.uncached.data)
-                __uncached_end = .;
-        }
 
+        _sdata = .;
+        RO_DATA(PAGE_SIZE)
         RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
-
-        _edata = .;                     /* End of data section */
+        _edata = .;
 
         DWARF_EH_FRAME
 
diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c
index 3f7e415be86a..242117cbad67 100644
--- a/arch/sh/kernel/vsyscall/vsyscall.c
+++ b/arch/sh/kernel/vsyscall/vsyscall.c
@@ -11,7 +11,6 @@
  * for more details.
  */
 #include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/gfp.h>