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authorJia Hongtao <B38951@freescale.com>2012-08-28 03:44:08 -0400
committerKumar Gala <galak@kernel.crashing.org>2012-09-12 15:57:12 -0400
commit905e75c46dba5f3061049277e4eb7110beedba43 (patch)
tree3a83c25efa8f93360772520c23f3d8b8b9d9aef1 /arch/powerpc/sysdev
parent9e67886becd7fab36c97ef43bb81515c18a66be1 (diff)
powerpc/fsl-pci: Unify pci/pcie initialization code
We unified the Freescale pci/pcie initialization by changing the fsl_pci to a platform driver. In previous PCI code architecture the initialization routine is called at board_setup_arch stage. Now the initialization is done in probe function which is architectural better. Also It's convenient for adding PM support for PCI controller in later patch. Now we registered pci controllers as platform devices. So we combine two initialization code as one platform driver. Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c102
-rw-r--r--arch/powerpc/sysdev/fsl_pci.h15
2 files changed, 75 insertions, 42 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 23acaf4692dc..2ff35765a6ad 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -828,54 +828,78 @@ static const struct of_device_id pci_ids[] = {
828 828
829struct device_node *fsl_pci_primary; 829struct device_node *fsl_pci_primary;
830 830
831void __devinit fsl_pci_init(void) 831void fsl_pci_assign_primary(void)
832{ 832{
833 int ret; 833 struct device_node *np;
834 struct device_node *node;
835 struct pci_controller *hose;
836 dma_addr_t max = 0xffffffff;
837 834
838 /* Callers can specify the primary bus using other means. */ 835 /* Callers can specify the primary bus using other means. */
839 if (!fsl_pci_primary) { 836 if (fsl_pci_primary)
840 /* If a PCI host bridge contains an ISA node, it's primary. */ 837 return;
841 node = of_find_node_by_type(NULL, "isa"); 838
842 while ((fsl_pci_primary = of_get_parent(node))) { 839 /* If a PCI host bridge contains an ISA node, it's primary. */
843 of_node_put(node); 840 np = of_find_node_by_type(NULL, "isa");
844 node = fsl_pci_primary; 841 while ((fsl_pci_primary = of_get_parent(np))) {
845 842 of_node_put(np);
846 if (of_match_node(pci_ids, node)) 843 np = fsl_pci_primary;
847 break; 844
848 } 845 if (of_match_node(pci_ids, np) && of_device_is_available(np))
846 return;
849 } 847 }
850 848
851 node = NULL; 849 /*
852 for_each_node_by_type(node, "pci") { 850 * If there's no PCI host bridge with ISA, arbitrarily
853 if (of_match_node(pci_ids, node)) { 851 * designate one as primary. This can go away once
854 /* 852 * various bugs with primary-less systems are fixed.
855 * If there's no PCI host bridge with ISA, arbitrarily 853 */
856 * designate one as primary. This can go away once 854 for_each_matching_node(np, pci_ids) {
857 * various bugs with primary-less systems are fixed. 855 if (of_device_is_available(np)) {
858 */ 856 fsl_pci_primary = np;
859 if (!fsl_pci_primary) 857 of_node_put(np);
860 fsl_pci_primary = node; 858 return;
861
862 ret = fsl_add_bridge(node, fsl_pci_primary == node);
863 if (ret == 0) {
864 hose = pci_find_hose_for_OF_device(node);
865 max = min(max, hose->dma_window_base_cur +
866 hose->dma_window_size);
867 }
868 } 859 }
869 } 860 }
861}
862
863static int __devinit fsl_pci_probe(struct platform_device *pdev)
864{
865 int ret;
866 struct device_node *node;
867 struct pci_controller *hose;
868
869 node = pdev->dev.of_node;
870 ret = fsl_add_bridge(node, fsl_pci_primary == node);
870 871
871#ifdef CONFIG_SWIOTLB 872#ifdef CONFIG_SWIOTLB
872 /* 873 if (ret == 0) {
873 * if we couldn't map all of DRAM via the dma windows 874 hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
874 * we need SWIOTLB to handle buffers located outside of 875
875 * dma capable memory region 876 /*
876 */ 877 * if we couldn't map all of DRAM via the dma windows
877 if (memblock_end_of_DRAM() - 1 > max) 878 * we need SWIOTLB to handle buffers located outside of
878 ppc_swiotlb_enable = 1; 879 * dma capable memory region
880 */
881 if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
882 hose->dma_window_size)
883 ppc_swiotlb_enable = 1;
884 }
879#endif 885#endif
886
887 mpc85xx_pci_err_probe(pdev);
888
889 return 0;
890}
891
892static struct platform_driver fsl_pci_driver = {
893 .driver = {
894 .name = "fsl-pci",
895 .of_match_table = pci_ids,
896 },
897 .probe = fsl_pci_probe,
898};
899
900static int __init fsl_pci_init(void)
901{
902 return platform_driver_register(&fsl_pci_driver);
880} 903}
904arch_initcall(fsl_pci_init);
881#endif 905#endif
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index 54ed82c53235..d078537adece 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -98,10 +98,19 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose);
98 98
99extern struct device_node *fsl_pci_primary; 99extern struct device_node *fsl_pci_primary;
100 100
101#ifdef CONFIG_FSL_PCI 101#ifdef CONFIG_PCI
102void fsl_pci_init(void); 102void fsl_pci_assign_primary(void);
103#else 103#else
104static inline void fsl_pci_init(void) {} 104static inline void fsl_pci_assign_primary(void) {}
105#endif
106
107#ifdef CONFIG_EDAC_MPC85XX
108int mpc85xx_pci_err_probe(struct platform_device *op);
109#else
110static inline int mpc85xx_pci_err_probe(struct platform_device *op)
111{
112 return -ENOTSUPP;
113}
105#endif 114#endif
106 115
107#endif /* __POWERPC_FSL_PCI_H */ 116#endif /* __POWERPC_FSL_PCI_H */