diff options
author | Roy Zang <tie-fei.zang@freescale.com> | 2012-09-03 05:22:10 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2012-09-12 15:57:12 -0400 |
commit | 9e67886becd7fab36c97ef43bb81515c18a66be1 (patch) | |
tree | d70d59c68d777cd014779ce70f79adfbcbbdda45 /arch/powerpc/sysdev | |
parent | 6cc1b4e931f8d8dccdcdb05b758a7d1178ad6b49 (diff) |
powerpc/pci: Use PCIe IP block revision register instead of compatible
Freescale PCIe IP block revision bigger than rev2.2 will also need
redefine the sequence of inbound windows. So change to use IP block
revision instead of compatible for the judgment.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index da7a3d7f54cc..23acaf4692dc 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -143,18 +143,20 @@ static void __init setup_pci_atmu(struct pci_controller *hose, | |||
143 | pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", | 143 | pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", |
144 | (u64)rsrc->start, (u64)resource_size(rsrc)); | 144 | (u64)rsrc->start, (u64)resource_size(rsrc)); |
145 | 145 | ||
146 | if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) { | ||
147 | win_idx = 2; | ||
148 | start_idx = 0; | ||
149 | end_idx = 3; | ||
150 | } | ||
151 | |||
152 | pci = ioremap(rsrc->start, resource_size(rsrc)); | 146 | pci = ioremap(rsrc->start, resource_size(rsrc)); |
153 | if (!pci) { | 147 | if (!pci) { |
154 | dev_err(hose->parent, "Unable to map ATMU registers\n"); | 148 | dev_err(hose->parent, "Unable to map ATMU registers\n"); |
155 | return; | 149 | return; |
156 | } | 150 | } |
157 | 151 | ||
152 | if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) { | ||
153 | if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) { | ||
154 | win_idx = 2; | ||
155 | start_idx = 0; | ||
156 | end_idx = 3; | ||
157 | } | ||
158 | } | ||
159 | |||
158 | /* Disable all windows (except powar0 since it's ignored) */ | 160 | /* Disable all windows (except powar0 since it's ignored) */ |
159 | for(i = 1; i < 5; i++) | 161 | for(i = 1; i < 5; i++) |
160 | out_be32(&pci->pow[i].powar, 0); | 162 | out_be32(&pci->pow[i].powar, 0); |