powerpc/476: define specific cpu table entry DD2 core

The DD2 core still has some unstability.  Define CPU_FTR_476_DD2 to
enable workarounds in later patches.

This is based on an earlier, unreleased patch for DD1 by Ben Herrenschmidt.

Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

1 files changed, 18 insertions, 4 deletions

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index be5ab18b03b5..bf7cf86e04dd 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1834,11 +1834,11 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_440A,
                 .platform               = "ppc440",
         },
-        { /* 476 core */
-                .pvr_mask               = 0xffff0000,
-                .pvr_value              = 0x11a50000,
+        { /* 476 DD2 core */
+                .pvr_mask               = 0xffffffff,
+                .pvr_value              = 0x11a52080,
                 .cpu_name               = "476",
-                .cpu_features           = CPU_FTRS_47X,
+                .cpu_features           = CPU_FTRS_47X | CPU_FTR_476_DD2,
                 .cpu_user_features      = COMMON_USER_BOOKE |
                         PPC_FEATURE_HAS_FPU,
                 .mmu_features           = MMU_FTR_TYPE_47x |
@@ -1862,6 +1862,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_47x,
                 .platform               = "ppc470",
         },
+        { /* 476 others */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x11a50000,
+                .cpu_name               = "476",
+                .cpu_features           = CPU_FTRS_47X,
+                .cpu_user_features      = COMMON_USER_BOOKE |
+                        PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_47x |
+                        MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 128,
+                .machine_check          = machine_check_47x,
+                .platform               = "ppc470",
+        },
         {       /* default match */
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,