diff options
author | Dave Kleikamp <shaggy@linux.vnet.ibm.com> | 2011-01-26 01:17:58 -0500 |
---|---|---|
committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2011-02-02 06:58:53 -0500 |
commit | c48d0dbaac7f27c083430170c66194d6a523bc2a (patch) | |
tree | 9eedbc3f576423f3ff782efd4715e757953e1dd3 /arch/powerpc | |
parent | 8960f7ff508064de1896d8539911411179b8433c (diff) |
powerpc/476: define specific cpu table entry DD2 core
The DD2 core still has some unstability. Define CPU_FTR_476_DD2 to
enable workarounds in later patches.
This is based on an earlier, unreleased patch for DD1 by Ben Herrenschmidt.
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/include/asm/cputable.h | 3 | ||||
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 22 |
2 files changed, 20 insertions, 5 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index f0a211d96923..be3cdf9134ce 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -154,6 +154,7 @@ extern const char *powerpc_base_platform; | |||
154 | #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) | 154 | #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) |
155 | #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) | 155 | #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) |
156 | #define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) | 156 | #define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) |
157 | #define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000) | ||
157 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) | 158 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) |
158 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) | 159 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) |
159 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) | 160 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) |
@@ -465,7 +466,7 @@ enum { | |||
465 | CPU_FTRS_44X | CPU_FTRS_440x6 | | 466 | CPU_FTRS_44X | CPU_FTRS_440x6 | |
466 | #endif | 467 | #endif |
467 | #ifdef CONFIG_PPC_47x | 468 | #ifdef CONFIG_PPC_47x |
468 | CPU_FTRS_47X | | 469 | CPU_FTRS_47X | CPU_FTR_476_DD2 | |
469 | #endif | 470 | #endif |
470 | #ifdef CONFIG_E200 | 471 | #ifdef CONFIG_E200 |
471 | CPU_FTRS_E200 | | 472 | CPU_FTRS_E200 | |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index be5ab18b03b5..bf7cf86e04dd 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -1834,11 +1834,11 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1834 | .machine_check = machine_check_440A, | 1834 | .machine_check = machine_check_440A, |
1835 | .platform = "ppc440", | 1835 | .platform = "ppc440", |
1836 | }, | 1836 | }, |
1837 | { /* 476 core */ | 1837 | { /* 476 DD2 core */ |
1838 | .pvr_mask = 0xffff0000, | 1838 | .pvr_mask = 0xffffffff, |
1839 | .pvr_value = 0x11a50000, | 1839 | .pvr_value = 0x11a52080, |
1840 | .cpu_name = "476", | 1840 | .cpu_name = "476", |
1841 | .cpu_features = CPU_FTRS_47X, | 1841 | .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, |
1842 | .cpu_user_features = COMMON_USER_BOOKE | | 1842 | .cpu_user_features = COMMON_USER_BOOKE | |
1843 | PPC_FEATURE_HAS_FPU, | 1843 | PPC_FEATURE_HAS_FPU, |
1844 | .mmu_features = MMU_FTR_TYPE_47x | | 1844 | .mmu_features = MMU_FTR_TYPE_47x | |
@@ -1862,6 +1862,20 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1862 | .machine_check = machine_check_47x, | 1862 | .machine_check = machine_check_47x, |
1863 | .platform = "ppc470", | 1863 | .platform = "ppc470", |
1864 | }, | 1864 | }, |
1865 | { /* 476 others */ | ||
1866 | .pvr_mask = 0xffff0000, | ||
1867 | .pvr_value = 0x11a50000, | ||
1868 | .cpu_name = "476", | ||
1869 | .cpu_features = CPU_FTRS_47X, | ||
1870 | .cpu_user_features = COMMON_USER_BOOKE | | ||
1871 | PPC_FEATURE_HAS_FPU, | ||
1872 | .mmu_features = MMU_FTR_TYPE_47x | | ||
1873 | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, | ||
1874 | .icache_bsize = 32, | ||
1875 | .dcache_bsize = 128, | ||
1876 | .machine_check = machine_check_47x, | ||
1877 | .platform = "ppc470", | ||
1878 | }, | ||
1865 | { /* default match */ | 1879 | { /* default match */ |
1866 | .pvr_mask = 0x00000000, | 1880 | .pvr_mask = 0x00000000, |
1867 | .pvr_value = 0x00000000, | 1881 | .pvr_value = 0x00000000, |