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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-07-12 23:38:26 -0400 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-07-12 23:38:26 -0400 |
commit | af3bf7fbe0148aadc8fedd6f5e5279cabef9ced5 (patch) | |
tree | 25e3b1099ecf851bb7b5f6e6d3ffcdeb33de32f0 /arch/powerpc/include | |
parent | 10db8d212864cb6741df7d7fafda5ab6661f6f88 (diff) | |
parent | b915341b4be29b3b2c02da932b69871e9b55ca4b (diff) |
Merge remote-tracking branch 'kumar/next' into next
Freescale updates for 3.6
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/immap_qe.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/qe.h | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h index 0edb6842b13d..61e8490786b8 100644 --- a/arch/powerpc/include/asm/immap_qe.h +++ b/arch/powerpc/include/asm/immap_qe.h | |||
@@ -26,7 +26,9 @@ | |||
26 | struct qe_iram { | 26 | struct qe_iram { |
27 | __be32 iadd; /* I-RAM Address Register */ | 27 | __be32 iadd; /* I-RAM Address Register */ |
28 | __be32 idata; /* I-RAM Data Register */ | 28 | __be32 idata; /* I-RAM Data Register */ |
29 | u8 res0[0x78]; | 29 | u8 res0[0x04]; |
30 | __be32 iready; /* I-RAM Ready Register */ | ||
31 | u8 res1[0x70]; | ||
30 | } __attribute__ ((packed)); | 32 | } __attribute__ ((packed)); |
31 | 33 | ||
32 | /* QE Interrupt Controller */ | 34 | /* QE Interrupt Controller */ |
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h index 5e0b6d511e14..229571a49391 100644 --- a/arch/powerpc/include/asm/qe.h +++ b/arch/powerpc/include/asm/qe.h | |||
@@ -499,6 +499,7 @@ enum comm_dir { | |||
499 | /* I-RAM */ | 499 | /* I-RAM */ |
500 | #define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */ | 500 | #define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */ |
501 | #define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */ | 501 | #define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */ |
502 | #define QE_IRAM_READY 0x80000000 /* Ready */ | ||
502 | 503 | ||
503 | /* UPC */ | 504 | /* UPC */ |
504 | #define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */ | 505 | #define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */ |