aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2015-02-27 10:16:14 -0500
committerScott Wood <scottwood@freescale.com>2015-03-23 20:51:19 -0400
commit1e8ed06d3446f354014fffc99ea0b9ac16dfadd5 (patch)
tree538f2adaa5f74b522ea561ba1fbe75e9729d4dd1 /arch/powerpc/boot
parentcb5915e71fd13172c24f3eb102ea02b6d70dc1b0 (diff)
powerpc/mpc85xx: Add FSL QorIQ DPAA BMan support to device tree(s)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> [Emil Medve: Sync with the upstream binding] Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/b4qds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-post.dtsi60
-rw-r--r--arch/powerpc/boot/dts/fsl/b4si-post.dtsi89
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi37
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi11
-rw-r--r--arch/powerpc/boot/dts/fsl/t1040si-post.dtsi65
-rw-r--r--arch/powerpc/boot/dts/fsl/t2081si-post.dtsi105
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi265
-rw-r--r--arch/powerpc/boot/dts/kmcoge4.dts15
-rw-r--r--arch/powerpc/boot/dts/oca4080.dts15
-rw-r--r--arch/powerpc/boot/dts/p1023rdb.dts18
-rw-r--r--arch/powerpc/boot/dts/p2041rdb.dts17
-rw-r--r--arch/powerpc/boot/dts/p3041ds.dts17
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts17
-rw-r--r--arch/powerpc/boot/dts/p5020ds.dts17
-rw-r--r--arch/powerpc/boot/dts/p5040ds.dts17
-rw-r--r--arch/powerpc/boot/dts/t104xqds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/t104xrdb.dtsi14
-rw-r--r--arch/powerpc/boot/dts/t208xqds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/t208xrdb.dtsi15
-rw-r--r--arch/powerpc/boot/dts/t4240qds.dts17
-rw-r--r--arch/powerpc/boot/dts/t4240rdb.dts15
26 files changed, 899 insertions, 22 deletions
diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
index e5bde0b85135..24ed80dc2120 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * B4420DS Device Tree Source 2 * B4420DS Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor, Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor, Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -97,10 +97,25 @@
97 device_type = "memory"; 97 device_type = "memory";
98 }; 98 };
99 99
100 reserved-memory {
101 #address-cells = <2>;
102 #size-cells = <2>;
103 ranges;
104
105 bman_fbpr: bman-fbpr {
106 size = <0 0x1000000>;
107 alignment = <0 0x1000000>;
108 };
109 };
110
100 dcsr: dcsr@f00000000 { 111 dcsr: dcsr@f00000000 {
101 ranges = <0x00000000 0xf 0x00000000 0x01052000>; 112 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
102 }; 113 };
103 114
115 bportals: bman-portals@ff4000000 {
116 ranges = <0x0 0xf 0xf4000000 0x2000000>;
117 };
118
104 soc: soc@ffe000000 { 119 soc: soc@ffe000000 {
105 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 120 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
106 reg = <0xf 0xfe000000 0 0x00001000>; 121 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 65100b9636b7..f35e9e0a5445 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * B4860 Silicon/SoC Device Tree Source (post include) 2 * B4860 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -109,6 +109,64 @@
109 }; 109 };
110}; 110};
111 111
112&bportals {
113 bman-portal@38000 {
114 compatible = "fsl,bman-portal";
115 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
116 interrupts = <133 2 0 0>;
117 };
118 bman-portal@3c000 {
119 compatible = "fsl,bman-portal";
120 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
121 interrupts = <135 2 0 0>;
122 };
123 bman-portal@40000 {
124 compatible = "fsl,bman-portal";
125 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
126 interrupts = <137 2 0 0>;
127 };
128 bman-portal@44000 {
129 compatible = "fsl,bman-portal";
130 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
131 interrupts = <139 2 0 0>;
132 };
133 bman-portal@48000 {
134 compatible = "fsl,bman-portal";
135 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
136 interrupts = <141 2 0 0>;
137 };
138 bman-portal@4c000 {
139 compatible = "fsl,bman-portal";
140 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
141 interrupts = <143 2 0 0>;
142 };
143 bman-portal@50000 {
144 compatible = "fsl,bman-portal";
145 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
146 interrupts = <145 2 0 0>;
147 };
148 bman-portal@54000 {
149 compatible = "fsl,bman-portal";
150 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
151 interrupts = <147 2 0 0>;
152 };
153 bman-portal@58000 {
154 compatible = "fsl,bman-portal";
155 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
156 interrupts = <149 2 0 0>;
157 };
158 bman-portal@5c000 {
159 compatible = "fsl,bman-portal";
160 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
161 interrupts = <151 2 0 0>;
162 };
163 bman-portal@60000 {
164 compatible = "fsl,bman-portal";
165 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
166 interrupts = <153 2 0 0>;
167 };
168};
169
112&soc { 170&soc {
113 ddr2: memory-controller@9000 { 171 ddr2: memory-controller@9000 {
114 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; 172 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 1a54ba71f685..73136c0029d2 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * B4420 Silicon/SoC Device Tree Source (post include) 2 * B4420 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor, Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor, Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * this software, even if advised of the possibility of such damage. 32 * this software, even if advised of the possibility of such damage.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -128,6 +133,83 @@
128 }; 133 };
129}; 134};
130 135
136&bportals {
137 #address-cells = <0x1>;
138 #size-cells = <0x1>;
139 compatible = "simple-bus";
140
141 bman-portal@0 {
142 compatible = "fsl,bman-portal";
143 reg = <0x0 0x4000>, <0x1000000 0x1000>;
144 interrupts = <105 2 0 0>;
145 };
146 bman-portal@4000 {
147 compatible = "fsl,bman-portal";
148 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
149 interrupts = <107 2 0 0>;
150 };
151 bman-portal@8000 {
152 compatible = "fsl,bman-portal";
153 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
154 interrupts = <109 2 0 0>;
155 };
156 bman-portal@c000 {
157 compatible = "fsl,bman-portal";
158 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
159 interrupts = <111 2 0 0>;
160 };
161 bman-portal@10000 {
162 compatible = "fsl,bman-portal";
163 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
164 interrupts = <113 2 0 0>;
165 };
166 bman-portal@14000 {
167 compatible = "fsl,bman-portal";
168 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
169 interrupts = <115 2 0 0>;
170 };
171 bman-portal@18000 {
172 compatible = "fsl,bman-portal";
173 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
174 interrupts = <117 2 0 0>;
175 };
176 bman-portal@1c000 {
177 compatible = "fsl,bman-portal";
178 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
179 interrupts = <119 2 0 0>;
180 };
181 bman-portal@20000 {
182 compatible = "fsl,bman-portal";
183 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
184 interrupts = <121 2 0 0>;
185 };
186 bman-portal@24000 {
187 compatible = "fsl,bman-portal";
188 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
189 interrupts = <123 2 0 0>;
190 };
191 bman-portal@28000 {
192 compatible = "fsl,bman-portal";
193 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
194 interrupts = <125 2 0 0>;
195 };
196 bman-portal@2c000 {
197 compatible = "fsl,bman-portal";
198 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
199 interrupts = <127 2 0 0>;
200 };
201 bman-portal@30000 {
202 compatible = "fsl,bman-portal";
203 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
204 interrupts = <129 2 0 0>;
205 };
206 bman-portal@34000 {
207 compatible = "fsl,bman-portal";
208 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
209 interrupts = <131 2 0 0>;
210 };
211};
212
131&soc { 213&soc {
132 #address-cells = <1>; 214 #address-cells = <1>;
133 #size-cells = <1>; 215 #size-cells = <1>;
@@ -261,6 +343,11 @@
261/include/ "qoriq-duart-1.dtsi" 343/include/ "qoriq-duart-1.dtsi"
262/include/ "qoriq-sec5.3-0.dtsi" 344/include/ "qoriq-sec5.3-0.dtsi"
263 345
346/include/ "qoriq-bman1.dtsi"
347 bman: bman@31a000 {
348 interrupts = <16 2 1 29>;
349 };
350
264 L2: l2-cache-controller@c20000 { 351 L2: l2-cache-controller@c20000 {
265 compatible = "fsl,b4-l2-cache-controller"; 352 compatible = "fsl,b4-l2-cache-controller";
266 reg = <0xc20000 0x1000>; 353 reg = <0xc20000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index 81437fdf1db4..7780f21430cb 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1023/P1017 Silicon/SoC Device Tree Source (post include) 2 * P1023/P1017 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -97,6 +102,28 @@
97 }; 102 };
98}; 103};
99 104
105&bportals {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 compatible = "simple-bus";
109
110 bman-portal@0 {
111 compatible = "fsl,bman-portal";
112 reg = <0x0 0x4000>, <0x100000 0x1000>;
113 interrupts = <30 2 0 0>;
114 };
115 bman-portal@4000 {
116 compatible = "fsl,bman-portal";
117 reg = <0x4000 0x4000>, <0x101000 0x1000>;
118 interrupts = <32 2 0 0>;
119 };
120 bman-portal@8000 {
121 compatible = "fsl,bman-portal";
122 reg = <0x8000 0x4000>, <0x102000 0x1000>;
123 interrupts = <34 2 0 0>;
124 };
125};
126
100&soc { 127&soc {
101 #address-cells = <1>; 128 #address-cells = <1>;
102 #size-cells = <1>; 129 #size-cells = <1>;
@@ -221,6 +248,14 @@
221/include/ "pq3-mpic.dtsi" 248/include/ "pq3-mpic.dtsi"
222/include/ "pq3-mpic-timer-B.dtsi" 249/include/ "pq3-mpic-timer-B.dtsi"
223 250
251 bman: bman@8a000 {
252 compatible = "fsl,bman";
253 reg = <0x8a000 0x1000>;
254 interrupts = <16 2 0 0>;
255 fsl,bman-portals = <&bportals>;
256 memory-region = <&bman_fbpr>;
257 };
258
224 global-utilities@e0000 { 259 global-utilities@e0000 {
225 compatible = "fsl,p1023-guts"; 260 compatible = "fsl,p1023-guts";
226 reg = <0xe0000 0x1000>; 261 reg = <0xe0000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index efd74db4f9b0..f2feacfd9a25 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P2041/P2040 Silicon/SoC Device Tree Source (post include) 2 * P2041/P2040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -216,6 +221,8 @@
216 }; 221 };
217}; 222};
218 223
224/include/ "qoriq-bman1-portals.dtsi"
225
219&soc { 226&soc {
220 #address-cells = <1>; 227 #address-cells = <1>;
221 #size-cells = <1>; 228 #size-cells = <1>;
@@ -407,4 +414,6 @@
407crypto: crypto@300000 { 414crypto: crypto@300000 {
408 fsl,iommu-parent = <&pamu1>; 415 fsl,iommu-parent = <&pamu1>;
409 }; 416 };
417
418/include/ "qoriq-bman1.dtsi"
410}; 419};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index d7425ef1ae41..d6fea37395ad 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P3041 Silicon/SoC Device Tree Source (post include) 2 * P3041 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -243,6 +248,8 @@
243 }; 248 };
244}; 249};
245 250
251/include/ "qoriq-bman1-portals.dtsi"
252
246&soc { 253&soc {
247 #address-cells = <1>; 254 #address-cells = <1>;
248 #size-cells = <1>; 255 #size-cells = <1>;
@@ -434,4 +441,6 @@
434crypto: crypto@300000 { 441crypto: crypto@300000 {
435 fsl,iommu-parent = <&pamu1>; 442 fsl,iommu-parent = <&pamu1>;
436 }; 443 };
444
445/include/ "qoriq-bman1.dtsi"
437}; 446};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 7005a4a4cef0..89482c9b2301 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P4080/P4040 Silicon/SoC Device Tree Source (post include) 2 * P4080/P4040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -243,6 +248,8 @@
243 248
244}; 249};
245 250
251/include/ "qoriq-bman1-portals.dtsi"
252
246&soc { 253&soc {
247 #address-cells = <1>; 254 #address-cells = <1>;
248 #size-cells = <1>; 255 #size-cells = <1>;
@@ -490,4 +497,6 @@
490crypto: crypto@300000 { 497crypto: crypto@300000 {
491 fsl,iommu-parent = <&pamu1>; 498 fsl,iommu-parent = <&pamu1>;
492 }; 499 };
500
501/include/ "qoriq-bman1.dtsi"
493}; 502};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 55834211bd28..6e04851e2fc9 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5020/5010 Silicon/SoC Device Tree Source (post include) 2 * P5020/5010 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -240,6 +245,8 @@
240 }; 245 };
241}; 246};
242 247
248/include/ "qoriq-bman1-portals.dtsi"
249
243&soc { 250&soc {
244 #address-cells = <1>; 251 #address-cells = <1>;
245 #size-cells = <1>; 252 #size-cells = <1>;
@@ -421,6 +428,8 @@
421 fsl,iommu-parent = <&pamu1>; 428 fsl,iommu-parent = <&pamu1>;
422 }; 429 };
423 430
431/include/ "qoriq-bman1.dtsi"
432
424/include/ "qoriq-raid1.0-0.dtsi" 433/include/ "qoriq-raid1.0-0.dtsi"
425 raideng@320000 { 434 raideng@320000 {
426 fsl,iommu-parent = <&pamu1>; 435 fsl,iommu-parent = <&pamu1>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 6e4cd6ce363c..5e44dfa1e1a5 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5040 Silicon/SoC Device Tree Source (post include) 2 * P5040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * software, even if advised of the possibility of such damage. 32 * software, even if advised of the possibility of such damage.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&lbc { 40&lbc {
36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus"; 41 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>; 42 interrupts = <25 2 0 0>;
@@ -195,6 +200,8 @@
195 }; 200 };
196}; 201};
197 202
203/include/ "qoriq-bman1-portals.dtsi"
204
198&soc { 205&soc {
199 #address-cells = <1>; 206 #address-cells = <1>;
200 #size-cells = <1>; 207 #size-cells = <1>;
@@ -399,4 +406,6 @@
399 crypto@300000 { 406 crypto@300000 {
400 fsl,iommu-parent = <&pamu4>; 407 fsl,iommu-parent = <&pamu4>;
401 }; 408 };
409
410/include/ "qoriq-bman1.dtsi"
402}; 411};
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 15ae462e758f..5cc01be5b152 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T1040 Silicon/SoC Device Tree Source (post include) 2 * T1040 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -218,6 +223,63 @@
218 }; 223 };
219}; 224};
220 225
226&bportals {
227 #address-cells = <0x1>;
228 #size-cells = <0x1>;
229 compatible = "simple-bus";
230
231 bman-portal@0 {
232 compatible = "fsl,bman-portal";
233 reg = <0x0 0x4000>, <0x1000000 0x1000>;
234 interrupts = <105 2 0 0>;
235 };
236 bman-portal@4000 {
237 compatible = "fsl,bman-portal";
238 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
239 interrupts = <107 2 0 0>;
240 };
241 bman-portal@8000 {
242 compatible = "fsl,bman-portal";
243 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
244 interrupts = <109 2 0 0>;
245 };
246 bman-portal@c000 {
247 compatible = "fsl,bman-portal";
248 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
249 interrupts = <111 2 0 0>;
250 };
251 bman-portal@10000 {
252 compatible = "fsl,bman-portal";
253 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
254 interrupts = <113 2 0 0>;
255 };
256 bman-portal@14000 {
257 compatible = "fsl,bman-portal";
258 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
259 interrupts = <115 2 0 0>;
260 };
261 bman-portal@18000 {
262 compatible = "fsl,bman-portal";
263 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
264 interrupts = <117 2 0 0>;
265 };
266 bman-portal@1c000 {
267 compatible = "fsl,bman-portal";
268 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
269 interrupts = <119 2 0 0>;
270 };
271 bman-portal@20000 {
272 compatible = "fsl,bman-portal";
273 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
274 interrupts = <121 2 0 0>;
275 };
276 bman-portal@24000 {
277 compatible = "fsl,bman-portal";
278 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
279 interrupts = <123 2 0 0>;
280 };
281};
282
221&soc { 283&soc {
222 #address-cells = <1>; 284 #address-cells = <1>;
223 #size-cells = <1>; 285 #size-cells = <1>;
@@ -401,4 +463,5 @@
401 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */ 463 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
402 }; 464 };
403/include/ "qoriq-sec5.0-0.dtsi" 465/include/ "qoriq-sec5.0-0.dtsi"
466/include/ "qoriq-bman1.dtsi"
404}; 467};
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index 1ce91e3485a9..86bdaf6cbd14 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T2081 Silicon/SoC Device Tree Source (post include) 2 * T2081 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -224,6 +229,103 @@
224 }; 229 };
225}; 230};
226 231
232&bportals {
233 #address-cells = <0x1>;
234 #size-cells = <0x1>;
235 compatible = "simple-bus";
236
237 bman-portal@0 {
238 compatible = "fsl,bman-portal";
239 reg = <0x0 0x4000>, <0x1000000 0x1000>;
240 interrupts = <105 2 0 0>;
241 };
242 bman-portal@4000 {
243 compatible = "fsl,bman-portal";
244 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
245 interrupts = <107 2 0 0>;
246 };
247 bman-portal@8000 {
248 compatible = "fsl,bman-portal";
249 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
250 interrupts = <109 2 0 0>;
251 };
252 bman-portal@c000 {
253 compatible = "fsl,bman-portal";
254 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
255 interrupts = <111 2 0 0>;
256 };
257 bman-portal@10000 {
258 compatible = "fsl,bman-portal";
259 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
260 interrupts = <113 2 0 0>;
261 };
262 bman-portal@14000 {
263 compatible = "fsl,bman-portal";
264 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
265 interrupts = <115 2 0 0>;
266 };
267 bman-portal@18000 {
268 compatible = "fsl,bman-portal";
269 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
270 interrupts = <117 2 0 0>;
271 };
272 bman-portal@1c000 {
273 compatible = "fsl,bman-portal";
274 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
275 interrupts = <119 2 0 0>;
276 };
277 bman-portal@20000 {
278 compatible = "fsl,bman-portal";
279 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
280 interrupts = <121 2 0 0>;
281 };
282 bman-portal@24000 {
283 compatible = "fsl,bman-portal";
284 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
285 interrupts = <123 2 0 0>;
286 };
287 bman-portal@28000 {
288 compatible = "fsl,bman-portal";
289 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
290 interrupts = <125 2 0 0>;
291 };
292 bman-portal@2c000 {
293 compatible = "fsl,bman-portal";
294 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
295 interrupts = <127 2 0 0>;
296 };
297 bman-portal@30000 {
298 compatible = "fsl,bman-portal";
299 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
300 interrupts = <129 2 0 0>;
301 };
302 bman-portal@34000 {
303 compatible = "fsl,bman-portal";
304 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
305 interrupts = <131 2 0 0>;
306 };
307 bman-portal@38000 {
308 compatible = "fsl,bman-portal";
309 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
310 interrupts = <133 2 0 0>;
311 };
312 bman-portal@3c000 {
313 compatible = "fsl,bman-portal";
314 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
315 interrupts = <135 2 0 0>;
316 };
317 bman-portal@40000 {
318 compatible = "fsl,bman-portal";
319 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
320 interrupts = <137 2 0 0>;
321 };
322 bman-portal@44000 {
323 compatible = "fsl,bman-portal";
324 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
325 interrupts = <139 2 0 0>;
326 };
327};
328
227&soc { 329&soc {
228 #address-cells = <1>; 330 #address-cells = <1>;
229 #size-cells = <1>; 331 #size-cells = <1>;
@@ -400,6 +502,7 @@
400 phy_type = "utmi"; 502 phy_type = "utmi";
401 }; 503 };
402/include/ "qoriq-sec5.2-0.dtsi" 504/include/ "qoriq-sec5.2-0.dtsi"
505/include/ "qoriq-bman1.dtsi"
403 506
404 L2_1: l2-cache-controller@c20000 { 507 L2_1: l2-cache-controller@c20000 {
405 /* Cluster 0 L2 cache */ 508 /* Cluster 0 L2 cache */
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index 0e96fcabe812..4d4f25895d8c 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T4240 Silicon/SoC Device Tree Source (post include) 2 * T4240 Silicon/SoC Device Tree Source (post include)
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35&bman_fbpr {
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
38};
39
35&ifc { 40&ifc {
36 #address-cells = <2>; 41 #address-cells = <2>;
37 #size-cells = <1>; 42 #size-cells = <1>;
@@ -294,6 +299,263 @@
294 }; 299 };
295}; 300};
296 301
302&bportals {
303 #address-cells = <0x1>;
304 #size-cells = <0x1>;
305 compatible = "simple-bus";
306
307 bman-portal@0 {
308 compatible = "fsl,bman-portal";
309 reg = <0x0 0x4000>, <0x1000000 0x1000>;
310 interrupts = <105 2 0 0>;
311 };
312 bman-portal@4000 {
313 compatible = "fsl,bman-portal";
314 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
315 interrupts = <107 2 0 0>;
316 };
317 bman-portal@8000 {
318 compatible = "fsl,bman-portal";
319 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
320 interrupts = <109 2 0 0>;
321 };
322 bman-portal@c000 {
323 compatible = "fsl,bman-portal";
324 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
325 interrupts = <111 2 0 0>;
326 };
327 bman-portal@10000 {
328 compatible = "fsl,bman-portal";
329 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
330 interrupts = <113 2 0 0>;
331 };
332 bman-portal@14000 {
333 compatible = "fsl,bman-portal";
334 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
335 interrupts = <115 2 0 0>;
336 };
337 bman-portal@18000 {
338 compatible = "fsl,bman-portal";
339 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
340 interrupts = <117 2 0 0>;
341 };
342 bman-portal@1c000 {
343 compatible = "fsl,bman-portal";
344 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
345 interrupts = <119 2 0 0>;
346 };
347 bman-portal@20000 {
348 compatible = "fsl,bman-portal";
349 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
350 interrupts = <121 2 0 0>;
351 };
352 bman-portal@24000 {
353 compatible = "fsl,bman-portal";
354 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
355 interrupts = <123 2 0 0>;
356 };
357 bman-portal@28000 {
358 compatible = "fsl,bman-portal";
359 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
360 interrupts = <125 2 0 0>;
361 };
362 bman-portal@2c000 {
363 compatible = "fsl,bman-portal";
364 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
365 interrupts = <127 2 0 0>;
366 };
367 bman-portal@30000 {
368 compatible = "fsl,bman-portal";
369 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
370 interrupts = <129 2 0 0>;
371 };
372 bman-portal@34000 {
373 compatible = "fsl,bman-portal";
374 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
375 interrupts = <131 2 0 0>;
376 };
377 bman-portal@38000 {
378 compatible = "fsl,bman-portal";
379 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
380 interrupts = <133 2 0 0>;
381 };
382 bman-portal@3c000 {
383 compatible = "fsl,bman-portal";
384 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
385 interrupts = <135 2 0 0>;
386 };
387 bman-portal@40000 {
388 compatible = "fsl,bman-portal";
389 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
390 interrupts = <137 2 0 0>;
391 };
392 bman-portal@44000 {
393 compatible = "fsl,bman-portal";
394 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
395 interrupts = <139 2 0 0>;
396 };
397 bman-portal@48000 {
398 compatible = "fsl,bman-portal";
399 reg = <0x48000 0x4000>, <0x1012000 0x1000>;
400 interrupts = <141 2 0 0>;
401 };
402 bman-portal@4c000 {
403 compatible = "fsl,bman-portal";
404 reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
405 interrupts = <143 2 0 0>;
406 };
407 bman-portal@50000 {
408 compatible = "fsl,bman-portal";
409 reg = <0x50000 0x4000>, <0x1014000 0x1000>;
410 interrupts = <145 2 0 0>;
411 };
412 bman-portal@54000 {
413 compatible = "fsl,bman-portal";
414 reg = <0x54000 0x4000>, <0x1015000 0x1000>;
415 interrupts = <147 2 0 0>;
416 };
417 bman-portal@58000 {
418 compatible = "fsl,bman-portal";
419 reg = <0x58000 0x4000>, <0x1016000 0x1000>;
420 interrupts = <149 2 0 0>;
421 };
422 bman-portal@5c000 {
423 compatible = "fsl,bman-portal";
424 reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
425 interrupts = <151 2 0 0>;
426 };
427 bman-portal@60000 {
428 compatible = "fsl,bman-portal";
429 reg = <0x60000 0x4000>, <0x1018000 0x1000>;
430 interrupts = <153 2 0 0>;
431 };
432 bman-portal@64000 {
433 compatible = "fsl,bman-portal";
434 reg = <0x64000 0x4000>, <0x1019000 0x1000>;
435 interrupts = <155 2 0 0>;
436 };
437 bman-portal@68000 {
438 compatible = "fsl,bman-portal";
439 reg = <0x68000 0x4000>, <0x101a000 0x1000>;
440 interrupts = <157 2 0 0>;
441 };
442 bman-portal@6c000 {
443 compatible = "fsl,bman-portal";
444 reg = <0x6c000 0x4000>, <0x101b000 0x1000>;
445 interrupts = <159 2 0 0>;
446 };
447 bman-portal@70000 {
448 compatible = "fsl,bman-portal";
449 reg = <0x70000 0x4000>, <0x101c000 0x1000>;
450 interrupts = <161 2 0 0>;
451 };
452 bman-portal@74000 {
453 compatible = "fsl,bman-portal";
454 reg = <0x74000 0x4000>, <0x101d000 0x1000>;
455 interrupts = <163 2 0 0>;
456 };
457 bman-portal@78000 {
458 compatible = "fsl,bman-portal";
459 reg = <0x78000 0x4000>, <0x101e000 0x1000>;
460 interrupts = <165 2 0 0>;
461 };
462 bman-portal@7c000 {
463 compatible = "fsl,bman-portal";
464 reg = <0x7c000 0x4000>, <0x101f000 0x1000>;
465 interrupts = <167 2 0 0>;
466 };
467 bman-portal@80000 {
468 compatible = "fsl,bman-portal";
469 reg = <0x80000 0x4000>, <0x1020000 0x1000>;
470 interrupts = <169 2 0 0>;
471 };
472 bman-portal@84000 {
473 compatible = "fsl,bman-portal";
474 reg = <0x84000 0x4000>, <0x1021000 0x1000>;
475 interrupts = <171 2 0 0>;
476 };
477 bman-portal@88000 {
478 compatible = "fsl,bman-portal";
479 reg = <0x88000 0x4000>, <0x1022000 0x1000>;
480 interrupts = <173 2 0 0>;
481 };
482 bman-portal@8c000 {
483 compatible = "fsl,bman-portal";
484 reg = <0x8c000 0x4000>, <0x1023000 0x1000>;
485 interrupts = <175 2 0 0>;
486 };
487 bman-portal@90000 {
488 compatible = "fsl,bman-portal";
489 reg = <0x90000 0x4000>, <0x1024000 0x1000>;
490 interrupts = <385 2 0 0>;
491 };
492 bman-portal@94000 {
493 compatible = "fsl,bman-portal";
494 reg = <0x94000 0x4000>, <0x1025000 0x1000>;
495 interrupts = <387 2 0 0>;
496 };
497 bman-portal@98000 {
498 compatible = "fsl,bman-portal";
499 reg = <0x98000 0x4000>, <0x1026000 0x1000>;
500 interrupts = <389 2 0 0>;
501 };
502 bman-portal@9c000 {
503 compatible = "fsl,bman-portal";
504 reg = <0x9c000 0x4000>, <0x1027000 0x1000>;
505 interrupts = <391 2 0 0>;
506 };
507 bman-portal@a0000 {
508 compatible = "fsl,bman-portal";
509 reg = <0xa0000 0x4000>, <0x1028000 0x1000>;
510 interrupts = <393 2 0 0>;
511 };
512 bman-portal@a4000 {
513 compatible = "fsl,bman-portal";
514 reg = <0xa4000 0x4000>, <0x1029000 0x1000>;
515 interrupts = <395 2 0 0>;
516 };
517 bman-portal@a8000 {
518 compatible = "fsl,bman-portal";
519 reg = <0xa8000 0x4000>, <0x102a000 0x1000>;
520 interrupts = <397 2 0 0>;
521 };
522 bman-portal@ac000 {
523 compatible = "fsl,bman-portal";
524 reg = <0xac000 0x4000>, <0x102b000 0x1000>;
525 interrupts = <399 2 0 0>;
526 };
527 bman-portal@b0000 {
528 compatible = "fsl,bman-portal";
529 reg = <0xb0000 0x4000>, <0x102c000 0x1000>;
530 interrupts = <401 2 0 0>;
531 };
532 bman-portal@b4000 {
533 compatible = "fsl,bman-portal";
534 reg = <0xb4000 0x4000>, <0x102d000 0x1000>;
535 interrupts = <403 2 0 0>;
536 };
537 bman-portal@b8000 {
538 compatible = "fsl,bman-portal";
539 reg = <0xb8000 0x4000>, <0x102e000 0x1000>;
540 interrupts = <405 2 0 0>;
541 };
542 bman-portal@bc000 {
543 compatible = "fsl,bman-portal";
544 reg = <0xbc000 0x4000>, <0x102f000 0x1000>;
545 interrupts = <407 2 0 0>;
546 };
547 bman-portal@c0000 {
548 compatible = "fsl,bman-portal";
549 reg = <0xc0000 0x4000>, <0x1030000 0x1000>;
550 interrupts = <409 2 0 0>;
551 };
552 bman-portal@c4000 {
553 compatible = "fsl,bman-portal";
554 reg = <0xc4000 0x4000>, <0x1031000 0x1000>;
555 interrupts = <411 2 0 0>;
556 };
557};
558
297&soc { 559&soc {
298 #address-cells = <1>; 560 #address-cells = <1>;
299 #size-cells = <1>; 561 #size-cells = <1>;
@@ -486,6 +748,7 @@
486/include/ "qoriq-sata2-0.dtsi" 748/include/ "qoriq-sata2-0.dtsi"
487/include/ "qoriq-sata2-1.dtsi" 749/include/ "qoriq-sata2-1.dtsi"
488/include/ "qoriq-sec5.0-0.dtsi" 750/include/ "qoriq-sec5.0-0.dtsi"
751/include/ "qoriq-bman1.dtsi"
489 752
490 L2_1: l2-cache-controller@c20000 { 753 L2_1: l2-cache-controller@c20000 {
491 compatible = "fsl,t4240-l2-cache-controller"; 754 compatible = "fsl,t4240-l2-cache-controller";
diff --git a/arch/powerpc/boot/dts/kmcoge4.dts b/arch/powerpc/boot/dts/kmcoge4.dts
index 89b4119f3b19..97e6d11d1e6d 100644
--- a/arch/powerpc/boot/dts/kmcoge4.dts
+++ b/arch/powerpc/boot/dts/kmcoge4.dts
@@ -25,10 +25,25 @@
25 device_type = "memory"; 25 device_type = "memory";
26 }; 26 };
27 27
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
31 ranges;
32
33 bman_fbpr: bman-fbpr {
34 size = <0 0x1000000>;
35 alignment = <0 0x1000000>;
36 };
37 };
38
28 dcsr: dcsr@f00000000 { 39 dcsr: dcsr@f00000000 {
29 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 40 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
30 }; 41 };
31 42
43 bportals: bman-portals@ff4000000 {
44 ranges = <0x0 0xf 0xf4000000 0x200000>;
45 };
46
32 soc: soc@ffe000000 { 47 soc: soc@ffe000000 {
33 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 48 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
34 reg = <0xf 0xfe000000 0 0x00001000>; 49 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/oca4080.dts b/arch/powerpc/boot/dts/oca4080.dts
index 3d4c751d1608..eb76caae11d9 100644
--- a/arch/powerpc/boot/dts/oca4080.dts
+++ b/arch/powerpc/boot/dts/oca4080.dts
@@ -49,10 +49,25 @@
49 device_type = "memory"; 49 device_type = "memory";
50 }; 50 };
51 51
52 reserved-memory {
53 #address-cells = <2>;
54 #size-cells = <2>;
55 ranges;
56
57 bman_fbpr: bman-fbpr {
58 size = <0 0x1000000>;
59 alignment = <0 0x1000000>;
60 };
61 };
62
52 dcsr: dcsr@f00000000 { 63 dcsr: dcsr@f00000000 {
53 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 64 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
54 }; 65 };
55 66
67 bportals: bman-portals@ff4000000 {
68 ranges = <0x0 0xf 0xf4000000 0x200000>;
69 };
70
56 soc: soc@ffe000000 { 71 soc: soc@ffe000000 {
57 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 72 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
58 reg = <0xf 0xfe000000 0 0x00001000>; 73 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p1023rdb.dts b/arch/powerpc/boot/dts/p1023rdb.dts
index 0a06a88ddbd5..9236e3742a23 100644
--- a/arch/powerpc/boot/dts/p1023rdb.dts
+++ b/arch/powerpc/boot/dts/p1023rdb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P1023 RDB Device Tree Source 2 * P1023 RDB Device Tree Source
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com> 6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
7 * 7 *
@@ -47,6 +47,21 @@
47 device_type = "memory"; 47 device_type = "memory";
48 }; 48 };
49 49
50 reserved-memory {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 ranges;
54
55 bman_fbpr: bman-fbpr {
56 size = <0 0x1000000>;
57 alignment = <0 0x1000000>;
58 };
59 };
60
61 bportals: bman-portals@ff200000 {
62 ranges = <0x0 0xf 0xff200000 0x200000>;
63 };
64
50 soc: soc@ff600000 { 65 soc: soc@ff600000 {
51 ranges = <0x0 0x0 0xff600000 0x200000>; 66 ranges = <0x0 0x0 0xff600000 0x200000>;
52 67
@@ -228,7 +243,6 @@
228 0x0 0x100000>; 243 0x0 0x100000>;
229 }; 244 };
230 }; 245 };
231
232}; 246};
233 247
234/include/ "fsl/p1023si-post.dtsi" 248/include/ "fsl/p1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index d97ad74c7279..c1e69dc7188e 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P2041RDB Device Tree Source 2 * P2041RDB Device Tree Source
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index 394ea9c943c9..2192fe94866d 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P3041DS Device Tree Source 2 * P3041DS Device Tree Source
3 * 3 *
4 * Copyright 2010-2011 Freescale Semiconductor Inc. 4 * Copyright 2010 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 1cf6148b8b05..fad441654642 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P4080DS Device Tree Source 2 * P4080DS Device Tree Source
3 * 3 *
4 * Copyright 2009-2011 Freescale Semiconductor Inc. 4 * Copyright 2009 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index b7f3057cd894..7382636dc560 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5020DS Device Tree Source 2 * P5020DS Device Tree Source
3 * 3 *
4 * Copyright 2010-2011 Freescale Semiconductor Inc. 4 * Copyright 2010 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/p5040ds.dts b/arch/powerpc/boot/dts/p5040ds.dts
index 7e04bf487c04..35dabf5b6098 100644
--- a/arch/powerpc/boot/dts/p5040ds.dts
+++ b/arch/powerpc/boot/dts/p5040ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * P5040DS Device Tree Source 2 * P5040DS Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -45,10 +45,25 @@
45 device_type = "memory"; 45 device_type = "memory";
46 }; 46 };
47 47
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 bman_fbpr: bman-fbpr {
54 size = <0 0x1000000>;
55 alignment = <0 0x1000000>;
56 };
57 };
58
48 dcsr: dcsr@f00000000 { 59 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 60 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
50 }; 61 };
51 62
63 bportals: bman-portals@ff4000000 {
64 ranges = <0x0 0xf 0xf4000000 0x200000>;
65 };
66
52 soc: soc@ffe000000 { 67 soc: soc@ffe000000 {
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 68 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>; 69 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t104xqds.dtsi b/arch/powerpc/boot/dts/t104xqds.dtsi
index 234f4b596c5b..f7e9bfbeefc7 100644
--- a/arch/powerpc/boot/dts/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/t104xqds.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T104xQDS Device Tree Source 2 * T104xQDS Device Tree Source
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -38,6 +38,17 @@
38 #size-cells = <2>; 38 #size-cells = <2>;
39 interrupt-parent = <&mpic>; 39 interrupt-parent = <&mpic>;
40 40
41 reserved-memory {
42 #address-cells = <2>;
43 #size-cells = <2>;
44 ranges;
45
46 bman_fbpr: bman-fbpr {
47 size = <0 0x1000000>;
48 alignment = <0 0x1000000>;
49 };
50 };
51
41 ifc: localbus@ffe124000 { 52 ifc: localbus@ffe124000 {
42 reg = <0xf 0xfe124000 0 0x2000>; 53 reg = <0xf 0xfe124000 0 0x2000>;
43 ranges = <0 0 0xf 0xe8000000 0x08000000 54 ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -77,6 +88,10 @@
77 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 88 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
78 }; 89 };
79 90
91 bportals: bman-portals@ff4000000 {
92 ranges = <0x0 0xf 0xf4000000 0x2000000>;
93 };
94
80 soc: soc@ffe000000 { 95 soc: soc@ffe000000 {
81 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 96 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
82 reg = <0xf 0xfe000000 0 0x00001000>; 97 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t104xrdb.dtsi b/arch/powerpc/boot/dts/t104xrdb.dtsi
index 187add885cae..76e07a3f2ca8 100644
--- a/arch/powerpc/boot/dts/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/t104xrdb.dtsi
@@ -33,6 +33,16 @@
33 */ 33 */
34 34
35/ { 35/ {
36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
39 ranges;
40
41 bman_fbpr: bman-fbpr {
42 size = <0 0x1000000>;
43 alignment = <0 0x1000000>;
44 };
45 };
36 46
37 ifc: localbus@ffe124000 { 47 ifc: localbus@ffe124000 {
38 reg = <0xf 0xfe124000 0 0x2000>; 48 reg = <0xf 0xfe124000 0 0x2000>;
@@ -69,6 +79,10 @@
69 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 79 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
70 }; 80 };
71 81
82 bportals: bman-portals@ff4000000 {
83 ranges = <0x0 0xf 0xf4000000 0x2000000>;
84 };
85
72 soc: soc@ffe000000 { 86 soc: soc@ffe000000 {
73 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 87 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
74 reg = <0xf 0xfe000000 0 0x00001000>; 88 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t208xqds.dtsi b/arch/powerpc/boot/dts/t208xqds.dtsi
index 59061834d54e..186959ec19b4 100644
--- a/arch/powerpc/boot/dts/t208xqds.dtsi
+++ b/arch/powerpc/boot/dts/t208xqds.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * T2080/T2081 QDS Device Tree Source 2 * T2080/T2081 QDS Device Tree Source
3 * 3 *
4 * Copyright 2013 Freescale Semiconductor Inc. 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -39,6 +39,17 @@
39 #size-cells = <2>; 39 #size-cells = <2>;
40 interrupt-parent = <&mpic>; 40 interrupt-parent = <&mpic>;
41 41
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
45 ranges;
46
47 bman_fbpr: bman-fbpr {
48 size = <0 0x1000000>;
49 alignment = <0 0x1000000>;
50 };
51 };
52
42 ifc: localbus@ffe124000 { 53 ifc: localbus@ffe124000 {
43 reg = <0xf 0xfe124000 0 0x2000>; 54 reg = <0xf 0xfe124000 0 0x2000>;
44 ranges = <0 0 0xf 0xe8000000 0x08000000 55 ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -78,6 +89,10 @@
78 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 89 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
79 }; 90 };
80 91
92 bportals: bman-portals@ff4000000 {
93 ranges = <0x0 0xf 0xf4000000 0x2000000>;
94 };
95
81 soc: soc@ffe000000 { 96 soc: soc@ffe000000 {
82 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 97 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
83 reg = <0xf 0xfe000000 0 0x00001000>; 98 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t208xrdb.dtsi b/arch/powerpc/boot/dts/t208xrdb.dtsi
index 1481e192e783..e1463b165d0e 100644
--- a/arch/powerpc/boot/dts/t208xrdb.dtsi
+++ b/arch/powerpc/boot/dts/t208xrdb.dtsi
@@ -39,6 +39,17 @@
39 #size-cells = <2>; 39 #size-cells = <2>;
40 interrupt-parent = <&mpic>; 40 interrupt-parent = <&mpic>;
41 41
42 reserved-memory {
43 #address-cells = <2>;
44 #size-cells = <2>;
45 ranges;
46
47 bman_fbpr: bman-fbpr {
48 size = <0 0x1000000>;
49 alignment = <0 0x1000000>;
50 };
51 };
52
42 ifc: localbus@ffe124000 { 53 ifc: localbus@ffe124000 {
43 reg = <0xf 0xfe124000 0 0x2000>; 54 reg = <0xf 0xfe124000 0 0x2000>;
44 ranges = <0 0 0xf 0xe8000000 0x08000000 55 ranges = <0 0 0xf 0xe8000000 0x08000000
@@ -79,6 +90,10 @@
79 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 90 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
80 }; 91 };
81 92
93 bportals: bman-portals@ff4000000 {
94 ranges = <0x0 0xf 0xf4000000 0x2000000>;
95 };
96
82 soc: soc@ffe000000 { 97 soc: soc@ffe000000 {
83 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 98 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
84 reg = <0xf 0xfe000000 0 0x00001000>; 99 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
index 97683f6a2936..6df77766410b 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * T4240QDS Device Tree Source 2 * T4240QDS Device Tree Source
3 * 3 *
4 * Copyright 2012 Freescale Semiconductor Inc. 4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -100,10 +100,25 @@
100 device_type = "memory"; 100 device_type = "memory";
101 }; 101 };
102 102
103 reserved-memory {
104 #address-cells = <2>;
105 #size-cells = <2>;
106 ranges;
107
108 bman_fbpr: bman-fbpr {
109 size = <0 0x1000000>;
110 alignment = <0 0x1000000>;
111 };
112 };
113
103 dcsr: dcsr@f00000000 { 114 dcsr: dcsr@f00000000 {
104 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 115 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
105 }; 116 };
106 117
118 bportals: bman-portals@ff4000000 {
119 ranges = <0x0 0xf 0xf4000000 0x2000000>;
120 };
121
107 soc: soc@ffe000000 { 122 soc: soc@ffe000000 {
108 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 123 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
109 reg = <0xf 0xfe000000 0 0x00001000>; 124 reg = <0xf 0xfe000000 0 0x00001000>;
diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts
index 53761d4e8c51..46049cf37f02 100644
--- a/arch/powerpc/boot/dts/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/t4240rdb.dts
@@ -69,10 +69,25 @@
69 device_type = "memory"; 69 device_type = "memory";
70 }; 70 };
71 71
72 reserved-memory {
73 #address-cells = <2>;
74 #size-cells = <2>;
75 ranges;
76
77 bman_fbpr: bman-fbpr {
78 size = <0 0x1000000>;
79 alignment = <0 0x1000000>;
80 };
81 };
82
72 dcsr: dcsr@f00000000 { 83 dcsr: dcsr@f00000000 {
73 ranges = <0x00000000 0xf 0x00000000 0x01072000>; 84 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
74 }; 85 };
75 86
87 bportals: bman-portals@ff4000000 {
88 ranges = <0x0 0xf 0xf4000000 0x2000000>;
89 };
90
76 soc: soc@ffe000000 { 91 soc: soc@ffe000000 {
77 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 92 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
78 reg = <0xf 0xfe000000 0 0x00001000>; 93 reg = <0xf 0xfe000000 0 0x00001000>;