1 files changed, 88 insertions, 1 deletions

diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 1a54ba71f685..73136c0029d2 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4420 Silicon/SoC Device Tree Source (post include)
  *
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 - 2014 Freescale Semiconductor, Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -32,6 +32,11 @@
  * this software, even if advised of the possibility of such damage.
  */
 
+&bman_fbpr {
+        compatible = "fsl,bman-fbpr";
+        alloc-ranges = <0 0 0x10000 0>;
+};
+
 &ifc {
         #address-cells = <2>;
         #size-cells = <1>;
@@ -128,6 +133,83 @@
         };
 };
 
+&bportals {
+        #address-cells = <0x1>;
+        #size-cells = <0x1>;
+        compatible = "simple-bus";
+
+        bman-portal@0 {
+                compatible = "fsl,bman-portal";
+                reg = <0x0 0x4000>, <0x1000000 0x1000>;
+                interrupts = <105 2 0 0>;
+        };
+        bman-portal@4000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x4000 0x4000>, <0x1001000 0x1000>;
+                interrupts = <107 2 0 0>;
+        };
+        bman-portal@8000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x8000 0x4000>, <0x1002000 0x1000>;
+                interrupts = <109 2 0 0>;
+        };
+        bman-portal@c000 {
+                compatible = "fsl,bman-portal";
+                reg = <0xc000 0x4000>, <0x1003000 0x1000>;
+                interrupts = <111 2 0 0>;
+        };
+        bman-portal@10000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x10000 0x4000>, <0x1004000 0x1000>;
+                interrupts = <113 2 0 0>;
+        };
+        bman-portal@14000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x14000 0x4000>, <0x1005000 0x1000>;
+                interrupts = <115 2 0 0>;
+        };
+        bman-portal@18000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x18000 0x4000>, <0x1006000 0x1000>;
+                interrupts = <117 2 0 0>;
+        };
+        bman-portal@1c000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
+                interrupts = <119 2 0 0>;
+        };
+        bman-portal@20000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x20000 0x4000>, <0x1008000 0x1000>;
+                interrupts = <121 2 0 0>;
+        };
+        bman-portal@24000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x24000 0x4000>, <0x1009000 0x1000>;
+                interrupts = <123 2 0 0>;
+        };
+        bman-portal@28000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x28000 0x4000>, <0x100a000 0x1000>;
+                interrupts = <125 2 0 0>;
+        };
+        bman-portal@2c000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
+                interrupts = <127 2 0 0>;
+        };
+        bman-portal@30000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x30000 0x4000>, <0x100c000 0x1000>;
+                interrupts = <129 2 0 0>;
+        };
+        bman-portal@34000 {
+                compatible = "fsl,bman-portal";
+                reg = <0x34000 0x4000>, <0x100d000 0x1000>;
+                interrupts = <131 2 0 0>;
+        };
+};
+
 &soc {
         #address-cells = <1>;
         #size-cells = <1>;
@@ -261,6 +343,11 @@
 /include/ "qoriq-duart-1.dtsi"
 /include/ "qoriq-sec5.3-0.dtsi"
 
+/include/ "qoriq-bman1.dtsi"
+        bman: bman@31a000 {
+                interrupts = <16 2 1 29>;
+        };
+
         L2: l2-cache-controller@c20000 {
                 compatible = "fsl,b4-l2-cache-controller";
                 reg = <0xc20000 0x1000>;