Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (185 commits)
  powerpc: fix compile error with 85xx/p1010rdb.c
  powerpc: fix compile error with 85xx/p1023_rds.c
  powerpc/fsl: add MSI support for the Freescale hypervisor
  arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
  powerpc/fsl: Add support for Integrated Flash Controller
  powerpc/fsl: update compatiable on fsl 16550 uart nodes
  powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
  powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig
  powerpc/fsl: Update defconfigs to enable some standard FSL HW features
  powerpc: Add TBI PHY node to first MDIO bus
  sbc834x: put full compat string in board match check
  powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
  powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit
  offb: Fix setting of the pseudo-palette for >8bpp
  offb: Add palette hack for qemu "standard vga" framebuffer
  offb: Fix bug in calculating requested vram size
  powerpc/boot: Change the WARN to INFO for boot wrapper overlap message
  powerpc/44x: Fix build error on currituck platform
  powerpc/boot: Change the load address for the wrapper to fit the kernel
  powerpc/44x: Enable CRASH_DUMP for 440x
  ...

Fix up a trivial conflict in arch/powerpc/include/asm/cputime.h due to
the additional sparse-checking code for cputime_t.

1 files changed, 161 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
new file mode 100644
index 000000000000..270f64b90f4e
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi
@@ -0,0 +1,161 @@
+/*
+ * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_soc {
+        enet0: ethernet@24000 {
+                phy-handle = <&phy0>;
+                tbi-handle = <&tbi0>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@24520 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x0>;
+                        device_type = "ethernet-phy";
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <10 1 0 0>;
+                        reg = <0x1>;
+                        device_type = "ethernet-phy";
+                };
+
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+
+        enet2: ethernet@26000 {
+                phy-handle = <&phy1>;
+                tbi-handle = <&tbi1>;
+                phy-connection-type = "rgmii-id";
+        };
+
+        mdio@26520 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+};
+
+&board_pci3 {
+        pcie@0 {
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        // IDSEL 0x1c  USB
+                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
+                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
+                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
+                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
+
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+                        >;
+
+
+                uli1575@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        ranges = <0x2000000 0x0 0xb0000000
+                                  0x2000000 0x0 0xb0000000
+                                  0x0 0x100000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                        isa@1e {
+                                device_type = "isa";
+                                #interrupt-cells = <2>;
+                                #size-cells = <1>;
+                                #address-cells = <2>;
+                                reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                          0x1000>;
+                                interrupt-parent = <&i8259>;
+
+                                i8259: interrupt-controller@20 {
+                                        reg = <0x1 0x20 0x2
+                                               0x1 0xa0 0x2
+                                               0x1 0x4d0 0x2>;
+                                        interrupt-controller;
+                                        device_type = "interrupt-controller";
+                                        #address-cells = <0>;
+                                        #interrupt-cells = <2>;
+                                        compatible = "chrp,iic";
+                                        interrupts = <9 2 0 0>;
+                                        interrupt-parent = <&mpic>;
+                                };
+
+                                i8042@60 {
+                                        #size-cells = <0>;
+                                        #address-cells = <1>;
+                                        reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                        interrupts = <1 3 12 3>;
+                                        interrupt-parent =
+                                                <&i8259>;
+
+                                        keyboard@0 {
+                                                reg = <0x0>;
+                                                compatible = "pnpPNP,303";
+                                        };
+
+                                        mouse@1 {
+                                                reg = <0x1>;
+                                                compatible = "pnpPNP,f03";
+                                        };
+                                };
+
+                                rtc@70 {
+                                        compatible = "pnpPNP,b00";
+                                        reg = <0x1 0x70 0x2>;
+                                };
+
+                                gpio@400 {
+                                        reg = <0x1 0x400 0x80>;
+                                };
+                        };
+                };
+        };
+};