diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-04-15 13:00:45 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-07-15 13:44:32 -0400 |
commit | b29eee4935d9e5952a7ea8543ea499f06fb86808 (patch) | |
tree | 713846fdbd856500602a06df0b20ef1233dced01 /arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |
parent | af3e69cfc9644c742a22647a5091779b9dfb9653 (diff) |
[MIPS] rbtx4927: misc cleanups
* Merge tx4927_pci.h into tx4927.h
* Kill (broken) external PCI clock frequency reporting
* Kill unnecessary wbflush()
* Kill unnecessary includes
* Kill debug garbages
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c')
-rw-r--r-- | arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | 234 |
1 files changed, 11 insertions, 223 deletions
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index 6d31f2a98abf..c18901a75cc4 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |||
@@ -28,8 +28,6 @@ | |||
28 | * with this program; if not, write to the Free Software Foundation, Inc., | 28 | * with this program; if not, write to the Free Software Foundation, Inc., |
29 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 29 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
30 | */ | 30 | */ |
31 | |||
32 | |||
33 | /* | 31 | /* |
34 | IRQ Device | 32 | IRQ Device |
35 | 00 RBTX4927-ISA/00 | 33 | 00 RBTX4927-ISA/00 |
@@ -112,76 +110,14 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
112 | */ | 110 | */ |
113 | 111 | ||
114 | #include <linux/init.h> | 112 | #include <linux/init.h> |
115 | #include <linux/kernel.h> | ||
116 | #include <linux/types.h> | 113 | #include <linux/types.h> |
117 | #include <linux/mm.h> | ||
118 | #include <linux/swap.h> | ||
119 | #include <linux/ioport.h> | ||
120 | #include <linux/sched.h> | ||
121 | #include <linux/interrupt.h> | 114 | #include <linux/interrupt.h> |
122 | #include <linux/pci.h> | ||
123 | #include <linux/timex.h> | ||
124 | #include <asm/bootinfo.h> | ||
125 | #include <asm/page.h> | ||
126 | #include <asm/io.h> | 115 | #include <asm/io.h> |
127 | #include <asm/irq.h> | ||
128 | #include <asm/pci.h> | ||
129 | #include <asm/processor.h> | ||
130 | #include <asm/reboot.h> | ||
131 | #include <asm/time.h> | ||
132 | #include <asm/wbflush.h> | ||
133 | #include <linux/bootmem.h> | ||
134 | #include <linux/blkdev.h> | ||
135 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 116 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
136 | #include <asm/i8259.h> | 117 | #include <asm/i8259.h> |
137 | #include <asm/tx4927/smsc_fdc37m81x.h> | ||
138 | #endif | 118 | #endif |
139 | #include <asm/tx4927/toshiba_rbtx4927.h> | 119 | #include <asm/tx4927/toshiba_rbtx4927.h> |
140 | 120 | ||
141 | |||
142 | #undef TOSHIBA_RBTX4927_IRQ_DEBUG | ||
143 | |||
144 | #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG | ||
145 | #define TOSHIBA_RBTX4927_IRQ_NONE 0x00000000 | ||
146 | |||
147 | #define TOSHIBA_RBTX4927_IRQ_INFO ( 1 << 0 ) | ||
148 | #define TOSHIBA_RBTX4927_IRQ_WARN ( 1 << 1 ) | ||
149 | #define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 ) | ||
150 | |||
151 | #define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 ) | ||
152 | #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) | ||
153 | #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) | ||
154 | |||
155 | #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff | ||
156 | #endif | ||
157 | |||
158 | |||
159 | #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG | ||
160 | static const u32 toshiba_rbtx4927_irq_debug_flag = | ||
161 | (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO | | ||
162 | TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR | ||
163 | // | TOSHIBA_RBTX4927_IRQ_IOC_INIT | ||
164 | // | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE | ||
165 | // | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE | ||
166 | ); | ||
167 | #endif | ||
168 | |||
169 | |||
170 | #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG | ||
171 | #define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \ | ||
172 | if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \ | ||
173 | { \ | ||
174 | char tmp[100]; \ | ||
175 | sprintf( tmp, str ); \ | ||
176 | printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \ | ||
177 | } | ||
178 | #else | ||
179 | #define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...) | ||
180 | #endif | ||
181 | |||
182 | |||
183 | |||
184 | |||
185 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0 | 121 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0 |
186 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7 | 122 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7 |
187 | 123 | ||
@@ -207,39 +143,22 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | |||
207 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL | 143 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL |
208 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL | 144 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL |
209 | 145 | ||
210 | |||
211 | u32 bit2num(u32 num) | ||
212 | { | ||
213 | u32 i; | ||
214 | |||
215 | for (i = 0; i < (sizeof(num) * 8); i++) { | ||
216 | if (num & (1 << i)) { | ||
217 | return (i); | ||
218 | } | ||
219 | } | ||
220 | return (0); | ||
221 | } | ||
222 | |||
223 | int toshiba_rbtx4927_irq_nested(int sw_irq) | 146 | int toshiba_rbtx4927_irq_nested(int sw_irq) |
224 | { | 147 | { |
225 | u32 level3; | 148 | u8 level3; |
226 | 149 | ||
227 | level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; | 150 | level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; |
228 | if (level3) { | 151 | if (level3) { |
229 | sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3); | 152 | sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + fls(level3) - 1; |
230 | if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) { | ||
231 | goto RETURN; | ||
232 | } | ||
233 | } | ||
234 | #ifdef CONFIG_TOSHIBA_FPCIB0 | 153 | #ifdef CONFIG_TOSHIBA_FPCIB0 |
235 | if (tx4927_using_backplane) { | 154 | if (sw_irq == TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC && |
236 | int irq = i8259_irq(); | 155 | tx4927_using_backplane) { |
237 | if (irq >= 0) | 156 | int irq = i8259_irq(); |
238 | sw_irq = irq; | 157 | if (irq >= 0) |
239 | } | 158 | sw_irq = irq; |
159 | } | ||
240 | #endif | 160 | #endif |
241 | 161 | } | |
242 | RETURN: | ||
243 | return (sw_irq); | 162 | return (sw_irq); |
244 | } | 163 | } |
245 | 164 | ||
@@ -250,21 +169,10 @@ static struct irqaction toshiba_rbtx4927_irq_ioc_action = { | |||
250 | .name = TOSHIBA_RBTX4927_IOC_NAME | 169 | .name = TOSHIBA_RBTX4927_IOC_NAME |
251 | }; | 170 | }; |
252 | 171 | ||
253 | |||
254 | /**********************************************************************************/ | ||
255 | /* Functions for ioc */ | ||
256 | /**********************************************************************************/ | ||
257 | |||
258 | |||
259 | static void __init toshiba_rbtx4927_irq_ioc_init(void) | 172 | static void __init toshiba_rbtx4927_irq_ioc_init(void) |
260 | { | 173 | { |
261 | int i; | 174 | int i; |
262 | 175 | ||
263 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT, | ||
264 | "beg=%d end=%d\n", | ||
265 | TOSHIBA_RBTX4927_IRQ_IOC_BEG, | ||
266 | TOSHIBA_RBTX4927_IRQ_IOC_END); | ||
267 | |||
268 | for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; | 176 | for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; |
269 | i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) | 177 | i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) |
270 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, | 178 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, |
@@ -276,37 +184,16 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) | |||
276 | 184 | ||
277 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | 185 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) |
278 | { | 186 | { |
279 | volatile unsigned char v; | 187 | unsigned char v; |
280 | |||
281 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE, | ||
282 | "irq=%d\n", irq); | ||
283 | |||
284 | if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG | ||
285 | || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) { | ||
286 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
287 | "bad irq=%d\n", irq); | ||
288 | panic("\n"); | ||
289 | } | ||
290 | 188 | ||
291 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 189 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
292 | v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 190 | v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); |
293 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 191 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
294 | } | 192 | } |
295 | 193 | ||
296 | |||
297 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | 194 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) |
298 | { | 195 | { |
299 | volatile unsigned char v; | 196 | unsigned char v; |
300 | |||
301 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE, | ||
302 | "irq=%d\n", irq); | ||
303 | |||
304 | if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG | ||
305 | || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) { | ||
306 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, | ||
307 | "bad irq=%d\n", irq); | ||
308 | panic("\n"); | ||
309 | } | ||
310 | 197 | ||
311 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 198 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
312 | v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 199 | v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); |
@@ -314,7 +201,6 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | |||
314 | mmiowb(); | 201 | mmiowb(); |
315 | } | 202 | } |
316 | 203 | ||
317 | |||
318 | void __init arch_init_irq(void) | 204 | void __init arch_init_irq(void) |
319 | { | 205 | { |
320 | extern void tx4927_irq_init(void); | 206 | extern void tx4927_irq_init(void); |
@@ -327,102 +213,4 @@ void __init arch_init_irq(void) | |||
327 | #endif | 213 | #endif |
328 | /* Onboard 10M Ether: High Active */ | 214 | /* Onboard 10M Ether: High Active */ |
329 | set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); | 215 | set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); |
330 | |||
331 | wbflush(); | ||
332 | } | ||
333 | |||
334 | void toshiba_rbtx4927_irq_dump(char *key) | ||
335 | { | ||
336 | #ifdef TOSHIBA_RBTX4927_IRQ_DEBUG | ||
337 | { | ||
338 | u32 i, j = 0; | ||
339 | for (i = 0; i < NR_IRQS; i++) { | ||
340 | if (strcmp(irq_desc[i].chip->name, "none") | ||
341 | == 0) | ||
342 | continue; | ||
343 | |||
344 | if ((i >= 1) | ||
345 | && (irq_desc[i - 1].chip->name == | ||
346 | irq_desc[i].chip->name)) { | ||
347 | j++; | ||
348 | } else { | ||
349 | j = 0; | ||
350 | } | ||
351 | TOSHIBA_RBTX4927_IRQ_DPRINTK | ||
352 | (TOSHIBA_RBTX4927_IRQ_INFO, | ||
353 | "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", | ||
354 | key, i, i, irq_desc[i].status, | ||
355 | (u32) irq_desc[i].chip, | ||
356 | (u32) irq_desc[i].action, | ||
357 | (u32) (irq_desc[i].action ? irq_desc[i]. | ||
358 | action->handler : 0), | ||
359 | irq_desc[i].depth, | ||
360 | irq_desc[i].chip->name, j); | ||
361 | } | ||
362 | } | ||
363 | #endif | ||
364 | } | ||
365 | |||
366 | void toshiba_rbtx4927_irq_dump_pics(char *s) | ||
367 | { | ||
368 | u32 level0_m; | ||
369 | u32 level0_s; | ||
370 | u32 level1_m; | ||
371 | u32 level1_s; | ||
372 | u32 level2; | ||
373 | u32 level2_p; | ||
374 | u32 level2_s; | ||
375 | u32 level3_m; | ||
376 | u32 level3_s; | ||
377 | u32 level4_m; | ||
378 | u32 level4_s; | ||
379 | u32 level5_m; | ||
380 | u32 level5_s; | ||
381 | |||
382 | if (s == NULL) | ||
383 | s = "null"; | ||
384 | |||
385 | level0_m = (read_c0_status() & 0x0000ff00) >> 8; | ||
386 | level0_s = (read_c0_cause() & 0x0000ff00) >> 8; | ||
387 | |||
388 | level1_m = level0_m; | ||
389 | level1_s = level0_s & 0x87; | ||
390 | |||
391 | level2 = __raw_readl((void __iomem *)0xff1ff6a0UL); | ||
392 | level2_p = (((level2 & 0x10000)) ? 0 : 1); | ||
393 | level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f)); | ||
394 | |||
395 | level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f; | ||
396 | level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; | ||
397 | |||
398 | level4_m = inb(0x21); | ||
399 | outb(0x0A, 0x20); | ||
400 | level4_s = inb(0x20); | ||
401 | |||
402 | level5_m = inb(0xa1); | ||
403 | outb(0x0A, 0xa0); | ||
404 | level5_s = inb(0xa0); | ||
405 | |||
406 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
407 | "dump_raw_pic() "); | ||
408 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
409 | "cp0:m=0x%02x/s=0x%02x ", level0_m, | ||
410 | level0_s); | ||
411 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
412 | "cp0:m=0x%02x/s=0x%02x ", level1_m, | ||
413 | level1_s); | ||
414 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
415 | "pic:e=0x%02x/s=0x%02x ", level2_p, | ||
416 | level2_s); | ||
417 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
418 | "ioc:m=0x%02x/s=0x%02x ", level3_m, | ||
419 | level3_s); | ||
420 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
421 | "sbm:m=0x%02x/s=0x%02x ", level4_m, | ||
422 | level4_s); | ||
423 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, | ||
424 | "sbs:m=0x%02x/s=0x%02x ", level5_m, | ||
425 | level5_s); | ||
426 | TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n", | ||
427 | s); | ||
428 | } | 216 | } |