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authorRalf Baechle <ralf@linux-mips.org>2009-03-30 08:49:44 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-03-30 08:49:44 -0400
commitc87e09096dcd1ea3da8dfe434ee694fac51031c8 (patch)
treed988b5b545173c79ac013977720d62c7d26ec337 /arch/mips/sni
parent3e168ae286f5203d4b4aae0ae15c0d6282bcdd21 (diff)
MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms
__do_IRQ() is deprecated and will go away. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sni')
-rw-r--r--arch/mips/sni/a20r.c2
-rw-r--r--arch/mips/sni/pcimt.c2
-rw-r--r--arch/mips/sni/pcit.c4
-rw-r--r--arch/mips/sni/rm200.c2
4 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index 3f8cf5eb2f06..7dd76fb3b645 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -219,7 +219,7 @@ void __init sni_a20r_irq_init(void)
219 int i; 219 int i;
220 220
221 for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++) 221 for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++)
222 set_irq_chip(i, &a20r_irq_type); 222 set_irq_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
223 sni_hwint = a20r_hwint; 223 sni_hwint = a20r_hwint;
224 change_c0_status(ST0_IM, IE_IRQ0); 224 change_c0_status(ST0_IM, IE_IRQ0);
225 setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); 225 setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 834650f371e0..74e6c67982fb 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -304,7 +304,7 @@ void __init sni_pcimt_irq_init(void)
304 mips_cpu_irq_init(); 304 mips_cpu_irq_init();
305 /* Actually we've got more interrupts to handle ... */ 305 /* Actually we've got more interrupts to handle ... */
306 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++) 306 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++)
307 set_irq_chip(i, &pcimt_irq_type); 307 set_irq_chip_and_handler(i, &pcimt_irq_type, handle_level_irq);
308 sni_hwint = sni_pcimt_hwint; 308 sni_hwint = sni_pcimt_hwint;
309 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3); 309 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3);
310} 310}
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index e5f12cf96e8e..071a9573ac7f 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -246,7 +246,7 @@ void __init sni_pcit_irq_init(void)
246 246
247 mips_cpu_irq_init(); 247 mips_cpu_irq_init();
248 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) 248 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
249 set_irq_chip(i, &pcit_irq_type); 249 set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
250 *(volatile u32 *)SNI_PCIT_INT_REG = 0; 250 *(volatile u32 *)SNI_PCIT_INT_REG = 0;
251 sni_hwint = sni_pcit_hwint; 251 sni_hwint = sni_pcit_hwint;
252 change_c0_status(ST0_IM, IE_IRQ1); 252 change_c0_status(ST0_IM, IE_IRQ1);
@@ -259,7 +259,7 @@ void __init sni_pcit_cplus_irq_init(void)
259 259
260 mips_cpu_irq_init(); 260 mips_cpu_irq_init();
261 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) 261 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
262 set_irq_chip(i, &pcit_irq_type); 262 set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
263 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; 263 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
264 sni_hwint = sni_pcit_hwint_cplus; 264 sni_hwint = sni_pcit_hwint_cplus;
265 change_c0_status(ST0_IM, IE_IRQ0); 265 change_c0_status(ST0_IM, IE_IRQ0);
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 5310aa75afa4..b4352a0c8151 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -487,7 +487,7 @@ void __init sni_rm200_irq_init(void)
487 mips_cpu_irq_init(); 487 mips_cpu_irq_init();
488 /* Actually we've got more interrupts to handle ... */ 488 /* Actually we've got more interrupts to handle ... */
489 for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++) 489 for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++)
490 set_irq_chip(i, &rm200_irq_type); 490 set_irq_chip_and_handler(i, &rm200_irq_type, handle_level_irq);
491 sni_hwint = sni_rm200_hwint; 491 sni_hwint = sni_rm200_hwint;
492 change_c0_status(ST0_IM, IE_IRQ0); 492 change_c0_status(ST0_IM, IE_IRQ0);
493 setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq); 493 setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq);