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authorArnd Bergmann <arnd@arndb.de>2013-04-09 08:56:08 -0400
committerArnd Bergmann <arnd@arndb.de>2013-04-09 08:56:08 -0400
commit0a01216c452d092b16c5a559cca339ad60193457 (patch)
tree10a2dac7501ee889f5b0b1634abd16c81d3952d0 /arch/mips/mm/sc-mips.c
parent81211c4cc04ca33f7c3ae10de547113e34d9a59e (diff)
parente8094b2c17126c7dfdeafa296f206a4a3b122d23 (diff)
Merge tag 'imx-fixes-3.9-5' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo <shawn.guo@linaro.org>: The imx fixes for 3.9, take 5: * A couple imx35 clock fixes for regressions caused by common clock framework conversion. The admux and iomux get disabled by common clock framework late initcall, and hence causes problems. * Add missing twd clock lookup in device tree. This becomes required since commit bd60345 (ARM: use device tree to get smp_twd clock) forces all DT boot to find lookup from device tree. * Fix imx6q ldb_di clock parents mismatch per reference manual. * tag 'imx-fixes-3.9-5' of git://git.linaro.org/people/shawnguo/linux-2.6: (217 commits) ARM i.MX6: Fix ldb_di clock selection ARM: imx: provide twd clock lookup from device tree ARM: imx35 Bugfix admux clock ARM: clk-imx35: Bugfix iomux clock Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/mips/mm/sc-mips.c')
-rw-r--r--arch/mips/mm/sc-mips.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 93d937b4b1ba..df96da7e939b 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -98,10 +98,8 @@ static inline int __init mips_sc_probe(void)
98 c->scache.flags |= MIPS_CACHE_NOT_PRESENT; 98 c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
99 99
100 /* Ignore anything but MIPSxx processors */ 100 /* Ignore anything but MIPSxx processors */
101 if (c->isa_level != MIPS_CPU_ISA_M32R1 && 101 if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
102 c->isa_level != MIPS_CPU_ISA_M32R2 && 102 MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)))
103 c->isa_level != MIPS_CPU_ISA_M64R1 &&
104 c->isa_level != MIPS_CPU_ISA_M64R2)
105 return 0; 103 return 0;
106 104
107 /* Does this MIPS32/MIPS64 CPU have a config2 register? */ 105 /* Does this MIPS32/MIPS64 CPU have a config2 register? */