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authorPaul Gortmaker <paul.gortmaker@windriver.com>2013-06-18 09:38:59 -0400
committerPaul Gortmaker <paul.gortmaker@windriver.com>2013-07-14 19:36:51 -0400
commit078a55fc824c1633b3a507e4ad48b4637c1dfc18 (patch)
treeb7abb8d50bf6e322baaea322e9224d7715b52f5b /arch/mips/mm/c-r4k.c
parent60ffef065dd40b91f6f76af6c7510ddf23102f54 (diff)
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 21813beec7a5..f749f687ee87 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -107,7 +107,7 @@ static inline void r4k_blast_dcache_page_dc64(unsigned long addr)
107 blast_dcache64_page(addr); 107 blast_dcache64_page(addr);
108} 108}
109 109
110static void __cpuinit r4k_blast_dcache_page_setup(void) 110static void r4k_blast_dcache_page_setup(void)
111{ 111{
112 unsigned long dc_lsize = cpu_dcache_line_size(); 112 unsigned long dc_lsize = cpu_dcache_line_size();
113 113
@@ -123,7 +123,7 @@ static void __cpuinit r4k_blast_dcache_page_setup(void)
123 123
124static void (* r4k_blast_dcache_page_indexed)(unsigned long addr); 124static void (* r4k_blast_dcache_page_indexed)(unsigned long addr);
125 125
126static void __cpuinit r4k_blast_dcache_page_indexed_setup(void) 126static void r4k_blast_dcache_page_indexed_setup(void)
127{ 127{
128 unsigned long dc_lsize = cpu_dcache_line_size(); 128 unsigned long dc_lsize = cpu_dcache_line_size();
129 129
@@ -140,7 +140,7 @@ static void __cpuinit r4k_blast_dcache_page_indexed_setup(void)
140void (* r4k_blast_dcache)(void); 140void (* r4k_blast_dcache)(void);
141EXPORT_SYMBOL(r4k_blast_dcache); 141EXPORT_SYMBOL(r4k_blast_dcache);
142 142
143static void __cpuinit r4k_blast_dcache_setup(void) 143static void r4k_blast_dcache_setup(void)
144{ 144{
145 unsigned long dc_lsize = cpu_dcache_line_size(); 145 unsigned long dc_lsize = cpu_dcache_line_size();
146 146
@@ -227,7 +227,7 @@ static inline void tx49_blast_icache32_page_indexed(unsigned long page)
227 227
228static void (* r4k_blast_icache_page)(unsigned long addr); 228static void (* r4k_blast_icache_page)(unsigned long addr);
229 229
230static void __cpuinit r4k_blast_icache_page_setup(void) 230static void r4k_blast_icache_page_setup(void)
231{ 231{
232 unsigned long ic_lsize = cpu_icache_line_size(); 232 unsigned long ic_lsize = cpu_icache_line_size();
233 233
@@ -244,7 +244,7 @@ static void __cpuinit r4k_blast_icache_page_setup(void)
244 244
245static void (* r4k_blast_icache_page_indexed)(unsigned long addr); 245static void (* r4k_blast_icache_page_indexed)(unsigned long addr);
246 246
247static void __cpuinit r4k_blast_icache_page_indexed_setup(void) 247static void r4k_blast_icache_page_indexed_setup(void)
248{ 248{
249 unsigned long ic_lsize = cpu_icache_line_size(); 249 unsigned long ic_lsize = cpu_icache_line_size();
250 250
@@ -269,7 +269,7 @@ static void __cpuinit r4k_blast_icache_page_indexed_setup(void)
269void (* r4k_blast_icache)(void); 269void (* r4k_blast_icache)(void);
270EXPORT_SYMBOL(r4k_blast_icache); 270EXPORT_SYMBOL(r4k_blast_icache);
271 271
272static void __cpuinit r4k_blast_icache_setup(void) 272static void r4k_blast_icache_setup(void)
273{ 273{
274 unsigned long ic_lsize = cpu_icache_line_size(); 274 unsigned long ic_lsize = cpu_icache_line_size();
275 275
@@ -290,7 +290,7 @@ static void __cpuinit r4k_blast_icache_setup(void)
290 290
291static void (* r4k_blast_scache_page)(unsigned long addr); 291static void (* r4k_blast_scache_page)(unsigned long addr);
292 292
293static void __cpuinit r4k_blast_scache_page_setup(void) 293static void r4k_blast_scache_page_setup(void)
294{ 294{
295 unsigned long sc_lsize = cpu_scache_line_size(); 295 unsigned long sc_lsize = cpu_scache_line_size();
296 296
@@ -308,7 +308,7 @@ static void __cpuinit r4k_blast_scache_page_setup(void)
308 308
309static void (* r4k_blast_scache_page_indexed)(unsigned long addr); 309static void (* r4k_blast_scache_page_indexed)(unsigned long addr);
310 310
311static void __cpuinit r4k_blast_scache_page_indexed_setup(void) 311static void r4k_blast_scache_page_indexed_setup(void)
312{ 312{
313 unsigned long sc_lsize = cpu_scache_line_size(); 313 unsigned long sc_lsize = cpu_scache_line_size();
314 314
@@ -326,7 +326,7 @@ static void __cpuinit r4k_blast_scache_page_indexed_setup(void)
326 326
327static void (* r4k_blast_scache)(void); 327static void (* r4k_blast_scache)(void);
328 328
329static void __cpuinit r4k_blast_scache_setup(void) 329static void r4k_blast_scache_setup(void)
330{ 330{
331 unsigned long sc_lsize = cpu_scache_line_size(); 331 unsigned long sc_lsize = cpu_scache_line_size();
332 332
@@ -797,11 +797,11 @@ static inline void alias_74k_erratum(struct cpuinfo_mips *c)
797 } 797 }
798} 798}
799 799
800static char *way_string[] __cpuinitdata = { NULL, "direct mapped", "2-way", 800static char *way_string[] = { NULL, "direct mapped", "2-way",
801 "3-way", "4-way", "5-way", "6-way", "7-way", "8-way" 801 "3-way", "4-way", "5-way", "6-way", "7-way", "8-way"
802}; 802};
803 803
804static void __cpuinit probe_pcache(void) 804static void probe_pcache(void)
805{ 805{
806 struct cpuinfo_mips *c = &current_cpu_data; 806 struct cpuinfo_mips *c = &current_cpu_data;
807 unsigned int config = read_c0_config(); 807 unsigned int config = read_c0_config();
@@ -1119,7 +1119,7 @@ static void __cpuinit probe_pcache(void)
1119 * executes in KSEG1 space or else you will crash and burn badly. You have 1119 * executes in KSEG1 space or else you will crash and burn badly. You have
1120 * been warned. 1120 * been warned.
1121 */ 1121 */
1122static int __cpuinit probe_scache(void) 1122static int probe_scache(void)
1123{ 1123{
1124 unsigned long flags, addr, begin, end, pow2; 1124 unsigned long flags, addr, begin, end, pow2;
1125 unsigned int config = read_c0_config(); 1125 unsigned int config = read_c0_config();
@@ -1196,7 +1196,7 @@ extern int r5k_sc_init(void);
1196extern int rm7k_sc_init(void); 1196extern int rm7k_sc_init(void);
1197extern int mips_sc_init(void); 1197extern int mips_sc_init(void);
1198 1198
1199static void __cpuinit setup_scache(void) 1199static void setup_scache(void)
1200{ 1200{
1201 struct cpuinfo_mips *c = &current_cpu_data; 1201 struct cpuinfo_mips *c = &current_cpu_data;
1202 unsigned int config = read_c0_config(); 1202 unsigned int config = read_c0_config();
@@ -1329,7 +1329,7 @@ static void nxp_pr4450_fixup_config(void)
1329 NXP_BARRIER(); 1329 NXP_BARRIER();
1330} 1330}
1331 1331
1332static int __cpuinitdata cca = -1; 1332static int cca = -1;
1333 1333
1334static int __init cca_setup(char *str) 1334static int __init cca_setup(char *str)
1335{ 1335{
@@ -1340,7 +1340,7 @@ static int __init cca_setup(char *str)
1340 1340
1341early_param("cca", cca_setup); 1341early_param("cca", cca_setup);
1342 1342
1343static void __cpuinit coherency_setup(void) 1343static void coherency_setup(void)
1344{ 1344{
1345 if (cca < 0 || cca > 7) 1345 if (cca < 0 || cca > 7)
1346 cca = read_c0_config() & CONF_CM_CMASK; 1346 cca = read_c0_config() & CONF_CM_CMASK;
@@ -1380,7 +1380,7 @@ static void __cpuinit coherency_setup(void)
1380 } 1380 }
1381} 1381}
1382 1382
1383static void __cpuinit r4k_cache_error_setup(void) 1383static void r4k_cache_error_setup(void)
1384{ 1384{
1385 extern char __weak except_vec2_generic; 1385 extern char __weak except_vec2_generic;
1386 extern char __weak except_vec2_sb1; 1386 extern char __weak except_vec2_sb1;
@@ -1398,7 +1398,7 @@ static void __cpuinit r4k_cache_error_setup(void)
1398 } 1398 }
1399} 1399}
1400 1400
1401void __cpuinit r4k_cache_init(void) 1401void r4k_cache_init(void)
1402{ 1402{
1403 extern void build_clear_page(void); 1403 extern void build_clear_page(void);
1404 extern void build_copy_page(void); 1404 extern void build_copy_page(void);