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authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /arch/mips/loongson/common/early_printk.c
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/mips/loongson/common/early_printk.c')
-rw-r--r--arch/mips/loongson/common/early_printk.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson/common/early_printk.c
index bc73edc0cfd8..a71736f00443 100644
--- a/arch/mips/loongson/common/early_printk.c
+++ b/arch/mips/loongson/common/early_printk.c
@@ -1,8 +1,8 @@
1/* early printk support 1/* early printk support
2 * 2 *
3 * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca> 3 * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
4 * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology 4 * Copyright (c) 2009 Lemote Inc.
5 * Author: Wu Zhangjin, wuzj@lemote.com 5 * Author: Wu Zhangjin, wuzhangjin@gmail.com
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -12,26 +12,29 @@
12#include <linux/serial_reg.h> 12#include <linux/serial_reg.h>
13 13
14#include <loongson.h> 14#include <loongson.h>
15#include <machine.h>
16 15
17#define PORT(base, offset) (u8 *)(base + offset) 16#define PORT(base, offset) (u8 *)(base + offset)
18 17
19static inline unsigned int serial_in(phys_addr_t base, int offset) 18static inline unsigned int serial_in(unsigned char *base, int offset)
20{ 19{
21 return readb(PORT(base, offset)); 20 return readb(PORT(base, offset));
22} 21}
23 22
24static inline void serial_out(phys_addr_t base, int offset, int value) 23static inline void serial_out(unsigned char *base, int offset, int value)
25{ 24{
26 writeb(value, PORT(base, offset)); 25 writeb(value, PORT(base, offset));
27} 26}
28 27
29void prom_putchar(char c) 28void prom_putchar(char c)
30{ 29{
31 phys_addr_t uart_base = 30 int timeout;
32 (phys_addr_t) ioremap_nocache(LOONGSON_UART_BASE, 8); 31 unsigned char *uart_base;
33 32
34 while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) 33 uart_base = (unsigned char *)_loongson_uart_base;
34 timeout = 1024;
35
36 while (((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) &&
37 (timeout-- > 0))
35 ; 38 ;
36 39
37 serial_out(uart_base, UART_TX, c); 40 serial_out(uart_base, UART_TX, c);