diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2014-03-30 07:20:10 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-31 12:17:12 -0400 |
commit | a809d46066d5171ed446d59a51cd1e57d99fcfc3 (patch) | |
tree | ede5e0f23d1577da4685034894f66f1de2529937 /arch/mips/kernel | |
parent | 30ee615bb86ba640c9ec7f85fb95c1b0e31c41be (diff) |
MIPS: Fix gigaton of warning building with microMIPS.
With binutils 2.24 the attempt to switch with microMIPS mode to MIPS III
mode through .set mips3 results in *lots* of warnings like
{standard input}: Assembler messages:
{standard input}:397: Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
during a kernel build. Fixed by using .set arch=r4000 instead.
This breaks support for building the kernel with binutils 2.13 which
was supported for 32 bit kernels only anyway and 2.14 which was a bad
vintage for MIPS anyway.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/bmips_vec.S | 2 | ||||
-rw-r--r-- | arch/mips/kernel/genex.S | 6 | ||||
-rw-r--r-- | arch/mips/kernel/idle.c | 6 | ||||
-rw-r--r-- | arch/mips/kernel/r4k_fpu.S | 2 | ||||
-rw-r--r-- | arch/mips/kernel/r4k_switch.S | 2 | ||||
-rw-r--r-- | arch/mips/kernel/syscall.c | 4 |
6 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/kernel/bmips_vec.S b/arch/mips/kernel/bmips_vec.S index a5bf73d22fcc..290c23b51678 100644 --- a/arch/mips/kernel/bmips_vec.S +++ b/arch/mips/kernel/bmips_vec.S | |||
@@ -122,7 +122,7 @@ NESTED(bmips_reset_nmi_vec, PT_SIZE, sp) | |||
122 | jr k0 | 122 | jr k0 |
123 | 123 | ||
124 | RESTORE_ALL | 124 | RESTORE_ALL |
125 | .set mips3 | 125 | .set arch=r4000 |
126 | eret | 126 | eret |
127 | 127 | ||
128 | /*********************************************************************** | 128 | /*********************************************************************** |
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 7365cd6be702..a9ce3408be25 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -67,7 +67,7 @@ NESTED(except_vec3_generic, 0, sp) | |||
67 | */ | 67 | */ |
68 | NESTED(except_vec3_r4000, 0, sp) | 68 | NESTED(except_vec3_r4000, 0, sp) |
69 | .set push | 69 | .set push |
70 | .set mips3 | 70 | .set arch=r4000 |
71 | .set noat | 71 | .set noat |
72 | mfc0 k1, CP0_CAUSE | 72 | mfc0 k1, CP0_CAUSE |
73 | li k0, 31<<2 | 73 | li k0, 31<<2 |
@@ -139,7 +139,7 @@ LEAF(__r4k_wait) | |||
139 | nop | 139 | nop |
140 | nop | 140 | nop |
141 | #endif | 141 | #endif |
142 | .set mips3 | 142 | .set arch=r4000 |
143 | wait | 143 | wait |
144 | /* end of rollback region (the region size must be power of two) */ | 144 | /* end of rollback region (the region size must be power of two) */ |
145 | 1: | 145 | 1: |
@@ -577,7 +577,7 @@ isrdhwr: | |||
577 | ori k1, _THREAD_MASK | 577 | ori k1, _THREAD_MASK |
578 | xori k1, _THREAD_MASK | 578 | xori k1, _THREAD_MASK |
579 | LONG_L v1, TI_TP_VALUE(k1) | 579 | LONG_L v1, TI_TP_VALUE(k1) |
580 | .set mips3 | 580 | .set arch=r4000 |
581 | eret | 581 | eret |
582 | .set mips0 | 582 | .set mips0 |
583 | #endif | 583 | #endif |
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c index 9f904eda5de5..837ff27950bc 100644 --- a/arch/mips/kernel/idle.c +++ b/arch/mips/kernel/idle.c | |||
@@ -64,7 +64,7 @@ void r4k_wait_irqoff(void) | |||
64 | if (!need_resched()) | 64 | if (!need_resched()) |
65 | __asm__( | 65 | __asm__( |
66 | " .set push \n" | 66 | " .set push \n" |
67 | " .set mips3 \n" | 67 | " .set arch=r4000 \n" |
68 | " wait \n" | 68 | " wait \n" |
69 | " .set pop \n"); | 69 | " .set pop \n"); |
70 | local_irq_enable(); | 70 | local_irq_enable(); |
@@ -82,7 +82,7 @@ static void rm7k_wait_irqoff(void) | |||
82 | if (!need_resched()) | 82 | if (!need_resched()) |
83 | __asm__( | 83 | __asm__( |
84 | " .set push \n" | 84 | " .set push \n" |
85 | " .set mips3 \n" | 85 | " .set arch=r4000 \n" |
86 | " .set noat \n" | 86 | " .set noat \n" |
87 | " mfc0 $1, $12 \n" | 87 | " mfc0 $1, $12 \n" |
88 | " sync \n" | 88 | " sync \n" |
@@ -103,7 +103,7 @@ static void au1k_wait(void) | |||
103 | unsigned long c0status = read_c0_status() | 1; /* irqs on */ | 103 | unsigned long c0status = read_c0_status() | 1; /* irqs on */ |
104 | 104 | ||
105 | __asm__( | 105 | __asm__( |
106 | " .set mips3 \n" | 106 | " .set arch=r4000 \n" |
107 | " cache 0x14, 0(%0) \n" | 107 | " cache 0x14, 0(%0) \n" |
108 | " cache 0x14, 32(%0) \n" | 108 | " cache 0x14, 32(%0) \n" |
109 | " sync \n" | 109 | " sync \n" |
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 752b50a69264..0cfa7a56a153 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S | |||
@@ -31,7 +31,7 @@ | |||
31 | .endm | 31 | .endm |
32 | 32 | ||
33 | .set noreorder | 33 | .set noreorder |
34 | .set mips3 | 34 | .set arch=r4000 |
35 | 35 | ||
36 | LEAF(_save_fp_context) | 36 | LEAF(_save_fp_context) |
37 | cfc1 t1, fcr31 | 37 | cfc1 t1, fcr31 |
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index f938ecd22af0..abacac7c33ef 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S | |||
@@ -294,7 +294,7 @@ LEAF(_init_fpu) | |||
294 | 1: .set pop | 294 | 1: .set pop |
295 | #endif /* CONFIG_CPU_MIPS32_R2 */ | 295 | #endif /* CONFIG_CPU_MIPS32_R2 */ |
296 | #else | 296 | #else |
297 | .set mips3 | 297 | .set arch=r4000 |
298 | dmtc1 t1, $f0 | 298 | dmtc1 t1, $f0 |
299 | dmtc1 t1, $f2 | 299 | dmtc1 t1, $f2 |
300 | dmtc1 t1, $f4 | 300 | dmtc1 t1, $f4 |
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index b79d13f95bf0..4a4f9dda5658 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c | |||
@@ -110,7 +110,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) | |||
110 | 110 | ||
111 | if (cpu_has_llsc && R10000_LLSC_WAR) { | 111 | if (cpu_has_llsc && R10000_LLSC_WAR) { |
112 | __asm__ __volatile__ ( | 112 | __asm__ __volatile__ ( |
113 | " .set mips3 \n" | 113 | " .set arch=r4000 \n" |
114 | " li %[err], 0 \n" | 114 | " li %[err], 0 \n" |
115 | "1: ll %[old], (%[addr]) \n" | 115 | "1: ll %[old], (%[addr]) \n" |
116 | " move %[tmp], %[new] \n" | 116 | " move %[tmp], %[new] \n" |
@@ -135,7 +135,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) | |||
135 | : "memory"); | 135 | : "memory"); |
136 | } else if (cpu_has_llsc) { | 136 | } else if (cpu_has_llsc) { |
137 | __asm__ __volatile__ ( | 137 | __asm__ __volatile__ ( |
138 | " .set mips3 \n" | 138 | " .set arch=r4000 \n" |
139 | " li %[err], 0 \n" | 139 | " li %[err], 0 \n" |
140 | "1: ll %[old], (%[addr]) \n" | 140 | "1: ll %[old], (%[addr]) \n" |
141 | " move %[tmp], %[new] \n" | 141 | " move %[tmp], %[new] \n" |