Merge tag 'v3.10' into sched/core

Merge in a recent upstream commit:

  c2853c8df57f include/linux/math64.h: add div64_ul()

because:

  72a4cf20cb71 sched: Change cfs_rq load avg to unsigned long

relies on it.

[ We don't rebase sched/core for this, because the handful of
  followup commits after the broken commit are not behavioral
  changes so are unlikely to be needed during bisection. ]

Signed-off-by: Ingo Molnar <mingo@kernel.org>

6 files changed, 49 insertions, 19 deletions

diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c
index e06f777e9c49..1188e00bb120 100644
--- a/arch/mips/kernel/binfmt_elfn32.c
+++ b/arch/mips/kernel/binfmt_elfn32.c
@@ -119,4 +119,15 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
 #undef TASK_SIZE
 #define TASK_SIZE TASK_SIZE32
 
+#undef cputime_to_timeval
+#define cputime_to_timeval cputime_to_compat_timeval
+static __inline__ void
+cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
+{
+        unsigned long jiffies = cputime_to_jiffies(cputime);
+
+        value->tv_usec = (jiffies % HZ) * (1000000L / HZ);
+        value->tv_sec = jiffies / HZ;
+}
+
 #include "../../../fs/binfmt_elf.c"
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index 97c5a1668e53..202e581e6096 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -162,4 +162,15 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)");
 #undef TASK_SIZE
 #define TASK_SIZE TASK_SIZE32
 
+#undef cputime_to_timeval
+#define cputime_to_timeval cputime_to_compat_timeval
+static __inline__ void
+cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value)
+{
+        unsigned long jiffies = cputime_to_jiffies(cputime);
+
+        value->tv_usec = (jiffies % HZ) * (1000000L / HZ);
+        value->tv_sec = jiffies / HZ;
+}
+
 #include "../../../fs/binfmt_elf.c"
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c
index cf5509f13dd5..dba90ec0dc38 100644
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -25,12 +25,16 @@
 #define MCOUNT_OFFSET_INSNS 4
 #endif
 
+#ifdef CONFIG_DYNAMIC_FTRACE
+
 /* Arch override because MIPS doesn't need to run this from stop_machine() */
 void arch_ftrace_update_code(int command)
 {
         ftrace_modify_all_code(command);
 }
 
+#endif
+
 /*
  * Check if the address is in kernel space
  *
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 3b09b888afa9..0c655deeea4a 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -93,26 +93,27 @@ static void rm7k_wait_irqoff(void)
 }
 
 /*
- * The Au1xxx wait is available only if using 32khz counter or
- * external timer source, but specifically not CP0 Counter.
- * alchemy/common/time.c may override cpu_wait!
+ * Au1 'wait' is only useful when the 32kHz counter is used as timer,
+ * since coreclock (and the cp0 counter) stops upon executing it. Only an
+ * interrupt can wake it, so they must be enabled before entering idle modes.
  */
 static void au1k_wait(void)
 {
+        unsigned long c0status = read_c0_status() | 1;  /* irqs on */
+
         __asm__(
         "       .set    mips3                   \n"
         "       cache   0x14, 0(%0)             \n"
         "       cache   0x14, 32(%0)            \n"
         "       sync                            \n"
-        "       nop                             \n"
+        "       mtc0    %1, $12                 \n" /* wr c0status */
         "       wait                            \n"
         "       nop                             \n"
         "       nop                             \n"
         "       nop                             \n"
         "       nop                             \n"
         "       .set    mips0                   \n"
-        : : "r" (au1k_wait));
-        local_irq_enable();
+        : : "r" (au1k_wait), "r" (c0status));
 }
 
 static int __initdata nowait;
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index 93c070b41b0d..6fa198db8999 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -40,6 +40,7 @@
 #include <asm/processor.h>
 #include <asm/vpe.h>
 #include <asm/rtlx.h>
+#include <asm/setup.h>
 
 static struct rtlx_info *rtlx;
 static int major;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e3be67012d78..a75ae40184aa 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -897,22 +897,24 @@ out_sigsegv:
 
 asmlinkage void do_tr(struct pt_regs *regs)
 {
-        unsigned int opcode, tcode = 0;
+        u32 opcode, tcode = 0;
         u16 instr[2];
-        unsigned long epc = exception_epc(regs);
+        unsigned long epc = msk_isa16_mode(exception_epc(regs));
 
-        if ((__get_user(instr[0], (u16 __user *)msk_isa16_mode(epc))) ||
-                (__get_user(instr[1], (u16 __user *)msk_isa16_mode(epc + 2))))
+        if (get_isa16_mode(regs->cp0_epc)) {
+                if (__get_user(instr[0], (u16 __user *)(epc + 0)) ||
+                    __get_user(instr[1], (u16 __user *)(epc + 2)))
                         goto out_sigsegv;
-        opcode = (instr[0] << 16) | instr[1];
-
-        /* Immediate versions don't provide a code.  */
-        if (!(opcode & OPCODE)) {
-                if (get_isa16_mode(regs->cp0_epc))
-                        /* microMIPS */
-                        tcode = (opcode >> 12) & 0x1f;
-                else
-                        tcode = ((opcode >> 6) & ((1 << 10) - 1));
+                opcode = (instr[0] << 16) | instr[1];
+                /* Immediate versions don't provide a code.  */
+                if (!(opcode & OPCODE))
+                        tcode = (opcode >> 12) & ((1 << 4) - 1);
+        } else {
+                if (__get_user(opcode, (u32 __user *)epc))
+                        goto out_sigsegv;
+                /* Immediate versions don't provide a code.  */
+                if (!(opcode & OPCODE))
+                        tcode = (opcode >> 6) & ((1 << 10) - 1);
         }
 
         do_trap_or_bp(regs, tcode, "Trap");