MIPS: MT: Remove SMTC support

Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell <kevink@paralogos.com> is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras <Markos.Chandras@imgtec.com> patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 0 insertions, 33 deletions

diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index abacac7c33ef..547c522964de 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -87,18 +87,6 @@
 
         PTR_ADDU        t0, $28, _THREAD_SIZE - 32
         set_saved_sp    t0, t1, t2
-#ifdef CONFIG_MIPS_MT_SMTC
-        /* Read-modify-writes of Status must be atomic on a VPE */
-        mfc0    t2, CP0_TCSTATUS
-        ori     t1, t2, TCSTATUS_IXMT
-        mtc0    t1, CP0_TCSTATUS
-        andi    t2, t2, TCSTATUS_IXMT
-        _ehb
-        DMT     8                               # dmt   t0
-        move    t1,ra
-        jal     mips_ihb
-        move    ra,t1
-#endif /* CONFIG_MIPS_MT_SMTC */
         mfc0    t1, CP0_STATUS          /* Do we really need this? */
         li      a3, 0xff01
         and     t1, a3
@@ -107,18 +95,6 @@
         and     a2, a3
         or      a2, t1
         mtc0    a2, CP0_STATUS
-#ifdef CONFIG_MIPS_MT_SMTC
-        _ehb
-        andi    t0, t0, VPECONTROL_TE
-        beqz    t0, 1f
-        emt
-1:
-        mfc0    t1, CP0_TCSTATUS
-        xori    t1, t1, TCSTATUS_IXMT
-        or      t1, t1, t2
-        mtc0    t1, CP0_TCSTATUS
-        _ehb
-#endif /* CONFIG_MIPS_MT_SMTC */
         move    v0, a0
         jr      ra
         END(resume)
@@ -176,19 +152,10 @@ LEAF(_restore_msa)
 #define FPU_DEFAULT  0x00000000
 
 LEAF(_init_fpu)
-#ifdef CONFIG_MIPS_MT_SMTC
-        /* Rather than manipulate per-VPE Status, set per-TC bit in TCStatus */
-        mfc0    t0, CP0_TCSTATUS
-        /* Bit position is the same for Status, TCStatus */
-        li      t1, ST0_CU1
-        or      t0, t1
-        mtc0    t0, CP0_TCSTATUS
-#else /* Normal MIPS CU1 enable */
         mfc0    t0, CP0_STATUS
         li      t1, ST0_CU1
         or      t0, t1
         mtc0    t0, CP0_STATUS
-#endif /* CONFIG_MIPS_MT_SMTC */
         enable_fpu_hazard
 
         li      t1, FPU_DEFAULT