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authorJayachandran C <jchandra@broadcom.com>2013-03-23 13:27:53 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-05-07 19:19:04 -0400
commit33ff712aef509ff1b116a46084c96179f8da1d49 (patch)
tree2ea35165158d82337ad19c57a7dfa88ea97d0b75 /arch/mips/include
parent042df4fa28a459ac425cea9bc81764532c267ba4 (diff)
MIPS: Netlogic: Optimize and fix write_c0_eimr()
Remove the irq save/restore from write_c0_eimr(), as it is always called with interrupts off. This allows us to remove workaround in write_c0_eimr() to fix up the flags used by local_irq_save. This fixup worked on XLR, but will break when 32-bit support is added to r2 cpus like XLP. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/5022/ Acked-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/netlogic/mips-extns.h13
1 files changed, 5 insertions, 8 deletions
diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h
index 8ad2e0f81719..69d18a0e0581 100644
--- a/arch/mips/include/asm/netlogic/mips-extns.h
+++ b/arch/mips/include/asm/netlogic/mips-extns.h
@@ -43,16 +43,15 @@
43#define write_c0_eirr(val) __write_64bit_c0_register($9, 6, val) 43#define write_c0_eirr(val) __write_64bit_c0_register($9, 6, val)
44 44
45/* 45/*
46 * Writing EIMR in 32 bit is a special case, the lower 8 bit of the 46 * NOTE: Do not save/restore flags around write_c0_eimr().
47 * EIMR is shadowed in the status register, so we cannot save and 47 * On non-R2 platforms the flags has part of EIMR that is shadowed in STATUS
48 * restore status register for split read. 48 * register. Restoring flags will overwrite the lower 8 bits of EIMR.
49 *
50 * Call with interrupts disabled.
49 */ 51 */
50#define write_c0_eimr(val) \ 52#define write_c0_eimr(val) \
51do { \ 53do { \
52 if (sizeof(unsigned long) == 4) { \ 54 if (sizeof(unsigned long) == 4) { \
53 unsigned long __flags; \
54 \
55 local_irq_save(__flags); \
56 __asm__ __volatile__( \ 55 __asm__ __volatile__( \
57 ".set\tmips64\n\t" \ 56 ".set\tmips64\n\t" \
58 "dsll\t%L0, %L0, 32\n\t" \ 57 "dsll\t%L0, %L0, 32\n\t" \
@@ -62,8 +61,6 @@ do { \
62 "dmtc0\t%L0, $9, 7\n\t" \ 61 "dmtc0\t%L0, $9, 7\n\t" \
63 ".set\tmips0" \ 62 ".set\tmips0" \
64 : : "r" (val)); \ 63 : : "r" (val)); \
65 __flags = (__flags & 0xffff00ff) | (((val) & 0xff) << 8);\
66 local_irq_restore(__flags); \
67 } else \ 64 } else \
68 __write_64bit_c0_register($9, 7, (val)); \ 65 __write_64bit_c0_register($9, 7, (val)); \
69} while (0) 66} while (0)