1 files changed, 5 insertions, 8 deletions

diff --git a/arch/mips/include/asm/netlogic/mips-extns.h b/arch/mips/include/asm/netlogic/mips-extns.h
index 8ad2e0f81719..69d18a0e0581 100644
--- a/arch/mips/include/asm/netlogic/mips-extns.h
+++ b/arch/mips/include/asm/netlogic/mips-extns.h
@@ -43,16 +43,15 @@
 #define write_c0_eirr(val)      __write_64bit_c0_register($9, 6, val)
 
 /*
- * Writing EIMR in 32 bit is a special case, the lower 8 bit of the
- * EIMR is shadowed in the status register, so we cannot save and
- * restore status register for split read.
+ * NOTE: Do not save/restore flags around write_c0_eimr().
+ * On non-R2 platforms the flags has part of EIMR that is shadowed in STATUS
+ * register. Restoring flags will overwrite the lower 8 bits of EIMR.
+ *
+ * Call with interrupts disabled.
  */
 #define write_c0_eimr(val)                                              \
 do {                                                                    \
         if (sizeof(unsigned long) == 4) {                               \
-                unsigned long __flags;                                  \
-                                                                        \
-                local_irq_save(__flags);                                \
                 __asm__ __volatile__(                                   \
                         ".set\tmips64\n\t"                              \
                         "dsll\t%L0, %L0, 32\n\t"                        \
@@ -62,8 +61,6 @@ do {									\
                         "dmtc0\t%L0, $9, 7\n\t"                         \
                         ".set\tmips0"                                   \
                         : : "r" (val));                                 \
-                __flags = (__flags & 0xffff00ff) | (((val) & 0xff) << 8);\
-                local_irq_restore(__flags);                             \
         } else                                                          \
                 __write_64bit_c0_register($9, 7, (val));                \
 } while (0)