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authorMarkos Chandras <markos.chandras@imgtec.com>2014-11-26 10:43:11 -0500
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 10:37:35 -0500
commit84fef630127aa90ef547ddd018d3dc47b1e79a1e (patch)
tree0331c9646f7c6b25aeb46e0fcece9046d420a1d1 /arch/mips/include/uapi/asm
parent10d962d5342e84630b258dbd89668c359549b5b5 (diff)
MIPS: Emulate the new MIPS R6 BALC instruction
MIPS R6 uses the <R6 swc2 opcode for the new BALC instructions. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/include/uapi/asm')
-rw-r--r--arch/mips/include/uapi/asm/inst.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 78335414b18a..32063c52f24b 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -33,7 +33,7 @@ enum major_op {
33 sdl_op, sdr_op, swr_op, cache_op, 33 sdl_op, sdr_op, swr_op, cache_op,
34 ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op, 34 ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op,
35 lld_op, ldc1_op, ldc2_op, ld_op, 35 lld_op, ldc1_op, ldc2_op, ld_op,
36 sc_op, swc1_op, swc2_op, major_3b_op, 36 sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op,
37 scd_op, sdc1_op, sdc2_op, sd_op 37 scd_op, sdc1_op, sdc2_op, sd_op
38}; 38};
39 39