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authorJayachandran C <jayachandranc@netlogicmicro.com>2011-11-15 19:21:28 -0500
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 17:04:56 -0500
commit65040e224e5b214a93fa0c790add5d69b054ecae (patch)
tree3d6b02575e61c04ad48535662398eae195f26ee1 /arch/mips/include/asm/netlogic/haldefs.h
parenta3d4fb2d2a4c52b22cde90049a78e323cde187e5 (diff)
MIPS: Netlogic: Add XLP platform files for XLP SoC
- Update common files to support XLP. - Add arch/mips/include/asm/netlogic/xlp-hal for register definitions and access macros - Add arch/mips/netlogic/xlp/ for XLP specific files. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2967/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/netlogic/haldefs.h')
-rw-r--r--arch/mips/include/asm/netlogic/haldefs.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/mips/include/asm/netlogic/haldefs.h b/arch/mips/include/asm/netlogic/haldefs.h
index e3264c19aabe..72a0c788b472 100644
--- a/arch/mips/include/asm/netlogic/haldefs.h
+++ b/arch/mips/include/asm/netlogic/haldefs.h
@@ -40,6 +40,9 @@
40 * and will provide a way to read 32/64 bit memory mapped registers in 40 * and will provide a way to read 32/64 bit memory mapped registers in
41 * all ABIs 41 * all ABIs
42 */ 42 */
43#if !defined(CONFIG_64BIT) && defined(CONFIG_CPU_XLP)
44#error "o32 compile not supported on XLP yet"
45#endif
43/* 46/*
44 * For o32 compilation, we have to disable interrupts and enable KX bit to 47 * For o32 compilation, we have to disable interrupts and enable KX bit to
45 * access 64 bit addresses or data. 48 * access 64 bit addresses or data.
@@ -133,10 +136,28 @@ nlm_write_reg64_xkphys(uint64_t base, uint32_t reg, uint64_t val)
133/* Location where IO base is mapped */ 136/* Location where IO base is mapped */
134extern uint64_t nlm_io_base; 137extern uint64_t nlm_io_base;
135 138
139#if defined(CONFIG_CPU_XLP)
140static inline uint64_t
141nlm_pcicfg_base(uint32_t devoffset)
142{
143 return nlm_io_base + devoffset;
144}
145
146static inline uint64_t
147nlm_xkphys_map_pcibar0(uint64_t pcibase)
148{
149 uint64_t paddr;
150
151 paddr = nlm_read_reg(pcibase, 0x4) & ~0xfu;
152 return (uint64_t)0x9000000000000000 | paddr;
153}
154#elif defined(CONFIG_CPU_XLR)
155
136static inline uint64_t 156static inline uint64_t
137nlm_mmio_base(uint32_t devoffset) 157nlm_mmio_base(uint32_t devoffset)
138{ 158{
139 return nlm_io_base + devoffset; 159 return nlm_io_base + devoffset;
140} 160}
161#endif
141 162
142#endif 163#endif