diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2013-01-29 11:13:17 -0500 |
---|---|---|
committer | John Crispin <blogic@openwrt.org> | 2013-02-16 19:25:27 -0500 |
commit | 9c099c4e79b67d5578ce8142e6214950be4fcf43 (patch) | |
tree | 9dfbc380060abeacef51074d17442f52fb037914 /arch/mips/ath79 | |
parent | f160a289e0e8848391f5ec48ff1a014b9c04b162 (diff) |
MIPS: ath79: simplify MISC IRQ handling
The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.
Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/ath79')
-rw-r--r-- | arch/mips/ath79/irq.c | 45 |
1 files changed, 9 insertions, 36 deletions
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 90d09fc15398..219cfa1f5961 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c | |||
@@ -35,44 +35,17 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
35 | pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) & | 35 | pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) & |
36 | __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); | 36 | __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); |
37 | 37 | ||
38 | if (pending & MISC_INT_UART) | 38 | if (!pending) { |
39 | generic_handle_irq(ATH79_MISC_IRQ_UART); | 39 | spurious_interrupt(); |
40 | 40 | return; | |
41 | else if (pending & MISC_INT_DMA) | 41 | } |
42 | generic_handle_irq(ATH79_MISC_IRQ_DMA); | ||
43 | |||
44 | else if (pending & MISC_INT_PERFC) | ||
45 | generic_handle_irq(ATH79_MISC_IRQ_PERFC); | ||
46 | |||
47 | else if (pending & MISC_INT_TIMER) | ||
48 | generic_handle_irq(ATH79_MISC_IRQ_TIMER); | ||
49 | |||
50 | else if (pending & MISC_INT_TIMER2) | ||
51 | generic_handle_irq(ATH79_MISC_IRQ_TIMER2); | ||
52 | |||
53 | else if (pending & MISC_INT_TIMER3) | ||
54 | generic_handle_irq(ATH79_MISC_IRQ_TIMER3); | ||
55 | |||
56 | else if (pending & MISC_INT_TIMER4) | ||
57 | generic_handle_irq(ATH79_MISC_IRQ_TIMER4); | ||
58 | |||
59 | else if (pending & MISC_INT_OHCI) | ||
60 | generic_handle_irq(ATH79_MISC_IRQ_OHCI); | ||
61 | |||
62 | else if (pending & MISC_INT_ERROR) | ||
63 | generic_handle_irq(ATH79_MISC_IRQ_ERROR); | ||
64 | |||
65 | else if (pending & MISC_INT_GPIO) | ||
66 | generic_handle_irq(ATH79_MISC_IRQ_GPIO); | ||
67 | |||
68 | else if (pending & MISC_INT_WDOG) | ||
69 | generic_handle_irq(ATH79_MISC_IRQ_WDOG); | ||
70 | 42 | ||
71 | else if (pending & MISC_INT_ETHSW) | 43 | while (pending) { |
72 | generic_handle_irq(ATH79_MISC_IRQ_ETHSW); | 44 | int bit = __ffs(pending); |
73 | 45 | ||
74 | else | 46 | generic_handle_irq(ATH79_MISC_IRQ(bit)); |
75 | spurious_interrupt(); | 47 | pending &= ~BIT(bit); |
48 | } | ||
76 | } | 49 | } |
77 | 50 | ||
78 | static void ar71xx_misc_irq_unmask(struct irq_data *d) | 51 | static void ar71xx_misc_irq_unmask(struct irq_data *d) |