diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2013-01-29 03:19:13 -0500 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-02-16 19:25:27 -0500 |
| commit | f160a289e0e8848391f5ec48ff1a014b9c04b162 (patch) | |
| tree | 7383334d6f93d294f832e2dbbc97f9ea9151e616 /arch/mips/ath79 | |
| parent | 8838becdf5f7261d7f5dfbbe957fe9b9ed188aec (diff) | |
MIPS: ath79: simplify ath79_gpio_function_* routines
Make ath79_gpio_function_{en,dis}able to be wrappers
around ath79_gpio_function_setup.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4871/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/ath79')
| -rw-r--r-- | arch/mips/ath79/gpio.c | 30 |
1 files changed, 6 insertions, 24 deletions
diff --git a/arch/mips/ath79/gpio.c b/arch/mips/ath79/gpio.c index 662a10ecd8e7..b7ed207e94a1 100644 --- a/arch/mips/ath79/gpio.c +++ b/arch/mips/ath79/gpio.c | |||
| @@ -154,46 +154,28 @@ static void __iomem *ath79_gpio_get_function_reg(void) | |||
| 154 | return ath79_gpio_base + reg; | 154 | return ath79_gpio_base + reg; |
| 155 | } | 155 | } |
| 156 | 156 | ||
| 157 | void ath79_gpio_function_enable(u32 mask) | 157 | void ath79_gpio_function_setup(u32 set, u32 clear) |
| 158 | { | 158 | { |
| 159 | void __iomem *reg = ath79_gpio_get_function_reg(); | 159 | void __iomem *reg = ath79_gpio_get_function_reg(); |
| 160 | unsigned long flags; | 160 | unsigned long flags; |
| 161 | 161 | ||
| 162 | spin_lock_irqsave(&ath79_gpio_lock, flags); | 162 | spin_lock_irqsave(&ath79_gpio_lock, flags); |
| 163 | 163 | ||
| 164 | __raw_writel(__raw_readl(reg) | mask, reg); | 164 | __raw_writel((__raw_readl(reg) & ~clear) | set, reg); |
| 165 | /* flush write */ | 165 | /* flush write */ |
| 166 | __raw_readl(reg); | 166 | __raw_readl(reg); |
| 167 | 167 | ||
| 168 | spin_unlock_irqrestore(&ath79_gpio_lock, flags); | 168 | spin_unlock_irqrestore(&ath79_gpio_lock, flags); |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | void ath79_gpio_function_disable(u32 mask) | 171 | void ath79_gpio_function_enable(u32 mask) |
| 172 | { | 172 | { |
| 173 | void __iomem *reg = ath79_gpio_get_function_reg(); | 173 | ath79_gpio_function_setup(mask, 0); |
| 174 | unsigned long flags; | ||
| 175 | |||
| 176 | spin_lock_irqsave(&ath79_gpio_lock, flags); | ||
| 177 | |||
| 178 | __raw_writel(__raw_readl(reg) & ~mask, reg); | ||
| 179 | /* flush write */ | ||
| 180 | __raw_readl(reg); | ||
| 181 | |||
| 182 | spin_unlock_irqrestore(&ath79_gpio_lock, flags); | ||
| 183 | } | 174 | } |
| 184 | 175 | ||
| 185 | void ath79_gpio_function_setup(u32 set, u32 clear) | 176 | void ath79_gpio_function_disable(u32 mask) |
| 186 | { | 177 | { |
| 187 | void __iomem *reg = ath79_gpio_get_function_reg(); | 178 | ath79_gpio_function_setup(0, mask); |
| 188 | unsigned long flags; | ||
| 189 | |||
| 190 | spin_lock_irqsave(&ath79_gpio_lock, flags); | ||
| 191 | |||
| 192 | __raw_writel((__raw_readl(reg) & ~clear) | set, reg); | ||
| 193 | /* flush write */ | ||
| 194 | __raw_readl(reg); | ||
| 195 | |||
| 196 | spin_unlock_irqrestore(&ath79_gpio_lock, flags); | ||
| 197 | } | 179 | } |
| 198 | 180 | ||
| 199 | void __init ath79_gpio_init(void) | 181 | void __init ath79_gpio_init(void) |
