Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

93 files changed, 1677 insertions, 1005 deletions

diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 692fdfce2a23..e446bab2427b 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -1,8 +1,3 @@
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.txt.
-
-mainmenu "Linux/Microblaze Kernel Configuration"
-
 config MICROBLAZE
         def_bool y
         select HAVE_MEMBLOCK
@@ -11,7 +6,6 @@ config MICROBLAZE
         select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_DYNAMIC_FTRACE
         select HAVE_FTRACE_MCOUNT_RECORD
-        select USB_ARCH_HAS_EHCI
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select HAVE_OPROFILE
         select HAVE_ARCH_KGDB
@@ -19,7 +13,10 @@ config MICROBLAZE
         select HAVE_DMA_API_DEBUG
         select TRACING_SUPPORT
         select OF
-        select OF_FLATTREE
+        select OF_EARLY_FLATTREE
+        select HAVE_GENERIC_HARDIRQS
+        select GENERIC_IRQ_PROBE
+        select GENERIC_IRQ_SHOW
 
 config SWAP
         def_bool n
@@ -36,18 +33,9 @@ config ARCH_HAS_ILOG2_U32
 config ARCH_HAS_ILOG2_U64
         def_bool n
 
-config GENERIC_FIND_NEXT_BIT
-        def_bool y
-
 config GENERIC_HWEIGHT
         def_bool y
 
-config GENERIC_HARDIRQS
-        def_bool y
-
-config GENERIC_IRQ_PROBE
-        def_bool y
-
 config GENERIC_CALIBRATE_DELAY
         def_bool y
 
@@ -57,9 +45,6 @@ config GENERIC_TIME_VSYSCALL
 config GENERIC_CLOCKEVENTS
         def_bool y
 
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        def_bool y
-
 config GENERIC_GPIO
         def_bool y
 
@@ -121,6 +106,23 @@ config CMDLINE_FORCE
           Set this to have arguments from the default kernel command string
           override those passed by the boot loader.
 
+config SECCOMP
+        bool "Enable seccomp to safely compute untrusted bytecode"
+        depends on PROC_FS
+        default y
+        help
+          This kernel feature is useful for number crunching applications
+          that may need to compute untrusted bytecode during their
+          execution. By using pipes or other transports made available to
+          the process as file descriptors supporting the read/write
+          syscalls, it's possible to isolate those applications in
+          their own address space using seccomp. Once seccomp is
+          enabled via /proc/<pid>/seccomp, it cannot be disabled
+          and the task is only allowed to execute a few safe syscalls
+          defined by each seccomp mode.
+
+          If unsure, say Y. Only embedded should say N here.
+
 endmenu
 
 menu "Advanced setup"
@@ -178,6 +180,17 @@ config LOWMEM_SIZE
         hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
         default "0x30000000"
 
+config MANUAL_RESET_VECTOR
+        hex "Microblaze reset vector address setup"
+        default "0x0"
+        help
+          Set this option to have the kernel override the CPU Reset vector.
+          If zero, no change will be made to the MicroBlaze reset vector at
+          address 0x0.
+          If non-zero, a jump instruction to this address, will be written
+          to the reset vector at address 0x0.
+          If you are unsure, set it to default value 0x0.
+
 config KERNEL_START_BOOL
         bool "Set custom kernel base address"
         depends on ADVANCED_OPTIONS
@@ -242,7 +255,7 @@ endmenu
 
 source "mm/Kconfig"
 
-menu "Exectuable file formats"
+menu "Executable file formats"
 
 source "fs/Kconfig.binfmt"
 
diff --git a/arch/microblaze/Kconfig.debug b/arch/microblaze/Kconfig.debug
index e6e5e0da28c3..012e377330cd 100644
--- a/arch/microblaze/Kconfig.debug
+++ b/arch/microblaze/Kconfig.debug
@@ -10,7 +10,7 @@ source "lib/Kconfig.debug"
 
 config EARLY_PRINTK
         bool "Early printk function for kernel"
-        depends on SERIAL_UARTLITE_CONSOLE
+        depends on SERIAL_UARTLITE_CONSOLE || SERIAL_8250_CONSOLE
         default n
         help
           This option turns on/off early printk messages to console.
@@ -23,8 +23,4 @@ config HEART_BEAT
           This option turns on/off heart beat kernel functionality.
           First GPIO node is taken.
 
-config DEBUG_BOOTMEM
-        depends on DEBUG_KERNEL
-        bool "Debug BOOTMEM initialization"
-
 endmenu
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index 592c7079de88..b23c40eb7a52 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -17,8 +17,8 @@ export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
 # The various CONFIG_XILINX cpu features options are integers 0/1/2...
 # rather than bools y/n
 
-# Work out HW multipler support.  This is icky.
-# 1. Spartan2 has no HW multiplers.
+# Work out HW multipler support. This is tricky.
+# 1. Spartan2 has no HW multipliers.
 # 2. MicroBlaze v3.x always uses them, except in Spartan 2
 # 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
 ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY)))
@@ -42,11 +42,8 @@ KBUILD_CFLAGS += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
 LDFLAGS         :=
 LDFLAGS_vmlinux :=
 
-LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-
 head-y := arch/microblaze/kernel/head.o
 libs-y += arch/microblaze/lib/
-libs-y += $(LIBGCC)
 core-y += arch/microblaze/kernel/
 core-y += arch/microblaze/mm/
 core-y += arch/microblaze/platform/
@@ -72,12 +69,16 @@ export MMU DTB
 
 all: linux.bin
 
-BOOT_TARGETS = linux.bin linux.bin.gz simpleImage.%
+# With make 3.82 we cannot mix normal and wildcard targets
+BOOT_TARGETS1 = linux.bin linux.bin.gz
+BOOT_TARGETS2 = simpleImage.%
 
 archclean:
         $(Q)$(MAKE) $(clean)=$(boot)
 
-$(BOOT_TARGETS): vmlinux
+$(BOOT_TARGETS1): vmlinux
+        $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
+$(BOOT_TARGETS2): vmlinux
         $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
 define archhelp
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
index be01d78750d9..4c4e58ef0cb6 100644
--- a/arch/microblaze/boot/Makefile
+++ b/arch/microblaze/boot/Makefile
@@ -10,9 +10,6 @@ targets := linux.bin linux.bin.gz simpleImage.%
 
 OBJCOPYFLAGS := -O binary
 
-# Where the DTS files live
-dtstree         := $(srctree)/$(src)/dts
-
 # Ensure system.dtb exists
 $(obj)/linked_dtb.o: $(obj)/system.dtb
 
@@ -51,14 +48,11 @@ $(obj)/simpleImage.%: vmlinux FORCE
         $(call if_changed,strip)
         @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
 
-# Rule to build device tree blobs
-DTC = $(objtree)/scripts/dtc/dtc
 
 # Rule to build device tree blobs
-quiet_cmd_dtc = DTC     $@
-        cmd_dtc = $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 -p 1024 $(dtstree)/$*.dts
+DTC_FLAGS := -p 1024
 
-$(obj)/%.dtb: $(dtstree)/%.dts FORCE
-        $(call if_changed,dtc)
+$(obj)/%.dtb: $(src)/dts/%.dts FORCE
+        $(call cmd,dtc)
 
 clean-files += *.dtb simpleImage.*.unstrip linux.bin.ub
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig
index 8b422b12ef78..b3f5eecff2a7 100644
--- a/arch/microblaze/configs/mmu_defconfig
+++ b/arch/microblaze/configs/mmu_defconfig
@@ -7,7 +7,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
 CONFIG_INITRAMFS_COMPRESSION_GZIP=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_HOTPLUG is not set
@@ -66,5 +66,4 @@ CONFIG_DEBUG_SPINLOCK=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_EARLY_PRINTK=y
-CONFIG_DEBUG_BOOTMEM=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/microblaze/configs/nommu_defconfig b/arch/microblaze/configs/nommu_defconfig
index ebc143c5368e..0249e4b7e1d3 100644
--- a/arch/microblaze/configs/nommu_defconfig
+++ b/arch/microblaze/configs/nommu_defconfig
@@ -6,7 +6,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_HOTPLUG is not set
diff --git a/arch/microblaze/include/asm/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index ce9c58732ffc..31902762a426 100644
--- a/arch/microblaze/include/asm/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
@@ -1,6 +1,10 @@
 #ifndef _ASM_MICROBLAZE_BYTEORDER_H
 #define _ASM_MICROBLAZE_BYTEORDER_H
 
+#ifdef __MICROBLAZEEL__
+#include <linux/byteorder/little_endian.h>
+#else
 #include <linux/byteorder/big_endian.h>
+#endif
 
 #endif /* _ASM_MICROBLAZE_BYTEORDER_H */
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h
index 7ebd955460d9..0f553bc009a0 100644
--- a/arch/microblaze/include/asm/cacheflush.h
+++ b/arch/microblaze/include/asm/cacheflush.h
@@ -84,12 +84,13 @@ do { \
 #define flush_dcache_mmap_lock(mapping)         do { } while (0)
 #define flush_dcache_mmap_unlock(mapping)       do { } while (0)
 
-
 #define flush_cache_dup_mm(mm)                          do { } while (0)
 #define flush_cache_vmap(start, end)                    do { } while (0)
 #define flush_cache_vunmap(start, end)                  do { } while (0)
 #define flush_cache_mm(mm)                      do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
+
+#define flush_cache_page(vma, vmaddr, pfn) \
+        flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
 
 /* MS: kgdb code use this macro, wrong len with FLASH */
 #if 0
@@ -104,9 +105,13 @@ do { \
 #define copy_to_user_page(vma, page, vaddr, dst, src, len)              \
 do {                                                                    \
         u32 addr = virt_to_phys(dst);                                   \
-        invalidate_icache_range((unsigned) (addr), (unsigned) (addr) + (len));\
         memcpy((dst), (src), (len));                                    \
-        flush_dcache_range((unsigned) (addr), (unsigned) (addr) + (len));\
+        if (vma->vm_flags & VM_EXEC) {                                  \
+                invalidate_icache_range((unsigned) (addr),              \
+                                        (unsigned) (addr) + PAGE_SIZE); \
+                flush_dcache_range((unsigned) (addr),                   \
+                                        (unsigned) (addr) + PAGE_SIZE); \
+        }                                                               \
 } while (0)
 
 #define copy_from_user_page(vma, page, vaddr, dst, src, len)            \
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
index 128bf03b54b7..0185cbefdda4 100644
--- a/arch/microblaze/include/asm/checksum.h
+++ b/arch/microblaze/include/asm/checksum.h
@@ -24,8 +24,13 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
                 "addc %0, %0, %3\n\t"
                 "addc %0, %0, r0\n\t"
                 : "+&d" (sum)
-                : "d" (saddr), "d" (daddr), "d" (len + proto));
-
+                : "d" (saddr), "d" (daddr),
+#ifdef __MICROBLAZEEL__
+        "d" ((len + proto) << 8)
+#else
+        "d" (len + proto)
+#endif
+);
         return sum;
 }
 
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index b4f5ca33aebf..d8f013347a9e 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -38,6 +38,7 @@ struct cpuinfo {
         u32 use_exc;
         u32 ver_code;
         u32 mmu;
+        u32 endian;
 
         /* CPU caches */
         u32 use_icache;
@@ -76,7 +77,6 @@ struct cpuinfo {
         u32 num_rd_brk;
         u32 num_wr_brk;
         u32 cpu_clock_freq; /* store real freq of cpu */
-        u32 freq_div_hz; /* store freq/HZ */
 
         /* FPGA family */
         u32 fpga_family_code;
@@ -96,8 +96,9 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
 
 static inline unsigned int fcpu(struct device_node *cpu, char *n)
 {
-        int *val;
-        return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0;
+        const __be32 *val;
+        return (val = of_get_property(cpu, n, NULL)) ?
+                                                        be32_to_cpup(val) : 0;
 }
 
 #endif /* _ASM_MICROBLAZE_CPUINFO_H */
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
index 732caf1be741..098dfdde4b06 100644
--- a/arch/microblaze/include/asm/elf.h
+++ b/arch/microblaze/include/asm/elf.h
@@ -71,7 +71,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 
 #define ELF_ET_DYN_BASE         (0x08000000)
 
-#ifdef __LITTLE_ENDIAN__
+#ifdef __MICROBLAZEEL__
 #define ELF_DATA        ELFDATA2LSB
 #else
 #define ELF_DATA        ELFDATA2MSB
diff --git a/arch/microblaze/include/asm/entry.h b/arch/microblaze/include/asm/entry.h
index ec89f2ad0fe1..af0144b91b79 100644
--- a/arch/microblaze/include/asm/entry.h
+++ b/arch/microblaze/include/asm/entry.h
@@ -31,40 +31,4 @@ DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
 DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
 # endif /* __ASSEMBLY__ */
 
-#ifndef CONFIG_MMU
-
-/* noMMU hasn't any space for args */
-# define STATE_SAVE_ARG_SPACE   (0)
-
-#else /* CONFIG_MMU */
-
-/* If true, system calls save and restore all registers (except result
- * registers, of course).  If false, then `call clobbered' registers
- * will not be preserved, on the theory that system calls are basically
- * function calls anyway, and the caller should be able to deal with it.
- * This is a security risk, of course, as `internal' values may leak out
- * after a system call, but that certainly doesn't matter very much for
- * a processor with no MMU protection!  For a protected-mode kernel, it
- * would be faster to just zero those registers before returning.
- *
- * I can not rely on the glibc implementation. If you turn it off make
- * sure that r11/r12 is saved in user-space. --KAA
- *
- * These are special variables using by the kernel trap/interrupt code
- * to save registers in, at a time when there are no spare registers we
- * can use to do so, and we can't depend on the value of the stack
- * pointer.  This means that they must be within a signed 16-bit
- * displacement of 0x00000000.
- */
-
-/* A `state save frame' is a struct pt_regs preceded by some extra space
- * suitable for a function call stack frame. */
-
-/* Amount of room on the stack reserved for arguments and to satisfy the
- * C calling conventions, in addition to the space used by the struct
- * pt_regs that actually holds saved values. */
-#define STATE_SAVE_ARG_SPACE    (6*4) /* Up to six arguments */
-
-#endif /* CONFIG_MMU */
-
 #endif /* _ASM_MICROBLAZE_ENTRY_H */
diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h
index 6479097b802b..e6a8ddea1dca 100644
--- a/arch/microblaze/include/asm/exceptions.h
+++ b/arch/microblaze/include/asm/exceptions.h
@@ -66,6 +66,9 @@
 asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                                                         int fsr, int addr);
 
+asmlinkage void sw_exception(struct pt_regs *regs);
+void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);
+
 void die(const char *str, struct pt_regs *fp, long err);
 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
 
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
index ad3fd61b2fe7..b0526d2716fa 100644
--- a/arch/microblaze/include/asm/futex.h
+++ b/arch/microblaze/include/asm/futex.h
@@ -29,7 +29,7 @@
 })
 
 static inline int
-futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
+futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
 {
         int op = (encoded_op >> 28) & 7;
         int cmp = (encoded_op >> 24) & 15;
@@ -39,7 +39,7 @@ futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
         if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
                 oparg = 1 << oparg;
 
-        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
                 return -EFAULT;
 
         pagefault_disable();
@@ -94,31 +94,34 @@ futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
 }
 
 static inline int
-futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
+                              u32 oldval, u32 newval)
 {
-        int prev, cmp;
+        int ret = 0, cmp;
+        u32 prev;
 
-        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
                 return -EFAULT;
 
-        __asm__ __volatile__ ("1:       lwx     %0, %2, r0;             \
-                                        cmp     %1, %0, %3;             \
-                                        beqi    %1, 3f;                 \
-                                2:      swx     %4, %2, r0;             \
-                                        addic   %1, r0, 0;              \
-                                        bnei    %1, 1b;                 \
+        __asm__ __volatile__ ("1:       lwx     %1, %3, r0;             \
+                                        cmp     %2, %1, %4;             \
+                                        beqi    %2, 3f;                 \
+                                2:      swx     %5, %3, r0;             \
+                                        addic   %2, r0, 0;              \
+                                        bnei    %2, 1b;                 \
                                 3:                                      \
                                 .section .fixup,\"ax\";                 \
                                 4:      brid    3b;                     \
-                                        addik   %0, r0, %5;             \
+                                        addik   %0, r0, %6;             \
                                 .previous;                              \
                                 .section __ex_table,\"a\";              \
                                 .word   1b,4b,2b,4b;                    \
                                 .previous;"                             \
-                : "=&r" (prev), "=&r"(cmp)                              \
+                : "+r" (ret), "=&r" (prev), "=&r"(cmp)  \
                 : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT));
 
-        return prev;
+        *uval = prev;
+        return ret;
 }
 
 #endif /* __KERNEL__ */
diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
index 2345ac354d9b..2b2c18be71c6 100644
--- a/arch/microblaze/include/asm/gpio.h
+++ b/arch/microblaze/include/asm/gpio.h
@@ -38,12 +38,9 @@ static inline int gpio_cansleep(unsigned int gpio)
         return __gpio_cansleep(gpio);
 }
 
-/*
- * Not implemented, yet.
- */
 static inline int gpio_to_irq(unsigned int gpio)
 {
-        return -ENOSYS;
+        return __gpio_to_irq(gpio);
 }
 
 static inline int irq_to_gpio(unsigned int irq)
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 00b5398d08c7..8cdac14b55b0 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -70,7 +70,7 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
 
 /*
  * read (readb, readw, readl, readq) and write (writeb, writew,
- * writel, writeq) accessors are for PCI and thus littel endian.
+ * writel, writeq) accessors are for PCI and thus little endian.
  * Linux 2.4 for Microblaze had this wrong.
  */
 static inline unsigned char readb(const volatile void __iomem *addr)
@@ -243,6 +243,8 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
 #define out_8(a, v) __raw_writeb((v), (a))
 #define in_8(a) __raw_readb(a)
 
+#define mmiowb()
+
 #define ioport_map(port, nr)    ((void __iomem *)(port))
 #define ioport_unmap(addr)
 
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h
index ec5583d6111c..cc54187f3d38 100644
--- a/arch/microblaze/include/asm/irq.h
+++ b/arch/microblaze/include/asm/irq.h
@@ -12,8 +12,6 @@
 #define NR_IRQS 32
 #include <asm-generic/irq.h>
 
-#include <linux/interrupt.h>
-
 /* This type is the placeholder for a hardware interrupt number. It has to
  * be big enough to enclose whatever representation is used by a given
  * platform.
diff --git a/arch/microblaze/include/asm/irqflags.h b/arch/microblaze/include/asm/irqflags.h
index 2c38c6d80176..c4532f032b3b 100644
--- a/arch/microblaze/include/asm/irqflags.h
+++ b/arch/microblaze/include/asm/irqflags.h
@@ -9,103 +9,114 @@
 #ifndef _ASM_MICROBLAZE_IRQFLAGS_H
 #define _ASM_MICROBLAZE_IRQFLAGS_H
 
-#include <linux/irqflags.h>
+#include <linux/types.h>
 #include <asm/registers.h>
 
-# if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
-
-# define raw_local_irq_save(flags)                      \
-        do {                                            \
-                asm volatile (" msrclr %0, %1;          \
-                                nop;"                   \
-                                : "=r"(flags)           \
-                                : "i"(MSR_IE)           \
-                                : "memory");            \
-        } while (0)
-
-# define raw_local_irq_disable()                        \
-        do {                                            \
-                asm volatile (" msrclr r0, %0;          \
-                                nop;"                   \
-                                :                       \
-                                : "i"(MSR_IE)           \
-                                : "memory");            \
-        } while (0)
-
-# define raw_local_irq_enable()                         \
-        do {                                            \
-                asm volatile (" msrset  r0, %0;         \
-                                nop;"                   \
-                                :                       \
-                                : "i"(MSR_IE)           \
-                                : "memory");            \
-        } while (0)
-
-# else /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 0 */
-
-# define raw_local_irq_save(flags)                              \
-        do {                                                    \
-                register unsigned tmp;                          \
-                asm volatile (" mfs     %0, rmsr;               \
-                                nop;                            \
-                                andi    %1, %0, %2;             \
-                                mts     rmsr, %1;               \
-                                nop;"                           \
-                                : "=r"(flags), "=r" (tmp)       \
-                                : "i"(~MSR_IE)                  \
-                                : "memory");                    \
-        } while (0)
-
-# define raw_local_irq_disable()                                \
-        do {                                                    \
-                register unsigned tmp;                          \
-                asm volatile (" mfs     %0, rmsr;               \
-                                nop;                            \
-                                andi    %0, %0, %1;             \
-                                mts     rmsr, %0;               \
-                                nop;"                   \
-                                : "=r"(tmp)                     \
-                                : "i"(~MSR_IE)                  \
-                                : "memory");                    \
-        } while (0)
-
-# define raw_local_irq_enable()                                 \
-        do {                                                    \
-                register unsigned tmp;                          \
-                asm volatile (" mfs     %0, rmsr;               \
-                                nop;                            \
-                                ori     %0, %0, %1;             \
-                                mts     rmsr, %0;               \
-                                nop;"                           \
-                                : "=r"(tmp)                     \
-                                : "i"(MSR_IE)                   \
-                                : "memory");                    \
-        } while (0)
-
-# endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
-
-#define raw_local_irq_restore(flags)                            \
-        do {                                                    \
-                asm volatile (" mts     rmsr, %0;               \
-                                nop;"                           \
-                                :                               \
-                                : "r"(flags)                    \
-                                : "memory");                    \
-        } while (0)
-
-static inline unsigned long get_msr(void)
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+
+static inline unsigned long arch_local_irq_save(void)
+{
+        unsigned long flags;
+        asm volatile("  msrclr %0, %1   \n"
+                     "  nop             \n"
+                     : "=r"(flags)
+                     : "i"(MSR_IE)
+                     : "memory");
+        return flags;
+}
+
+static inline void arch_local_irq_disable(void)
+{
+        /* this uses r0 without declaring it - is that correct? */
+        asm volatile("  msrclr r0, %0   \n"
+                     "  nop             \n"
+                     :
+                     : "i"(MSR_IE)
+                     : "memory");
+}
+
+static inline void arch_local_irq_enable(void)
+{
+        /* this uses r0 without declaring it - is that correct? */
+        asm volatile("  msrset  r0, %0  \n"
+                     "  nop             \n"
+                     :
+                     : "i"(MSR_IE)
+                     : "memory");
+}
+
+#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
+
+static inline unsigned long arch_local_irq_save(void)
+{
+        unsigned long flags, tmp;
+        asm volatile (" mfs     %0, rmsr        \n"
+                      " nop                     \n"
+                      " andi    %1, %0, %2      \n"
+                      " mts     rmsr, %1        \n"
+                      " nop                     \n"
+                      : "=r"(flags), "=r"(tmp)
+                      : "i"(~MSR_IE)
+                      : "memory");
+        return flags;
+}
+
+static inline void arch_local_irq_disable(void)
+{
+        unsigned long tmp;
+        asm volatile("  mfs     %0, rmsr        \n"
+                     "  nop                     \n"
+                     "  andi    %0, %0, %1      \n"
+                     "  mts     rmsr, %0        \n"
+                     "  nop                     \n"
+                     : "=r"(tmp)
+                     : "i"(~MSR_IE)
+                     : "memory");
+}
+
+static inline void arch_local_irq_enable(void)
+{
+        unsigned long tmp;
+        asm volatile("  mfs     %0, rmsr        \n"
+                     "  nop                     \n"
+                     "  ori     %0, %0, %1      \n"
+                     "  mts     rmsr, %0        \n"
+                     "  nop                     \n"
+                     : "=r"(tmp)
+                     : "i"(MSR_IE)
+                     : "memory");
+}
+
+#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
+
+static inline unsigned long arch_local_save_flags(void)
 {
         unsigned long flags;
-        asm volatile (" mfs     %0, rmsr;       \
-                        nop;"                   \
-                        : "=r"(flags)           \
-                        :                       \
-                        : "memory");            \
+        asm volatile("  mfs     %0, rmsr        \n"
+                     "  nop                     \n"
+                     : "=r"(flags)
+                     :
+                     : "memory");
         return flags;
 }
 
-#define raw_local_save_flags(flags)     ((flags) = get_msr())
-#define raw_irqs_disabled()             ((get_msr() & MSR_IE) == 0)
-#define raw_irqs_disabled_flags(flags)  ((flags & MSR_IE) == 0)
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+        asm volatile("  mts     rmsr, %0        \n"
+                     "  nop                     \n"
+                     :
+                     : "r"(flags)
+                     : "memory");
+}
+
+static inline bool arch_irqs_disabled_flags(unsigned long flags)
+{
+        return (flags & MSR_IE) == 0;
+}
+
+static inline bool arch_irqs_disabled(void)
+{
+        return arch_irqs_disabled_flags(arch_local_save_flags());
+}
 
 #endif /* _ASM_MICROBLAZE_IRQFLAGS_H */
diff --git a/arch/microblaze/include/asm/memblock.h b/arch/microblaze/include/asm/memblock.h
index f9c2fa331d2a..20a8e257c77f 100644
--- a/arch/microblaze/include/asm/memblock.h
+++ b/arch/microblaze/include/asm/memblock.h
@@ -9,9 +9,6 @@
 #ifndef _ASM_MICROBLAZE_MEMBLOCK_H
 #define _ASM_MICROBLAZE_MEMBLOCK_H
 
-/* MEMBLOCK limit is OFF */
-#define MEMBLOCK_REAL_LIMIT     0xFFFFFFFF
-
 #endif /* _ASM_MICROBLAZE_MEMBLOCK_H */
 
 
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index cf377d91da71..ed9d0f6e2cdb 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -205,9 +205,6 @@ extern int page_is_ram(unsigned long pfn);
 #define TOPHYS(addr)  __virt_to_phys(addr)
 
 #ifdef CONFIG_MMU
-#ifdef CONFIG_CONTIGUOUS_PAGE_ALLOC
-#define WANT_PAGE_VIRTUAL 1 /* page alloc 2 relies on this */
-#endif
 
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 0c68764ab547..746df91e5796 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -76,7 +76,7 @@ struct pci_controller {
          * Used for variants of PCI indirect handling and possible quirks:
          *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
          *  EXT_REG - provides access to PCI-e extended registers
-         *  SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
+         *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
          *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
          *   to determine which bus number to match on when generating type0
          *   config cycles
@@ -104,11 +104,22 @@ struct pci_controller {
         int global_number;      /* PCI domain number */
 };
 
+#ifdef CONFIG_PCI
 static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
 {
         return bus->sysdata;
 }
 
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+        struct pci_controller *host;
+
+        if (bus->self)
+                return pci_device_to_OF_node(bus->self);
+        host = pci_bus_to_host(bus);
+        return host ? host->dn : NULL;
+}
+
 static inline int isa_vaddr_is_ioport(void __iomem *address)
 {
         /* No specific ISA handling on ppc32 at this stage, it
@@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
          */
         return 0;
 }
+#endif /* CONFIG_PCI */
 
 /* These are used for config access before all the PCI probing
    has been done. */
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 5a388eeeb28f..ba65cf472544 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -158,12 +158,14 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
 extern void pcibios_setup_bus_self(struct pci_bus *bus);
 
-/* This part of code was originaly in xilinx-pci.h */
+/* This part of code was originally in xilinx-pci.h */
 #ifdef CONFIG_PCI_XILINX
 extern void __init xilinx_pci_init(void);
 #else
 static inline void __init xilinx_pci_init(void) { return; }
 #endif
 
+#include <asm-generic/pci-dma-compat.h>
+
 #endif  /* __KERNEL__ */
 #endif /* __ASM_MICROBLAZE_PCI_H */
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h
index c614a893f8a3..ebd35792482c 100644
--- a/arch/microblaze/include/asm/pgalloc.h
+++ b/arch/microblaze/include/asm/pgalloc.h
@@ -165,7 +165,8 @@ extern inline void pte_free(struct mm_struct *mm, struct page *ptepage)
 
 #define __pte_free_tlb(tlb, pte, addr)  pte_free((tlb)->mm, (pte))
 
-#define pmd_populate(mm, pmd, pte)      (pmd_val(*(pmd)) = page_address(pte))
+#define pmd_populate(mm, pmd, pte) \
+                        (pmd_val(*(pmd)) = (unsigned long)page_address(pte))
 
 #define pmd_populate_kernel(mm, pmd, pte) \
                 (pmd_val(*(pmd)) = (unsigned long) (pte))
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index ca2d92871545..b2af42311a12 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -57,6 +57,13 @@ static inline int pte_file(pte_t pte) { return 0; }
 
 #define pgprot_noncached_wc(prot)       prot
 
+/*
+ * All 32bit addresses are effectively valid for vmalloc...
+ * Sort of meaningless for non-VM targets.
+ */
+#define VMALLOC_START   0
+#define VMALLOC_END     0xffffffff
+
 #else /* CONFIG_MMU */
 
 #include <asm-generic/4level-fixup.h>
@@ -404,20 +411,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 static inline unsigned long pte_update(pte_t *p, unsigned long clr,
                                 unsigned long set)
 {
-        unsigned long old, tmp, msr;
-
-        __asm__ __volatile__("\
-        msrclr  %2, 0x2\n\
-        nop\n\
-        lw      %0, %4, r0\n\
-        andn    %1, %0, %5\n\
-        or      %1, %1, %6\n\
-        sw      %1, %4, r0\n\
-        mts     rmsr, %2\n\
-        nop"
-        : "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p)
-        : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set), "m" (*p)
-        : "cc");
+        unsigned long flags, old, tmp;
+
+        raw_local_irq_save(flags);
+
+        __asm__ __volatile__(   "lw     %0, %2, r0      \n"
+                                "andn   %1, %0, %3      \n"
+                                "or     %1, %1, %4      \n"
+                                "sw     %1, %2, r0      \n"
+                        : "=&r" (old), "=&r" (tmp)
+                        : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set)
+                        : "cc");
+
+        raw_local_irq_restore(flags);
 
         return old;
 }
@@ -437,8 +443,9 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
         *ptep = pte;
 }
 
-static inline int ptep_test_and_clear_young(struct mm_struct *mm,
-                unsigned long addr, pte_t *ptep)
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
+static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
+                unsigned long address, pte_t *ptep)
 {
         return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0;
 }
@@ -450,6 +457,7 @@ static inline int ptep_test_and_clear_dirty(struct mm_struct *mm,
                 (_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0;
 }
 
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
                 unsigned long addr, pte_t *ptep)
 {
@@ -497,12 +505,9 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
 #define pte_offset_kernel(dir, addr)    \
         ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(addr))
 #define pte_offset_map(dir, addr)               \
-        ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE0) + pte_index(addr))
-#define pte_offset_map_nested(dir, addr)        \
-        ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE1) + pte_index(addr))
+        ((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr))
 
-#define pte_unmap(pte)          kunmap_atomic(pte, KM_PTE0)
-#define pte_unmap_nested(pte)   kunmap_atomic(pte, KM_PTE1)
+#define pte_unmap(pte)          kunmap_atomic(pte)
 
 /* Encode and decode a nonlinear file mapping entry */
 #define PTE_FILE_MAX_BITS       29
@@ -567,7 +572,7 @@ void __init *early_get_page(void);
 
 extern unsigned long ioremap_bot, ioremap_base;
 
-void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle);
+void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
 void consistent_free(size_t size, void *vaddr);
 void consistent_sync(void *vaddr, size_t size, int direction);
 void consistent_sync_page(struct page *page, unsigned long offset,
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 8eeb09211ece..aed2a6be8e27 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -155,7 +155,7 @@ unsigned long get_wchan(struct task_struct *p);
 #  define task_regs(task) ((struct pt_regs *)task_tos(task) - 1)
 
 #  define task_pt_regs_plus_args(tsk) \
-        (((void *)task_pt_regs(tsk)) - STATE_SAVE_ARG_SPACE)
+        ((void *)task_pt_regs(tsk))
 
 #  define task_sp(task) (task_regs(task)->r1)
 #  define task_pc(task) (task_regs(task)->pc)
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 101fa098f62a..d0890d36ef61 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -27,6 +27,7 @@
 
 /* Other Prototypes */
 extern int early_uartlite_console(void);
+extern int early_uart16550_console(void);
 
 #ifdef CONFIG_PCI
 /*
@@ -63,24 +64,6 @@ extern void kdump_move_device_tree(void);
 /* CPU OF node matching */
 struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
 
-/* Get the MAC address */
-extern const void *of_get_mac_address(struct device_node *np);
-
-/**
- * of_irq_map_pci - Resolve the interrupt for a PCI device
- * @pdev:       the device whose interrupt is to be resolved
- * @out_irq:    structure of_irq filled by this function
- *
- * This function resolves the PCI interrupt for a given PCI device. If a
- * device-node exists for a given pci_dev, it will use normal OF tree
- * walking. If not, it will implement standard swizzling and walk up the
- * PCI tree until an device-node is found, at which point it will finish
- * resolving using the OF tree walking.
- */
-struct pci_dev;
-struct of_irq;
-extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
-
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 
diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h
index d74dbfb92c04..d9b66304d5dd 100644
--- a/arch/microblaze/include/asm/ptrace.h
+++ b/arch/microblaze/include/asm/ptrace.h
@@ -66,13 +66,13 @@ void show_regs(struct pt_regs *);
 #else /* __KERNEL__ */
 
 /* pt_regs offsets used by gdbserver etc in ptrace syscalls */
-#define PT_GPR(n)       ((n) * sizeof(microblaze_reg_t))
-#define PT_PC           (32 * sizeof(microblaze_reg_t))
-#define PT_MSR          (33 * sizeof(microblaze_reg_t))
-#define PT_EAR          (34 * sizeof(microblaze_reg_t))
-#define PT_ESR          (35 * sizeof(microblaze_reg_t))
-#define PT_FSR          (36 * sizeof(microblaze_reg_t))
-#define PT_KERNEL_MODE  (37 * sizeof(microblaze_reg_t))
+#define PT_GPR(n)       ((n) * sizeof(microblaze_reg_t))
+#define PT_PC           (32 * sizeof(microblaze_reg_t))
+#define PT_MSR          (33 * sizeof(microblaze_reg_t))
+#define PT_EAR          (34 * sizeof(microblaze_reg_t))
+#define PT_ESR          (35 * sizeof(microblaze_reg_t))
+#define PT_FSR          (36 * sizeof(microblaze_reg_t))
+#define PT_KERNEL_MODE  (37 * sizeof(microblaze_reg_t))
 
 #endif /* __KERNEL */
 
diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
index 9578666e98ba..a10bec62e857 100644
--- a/arch/microblaze/include/asm/pvr.h
+++ b/arch/microblaze/include/asm/pvr.h
@@ -1,9 +1,9 @@
 /*
  * Support for the MicroBlaze PVR (Processor Version Register)
  *
- * Copyright (C) 2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2009 - 2011 Michal Simek <monstr@monstr.eu>
  * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
- * Copyright (C) 2007 - 2009 PetaLogix
+ * Copyright (C) 2007 - 2011 PetaLogix
  *
  * This file is subject to the terms and conditions of the GNU General
  * Public License. See the file COPYING in the main directory of this
@@ -30,7 +30,9 @@ struct pvr_s {
 #define PVR0_USE_EXC_MASK               0x04000000
 #define PVR0_USE_ICACHE_MASK            0x02000000
 #define PVR0_USE_DCACHE_MASK            0x01000000
-#define PVR0_USE_MMU                    0x00800000      /* new */
+#define PVR0_USE_MMU                    0x00800000
+#define PVR0_USE_BTC                    0x00400000
+#define PVR0_ENDI                       0x00200000
 #define PVR0_VERSION_MASK               0x0000FF00
 #define PVR0_USER1_MASK                 0x000000FF
 
@@ -38,17 +40,17 @@ struct pvr_s {
 #define PVR1_USER2_MASK                 0xFFFFFFFF
 
 /* Configuration PVR masks */
-#define PVR2_D_OPB_MASK                 0x80000000
+#define PVR2_D_OPB_MASK                 0x80000000 /* or AXI */
 #define PVR2_D_LMB_MASK                 0x40000000
-#define PVR2_I_OPB_MASK                 0x20000000
+#define PVR2_I_OPB_MASK                 0x20000000 /* or AXI */
 #define PVR2_I_LMB_MASK                 0x10000000
 #define PVR2_INTERRUPT_IS_EDGE_MASK     0x08000000
 #define PVR2_EDGE_IS_POSITIVE_MASK      0x04000000
-#define PVR2_D_PLB_MASK                 0x02000000      /* new */
-#define PVR2_I_PLB_MASK                 0x01000000      /* new */
-#define PVR2_INTERCONNECT               0x00800000      /* new */
-#define PVR2_USE_EXTEND_FSL             0x00080000      /* new */
-#define PVR2_USE_FSL_EXC                0x00040000      /* new */
+#define PVR2_D_PLB_MASK                 0x02000000 /* new */
+#define PVR2_I_PLB_MASK                 0x01000000 /* new */
+#define PVR2_INTERCONNECT               0x00800000 /* new */
+#define PVR2_USE_EXTEND_FSL             0x00080000 /* new */
+#define PVR2_USE_FSL_EXC                0x00040000 /* new */
 #define PVR2_USE_MSR_INSTR              0x00020000
 #define PVR2_USE_PCMP_INSTR             0x00010000
 #define PVR2_AREA_OPTIMISED             0x00008000
@@ -57,14 +59,14 @@ struct pvr_s {
 #define PVR2_USE_HW_MUL_MASK            0x00001000
 #define PVR2_USE_FPU_MASK               0x00000800
 #define PVR2_USE_MUL64_MASK             0x00000400
-#define PVR2_USE_FPU2_MASK              0x00000200      /* new */
+#define PVR2_USE_FPU2_MASK              0x00000200 /* new */
 #define PVR2_USE_IPLBEXC                0x00000100
 #define PVR2_USE_DPLBEXC                0x00000080
 #define PVR2_OPCODE_0x0_ILL_MASK        0x00000040
 #define PVR2_UNALIGNED_EXC_MASK         0x00000020
 #define PVR2_ILL_OPCODE_EXC_MASK        0x00000010
-#define PVR2_IOPB_BUS_EXC_MASK          0x00000008
-#define PVR2_DOPB_BUS_EXC_MASK          0x00000004
+#define PVR2_IOPB_BUS_EXC_MASK          0x00000008 /* or AXI */
+#define PVR2_DOPB_BUS_EXC_MASK          0x00000004 /* or AXI */
 #define PVR2_DIV_ZERO_EXC_MASK          0x00000002
 #define PVR2_FPU_EXC_MASK               0x00000001
 
@@ -120,94 +122,103 @@ struct pvr_s {
 
 
 /* PVR access macros */
-#define PVR_IS_FULL(pvr)                (pvr.pvr[0] & PVR0_PVR_FULL_MASK)
-#define PVR_USE_BARREL(pvr)             (pvr.pvr[0] & PVR0_USE_BARREL_MASK)
-#define PVR_USE_DIV(pvr)                (pvr.pvr[0] & PVR0_USE_DIV_MASK)
-#define PVR_USE_HW_MUL(pvr)             (pvr.pvr[0] & PVR0_USE_HW_MUL_MASK)
-#define PVR_USE_FPU(pvr)                (pvr.pvr[0] & PVR0_USE_FPU_MASK)
-#define PVR_USE_FPU2(pvr)               (pvr.pvr[2] & PVR2_USE_FPU2_MASK)
-#define PVR_USE_ICACHE(pvr)             (pvr.pvr[0] & PVR0_USE_ICACHE_MASK)
-#define PVR_USE_DCACHE(pvr)             (pvr.pvr[0] & PVR0_USE_DCACHE_MASK)
-#define PVR_VERSION(pvr)        ((pvr.pvr[0] & PVR0_VERSION_MASK) >> 8)
-#define PVR_USER1(pvr)                  (pvr.pvr[0] & PVR0_USER1_MASK)
-#define PVR_USER2(pvr)                  (pvr.pvr[1] & PVR1_USER2_MASK)
-
-#define PVR_D_OPB(pvr)                  (pvr.pvr[2] & PVR2_D_OPB_MASK)
-#define PVR_D_LMB(pvr)                  (pvr.pvr[2] & PVR2_D_LMB_MASK)
-#define PVR_I_OPB(pvr)                  (pvr.pvr[2] & PVR2_I_OPB_MASK)
-#define PVR_I_LMB(pvr)                  (pvr.pvr[2] & PVR2_I_LMB_MASK)
-#define PVR_INTERRUPT_IS_EDGE(pvr) \
-                        (pvr.pvr[2] & PVR2_INTERRUPT_IS_EDGE_MASK)
-#define PVR_EDGE_IS_POSITIVE(pvr) \
-                        (pvr.pvr[2] & PVR2_EDGE_IS_POSITIVE_MASK)
-#define PVR_USE_MSR_INSTR(pvr)          (pvr.pvr[2] & PVR2_USE_MSR_INSTR)
-#define PVR_USE_PCMP_INSTR(pvr)         (pvr.pvr[2] & PVR2_USE_PCMP_INSTR)
-#define PVR_AREA_OPTIMISED(pvr)         (pvr.pvr[2] & PVR2_AREA_OPTIMISED)
-#define PVR_USE_MUL64(pvr)              (pvr.pvr[2] & PVR2_USE_MUL64_MASK)
-#define PVR_OPCODE_0x0_ILLEGAL(pvr) \
-                        (pvr.pvr[2] & PVR2_OPCODE_0x0_ILL_MASK)
-#define PVR_UNALIGNED_EXCEPTION(pvr) \
-                        (pvr.pvr[2] & PVR2_UNALIGNED_EXC_MASK)
-#define PVR_ILL_OPCODE_EXCEPTION(pvr) \
-                        (pvr.pvr[2] & PVR2_ILL_OPCODE_EXC_MASK)
-#define PVR_IOPB_BUS_EXCEPTION(pvr) \
-                        (pvr.pvr[2] & PVR2_IOPB_BUS_EXC_MASK)
-#define PVR_DOPB_BUS_EXCEPTION(pvr) \
-                        (pvr.pvr[2] & PVR2_DOPB_BUS_EXC_MASK)
-#define PVR_DIV_ZERO_EXCEPTION(pvr) \
-                        (pvr.pvr[2] & PVR2_DIV_ZERO_EXC_MASK)
-#define PVR_FPU_EXCEPTION(pvr)          (pvr.pvr[2] & PVR2_FPU_EXC_MASK)
-#define PVR_FSL_EXCEPTION(pvr)          (pvr.pvr[2] & PVR2_USE_EXTEND_FSL)
-
-#define PVR_DEBUG_ENABLED(pvr)          (pvr.pvr[3] & PVR3_DEBUG_ENABLED_MASK)
-#define PVR_NUMBER_OF_PC_BRK(pvr) \
-                        ((pvr.pvr[3] & PVR3_NUMBER_OF_PC_BRK_MASK) >> 25)
-#define PVR_NUMBER_OF_RD_ADDR_BRK(pvr) \
-                        ((pvr.pvr[3] & PVR3_NUMBER_OF_RD_ADDR_BRK_MASK) >> 19)
-#define PVR_NUMBER_OF_WR_ADDR_BRK(pvr) \
-                        ((pvr.pvr[3] & PVR3_NUMBER_OF_WR_ADDR_BRK_MASK) >> 13)
-#define PVR_FSL_LINKS(pvr)      ((pvr.pvr[3] & PVR3_FSL_LINKS_MASK) >> 7)
-
-#define PVR_ICACHE_ADDR_TAG_BITS(pvr) \
-                        ((pvr.pvr[4] & PVR4_ICACHE_ADDR_TAG_BITS_MASK) >> 26)
-#define PVR_ICACHE_USE_FSL(pvr)         (pvr.pvr[4] & PVR4_ICACHE_USE_FSL_MASK)
-#define PVR_ICACHE_ALLOW_WR(pvr)        (pvr.pvr[4] & PVR4_ICACHE_ALLOW_WR_MASK)
-#define PVR_ICACHE_LINE_LEN(pvr) \
-                        (1 << ((pvr.pvr[4] & PVR4_ICACHE_LINE_LEN_MASK) >> 21))
-#define PVR_ICACHE_BYTE_SIZE(pvr) \
-                        (1 << ((pvr.pvr[4] & PVR4_ICACHE_BYTE_SIZE_MASK) >> 16))
-
-#define PVR_DCACHE_ADDR_TAG_BITS(pvr) \
-                        ((pvr.pvr[5] & PVR5_DCACHE_ADDR_TAG_BITS_MASK) >> 26)
-#define PVR_DCACHE_USE_FSL(pvr)         (pvr.pvr[5] & PVR5_DCACHE_USE_FSL_MASK)
-#define PVR_DCACHE_ALLOW_WR(pvr)        (pvr.pvr[5] & PVR5_DCACHE_ALLOW_WR_MASK)
+#define PVR_IS_FULL(_pvr)       (_pvr.pvr[0] & PVR0_PVR_FULL_MASK)
+#define PVR_USE_BARREL(_pvr)    (_pvr.pvr[0] & PVR0_USE_BARREL_MASK)
+#define PVR_USE_DIV(_pvr)       (_pvr.pvr[0] & PVR0_USE_DIV_MASK)
+#define PVR_USE_HW_MUL(_pvr)    (_pvr.pvr[0] & PVR0_USE_HW_MUL_MASK)
+#define PVR_USE_FPU(_pvr)       (_pvr.pvr[0] & PVR0_USE_FPU_MASK)
+#define PVR_USE_FPU2(_pvr)      (_pvr.pvr[2] & PVR2_USE_FPU2_MASK)
+#define PVR_USE_ICACHE(_pvr)    (_pvr.pvr[0] & PVR0_USE_ICACHE_MASK)
+#define PVR_USE_DCACHE(_pvr)    (_pvr.pvr[0] & PVR0_USE_DCACHE_MASK)
+#define PVR_VERSION(_pvr)       ((_pvr.pvr[0] & PVR0_VERSION_MASK) >> 8)
+#define PVR_USER1(_pvr)         (_pvr.pvr[0] & PVR0_USER1_MASK)
+#define PVR_USER2(_pvr)         (_pvr.pvr[1] & PVR1_USER2_MASK)
+
+#define PVR_D_OPB(_pvr)         (_pvr.pvr[2] & PVR2_D_OPB_MASK)
+#define PVR_D_LMB(_pvr)         (_pvr.pvr[2] & PVR2_D_LMB_MASK)
+#define PVR_I_OPB(_pvr)         (_pvr.pvr[2] & PVR2_I_OPB_MASK)
+#define PVR_I_LMB(_pvr)         (_pvr.pvr[2] & PVR2_I_LMB_MASK)
+#define PVR_INTERRUPT_IS_EDGE(_pvr) \
+                        (_pvr.pvr[2] & PVR2_INTERRUPT_IS_EDGE_MASK)
+#define PVR_EDGE_IS_POSITIVE(_pvr) \
+                        (_pvr.pvr[2] & PVR2_EDGE_IS_POSITIVE_MASK)
+#define PVR_USE_MSR_INSTR(_pvr)         (_pvr.pvr[2] & PVR2_USE_MSR_INSTR)
+#define PVR_USE_PCMP_INSTR(_pvr)        (_pvr.pvr[2] & PVR2_USE_PCMP_INSTR)
+#define PVR_AREA_OPTIMISED(_pvr)        (_pvr.pvr[2] & PVR2_AREA_OPTIMISED)
+#define PVR_USE_MUL64(_pvr)             (_pvr.pvr[2] & PVR2_USE_MUL64_MASK)
+#define PVR_OPCODE_0x0_ILLEGAL(_pvr) \
+                        (_pvr.pvr[2] & PVR2_OPCODE_0x0_ILL_MASK)
+#define PVR_UNALIGNED_EXCEPTION(_pvr) \
+                        (_pvr.pvr[2] & PVR2_UNALIGNED_EXC_MASK)
+#define PVR_ILL_OPCODE_EXCEPTION(_pvr) \
+                        (_pvr.pvr[2] & PVR2_ILL_OPCODE_EXC_MASK)
+#define PVR_IOPB_BUS_EXCEPTION(_pvr) \
+                        (_pvr.pvr[2] & PVR2_IOPB_BUS_EXC_MASK)
+#define PVR_DOPB_BUS_EXCEPTION(_pvr) \
+                        (_pvr.pvr[2] & PVR2_DOPB_BUS_EXC_MASK)
+#define PVR_DIV_ZERO_EXCEPTION(_pvr) \
+                        (_pvr.pvr[2] & PVR2_DIV_ZERO_EXC_MASK)
+#define PVR_FPU_EXCEPTION(_pvr)         (_pvr.pvr[2] & PVR2_FPU_EXC_MASK)
+#define PVR_FSL_EXCEPTION(_pvr)         (_pvr.pvr[2] & PVR2_USE_EXTEND_FSL)
+
+#define PVR_DEBUG_ENABLED(_pvr)         (_pvr.pvr[3] & PVR3_DEBUG_ENABLED_MASK)
+#define PVR_NUMBER_OF_PC_BRK(_pvr) \
+                        ((_pvr.pvr[3] & PVR3_NUMBER_OF_PC_BRK_MASK) >> 25)
+#define PVR_NUMBER_OF_RD_ADDR_BRK(_pvr) \
+                        ((_pvr.pvr[3] & PVR3_NUMBER_OF_RD_ADDR_BRK_MASK) >> 19)
+#define PVR_NUMBER_OF_WR_ADDR_BRK(_pvr) \
+                        ((_pvr.pvr[3] & PVR3_NUMBER_OF_WR_ADDR_BRK_MASK) >> 13)
+#define PVR_FSL_LINKS(_pvr)     ((_pvr.pvr[3] & PVR3_FSL_LINKS_MASK) >> 7)
+
+#define PVR_ICACHE_ADDR_TAG_BITS(_pvr) \
+                ((_pvr.pvr[4] & PVR4_ICACHE_ADDR_TAG_BITS_MASK) >> 26)
+#define PVR_ICACHE_USE_FSL(_pvr) \
+                (_pvr.pvr[4] & PVR4_ICACHE_USE_FSL_MASK)
+#define PVR_ICACHE_ALLOW_WR(_pvr) \
+                (_pvr.pvr[4] & PVR4_ICACHE_ALLOW_WR_MASK)
+#define PVR_ICACHE_LINE_LEN(_pvr) \
+                (1 << ((_pvr.pvr[4] & PVR4_ICACHE_LINE_LEN_MASK) >> 21))
+#define PVR_ICACHE_BYTE_SIZE(_pvr) \
+                (1 << ((_pvr.pvr[4] & PVR4_ICACHE_BYTE_SIZE_MASK) >> 16))
+
+#define PVR_DCACHE_ADDR_TAG_BITS(_pvr) \
+                        ((_pvr.pvr[5] & PVR5_DCACHE_ADDR_TAG_BITS_MASK) >> 26)
+#define PVR_DCACHE_USE_FSL(_pvr)        (_pvr.pvr[5] & PVR5_DCACHE_USE_FSL_MASK)
+#define PVR_DCACHE_ALLOW_WR(_pvr) \
+                        (_pvr.pvr[5] & PVR5_DCACHE_ALLOW_WR_MASK)
 /* FIXME two shifts on one line needs any comment */
-#define PVR_DCACHE_LINE_LEN(pvr) \
-                        (1 << ((pvr.pvr[5] & PVR5_DCACHE_LINE_LEN_MASK) >> 21))
-#define PVR_DCACHE_BYTE_SIZE(pvr) \
-                        (1 << ((pvr.pvr[5] & PVR5_DCACHE_BYTE_SIZE_MASK) >> 16))
+#define PVR_DCACHE_LINE_LEN(_pvr) \
+                (1 << ((_pvr.pvr[5] & PVR5_DCACHE_LINE_LEN_MASK) >> 21))
+#define PVR_DCACHE_BYTE_SIZE(_pvr) \
+                (1 << ((_pvr.pvr[5] & PVR5_DCACHE_BYTE_SIZE_MASK) >> 16))
 
-#define PVR_DCACHE_USE_WRITEBACK(pvr) \
-                        ((pvr.pvr[5] & PVR5_DCACHE_USE_WRITEBACK) >> 14)
+#define PVR_DCACHE_USE_WRITEBACK(_pvr) \
+                        ((_pvr.pvr[5] & PVR5_DCACHE_USE_WRITEBACK) >> 14)
 
-#define PVR_ICACHE_BASEADDR(pvr)        (pvr.pvr[6] & PVR6_ICACHE_BASEADDR_MASK)
-#define PVR_ICACHE_HIGHADDR(pvr)        (pvr.pvr[7] & PVR7_ICACHE_HIGHADDR_MASK)
+#define PVR_ICACHE_BASEADDR(_pvr) \
+                        (_pvr.pvr[6] & PVR6_ICACHE_BASEADDR_MASK)
+#define PVR_ICACHE_HIGHADDR(_pvr) \
+                        (_pvr.pvr[7] & PVR7_ICACHE_HIGHADDR_MASK)
+#define PVR_DCACHE_BASEADDR(_pvr) \
+                        (_pvr.pvr[8] & PVR8_DCACHE_BASEADDR_MASK)
+#define PVR_DCACHE_HIGHADDR(_pvr) \
+                        (_pvr.pvr[9] & PVR9_DCACHE_HIGHADDR_MASK)
 
-#define PVR_DCACHE_BASEADDR(pvr)        (pvr.pvr[8] & PVR8_DCACHE_BASEADDR_MASK)
-#define PVR_DCACHE_HIGHADDR(pvr)        (pvr.pvr[9] & PVR9_DCACHE_HIGHADDR_MASK)
+#define PVR_TARGET_FAMILY(_pvr) \
+                        ((_pvr.pvr[10] & PVR10_TARGET_FAMILY_MASK) >> 24)
 
-#define PVR_TARGET_FAMILY(pvr)  ((pvr.pvr[10] & PVR10_TARGET_FAMILY_MASK) >> 24)
-
-#define PVR_MSR_RESET_VALUE(pvr) \
-                                (pvr.pvr[11] & PVR11_MSR_RESET_VALUE_MASK)
+#define PVR_MSR_RESET_VALUE(_pvr) \
+                        (_pvr.pvr[11] & PVR11_MSR_RESET_VALUE_MASK)
 
 /* mmu */
-#define PVR_USE_MMU(pvr)        ((pvr.pvr[11] & PVR11_USE_MMU) >> 30)
-#define PVR_MMU_ITLB_SIZE(pvr)  (pvr.pvr[11] & PVR11_MMU_ITLB_SIZE)
-#define PVR_MMU_DTLB_SIZE(pvr)  (pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
-#define PVR_MMU_TLB_ACCESS(pvr) (pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
-#define PVR_MMU_ZONES(pvr)      (pvr.pvr[11] & PVR11_MMU_ZONES)
-
+#define PVR_USE_MMU(_pvr)               ((_pvr.pvr[11] & PVR11_USE_MMU) >> 30)
+#define PVR_MMU_ITLB_SIZE(_pvr)         (_pvr.pvr[11] & PVR11_MMU_ITLB_SIZE)
+#define PVR_MMU_DTLB_SIZE(_pvr)         (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
+#define PVR_MMU_TLB_ACCESS(_pvr)        (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
+#define PVR_MMU_ZONES(_pvr)             (_pvr.pvr[11] & PVR11_MMU_ZONES)
+
+/* endian */
+#define PVR_ENDIAN(_pvr)        (_pvr.pvr[0] & PVR0_ENDI)
 
 int cpu_has_pvr(void);
 void get_pvr(struct pvr_s *pvr);
diff --git a/arch/microblaze/include/asm/seccomp.h b/arch/microblaze/include/asm/seccomp.h
new file mode 100644
index 000000000000..0d912758a0d7
--- /dev/null
+++ b/arch/microblaze/include/asm/seccomp.h
@@ -0,0 +1,16 @@
+#ifndef _ASM_MICROBLAZE_SECCOMP_H
+#define _ASM_MICROBLAZE_SECCOMP_H
+
+#include <linux/unistd.h>
+
+#define __NR_seccomp_read               __NR_read
+#define __NR_seccomp_write              __NR_write
+#define __NR_seccomp_exit               __NR_exit
+#define __NR_seccomp_sigreturn          __NR_sigreturn
+
+#define __NR_seccomp_read_32            __NR_read
+#define __NR_seccomp_write_32           __NR_write
+#define __NR_seccomp_exit_32            __NR_exit
+#define __NR_seccomp_sigreturn_32       __NR_sigreturn
+
+#endif  /* _ASM_MICROBLAZE_SECCOMP_H */
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
index 782b5c89248e..8f3968971e4e 100644
--- a/arch/microblaze/include/asm/setup.h
+++ b/arch/microblaze/include/asm/setup.h
@@ -25,6 +25,12 @@ void early_printk(const char *fmt, ...);
 int setup_early_printk(char *opt);
 void disable_early_printk(void);
 
+#if defined(CONFIG_EARLY_PRINTK)
+#define eprintk early_printk
+#else
+#define eprintk printk
+#endif
+
 void heartbeat(void);
 void setup_heartbeat(void);
 
diff --git a/arch/microblaze/include/asm/syscall.h b/arch/microblaze/include/asm/syscall.h
index 048dfcd8d89d..9bc431783105 100644
--- a/arch/microblaze/include/asm/syscall.h
+++ b/arch/microblaze/include/asm/syscall.h
@@ -96,4 +96,7 @@ static inline void syscall_set_arguments(struct task_struct *task,
                 microblaze_set_syscall_arg(regs, i++, *args++);
 }
 
+asmlinkage long do_syscall_trace_enter(struct pt_regs *regs);
+asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
+
 #endif /* __ASM_MICROBLAZE_SYSCALL_H */
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h
index 720761cc741f..27f2f4c0f39f 100644
--- a/arch/microblaze/include/asm/syscalls.h
+++ b/arch/microblaze/include/asm/syscalls.h
@@ -1,5 +1,13 @@
 #ifndef __ASM_MICROBLAZE_SYSCALLS_H
 
+asmlinkage long microblaze_vfork(struct pt_regs *regs);
+asmlinkage long microblaze_clone(int flags, unsigned long stack,
+                                                        struct pt_regs *regs);
+asmlinkage long microblaze_execve(const char __user *filenamei,
+                                  const char __user *const __user *argv,
+                                  const char __user *const __user *envp,
+                                  struct pt_regs *regs);
+
 asmlinkage long sys_clone(int flags, unsigned long stack, struct pt_regs *regs);
 #define sys_clone sys_clone
 
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
index 8a8e9fc6e0c0..b73da2ac21b3 100644
--- a/arch/microblaze/include/asm/thread_info.h
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -127,23 +127,19 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SECCOMP             10      /* secure computing */
 #define TIF_FREEZE              14      /* Freezing for suspend */
 
-/* FIXME change in entry.S */
-#define TIF_KERNEL_TRACE        8       /* kernel trace active */
-
 /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_POLLING_NRFLAG      16
 
-#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
-#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
-#define _TIF_SINGLESTEP         (1<<TIF_SINGLESTEP)
-#define _TIF_IRET               (1<<TIF_IRET)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_FREEZE             (1<<TIF_FREEZE)
+#define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
+#define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
+#define _TIF_IRET               (1 << TIF_IRET)
+#define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
+#define _TIF_FREEZE             (1 << TIF_FREEZE)
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
-#define _TIF_KERNEL_TRACE       (1 << TIF_KERNEL_TRACE)
 
 /* work to do in syscall trace */
 #define _TIF_WORK_SYSCALL_MASK  (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h
index e8abd4a0349c..8aa97817cc8c 100644
--- a/arch/microblaze/include/asm/tlb.h
+++ b/arch/microblaze/include/asm/tlb.h
@@ -13,6 +13,7 @@
 
 #define tlb_flush(tlb)  flush_tlb_mm((tlb)->mm)
 
+#include <linux/pagemap.h>
 #include <asm-generic/tlb.h>
 
 #ifdef CONFIG_MMU
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h
index d840f4a2d3c9..5bb95a11880d 100644
--- a/arch/microblaze/include/asm/uaccess.h
+++ b/arch/microblaze/include/asm/uaccess.h
@@ -120,16 +120,16 @@ static inline unsigned long __must_check __clear_user(void __user *to,
 {
         /* normal memset with two words to __ex_table */
         __asm__ __volatile__ (                          \
-                        "1:     sb      r0, %2, r0;"    \
+                        "1:     sb      r0, %1, r0;"    \
                         "       addik   %0, %0, -1;"    \
                         "       bneid   %0, 1b;"        \
-                        "       addik   %2, %2, 1;"     \
+                        "       addik   %1, %1, 1;"     \
                         "2:                     "       \
                         __EX_TABLE_SECTION              \
                         ".word  1b,2b;"                 \
                         ".previous;"                    \
-                : "=r"(n)                               \
-                : "0"(n), "r"(to)
+                : "=r"(n), "=r"(to)                     \
+                : "0"(n), "1"(to)
         );
         return n;
 }
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
index 3658d91ac0fb..b162ed880495 100644
--- a/arch/microblaze/include/asm/unaligned.h
+++ b/arch/microblaze/include/asm/unaligned.h
@@ -12,12 +12,19 @@
 
 # ifdef __KERNEL__
 
-# include <linux/unaligned/be_struct.h>
-# include <linux/unaligned/le_byteshift.h>
-# include <linux/unaligned/generic.h>
+#  ifdef __MICROBLAZEEL__
+#   include <linux/unaligned/le_struct.h>
+#   include <linux/unaligned/be_byteshift.h>
+#   define get_unaligned        __get_unaligned_le
+#   define put_unaligned        __put_unaligned_le
+#  else
+#   include <linux/unaligned/be_struct.h>
+#   include <linux/unaligned/le_byteshift.h>
+#   define get_unaligned        __get_unaligned_be
+#   define put_unaligned        __put_unaligned_be
+#  endif
 
-# define get_unaligned  __get_unaligned_be
-# define put_unaligned  __put_unaligned_be
+# include <linux/unaligned/generic.h>
 
 # endif /* __KERNEL__ */
 #endif /* _ASM_MICROBLAZE_UNALIGNED_H */
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index 2b67e92a773c..7d7092b917ac 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -383,8 +383,16 @@
 #define __NR_rt_tgsigqueueinfo  365 /* new */
 #define __NR_perf_event_open    366 /* new */
 #define __NR_recvmmsg           367 /* new */
+#define __NR_fanotify_init      368
+#define __NR_fanotify_mark      369
+#define __NR_prlimit64          370
+#define __NR_name_to_handle_at  371
+#define __NR_open_by_handle_at  372
+#define __NR_clock_adjtime      373
+#define __NR_syncfs             374
+#define __NR_setns              375
 
-#define __NR_syscalls           368
+#define __NR_syscalls           376
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index f0cb5c26c81c..494b63b72dd7 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -10,6 +10,7 @@ CFLAGS_REMOVE_early_printk.o = -pg
 CFLAGS_REMOVE_selfmod.o = -pg
 CFLAGS_REMOVE_heartbeat.o = -pg
 CFLAGS_REMOVE_ftrace.o = -pg
+CFLAGS_REMOVE_process.o = -pg
 endif
 
 extra-y := head.o vmlinux.lds
diff --git a/arch/microblaze/kernel/cpu/Makefile b/arch/microblaze/kernel/cpu/Makefile
index 59cc7bceaf8c..fceed4edea41 100644
--- a/arch/microblaze/kernel/cpu/Makefile
+++ b/arch/microblaze/kernel/cpu/Makefile
@@ -6,7 +6,7 @@ ifdef CONFIG_FUNCTION_TRACER
 CFLAGS_REMOVE_cache.o = -pg
 endif
 
-EXTRA_CFLAGS += -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \
+ccflags-y := -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \
                 -DCPU_REV=$(CPU_REV)
 
 obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index 109876e8d643..4b7d8a3f4aef 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -129,7 +129,7 @@ do {									\
  * to use for simple wdc or wic.
  *
  * start address is cache aligned
- * end address is not aligned, if end is aligned then I have to substract
+ * end address is not aligned, if end is aligned then I have to subtract
  * cacheline length because I can't flush/invalidate the next cacheline.
  * If is not, I align it because I will flush/invalidate whole line.
  */
@@ -519,7 +519,7 @@ static void __flush_dcache_range_wb(unsigned long start, unsigned long end)
 struct scache *mbc;
 
 /* new wb cache model */
-const struct scache wb_msr = {
+static const struct scache wb_msr = {
         .ie = __enable_icache_msr,
         .id = __disable_icache_msr,
         .ifl = __flush_icache_all_noirq,
@@ -535,7 +535,7 @@ const struct scache wb_msr = {
 };
 
 /* There is only difference in ie, id, de, dd functions */
-const struct scache wb_nomsr = {
+static const struct scache wb_nomsr = {
         .ie = __enable_icache_nomsr,
         .id = __disable_icache_nomsr,
         .ifl = __flush_icache_all_noirq,
@@ -551,7 +551,7 @@ const struct scache wb_nomsr = {
 };
 
 /* Old wt cache model with disabling irq and turn off cache */
-const struct scache wt_msr = {
+static const struct scache wt_msr = {
         .ie = __enable_icache_msr,
         .id = __disable_icache_msr,
         .ifl = __flush_icache_all_msr_irq,
@@ -566,7 +566,7 @@ const struct scache wt_msr = {
         .dinr = __invalidate_dcache_range_msr_irq_wt,
 };
 
-const struct scache wt_nomsr = {
+static const struct scache wt_nomsr = {
         .ie = __enable_icache_nomsr,
         .id = __disable_icache_nomsr,
         .ifl = __flush_icache_all_nomsr_irq,
@@ -582,7 +582,7 @@ const struct scache wt_nomsr = {
 };
 
 /* New wt cache model for newer Microblaze versions */
-const struct scache wt_msr_noirq = {
+static const struct scache wt_msr_noirq = {
         .ie = __enable_icache_msr,
         .id = __disable_icache_msr,
         .ifl = __flush_icache_all_noirq,
@@ -597,7 +597,7 @@ const struct scache wt_msr_noirq = {
         .dinr = __invalidate_dcache_range_nomsr_wt,
 };
 
-const struct scache wt_nomsr_noirq = {
+static const struct scache wt_nomsr_noirq = {
         .ie = __enable_icache_nomsr,
         .id = __disable_icache_nomsr,
         .ifl = __flush_icache_all_noirq,
@@ -624,7 +624,7 @@ void microblaze_cache_init(void)
                 if (cpuinfo.dcache_wb) {
                         INFO("wb_msr");
                         mbc = (struct scache *)&wb_msr;
-                        if (cpuinfo.ver_code < CPUVER_7_20_D) {
+                        if (cpuinfo.ver_code <= CPUVER_7_20_D) {
                                 /* MS: problem with signal handling - hw bug */
                                 INFO("WB won't work properly");
                         }
@@ -641,7 +641,7 @@ void microblaze_cache_init(void)
                 if (cpuinfo.dcache_wb) {
                         INFO("wb_nomsr");
                         mbc = (struct scache *)&wb_nomsr;
-                        if (cpuinfo.ver_code < CPUVER_7_20_D) {
+                        if (cpuinfo.ver_code <= CPUVER_7_20_D) {
                                 /* MS: problem with signal handling - hw bug */
                                 INFO("WB won't work properly");
                         }
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
index f72dbd66c844..f70a6047f08e 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -72,6 +72,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
         CI(pvr_user2, USER2);
 
         CI(mmu, USE_MMU);
+        CI(endian, ENDIAN);
 
         CI(use_icache, USE_ICACHE);
         CI(icache_tagbits, ICACHE_ADDR_TAG_BITS);
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
index 6095aa6b5c88..b16b994ca3d2 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-static.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -119,6 +119,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
         ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
 
         ci->mmu = fcpu(cpu, "xlnx,use-mmu");
+        ci->endian = fcpu(cpu, "xlnx,endianness");
 
         ci->ver_code = 0;
         ci->fpga_family_code = 0;
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index 255ef880351e..c1640c52711f 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -30,6 +30,10 @@ const struct cpu_ver_key cpu_ver_lookup[] = {
         {"7.20.c", 0x0e},
         {"7.20.d", 0x0f},
         {"7.30.a", 0x10},
+        {"7.30.b", 0x11},
+        {"8.00.a", 0x12},
+        {"8.00.b", 0x13},
+        {"8.10.a", 0x14},
         {NULL, 0},
 };
 
diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
index 7086e3564281..b4048af02615 100644
--- a/arch/microblaze/kernel/cpu/mb.c
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -51,11 +51,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         count = seq_printf(m,
                         "CPU-Family:    MicroBlaze\n"
                         "FPGA-Arch:     %s\n"
-                        "CPU-Ver:       %s\n"
+                        "CPU-Ver:       %s, %s endian\n"
                         "CPU-MHz:       %d.%02d\n"
                         "BogoMips:      %lu.%02lu\n",
                         fpga_family,
                         cpu_ver,
+                        cpuinfo.endian ? "little" : "big",
                         cpuinfo.cpu_clock_freq /
                         1000000,
                         cpuinfo.cpu_clock_freq %
diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c
index 9bee9382bf74..488c1ed24e38 100644
--- a/arch/microblaze/kernel/cpu/pvr.c
+++ b/arch/microblaze/kernel/cpu/pvr.c
@@ -27,7 +27,7 @@
         register unsigned tmp __asm__("r3");                    \
         tmp = 0x0;      /* Prevent warning about unused */      \
         __asm__ __volatile__ (                                  \
-                        ".byte 0x94,0x60,0xa0, " #pvrid "\n\t"  \
+                        "mfs    %0, rpvr" #pvrid ";"            \
                         : "=r" (tmp) : : "memory");             \
         val = tmp;                                              \
 }
@@ -54,7 +54,7 @@ int cpu_has_pvr(void)
         if (!(flags & PVR_MSR_BIT))
                 return 0;
 
-        get_single_pvr(0x00, pvr0);
+        get_single_pvr(0, pvr0);
         pr_debug("%s: pvr0 is 0x%08x\n", __func__, pvr0);
 
         if (pvr0 & PVR0_PVR_FULL_MASK)
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c
index 79c74659f204..393e6b2db688 100644
--- a/arch/microblaze/kernel/dma.c
+++ b/arch/microblaze/kernel/dma.c
@@ -26,6 +26,7 @@ static inline void __dma_sync_page(unsigned long paddr, unsigned long offset,
 {
         switch (direction) {
         case DMA_TO_DEVICE:
+        case DMA_BIDIRECTIONAL:
                 flush_dcache_range(paddr + offset, paddr + offset + size);
                 break;
         case DMA_FROM_DEVICE:
diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c
index 7de84923ba07..c3616a080ebf 100644
--- a/arch/microblaze/kernel/early_printk.c
+++ b/arch/microblaze/kernel/early_printk.c
@@ -24,7 +24,8 @@
 static u32 early_console_initialized;
 static u32 base_addr;
 
-static void early_printk_putc(char c)
+#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
+static void early_printk_uartlite_putc(char c)
 {
         /*
          * Limit how many times we'll spin waiting for TX FIFO status.
@@ -45,25 +46,70 @@ static void early_printk_putc(char c)
                 out_be32(base_addr + 4, c & 0xff);
 }
 
-static void early_printk_write(struct console *unused,
+static void early_printk_uartlite_write(struct console *unused,
                                         const char *s, unsigned n)
 {
         while (*s && n-- > 0) {
-                early_printk_putc(*s);
+                early_printk_uartlite_putc(*s);
                 if (*s == '\n')
-                        early_printk_putc('\r');
+                        early_printk_uartlite_putc('\r');
                 s++;
         }
 }
 
-static struct console early_serial_console = {
+static struct console early_serial_uartlite_console = {
         .name = "earlyser",
-        .write = early_printk_write,
+        .write = early_printk_uartlite_write,
         .flags = CON_PRINTBUFFER,
         .index = -1,
 };
+#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
 
-static struct console *early_console = &early_serial_console;
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static void early_printk_uart16550_putc(char c)
+{
+        /*
+         * Limit how many times we'll spin waiting for TX FIFO status.
+         * This will prevent lockups if the base address is incorrectly
+         * set, or any other issue on the UARTLITE.
+         * This limit is pretty arbitrary, unless we are at about 10 baud
+         * we'll never timeout on a working UART.
+         */
+
+        #define UART_LSR_TEMT   0x40 /* Transmitter empty */
+        #define UART_LSR_THRE   0x20 /* Transmit-hold-register empty */
+        #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
+        unsigned retries = 10000;
+
+        while (--retries &&
+                !((in_be32(base_addr + 0x14) & BOTH_EMPTY) == BOTH_EMPTY))
+                ;
+
+        if (retries)
+                out_be32(base_addr, c & 0xff);
+}
+
+static void early_printk_uart16550_write(struct console *unused,
+                                        const char *s, unsigned n)
+{
+        while (*s && n-- > 0) {
+                early_printk_uart16550_putc(*s);
+                if (*s == '\n')
+                        early_printk_uart16550_putc('\r');
+                s++;
+        }
+}
+
+static struct console early_serial_uart16550_console = {
+        .name = "earlyser",
+        .write = early_printk_uart16550_write,
+        .flags = CON_PRINTBUFFER,
+        .index = -1,
+};
+#endif /* CONFIG_SERIAL_8250_CONSOLE */
+
+static struct console *early_console;
 
 void early_printk(const char *fmt, ...)
 {
@@ -84,20 +130,43 @@ int __init setup_early_printk(char *opt)
         if (early_console_initialized)
                 return 1;
 
+#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
         base_addr = early_uartlite_console();
         if (base_addr) {
                 early_console_initialized = 1;
 #ifdef CONFIG_MMU
                 early_console_reg_tlb_alloc(base_addr);
 #endif
+                early_console = &early_serial_uartlite_console;
                 early_printk("early_printk_console is enabled at 0x%08x\n",
                                                         base_addr);
 
                 /* register_console(early_console); */
 
                 return 0;
-        } else
-                return 1;
+        }
+#endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+        base_addr = early_uart16550_console();
+        base_addr &= ~3; /* clear register offset */
+        if (base_addr) {
+                early_console_initialized = 1;
+#ifdef CONFIG_MMU
+                early_console_reg_tlb_alloc(base_addr);
+#endif
+                early_console = &early_serial_uart16550_console;
+
+                early_printk("early_printk_console is enabled at 0x%08x\n",
+                                                        base_addr);
+
+                /* register_console(early_console); */
+
+                return 0;
+        }
+#endif /* CONFIG_SERIAL_8250_CONSOLE */
+
+        return 1;
 }
 
 void __init disable_early_printk(void)
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S
index ca84368570b6..34b526f59b43 100644
--- a/arch/microblaze/kernel/entry-nommu.S
+++ b/arch/microblaze/kernel/entry-nommu.S
@@ -115,7 +115,7 @@ ENTRY(_interrupt)
         /* restore r31 */
         lwi     r31, r0, PER_CPU(CURRENT_SAVE)
         /* prepare the link register, the argument and jump */
-        la      r15, r0, ret_from_intr - 8
+        addik   r15, r0, ret_from_intr - 8
         addk    r6, r0, r15
         braid   do_IRQ
         add     r5, r0, r1
@@ -283,7 +283,7 @@ ENTRY(_user_exception)
         add     r12, r12, r12                   /* convert num -> ptr */
         add     r12, r12, r12
         lwi     r12, r12, sys_call_table        /* Get function pointer */
-        la      r15, r0, ret_to_user-8          /* set return address */
+        addik   r15, r0, ret_to_user-8          /* set return address */
         bra     r12                             /* Make the system call. */
         bri     0                               /* won't reach here */
 1:
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index 304882e56459..ca15bc5c7449 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -33,11 +33,14 @@
 
 #undef DEBUG
 
-/* The size of a state save frame. */
-#define STATE_SAVE_SIZE         (PT_SIZE + STATE_SAVE_ARG_SPACE)
-
-/* The offset of the struct pt_regs in a `state save frame' on the stack. */
-#define PTO     STATE_SAVE_ARG_SPACE /* 24 the space for args */
+#ifdef DEBUG
+/* Create space for syscalls counting. */
+.section .data
+.global syscall_debug_table
+.align 4
+syscall_debug_table:
+        .space  (__NR_syscalls * 4)
+#endif /* DEBUG */
 
 #define C_ENTRY(name)   .globl name; .align 4; name
 
@@ -172,68 +175,72 @@
 1:
 
 #define SAVE_REGS \
-        swi     r2, r1, PTO+PT_R2;      /* Save SDA */                  \
-        swi     r3, r1, PTO+PT_R3;                                      \
-        swi     r4, r1, PTO+PT_R4;                                      \
-        swi     r5, r1, PTO+PT_R5;                                      \
-        swi     r6, r1, PTO+PT_R6;                                      \
-        swi     r7, r1, PTO+PT_R7;                                      \
-        swi     r8, r1, PTO+PT_R8;                                      \
-        swi     r9, r1, PTO+PT_R9;                                      \
-        swi     r10, r1, PTO+PT_R10;                                    \
-        swi     r11, r1, PTO+PT_R11;    /* save clobbered regs after rval */\
-        swi     r12, r1, PTO+PT_R12;                                    \
-        swi     r13, r1, PTO+PT_R13;    /* Save SDA2 */                 \
-        swi     r14, r1, PTO+PT_PC;     /* PC, before IRQ/trap */       \
-        swi     r15, r1, PTO+PT_R15;    /* Save LP */                   \
-        swi     r18, r1, PTO+PT_R18;    /* Save asm scratch reg */      \
-        swi     r19, r1, PTO+PT_R19;                                    \
-        swi     r20, r1, PTO+PT_R20;                                    \
-        swi     r21, r1, PTO+PT_R21;                                    \
-        swi     r22, r1, PTO+PT_R22;                                    \
-        swi     r23, r1, PTO+PT_R23;                                    \
-        swi     r24, r1, PTO+PT_R24;                                    \
-        swi     r25, r1, PTO+PT_R25;                                    \
-        swi     r26, r1, PTO+PT_R26;                                    \
-        swi     r27, r1, PTO+PT_R27;                                    \
-        swi     r28, r1, PTO+PT_R28;                                    \
-        swi     r29, r1, PTO+PT_R29;                                    \
-        swi     r30, r1, PTO+PT_R30;                                    \
-        swi     r31, r1, PTO+PT_R31;    /* Save current task reg */     \
+        swi     r2, r1, PT_R2;  /* Save SDA */                  \
+        swi     r3, r1, PT_R3;                                  \
+        swi     r4, r1, PT_R4;                                  \
+        swi     r5, r1, PT_R5;                                  \
+        swi     r6, r1, PT_R6;                                  \
+        swi     r7, r1, PT_R7;                                  \
+        swi     r8, r1, PT_R8;                                  \
+        swi     r9, r1, PT_R9;                                  \
+        swi     r10, r1, PT_R10;                                        \
+        swi     r11, r1, PT_R11;        /* save clobbered regs after rval */\
+        swi     r12, r1, PT_R12;                                        \
+        swi     r13, r1, PT_R13;        /* Save SDA2 */                 \
+        swi     r14, r1, PT_PC; /* PC, before IRQ/trap */       \
+        swi     r15, r1, PT_R15;        /* Save LP */                   \
+        swi     r16, r1, PT_R16;                                        \
+        swi     r17, r1, PT_R17;                                        \
+        swi     r18, r1, PT_R18;        /* Save asm scratch reg */      \
+        swi     r19, r1, PT_R19;                                        \
+        swi     r20, r1, PT_R20;                                        \
+        swi     r21, r1, PT_R21;                                        \
+        swi     r22, r1, PT_R22;                                        \
+        swi     r23, r1, PT_R23;                                        \
+        swi     r24, r1, PT_R24;                                        \
+        swi     r25, r1, PT_R25;                                        \
+        swi     r26, r1, PT_R26;                                        \
+        swi     r27, r1, PT_R27;                                        \
+        swi     r28, r1, PT_R28;                                        \
+        swi     r29, r1, PT_R29;                                        \
+        swi     r30, r1, PT_R30;                                        \
+        swi     r31, r1, PT_R31;        /* Save current task reg */     \
         mfs     r11, rmsr;              /* save MSR */                  \
-        swi     r11, r1, PTO+PT_MSR;
+        swi     r11, r1, PT_MSR;
 
 #define RESTORE_REGS \
-        lwi     r11, r1, PTO+PT_MSR;                                    \
+        lwi     r11, r1, PT_MSR;                                        \
         mts     rmsr , r11;                                             \
-        lwi     r2, r1, PTO+PT_R2;      /* restore SDA */               \
-        lwi     r3, r1, PTO+PT_R3;                                      \
-        lwi     r4, r1, PTO+PT_R4;                                      \
-        lwi     r5, r1, PTO+PT_R5;                                      \
-        lwi     r6, r1, PTO+PT_R6;                                      \
-        lwi     r7, r1, PTO+PT_R7;                                      \
-        lwi     r8, r1, PTO+PT_R8;                                      \
-        lwi     r9, r1, PTO+PT_R9;                                      \
-        lwi     r10, r1, PTO+PT_R10;                                    \
-        lwi     r11, r1, PTO+PT_R11;    /* restore clobbered regs after rval */\
-        lwi     r12, r1, PTO+PT_R12;                                    \
-        lwi     r13, r1, PTO+PT_R13;    /* restore SDA2 */              \
-        lwi     r14, r1, PTO+PT_PC;     /* RESTORE_LINK PC, before IRQ/trap */\
-        lwi     r15, r1, PTO+PT_R15;    /* restore LP */                \
-        lwi     r18, r1, PTO+PT_R18;    /* restore asm scratch reg */   \
-        lwi     r19, r1, PTO+PT_R19;                                    \
-        lwi     r20, r1, PTO+PT_R20;                                    \
-        lwi     r21, r1, PTO+PT_R21;                                    \
-        lwi     r22, r1, PTO+PT_R22;                                    \
-        lwi     r23, r1, PTO+PT_R23;                                    \
-        lwi     r24, r1, PTO+PT_R24;                                    \
-        lwi     r25, r1, PTO+PT_R25;                                    \
-        lwi     r26, r1, PTO+PT_R26;                                    \
-        lwi     r27, r1, PTO+PT_R27;                                    \
-        lwi     r28, r1, PTO+PT_R28;                                    \
-        lwi     r29, r1, PTO+PT_R29;                                    \
-        lwi     r30, r1, PTO+PT_R30;                                    \
-        lwi     r31, r1, PTO+PT_R31;    /* Restore cur task reg */
+        lwi     r2, r1, PT_R2;  /* restore SDA */               \
+        lwi     r3, r1, PT_R3;                                  \
+        lwi     r4, r1, PT_R4;                                  \
+        lwi     r5, r1, PT_R5;                                  \
+        lwi     r6, r1, PT_R6;                                  \
+        lwi     r7, r1, PT_R7;                                  \
+        lwi     r8, r1, PT_R8;                                  \
+        lwi     r9, r1, PT_R9;                                  \
+        lwi     r10, r1, PT_R10;                                        \
+        lwi     r11, r1, PT_R11;        /* restore clobbered regs after rval */\
+        lwi     r12, r1, PT_R12;                                        \
+        lwi     r13, r1, PT_R13;        /* restore SDA2 */              \
+        lwi     r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
+        lwi     r15, r1, PT_R15;        /* restore LP */                \
+        lwi     r16, r1, PT_R16;                                        \
+        lwi     r17, r1, PT_R17;                                        \
+        lwi     r18, r1, PT_R18;        /* restore asm scratch reg */   \
+        lwi     r19, r1, PT_R19;                                        \
+        lwi     r20, r1, PT_R20;                                        \
+        lwi     r21, r1, PT_R21;                                        \
+        lwi     r22, r1, PT_R22;                                        \
+        lwi     r23, r1, PT_R23;                                        \
+        lwi     r24, r1, PT_R24;                                        \
+        lwi     r25, r1, PT_R25;                                        \
+        lwi     r26, r1, PT_R26;                                        \
+        lwi     r27, r1, PT_R27;                                        \
+        lwi     r28, r1, PT_R28;                                        \
+        lwi     r29, r1, PT_R29;                                        \
+        lwi     r30, r1, PT_R30;                                        \
+        lwi     r31, r1, PT_R31;        /* Restore cur task reg */
 
 #define SAVE_STATE      \
         swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */     \
@@ -246,11 +253,11 @@
         lwi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP));                      \
         /* FIXME: I can add these two lines to one */                   \
         /* tophys(r1,r1); */                                            \
-        /* addik        r1, r1, -STATE_SAVE_SIZE; */                    \
-        addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \
+        /* addik        r1, r1, -PT_SIZE; */                            \
+        addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
         SAVE_REGS                                                       \
         brid    2f;                                                     \
-        swi     r1, r1, PTO+PT_MODE;                                    \
+        swi     r1, r1, PT_MODE;                                        \
 1:      /* User-mode state save.  */                                    \
         lwi     r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
         tophys(r1,r1);                                                  \
@@ -258,12 +265,12 @@
         /* MS these three instructions can be added to one */           \
         /* addik        r1, r1, THREAD_SIZE; */                         \
         /* tophys(r1,r1); */                                            \
-        /* addik        r1, r1, -STATE_SAVE_SIZE; */                    \
-        addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \
+        /* addik        r1, r1, -PT_SIZE; */                    \
+        addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
         SAVE_REGS                                                       \
         lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));                     \
-        swi     r11, r1, PTO+PT_R1; /* Store user SP.  */               \
-        swi     r0, r1, PTO + PT_MODE; /* Was in user-mode.  */         \
+        swi     r11, r1, PT_R1; /* Store user SP.  */           \
+        swi     r0, r1, PT_MODE; /* Was in user-mode.  */               \
         /* MS: I am clearing UMS even in case when I come from kernel space */ \
         clear_ums;                                                      \
 2:      lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
@@ -283,25 +290,46 @@
  * are masked. This is nice, means we don't have to CLI before state save
  */
 C_ENTRY(_user_exception):
-        addi    r14, r14, 4     /* return address is 4 byte after call */
         swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
+        addi    r14, r14, 4     /* return address is 4 byte after call */
+
+        mfs     r1, rmsr
+        nop
+        andi    r1, r1, MSR_UMS
+        bnei    r1, 1f
 
+/* Kernel-mode state save - kernel execve */
+        lwi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
+        tophys(r1,r1);
+
+        addik   r1, r1, -PT_SIZE; /* Make room on the stack. */
+        SAVE_REGS
+
+        swi     r1, r1, PT_MODE; /* pt_regs -> kernel mode */
+        brid    2f;
+        nop;                            /* Fill delay slot */
+
+/* User-mode state save.  */
+1:
         lwi     r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
         tophys(r1,r1);
         lwi     r1, r1, TS_THREAD_INFO; /* get stack from task_struct */
-        /* MS these three instructions can be added to one */
-        /* addik        r1, r1, THREAD_SIZE; */
-        /* tophys(r1,r1); */
-        /* addik        r1, r1, -STATE_SAVE_SIZE; */
-        addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE;
+/* calculate kernel stack pointer from task struct 8k */
+        addik   r1, r1, THREAD_SIZE;
+        tophys(r1,r1);
+
+        addik   r1, r1, -PT_SIZE; /* Make room on the stack.  */
         SAVE_REGS
+        swi     r0, r1, PT_R3
+        swi     r0, r1, PT_R4
 
+        swi     r0, r1, PT_MODE;                        /* Was in user-mode. */
         lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
-        swi     r11, r1, PTO+PT_R1;             /* Store user SP.  */
+        swi     r11, r1, PT_R1;         /* Store user SP.  */
         clear_ums;
-        lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
+2:      lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
         /* Save away the syscall number.  */
-        swi     r12, r1, PTO+PT_R0;
+        swi     r12, r1, PT_R0;
         tovirt(r1,r1)
 
 /* where the trap should return need -8 to adjust for rtsd r15, 8*/
@@ -320,18 +348,18 @@ C_ENTRY(_user_exception):
         beqi    r11, 4f
 
         addik   r3, r0, -ENOSYS
-        swi     r3, r1, PTO + PT_R3
+        swi     r3, r1, PT_R3
         brlid   r15, do_syscall_trace_enter
-        addik   r5, r1, PTO + PT_R0
+        addik   r5, r1, PT_R0
 
         # do_syscall_trace_enter returns the new syscall nr.
         addk    r12, r0, r3
-        lwi     r5, r1, PTO+PT_R5;
-        lwi     r6, r1, PTO+PT_R6;
-        lwi     r7, r1, PTO+PT_R7;
-        lwi     r8, r1, PTO+PT_R8;
-        lwi     r9, r1, PTO+PT_R9;
-        lwi     r10, r1, PTO+PT_R10;
+        lwi     r5, r1, PT_R5;
+        lwi     r6, r1, PT_R6;
+        lwi     r7, r1, PT_R7;
+        lwi     r8, r1, PT_R8;
+        lwi     r9, r1, PT_R9;
+        lwi     r10, r1, PT_R10;
 4:
 /* Jump to the appropriate function for the system call number in r12
  * (r12 is not preserved), or return an error if r12 is not valid.
@@ -346,10 +374,14 @@ C_ENTRY(_user_exception):
         add     r12, r12, r12;
 
 #ifdef DEBUG
-        /* Trac syscalls and stored them to r0_ram */
-        lwi     r3, r12, 0x400 + r0_ram
+        /* Trac syscalls and stored them to syscall_debug_table */
+        /* The first syscall location stores total syscall number */
+        lwi     r3, r0, syscall_debug_table
+        addi    r3, r3, 1
+        swi     r3, r0, syscall_debug_table
+        lwi     r3, r12, syscall_debug_table
         addi    r3, r3, 1
-        swi     r3, r12, 0x400 + r0_ram
+        swi     r3, r12, syscall_debug_table
 #endif
 
         # Find and jump into the syscall handler.
@@ -366,9 +398,12 @@ C_ENTRY(_user_exception):
 /* Entry point used to return from a syscall/trap */
 /* We re-enable BIP bit before state restore */
 C_ENTRY(ret_from_trap):
-        swi     r3, r1, PTO + PT_R3
-        swi     r4, r1, PTO + PT_R4
+        swi     r3, r1, PT_R3
+        swi     r4, r1, PT_R4
 
+        lwi     r11, r1, PT_MODE;
+/* See if returning to kernel mode, if so, skip resched &c.  */
+        bnei    r11, 2f;
         /* We're returning to user mode, so check for various conditions that
          * trigger rescheduling. */
         /* FIXME: Restructure all these flag checks. */
@@ -378,7 +413,7 @@ C_ENTRY(ret_from_trap):
         beqi    r11, 1f
 
         brlid   r15, do_syscall_trace_leave
-        addik   r5, r1, PTO + PT_R0
+        addik   r5, r1, PT_R0
 1:
         /* We're returning to user mode, so check for various conditions that
          * trigger rescheduling. */
@@ -398,7 +433,7 @@ C_ENTRY(ret_from_trap):
         andi    r11, r11, _TIF_SIGPENDING;
         beqi    r11, 1f;                /* Signals to handle, handle them */
 
-        addik   r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
+        addik   r5, r1, 0;              /* Arg 1: struct pt_regs *regs */
         addi    r7, r0, 1;              /* Arg 3: int in_syscall */
         bralid  r15, do_signal; /* Handle any signals */
         add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
@@ -409,8 +444,18 @@ C_ENTRY(ret_from_trap):
         VM_OFF;
         tophys(r1,r1);
         RESTORE_REGS;
-        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+        addik   r1, r1, PT_SIZE         /* Clean up stack space.  */
         lwi     r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
+        bri     6f;
+
+/* Return to kernel state.  */
+2:      set_bip;                        /*  Ints masked for state restore */
+        VM_OFF;
+        tophys(r1,r1);
+        RESTORE_REGS;
+        addik   r1, r1, PT_SIZE         /* Clean up stack space.  */
+        tovirt(r1,r1);
+6:
 TRAP_return:            /* Make global symbol for debugging */
         rtbd    r14, 0; /* Instructions to return from an IRQ */
         nop;
@@ -421,8 +466,8 @@ TRAP_return:		/* Make global symbol for debugging */
 
 C_ENTRY(sys_fork_wrapper):
         addi    r5, r0, SIGCHLD                 /* Arg 0: flags */
-        lwi     r6, r1, PTO+PT_R1       /* Arg 1: child SP (use parent's) */
-        addik   r7, r1, PTO                     /* Arg 2: parent context */
+        lwi     r6, r1, PT_R1   /* Arg 1: child SP (use parent's) */
+        addik   r7, r1, 0                       /* Arg 2: parent context */
         add     r8. r0, r0                      /* Arg 3: (unused) */
         add     r9, r0, r0;                     /* Arg 4: (unused) */
         brid    do_fork         /* Do real work (tail-call) */
@@ -442,12 +487,12 @@ C_ENTRY(ret_from_fork):
 
 C_ENTRY(sys_vfork):
         brid    microblaze_vfork        /* Do real work (tail-call) */
-        addik   r5, r1, PTO
+        addik   r5, r1, 0
 
 C_ENTRY(sys_clone):
         bnei    r6, 1f;                 /* See if child SP arg (arg 1) is 0. */
-        lwi     r6, r1, PTO + PT_R1;    /* If so, use paret's stack ptr */
-1:      addik   r7, r1, PTO;                    /* Arg 2: parent context */
+        lwi     r6, r1, PT_R1;  /* If so, use paret's stack ptr */
+1:      addik   r7, r1, 0;                      /* Arg 2: parent context */
         add     r8, r0, r0;                     /* Arg 3: (unused) */
         add     r9, r0, r0;                     /* Arg 4: (unused) */
         brid    do_fork         /* Do real work (tail-call) */
@@ -455,17 +500,11 @@ C_ENTRY(sys_clone):
 
 C_ENTRY(sys_execve):
         brid    microblaze_execve;      /* Do real work (tail-call).*/
-        addik   r8, r1, PTO;            /* add user context as 4th arg */
+        addik   r8, r1, 0;              /* add user context as 4th arg */
 
 C_ENTRY(sys_rt_sigreturn_wrapper):
-        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
-        swi     r4, r1, PTO+PT_R4;
-        brlid   r15, sys_rt_sigreturn   /* Do real work */
-        addik   r5, r1, PTO;            /* add user context as 1st arg */
-        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
-        lwi     r4, r1, PTO+PT_R4;
-        bri ret_from_trap /* fall through will not work here due to align */
-        nop;
+        brid    sys_rt_sigreturn        /* Do real work */
+        addik   r5, r1, 0;              /* add user context as 1st arg */
 
 /*
  * HW EXCEPTION rutine start
@@ -476,7 +515,7 @@ C_ENTRY(full_exception_trap):
         addik   r17, r17, -4
         SAVE_STATE /* Save registers */
         /* PC, before IRQ/trap - this is one instruction above */
-        swi     r17, r1, PTO+PT_PC;
+        swi     r17, r1, PT_PC;
         tovirt(r1,r1)
         /* FIXME this can be store directly in PT_ESR reg.
          * I tested it but there is a fault */
@@ -486,7 +525,7 @@ C_ENTRY(full_exception_trap):
         mfs     r7, rfsr;               /* save FSR */
         mts     rfsr, r0;       /* Clear sticky fsr */
         rted    r0, full_exception
-        addik   r5, r1, PTO              /* parameter struct pt_regs * regs */
+        addik   r5, r1, 0                /* parameter struct pt_regs * regs */
 
 /*
  * Unaligned data trap.
@@ -512,14 +551,14 @@ C_ENTRY(unaligned_data_trap):
         lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
         SAVE_STATE              /* Save registers.*/
         /* PC, before IRQ/trap - this is one instruction above */
-        swi     r17, r1, PTO+PT_PC;
+        swi     r17, r1, PT_PC;
         tovirt(r1,r1)
         /* where the trap should return need -8 to adjust for rtsd r15, 8 */
         addik   r15, r0, ret_from_exc-8
         mfs     r3, resr                /* ESR */
         mfs     r4, rear                /* EAR */
         rtbd    r0, _unaligned_data_exception
-        addik   r7, r1, PTO             /* parameter struct pt_regs * regs */
+        addik   r7, r1, 0               /* parameter struct pt_regs * regs */
 
 /*
  * Page fault traps.
@@ -542,30 +581,30 @@ C_ENTRY(unaligned_data_trap):
 C_ENTRY(page_fault_data_trap):
         SAVE_STATE              /* Save registers.*/
         /* PC, before IRQ/trap - this is one instruction above */
-        swi     r17, r1, PTO+PT_PC;
+        swi     r17, r1, PT_PC;
         tovirt(r1,r1)
         /* where the trap should return need -8 to adjust for rtsd r15, 8 */
         addik   r15, r0, ret_from_exc-8
         mfs     r6, rear                /* parameter unsigned long address */
         mfs     r7, resr                /* parameter unsigned long error_code */
         rted    r0, do_page_fault
-        addik   r5, r1, PTO             /* parameter struct pt_regs * regs */
+        addik   r5, r1, 0               /* parameter struct pt_regs * regs */
 
 C_ENTRY(page_fault_instr_trap):
         SAVE_STATE              /* Save registers.*/
         /* PC, before IRQ/trap - this is one instruction above */
-        swi     r17, r1, PTO+PT_PC;
+        swi     r17, r1, PT_PC;
         tovirt(r1,r1)
         /* where the trap should return need -8 to adjust for rtsd r15, 8 */
         addik   r15, r0, ret_from_exc-8
         mfs     r6, rear                /* parameter unsigned long address */
         ori     r7, r0, 0               /* parameter unsigned long error_code */
         rted    r0, do_page_fault
-        addik   r5, r1, PTO             /* parameter struct pt_regs * regs */
+        addik   r5, r1, 0               /* parameter struct pt_regs * regs */
 
 /* Entry point used to return from an exception.  */
 C_ENTRY(ret_from_exc):
-        lwi     r11, r1, PTO + PT_MODE;
+        lwi     r11, r1, PT_MODE;
         bnei    r11, 2f;                /* See if returning to kernel mode, */
                                         /* ... if so, skip resched &c.  */
 
@@ -597,7 +636,7 @@ C_ENTRY(ret_from_exc):
          * complete register state.  Here we save anything not saved by
          * the normal entry sequence, so that it may be safely restored
          * (in a possibly modified form) after do_signal returns. */
-        addik   r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
+        addik   r5, r1, 0;              /* Arg 1: struct pt_regs *regs */
         addi    r7, r0, 0;              /* Arg 3: int in_syscall */
         bralid  r15, do_signal; /* Handle any signals */
         add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
@@ -609,7 +648,7 @@ C_ENTRY(ret_from_exc):
         tophys(r1,r1);
 
         RESTORE_REGS;
-        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+        addik   r1, r1, PT_SIZE         /* Clean up stack space.  */
 
         lwi     r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
         bri     6f;
@@ -618,7 +657,7 @@ C_ENTRY(ret_from_exc):
         VM_OFF;
         tophys(r1,r1);
         RESTORE_REGS;
-        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+        addik   r1, r1, PT_SIZE         /* Clean up stack space.  */
 
         tovirt(r1,r1);
 6:
@@ -651,10 +690,10 @@ C_ENTRY(_interrupt):
         tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
         /* save registers */
 /* MS: Make room on the stack -> activation record */
-        addik   r1, r1, -STATE_SAVE_SIZE;
+        addik   r1, r1, -PT_SIZE;
         SAVE_REGS
         brid    2f;
-        swi     r1, r1, PTO + PT_MODE; /* 0 - user mode, 1 - kernel mode */
+        swi     r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */
 1:
 /* User-mode state save. */
  /* MS: get the saved current */
@@ -664,23 +703,23 @@ C_ENTRY(_interrupt):
         addik   r1, r1, THREAD_SIZE;
         tophys(r1,r1);
         /* save registers */
-        addik   r1, r1, -STATE_SAVE_SIZE;
+        addik   r1, r1, -PT_SIZE;
         SAVE_REGS
         /* calculate mode */
-        swi     r0, r1, PTO + PT_MODE;
+        swi     r0, r1, PT_MODE;
         lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
-        swi     r11, r1, PTO+PT_R1;
+        swi     r11, r1, PT_R1;
         clear_ums;
 2:
         lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
         tovirt(r1,r1)
         addik   r15, r0, irq_call;
 irq_call:rtbd   r0, do_IRQ;
-        addik   r5, r1, PTO;
+        addik   r5, r1, 0;
 
 /* MS: we are in virtual mode */
 ret_from_irq:
-        lwi     r11, r1, PTO + PT_MODE;
+        lwi     r11, r1, PT_MODE;
         bnei    r11, 2f;
 
         lwi     r11, CURRENT_TASK, TS_THREAD_INFO;
@@ -697,7 +736,7 @@ ret_from_irq:
         beqid   r11, no_intr_resched
 /* Handle a signal return; Pending signals should be in r18. */
         addi    r7, r0, 0; /* Arg 3: int in_syscall */
-        addik   r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
+        addik   r5, r1, 0; /* Arg 1: struct pt_regs *regs */
         bralid  r15, do_signal; /* Handle any signals */
         add     r6, r0, r0; /* Arg 2: sigset_t *oldset */
 
@@ -709,7 +748,7 @@ no_intr_resched:
         VM_OFF;
         tophys(r1,r1);
         RESTORE_REGS
-        addik   r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
+        addik   r1, r1, PT_SIZE /* MS: Clean up stack space. */
         lwi     r1, r1, PT_R1 - PT_SIZE;
         bri     6f;
 /* MS: Return to kernel state. */
@@ -737,7 +776,7 @@ restore:
         VM_OFF /* MS: turn off MMU */
         tophys(r1,r1)
         RESTORE_REGS
-        addik   r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
+        addik   r1, r1, PT_SIZE /* MS: Clean up stack space. */
         tovirt(r1,r1);
 6:
 IRQ_return: /* MS: Make global symbol for debugging */
@@ -760,31 +799,29 @@ C_ENTRY(_debug_exception):
         lwi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
 
         /* BIP bit is set on entry, no interrupts can occur */
-        addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE;
+        addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE;
         SAVE_REGS;
         /* save all regs to pt_reg structure */
-        swi     r0, r1, PTO+PT_R0;      /* R0 must be saved too */
-        swi     r14, r1, PTO+PT_R14     /* rewrite saved R14 value */
-        swi     r16, r1, PTO+PT_R16
-        swi     r16, r1, PTO+PT_PC; /* PC and r16 are the same */
-        swi     r17, r1, PTO+PT_R17
+        swi     r0, r1, PT_R0;  /* R0 must be saved too */
+        swi     r14, r1, PT_R14 /* rewrite saved R14 value */
+        swi     r16, r1, PT_PC; /* PC and r16 are the same */
         /* save special purpose registers to pt_regs */
         mfs     r11, rear;
-        swi     r11, r1, PTO+PT_EAR;
+        swi     r11, r1, PT_EAR;
         mfs     r11, resr;
-        swi     r11, r1, PTO+PT_ESR;
+        swi     r11, r1, PT_ESR;
         mfs     r11, rfsr;
-        swi     r11, r1, PTO+PT_FSR;
+        swi     r11, r1, PT_FSR;
 
         /* stack pointer is in physical address at it is decrease
-         * by STATE_SAVE_SIZE but we need to get correct R1 value */
-        addik   r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + STATE_SAVE_SIZE;
-        swi     r11, r1, PTO+PT_R1
+         * by PT_SIZE but we need to get correct R1 value */
+        addik   r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE;
+        swi     r11, r1, PT_R1
         /* MS: r31 - current pointer isn't changed */
         tovirt(r1,r1)
 #ifdef CONFIG_KGDB
-        addi    r5, r1, PTO /* pass pt_reg address as the first arg */
-        la      r15, r0, dbtrap_call; /* return address */
+        addi    r5, r1, 0 /* pass pt_reg address as the first arg */
+        addik   r15, r0, dbtrap_call; /* return address */
         rtbd    r0, microblaze_kgdb_break
         nop;
 #endif
@@ -799,18 +836,16 @@ C_ENTRY(_debug_exception):
         addik   r1, r1, THREAD_SIZE;    /* calculate kernel stack pointer */
         tophys(r1,r1);
 
-        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */
+        addik   r1, r1, -PT_SIZE; /* Make room on the stack.  */
         SAVE_REGS;
-        swi     r17, r1, PTO+PT_R17;
-        swi     r16, r1, PTO+PT_R16;
-        swi     r16, r1, PTO+PT_PC;     /* Save LP */
-        swi     r0, r1, PTO + PT_MODE; /* Was in user-mode.  */
+        swi     r16, r1, PT_PC; /* Save LP */
+        swi     r0, r1, PT_MODE; /* Was in user-mode.  */
         lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
-        swi     r11, r1, PTO+PT_R1; /* Store user SP.  */
+        swi     r11, r1, PT_R1; /* Store user SP.  */
         lwi     CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
         tovirt(r1,r1)
         set_vms;
-        addik   r5, r1, PTO;
+        addik   r5, r1, 0;
         addik   r15, r0, dbtrap_call;
 dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
         rtbd    r0, sw_exception
@@ -818,7 +853,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
 
         /* MS: The first instruction for the second part of the gdb/kgdb */
         set_bip; /* Ints masked for state restore */
-        lwi     r11, r1, PTO + PT_MODE;
+        lwi     r11, r1, PT_MODE;
         bnei    r11, 2f;
 /* MS: Return to user space - gdb */
         /* Get current task ptr into r11 */
@@ -837,7 +872,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
         andi    r11, r11, _TIF_SIGPENDING;
         beqi    r11, 1f;                /* Signals to handle, handle them */
 
-        addik   r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
+        addik   r5, r1, 0;              /* Arg 1: struct pt_regs *regs */
         addi  r7, r0, 0;        /* Arg 3: int in_syscall */
         bralid  r15, do_signal; /* Handle any signals */
         add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
@@ -848,9 +883,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
         tophys(r1,r1);
         /* MS: Restore all regs */
         RESTORE_REGS
-        lwi     r17, r1, PTO+PT_R17;
-        lwi     r16, r1, PTO+PT_R16;
-        addik   r1, r1, STATE_SAVE_SIZE  /* Clean up stack space */
+        addik   r1, r1, PT_SIZE  /* Clean up stack space */
         lwi     r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */
 DBTRAP_return_user: /* MS: Make global symbol for debugging */
         rtbd    r16, 0; /* MS: Instructions to return from a debug trap */
@@ -861,10 +894,9 @@ DBTRAP_return_user: /* MS: Make global symbol for debugging */
         tophys(r1,r1);
         /* MS: Restore all regs */
         RESTORE_REGS
-        lwi     r14, r1, PTO+PT_R14;
-        lwi     r16, r1, PTO+PT_PC;
-        lwi     r17, r1, PTO+PT_R17;
-        addik   r1, r1, STATE_SAVE_SIZE; /* MS: Clean up stack space */
+        lwi     r14, r1, PT_R14;
+        lwi     r16, r1, PT_PC;
+        addik   r1, r1, PT_SIZE; /* MS: Clean up stack space */
         tovirt(r1,r1);
 DBTRAP_return_kernel: /* MS: Make global symbol for debugging */
         rtbd    r16, 0; /* MS: Instructions to return from a debug trap */
@@ -956,20 +988,22 @@ ENTRY(_switch_to)
         nop
 
 ENTRY(_reset)
-        brai    0x70; /* Jump back to FS-boot */
+        brai    0; /* Jump to reset vector */
 
         /* These are compiled and loaded into high memory, then
          * copied into place in mach_early_setup */
         .section        .init.ivt, "ax"
+#if CONFIG_MANUAL_RESET_VECTOR
         .org    0x0
-        /* this is very important - here is the reset vector */
-        /* in current MMU branch you don't care what is here - it is
-         * used from bootloader site - but this is correct for FS-BOOT */
-        brai    0x70
-        nop
+        brai    CONFIG_MANUAL_RESET_VECTOR
+#endif
+        .org    0x8
         brai    TOPHYS(_user_exception); /* syscall handler */
+        .org    0x10
         brai    TOPHYS(_interrupt);     /* Interrupt handler */
+        .org    0x18
         brai    TOPHYS(_debug_exception);       /* debug trap handler */
+        .org    0x20
         brai    TOPHYS(_hw_exception_handler);  /* HW exception handler */
 
 .section .rodata,"a"
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c
index b98ee8d0c1cd..66fad2301221 100644
--- a/arch/microblaze/kernel/exceptions.c
+++ b/arch/microblaze/kernel/exceptions.c
@@ -25,6 +25,7 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <asm/current.h>
+#include <asm/cacheflush.h>
 
 #define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02
 #define MICROBLAZE_IBUS_EXCEPTION       0x03
@@ -49,9 +50,11 @@ void die(const char *str, struct pt_regs *fp, long err)
 }
 
 /* for user application debugging */
-void sw_exception(struct pt_regs *regs)
+asmlinkage void sw_exception(struct pt_regs *regs)
 {
         _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16);
+        flush_dcache_range(regs->r16, regs->r16 + 0x4);
+        flush_icache_range(regs->r16, regs->r16 + 0x4);
 }
 
 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
@@ -72,7 +75,6 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                                                         int fsr, int addr)
 {
 #ifdef CONFIG_MMU
-        int code;
         addr = regs->pc;
 #endif
 
@@ -86,8 +88,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
         switch (type & 0x1F) {
         case MICROBLAZE_ILL_OPCODE_EXCEPTION:
                 if (user_mode(regs)) {
-                        pr_debug(KERN_WARNING "Illegal opcode exception " \
-                                                        "in user mode.\n");
+                        pr_debug("Illegal opcode exception in user mode\n");
                         _exception(SIGILL, regs, ILL_ILLOPC, addr);
                         return;
                 }
@@ -97,8 +98,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                 break;
         case MICROBLAZE_IBUS_EXCEPTION:
                 if (user_mode(regs)) {
-                        pr_debug(KERN_WARNING "Instruction bus error " \
-                                                "exception in user mode.\n");
+                        pr_debug("Instruction bus error exception in user mode\n");
                         _exception(SIGBUS, regs, BUS_ADRERR, addr);
                         return;
                 }
@@ -108,8 +108,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                 break;
         case MICROBLAZE_DBUS_EXCEPTION:
                 if (user_mode(regs)) {
-                        pr_debug(KERN_WARNING "Data bus error exception " \
-                                                        "in user mode.\n");
+                        pr_debug("Data bus error exception in user mode\n");
                         _exception(SIGBUS, regs, BUS_ADRERR, addr);
                         return;
                 }
@@ -119,8 +118,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                 break;
         case MICROBLAZE_DIV_ZERO_EXCEPTION:
                 if (user_mode(regs)) {
-                        pr_debug(KERN_WARNING "Divide by zero exception " \
-                                                        "in user mode\n");
+                        pr_debug("Divide by zero exception in user mode\n");
                         _exception(SIGILL, regs, FPE_INTDIV, addr);
                         return;
                 }
@@ -129,7 +127,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                 die("Divide by zero exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_FPU_EXCEPTION:
-                pr_debug(KERN_WARNING "FPU exception\n");
+                pr_debug("FPU exception\n");
                 /* IEEE FP exception */
                 /* I removed fsr variable and use code var for storing fsr */
                 if (fsr & FSR_IO)
@@ -147,14 +145,8 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
 
 #ifdef CONFIG_MMU
         case MICROBLAZE_PRIVILEGED_EXCEPTION:
-                pr_debug(KERN_WARNING "Privileged exception\n");
-                /* "brk r0,r0" - used as debug breakpoint - old toolchain */
-                if (get_user(code, (unsigned long *)regs->pc) == 0
-                        && code == 0x980c0000) {
-                        _exception(SIGTRAP, regs, TRAP_BRKPT, addr);
-                } else {
-                        _exception(SIGILL, regs, ILL_PRVOPC, addr);
-                }
+                pr_debug("Privileged exception\n");
+                _exception(SIGILL, regs, ILL_PRVOPC, addr);
                 break;
 #endif
         default:
diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c
index 515feb404555..357d56abe24a 100644
--- a/arch/microblaze/kernel/ftrace.c
+++ b/arch/microblaze/kernel/ftrace.c
@@ -51,6 +51,9 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
                         : "r" (parent), "r" (return_hooker)
         );
 
+        flush_dcache_range((u32)parent, (u32)parent + 4);
+        flush_icache_range((u32)parent, (u32)parent + 4);
+
         if (unlikely(faulted)) {
                 ftrace_graph_stop();
                 WARN_ON(1);
@@ -95,6 +98,9 @@ static int ftrace_modify_code(unsigned long addr, unsigned int value)
         if (unlikely(faulted))
                 return -EFAULT;
 
+        flush_dcache_range(addr, addr + 4);
+        flush_icache_range(addr, addr + 4);
+
         return 0;
 }
 
@@ -195,8 +201,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
         ret += ftrace_modify_code((unsigned long)&ftrace_caller,
                                   MICROBLAZE_NOP);
 
-        /* All changes are done - lets do caches consistent */
-        flush_icache();
         return ret;
 }
 
@@ -210,7 +214,6 @@ int ftrace_enable_ftrace_graph_caller(void)
 
         old_jump = *(unsigned int *)ip; /* save jump over instruction */
         ret = ftrace_modify_code(ip, MICROBLAZE_NOP);
-        flush_icache();
 
         pr_debug("%s: Replace instruction: 0x%x\n", __func__, old_jump);
         return ret;
@@ -222,7 +225,6 @@ int ftrace_disable_ftrace_graph_caller(void)
         unsigned long ip = (unsigned long)(&ftrace_call_graph);
 
         ret = ftrace_modify_code(ip, old_jump);
-        flush_icache();
 
         pr_debug("%s\n", __func__);
         return ret;
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 42434008209e..77320b8fc16a 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -39,7 +39,7 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 
-.data
+.section .data
 .global empty_zero_page
 .align 12
 empty_zero_page:
@@ -50,6 +50,11 @@ swapper_pg_dir:
 
 #endif /* CONFIG_MMU */
 
+.section .rodata
+.align 4
+endian_check:
+        .word   1
+
         __HEAD
 ENTRY(_start)
 #if CONFIG_KERNEL_BASE_ADDR == 0
@@ -62,23 +67,29 @@ real_start:
         andi    r1, r1, ~2
         mts     rmsr, r1
 /*
- * Here is checking mechanism which check if Microblaze has msr instructions
- * We load msr and compare it with previous r1 value - if is the same,
- * msr instructions works if not - cpu don't have them.
+ * According to Xilinx, msrclr instruction behaves like 'mfs rX,rpc'
+ * if the msrclr instruction is not enabled. We use this to detect
+ * if the opcode is available, by issuing msrclr and then testing the result.
+ * r8 == 0 - msr instructions are implemented
+ * r8 != 0 - msr instructions are not implemented
  */
-        /* r8=0 - I have msr instr, 1 - I don't have them */
-        rsubi   r0, r0, 1       /* set the carry bit */
-        msrclr  r0, 0x4         /* try to clear it */
-        /* read the carry bit, r8 will be '0' if msrclr exists */
-        addik   r8, r0, 0
+        msrclr  r8, 0 /* clear nothing - just read msr for test */
+        cmpu    r8, r8, r1 /* r1 must contain msr reg content */
 
 /* r7 may point to an FDT, or there may be one linked in.
    if it's in r7, we've got to save it away ASAP.
    We ensure r7 points to a valid FDT, just in case the bootloader
    is broken or non-existent */
         beqi    r7, no_fdt_arg                  /* NULL pointer?  don't copy */
-        lw      r11, r0, r7                     /* Does r7 point to a */
-        rsubi   r11, r11, OF_DT_HEADER          /* valid FDT? */
+/* Does r7 point to a valid FDT? Load HEADER magic number */
+        /* Run time Big/Little endian platform */
+        /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
+        lbui    r11, r0, TOPHYS(endian_check)
+        beqid   r11, big_endian /* DO NOT break delay stop dependency */
+        lw      r11, r0, r7 /* Big endian load in delay slot */
+        lwr     r11, r0, r7 /* Little endian load */
+big_endian:
+        rsubi   r11, r11, OF_DT_HEADER  /* Check FDT header */
         beqi    r11, _prepare_copy_fdt
         or      r7, r0, r0              /* clear R7 when not valid DTB */
         bnei    r11, no_fdt_arg                 /* No - get out of here */
@@ -213,26 +224,26 @@ start_here:
 #endif /* CONFIG_MMU */
 
         /* Initialize small data anchors */
-        la      r13, r0, _KERNEL_SDA_BASE_
-        la      r2, r0, _KERNEL_SDA2_BASE_
+        addik   r13, r0, _KERNEL_SDA_BASE_
+        addik   r2, r0, _KERNEL_SDA2_BASE_
 
         /* Initialize stack pointer */
-        la      r1, r0, init_thread_union + THREAD_SIZE - 4
+        addik   r1, r0, init_thread_union + THREAD_SIZE - 4
 
         /* Initialize r31 with current task address */
-        la      r31, r0, init_task
+        addik   r31, r0, init_task
 
         /*
          * Call platform dependent initialize function.
          * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
          * the function.
          */
-        la      r9, r0, machine_early_init
+        addik   r9, r0, machine_early_init
         brald   r15, r9
         nop
 
 #ifndef CONFIG_MMU
-        la      r15, r0, machine_halt
+        addik   r15, r0, machine_halt
         braid   start_kernel
         nop
 #else
diff --git a/arch/microblaze/kernel/heartbeat.c b/arch/microblaze/kernel/heartbeat.c
index 522751737cfa..154756f3c694 100644
--- a/arch/microblaze/kernel/heartbeat.c
+++ b/arch/microblaze/kernel/heartbeat.c
@@ -47,11 +47,10 @@ void setup_heartbeat(void)
         struct device_node *gpio = NULL;
         int *prop;
         int j;
-        char *gpio_list[] = {
-                                "xlnx,xps-gpio-1.00.a",
-                                "xlnx,opb-gpio-1.00.a",
-                                NULL
-                        };
+        const char * const gpio_list[] = {
+                "xlnx,xps-gpio-1.00.a",
+                NULL
+        };
 
         for (j = 0; gpio_list[j] != NULL; j++) {
                 gpio = of_find_compatible_node(NULL, NULL, gpio_list[j]);
@@ -60,7 +59,7 @@ void setup_heartbeat(void)
         }
 
         if (gpio) {
-                base_addr = *(int *) of_get_property(gpio, "reg", NULL);
+                base_addr = be32_to_cpup(of_get_property(gpio, "reg", NULL));
                 base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE);
                 printk(KERN_NOTICE "Heartbeat GPIO at 0x%x\n", base_addr);
 
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 781195438ee6..56572e923a83 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -77,6 +77,8 @@
 #include <asm/signal.h>
 #include <asm/asm-offsets.h>
 
+#undef DEBUG
+
 /* Helpful Macros */
 #define NUM_TO_REG(num)         r ## num
 
@@ -91,7 +93,7 @@
                 lwi     r6, r1, PT_R6;          \
                 lwi     r11, r1, PT_R11;        \
                 lwi     r31, r1, PT_R31;        \
-                lwi     r1, r0, TOPHYS(r0_ram + 0);
+                lwi     r1, r1, PT_R1;
 #endif /* CONFIG_MMU */
 
 #define LWREG_NOP                       \
@@ -147,10 +149,6 @@
         #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0
         #define BSRLI(rD, rA, imm)      \
                 bsrli rD, rA, imm
-        #elif CONFIG_XILINX_MICROBLAZE0_USE_DIV > 0
-        #define BSRLI(rD, rA, imm)      \
-                ori rD, r0, (1 << imm); \
-                idivu rD, rD, rA
         #else
         #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA)
         /* Only the used shift constants defined here - add more if needed */
@@ -210,8 +208,8 @@
  *      |      .      |
  *      |      .      |
  *
- * NO_MMU kernel use the same r0_ram pointed space - look to vmlinux.lds.S
- * which is used for storing register values - old style was, that value were
+ * MMU kernel uses the same 'pt_pool_space' pointed space
+ * which is used for storing register values - noMMu style was, that values were
  * stored in stack but in case of failure you lost information about register.
  * Currently you can see register value in memory in specific place.
  * In compare to with previous solution the speed should be the same.
@@ -230,8 +228,22 @@
  */
 
 /* wrappers to restore state before coming to entry.S */
-
 #ifdef CONFIG_MMU
+.section .data
+.align 4
+pt_pool_space:
+        .space  PT_SIZE
+
+#ifdef DEBUG
+/* Create space for exception counting. */
+.section .data
+.global exception_debug_table
+.align 4
+exception_debug_table:
+        /* Look at exception vector table. There is 32 exceptions * word size */
+        .space  (32 * 4)
+#endif /* DEBUG */
+
 .section .rodata
 .align 4
 _MB_HW_ExceptionVectorTable:
@@ -291,10 +303,10 @@ _hw_exception_handler:
 #ifndef CONFIG_MMU
         addik   r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */
 #else
-        swi     r1, r0, TOPHYS(r0_ram + 0); /* GET_SP */
+        swi     r1, r0, TOPHYS(pt_pool_space + PT_R1); /* GET_SP */
         /* Save date to kernel memory. Here is the problem
          * when you came from user space */
-        ori     r1, r0, TOPHYS(r0_ram + 28);
+        ori     r1, r0, TOPHYS(pt_pool_space);
 #endif
         swi     r3, r1, PT_R3
         swi     r4, r1, PT_R4
@@ -333,12 +345,12 @@ not_in_delay_slot:
 
 #ifdef DEBUG
 /* counting which exception happen */
-        lwi     r5, r0, 0x200 + TOPHYS(r0_ram)
+        lwi     r5, r0, TOPHYS(exception_debug_table)
         addi    r5, r5, 1
-        swi     r5, r0, 0x200 + TOPHYS(r0_ram)
-        lwi     r5, r6, 0x200 + TOPHYS(r0_ram)
+        swi     r5, r0, TOPHYS(exception_debug_table)
+        lwi     r5, r6, TOPHYS(exception_debug_table)
         addi    r5, r5, 1
-        swi     r5, r6, 0x200 + TOPHYS(r0_ram)
+        swi     r5, r6, TOPHYS(exception_debug_table)
 #endif
 /* end */
         /* Load the HW Exception vector */
@@ -478,7 +490,7 @@ ex_lw_tail:
         /* Get the destination register number into r5 */
         lbui    r5, r0, TOPHYS(ex_reg_op);
         /* Form load_word jump table offset (lw_table + (8 * regnum)) */
-        la      r6, r0, TOPHYS(lw_table);
+        addik   r6, r0, TOPHYS(lw_table);
         addk    r5, r5, r5;
         addk    r5, r5, r5;
         addk    r5, r5, r5;
@@ -489,7 +501,7 @@ ex_sw:
         /* Get the destination register number into r5 */
         lbui    r5, r0, TOPHYS(ex_reg_op);
         /* Form store_word jump table offset (sw_table + (8 * regnum)) */
-        la      r6, r0, TOPHYS(sw_table);
+        addik   r6, r0, TOPHYS(sw_table);
         add     r5, r5, r5;
         add     r5, r5, r5;
         add     r5, r5, r5;
@@ -900,7 +912,7 @@ ex_lw_vm:
         beqid   r6, ex_lhw_vm;
 load1:  lbui    r5, r4, 0;      /* Exception address in r4 - delay slot */
 /* Load a word, byte-by-byte from destination address and save it in tmp space*/
-        la      r6, r0, ex_tmp_data_loc_0;
+        addik   r6, r0, ex_tmp_data_loc_0;
         sbi     r5, r6, 0;
 load2:  lbui    r5, r4, 1;
         sbi     r5, r6, 1;
@@ -914,7 +926,7 @@ load4:	lbui	r5, r4, 3;
 ex_lhw_vm:
         /* Load a half-word, byte-by-byte from destination address and
          * save it in tmp space */
-        la      r6, r0, ex_tmp_data_loc_0;
+        addik   r6, r0, ex_tmp_data_loc_0;
         sbi     r5, r6, 0;
 load5:  lbui    r5, r4, 1;
         sbi     r5, r6, 1;
@@ -930,7 +942,7 @@ ex_sw_vm:
         addik   r5, r8, sw_table_vm;
         bra     r5;
 ex_sw_tail_vm:
-        la      r5, r0, ex_tmp_data_loc_0;
+        addik   r5, r0, ex_tmp_data_loc_0;
         beqid   r6, ex_shw_vm;
         swi     r3, r5, 0;      /* Get the word - delay slot */
         /* Store the word, byte-by-byte into destination address */
@@ -945,11 +957,20 @@ store3:	sbi	r3, r4, 2;
 store4: sbi     r3, r4, 3;      /* Delay slot */
 ex_shw_vm:
         /* Store the lower half-word, byte-by-byte into destination address */
+#ifdef __MICROBLAZEEL__
+        lbui    r3, r5, 0;
+store5: sbi     r3, r4, 0;
+        lbui    r3, r5, 1;
+        brid    ret_from_exc;
+store6: sbi     r3, r4, 1;      /* Delay slot */
+#else
         lbui    r3, r5, 2;
 store5: sbi     r3, r4, 0;
         lbui    r3, r5, 3;
         brid    ret_from_exc;
 store6: sbi     r3, r4, 1;      /* Delay slot */
+#endif
+
 ex_sw_end_vm:                   /* Exception handling of store word, ends. */
 
 /* We have to prevent cases that get/put_user macros get unaligned pointer
@@ -964,7 +985,7 @@ ex_unaligned_fixup:
         addik   r7, r0, SIGSEGV
         /* call bad_page_fault for finding aligned fixup, fixup address is saved
          * in PT_PC which is used as return address from exception */
-        la      r15, r0, ret_from_exc-8 /* setup return address */
+        addik   r15, r0, ret_from_exc-8 /* setup return address */
         brid    bad_page_fault
         nop
 
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index 03172c1da770..c88f066f41bd 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -40,59 +40,46 @@ unsigned int nr_irq;
 #define MER_ME (1<<0)
 #define MER_HIE (1<<1)
 
-static void intc_enable_or_unmask(unsigned int irq)
+static void intc_enable_or_unmask(struct irq_data *d)
 {
-        unsigned long mask = 1 << irq;
-        pr_debug("enable_or_unmask: %d\n", irq);
+        unsigned long mask = 1 << d->irq;
+        pr_debug("enable_or_unmask: %d\n", d->irq);
         out_be32(INTC_BASE + SIE, mask);
 
         /* ack level irqs because they can't be acked during
          * ack function since the handle_level_irq function
          * acks the irq before calling the interrupt handler
          */
-        if (irq_desc[irq].status & IRQ_LEVEL)
+        if (irqd_is_level_type(d))
                 out_be32(INTC_BASE + IAR, mask);
 }
 
-static void intc_disable_or_mask(unsigned int irq)
+static void intc_disable_or_mask(struct irq_data *d)
 {
-        pr_debug("disable: %d\n", irq);
-        out_be32(INTC_BASE + CIE, 1 << irq);
+        pr_debug("disable: %d\n", d->irq);
+        out_be32(INTC_BASE + CIE, 1 << d->irq);
 }
 
-static void intc_ack(unsigned int irq)
+static void intc_ack(struct irq_data *d)
 {
-        pr_debug("ack: %d\n", irq);
-        out_be32(INTC_BASE + IAR, 1 << irq);
+        pr_debug("ack: %d\n", d->irq);
+        out_be32(INTC_BASE + IAR, 1 << d->irq);
 }
 
-static void intc_mask_ack(unsigned int irq)
+static void intc_mask_ack(struct irq_data *d)
 {
-        unsigned long mask = 1 << irq;
-        pr_debug("disable_and_ack: %d\n", irq);
+        unsigned long mask = 1 << d->irq;
+        pr_debug("disable_and_ack: %d\n", d->irq);
         out_be32(INTC_BASE + CIE, mask);
         out_be32(INTC_BASE + IAR, mask);
 }
 
-static void intc_end(unsigned int irq)
-{
-        unsigned long mask = 1 << irq;
-        pr_debug("end: %d\n", irq);
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                out_be32(INTC_BASE + SIE, mask);
-                /* ack level sensitive intr */
-                if (irq_desc[irq].status & IRQ_LEVEL)
-                        out_be32(INTC_BASE + IAR, mask);
-        }
-}
-
 static struct irq_chip intc_dev = {
         .name = "Xilinx INTC",
-        .unmask = intc_enable_or_unmask,
-        .mask = intc_disable_or_mask,
-        .ack = intc_ack,
-        .mask_ack = intc_mask_ack,
-        .end = intc_end,
+        .irq_unmask = intc_enable_or_unmask,
+        .irq_mask = intc_disable_or_mask,
+        .irq_ack = intc_ack,
+        .irq_mask_ack = intc_mask_ack,
 };
 
 unsigned int get_irq(struct pt_regs *regs)
@@ -126,11 +113,8 @@ void __init init_IRQ(void)
                                 0
                         };
 #endif
-        static char *intc_list[] = {
+        const char * const intc_list[] = {
                                 "xlnx,xps-intc-1.00.a",
-                                "xlnx,opb-intc-1.00.c",
-                                "xlnx,opb-intc-1.00.b",
-                                "xlnx,opb-intc-1.00.a",
                                 NULL
                         };
 
@@ -141,12 +125,15 @@ void __init init_IRQ(void)
         }
         BUG_ON(!intc);
 
-        intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL);
+        intc_baseaddr = be32_to_cpup(of_get_property(intc,
+                                                                "reg", NULL));
         intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE);
-        nr_irq = *(int *) of_get_property(intc, "xlnx,num-intr-inputs", NULL);
+        nr_irq = be32_to_cpup(of_get_property(intc,
+                                                "xlnx,num-intr-inputs", NULL));
 
         intr_type =
-                *(int *) of_get_property(intc, "xlnx,kind-of-intr", NULL);
+                be32_to_cpup(of_get_property(intc,
+                                                "xlnx,kind-of-intr", NULL));
         if (intr_type >= (1 << (nr_irq + 1)))
                 printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n");
 
@@ -170,13 +157,13 @@ void __init init_IRQ(void)
 
         for (i = 0; i < nr_irq; ++i) {
                 if (intr_type & (0x00000001 << i)) {
-                        set_irq_chip_and_handler_name(i, &intc_dev,
-                                handle_edge_irq, intc_dev.name);
-                        irq_desc[i].status &= ~IRQ_LEVEL;
+                        irq_set_chip_and_handler_name(i, &intc_dev,
+                                handle_edge_irq, "edge");
+                        irq_clear_status_flags(i, IRQ_LEVEL);
                 } else {
-                        set_irq_chip_and_handler_name(i, &intc_dev,
-                                handle_level_irq, intc_dev.name);
-                        irq_desc[i].status |= IRQ_LEVEL;
+                        irq_set_chip_and_handler_name(i, &intc_dev,
+                                handle_level_irq, "level");
+                        irq_set_status_flags(i, IRQ_LEVEL);
                 }
         }
 }
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index a9345fb4906a..ce7ac8435d5c 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -47,46 +47,6 @@ next_irq:
         trace_hardirqs_on();
 }
 
-int show_interrupts(struct seq_file *p, void *v)
-{
-        int i = *(loff_t *) v, j;
-        struct irqaction *action;
-        unsigned long flags;
-
-        if (i == 0) {
-                seq_printf(p, "         ");
-                for_each_online_cpu(j)
-                        seq_printf(p, "CPU%-8d", j);
-                seq_putc(p, '\n');
-        }
-
-        if (i < nr_irq) {
-                raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
-                action = irq_desc[i].action;
-                if (!action)
-                        goto skip;
-                seq_printf(p, "%3d: ", i);
-#ifndef CONFIG_SMP
-                seq_printf(p, "%10u ", kstat_irqs(i));
-#else
-                for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
-#endif
-                seq_printf(p, " %8s", irq_desc[i].status &
-                                        IRQ_LEVEL ? "level" : "edge");
-                seq_printf(p, " %8s", irq_desc[i].chip->name);
-                seq_printf(p, "  %s", action->name);
-
-                for (action = action->next; action; action = action->next)
-                        seq_printf(p, ", %s", action->name);
-
-                seq_putc(p, '\n');
-skip:
-                raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
-        }
-        return 0;
-}
-
 /* MS: There is no any advance mapping mechanism. We are using simple 32bit
   intc without any cascades or any connection that's why mapping is 1:1 */
 unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq)
diff --git a/arch/microblaze/kernel/kgdb.c b/arch/microblaze/kernel/kgdb.c
index bfc006b7f2d8..09a5e8286137 100644
--- a/arch/microblaze/kernel/kgdb.c
+++ b/arch/microblaze/kernel/kgdb.c
@@ -80,7 +80,7 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 void microblaze_kgdb_break(struct pt_regs *regs)
 {
         if (kgdb_handle_exception(1, SIGTRAP, 0, regs) != 0)
-                return 0;
+                return;
 
         /* Jump over the first arch_kgdb_breakpoint which is barrier to
          * get kgdb work. The same solution is used for powerpc */
@@ -114,7 +114,6 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,
 {
         char *ptr;
         unsigned long address;
-        int cpu = smp_processor_id();
 
         switch (remcom_in_buffer[0]) {
         case 'c':
@@ -143,5 +142,9 @@ void kgdb_arch_exit(void)
  * Global data
  */
 struct kgdb_arch arch_kgdb_ops = {
+#ifdef __MICROBLAZEEL__
+        .gdb_bpt_instr = {0x18, 0x00, 0x0c, 0xba}, /* brki r16, 0x18 */
+#else
         .gdb_bpt_instr = {0xba, 0x0c, 0x00, 0x18}, /* brki r16, 0x18 */
+#endif
 };
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index ff85f7718035..49faeb429599 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -15,39 +15,16 @@
 #include <linux/syscalls.h>
 
 #include <asm/checksum.h>
+#include <asm/cacheflush.h>
 #include <linux/io.h>
 #include <asm/page.h>
 #include <asm/system.h>
 #include <linux/ftrace.h>
 #include <linux/uaccess.h>
 
-/*
- * libgcc functions - functions that are used internally by the
- * compiler... (prototypes are not correct though, but that
- * doesn't really matter since they're not versioned).
- */
-extern void __ashldi3(void);
-EXPORT_SYMBOL(__ashldi3);
-extern void __ashrdi3(void);
-EXPORT_SYMBOL(__ashrdi3);
-extern void __divsi3(void);
-EXPORT_SYMBOL(__divsi3);
-extern void __lshrdi3(void);
-EXPORT_SYMBOL(__lshrdi3);
-extern void __modsi3(void);
-EXPORT_SYMBOL(__modsi3);
-extern void __mulsi3(void);
-EXPORT_SYMBOL(__mulsi3);
-extern void __muldi3(void);
-EXPORT_SYMBOL(__muldi3);
-extern void __ucmpdi2(void);
-EXPORT_SYMBOL(__ucmpdi2);
-extern void __udivsi3(void);
-EXPORT_SYMBOL(__udivsi3);
-extern void __umodsi3(void);
-EXPORT_SYMBOL(__umodsi3);
 extern char *_ebss;
 EXPORT_SYMBOL_GPL(_ebss);
+
 #ifdef CONFIG_FUNCTION_TRACER
 extern void _mcount(void);
 EXPORT_SYMBOL(_mcount);
@@ -63,3 +40,20 @@ EXPORT_SYMBOL(__strncpy_user);
 EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(memmove);
 #endif
+
+#ifdef CONFIG_MMU
+EXPORT_SYMBOL(empty_zero_page);
+#endif
+
+EXPORT_SYMBOL(mbc);
+
+extern void __divsi3(void);
+EXPORT_SYMBOL(__divsi3);
+extern void __modsi3(void);
+EXPORT_SYMBOL(__modsi3);
+extern void __mulsi3(void);
+EXPORT_SYMBOL(__mulsi3);
+extern void __udivsi3(void);
+EXPORT_SYMBOL(__udivsi3);
+extern void __umodsi3(void);
+EXPORT_SYMBOL(__umodsi3);
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index ba7c4b16ed35..968648a81c1e 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -159,7 +159,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         }
 
         /* FIXME STATE_SAVE_PT_OFFSET; */
-        ti->cpu_context.r1  = (unsigned long)childregs - STATE_SAVE_ARG_SPACE;
+        ti->cpu_context.r1  = (unsigned long)childregs;
         /* we should consider the fact that childregs is a copy of the parent
          * regs which were saved immediately after entering the kernel state
          * before enabling VM. This MSR will be restored in switch_to and
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 427b13b4740f..b15cc219b1d9 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -42,19 +42,14 @@
 #include <asm/sections.h>
 #include <asm/pci-bridge.h>
 
-void __init early_init_dt_scan_chosen_arch(unsigned long node)
-{
-        /* No Microblaze specific code here */
-}
-
 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 {
         memblock_add(base, size);
 }
 
-u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 {
-        return memblock_alloc(size, align);
+        return __va(memblock_alloc(size, align));
 }
 
 #ifdef CONFIG_EARLY_PRINTK
@@ -64,24 +59,23 @@ static int __init early_init_dt_scan_serial(unsigned long node,
 {
         unsigned long l;
         char *p;
-        int *addr;
+        const __be32 *addr;
 
-        pr_debug("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
+        pr_debug("search \"serial\", depth: %d, uname: %s\n", depth, uname);
 
 /* find all serial nodes */
         if (strncmp(uname, "serial", 6) != 0)
                 return 0;
 
-        early_init_dt_check_for_initrd(node);
-
 /* find compatible node with uartlite */
         p = of_get_flat_dt_prop(node, "compatible", &l);
         if ((strncmp(p, "xlnx,xps-uartlite", 17) != 0) &&
-                        (strncmp(p, "xlnx,opb-uartlite", 17) != 0))
+                        (strncmp(p, "xlnx,opb-uartlite", 17) != 0) &&
+                        (strncmp(p, "xlnx,axi-uartlite", 17) != 0))
                 return 0;
 
         addr = of_get_flat_dt_prop(node, "reg", &l);
-        return *addr; /* return address */
+        return be32_to_cpup(addr); /* return address */
 }
 
 /* this function is looking for early uartlite console - Microblaze specific */
@@ -89,6 +83,40 @@ int __init early_uartlite_console(void)
 {
         return of_scan_flat_dt(early_init_dt_scan_serial, NULL);
 }
+
+/* MS this is Microblaze specifig function */
+static int __init early_init_dt_scan_serial_full(unsigned long node,
+                                const char *uname, int depth, void *data)
+{
+        unsigned long l;
+        char *p;
+        unsigned int addr;
+
+        pr_debug("search \"chosen\", depth: %d, uname: %s\n", depth, uname);
+
+/* find all serial nodes */
+        if (strncmp(uname, "serial", 6) != 0)
+                return 0;
+
+        early_init_dt_check_for_initrd(node);
+
+/* find compatible node with uartlite */
+        p = of_get_flat_dt_prop(node, "compatible", &l);
+
+        if ((strncmp(p, "xlnx,xps-uart16550", 18) != 0) &&
+                (strncmp(p, "xlnx,axi-uart16550", 18) != 0))
+                return 0;
+
+        addr = *(u32 *)of_get_flat_dt_prop(node, "reg", &l);
+        addr += *(u32 *)of_get_flat_dt_prop(node, "reg-offset", &l);
+        return be32_to_cpu(addr); /* return address */
+}
+
+/* this function is looking for early uartlite console - Microblaze specific */
+int __init early_uart16550_console(void)
+{
+        return of_scan_flat_dt(early_init_dt_scan_serial_full, NULL);
+}
 #endif
 
 void __init early_init_devtree(void *params)
@@ -102,7 +130,7 @@ void __init early_init_devtree(void *params)
          * device-tree, including the platform type, initrd location and
          * size, TCE reserve, and more ...
          */
-        of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
+        of_scan_flat_dt(early_init_dt_scan_chosen, cmd_line);
 
         /* Scan memory nodes and rebuild MEMBLOCKs */
         memblock_init();
diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
index 99d9b61cccb5..47187cc2cf00 100644
--- a/arch/microblaze/kernel/prom_parse.c
+++ b/arch/microblaze/kernel/prom_parse.c
@@ -2,88 +2,11 @@
 
 #include <linux/kernel.h>
 #include <linux/string.h>
-#include <linux/pci_regs.h>
 #include <linux/module.h>
 #include <linux/ioport.h>
 #include <linux/etherdevice.h>
 #include <linux/of_address.h>
 #include <asm/prom.h>
-#include <asm/pci-bridge.h>
-
-#ifdef CONFIG_PCI
-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
-{
-        struct device_node *dn, *ppnode;
-        struct pci_dev *ppdev;
-        u32 lspec;
-        u32 laddr[3];
-        u8 pin;
-        int rc;
-
-        /* Check if we have a device node, if yes, fallback to standard OF
-         * parsing
-         */
-        dn = pci_device_to_OF_node(pdev);
-        if (dn)
-                return of_irq_map_one(dn, 0, out_irq);
-
-        /* Ok, we don't, time to have fun. Let's start by building up an
-         * interrupt spec.  we assume #interrupt-cells is 1, which is standard
-         * for PCI. If you do different, then don't use that routine.
-         */
-        rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
-        if (rc != 0)
-                return rc;
-        /* No pin, exit */
-        if (pin == 0)
-                return -ENODEV;
-
-        /* Now we walk up the PCI tree */
-        lspec = pin;
-        for (;;) {
-                /* Get the pci_dev of our parent */
-                ppdev = pdev->bus->self;
-
-                /* Ouch, it's a host bridge... */
-                if (ppdev == NULL) {
-                        struct pci_controller *host;
-                        host = pci_bus_to_host(pdev->bus);
-                        ppnode = host ? host->dn : NULL;
-                        /* No node for host bridge ? give up */
-                        if (ppnode == NULL)
-                                return -EINVAL;
-                } else
-                        /* We found a P2P bridge, check if it has a node */
-                        ppnode = pci_device_to_OF_node(ppdev);
-
-                /* Ok, we have found a parent with a device-node, hand over to
-                 * the OF parsing code.
-                 * We build a unit address from the linux device to be used for
-                 * resolution. Note that we use the linux bus number which may
-                 * not match your firmware bus numbering.
-                 * Fortunately, in most cases, interrupt-map-mask doesn't
-                 * include the bus number as part of the matching.
-                 * You should still be careful about that though if you intend
-                 * to rely on this function (you ship  a firmware that doesn't
-                 * create device nodes for all PCI devices).
-                 */
-                if (ppnode)
-                        break;
-
-                /* We can only get here if we hit a P2P bridge with no node,
-                 * let's do standard swizzling and try again
-                 */
-                lspec = pci_swizzle_interrupt_pin(pdev, lspec);
-                pdev = ppdev;
-        }
-
-        laddr[0] = (pdev->bus->number << 16)
-                | (pdev->devfn << 8);
-        laddr[1]  = laddr[2] = 0;
-        return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
-}
-EXPORT_SYMBOL_GPL(of_irq_map_pci);
-#endif /* CONFIG_PCI */
 
 void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
                 unsigned long *busno, unsigned long *phys, unsigned long *size)
@@ -110,41 +33,3 @@ void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
         cells = prop ? *(u32 *)prop : of_n_size_cells(dn);
         *size = of_read_number(dma_window, cells);
 }
-
-/**
- * Search the device tree for the best MAC address to use.  'mac-address' is
- * checked first, because that is supposed to contain to "most recent" MAC
- * address. If that isn't set, then 'local-mac-address' is checked next,
- * because that is the default address.  If that isn't set, then the obsolete
- * 'address' is checked, just in case we're using an old device tree.
- *
- * Note that the 'address' property is supposed to contain a virtual address of
- * the register set, but some DTS files have redefined that property to be the
- * MAC address.
- *
- * All-zero MAC addresses are rejected, because those could be properties that
- * exist in the device tree, but were not set by U-Boot.  For example, the
- * DTS could define 'mac-address' and 'local-mac-address', with zero MAC
- * addresses.  Some older U-Boots only initialized 'local-mac-address'.  In
- * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
- * but is all zeros.
-*/
-const void *of_get_mac_address(struct device_node *np)
-{
-        struct property *pp;
-
-        pp = of_find_property(np, "mac-address", NULL);
-        if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
-                return pp->value;
-
-        pp = of_find_property(np, "local-mac-address", NULL);
-        if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
-                return pp->value;
-
-        pp = of_find_property(np, "address", NULL);
-        if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
-                return pp->value;
-
-        return NULL;
-}
-EXPORT_SYMBOL(of_get_mac_address);
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index dc03ffc8174a..6a8e0cc5c57d 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -39,6 +39,7 @@
 #include <linux/uaccess.h>
 #include <asm/asm-offsets.h>
 #include <asm/cacheflush.h>
+#include <asm/syscall.h>
 #include <asm/io.h>
 
 /* Returns the address where the register at REG_OFFS in P is stashed away. */
@@ -73,7 +74,8 @@ static microblaze_reg_t *reg_save_addr(unsigned reg_offs,
         return (microblaze_reg_t *)((char *)regs + reg_offs);
 }
 
-long arch_ptrace(struct task_struct *child, long request, long addr, long data)
+long arch_ptrace(struct task_struct *child, long request,
+                 unsigned long addr, unsigned long data)
 {
         int rval;
         unsigned long val = 0;
@@ -99,7 +101,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         } else {
                                 rval = -EIO;
                         }
-                } else if (addr >= 0 && addr < PT_SIZE && (addr & 0x3) == 0) {
+                } else if (addr < PT_SIZE && (addr & 0x3) == 0) {
                         microblaze_reg_t *reg_addr = reg_save_addr(addr, child);
                         if (request == PTRACE_PEEKUSR)
                                 val = *reg_addr;
@@ -122,7 +124,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         rval = -EIO;
 
                 if (rval == 0 && request == PTRACE_PEEKUSR)
-                        rval = put_user(val, (unsigned long *)data);
+                        rval = put_user(val, (unsigned long __user *)data);
                 break;
         default:
                 rval = ptrace_request(child, request, addr, data);
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index f5f768842354..8e2c09b7ff26 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -92,16 +92,11 @@ inline unsigned get_romfs_len(unsigned *addr)
 }
 #endif  /* CONFIG_MTD_UCLINUX_EBSS */
 
-#if defined(CONFIG_EARLY_PRINTK) && defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
-#define eprintk early_printk
-#else
-#define eprintk printk
-#endif
-
 void __init machine_early_init(const char *cmdline, unsigned int ram,
                 unsigned int fdt, unsigned int msr)
 {
-        unsigned long *src, *dst = (unsigned long *)0x0;
+        unsigned long *src, *dst;
+        unsigned int offset = 0;
 
         /* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the
          * end of kernel. There are two position which we want to check.
@@ -167,14 +162,21 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
         if (msr)
                 eprintk("!!!Your kernel has setup MSR instruction but "
-                                "CPU don't have it %d\n", msr);
+                                "CPU don't have it %x\n", msr);
 #else
         if (!msr)
                 eprintk("!!!Your kernel not setup MSR instruction but "
-                                "CPU have it %d\n", msr);
+                                "CPU have it %x\n", msr);
 #endif
 
-        for (src = __ivt_start; src < __ivt_end; src++, dst++)
+        /* Do not copy reset vectors. offset = 0x2 means skip the first
+         * two instructions. dst is pointer to MB vectors which are placed
+         * in block ram. If you want to copy reset vector setup offset to 0x0 */
+#if !CONFIG_MANUAL_RESET_VECTOR
+        offset = 0x2;
+#endif
+        dst = (unsigned long *) (offset * sizeof(u32));
+        for (src = __ivt_start + offset; src < __ivt_end; src++, dst++)
                 *dst = *src;
 
         /* Initialize global data */
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index d8d3bb396cd6..599671168980 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -93,7 +93,7 @@ static int restore_sigcontext(struct pt_regs *regs,
 asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
 {
         struct rt_sigframe __user *frame =
-                (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE);
+                (struct rt_sigframe __user *)(regs->r1);
 
         sigset_t set;
         int rval;
@@ -197,8 +197,8 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 
         /* Create the ucontext. */
         err |= __put_user(0, &frame->uc.uc_flags);
-        err |= __put_user(0, &frame->uc.uc_link);
-        err |= __put_user((void *)current->sas_ss_sp,
+        err |= __put_user(NULL, &frame->uc.uc_link);
+        err |= __put_user((void __user *)current->sas_ss_sp,
                         &frame->uc.uc_stack.ss_sp);
         err |= __put_user(sas_ss_flags(regs->r1),
                         &frame->uc.uc_stack.ss_flags);
@@ -247,7 +247,7 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                 goto give_sigsegv;
 
         /* Set up registers for signal handler */
-        regs->r1 = (unsigned long) frame - STATE_SAVE_ARG_SPACE;
+        regs->r1 = (unsigned long) frame;
 
         /* Signal handler args: */
         regs->r5 = signal; /* arg 0: signum */
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index 2250fe9d269b..e5b154f24f85 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -40,7 +40,8 @@ asmlinkage long microblaze_vfork(struct pt_regs *regs)
                                                 regs, 0, NULL, NULL);
 }
 
-asmlinkage long microblaze_clone(int flags, unsigned long stack, struct pt_regs *regs)
+asmlinkage long microblaze_clone(int flags, unsigned long stack,
+                                                        struct pt_regs *regs)
 {
         if (!stack)
                 stack = regs->r1;
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index 03376dc814c9..d915a122c865 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -372,3 +372,11 @@ ENTRY(sys_call_table)
         .long sys_rt_tgsigqueueinfo     /* 365 */
         .long sys_perf_event_open
         .long sys_recvmmsg
+        .long sys_fanotify_init
+        .long sys_fanotify_mark
+        .long sys_prlimit64     /* 370 */
+        .long sys_name_to_handle_at
+        .long sys_open_by_handle_at
+        .long sys_clock_adjtime
+        .long sys_syncfs
+        .long sys_setns                 /* 375 */
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index b1380ae93ae1..e5550ce4e0eb 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -38,6 +38,9 @@ static unsigned int timer_baseaddr;
 #define TIMER_BASE      timer_baseaddr
 #endif
 
+static unsigned int freq_div_hz;
+static unsigned int timer_clock_freq;
+
 #define TCSR0   (0x00)
 #define TLR0    (0x04)
 #define TCR0    (0x08)
@@ -115,7 +118,7 @@ static void microblaze_timer_set_mode(enum clock_event_mode mode,
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 printk(KERN_INFO "%s: periodic\n", __func__);
-                microblaze_timer0_start_periodic(cpuinfo.freq_div_hz);
+                microblaze_timer0_start_periodic(freq_div_hz);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 printk(KERN_INFO "%s: oneshot\n", __func__);
@@ -168,7 +171,7 @@ static struct irqaction timer_irqaction = {
 static __init void microblaze_clockevent_init(void)
 {
         clockevent_microblaze_timer.mult =
-                div_sc(cpuinfo.cpu_clock_freq, NSEC_PER_SEC,
+                div_sc(timer_clock_freq, NSEC_PER_SEC,
                                 clockevent_microblaze_timer.shift);
         clockevent_microblaze_timer.max_delta_ns =
                 clockevent_delta2ns((u32)~0, &clockevent_microblaze_timer);
@@ -199,9 +202,9 @@ static struct cyclecounter microblaze_cc = {
         .shift = 8,
 };
 
-int __init init_microblaze_timecounter(void)
+static int __init init_microblaze_timecounter(void)
 {
-        microblaze_cc.mult = div_sc(cpuinfo.cpu_clock_freq, NSEC_PER_SEC,
+        microblaze_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC,
                                 microblaze_cc.shift);
 
         timecounter_init(&microblaze_tc, &microblaze_cc, sched_clock());
@@ -214,16 +217,12 @@ static struct clocksource clocksource_microblaze = {
         .rating         = 300,
         .read           = microblaze_read,
         .mask           = CLOCKSOURCE_MASK(32),
-        .shift          = 8, /* I can shift it */
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
 static int __init microblaze_clocksource_init(void)
 {
-        clocksource_microblaze.mult =
-                        clocksource_hz2mult(cpuinfo.cpu_clock_freq,
-                                                clocksource_microblaze.shift);
-        if (clocksource_register(&clocksource_microblaze))
+        if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq))
                 panic("failed to register clocksource");
 
         /* stop timer1 */
@@ -247,6 +246,7 @@ void __init time_init(void)
         u32 irq, i = 0;
         u32 timer_num = 1;
         struct device_node *timer = NULL;
+        const void *prop;
 #ifdef CONFIG_SELFMOD_TIMER
         unsigned int timer_baseaddr = 0;
         int arr_func[] = {
@@ -258,12 +258,10 @@ void __init time_init(void)
                                 0
                         };
 #endif
-        char *timer_list[] = {
-                                "xlnx,xps-timer-1.00.a",
-                                "xlnx,opb-timer-1.00.b",
-                                "xlnx,opb-timer-1.00.a",
-                                NULL
-                        };
+        const char * const timer_list[] = {
+                "xlnx,xps-timer-1.00.a",
+                NULL
+        };
 
         for (i = 0; timer_list[i] != NULL; i++) {
                 timer = of_find_compatible_node(NULL, NULL, timer_list[i]);
@@ -272,13 +270,13 @@ void __init time_init(void)
         }
         BUG_ON(!timer);
 
-        timer_baseaddr = *(int *) of_get_property(timer, "reg", NULL);
+        timer_baseaddr = be32_to_cpup(of_get_property(timer, "reg", NULL));
         timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE);
-        irq = *(int *) of_get_property(timer, "interrupts", NULL);
-        timer_num =
-                *(int *) of_get_property(timer, "xlnx,one-timer-only", NULL);
+        irq = be32_to_cpup(of_get_property(timer, "interrupts", NULL));
+        timer_num = be32_to_cpup(of_get_property(timer,
+                                                "xlnx,one-timer-only", NULL));
         if (timer_num) {
-                printk(KERN_EMERG "Please enable two timers in HW\n");
+                eprintk(KERN_EMERG "Please enable two timers in HW\n");
                 BUG();
         }
 
@@ -288,7 +286,14 @@ void __init time_init(void)
         printk(KERN_INFO "%s #0 at 0x%08x, irq=%d\n",
                 timer_list[i], timer_baseaddr, irq);
 
-        cpuinfo.freq_div_hz = cpuinfo.cpu_clock_freq / HZ;
+        /* If there is clock-frequency property than use it */
+        prop = of_get_property(timer, "clock-frequency", NULL);
+        if (prop)
+                timer_clock_freq = be32_to_cpup(prop);
+        else
+                timer_clock_freq = cpuinfo.cpu_clock_freq;
+
+        freq_div_hz = timer_clock_freq / HZ;
 
         setup_irq(irq, &timer_irqaction);
 #ifdef CONFIG_HEART_BEAT
diff --git a/arch/microblaze/kernel/unwind.c b/arch/microblaze/kernel/unwind.c
index fefac5c33586..9781a528cfc9 100644
--- a/arch/microblaze/kernel/unwind.c
+++ b/arch/microblaze/kernel/unwind.c
@@ -183,7 +183,7 @@ static inline void unwind_trap(struct task_struct *task, unsigned long pc,
  * @trace : Where to store stack backtrace (PC values).
  *          NULL == print backtrace to kernel log
  */
-void microblaze_unwind_inner(struct task_struct *task,
+static void microblaze_unwind_inner(struct task_struct *task,
                              unsigned long pc, unsigned long fp,
                              unsigned long leaf_return,
                              struct stack_trace *trace)
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index a09f2962fbec..ac0e1a5d4782 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -8,7 +8,6 @@
  * for more details.
  */
 
-OUTPUT_FORMAT("elf32-microblaze", "elf32-microblaze", "elf32-microblaze")
 OUTPUT_ARCH(microblaze)
 ENTRY(microblaze_start)
 
@@ -16,7 +15,11 @@ ENTRY(microblaze_start)
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/thread_info.h>
 
+#ifdef __MICROBLAZEEL__
+jiffies = jiffies_64;
+#else
 jiffies = jiffies_64 + 4;
+#endif
 
 SECTIONS {
         . = CONFIG_KERNEL_START;
@@ -67,11 +70,6 @@ SECTIONS {
         RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
         _edata = . ;
 
-        /* Reserve some low RAM for r0 based memory references */
-        . = ALIGN(0x4) ;
-        r0_ram = . ;
-        . = . +  PAGE_SIZE;     /* a page should be enough */
-
         /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
         . = ALIGN(8);
         .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
@@ -120,20 +118,10 @@ SECTIONS {
 
         __init_end_before_initramfs = .;
 
-        .init.ramfs ALIGN(PAGE_SIZE) : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-                . = ALIGN(4);
-                LONG(0);
-/*
- * FIXME this can break initramfs for MMU.
- * Pad init.ramfs up to page boundary,
- * so that __init_end == __bss_start. This will make image.elf
- * consistent with the image.bin
- */
-                /* . = ALIGN(PAGE_SIZE); */
+        .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
+                INIT_RAM_FS
         }
+
         __init_end = .;
 
         .bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) - LOAD_OFFSET) {
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index 4dfe47d3cd91..10c320aa908b 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -2,6 +2,12 @@
 # Makefile
 #
 
+ifdef CONFIG_FUNCTION_TRACER
+CFLAGS_REMOVE_ashldi3.o = -pg
+CFLAGS_REMOVE_ashrdi3.o = -pg
+CFLAGS_REMOVE_lshrdi3.o = -pg
+endif
+
 lib-y :=  memset.o
 
 ifeq ($(CONFIG_OPT_LIB_ASM),y)
@@ -11,3 +17,13 @@ lib-y += memcpy.o memmove.o
 endif
 
 lib-y += uaccess_old.o
+
+lib-y += ashldi3.o
+lib-y += ashrdi3.o
+lib-y += divsi3.o
+lib-y += lshrdi3.o
+lib-y += modsi3.o
+lib-y += muldi3.o
+lib-y += mulsi3.o
+lib-y += udivsi3.o
+lib-y += umodsi3.o
diff --git a/arch/microblaze/lib/ashldi3.c b/arch/microblaze/lib/ashldi3.c
new file mode 100644
index 000000000000..beb80f316095
--- /dev/null
+++ b/arch/microblaze/lib/ashldi3.c
@@ -0,0 +1,29 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+long long __ashldi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                w.s.low = 0;
+                w.s.high = (unsigned int) uu.s.low << -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.low >> bm;
+
+                w.s.low = (unsigned int) uu.s.low << b;
+                w.s.high = ((unsigned int) uu.s.high << b) | carries;
+        }
+
+        return w.ll;
+}
+
+EXPORT_SYMBOL(__ashldi3);
diff --git a/arch/microblaze/lib/ashrdi3.c b/arch/microblaze/lib/ashrdi3.c
new file mode 100644
index 000000000000..c884a912b660
--- /dev/null
+++ b/arch/microblaze/lib/ashrdi3.c
@@ -0,0 +1,31 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+long long __ashrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                /* w.s.high = 1..1 or 0..0 */
+                w.s.high =
+                    uu.s.high >> 31;
+                w.s.low = uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+
+                w.s.high = uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+
+        return w.ll;
+}
+
+EXPORT_SYMBOL(__ashrdi3);
diff --git a/arch/microblaze/lib/divsi3.S b/arch/microblaze/lib/divsi3.S
new file mode 100644
index 000000000000..595b02d6e86b
--- /dev/null
+++ b/arch/microblaze/lib/divsi3.S
@@ -0,0 +1,73 @@
+#include <linux/linkage.h>
+
+/*
+* Divide operation for 32 bit integers.
+*       Input : Dividend in Reg r5
+*               Divisor in Reg r6
+*       Output: Result in Reg r3
+*/
+        .text
+        .globl  __divsi3
+        .type __divsi3, @function
+        .ent __divsi3
+__divsi3:
+        .frame  r1, 0, r15
+
+        addik   r1, r1, -16
+        swi     r28, r1, 0
+        swi     r29, r1, 4
+        swi     r30, r1, 8
+        swi     r31, r1, 12
+
+        beqi    r6, div_by_zero /* div_by_zero - division error */
+        beqi    r5, result_is_zero /* result is zero */
+        bgeid   r5, r5_pos
+        xor     r28, r5, r6 /* get the sign of the result */
+        rsubi   r5, r5, 0 /* make r5 positive */
+r5_pos:
+        bgei    r6, r6_pos
+        rsubi   r6, r6, 0 /* make r6 positive */
+r6_pos:
+        addik   r30, r0, 0 /* clear mod */
+        addik   r3, r0, 0 /* clear div */
+        addik   r29, r0, 32 /* initialize the loop count */
+
+        /* first part try to find the first '1' in the r5 */
+div0:
+        blti    r5, div2 /* this traps r5 == 0x80000000 */
+div1:
+        add     r5, r5, r5 /* left shift logical r5 */
+        bgtid   r5, div1
+        addik   r29, r29, -1
+div2:
+        /* left shift logical r5 get the '1' into the carry */
+        add     r5, r5, r5
+        addc    r30, r30, r30 /* move that bit into the mod register */
+        rsub    r31, r6, r30 /* try to subtract (r30 a r6) */
+        blti    r31, mod_too_small
+        /* move the r31 to mod since the result was positive */
+        or      r30, r0, r31
+        addik   r3, r3, 1
+mod_too_small:
+        addik   r29, r29, -1
+        beqi    r29, loop_end
+        add     r3, r3, r3 /* shift in the '1' into div */
+        bri     div2 /* div2 */
+loop_end:
+        bgei    r28, return_here
+        brid    return_here
+        rsubi   r3, r3, 0 /* negate the result */
+div_by_zero:
+result_is_zero:
+        or      r3, r0, r0 /* set result to 0 */
+return_here:
+/* restore values of csrs and that of r3 and the divisor and the dividend */
+        lwi     r28, r1, 0
+        lwi     r29, r1, 4
+        lwi     r30, r1, 8
+        lwi     r31, r1, 12
+        rtsd    r15, 8
+        addik   r1, r1, 16
+
+.size __divsi3, . - __divsi3
+.end __divsi3
diff --git a/arch/microblaze/lib/fastcopy.S b/arch/microblaze/lib/fastcopy.S
index fdc48bb065d8..62021d7e249e 100644
--- a/arch/microblaze/lib/fastcopy.S
+++ b/arch/microblaze/lib/fastcopy.S
@@ -29,6 +29,10 @@
  *      between mem locations with size of xfer spec'd in bytes
  */
 
+#ifdef __MICROBLAZEEL__
+#error Microblaze LE not support ASM optimized lib func. Disable OPT_LIB_ASM.
+#endif
+
 #include <linux/linkage.h>
         .text
         .globl  memcpy
diff --git a/arch/microblaze/lib/libgcc.h b/arch/microblaze/lib/libgcc.h
new file mode 100644
index 000000000000..05909d58e2fe
--- /dev/null
+++ b/arch/microblaze/lib/libgcc.h
@@ -0,0 +1,25 @@
+#ifndef __ASM_LIBGCC_H
+#define __ASM_LIBGCC_H
+
+#include <asm/byteorder.h>
+
+typedef int word_type __attribute__ ((mode (__word__)));
+
+#ifdef __BIG_ENDIAN
+struct DWstruct {
+        int high, low;
+};
+#elif defined(__LITTLE_ENDIAN)
+struct DWstruct {
+        int low, high;
+};
+#else
+#error I feel sick.
+#endif
+
+typedef union {
+        struct DWstruct s;
+        long long ll;
+} DWunion;
+
+#endif /* __ASM_LIBGCC_H */
diff --git a/arch/microblaze/lib/lshrdi3.c b/arch/microblaze/lib/lshrdi3.c
new file mode 100644
index 000000000000..dcf8d6810b7c
--- /dev/null
+++ b/arch/microblaze/lib/lshrdi3.c
@@ -0,0 +1,29 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+long long __lshrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                w.s.high = 0;
+                w.s.low = (unsigned int) uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+
+                w.s.high = (unsigned int) uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+
+        return w.ll;
+}
+
+EXPORT_SYMBOL(__lshrdi3);
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index 014bac92bdff..52746e718dfa 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -33,17 +33,24 @@
 #include <asm/system.h>
 
 #ifdef __HAVE_ARCH_MEMCPY
+#ifndef CONFIG_OPT_LIB_FUNCTION
 void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
 {
         const char *src = v_src;
         char *dst = v_dst;
-#ifndef CONFIG_OPT_LIB_FUNCTION
+
         /* Simple, byte oriented memcpy. */
         while (c--)
                 *dst++ = *src++;
 
         return v_dst;
-#else
+}
+#else /* CONFIG_OPT_LIB_FUNCTION */
+void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
+{
+        const char *src = v_src;
+        char *dst = v_dst;
+
         /* The following code tries to optimize the copy by using unsigned
          * alignment. This will work fine if both source and destination are
          * aligned on the same boundary. However, if they are aligned on
@@ -56,8 +63,8 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
         if (likely(c >= 4)) {
                 unsigned  value, buf_hold;
 
-                /* Align the dstination to a word boundry. */
-                /* This is done in an endian independant manner. */
+                /* Align the destination to a word boundary. */
+                /* This is done in an endian independent manner. */
                 switch ((unsigned long)dst & 3) {
                 case 1:
                         *dst++ = *src++;
@@ -73,7 +80,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                 i_dst = (void *)dst;
 
                 /* Choose a copy scheme based on the source */
-                /* alignment relative to dstination. */
+                /* alignment relative to destination. */
                 switch ((unsigned long)src & 3) {
                 case 0x0:       /* Both byte offsets are aligned */
                         i_src  = (const void *)src;
@@ -86,7 +93,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                 case 0x1:       /* Unaligned - Off by 1 */
                         /* Word align the source */
                         i_src = (const void *) ((unsigned)src & ~3);
-
+#ifndef __MICROBLAZEEL__
                         /* Load the holding buffer */
                         buf_hold = *i_src++ << 8;
 
@@ -95,7 +102,16 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                                 *i_dst++ = buf_hold | value >> 24;
                                 buf_hold = value << 8;
                         }
+#else
+                        /* Load the holding buffer */
+                        buf_hold = (*i_src++ & 0xFFFFFF00) >>8;
 
+                        for (; c >= 4; c -= 4) {
+                                value = *i_src++;
+                                *i_dst++ = buf_hold | ((value & 0xFF) << 24);
+                                buf_hold = (value & 0xFFFFFF00) >>8;
+                        }
+#endif
                         /* Realign the source */
                         src = (const void *)i_src;
                         src -= 3;
@@ -103,7 +119,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                 case 0x2:       /* Unaligned - Off by 2 */
                         /* Word align the source */
                         i_src = (const void *) ((unsigned)src & ~3);
-
+#ifndef __MICROBLAZEEL__
                         /* Load the holding buffer */
                         buf_hold = *i_src++ << 16;
 
@@ -112,7 +128,16 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                                 *i_dst++ = buf_hold | value >> 16;
                                 buf_hold = value << 16;
                         }
+#else
+                        /* Load the holding buffer */
+                        buf_hold = (*i_src++ & 0xFFFF0000 )>>16;
 
+                        for (; c >= 4; c -= 4) {
+                                value = *i_src++;
+                                *i_dst++ = buf_hold | ((value & 0xFFFF)<<16);
+                                buf_hold = (value & 0xFFFF0000) >>16;
+                        }
+#endif
                         /* Realign the source */
                         src = (const void *)i_src;
                         src -= 2;
@@ -120,7 +145,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                 case 0x3:       /* Unaligned - Off by 3 */
                         /* Word align the source */
                         i_src = (const void *) ((unsigned)src & ~3);
-
+#ifndef __MICROBLAZEEL__
                         /* Load the holding buffer */
                         buf_hold = *i_src++ << 24;
 
@@ -129,7 +154,16 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
                                 *i_dst++ = buf_hold | value >> 8;
                                 buf_hold = value << 24;
                         }
+#else
+                        /* Load the holding buffer */
+                        buf_hold = (*i_src++ & 0xFF000000) >> 24;
 
+                        for (; c >= 4; c -= 4) {
+                                value = *i_src++;
+                                *i_dst++ = buf_hold | ((value & 0xFFFFFF) << 8);
+                                buf_hold = (value & 0xFF000000) >> 24;
+                        }
+#endif
                         /* Realign the source */
                         src = (const void *)i_src;
                         src -= 1;
@@ -139,7 +173,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
         }
 
         /* Finish off any remaining bytes */
-        /* simple fast copy, ... unless a cache boundry is crossed */
+        /* simple fast copy, ... unless a cache boundary is crossed */
         switch (c) {
         case 3:
                 *dst++ = *src++;
@@ -150,7 +184,7 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
         }
 
         return v_dst;
-#endif
 }
+#endif /* CONFIG_OPT_LIB_FUNCTION */
 EXPORT_SYMBOL(memcpy);
 #endif /* __HAVE_ARCH_MEMCPY */
diff --git a/arch/microblaze/lib/memmove.c b/arch/microblaze/lib/memmove.c
index 0929198c5e68..2146c3752a80 100644
--- a/arch/microblaze/lib/memmove.c
+++ b/arch/microblaze/lib/memmove.c
@@ -31,16 +31,12 @@
 #include <linux/string.h>
 
 #ifdef __HAVE_ARCH_MEMMOVE
+#ifndef CONFIG_OPT_LIB_FUNCTION
 void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
 {
         const char *src = v_src;
         char *dst = v_dst;
 
-#ifdef CONFIG_OPT_LIB_FUNCTION
-        const uint32_t *i_src;
-        uint32_t *i_dst;
-#endif
-
         if (!c)
                 return v_dst;
 
@@ -48,7 +44,6 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
         if (v_dst <= v_src)
                 return memcpy(v_dst, v_src, c);
 
-#ifndef CONFIG_OPT_LIB_FUNCTION
         /* copy backwards, from end to beginning */
         src += c;
         dst += c;
@@ -58,7 +53,22 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                 *--dst = *--src;
 
         return v_dst;
-#else
+}
+#else /* CONFIG_OPT_LIB_FUNCTION */
+void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
+{
+        const char *src = v_src;
+        char *dst = v_dst;
+        const uint32_t *i_src;
+        uint32_t *i_dst;
+
+        if (!c)
+                return v_dst;
+
+        /* Use memcpy when source is higher than dest */
+        if (v_dst <= v_src)
+                return memcpy(v_dst, v_src, c);
+
         /* The following code tries to optimize the copy by using unsigned
          * alignment. This will work fine if both source and destination are
          * aligned on the same boundary. However, if they are aligned on
@@ -73,8 +83,8 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
         if (c >= 4) {
                 unsigned  value, buf_hold;
 
-                /* Align the destination to a word boundry. */
-                /* This is done in an endian independant manner. */
+                /* Align the destination to a word boundary. */
+                /* This is done in an endian independent manner. */
 
                 switch ((unsigned long)dst & 3) {
                 case 3:
@@ -104,7 +114,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                 case 0x1:       /* Unaligned - Off by 1 */
                         /* Word align the source */
                         i_src = (const void *) (((unsigned)src + 4) & ~3);
-
+#ifndef __MICROBLAZEEL__
                         /* Load the holding buffer */
                         buf_hold = *--i_src >> 24;
 
@@ -113,7 +123,16 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                                 *--i_dst = buf_hold << 8 | value;
                                 buf_hold = value >> 24;
                         }
+#else
+                        /* Load the holding buffer */
+                        buf_hold = (*--i_src & 0xFF) << 24;
 
+                        for (; c >= 4; c -= 4) {
+                                value = *--i_src;
+                                *--i_dst = buf_hold | ((value & 0xFFFFFF00)>>8);
+                                buf_hold = (value  & 0xFF) << 24;
+                        }
+#endif
                         /* Realign the source */
                         src = (const void *)i_src;
                         src += 1;
@@ -121,7 +140,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                 case 0x2:       /* Unaligned - Off by 2 */
                         /* Word align the source */
                         i_src = (const void *) (((unsigned)src + 4) & ~3);
-
+#ifndef __MICROBLAZEEL__
                         /* Load the holding buffer */
                         buf_hold = *--i_src >> 16;
 
@@ -130,7 +149,16 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                                 *--i_dst = buf_hold << 16 | value;
                                 buf_hold = value >> 16;
                         }
+#else
+                        /* Load the holding buffer */
+                        buf_hold = (*--i_src & 0xFFFF) << 16;
 
+                        for (; c >= 4; c -= 4) {
+                                value = *--i_src;
+                                *--i_dst = buf_hold | ((value & 0xFFFF0000)>>16);
+                                buf_hold = (value & 0xFFFF) << 16;
+                        }
+#endif
                         /* Realign the source */
                         src = (const void *)i_src;
                         src += 2;
@@ -138,7 +166,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                 case 0x3:       /* Unaligned - Off by 3 */
                         /* Word align the source */
                         i_src = (const void *) (((unsigned)src + 4) & ~3);
-
+#ifndef __MICROBLAZEEL__
                         /* Load the holding buffer */
                         buf_hold = *--i_src >> 8;
 
@@ -147,7 +175,16 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                                 *--i_dst = buf_hold << 24 | value;
                                 buf_hold = value >> 8;
                         }
+#else
+                        /* Load the holding buffer */
+                        buf_hold = (*--i_src & 0xFFFFFF) << 8;
 
+                        for (; c >= 4; c -= 4) {
+                                value = *--i_src;
+                                *--i_dst = buf_hold | ((value & 0xFF000000)>> 24);
+                                buf_hold = (value & 0xFFFFFF) << 8;
+                        }
+#endif
                         /* Realign the source */
                         src = (const void *)i_src;
                         src += 3;
@@ -156,7 +193,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                 dst = (void *)i_dst;
         }
 
-        /* simple fast copy, ... unless a cache boundry is crossed */
+        /* simple fast copy, ... unless a cache boundary is crossed */
         /* Finish off any remaining bytes */
         switch (c) {
         case 4:
@@ -169,7 +206,7 @@ void *memmove(void *v_dst, const void *v_src, __kernel_size_t c)
                 *--dst = *--src;
         }
         return v_dst;
-#endif
 }
+#endif /* CONFIG_OPT_LIB_FUNCTION */
 EXPORT_SYMBOL(memmove);
 #endif /* __HAVE_ARCH_MEMMOVE */
diff --git a/arch/microblaze/lib/memset.c b/arch/microblaze/lib/memset.c
index ecfb663e1fc1..ddf67939576d 100644
--- a/arch/microblaze/lib/memset.c
+++ b/arch/microblaze/lib/memset.c
@@ -31,17 +31,30 @@
 #include <linux/string.h>
 
 #ifdef __HAVE_ARCH_MEMSET
+#ifndef CONFIG_OPT_LIB_FUNCTION
+void *memset(void *v_src, int c, __kernel_size_t n)
+{
+        char *src = v_src;
+
+        /* Truncate c to 8 bits */
+        c = (c & 0xFF);
+
+        /* Simple, byte oriented memset or the rest of count. */
+        while (n--)
+                *src++ = c;
+
+        return v_src;
+}
+#else /* CONFIG_OPT_LIB_FUNCTION */
 void *memset(void *v_src, int c, __kernel_size_t n)
 {
         char *src = v_src;
-#ifdef CONFIG_OPT_LIB_FUNCTION
         uint32_t *i_src;
         uint32_t w32 = 0;
-#endif
+
         /* Truncate c to 8 bits */
         c = (c & 0xFF);
 
-#ifdef CONFIG_OPT_LIB_FUNCTION
         if (unlikely(c)) {
                 /* Make a repeating word out of it */
                 w32 = c;
@@ -51,7 +64,7 @@ void *memset(void *v_src, int c, __kernel_size_t n)
 
         if (likely(n >= 4)) {
                 /* Align the destination to a word boundary */
-                /* This is done in an endian independant manner */
+                /* This is done in an endian independent manner */
                 switch ((unsigned) src & 3) {
                 case 1:
                         *src++ = c;
@@ -72,12 +85,13 @@ void *memset(void *v_src, int c, __kernel_size_t n)
 
                 src  = (void *)i_src;
         }
-#endif
+
         /* Simple, byte oriented memset or the rest of count. */
         while (n--)
                 *src++ = c;
 
         return v_src;
 }
+#endif /* CONFIG_OPT_LIB_FUNCTION */
 EXPORT_SYMBOL(memset);
 #endif /* __HAVE_ARCH_MEMSET */
diff --git a/arch/microblaze/lib/modsi3.S b/arch/microblaze/lib/modsi3.S
new file mode 100644
index 000000000000..84e0bee6e8c7
--- /dev/null
+++ b/arch/microblaze/lib/modsi3.S
@@ -0,0 +1,73 @@
+#include <linux/linkage.h>
+
+/*
+* modulo operation for 32 bit integers.
+*       Input : op1 in Reg r5
+*               op2 in Reg r6
+*       Output: op1 mod op2 in Reg r3
+*/
+
+        .text
+        .globl  __modsi3
+        .type __modsi3,  @function
+        .ent __modsi3
+
+__modsi3:
+        .frame  r1, 0, r15
+
+        addik   r1, r1, -16
+        swi     r28, r1, 0
+        swi     r29, r1, 4
+        swi     r30, r1, 8
+        swi     r31, r1, 12
+
+        beqi    r6, div_by_zero /* div_by_zero division error */
+        beqi    r5, result_is_zero /* result is zero */
+        bgeid   r5, r5_pos
+        /* get the sign of the result [ depends only on the first arg] */
+        add     r28, r5, r0
+        rsubi   r5, r5, 0        /* make r5 positive */
+r5_pos:
+        bgei    r6, r6_pos
+        rsubi   r6, r6, 0        /* make r6 positive */
+r6_pos:
+        addik   r3, r0, 0 /* clear mod */
+        addik   r30, r0, 0 /* clear div */
+        addik   r29, r0, 32 /* initialize the loop count */
+/* first part try to find the first '1' in the r5 */
+div1:
+        add     r5, r5, r5 /* left shift logical r5 */
+        bgeid   r5, div1
+        addik   r29, r29, -1
+div2:
+        /* left shift logical r5 get the '1' into the carry */
+        add     r5, r5, r5
+        addc    r3, r3, r3 /* move that bit into the mod register */
+        rsub    r31, r6, r3 /* try to subtract (r30 a r6) */
+        blti    r31, mod_too_small
+        /* move the r31 to mod since the result was positive */
+        or      r3, r0, r31
+        addik   r30, r30, 1
+mod_too_small:
+        addik   r29, r29, -1
+        beqi    r29, loop_end
+        add     r30, r30, r30 /* shift in the '1' into div */
+        bri     div2 /* div2 */
+loop_end:
+        bgei    r28, return_here
+        brid    return_here
+        rsubi   r3, r3, 0 /* negate the result */
+div_by_zero:
+result_is_zero:
+        or      r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */
+return_here:
+/* restore values of csrs and that of r3 and the divisor and the dividend */
+        lwi     r28, r1, 0
+        lwi     r29, r1, 4
+        lwi     r30, r1, 8
+        lwi     r31, r1, 12
+        rtsd    r15, 8
+        addik   r1, r1, 16
+
+.size __modsi3,  . - __modsi3
+.end __modsi3
diff --git a/arch/microblaze/lib/muldi3.c b/arch/microblaze/lib/muldi3.c
new file mode 100644
index 000000000000..0585bccb7fad
--- /dev/null
+++ b/arch/microblaze/lib/muldi3.c
@@ -0,0 +1,61 @@
+#include <linux/module.h>
+
+#include "libgcc.h"
+
+#define DWtype long long
+#define UWtype unsigned long
+#define UHWtype unsigned short
+
+#define W_TYPE_SIZE 32
+
+#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
+#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
+#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
+
+/* If we still don't have umul_ppmm, define it using plain C.  */
+#if !defined(umul_ppmm)
+#define umul_ppmm(w1, w0, u, v)                                         \
+        do {                                                            \
+                UWtype __x0, __x1, __x2, __x3;                          \
+                UHWtype __ul, __vl, __uh, __vh;                         \
+                                                                        \
+                __ul = __ll_lowpart(u);                                 \
+                __uh = __ll_highpart(u);                                \
+                __vl = __ll_lowpart(v);                                 \
+                __vh = __ll_highpart(v);                                \
+                                                                        \
+                __x0 = (UWtype) __ul * __vl;                            \
+                __x1 = (UWtype) __ul * __vh;                            \
+                __x2 = (UWtype) __uh * __vl;                            \
+                __x3 = (UWtype) __uh * __vh;                            \
+                                                                        \
+                __x1 += __ll_highpart(__x0); /* this can't give carry */\
+                __x1 += __x2; /* but this indeed can */                 \
+                if (__x1 < __x2) /* did we get it? */                   \
+                __x3 += __ll_B; /* yes, add it in the proper pos */     \
+                                                                        \
+                (w1) = __x3 + __ll_highpart(__x1);                      \
+                (w0) = __ll_lowpart(__x1) * __ll_B + __ll_lowpart(__x0);\
+        } while (0)
+#endif
+
+#if !defined(__umulsidi3)
+#define __umulsidi3(u, v) ({                            \
+        DWunion __w;                                    \
+        umul_ppmm(__w.s.high, __w.s.low, u, v);         \
+        __w.ll;                                         \
+        })
+#endif
+
+DWtype __muldi3(DWtype u, DWtype v)
+{
+        const DWunion uu = {.ll = u};
+        const DWunion vv = {.ll = v};
+        DWunion w = {.ll = __umulsidi3(uu.s.low, vv.s.low)};
+
+        w.s.high += ((UWtype) uu.s.low * (UWtype) vv.s.high
+                + (UWtype) uu.s.high * (UWtype) vv.s.low);
+
+        return w.ll;
+}
+EXPORT_SYMBOL(__muldi3);
diff --git a/arch/microblaze/lib/mulsi3.S b/arch/microblaze/lib/mulsi3.S
new file mode 100644
index 000000000000..90bd7b93afe6
--- /dev/null
+++ b/arch/microblaze/lib/mulsi3.S
@@ -0,0 +1,46 @@
+#include <linux/linkage.h>
+
+/*
+ * Multiply operation for 32 bit integers.
+ *      Input : Operand1 in Reg r5
+ *              Operand2 in Reg r6
+ *      Output: Result [op1 * op2] in Reg r3
+ */
+        .text
+        .globl  __mulsi3
+        .type __mulsi3,  @function
+        .ent __mulsi3
+
+__mulsi3:
+        .frame  r1, 0, r15
+        add     r3, r0, r0
+        beqi    r5, result_is_zero /* multiply by zero */
+        beqi    r6, result_is_zero /* multiply by zero */
+        bgeid   r5, r5_pos
+        xor     r4, r5, r6 /* get the sign of the result */
+        rsubi   r5, r5, 0 /* make r5 positive */
+r5_pos:
+        bgei    r6, r6_pos
+        rsubi   r6, r6, 0 /* make r6 positive */
+r6_pos:
+        bri     l1
+l2:
+        add     r5, r5, r5
+l1:
+        srl     r6, r6
+        addc    r7, r0, r0
+        beqi    r7, l2
+        bneid   r6, l2
+        add     r3, r3, r5
+        blti    r4, negateresult
+        rtsd    r15, 8
+        nop
+negateresult:
+        rtsd    r15, 8
+        rsub    r3, r3, r0
+result_is_zero:
+        rtsd    r15, 8
+        addi    r3, r0, 0
+
+.size __mulsi3,  . - __mulsi3
+.end __mulsi3
diff --git a/arch/microblaze/lib/udivsi3.S b/arch/microblaze/lib/udivsi3.S
new file mode 100644
index 000000000000..64cf57e4bb85
--- /dev/null
+++ b/arch/microblaze/lib/udivsi3.S
@@ -0,0 +1,84 @@
+#include <linux/linkage.h>
+
+/*
+* Unsigned divide operation.
+*       Input : Divisor in Reg r5
+*               Dividend in Reg r6
+*       Output: Result in Reg r3
+*/
+
+        .text
+        .globl  __udivsi3
+        .type __udivsi3, @function
+        .ent __udivsi3
+
+__udivsi3:
+
+        .frame  r1, 0, r15
+
+        addik   r1, r1, -12
+        swi     r29, r1, 0
+        swi     r30, r1, 4
+        swi     r31, r1, 8
+
+        beqi    r6, div_by_zero /* div_by_zero /* division error */
+        beqid   r5, result_is_zero /* result is zero */
+        addik   r30, r0, 0 /* clear mod */
+        addik   r29, r0, 32 /* initialize the loop count */
+
+/* check if r6 and r5 are equal - if yes, return 1 */
+        rsub    r18, r5, r6
+        beqid   r18, return_here
+        addik   r3, r0, 1
+
+/* check if (uns)r6 is greater than (uns)r5. in that case, just return 0 */
+        xor     r18, r5, r6
+        bgeid   r18, 16
+        add     r3, r0, r0 /* we would anyways clear r3 */
+        blti    r6, return_here /* r6[bit 31 = 1] hence is greater */
+        bri     checkr6
+        rsub    r18, r6, r5 /* microblazecmp */
+        blti    r18, return_here
+
+/* if r6 [bit 31] is set, then return result as 1 */
+checkr6:
+        bgti    r6, div0
+        brid    return_here
+        addik   r3, r0, 1
+
+/* first part try to find the first '1' in the r5 */
+div0:
+        blti    r5, div2
+div1:
+        add     r5, r5, r5 /* left shift logical r5 */
+        bgtid   r5, div1
+        addik   r29, r29, -1
+div2:
+/* left shift logical r5 get the '1' into the carry */
+        add     r5, r5, r5
+        addc    r30, r30, r30 /* move that bit into the mod register */
+        rsub    r31, r6, r30 /* try to subtract (r30 a r6) */
+        blti    r31, mod_too_small
+/* move the r31 to mod since the result was positive */
+        or      r30, r0, r31
+        addik   r3, r3, 1
+mod_too_small:
+        addik   r29, r29, -1
+        beqi    r29, loop_end
+        add     r3, r3, r3 /* shift in the '1' into div */
+        bri     div2 /* div2 */
+loop_end:
+        bri     return_here
+div_by_zero:
+result_is_zero:
+        or      r3, r0, r0 /* set result to 0 */
+return_here:
+/* restore values of csrs and that of r3 and the divisor and the dividend */
+        lwi     r29, r1, 0
+        lwi     r30, r1, 4
+        lwi     r31, r1, 8
+        rtsd    r15, 8
+        addik   r1, r1, 12
+
+.size __udivsi3, . - __udivsi3
+.end __udivsi3
diff --git a/arch/microblaze/lib/umodsi3.S b/arch/microblaze/lib/umodsi3.S
new file mode 100644
index 000000000000..17d16bafae58
--- /dev/null
+++ b/arch/microblaze/lib/umodsi3.S
@@ -0,0 +1,86 @@
+#include <linux/linkage.h>
+
+/*
+ * Unsigned modulo operation for 32 bit integers.
+ *      Input : op1 in Reg r5
+ *              op2 in Reg r6
+ *      Output: op1 mod op2 in Reg r3
+ */
+
+        .text
+        .globl  __umodsi3
+        .type __umodsi3, @function
+        .ent __umodsi3
+
+__umodsi3:
+        .frame  r1, 0, r15
+
+        addik   r1, r1, -12
+        swi     r29, r1, 0
+        swi     r30, r1, 4
+        swi     r31, r1, 8
+
+        beqi    r6, div_by_zero /* div_by_zero - division error */
+        beqid   r5, result_is_zero /* result is zero */
+        addik   r3, r0, 0 /* clear div */
+        addik   r30, r0, 0 /* clear mod */
+        addik   r29, r0, 32 /* initialize the loop count */
+
+/* check if r6 and r5 are equal /* if yes, return 0 */
+        rsub    r18, r5, r6
+        beqi    r18, return_here
+
+/* check if (uns)r6 is greater than (uns)r5. in that case, just return r5 */
+        xor     r18, r5, r6
+        bgeid   r18, 16
+        addik   r3, r5, 0
+        blti    r6, return_here
+        bri     $lcheckr6
+        rsub    r18, r5, r6 /* microblazecmp */
+        bgti    r18, return_here
+
+/* if r6 [bit 31] is set, then return result as r5-r6 */
+$lcheckr6:
+        bgtid   r6, div0
+        addik   r3, r0, 0
+        addik   r18, r0, 0x7fffffff
+        and     r5, r5, r18
+        and     r6, r6, r18
+        brid    return_here
+        rsub    r3, r6, r5
+/* first part: try to find the first '1' in the r5 */
+div0:
+        blti    r5, div2
+div1:
+        add     r5, r5, r5 /* left shift logical r5 */
+        bgeid   r5, div1
+        addik   r29, r29, -1
+div2:
+        /* left shift logical r5 get the '1' into the carry */
+        add     r5, r5, r5
+        addc    r3, r3, r3 /* move that bit into the mod register */
+        rsub    r31, r6, r3 /* try to subtract (r3 a r6) */
+        blti    r31, mod_too_small
+        /* move the r31 to mod since the result was positive */
+        or      r3, r0, r31
+        addik   r30, r30, 1
+mod_too_small:
+        addik   r29, r29, -1
+        beqi    r29, loop_end
+        add     r30, r30, r30 /* shift in the '1' into div */
+        bri     div2 /* div2 */
+loop_end:
+        bri     return_here
+div_by_zero:
+result_is_zero:
+        or      r3, r0, r0 /* set result to 0 */
+return_here:
+/* restore values of csrs and that of r3 and the divisor and the dividend */
+        lwi     r29, r1, 0
+        lwi     r30, r1, 4
+        lwi     r31, r1, 8
+        rtsd    r15, 8
+        addik   r1, r1, 12
+
+.size __umodsi3, . - __umodsi3
+.end __umodsi3
diff --git a/arch/microblaze/mm/consistent.c b/arch/microblaze/mm/consistent.c
index 5a59dad62bd2..a1e2e18e0961 100644
--- a/arch/microblaze/mm/consistent.c
+++ b/arch/microblaze/mm/consistent.c
@@ -59,7 +59,7 @@
  * uncached region.  This will no doubt cause big problems if memory allocated
  * here is not also freed properly. -- JW
  */
-void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle)
+void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
 {
         unsigned long order, vaddr;
         void *ret;
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c
index 57bd2a09610c..ae97d2ccdc22 100644
--- a/arch/microblaze/mm/fault.c
+++ b/arch/microblaze/mm/fault.c
@@ -48,7 +48,7 @@ static int store_updates_sp(struct pt_regs *regs)
 {
         unsigned int inst;
 
-        if (get_user(inst, (unsigned int *)regs->pc))
+        if (get_user(inst, (unsigned int __user *)regs->pc))
                 return 0;
         /* check for 1 in the rD field */
         if (((inst >> 21) & 0x1f) != 1)
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index 65eb00419d19..213f2d671669 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -32,8 +32,6 @@ unsigned int __page_offset;
 EXPORT_SYMBOL(__page_offset);
 
 #else
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
 static int init_bootmem_done;
 #endif /* CONFIG_MMU */
 
@@ -70,16 +68,16 @@ static void __init paging_init(void)
 
 void __init setup_memory(void)
 {
-        int i;
         unsigned long map_size;
+        struct memblock_region *reg;
+
 #ifndef CONFIG_MMU
         u32 kernel_align_start, kernel_align_size;
 
         /* Find main memory where is the kernel */
-        for (i = 0; i < memblock.memory.cnt; i++) {
-                memory_start = (u32) memblock.memory.region[i].base;
-                memory_end = (u32) memblock.memory.region[i].base
-                                + (u32) memblock.memory.region[i].size;
+        for_each_memblock(memory, reg) {
+                memory_start = (u32)reg->base;
+                memory_end = (u32) reg->base + reg->size;
                 if ((memory_start <= (u32)_text) &&
                                         ((u32)_text <= memory_end)) {
                         memory_size = memory_end - memory_start;
@@ -142,12 +140,10 @@ void __init setup_memory(void)
         free_bootmem(memory_start, memory_size);
 
         /* reserve allocate blocks */
-        for (i = 0; i < memblock.reserved.cnt; i++) {
-                pr_debug("reserved %d - 0x%08x-0x%08x\n", i,
-                        (u32) memblock.reserved.region[i].base,
-                        (u32) memblock_size_bytes(&memblock.reserved, i));
-                reserve_bootmem(memblock.reserved.region[i].base,
-                        memblock_size_bytes(&memblock.reserved, i) - 1, BOOTMEM_DEFAULT);
+        for_each_memblock(reserved, reg) {
+                pr_debug("reserved - 0x%08x-0x%08x\n",
+                         (u32) reg->base, (u32) reg->size);
+                reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
         }
 #ifdef CONFIG_MMU
         init_bootmem_done = 1;
@@ -230,7 +226,7 @@ static void mm_cmdline_setup(void)
                 if (maxmem && memory_size > maxmem) {
                         memory_size = maxmem;
                         memory_end = memory_start + memory_size;
-                        memblock.memory.region[0].size = memory_size;
+                        memblock.memory.regions[0].size = memory_size;
                 }
         }
 }
@@ -273,14 +269,14 @@ asmlinkage void __init mmu_init(void)
                 machine_restart(NULL);
         }
 
-        if ((u32) memblock.memory.region[0].size < 0x1000000) {
+        if ((u32) memblock.memory.regions[0].size < 0x1000000) {
                 printk(KERN_EMERG "Memory must be greater than 16MB\n");
                 machine_restart(NULL);
         }
         /* Find main memory where the kernel is */
-        memory_start = (u32) memblock.memory.region[0].base;
-        memory_end = (u32) memblock.memory.region[0].base +
-                                (u32) memblock.memory.region[0].size;
+        memory_start = (u32) memblock.memory.regions[0].base;
+        memory_end = (u32) memblock.memory.regions[0].base +
+                                (u32) memblock.memory.regions[0].size;
         memory_size = memory_end - memory_start;
 
         mm_cmdline_setup(); /* FIXME parse args from command line - not used */
diff --git a/arch/microblaze/pci/indirect_pci.c b/arch/microblaze/pci/indirect_pci.c
index 25f18f017f21..4196eb6bd764 100644
--- a/arch/microblaze/pci/indirect_pci.c
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -108,7 +108,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                 out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
                          (devfn << 8) | reg | cfg_type));
 
-        /* surpress setting of PCI_PRIMARY_BUS */
+        /* suppress setting of PCI_PRIMARY_BUS */
         if (hose->indirect_type & INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
                 if ((offset == PCI_PRIMARY_BUS) &&
                         (bus->number == hose->first_busno))
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 55ef532f32be..53599067d2f9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -29,6 +29,7 @@
 #include <linux/slab.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/of_pci.h>
 
 #include <asm/processor.h>
 #include <asm/io.h>
@@ -60,21 +61,6 @@ struct dma_map_ops *get_pci_dma_ops(void)
 }
 EXPORT_SYMBOL(get_pci_dma_ops);
 
-int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        return dma_set_mask(&dev->dev, mask);
-}
-
-int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        int rc;
-
-        rc = dma_set_mask(&dev->dev, mask);
-        dev->dev.coherent_dma_mask = dev->dma_mask;
-
-        return rc;
-}
-
 struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
 {
         struct pci_controller *phb;
@@ -251,7 +237,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
 
                 virq = irq_create_mapping(NULL, line);
                 if (virq != NO_IRQ)
-                        set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
         } else {
                 pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
                          oirq.size, oirq.specifier[0], oirq.specifier[1],
@@ -1075,8 +1061,6 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
                  bus->number, bus->self ? pci_name(bus->self) : "PHB");
 
         list_for_each_entry(dev, &bus->devices, bus_list) {
-                struct dev_archdata *sd = &dev->dev.archdata;
-
                 /* Setup OF node pointer in archdata */
                 dev->dev.of_node = pci_device_to_OF_node(dev);
 
@@ -1086,8 +1070,8 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
                 set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
 
                 /* Hook up default DMA ops */
-                sd->dma_ops = pci_dma_ops;
-                sd->dma_data = (void *)PCI_DRAM_OFFSET;
+                set_dma_ops(&dev->dev, pci_dma_ops);
+                dev->dev.archdata.dma_data = (void *)PCI_DRAM_OFFSET;
 
                 /* Read default IRQs and fixup if necessary */
                 pci_read_irq_line(dev);
diff --git a/arch/microblaze/pci/pci_32.c b/arch/microblaze/pci/pci_32.c
index 3c3d808d7ce0..92728a6cfd80 100644
--- a/arch/microblaze/pci/pci_32.c
+++ b/arch/microblaze/pci/pci_32.c
@@ -332,6 +332,7 @@ static void __devinit pcibios_scan_phb(struct pci_controller *hose)
                        hose->global_number);
                 return;
         }
+        bus.dev->of_node = of_node_get(node);
         bus->secondary = hose->first_busno;
         hose->bus = bus;
 
diff --git a/arch/microblaze/platform/generic/Kconfig.auto b/arch/microblaze/platform/generic/Kconfig.auto
index 5d86fc19029d..25a6f019e94d 100644
--- a/arch/microblaze/platform/generic/Kconfig.auto
+++ b/arch/microblaze/platform/generic/Kconfig.auto
@@ -29,7 +29,7 @@ config KERNEL_BASE_ADDR
           BASE Address for kernel
 
 config XILINX_MICROBLAZE0_FAMILY
-        string "Targetted FPGA family"
+        string "Targeted FPGA family"
         default "virtex5"
 
 config XILINX_MICROBLAZE0_USE_MSR_INSTR
diff --git a/arch/microblaze/platform/generic/system.dts b/arch/microblaze/platform/generic/system.dts
index 2d5c41767cd0..3f85df2b73b3 100644
--- a/arch/microblaze/platform/generic/system.dts
+++ b/arch/microblaze/platform/generic/system.dts
@@ -85,6 +85,7 @@
                         xlnx,dynamic-bus-sizing = <0x1>;
                         xlnx,edge-is-positive = <0x1>;
                         xlnx,family = "virtex5";
+                        xlnx,endianness = <0x1>;
                         xlnx,fpu-exception = <0x1>;
                         xlnx,fsl-data-size = <0x20>;
                         xlnx,fsl-exception = <0x0>;
@@ -218,6 +219,7 @@
                         #address-cells = <1>;
                         #size-cells = <1>;
                         compatible = "xlnx,compound";
+                        ranges ;
                         ethernet@81c00000 {
                                 compatible = "xlnx,xps-ll-temac-1.01.b", "xlnx,xps-ll-temac-1.00.a";
                                 device_type = "network";
@@ -332,6 +334,7 @@
                         #address-cells = <1>;
                         #size-cells = <1>;
                         compatible = "xlnx,mpmc-4.02.a";
+                        ranges ;
                         PIM3: sdma@84600180 {
                                 compatible = "xlnx,ll-dma-1.00.a";
                                 interrupt-parent = <&xps_intc_0>;
diff --git a/arch/microblaze/platform/platform.c b/arch/microblaze/platform/platform.c
index 5b89b58c5aed..b9529caa507a 100644
--- a/arch/microblaze/platform/platform.c
+++ b/arch/microblaze/platform/platform.c
@@ -17,9 +17,6 @@
 
 static struct of_device_id xilinx_of_bus_ids[] __initdata = {
         { .compatible = "simple-bus", },
-        { .compatible = "xlnx,plb-v46-1.00.a", },
-        { .compatible = "xlnx,opb-v20-1.10.c", },
-        { .compatible = "xlnx,opb-v20-1.10.b", },
         { .compatible = "xlnx,compound", },
         {}
 };