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Diffstat (limited to 'arch/microblaze/kernel/intc.c')
-rw-r--r--arch/microblaze/kernel/intc.c73
1 files changed, 30 insertions, 43 deletions
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index 03172c1da770..c88f066f41bd 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -40,59 +40,46 @@ unsigned int nr_irq;
40#define MER_ME (1<<0) 40#define MER_ME (1<<0)
41#define MER_HIE (1<<1) 41#define MER_HIE (1<<1)
42 42
43static void intc_enable_or_unmask(unsigned int irq) 43static void intc_enable_or_unmask(struct irq_data *d)
44{ 44{
45 unsigned long mask = 1 << irq; 45 unsigned long mask = 1 << d->irq;
46 pr_debug("enable_or_unmask: %d\n", irq); 46 pr_debug("enable_or_unmask: %d\n", d->irq);
47 out_be32(INTC_BASE + SIE, mask); 47 out_be32(INTC_BASE + SIE, mask);
48 48
49 /* ack level irqs because they can't be acked during 49 /* ack level irqs because they can't be acked during
50 * ack function since the handle_level_irq function 50 * ack function since the handle_level_irq function
51 * acks the irq before calling the interrupt handler 51 * acks the irq before calling the interrupt handler
52 */ 52 */
53 if (irq_desc[irq].status & IRQ_LEVEL) 53 if (irqd_is_level_type(d))
54 out_be32(INTC_BASE + IAR, mask); 54 out_be32(INTC_BASE + IAR, mask);
55} 55}
56 56
57static void intc_disable_or_mask(unsigned int irq) 57static void intc_disable_or_mask(struct irq_data *d)
58{ 58{
59 pr_debug("disable: %d\n", irq); 59 pr_debug("disable: %d\n", d->irq);
60 out_be32(INTC_BASE + CIE, 1 << irq); 60 out_be32(INTC_BASE + CIE, 1 << d->irq);
61} 61}
62 62
63static void intc_ack(unsigned int irq) 63static void intc_ack(struct irq_data *d)
64{ 64{
65 pr_debug("ack: %d\n", irq); 65 pr_debug("ack: %d\n", d->irq);
66 out_be32(INTC_BASE + IAR, 1 << irq); 66 out_be32(INTC_BASE + IAR, 1 << d->irq);
67} 67}
68 68
69static void intc_mask_ack(unsigned int irq) 69static void intc_mask_ack(struct irq_data *d)
70{ 70{
71 unsigned long mask = 1 << irq; 71 unsigned long mask = 1 << d->irq;
72 pr_debug("disable_and_ack: %d\n", irq); 72 pr_debug("disable_and_ack: %d\n", d->irq);
73 out_be32(INTC_BASE + CIE, mask); 73 out_be32(INTC_BASE + CIE, mask);
74 out_be32(INTC_BASE + IAR, mask); 74 out_be32(INTC_BASE + IAR, mask);
75} 75}
76 76
77static void intc_end(unsigned int irq)
78{
79 unsigned long mask = 1 << irq;
80 pr_debug("end: %d\n", irq);
81 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
82 out_be32(INTC_BASE + SIE, mask);
83 /* ack level sensitive intr */
84 if (irq_desc[irq].status & IRQ_LEVEL)
85 out_be32(INTC_BASE + IAR, mask);
86 }
87}
88
89static struct irq_chip intc_dev = { 77static struct irq_chip intc_dev = {
90 .name = "Xilinx INTC", 78 .name = "Xilinx INTC",
91 .unmask = intc_enable_or_unmask, 79 .irq_unmask = intc_enable_or_unmask,
92 .mask = intc_disable_or_mask, 80 .irq_mask = intc_disable_or_mask,
93 .ack = intc_ack, 81 .irq_ack = intc_ack,
94 .mask_ack = intc_mask_ack, 82 .irq_mask_ack = intc_mask_ack,
95 .end = intc_end,
96}; 83};
97 84
98unsigned int get_irq(struct pt_regs *regs) 85unsigned int get_irq(struct pt_regs *regs)
@@ -126,11 +113,8 @@ void __init init_IRQ(void)
126 0 113 0
127 }; 114 };
128#endif 115#endif
129 static char *intc_list[] = { 116 const char * const intc_list[] = {
130 "xlnx,xps-intc-1.00.a", 117 "xlnx,xps-intc-1.00.a",
131 "xlnx,opb-intc-1.00.c",
132 "xlnx,opb-intc-1.00.b",
133 "xlnx,opb-intc-1.00.a",
134 NULL 118 NULL
135 }; 119 };
136 120
@@ -141,12 +125,15 @@ void __init init_IRQ(void)
141 } 125 }
142 BUG_ON(!intc); 126 BUG_ON(!intc);
143 127
144 intc_baseaddr = *(int *) of_get_property(intc, "reg", NULL); 128 intc_baseaddr = be32_to_cpup(of_get_property(intc,
129 "reg", NULL));
145 intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE); 130 intc_baseaddr = (unsigned long) ioremap(intc_baseaddr, PAGE_SIZE);
146 nr_irq = *(int *) of_get_property(intc, "xlnx,num-intr-inputs", NULL); 131 nr_irq = be32_to_cpup(of_get_property(intc,
132 "xlnx,num-intr-inputs", NULL));
147 133
148 intr_type = 134 intr_type =
149 *(int *) of_get_property(intc, "xlnx,kind-of-intr", NULL); 135 be32_to_cpup(of_get_property(intc,
136 "xlnx,kind-of-intr", NULL));
150 if (intr_type >= (1 << (nr_irq + 1))) 137 if (intr_type >= (1 << (nr_irq + 1)))
151 printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n"); 138 printk(KERN_INFO " ERROR: Mismatch in kind-of-intr param\n");
152 139
@@ -170,13 +157,13 @@ void __init init_IRQ(void)
170 157
171 for (i = 0; i < nr_irq; ++i) { 158 for (i = 0; i < nr_irq; ++i) {
172 if (intr_type & (0x00000001 << i)) { 159 if (intr_type & (0x00000001 << i)) {
173 set_irq_chip_and_handler_name(i, &intc_dev, 160 irq_set_chip_and_handler_name(i, &intc_dev,
174 handle_edge_irq, intc_dev.name); 161 handle_edge_irq, "edge");
175 irq_desc[i].status &= ~IRQ_LEVEL; 162 irq_clear_status_flags(i, IRQ_LEVEL);
176 } else { 163 } else {
177 set_irq_chip_and_handler_name(i, &intc_dev, 164 irq_set_chip_and_handler_name(i, &intc_dev,
178 handle_level_irq, intc_dev.name); 165 handle_level_irq, "level");
179 irq_desc[i].status |= IRQ_LEVEL; 166 irq_set_status_flags(i, IRQ_LEVEL);
180 } 167 }
181 } 168 }
182} 169}