ia64: expose number of page table levels on Kconfig level

We would want to use number of page table level to define mm_struct.
Let's expose it as CONFIG_PGTABLE_LEVELS.

We need to define PGTABLE_LEVELS before sourcing init/Kconfig:
arch/Kconfig will define default value and it's sourced from init/Kconfig.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

2 files changed, 8 insertions, 8 deletions

diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
index 18e794a57248..e42bf7a913f3 100644
--- a/arch/ia64/kernel/ivt.S
+++ b/arch/ia64/kernel/ivt.S
@@ -146,7 +146,7 @@ ENTRY(vhpt_miss)
 (p6)    dep r17=r18,r19,3,(PAGE_SHIFT-3)        // r17=pgd_offset for region 5
 (p7)    dep r17=r18,r17,3,(PAGE_SHIFT-6)        // r17=pgd_offset for region[0-4]
         cmp.eq p7,p6=0,r21                      // unused address bits all zeroes?
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
         shr.u r28=r22,PUD_SHIFT                 // shift pud index into position
 #else
         shr.u r18=r22,PMD_SHIFT                 // shift pmd index into position
@@ -155,7 +155,7 @@ ENTRY(vhpt_miss)
         ld8 r17=[r17]                           // get *pgd (may be 0)
         ;;
 (p7)    cmp.eq p6,p7=r17,r0                     // was pgd_present(*pgd) == NULL?
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
         dep r28=r28,r17,3,(PAGE_SHIFT-3)        // r28=pud_offset(pgd,addr)
         ;;
         shr.u r18=r22,PMD_SHIFT                 // shift pmd index into position
@@ -222,13 +222,13 @@ ENTRY(vhpt_miss)
          */
         ld8 r25=[r21]                           // read *pte again
         ld8 r26=[r17]                           // read *pmd again
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
         ld8 r19=[r28]                           // read *pud again
 #endif
         cmp.ne p6,p7=r0,r0
         ;;
         cmp.ne.or.andcm p6,p7=r26,r20           // did *pmd change
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
         cmp.ne.or.andcm p6,p7=r19,r29           // did *pud change
 #endif
         mov r27=PAGE_SHIFT<<2
@@ -476,7 +476,7 @@ ENTRY(nested_dtlb_miss)
 (p6)    dep r17=r18,r19,3,(PAGE_SHIFT-3)        // r17=pgd_offset for region 5
 (p7)    dep r17=r18,r17,3,(PAGE_SHIFT-6)        // r17=pgd_offset for region[0-4]
         cmp.eq p7,p6=0,r21                      // unused address bits all zeroes?
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
         shr.u r18=r22,PUD_SHIFT                 // shift pud index into position
 #else
         shr.u r18=r22,PMD_SHIFT                 // shift pmd index into position
@@ -487,7 +487,7 @@ ENTRY(nested_dtlb_miss)
 (p7)    cmp.eq p6,p7=r17,r0                     // was pgd_present(*pgd) == NULL?
         dep r17=r18,r17,3,(PAGE_SHIFT-3)        // r17=p[u|m]d_offset(pgd,addr)
         ;;
-#ifdef CONFIG_PGTABLE_4
+#if CONFIG_PGTABLE_LEVELS == 4
 (p7)    ld8 r17=[r17]                           // get *pud (may be 0)
         shr.u r18=r22,PMD_SHIFT                 // shift pmd index into position
         ;;
diff --git a/arch/ia64/kernel/machine_kexec.c b/arch/ia64/kernel/machine_kexec.c
index 5151a649c96b..b72cd7a07222 100644
--- a/arch/ia64/kernel/machine_kexec.c
+++ b/arch/ia64/kernel/machine_kexec.c
@@ -156,9 +156,9 @@ void arch_crash_save_vmcoreinfo(void)
         VMCOREINFO_OFFSET(node_memblk_s, start_paddr);
         VMCOREINFO_OFFSET(node_memblk_s, size);
 #endif
-#ifdef CONFIG_PGTABLE_3
+#if CONFIG_PGTABLE_LEVELS == 3
         VMCOREINFO_CONFIG(PGTABLE_3);
-#elif defined(CONFIG_PGTABLE_4)
+#elif CONFIG_PGTABLE_LEVELS == 4
         VMCOREINFO_CONFIG(PGTABLE_4);
 #endif
 }