diff options
author | Kirill A. Shutemov <kirill.shutemov@linux.intel.com> | 2015-04-14 18:45:45 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-14 19:49:02 -0400 |
commit | 4d66bcc7cf762e82703b94d416245d4a216c79ae (patch) | |
tree | 66178a36412f885b6171ab839c9190750c94e06f | |
parent | 1bcad26e9d5362d4890ab5718d729ee9cd85a493 (diff) |
ia64: expose number of page table levels on Kconfig level
We would want to use number of page table level to define mm_struct.
Let's expose it as CONFIG_PGTABLE_LEVELS.
We need to define PGTABLE_LEVELS before sourcing init/Kconfig:
arch/Kconfig will define default value and it's sourced from init/Kconfig.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | arch/ia64/Kconfig | 18 | ||||
-rw-r--r-- | arch/ia64/include/asm/page.h | 4 | ||||
-rw-r--r-- | arch/ia64/include/asm/pgalloc.h | 4 | ||||
-rw-r--r-- | arch/ia64/include/asm/pgtable.h | 12 | ||||
-rw-r--r-- | arch/ia64/kernel/ivt.S | 12 | ||||
-rw-r--r-- | arch/ia64/kernel/machine_kexec.c | 4 |
6 files changed, 23 insertions, 31 deletions
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 074e52bf815c..4f9a6661491b 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
@@ -1,3 +1,8 @@ | |||
1 | config PGTABLE_LEVELS | ||
2 | int "Page Table Levels" if !IA64_PAGE_SIZE_64KB | ||
3 | range 3 4 if !IA64_PAGE_SIZE_64KB | ||
4 | default 3 | ||
5 | |||
1 | source "init/Kconfig" | 6 | source "init/Kconfig" |
2 | 7 | ||
3 | source "kernel/Kconfig.freezer" | 8 | source "kernel/Kconfig.freezer" |
@@ -286,19 +291,6 @@ config IA64_PAGE_SIZE_64KB | |||
286 | 291 | ||
287 | endchoice | 292 | endchoice |
288 | 293 | ||
289 | choice | ||
290 | prompt "Page Table Levels" | ||
291 | default PGTABLE_3 | ||
292 | |||
293 | config PGTABLE_3 | ||
294 | bool "3 Levels" | ||
295 | |||
296 | config PGTABLE_4 | ||
297 | depends on !IA64_PAGE_SIZE_64KB | ||
298 | bool "4 Levels" | ||
299 | |||
300 | endchoice | ||
301 | |||
302 | if IA64_HP_SIM | 294 | if IA64_HP_SIM |
303 | config HZ | 295 | config HZ |
304 | default 32 | 296 | default 32 |
diff --git a/arch/ia64/include/asm/page.h b/arch/ia64/include/asm/page.h index 1f1bf144fe62..ec48bb9f95e1 100644 --- a/arch/ia64/include/asm/page.h +++ b/arch/ia64/include/asm/page.h | |||
@@ -173,7 +173,7 @@ get_order (unsigned long size) | |||
173 | */ | 173 | */ |
174 | typedef struct { unsigned long pte; } pte_t; | 174 | typedef struct { unsigned long pte; } pte_t; |
175 | typedef struct { unsigned long pmd; } pmd_t; | 175 | typedef struct { unsigned long pmd; } pmd_t; |
176 | #ifdef CONFIG_PGTABLE_4 | 176 | #if CONFIG_PGTABLE_LEVELS == 4 |
177 | typedef struct { unsigned long pud; } pud_t; | 177 | typedef struct { unsigned long pud; } pud_t; |
178 | #endif | 178 | #endif |
179 | typedef struct { unsigned long pgd; } pgd_t; | 179 | typedef struct { unsigned long pgd; } pgd_t; |
@@ -182,7 +182,7 @@ get_order (unsigned long size) | |||
182 | 182 | ||
183 | # define pte_val(x) ((x).pte) | 183 | # define pte_val(x) ((x).pte) |
184 | # define pmd_val(x) ((x).pmd) | 184 | # define pmd_val(x) ((x).pmd) |
185 | #ifdef CONFIG_PGTABLE_4 | 185 | #if CONFIG_PGTABLE_LEVELS == 4 |
186 | # define pud_val(x) ((x).pud) | 186 | # define pud_val(x) ((x).pud) |
187 | #endif | 187 | #endif |
188 | # define pgd_val(x) ((x).pgd) | 188 | # define pgd_val(x) ((x).pgd) |
diff --git a/arch/ia64/include/asm/pgalloc.h b/arch/ia64/include/asm/pgalloc.h index 5767cdfc08db..f5e70e961948 100644 --- a/arch/ia64/include/asm/pgalloc.h +++ b/arch/ia64/include/asm/pgalloc.h | |||
@@ -32,7 +32,7 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | |||
32 | quicklist_free(0, NULL, pgd); | 32 | quicklist_free(0, NULL, pgd); |
33 | } | 33 | } |
34 | 34 | ||
35 | #ifdef CONFIG_PGTABLE_4 | 35 | #if CONFIG_PGTABLE_LEVELS == 4 |
36 | static inline void | 36 | static inline void |
37 | pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud) | 37 | pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud) |
38 | { | 38 | { |
@@ -49,7 +49,7 @@ static inline void pud_free(struct mm_struct *mm, pud_t *pud) | |||
49 | quicklist_free(0, NULL, pud); | 49 | quicklist_free(0, NULL, pud); |
50 | } | 50 | } |
51 | #define __pud_free_tlb(tlb, pud, address) pud_free((tlb)->mm, pud) | 51 | #define __pud_free_tlb(tlb, pud, address) pud_free((tlb)->mm, pud) |
52 | #endif /* CONFIG_PGTABLE_4 */ | 52 | #endif /* CONFIG_PGTABLE_LEVELS == 4 */ |
53 | 53 | ||
54 | static inline void | 54 | static inline void |
55 | pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd) | 55 | pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd) |
diff --git a/arch/ia64/include/asm/pgtable.h b/arch/ia64/include/asm/pgtable.h index 7b6f8801df57..9f3ed9ee8f13 100644 --- a/arch/ia64/include/asm/pgtable.h +++ b/arch/ia64/include/asm/pgtable.h | |||
@@ -99,7 +99,7 @@ | |||
99 | #define PMD_MASK (~(PMD_SIZE-1)) | 99 | #define PMD_MASK (~(PMD_SIZE-1)) |
100 | #define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT)) | 100 | #define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT)) |
101 | 101 | ||
102 | #ifdef CONFIG_PGTABLE_4 | 102 | #if CONFIG_PGTABLE_LEVELS == 4 |
103 | /* | 103 | /* |
104 | * Definitions for second level: | 104 | * Definitions for second level: |
105 | * | 105 | * |
@@ -117,7 +117,7 @@ | |||
117 | * | 117 | * |
118 | * PGDIR_SHIFT determines what a first-level page table entry can map. | 118 | * PGDIR_SHIFT determines what a first-level page table entry can map. |
119 | */ | 119 | */ |
120 | #ifdef CONFIG_PGTABLE_4 | 120 | #if CONFIG_PGTABLE_LEVELS == 4 |
121 | #define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT)) | 121 | #define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT)) |
122 | #else | 122 | #else |
123 | #define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) | 123 | #define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) |
@@ -180,7 +180,7 @@ | |||
180 | #define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) | 180 | #define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) |
181 | 181 | ||
182 | #define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) | 182 | #define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) |
183 | #ifdef CONFIG_PGTABLE_4 | 183 | #if CONFIG_PGTABLE_LEVELS == 4 |
184 | #define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e)) | 184 | #define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e)) |
185 | #endif | 185 | #endif |
186 | #define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) | 186 | #define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) |
@@ -281,7 +281,7 @@ extern unsigned long VMALLOC_END; | |||
281 | #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK)) | 281 | #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK)) |
282 | #define pud_page(pud) virt_to_page((pud_val(pud) + PAGE_OFFSET)) | 282 | #define pud_page(pud) virt_to_page((pud_val(pud) + PAGE_OFFSET)) |
283 | 283 | ||
284 | #ifdef CONFIG_PGTABLE_4 | 284 | #if CONFIG_PGTABLE_LEVELS == 4 |
285 | #define pgd_none(pgd) (!pgd_val(pgd)) | 285 | #define pgd_none(pgd) (!pgd_val(pgd)) |
286 | #define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd))) | 286 | #define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd))) |
287 | #define pgd_present(pgd) (pgd_val(pgd) != 0UL) | 287 | #define pgd_present(pgd) (pgd_val(pgd) != 0UL) |
@@ -384,7 +384,7 @@ pgd_offset (const struct mm_struct *mm, unsigned long address) | |||
384 | here. */ | 384 | here. */ |
385 | #define pgd_offset_gate(mm, addr) pgd_offset_k(addr) | 385 | #define pgd_offset_gate(mm, addr) pgd_offset_k(addr) |
386 | 386 | ||
387 | #ifdef CONFIG_PGTABLE_4 | 387 | #if CONFIG_PGTABLE_LEVELS == 4 |
388 | /* Find an entry in the second-level page table.. */ | 388 | /* Find an entry in the second-level page table.. */ |
389 | #define pud_offset(dir,addr) \ | 389 | #define pud_offset(dir,addr) \ |
390 | ((pud_t *) pgd_page_vaddr(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) | 390 | ((pud_t *) pgd_page_vaddr(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) |
@@ -586,7 +586,7 @@ extern struct page *zero_page_memmap_ptr; | |||
586 | #define __HAVE_ARCH_PGD_OFFSET_GATE | 586 | #define __HAVE_ARCH_PGD_OFFSET_GATE |
587 | 587 | ||
588 | 588 | ||
589 | #ifndef CONFIG_PGTABLE_4 | 589 | #if CONFIG_PGTABLE_LEVELS == 3 |
590 | #include <asm-generic/pgtable-nopud.h> | 590 | #include <asm-generic/pgtable-nopud.h> |
591 | #endif | 591 | #endif |
592 | #include <asm-generic/pgtable.h> | 592 | #include <asm-generic/pgtable.h> |
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S index 18e794a57248..e42bf7a913f3 100644 --- a/arch/ia64/kernel/ivt.S +++ b/arch/ia64/kernel/ivt.S | |||
@@ -146,7 +146,7 @@ ENTRY(vhpt_miss) | |||
146 | (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5 | 146 | (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5 |
147 | (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4] | 147 | (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4] |
148 | cmp.eq p7,p6=0,r21 // unused address bits all zeroes? | 148 | cmp.eq p7,p6=0,r21 // unused address bits all zeroes? |
149 | #ifdef CONFIG_PGTABLE_4 | 149 | #if CONFIG_PGTABLE_LEVELS == 4 |
150 | shr.u r28=r22,PUD_SHIFT // shift pud index into position | 150 | shr.u r28=r22,PUD_SHIFT // shift pud index into position |
151 | #else | 151 | #else |
152 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position | 152 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position |
@@ -155,7 +155,7 @@ ENTRY(vhpt_miss) | |||
155 | ld8 r17=[r17] // get *pgd (may be 0) | 155 | ld8 r17=[r17] // get *pgd (may be 0) |
156 | ;; | 156 | ;; |
157 | (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL? | 157 | (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL? |
158 | #ifdef CONFIG_PGTABLE_4 | 158 | #if CONFIG_PGTABLE_LEVELS == 4 |
159 | dep r28=r28,r17,3,(PAGE_SHIFT-3) // r28=pud_offset(pgd,addr) | 159 | dep r28=r28,r17,3,(PAGE_SHIFT-3) // r28=pud_offset(pgd,addr) |
160 | ;; | 160 | ;; |
161 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position | 161 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position |
@@ -222,13 +222,13 @@ ENTRY(vhpt_miss) | |||
222 | */ | 222 | */ |
223 | ld8 r25=[r21] // read *pte again | 223 | ld8 r25=[r21] // read *pte again |
224 | ld8 r26=[r17] // read *pmd again | 224 | ld8 r26=[r17] // read *pmd again |
225 | #ifdef CONFIG_PGTABLE_4 | 225 | #if CONFIG_PGTABLE_LEVELS == 4 |
226 | ld8 r19=[r28] // read *pud again | 226 | ld8 r19=[r28] // read *pud again |
227 | #endif | 227 | #endif |
228 | cmp.ne p6,p7=r0,r0 | 228 | cmp.ne p6,p7=r0,r0 |
229 | ;; | 229 | ;; |
230 | cmp.ne.or.andcm p6,p7=r26,r20 // did *pmd change | 230 | cmp.ne.or.andcm p6,p7=r26,r20 // did *pmd change |
231 | #ifdef CONFIG_PGTABLE_4 | 231 | #if CONFIG_PGTABLE_LEVELS == 4 |
232 | cmp.ne.or.andcm p6,p7=r19,r29 // did *pud change | 232 | cmp.ne.or.andcm p6,p7=r19,r29 // did *pud change |
233 | #endif | 233 | #endif |
234 | mov r27=PAGE_SHIFT<<2 | 234 | mov r27=PAGE_SHIFT<<2 |
@@ -476,7 +476,7 @@ ENTRY(nested_dtlb_miss) | |||
476 | (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5 | 476 | (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5 |
477 | (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4] | 477 | (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4] |
478 | cmp.eq p7,p6=0,r21 // unused address bits all zeroes? | 478 | cmp.eq p7,p6=0,r21 // unused address bits all zeroes? |
479 | #ifdef CONFIG_PGTABLE_4 | 479 | #if CONFIG_PGTABLE_LEVELS == 4 |
480 | shr.u r18=r22,PUD_SHIFT // shift pud index into position | 480 | shr.u r18=r22,PUD_SHIFT // shift pud index into position |
481 | #else | 481 | #else |
482 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position | 482 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position |
@@ -487,7 +487,7 @@ ENTRY(nested_dtlb_miss) | |||
487 | (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL? | 487 | (p7) cmp.eq p6,p7=r17,r0 // was pgd_present(*pgd) == NULL? |
488 | dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=p[u|m]d_offset(pgd,addr) | 488 | dep r17=r18,r17,3,(PAGE_SHIFT-3) // r17=p[u|m]d_offset(pgd,addr) |
489 | ;; | 489 | ;; |
490 | #ifdef CONFIG_PGTABLE_4 | 490 | #if CONFIG_PGTABLE_LEVELS == 4 |
491 | (p7) ld8 r17=[r17] // get *pud (may be 0) | 491 | (p7) ld8 r17=[r17] // get *pud (may be 0) |
492 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position | 492 | shr.u r18=r22,PMD_SHIFT // shift pmd index into position |
493 | ;; | 493 | ;; |
diff --git a/arch/ia64/kernel/machine_kexec.c b/arch/ia64/kernel/machine_kexec.c index 5151a649c96b..b72cd7a07222 100644 --- a/arch/ia64/kernel/machine_kexec.c +++ b/arch/ia64/kernel/machine_kexec.c | |||
@@ -156,9 +156,9 @@ void arch_crash_save_vmcoreinfo(void) | |||
156 | VMCOREINFO_OFFSET(node_memblk_s, start_paddr); | 156 | VMCOREINFO_OFFSET(node_memblk_s, start_paddr); |
157 | VMCOREINFO_OFFSET(node_memblk_s, size); | 157 | VMCOREINFO_OFFSET(node_memblk_s, size); |
158 | #endif | 158 | #endif |
159 | #ifdef CONFIG_PGTABLE_3 | 159 | #if CONFIG_PGTABLE_LEVELS == 3 |
160 | VMCOREINFO_CONFIG(PGTABLE_3); | 160 | VMCOREINFO_CONFIG(PGTABLE_3); |
161 | #elif defined(CONFIG_PGTABLE_4) | 161 | #elif CONFIG_PGTABLE_LEVELS == 4 |
162 | VMCOREINFO_CONFIG(PGTABLE_4); | 162 | VMCOREINFO_CONFIG(PGTABLE_4); |
163 | #endif | 163 | #endif |
164 | } | 164 | } |