diff options
author | Mike Frysinger <vapier@gentoo.org> | 2011-03-30 03:59:00 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2011-05-25 08:13:42 -0400 |
commit | 3dd666067d2b285724c828946e83100ea4c43d4b (patch) | |
tree | bb0e0c060013e12a7d6674f8139a5fec59cf6fbc /arch/blackfin/mach-bf538/include | |
parent | 6adc521e7127732512ebd7fcfd3926d7970a82e1 (diff) |
Blackfin: clean up style in irq defines
These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.
The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf538/include')
-rw-r--r-- | arch/blackfin/mach-bf538/include/mach/irq.h | 45 |
1 files changed, 23 insertions, 22 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h index 08d47675d71f..07ca069d37cd 100644 --- a/arch/blackfin/mach-bf538/include/mach/irq.h +++ b/arch/blackfin/mach-bf538/include/mach/irq.h | |||
@@ -9,7 +9,7 @@ | |||
9 | 9 | ||
10 | #include <mach-common/irq.h> | 10 | #include <mach-common/irq.h> |
11 | 11 | ||
12 | #define NR_PERI_INTS (2 * 32) | 12 | #define NR_PERI_INTS (2 * 32) |
13 | 13 | ||
14 | #define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */ | 14 | #define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */ |
15 | #define IRQ_DMA0_ERROR BFIN_IRQ(1) /* DMA Error 0 (generic) */ | 15 | #define IRQ_DMA0_ERROR BFIN_IRQ(1) /* DMA Error 0 (generic) */ |
@@ -62,26 +62,26 @@ | |||
62 | 62 | ||
63 | #define SYS_IRQS BFIN_IRQ(63) /* 70 */ | 63 | #define SYS_IRQS BFIN_IRQ(63) /* 70 */ |
64 | 64 | ||
65 | #define IRQ_PF0 71 | 65 | #define IRQ_PF0 71 |
66 | #define IRQ_PF1 72 | 66 | #define IRQ_PF1 72 |
67 | #define IRQ_PF2 73 | 67 | #define IRQ_PF2 73 |
68 | #define IRQ_PF3 74 | 68 | #define IRQ_PF3 74 |
69 | #define IRQ_PF4 75 | 69 | #define IRQ_PF4 75 |
70 | #define IRQ_PF5 76 | 70 | #define IRQ_PF5 76 |
71 | #define IRQ_PF6 77 | 71 | #define IRQ_PF6 77 |
72 | #define IRQ_PF7 78 | 72 | #define IRQ_PF7 78 |
73 | #define IRQ_PF8 79 | 73 | #define IRQ_PF8 79 |
74 | #define IRQ_PF9 80 | 74 | #define IRQ_PF9 80 |
75 | #define IRQ_PF10 81 | 75 | #define IRQ_PF10 81 |
76 | #define IRQ_PF11 82 | 76 | #define IRQ_PF11 82 |
77 | #define IRQ_PF12 83 | 77 | #define IRQ_PF12 83 |
78 | #define IRQ_PF13 84 | 78 | #define IRQ_PF13 84 |
79 | #define IRQ_PF14 85 | 79 | #define IRQ_PF14 85 |
80 | #define IRQ_PF15 86 | 80 | #define IRQ_PF15 86 |
81 | 81 | ||
82 | #define GPIO_IRQ_BASE IRQ_PF0 | 82 | #define GPIO_IRQ_BASE IRQ_PF0 |
83 | 83 | ||
84 | #define NR_MACH_IRQS (IRQ_PF15 + 1) | 84 | #define NR_MACH_IRQS (IRQ_PF15 + 1) |
85 | 85 | ||
86 | /* IAR0 BIT FIELDS */ | 86 | /* IAR0 BIT FIELDS */ |
87 | #define IRQ_PLL_WAKEUP_POS 0 | 87 | #define IRQ_PLL_WAKEUP_POS 0 |
@@ -144,4 +144,5 @@ | |||
144 | #define IRQ_CAN_TX_POS 0 | 144 | #define IRQ_CAN_TX_POS 0 |
145 | #define IRQ_MEM1_DMA0_POS 4 | 145 | #define IRQ_MEM1_DMA0_POS 4 |
146 | #define IRQ_MEM1_DMA1_POS 8 | 146 | #define IRQ_MEM1_DMA1_POS 8 |
147 | #endif /* _BF538_IRQ_H_ */ | 147 | |
148 | #endif | ||