diff options
author | Graf Yang <graf.yang@analog.com> | 2009-05-06 05:59:11 -0400 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2009-06-12 06:11:26 -0400 |
commit | f5879fda09ea98d7aa845a0e0fa7e508452e5f9f (patch) | |
tree | b1404b8cbaa64758f0d1caac3349384e42e34057 /arch/blackfin/mach-bf538/include/mach/defBF539.h | |
parent | f339f46b05cfe289024b15a0525c8b61f1426a88 (diff) |
Blackfin: add MDMA defines to make cross-variant coding easier
Add some defines to make the BF538/BF561 look like most other Blackfin
parts in that it has a MDMA0 channel available for low level init.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf538/include/mach/defBF539.h')
-rw-r--r-- | arch/blackfin/mach-bf538/include/mach/defBF539.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h index 6adbfcc65a35..bdc330cd0e1c 100644 --- a/arch/blackfin/mach-bf538/include/mach/defBF539.h +++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h | |||
@@ -412,6 +412,62 @@ | |||
412 | #define MDMA0_S1_CURR_X_COUNT 0xFFC00EF0 /* MemDMA0 Stream 1 Source Current X Count Register */ | 412 | #define MDMA0_S1_CURR_X_COUNT 0xFFC00EF0 /* MemDMA0 Stream 1 Source Current X Count Register */ |
413 | #define MDMA0_S1_CURR_Y_COUNT 0xFFC00EF8 /* MemDMA0 Stream 1 Source Current Y Count Register */ | 413 | #define MDMA0_S1_CURR_Y_COUNT 0xFFC00EF8 /* MemDMA0 Stream 1 Source Current Y Count Register */ |
414 | 414 | ||
415 | #define MDMA_D0_NEXT_DESC_PTR MDMA0_D0_NEXT_DESC_PTR | ||
416 | #define MDMA_D0_START_ADDR MDMA0_D0_START_ADDR | ||
417 | #define MDMA_D0_CONFIG MDMA0_D0_CONFIG | ||
418 | #define MDMA_D0_X_COUNT MDMA0_D0_X_COUNT | ||
419 | #define MDMA_D0_X_MODIFY MDMA0_D0_X_MODIFY | ||
420 | #define MDMA_D0_Y_COUNT MDMA0_D0_Y_COUNT | ||
421 | #define MDMA_D0_Y_MODIFY MDMA0_D0_Y_MODIFY | ||
422 | #define MDMA_D0_CURR_DESC_PTR MDMA0_D0_CURR_DESC_PTR | ||
423 | #define MDMA_D0_CURR_ADDR MDMA0_D0_CURR_ADDR | ||
424 | #define MDMA_D0_IRQ_STATUS MDMA0_D0_IRQ_STATUS | ||
425 | #define MDMA_D0_PERIPHERAL_MAP MDMA0_D0_PERIPHERAL_MAP | ||
426 | #define MDMA_D0_CURR_X_COUNT MDMA0_D0_CURR_X_COUNT | ||
427 | #define MDMA_D0_CURR_Y_COUNT MDMA0_D0_CURR_Y_COUNT | ||
428 | |||
429 | #define MDMA_S0_NEXT_DESC_PTR MDMA0_S0_NEXT_DESC_PTR | ||
430 | #define MDMA_S0_START_ADDR MDMA0_S0_START_ADDR | ||
431 | #define MDMA_S0_CONFIG MDMA0_S0_CONFIG | ||
432 | #define MDMA_S0_X_COUNT MDMA0_S0_X_COUNT | ||
433 | #define MDMA_S0_X_MODIFY MDMA0_S0_X_MODIFY | ||
434 | #define MDMA_S0_Y_COUNT MDMA0_S0_Y_COUNT | ||
435 | #define MDMA_S0_Y_MODIFY MDMA0_S0_Y_MODIFY | ||
436 | #define MDMA_S0_CURR_DESC_PTR MDMA0_S0_CURR_DESC_PTR | ||
437 | #define MDMA_S0_CURR_ADDR MDMA0_S0_CURR_ADDR | ||
438 | #define MDMA_S0_IRQ_STATUS MDMA0_S0_IRQ_STATUS | ||
439 | #define MDMA_S0_PERIPHERAL_MAP MDMA0_S0_PERIPHERAL_MAP | ||
440 | #define MDMA_S0_CURR_X_COUNT MDMA0_S0_CURR_X_COUNT | ||
441 | #define MDMA_S0_CURR_Y_COUNT MDMA0_S0_CURR_Y_COUNT | ||
442 | |||
443 | #define MDMA_D1_NEXT_DESC_PTR MDMA0_D1_NEXT_DESC_PTR | ||
444 | #define MDMA_D1_START_ADDR MDMA0_D1_START_ADDR | ||
445 | #define MDMA_D1_CONFIG MDMA0_D1_CONFIG | ||
446 | #define MDMA_D1_X_COUNT MDMA0_D1_X_COUNT | ||
447 | #define MDMA_D1_X_MODIFY MDMA0_D1_X_MODIFY | ||
448 | #define MDMA_D1_Y_COUNT MDMA0_D1_Y_COUNT | ||
449 | #define MDMA_D1_Y_MODIFY MDMA0_D1_Y_MODIFY | ||
450 | #define MDMA_D1_CURR_DESC_PTR MDMA0_D1_CURR_DESC_PTR | ||
451 | #define MDMA_D1_CURR_ADDR MDMA0_D1_CURR_ADDR | ||
452 | #define MDMA_D1_IRQ_STATUS MDMA0_D1_IRQ_STATUS | ||
453 | #define MDMA_D1_PERIPHERAL_MAP MDMA0_D1_PERIPHERAL_MAP | ||
454 | #define MDMA_D1_CURR_X_COUNT MDMA0_D1_CURR_X_COUNT | ||
455 | #define MDMA_D1_CURR_Y_COUNT MDMA0_D1_CURR_Y_COUNT | ||
456 | |||
457 | #define MDMA_S1_NEXT_DESC_PTR MDMA0_S1_NEXT_DESC_PTR | ||
458 | #define MDMA_S1_START_ADDR MDMA0_S1_START_ADDR | ||
459 | #define MDMA_S1_CONFIG MDMA0_S1_CONFIG | ||
460 | #define MDMA_S1_X_COUNT MDMA0_S1_X_COUNT | ||
461 | #define MDMA_S1_X_MODIFY MDMA0_S1_X_MODIFY | ||
462 | #define MDMA_S1_Y_COUNT MDMA0_S1_Y_COUNT | ||
463 | #define MDMA_S1_Y_MODIFY MDMA0_S1_Y_MODIFY | ||
464 | #define MDMA_S1_CURR_DESC_PTR MDMA0_S1_CURR_DESC_PTR | ||
465 | #define MDMA_S1_CURR_ADDR MDMA0_S1_CURR_ADDR | ||
466 | #define MDMA_S1_IRQ_STATUS MDMA0_S1_IRQ_STATUS | ||
467 | #define MDMA_S1_PERIPHERAL_MAP MDMA0_S1_PERIPHERAL_MAP | ||
468 | #define MDMA_S1_CURR_X_COUNT MDMA0_S1_CURR_X_COUNT | ||
469 | #define MDMA_S1_CURR_Y_COUNT MDMA0_S1_CURR_Y_COUNT | ||
470 | |||
415 | 471 | ||
416 | /* Parallel Peripheral Interface (PPI) (0xFFC01000 - 0xFFC010FF) */ | 472 | /* Parallel Peripheral Interface (PPI) (0xFFC01000 - 0xFFC010FF) */ |
417 | #define PPI_CONTROL 0xFFC01000 /* PPI Control Register */ | 473 | #define PPI_CONTROL 0xFFC01000 /* PPI Control Register */ |