Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

12 files changed, 393 insertions, 0 deletions

diff --git a/arch/blackfin/include/mach-common/irq.h b/arch/blackfin/include/mach-common/irq.h
new file mode 100644
index 000000000000..cab14e911dc2
--- /dev/null
+++ b/arch/blackfin/include/mach-common/irq.h
@@ -0,0 +1,57 @@
+/*
+ * Common Blackfin IRQ definitions (i.e. the CEC)
+ *
+ * Copyright 2005-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later
+ */
+
+#ifndef _MACH_COMMON_IRQ_H_
+#define _MACH_COMMON_IRQ_H_
+
+/*
+ * Core events interrupt source definitions
+ *
+ *  Event Source       Event Name
+ *  Emulation          EMU            0  (highest priority)
+ *  Reset              RST            1
+ *  NMI                NMI            2
+ *  Exception          EVX            3
+ *  Reserved           --             4
+ *  Hardware Error     IVHW           5
+ *  Core Timer         IVTMR          6
+ *  Peripherals        IVG7           7
+ *  Peripherals        IVG8           8
+ *  Peripherals        IVG9           9
+ *  Peripherals        IVG10         10
+ *  Peripherals        IVG11         11
+ *  Peripherals        IVG12         12
+ *  Peripherals        IVG13         13
+ *  Softirq            IVG14         14
+ *  System Call        IVG15         15  (lowest priority)
+ */
+
+/* The ABSTRACT IRQ definitions */
+#define IRQ_EMU                 0       /* Emulation */
+#define IRQ_RST                 1       /* reset */
+#define IRQ_NMI                 2       /* Non Maskable */
+#define IRQ_EVX                 3       /* Exception */
+#define IRQ_UNUSED              4       /* - unused interrupt */
+#define IRQ_HWERR               5       /* Hardware Error */
+#define IRQ_CORETMR             6       /* Core timer */
+
+#define BFIN_IRQ(x)             ((x) + 7)
+
+#define IVG7                    7
+#define IVG8                    8
+#define IVG9                    9
+#define IVG10                   10
+#define IVG11                   11
+#define IVG12                   12
+#define IVG13                   13
+#define IVG14                   14
+#define IVG15                   15
+
+#define NR_IRQS                 (NR_MACH_IRQS + NR_SPARE_IRQS)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/pll.h b/arch/blackfin/include/mach-common/pll.h
new file mode 100644
index 000000000000..382178b361af
--- /dev/null
+++ b/arch/blackfin/include/mach-common/pll.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright 2005-2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef _MACH_COMMON_PLL_H
+#define _MACH_COMMON_PLL_H
+
+#ifndef __ASSEMBLY__
+
+#include <asm/blackfin.h>
+#include <asm/irqflags.h>
+
+#ifndef bfin_iwr_restore
+static inline void
+bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2)
+{
+#ifdef SIC_IWR
+        bfin_write_SIC_IWR(iwr0);
+#else
+        bfin_write_SIC_IWR0(iwr0);
+# ifdef SIC_IWR1
+        bfin_write_SIC_IWR1(iwr1);
+# endif
+# ifdef SIC_IWR2
+        bfin_write_SIC_IWR2(iwr2);
+# endif
+#endif
+}
+#endif
+
+#ifndef bfin_iwr_save
+static inline void
+bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2,
+              unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2)
+{
+#ifdef SIC_IWR
+        *iwr0 = bfin_read_SIC_IWR();
+#else
+        *iwr0 = bfin_read_SIC_IWR0();
+# ifdef SIC_IWR1
+        *iwr1 = bfin_read_SIC_IWR1();
+# endif
+# ifdef SIC_IWR2
+        *iwr2 = bfin_read_SIC_IWR2();
+# endif
+#endif
+        bfin_iwr_restore(niwr0, niwr1, niwr2);
+}
+#endif
+
+static inline void _bfin_write_pll_relock(u32 addr, unsigned int val)
+{
+        unsigned long flags, iwr0, iwr1, iwr2;
+
+        if (val == bfin_read_PLL_CTL())
+                return;
+
+        flags = hard_local_irq_save();
+        /* Enable the PLL Wakeup bit in SIC IWR */
+        bfin_iwr_save(IWR_ENABLE(0), 0, 0, &iwr0, &iwr1, &iwr2);
+
+        bfin_write16(addr, val);
+        SSYNC();
+        asm("IDLE;");
+
+        bfin_iwr_restore(iwr0, iwr1, iwr2);
+        hard_local_irq_restore(flags);
+}
+
+/* Writing to PLL_CTL initiates a PLL relock sequence */
+static inline void bfin_write_PLL_CTL(unsigned int val)
+{
+        _bfin_write_pll_relock(PLL_CTL, val);
+}
+
+/* Writing to VR_CTL initiates a PLL relock sequence */
+static inline void bfin_write_VR_CTL(unsigned int val)
+{
+        _bfin_write_pll_relock(VR_CTL, val);
+}
+
+#endif
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-a.h b/arch/blackfin/include/mach-common/ports-a.h
new file mode 100644
index 000000000000..9f78a761c40a
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-a.h
@@ -0,0 +1,25 @@
+/*
+ * Port A Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_A__
+#define __BFIN_PERIPHERAL_PORT_A__
+
+#define PA0             (1 << 0)
+#define PA1             (1 << 1)
+#define PA2             (1 << 2)
+#define PA3             (1 << 3)
+#define PA4             (1 << 4)
+#define PA5             (1 << 5)
+#define PA6             (1 << 6)
+#define PA7             (1 << 7)
+#define PA8             (1 << 8)
+#define PA9             (1 << 9)
+#define PA10            (1 << 10)
+#define PA11            (1 << 11)
+#define PA12            (1 << 12)
+#define PA13            (1 << 13)
+#define PA14            (1 << 14)
+#define PA15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-b.h b/arch/blackfin/include/mach-common/ports-b.h
new file mode 100644
index 000000000000..b81702f09ec6
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-b.h
@@ -0,0 +1,25 @@
+/*
+ * Port B Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_B__
+#define __BFIN_PERIPHERAL_PORT_B__
+
+#define PB0             (1 << 0)
+#define PB1             (1 << 1)
+#define PB2             (1 << 2)
+#define PB3             (1 << 3)
+#define PB4             (1 << 4)
+#define PB5             (1 << 5)
+#define PB6             (1 << 6)
+#define PB7             (1 << 7)
+#define PB8             (1 << 8)
+#define PB9             (1 << 9)
+#define PB10            (1 << 10)
+#define PB11            (1 << 11)
+#define PB12            (1 << 12)
+#define PB13            (1 << 13)
+#define PB14            (1 << 14)
+#define PB15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-c.h b/arch/blackfin/include/mach-common/ports-c.h
new file mode 100644
index 000000000000..3cc665e0ba08
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-c.h
@@ -0,0 +1,25 @@
+/*
+ * Port C Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_C__
+#define __BFIN_PERIPHERAL_PORT_C__
+
+#define PC0             (1 << 0)
+#define PC1             (1 << 1)
+#define PC2             (1 << 2)
+#define PC3             (1 << 3)
+#define PC4             (1 << 4)
+#define PC5             (1 << 5)
+#define PC6             (1 << 6)
+#define PC7             (1 << 7)
+#define PC8             (1 << 8)
+#define PC9             (1 << 9)
+#define PC10            (1 << 10)
+#define PC11            (1 << 11)
+#define PC12            (1 << 12)
+#define PC13            (1 << 13)
+#define PC14            (1 << 14)
+#define PC15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-d.h b/arch/blackfin/include/mach-common/ports-d.h
new file mode 100644
index 000000000000..868c6a01f1b2
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-d.h
@@ -0,0 +1,25 @@
+/*
+ * Port D Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_D__
+#define __BFIN_PERIPHERAL_PORT_D__
+
+#define PD0             (1 << 0)
+#define PD1             (1 << 1)
+#define PD2             (1 << 2)
+#define PD3             (1 << 3)
+#define PD4             (1 << 4)
+#define PD5             (1 << 5)
+#define PD6             (1 << 6)
+#define PD7             (1 << 7)
+#define PD8             (1 << 8)
+#define PD9             (1 << 9)
+#define PD10            (1 << 10)
+#define PD11            (1 << 11)
+#define PD12            (1 << 12)
+#define PD13            (1 << 13)
+#define PD14            (1 << 14)
+#define PD15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-e.h b/arch/blackfin/include/mach-common/ports-e.h
new file mode 100644
index 000000000000..c88b0d0dd443
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-e.h
@@ -0,0 +1,25 @@
+/*
+ * Port E Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_E__
+#define __BFIN_PERIPHERAL_PORT_E__
+
+#define PE0             (1 << 0)
+#define PE1             (1 << 1)
+#define PE2             (1 << 2)
+#define PE3             (1 << 3)
+#define PE4             (1 << 4)
+#define PE5             (1 << 5)
+#define PE6             (1 << 6)
+#define PE7             (1 << 7)
+#define PE8             (1 << 8)
+#define PE9             (1 << 9)
+#define PE10            (1 << 10)
+#define PE11            (1 << 11)
+#define PE12            (1 << 12)
+#define PE13            (1 << 13)
+#define PE14            (1 << 14)
+#define PE15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-f.h b/arch/blackfin/include/mach-common/ports-f.h
new file mode 100644
index 000000000000..d6af20633278
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-f.h
@@ -0,0 +1,25 @@
+/*
+ * Port F Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_F__
+#define __BFIN_PERIPHERAL_PORT_F__
+
+#define PF0             (1 << 0)
+#define PF1             (1 << 1)
+#define PF2             (1 << 2)
+#define PF3             (1 << 3)
+#define PF4             (1 << 4)
+#define PF5             (1 << 5)
+#define PF6             (1 << 6)
+#define PF7             (1 << 7)
+#define PF8             (1 << 8)
+#define PF9             (1 << 9)
+#define PF10            (1 << 10)
+#define PF11            (1 << 11)
+#define PF12            (1 << 12)
+#define PF13            (1 << 13)
+#define PF14            (1 << 14)
+#define PF15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-g.h b/arch/blackfin/include/mach-common/ports-g.h
new file mode 100644
index 000000000000..09355d333c0e
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-g.h
@@ -0,0 +1,25 @@
+/*
+ * Port G Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_G__
+#define __BFIN_PERIPHERAL_PORT_G__
+
+#define PG0             (1 << 0)
+#define PG1             (1 << 1)
+#define PG2             (1 << 2)
+#define PG3             (1 << 3)
+#define PG4             (1 << 4)
+#define PG5             (1 << 5)
+#define PG6             (1 << 6)
+#define PG7             (1 << 7)
+#define PG8             (1 << 8)
+#define PG9             (1 << 9)
+#define PG10            (1 << 10)
+#define PG11            (1 << 11)
+#define PG12            (1 << 12)
+#define PG13            (1 << 13)
+#define PG14            (1 << 14)
+#define PG15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-h.h b/arch/blackfin/include/mach-common/ports-h.h
new file mode 100644
index 000000000000..fa3910c6fbd4
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-h.h
@@ -0,0 +1,25 @@
+/*
+ * Port H Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_H__
+#define __BFIN_PERIPHERAL_PORT_H__
+
+#define PH0             (1 << 0)
+#define PH1             (1 << 1)
+#define PH2             (1 << 2)
+#define PH3             (1 << 3)
+#define PH4             (1 << 4)
+#define PH5             (1 << 5)
+#define PH6             (1 << 6)
+#define PH7             (1 << 7)
+#define PH8             (1 << 8)
+#define PH9             (1 << 9)
+#define PH10            (1 << 10)
+#define PH11            (1 << 11)
+#define PH12            (1 << 12)
+#define PH13            (1 << 13)
+#define PH14            (1 << 14)
+#define PH15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-i.h b/arch/blackfin/include/mach-common/ports-i.h
new file mode 100644
index 000000000000..f176f08af624
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-i.h
@@ -0,0 +1,25 @@
+/*
+ * Port I Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_I__
+#define __BFIN_PERIPHERAL_PORT_I__
+
+#define PI0             (1 << 0)
+#define PI1             (1 << 1)
+#define PI2             (1 << 2)
+#define PI3             (1 << 3)
+#define PI4             (1 << 4)
+#define PI5             (1 << 5)
+#define PI6             (1 << 6)
+#define PI7             (1 << 7)
+#define PI8             (1 << 8)
+#define PI9             (1 << 9)
+#define PI10            (1 << 10)
+#define PI11            (1 << 11)
+#define PI12            (1 << 12)
+#define PI13            (1 << 13)
+#define PI14            (1 << 14)
+#define PI15            (1 << 15)
+
+#endif
diff --git a/arch/blackfin/include/mach-common/ports-j.h b/arch/blackfin/include/mach-common/ports-j.h
new file mode 100644
index 000000000000..924123ecec5a
--- /dev/null
+++ b/arch/blackfin/include/mach-common/ports-j.h
@@ -0,0 +1,25 @@
+/*
+ * Port J Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PORT_J__
+#define __BFIN_PERIPHERAL_PORT_J__
+
+#define PJ0             (1 << 0)
+#define PJ1             (1 << 1)
+#define PJ2             (1 << 2)
+#define PJ3             (1 << 3)
+#define PJ4             (1 << 4)
+#define PJ5             (1 << 5)
+#define PJ6             (1 << 6)
+#define PJ7             (1 << 7)
+#define PJ8             (1 << 8)
+#define PJ9             (1 << 9)
+#define PJ10            (1 << 10)
+#define PJ11            (1 << 11)
+#define PJ12            (1 << 12)
+#define PJ13            (1 << 13)
+#define PJ14            (1 << 14)
+#define PJ15            (1 << 15)
+
+#endif