diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 19:39:23 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 19:39:23 -0500 |
commit | ab10f1dd914ad87e0370bd8b82f77dcd32b6d941 (patch) | |
tree | 3879eaf6d7ede69d2757a5db2bf0de5e6bd3c367 /arch/arm | |
parent | f56d463423b825ff5bf4b63e0dc443557934165c (diff) | |
parent | 957c461e82f7a8ddcd7fb25c01c43917f64fde33 (diff) |
Merge branch 'dev/cleanup-clocks' into for-next
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-s3c64xx/clock.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-s5p6442/clock.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6450.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/clock.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/clock.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/clock.c | 19 |
7 files changed, 23 insertions, 98 deletions
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 1c98d2ff2ed6..dd3782064508 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable) | |||
127 | return s3c64xx_gate(S3C_SCLK_GATE, clk, enable); | 127 | return s3c64xx_gate(S3C_SCLK_GATE, clk, enable); |
128 | } | 128 | } |
129 | 129 | ||
130 | static struct clk init_clocks_disable[] = { | 130 | static struct clk init_clocks_off[] = { |
131 | { | 131 | { |
132 | .name = "nand", | 132 | .name = "nand", |
133 | .id = -1, | 133 | .id = -1, |
@@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = { | |||
834 | void __init s3c64xx_register_clocks(unsigned long xtal, | 834 | void __init s3c64xx_register_clocks(unsigned long xtal, |
835 | unsigned armclk_divlimit) | 835 | unsigned armclk_divlimit) |
836 | { | 836 | { |
837 | struct clk *clkp; | ||
838 | int ret; | ||
839 | int ptr; | ||
840 | |||
841 | armclk_mask = armclk_divlimit; | 837 | armclk_mask = armclk_divlimit; |
842 | 838 | ||
843 | s3c24xx_register_baseclocks(xtal); | 839 | s3c24xx_register_baseclocks(xtal); |
@@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal, | |||
845 | 841 | ||
846 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 842 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
847 | 843 | ||
848 | clkp = init_clocks_disable; | 844 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
849 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 845 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
850 | |||
851 | ret = s3c24xx_register_clock(clkp); | ||
852 | if (ret < 0) { | ||
853 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
854 | clkp->name, ret); | ||
855 | } | ||
856 | |||
857 | (clkp->enable)(clkp, 0); | ||
858 | } | ||
859 | 846 | ||
860 | s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); | 847 | s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); |
861 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 848 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c index 16d6e7e61b50..fbbc7bede685 100644 --- a/arch/arm/mach-s5p6442/clock.c +++ b/arch/arm/mach-s5p6442/clock.c | |||
@@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void) | |||
340 | clk_pclkd1.rate = pclkd1; | 340 | clk_pclkd1.rate = pclkd1; |
341 | } | 341 | } |
342 | 342 | ||
343 | static struct clk init_clocks_disable[] = { | 343 | static struct clk init_clocks_off[] = { |
344 | { | 344 | { |
345 | .name = "pdma", | 345 | .name = "pdma", |
346 | .id = -1, | 346 | .id = -1, |
@@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = { | |||
408 | 408 | ||
409 | void __init s5p6442_register_clocks(void) | 409 | void __init s5p6442_register_clocks(void) |
410 | { | 410 | { |
411 | struct clk *clkptr; | ||
412 | int i, ret; | ||
413 | |||
414 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 411 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
415 | 412 | ||
416 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 413 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
417 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 414 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
418 | 415 | ||
419 | clkptr = init_clocks_disable; | 416 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
420 | for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) { | 417 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
421 | ret = s3c24xx_register_clock(clkptr); | ||
422 | if (ret < 0) { | ||
423 | printk(KERN_ERR "Fail to register clock %s (%d)\n", | ||
424 | clkptr->name, ret); | ||
425 | } else | ||
426 | (clkptr->enable)(clkptr, 0); | ||
427 | } | ||
428 | 418 | ||
429 | s3c_pwmclk_init(); | 419 | s3c_pwmclk_init(); |
430 | } | 420 | } |
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 40137c6f0488..9f12c2ebf416 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = { | |||
133 | * recommended to keep the following clocks disabled until the driver requests | 133 | * recommended to keep the following clocks disabled until the driver requests |
134 | * for enabling the clock. | 134 | * for enabling the clock. |
135 | */ | 135 | */ |
136 | static struct clk init_clocks_disable[] = { | 136 | static struct clk init_clocks_off[] = { |
137 | { | 137 | { |
138 | .name = "nand", | 138 | .name = "nand", |
139 | .id = -1, | 139 | .id = -1, |
@@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = { | |||
602 | 602 | ||
603 | void __init s5p6440_register_clocks(void) | 603 | void __init s5p6440_register_clocks(void) |
604 | { | 604 | { |
605 | struct clk *clkp; | ||
606 | int ret; | ||
607 | int ptr; | 605 | int ptr; |
608 | 606 | ||
609 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 607 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
@@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void) | |||
614 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 612 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
615 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 613 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
616 | 614 | ||
617 | clkp = init_clocks_disable; | 615 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
618 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 616 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
619 | |||
620 | ret = s3c24xx_register_clock(clkp); | ||
621 | if (ret < 0) { | ||
622 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
623 | clkp->name, ret); | ||
624 | } | ||
625 | (clkp->enable)(clkp, 0); | ||
626 | } | ||
627 | 617 | ||
628 | s3c_pwmclk_init(); | 618 | s3c_pwmclk_init(); |
629 | } | 619 | } |
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index 3f5ac93c455e..4eec457ddccc 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
@@ -181,7 +181,7 @@ static struct clksrc_clk clk_pclk_low = { | |||
181 | * recommended to keep the following clocks disabled until the driver requests | 181 | * recommended to keep the following clocks disabled until the driver requests |
182 | * for enabling the clock. | 182 | * for enabling the clock. |
183 | */ | 183 | */ |
184 | static struct clk init_clocks_disable[] = { | 184 | static struct clk init_clocks_off[] = { |
185 | { | 185 | { |
186 | .name = "usbhost", | 186 | .name = "usbhost", |
187 | .id = -1, | 187 | .id = -1, |
@@ -651,8 +651,6 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) | |||
651 | 651 | ||
652 | void __init s5p6450_register_clocks(void) | 652 | void __init s5p6450_register_clocks(void) |
653 | { | 653 | { |
654 | struct clk *clkp; | ||
655 | int ret; | ||
656 | int ptr; | 654 | int ptr; |
657 | 655 | ||
658 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 656 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
@@ -661,16 +659,8 @@ void __init s5p6450_register_clocks(void) | |||
661 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 659 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
662 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 660 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
663 | 661 | ||
664 | clkp = init_clocks_disable; | 662 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
665 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 663 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
666 | |||
667 | ret = s3c24xx_register_clock(clkp); | ||
668 | if (ret < 0) { | ||
669 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
670 | clkp->name, ret); | ||
671 | } | ||
672 | (clkp->enable)(clkp, 0); | ||
673 | } | ||
674 | 664 | ||
675 | s3c_pwmclk_init(); | 665 | s3c_pwmclk_init(); |
676 | } | 666 | } |
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index 2d4a761a5163..0305e9b8282d 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -396,7 +396,7 @@ static int s5pc100_sclk1_ctrl(struct clk *clk, int enable) | |||
396 | * recommended to keep the following clocks disabled until the driver requests | 396 | * recommended to keep the following clocks disabled until the driver requests |
397 | * for enabling the clock. | 397 | * for enabling the clock. |
398 | */ | 398 | */ |
399 | static struct clk init_clocks_disable[] = { | 399 | static struct clk init_clocks_off[] = { |
400 | { | 400 | { |
401 | .name = "cssys", | 401 | .name = "cssys", |
402 | .id = -1, | 402 | .id = -1, |
@@ -1381,8 +1381,6 @@ static struct clk *clks[] __initdata = { | |||
1381 | 1381 | ||
1382 | void __init s5pc100_register_clocks(void) | 1382 | void __init s5pc100_register_clocks(void) |
1383 | { | 1383 | { |
1384 | struct clk *clkp; | ||
1385 | int ret; | ||
1386 | int ptr; | 1384 | int ptr; |
1387 | 1385 | ||
1388 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 1386 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
@@ -1393,16 +1391,8 @@ void __init s5pc100_register_clocks(void) | |||
1393 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1391 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1394 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1392 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1395 | 1393 | ||
1396 | clkp = init_clocks_disable; | 1394 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1397 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 1395 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1398 | |||
1399 | ret = s3c24xx_register_clock(clkp); | ||
1400 | if (ret < 0) { | ||
1401 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
1402 | clkp->name, ret); | ||
1403 | } | ||
1404 | (clkp->enable)(clkp, 0); | ||
1405 | } | ||
1406 | 1396 | ||
1407 | s3c_pwmclk_init(); | 1397 | s3c_pwmclk_init(); |
1408 | } | 1398 | } |
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index dab6ef3b6ca9..2d599499cefe 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c | |||
@@ -309,7 +309,7 @@ static struct clk_ops clk_fout_apll_ops = { | |||
309 | .get_rate = s5pv210_clk_fout_apll_get_rate, | 309 | .get_rate = s5pv210_clk_fout_apll_get_rate, |
310 | }; | 310 | }; |
311 | 311 | ||
312 | static struct clk init_clocks_disable[] = { | 312 | static struct clk init_clocks_off[] = { |
313 | { | 313 | { |
314 | .name = "pdma", | 314 | .name = "pdma", |
315 | .id = 0, | 315 | .id = 0, |
@@ -1226,13 +1226,9 @@ static struct clk *clks[] __initdata = { | |||
1226 | 1226 | ||
1227 | void __init s5pv210_register_clocks(void) | 1227 | void __init s5pv210_register_clocks(void) |
1228 | { | 1228 | { |
1229 | struct clk *clkp; | ||
1230 | int ret; | ||
1231 | int ptr; | 1229 | int ptr; |
1232 | 1230 | ||
1233 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 1231 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
1234 | if (ret > 0) | ||
1235 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
1236 | 1232 | ||
1237 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1233 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1238 | s3c_register_clksrc(sysclks[ptr], 1); | 1234 | s3c_register_clksrc(sysclks[ptr], 1); |
@@ -1240,15 +1236,8 @@ void __init s5pv210_register_clocks(void) | |||
1240 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1236 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1241 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1237 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1242 | 1238 | ||
1243 | clkp = init_clocks_disable; | 1239 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1244 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 1240 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1245 | ret = s3c24xx_register_clock(clkp); | ||
1246 | if (ret < 0) { | ||
1247 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
1248 | clkp->name, ret); | ||
1249 | } | ||
1250 | (clkp->enable)(clkp, 0); | ||
1251 | } | ||
1252 | 1241 | ||
1253 | s3c_pwmclk_init(); | 1242 | s3c_pwmclk_init(); |
1254 | } | 1243 | } |
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 753fa4465876..fc7c2f8d165e 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c | |||
@@ -384,7 +384,7 @@ static struct clksrc_clk clk_sclk_vpll = { | |||
384 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, | 384 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, |
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct clk init_clocks_disable[] = { | 387 | static struct clk init_clocks_off[] = { |
388 | { | 388 | { |
389 | .name = "timers", | 389 | .name = "timers", |
390 | .id = -1, | 390 | .id = -1, |
@@ -1105,13 +1105,9 @@ static struct clk *clks[] __initdata = { | |||
1105 | 1105 | ||
1106 | void __init s5pv310_register_clocks(void) | 1106 | void __init s5pv310_register_clocks(void) |
1107 | { | 1107 | { |
1108 | struct clk *clkp; | ||
1109 | int ret; | ||
1110 | int ptr; | 1108 | int ptr; |
1111 | 1109 | ||
1112 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 1110 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
1113 | if (ret > 0) | ||
1114 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
1115 | 1111 | ||
1116 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1112 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1117 | s3c_register_clksrc(sysclks[ptr], 1); | 1113 | s3c_register_clksrc(sysclks[ptr], 1); |
@@ -1119,15 +1115,8 @@ void __init s5pv310_register_clocks(void) | |||
1119 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1115 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1120 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1116 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1121 | 1117 | ||
1122 | clkp = init_clocks_disable; | 1118 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1123 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 1119 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1124 | ret = s3c24xx_register_clock(clkp); | ||
1125 | if (ret < 0) { | ||
1126 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
1127 | clkp->name, ret); | ||
1128 | } | ||
1129 | (clkp->enable)(clkp, 0); | ||
1130 | } | ||
1131 | 1120 | ||
1132 | s3c_pwmclk_init(); | 1121 | s3c_pwmclk_init(); |
1133 | } | 1122 | } |