diff options
Diffstat (limited to 'arch/arm/mach-s5pv310/clock.c')
-rw-r--r-- | arch/arm/mach-s5pv310/clock.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 753fa4465876..fc7c2f8d165e 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c | |||
@@ -384,7 +384,7 @@ static struct clksrc_clk clk_sclk_vpll = { | |||
384 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, | 384 | .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, |
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct clk init_clocks_disable[] = { | 387 | static struct clk init_clocks_off[] = { |
388 | { | 388 | { |
389 | .name = "timers", | 389 | .name = "timers", |
390 | .id = -1, | 390 | .id = -1, |
@@ -1105,13 +1105,9 @@ static struct clk *clks[] __initdata = { | |||
1105 | 1105 | ||
1106 | void __init s5pv310_register_clocks(void) | 1106 | void __init s5pv310_register_clocks(void) |
1107 | { | 1107 | { |
1108 | struct clk *clkp; | ||
1109 | int ret; | ||
1110 | int ptr; | 1108 | int ptr; |
1111 | 1109 | ||
1112 | ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 1110 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
1113 | if (ret > 0) | ||
1114 | printk(KERN_ERR "Failed to register %u clocks\n", ret); | ||
1115 | 1111 | ||
1116 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 1112 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
1117 | s3c_register_clksrc(sysclks[ptr], 1); | 1113 | s3c_register_clksrc(sysclks[ptr], 1); |
@@ -1119,15 +1115,8 @@ void __init s5pv310_register_clocks(void) | |||
1119 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 1115 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
1120 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 1116 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
1121 | 1117 | ||
1122 | clkp = init_clocks_disable; | 1118 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1123 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 1119 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
1124 | ret = s3c24xx_register_clock(clkp); | ||
1125 | if (ret < 0) { | ||
1126 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
1127 | clkp->name, ret); | ||
1128 | } | ||
1129 | (clkp->enable)(clkp, 0); | ||
1130 | } | ||
1131 | 1120 | ||
1132 | s3c_pwmclk_init(); | 1121 | s3c_pwmclk_init(); |
1133 | } | 1122 | } |