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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-21 18:38:49 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-21 18:38:49 -0500
commita8f3740feb12928be1aad19659bf3527ea8d6d96 (patch)
treef455479d5b9edd38ed2ca2ab878d2217025960db /arch/arm
parent6c5096e5538b455bc3bea2b02588c380f070d8c6 (diff)
parent89dfe564b5926297ee29b973fe75e25c83c5e615 (diff)
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree conversions from Arnd Bergmann: "These are device tree conversions for a number of platforms, with the intention of turning code from board files into device tree descriptions. Notable changes are: - davinci bindings for pinctrl, MTD, RTC, watchdog and i2c - nomadik bindings for all devices, removing the board files - bcm2835 bindings for mmc and i2c - tegra bindings for hdmi, keyboard, audio, as well as some updates - at91 bindings for hardware ecc and for devices on RM9200 - mxs bindings for cfa100xx - sunxi support for Miniand Hackberry board" * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (72 commits) Revert "sunxi: a10-cubieboard: Add user LEDs to the device tree" Revert "sunxi: a13-olinuxino: Add user LED to the device tree" clk: tegra: initialise parent of uart clocks ARM: tegra: remove clock-frequency properties from serial nodes clk: tegra: fix driver to match DT binding clk: tegra: local arrays should be static clk: tegra: Add missing spinlock for hclk and pclk clk: tegra: Implement locking for super clock clk: tegra: fix wrong clock index between se to sata_cold sunxi: a13-olinuxino: Add user LED to the device tree ARM: davinci: da850 DT: add support for machine reboot ARM: davinci: da850: add wdt DT node ARM: davinci: da850: add DT node for I2C0 ARM: at91: at91sam9n12: add DT parameters to enable PMECC ARM: at91: at91sam9x5: add DT parameters to enable PMECC ARM: at91: add EMAC bindings to RM9200 DT ARM: at91: add SSC bindings to RM9200 DT ARM: at91: add MMC bindings to RM9200 DT ARM: at91: Animeo IP: enable watchdog support ARM: nomadik: fix OF compilation regression ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/dts/Makefile5
-rw-r--r--arch/arm/boot/dts/animeo_ip.dts4
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi158
-rw-r--r--arch/arm/boot/dts/at91rm9200ek.dts5
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts5
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5cm.dtsi5
-rw-r--r--arch/arm/boot/dts/bcm2835-rpi-b.dts16
-rw-r--r--arch/arm/boot/dts/bcm2835.dtsi44
-rw-r--r--arch/arm/boot/dts/da850-evm.dts20
-rw-r--r--arch/arm/boot/dts/da850.dtsi70
-rw-r--r--arch/arm/boot/dts/imx28-cfa10037.dts77
-rw-r--r--arch/arm/boot/dts/imx28-cfa10049.dts214
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts1
-rw-r--r--arch/arm/boot/dts/imx28.dtsi10
-rw-r--r--arch/arm/boot/dts/ste-nomadik-s8815.dts30
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi256
-rw-r--r--arch/arm/boot/dts/sun4i-a10-hackberry.dts30
-rw-r--r--arch/arm/boot/dts/tegra20-colibri-512.dtsi491
-rw-r--r--arch/arm/boot/dts/tegra20-harmony.dts120
-rw-r--r--arch/arm/boot/dts/tegra20-iris-512.dts89
-rw-r--r--arch/arm/boot/dts/tegra20-paz00.dts22
-rw-r--r--arch/arm/boot/dts/tegra20-seaboard.dts158
-rw-r--r--arch/arm/boot/dts/tegra20-tamonten.dtsi1
-rw-r--r--arch/arm/boot/dts/tegra20-trimslice.dts11
-rw-r--r--arch/arm/boot/dts/tegra20-ventana.dts23
-rw-r--r--arch/arm/boot/dts/tegra20-whistler.dts15
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi67
-rw-r--r--arch/arm/boot/dts/tegra30-beaver.dts373
-rw-r--r--arch/arm/boot/dts/tegra30-cardhu.dtsi15
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi61
-rw-r--r--arch/arm/configs/da8xx_omapl_defconfig1
-rw-r--r--arch/arm/mach-at91/at91rm9200.c2
-rw-r--r--arch/arm/mach-davinci/Kconfig1
-rw-r--r--arch/arm/mach-davinci/da8xx-dt.c9
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c12
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h1
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c30
-rw-r--r--arch/arm/mach-nomadik/Kconfig10
-rw-r--r--arch/arm/mach-nomadik/Makefile6
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c353
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c358
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.h4
-rw-r--r--arch/arm/mach-nomadik/i2c-8815nhk.c88
-rw-r--r--arch/arm/mach-nomadik/include/mach/hardware.h90
-rw-r--r--arch/arm/mach-nomadik/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-nomadik/include/mach/uncompress.h1
49 files changed, 2631 insertions, 742 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2c370c869beb..2cb9c35b14e7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -896,10 +896,12 @@ config ARCH_NOMADIK
896 select ARCH_REQUIRE_GPIOLIB 896 select ARCH_REQUIRE_GPIOLIB
897 select ARM_AMBA 897 select ARM_AMBA
898 select ARM_VIC 898 select ARM_VIC
899 select CLKSRC_NOMADIK_MTU
899 select COMMON_CLK 900 select COMMON_CLK
900 select CPU_ARM926T 901 select CPU_ARM926T
901 select GENERIC_CLOCKEVENTS 902 select GENERIC_CLOCKEVENTS
902 select MIGHT_HAVE_CACHE_L2X0 903 select MIGHT_HAVE_CACHE_L2X0
904 select USE_OF
903 select PINCTRL 905 select PINCTRL
904 select PINCTRL_STN8815 906 select PINCTRL_STN8815
905 select SPARSE_IRQ 907 select SPARSE_IRQ
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 042f2111485b..411ab1614a0e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -96,11 +96,13 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
96 imx28-apf28dev.dtb \ 96 imx28-apf28dev.dtb \
97 imx28-apx4devkit.dtb \ 97 imx28-apx4devkit.dtb \
98 imx28-cfa10036.dtb \ 98 imx28-cfa10036.dtb \
99 imx28-cfa10037.dtb \
99 imx28-cfa10049.dtb \ 100 imx28-cfa10049.dtb \
100 imx28-evk.dtb \ 101 imx28-evk.dtb \
101 imx28-m28evk.dtb \ 102 imx28-m28evk.dtb \
102 imx28-sps1.dtb \ 103 imx28-sps1.dtb \
103 imx28-tx28.dtb 104 imx28-tx28.dtb
105dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb
104dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ 106dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
105 omap3-beagle.dtb \ 107 omap3-beagle.dtb \
106 omap3-beagle-xm.dtb \ 108 omap3-beagle-xm.dtb \
@@ -135,8 +137,10 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
135 spear320-hmi.dtb 137 spear320-hmi.dtb
136dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb 138dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
137dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \ 139dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
140 sun4i-a10-hackberry.dtb \
138 sun5i-a13-olinuxino.dtb 141 sun5i-a13-olinuxino.dtb
139dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ 142dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
143 tegra20-iris-512.dtb \
140 tegra20-medcom-wide.dtb \ 144 tegra20-medcom-wide.dtb \
141 tegra20-paz00.dtb \ 145 tegra20-paz00.dtb \
142 tegra20-plutux.dtb \ 146 tegra20-plutux.dtb \
@@ -145,6 +149,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
145 tegra20-trimslice.dtb \ 149 tegra20-trimslice.dtb \
146 tegra20-ventana.dtb \ 150 tegra20-ventana.dtb \
147 tegra20-whistler.dtb \ 151 tegra20-whistler.dtb \
152 tegra30-beaver.dtb \
148 tegra30-cardhu-a02.dtb \ 153 tegra30-cardhu-a02.dtb \
149 tegra30-cardhu-a04.dtb \ 154 tegra30-cardhu-a04.dtb \
150 tegra114-dalmore.dtb \ 155 tegra114-dalmore.dtb \
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 74d92cd29d87..5160210f74da 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -78,6 +78,10 @@
78 bus-width = <4>; 78 bus-width = <4>;
79 }; 79 };
80 }; 80 };
81
82 watchdog@fffffd40 {
83 status = "okay";
84 };
81 }; 85 };
82 86
83 nand0: nand@40000000 { 87 nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 222047f1ece9..b0268a5f4b4e 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -29,6 +29,9 @@
29 gpio3 = &pioD; 29 gpio3 = &pioD;
30 tcb0 = &tcb0; 30 tcb0 = &tcb0;
31 tcb1 = &tcb1; 31 tcb1 = &tcb1;
32 ssc0 = &ssc0;
33 ssc1 = &ssc1;
34 ssc2 = &ssc2;
32 }; 35 };
33 cpus { 36 cpus {
34 cpu@0 { 37 cpu@0 {
@@ -88,6 +91,52 @@
88 interrupts = <20 4 0 21 4 0 22 4 0>; 91 interrupts = <20 4 0 21 4 0 22 4 0>;
89 }; 92 };
90 93
94 mmc0: mmc@fffb4000 {
95 compatible = "atmel,hsmci";
96 reg = <0xfffb4000 0x4000>;
97 interrupts = <10 4 0>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100 status = "disabled";
101 };
102
103 ssc0: ssc@fffd0000 {
104 compatible = "atmel,at91rm9200-ssc";
105 reg = <0xfffd0000 0x4000>;
106 interrupts = <14 4 5>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
109 status = "disable";
110 };
111
112 ssc1: ssc@fffd4000 {
113 compatible = "atmel,at91rm9200-ssc";
114 reg = <0xfffd4000 0x4000>;
115 interrupts = <15 4 5>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
118 status = "disable";
119 };
120
121 ssc2: ssc@fffd8000 {
122 compatible = "atmel,at91rm9200-ssc";
123 reg = <0xfffd8000 0x4000>;
124 interrupts = <16 4 5>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
127 status = "disable";
128 };
129
130 macb0: ethernet@fffbc000 {
131 compatible = "cdns,at91rm9200-emac", "cdns,emac";
132 reg = <0xfffbc000 0x4000>;
133 interrupts = <24 4 3>;
134 phy-mode = "rmii";
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_macb_rmii>;
137 status = "disabled";
138 };
139
91 pinctrl@fffff400 { 140 pinctrl@fffff400 {
92 #address-cells = <1>; 141 #address-cells = <1>;
93 #size-cells = <1>; 142 #size-cells = <1>;
@@ -207,6 +256,115 @@
207 }; 256 };
208 }; 257 };
209 258
259 macb {
260 pinctrl_macb_rmii: macb_rmii-0 {
261 atmel,pins =
262 <0 7 0x1 0x0 /* PA7 periph A */
263 0 8 0x1 0x0 /* PA8 periph A */
264 0 9 0x1 0x0 /* PA9 periph A */
265 0 10 0x1 0x0 /* PA10 periph A */
266 0 11 0x1 0x0 /* PA11 periph A */
267 0 12 0x1 0x0 /* PA12 periph A */
268 0 13 0x1 0x0 /* PA13 periph A */
269 0 14 0x1 0x0 /* PA14 periph A */
270 0 15 0x1 0x0 /* PA15 periph A */
271 0 16 0x1 0x0>; /* PA16 periph A */
272 };
273
274 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
275 atmel,pins =
276 <1 12 0x2 0x0 /* PB12 periph B */
277 1 13 0x2 0x0 /* PB13 periph B */
278 1 14 0x2 0x0 /* PB14 periph B */
279 1 15 0x2 0x0 /* PB15 periph B */
280 1 16 0x2 0x0 /* PB16 periph B */
281 1 17 0x2 0x0 /* PB17 periph B */
282 1 18 0x2 0x0 /* PB18 periph B */
283 1 19 0x2 0x0>; /* PB19 periph B */
284 };
285 };
286
287 mmc0 {
288 pinctrl_mmc0_clk: mmc0_clk-0 {
289 atmel,pins =
290 <0 27 0x1 0x0>; /* PA27 periph A */
291 };
292
293 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
294 atmel,pins =
295 <0 28 0x1 0x1 /* PA28 periph A with pullup */
296 0 29 0x1 0x1>; /* PA29 periph A with pullup */
297 };
298
299 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
300 atmel,pins =
301 <1 3 0x2 0x1 /* PB3 periph B with pullup */
302 1 4 0x2 0x1 /* PB4 periph B with pullup */
303 1 5 0x2 0x1>; /* PB5 periph B with pullup */
304 };
305
306 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
307 atmel,pins =
308 <0 8 0x2 0x1 /* PA8 periph B with pullup */
309 0 9 0x2 0x1>; /* PA9 periph B with pullup */
310 };
311
312 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
313 atmel,pins =
314 <0 10 0x2 0x1 /* PA10 periph B with pullup */
315 0 11 0x2 0x1 /* PA11 periph B with pullup */
316 0 12 0x2 0x1>; /* PA12 periph B with pullup */
317 };
318 };
319
320 ssc0 {
321 pinctrl_ssc0_tx: ssc0_tx-0 {
322 atmel,pins =
323 <1 0 0x1 0x0 /* PB0 periph A */
324 1 1 0x1 0x0 /* PB1 periph A */
325 1 2 0x1 0x0>; /* PB2 periph A */
326 };
327
328 pinctrl_ssc0_rx: ssc0_rx-0 {
329 atmel,pins =
330 <1 3 0x1 0x0 /* PB3 periph A */
331 1 4 0x1 0x0 /* PB4 periph A */
332 1 5 0x1 0x0>; /* PB5 periph A */
333 };
334 };
335
336 ssc1 {
337 pinctrl_ssc1_tx: ssc1_tx-0 {
338 atmel,pins =
339 <1 6 0x1 0x0 /* PB6 periph A */
340 1 7 0x1 0x0 /* PB7 periph A */
341 1 8 0x1 0x0>; /* PB8 periph A */
342 };
343
344 pinctrl_ssc1_rx: ssc1_rx-0 {
345 atmel,pins =
346 <1 9 0x1 0x0 /* PB9 periph A */
347 1 10 0x1 0x0 /* PB10 periph A */
348 1 11 0x1 0x0>; /* PB11 periph A */
349 };
350 };
351
352 ssc2 {
353 pinctrl_ssc2_tx: ssc2_tx-0 {
354 atmel,pins =
355 <1 12 0x1 0x0 /* PB12 periph A */
356 1 13 0x1 0x0 /* PB13 periph A */
357 1 14 0x1 0x0>; /* PB14 periph A */
358 };
359
360 pinctrl_ssc2_rx: ssc2_rx-0 {
361 atmel,pins =
362 <1 15 0x1 0x0 /* PB15 periph A */
363 1 16 0x1 0x0 /* PB16 periph A */
364 1 17 0x1 0x0>; /* PB17 periph A */
365 };
366 };
367
210 pioA: gpio@fffff400 { 368 pioA: gpio@fffff400 {
211 compatible = "atmel,at91rm9200-gpio"; 369 compatible = "atmel,at91rm9200-gpio";
212 reg = <0xfffff400 0x200>; 370 reg = <0xfffff400 0x200>;
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index 8aa48931e0a2..e586d85f8e23 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -44,6 +44,11 @@
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 macb0: ethernet@fffbc000 {
48 phy-mode = "rmii";
49 status = "okay";
50 };
51
47 usb1: gadget@fffb0000 { 52 usb1: gadget@fffb0000 {
48 atmel,vbus-gpio = <&pioD 4 0>; 53 atmel,vbus-gpio = <&pioD 4 0>;
49 status = "okay"; 54 status = "okay";
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 4801717566dd..7750f98dd764 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -382,8 +382,9 @@
382 reg = < 0x40000000 0x10000000 382 reg = < 0x40000000 0x10000000
383 0xffffe000 0x00000600 383 0xffffe000 0x00000600
384 0xffffe600 0x00000200 384 0xffffe600 0x00000200
385 0x00100000 0x00100000 385 0x00108000 0x00018000
386 >; 386 >;
387 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
387 atmel,nand-addr-offset = <21>; 388 atmel,nand-addr-offset = <21>;
388 atmel,nand-cmd-offset = <22>; 389 atmel,nand-cmd-offset = <22>;
389 pinctrl-names = "default"; 390 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index 0376bf4fd66b..d400f8de4387 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -71,7 +71,10 @@
71 71
72 nand0: nand@40000000 { 72 nand0: nand@40000000 {
73 nand-bus-width = <8>; 73 nand-bus-width = <8>;
74 nand-ecc-mode = "soft"; 74 nand-ecc-mode = "hw";
75 atmel,has-pmecc;
76 atmel,pmecc-cap = <2>;
77 atmel,pmecc-sector-size = <512>;
75 nand-on-flash-bbt; 78 nand-on-flash-bbt;
76 status = "okay"; 79 status = "okay";
77 }; 80 };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index d112c3af8ce2..aa98e641931f 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -512,7 +512,11 @@
512 #address-cells = <1>; 512 #address-cells = <1>;
513 #size-cells = <1>; 513 #size-cells = <1>;
514 reg = <0x40000000 0x10000000 514 reg = <0x40000000 0x10000000
515 0xffffe000 0x600 /* PMECC Registers */
516 0xffffe600 0x200 /* PMECC Error Location Registers */
517 0x00108000 0x18000 /* PMECC looup table in ROM code */
515 >; 518 >;
519 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
516 atmel,nand-addr-offset = <21>; 520 atmel,nand-addr-offset = <21>;
517 atmel,nand-cmd-offset = <22>; 521 atmel,nand-cmd-offset = <22>;
518 pinctrl-names = "default"; 522 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 31e7be23703d..4027ac7e4502 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -26,7 +26,10 @@
26 ahb { 26 ahb {
27 nand0: nand@40000000 { 27 nand0: nand@40000000 {
28 nand-bus-width = <8>; 28 nand-bus-width = <8>;
29 nand-ecc-mode = "soft"; 29 nand-ecc-mode = "hw";
30 atmel,has-pmecc; /* Enable PMECC */
31 atmel,pmecc-cap = <2>;
32 atmel,pmecc-sector-size = <512>;
30 nand-on-flash-bbt; 33 nand-on-flash-bbt;
31 status = "okay"; 34 status = "okay";
32 35
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 9b72054a0bc0..aafda174a605 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -1,5 +1,4 @@
1/dts-v1/; 1/dts-v1/;
2/memreserve/ 0x0c000000 0x04000000;
3/include/ "bcm2835.dtsi" 2/include/ "bcm2835.dtsi"
4 3
5/ { 4/ {
@@ -25,3 +24,18 @@
25 brcm,function = <7>; /* alt3 */ 24 brcm,function = <7>; /* alt3 */
26 }; 25 };
27}; 26};
27
28&i2c0 {
29 status = "okay";
30 clock-frequency = <100000>;
31};
32
33&i2c1 {
34 status = "okay";
35 clock-frequency = <100000>;
36};
37
38&sdhci {
39 status = "okay";
40 bus-width = <4>;
41};
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 8917550fd1bb..4bf2a8774aa7 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -63,5 +63,49 @@
63 interrupt-controller; 63 interrupt-controller;
64 #interrupt-cells = <2>; 64 #interrupt-cells = <2>;
65 }; 65 };
66
67 i2c0: i2c@20205000 {
68 compatible = "brcm,bcm2835-i2c";
69 reg = <0x7e205000 0x1000>;
70 interrupts = <2 21>;
71 clocks = <&clk_i2c>;
72 status = "disabled";
73 };
74
75 i2c1: i2c@20804000 {
76 compatible = "brcm,bcm2835-i2c";
77 reg = <0x7e804000 0x1000>;
78 interrupts = <2 21>;
79 clocks = <&clk_i2c>;
80 status = "disabled";
81 };
82
83 sdhci: sdhci {
84 compatible = "brcm,bcm2835-sdhci";
85 reg = <0x7e300000 0x100>;
86 interrupts = <2 30>;
87 clocks = <&clk_mmc>;
88 status = "disabled";
89 };
90 };
91
92 clocks {
93 compatible = "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 clk_mmc: mmc {
98 compatible = "fixed-clock";
99 reg = <0>;
100 #clock-cells = <0>;
101 clock-frequency = <100000000>;
102 };
103
104 clk_i2c: i2c {
105 compatible = "fixed-clock";
106 reg = <1>;
107 #clock-cells = <0>;
108 clock-frequency = <150000000>;
109 };
66 }; 110 };
67}; 111};
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index 37dc5a3243b8..f712fb607a42 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -15,6 +15,9 @@
15 model = "DA850/AM1808/OMAP-L138 EVM"; 15 model = "DA850/AM1808/OMAP-L138 EVM";
16 16
17 soc { 17 soc {
18 pmx_core: pinmux@1c14120 {
19 status = "okay";
20 };
18 serial0: serial@1c42000 { 21 serial0: serial@1c42000 {
19 status = "okay"; 22 status = "okay";
20 }; 23 };
@@ -24,5 +27,22 @@
24 serial2: serial@1d0d000 { 27 serial2: serial@1d0d000 {
25 status = "okay"; 28 status = "okay";
26 }; 29 };
30 rtc0: rtc@1c23000 {
31 status = "okay";
32 };
33 i2c0: i2c@1c22000 {
34 status = "okay";
35 clock-frequency = <100000>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&i2c0_pins>;
38 };
39 wdt: wdt@1c21000 {
40 status = "okay";
41 };
42 };
43 nand_cs3@62000000 {
44 status = "okay";
45 pinctrl-names = "default";
46 pinctrl-0 = <&nand_cs3_pins>;
27 }; 47 };
28}; 48};
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 640ab75c20db..3ec1bda64356 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -28,14 +28,47 @@
28 #address-cells = <1>; 28 #address-cells = <1>;
29 #size-cells = <1>; 29 #size-cells = <1>;
30 ranges = <0x0 0x01c00000 0x400000>; 30 ranges = <0x0 0x01c00000 0x400000>;
31 interrupt-parent = <&intc>;
31 32
33 pmx_core: pinmux@1c14120 {
34 compatible = "pinctrl-single";
35 reg = <0x14120 0x50>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38 pinctrl-single,bit-per-mux;
39 pinctrl-single,register-width = <32>;
40 pinctrl-single,function-mask = <0xffffffff>;
41 status = "disabled";
42
43 nand_cs3_pins: pinmux_nand_pins {
44 pinctrl-single,bits = <
45 /* EMA_OE, EMA_WE */
46 0x1c 0x00110000 0x00ff0000
47 /* EMA_CS[4],EMA_CS[3]*/
48 0x1c 0x00000110 0x00000ff0
49 /*
50 * EMA_D[0], EMA_D[1], EMA_D[2],
51 * EMA_D[3], EMA_D[4], EMA_D[5],
52 * EMA_D[6], EMA_D[7]
53 */
54 0x24 0x11111111 0xffffffff
55 /* EMA_A[1], EMA_A[2] */
56 0x30 0x01100000 0x0ff00000
57 >;
58 };
59 i2c0_pins: pinmux_i2c0_pins {
60 pinctrl-single,bits = <
61 /* I2C0_SDA,I2C0_SCL */
62 0x10 0x00002200 0x0000ff00
63 >;
64 };
65 };
32 serial0: serial@1c42000 { 66 serial0: serial@1c42000 {
33 compatible = "ns16550a"; 67 compatible = "ns16550a";
34 reg = <0x42000 0x100>; 68 reg = <0x42000 0x100>;
35 clock-frequency = <150000000>; 69 clock-frequency = <150000000>;
36 reg-shift = <2>; 70 reg-shift = <2>;
37 interrupts = <25>; 71 interrupts = <25>;
38 interrupt-parent = <&intc>;
39 status = "disabled"; 72 status = "disabled";
40 }; 73 };
41 serial1: serial@1d0c000 { 74 serial1: serial@1d0c000 {
@@ -44,7 +77,6 @@
44 clock-frequency = <150000000>; 77 clock-frequency = <150000000>;
45 reg-shift = <2>; 78 reg-shift = <2>;
46 interrupts = <53>; 79 interrupts = <53>;
47 interrupt-parent = <&intc>;
48 status = "disabled"; 80 status = "disabled";
49 }; 81 };
50 serial2: serial@1d0d000 { 82 serial2: serial@1d0d000 {
@@ -53,8 +85,40 @@
53 clock-frequency = <150000000>; 85 clock-frequency = <150000000>;
54 reg-shift = <2>; 86 reg-shift = <2>;
55 interrupts = <61>; 87 interrupts = <61>;
56 interrupt-parent = <&intc>;
57 status = "disabled"; 88 status = "disabled";
58 }; 89 };
90 rtc0: rtc@1c23000 {
91 compatible = "ti,da830-rtc";
92 reg = <0x23000 0x1000>;
93 interrupts = <19
94 19>;
95 status = "disabled";
96 };
97 i2c0: i2c@1c22000 {
98 compatible = "ti,davinci-i2c";
99 reg = <0x22000 0x1000>;
100 interrupts = <15>;
101 #address-cells = <1>;
102 #size-cells = <0>;
103 status = "disabled";
104 };
105 wdt: wdt@1c21000 {
106 compatible = "ti,davinci-wdt";
107 reg = <0x21000 0x1000>;
108 status = "disabled";
109 };
110 };
111 nand_cs3@62000000 {
112 compatible = "ti,davinci-nand";
113 reg = <0x62000000 0x807ff
114 0x68000000 0x8000>;
115 ti,davinci-chipselect = <1>;
116 ti,davinci-mask-ale = <0>;
117 ti,davinci-mask-cle = <0>;
118 ti,davinci-mask-chipsel = <0>;
119 ti,davinci-ecc-mode = "hw";
120 ti,davinci-ecc-bits = <4>;
121 ti,davinci-nand-use-bbt;
122 status = "disabled";
59 }; 123 };
60}; 124};
diff --git a/arch/arm/boot/dts/imx28-cfa10037.dts b/arch/arm/boot/dts/imx28-cfa10037.dts
new file mode 100644
index 000000000000..c2ef3a3d655e
--- /dev/null
+++ b/arch/arm/boot/dts/imx28-cfa10037.dts
@@ -0,0 +1,77 @@
1/*
2 * Copyright 2012 Free Electrons
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/*
13 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
14 * need to include the CFA-10036 DTS.
15 */
16/include/ "imx28-cfa10036.dts"
17
18/ {
19 model = "Crystalfontz CFA-10037 Board";
20 compatible = "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28";
21
22 apb@80000000 {
23 apbh@80000000 {
24 pinctrl@80018000 {
25 pinctrl-names = "default", "default";
26 pinctrl-1 = <&hog_pins_cfa10037>;
27
28 hog_pins_cfa10037: hog-10037@0 {
29 reg = <0>;
30 fsl,pinmux-ids = <
31 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
32 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
33 >;
34 fsl,drive-strength = <0>;
35 fsl,voltage = <1>;
36 fsl,pull-up = <0>;
37 };
38 };
39 };
40
41 apbx@80040000 {
42 usbphy1: usbphy@8007e000 {
43 status = "okay";
44 };
45 };
46 };
47
48 ahb@80080000 {
49 usb1: usb@80090000 {
50 vbus-supply = <&reg_usb1_vbus>;
51 pinctrl-0 = <&usbphy1_pins_a>;
52 pinctrl-names = "default";
53 status = "okay";
54 };
55
56 mac0: ethernet@800f0000 {
57 phy-mode = "rmii";
58 pinctrl-names = "default";
59 pinctrl-0 = <&mac0_pins_a>;
60 phy-reset-gpios = <&gpio2 21 0>;
61 phy-reset-duration = <100>;
62 status = "okay";
63 };
64 };
65
66 regulators {
67 compatible = "simple-bus";
68
69 reg_usb1_vbus: usb1_vbus {
70 compatible = "regulator-fixed";
71 regulator-name = "usb1_vbus";
72 regulator-min-microvolt = <5000000>;
73 regulator-max-microvolt = <5000000>;
74 gpio = <&gpio0 7 1>;
75 };
76 };
77};
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
index bdc80a4453dd..a0d3e9f1738e 100644
--- a/arch/arm/boot/dts/imx28-cfa10049.dts
+++ b/arch/arm/boot/dts/imx28-cfa10049.dts
@@ -23,69 +23,120 @@
23 apbh@80000000 { 23 apbh@80000000 {
24 pinctrl@80018000 { 24 pinctrl@80018000 {
25 pinctrl-names = "default", "default"; 25 pinctrl-names = "default", "default";
26 pinctrl-1 = <&hog_pins_cfa10049>; 26 pinctrl-1 = <&hog_pins_cfa10049
27 &hog_pins_cfa10049_pullup>;
27 28
28 hog_pins_cfa10049: hog-10049@0 { 29 hog_pins_cfa10049: hog-10049@0 {
29 reg = <0>; 30 reg = <0>;
30 fsl,pinmux-ids = < 31 fsl,pinmux-ids = <
31 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */ 32 0x0073 /* MX28_PAD_GPMI_D7__GPIO_0_7 */
33 0x1153 /* MX28_PAD_LCD_D22__GPIO_1_21 */
32 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */ 34 0x1163 /* MX28_PAD_LCD_D22__GPIO_1_22 */
33 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */ 35 0x1173 /* MX28_PAD_LCD_D22__GPIO_1_23 */
34 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */ 36 0x2153 /* MX28_PAD_SSP2_D5__GPIO_2_21 */
37 0x3173 /* MX28_PAD_LCD_RESET__GPIO_3_23 */
35 >; 38 >;
36 fsl,drive-strength = <0>; 39 fsl,drive-strength = <0>;
37 fsl,voltage = <1>; 40 fsl,voltage = <1>;
38 fsl,pull-up = <0>; 41 fsl,pull-up = <0>;
39 }; 42 };
40 43
41 spi3_pins_cfa10049: spi3-cfa10049@0 { 44 hog_pins_cfa10049_pullup: hog-10049-pullup@0 {
42 reg = <0>; 45 reg = <0>;
43 fsl,pinmux-ids = < 46 fsl,pinmux-ids = <
44 0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */ 47 0x2133 /* MX28_PAD_SSP2_D3__GPIO_2_19 */
45 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ 48 0x3183 /* MX28_PAD_I2C0_SCL__GPIO_3_24 */
46 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ 49 0x3193 /* MX28_PAD_I2C0_SDA__GPIO_3_25 */
47 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ 50 0x31a3 /* MX28_PAD_SAIF_SDATA0__GPIO_3_26 */
48 0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */ 51 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
49 >; 52 >;
50 fsl,drive-strength = <1>; 53 fsl,drive-strength = <0>;
51 fsl,voltage = <1>; 54 fsl,voltage = <1>;
52 fsl,pull-up = <1>; 55 fsl,pull-up = <1>;
53 }; 56 };
54 };
55 57
56 ssp3: ssp@80016000 { 58 spi2_pins_cfa10049: spi2-cfa10049@0 {
57 compatible = "fsl,imx28-spi"; 59 reg = <0>;
58 pinctrl-names = "default"; 60 fsl,pinmux-ids = <
59 pinctrl-0 = <&spi3_pins_cfa10049>; 61 0x2103 /* MX28_PAD_SSP2_SCK__GPIO_2_16 */
60 status = "okay"; 62 0x2113 /* MX28_PAD_SSP2_CMD__GPIO_2_17 */
63 0x2123 /* MX28_PAD_SSP2_D0__GPIO_2_18 */
64 >;
65 fsl,drive-strength = <1>;
66 fsl,voltage = <1>;
67 fsl,pull-up = <1>;
68 };
61 69
62 gpio5: gpio5@0 { 70 spi3_pins_cfa10049: spi3-cfa10049@0 {
63 compatible = "fairchild,74hc595";
64 gpio-controller;
65 #gpio-cells = <2>;
66 reg = <0>; 71 reg = <0>;
67 registers-number = <2>; 72 fsl,pinmux-ids = <
68 spi-max-frequency = <100000>; 73 0x0183 /* MX28_PAD_GPMI_RDN__GPIO_0_24 */
74 0x01c3 /* MX28_PAD_GPMI_RESETN__GPIO_0_28 */
75 0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */
76 0x01a3 /* MX28_PAD_GPMI_ALE__GPIO_0_26 */
77 0x01b3 /* MX28_PAD_GPMI_CLE__GPIO_0_27 */
78 >;
79 fsl,drive-strength = <1>;
80 fsl,voltage = <1>;
81 fsl,pull-up = <1>;
69 }; 82 };
70 83
71 gpio6: gpio6@1 { 84 lcdif_18bit_pins_cfa10049: lcdif-18bit@0 {
72 compatible = "fairchild,74hc595"; 85 reg = <0>;
73 gpio-controller; 86 fsl,pinmux-ids = <
74 #gpio-cells = <2>; 87 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
75 reg = <1>; 88 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
76 registers-number = <4>; 89 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
77 spi-max-frequency = <100000>; 90 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
91 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
92 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
93 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
94 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
95 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
96 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
97 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
98 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
99 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
100 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
101 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
102 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
103 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
104 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
105 >;
106 fsl,drive-strength = <0>;
107 fsl,voltage = <1>;
108 fsl,pull-up = <0>;
78 }; 109 };
79 110
80 dac0: dh2228@2 { 111 lcdif_pins_cfa10049: lcdif-evk@0 {
81 compatible = "rohm,dh2228fv"; 112 reg = <0>;
82 reg = <2>; 113 fsl,pinmux-ids = <
83 spi-max-frequency = <100000>; 114 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
115 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
116 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
117 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
118 >;
119 fsl,drive-strength = <0>;
120 fsl,voltage = <1>;
121 fsl,pull-up = <0>;
84 }; 122 };
85 }; 123 };
124
125 lcdif@80030000 {
126 pinctrl-names = "default";
127 pinctrl-0 = <&lcdif_18bit_pins_cfa10049
128 &lcdif_pins_cfa10049>;
129 status = "okay";
130 };
86 }; 131 };
87 132
88 apbx@80040000 { 133 apbx@80040000 {
134 pwm: pwm@80064000 {
135 pinctrl-names = "default", "default";
136 pinctrl-1 = <&pwm3_pins_b>;
137 status = "okay";
138 };
139
89 i2c1: i2c@8005a000 { 140 i2c1: i2c@8005a000 {
90 pinctrl-names = "default"; 141 pinctrl-names = "default";
91 pinctrl-0 = <&i2c1_pins_a>; 142 pinctrl-0 = <&i2c1_pins_a>;
@@ -113,6 +164,19 @@
113 164
114 i2c@3 { 165 i2c@3 {
115 reg = <3>; 166 reg = <3>;
167 #address-cells = <1>;
168 #size-cells = <0>;
169
170 pca9555: pca9555@20 {
171 compatible = "nxp,pca9555";
172 interrupt-parent = <&gpio2>;
173 interrupts = <19 0x2>;
174 gpio-controller;
175 #gpio-cells = <2>;
176 interrupt-controller;
177 #interrupt-cells = <2>;
178 reg = <0x20>;
179 };
116 }; 180 };
117 }; 181 };
118 182
@@ -153,4 +217,92 @@
153 status = "okay"; 217 status = "okay";
154 }; 218 };
155 }; 219 };
220
221 spi2 {
222 compatible = "spi-gpio";
223 pinctrl-names = "default";
224 pinctrl-0 = <&spi2_pins_cfa10049>;
225 status = "okay";
226 gpio-sck = <&gpio2 16 0>;
227 gpio-mosi = <&gpio2 17 0>;
228 gpio-miso = <&gpio2 18 0>;
229 cs-gpios = <&gpio3 23 0>;
230 num-chipselects = <1>;
231 #address-cells = <1>;
232 #size-cells = <0>;
233
234 hx8357: hx8357@0 {
235 compatible = "himax,hx8357b", "himax,hx8357";
236 reg = <0>;
237 spi-max-frequency = <100000>;
238 spi-cpol;
239 spi-cpha;
240 gpios-reset = <&gpio3 30 0>;
241 im-gpios = <&gpio5 4 0 &gpio5 5 0 &gpio5 6 0>;
242 };
243 };
244
245 spi3 {
246 compatible = "spi-gpio";
247 pinctrl-names = "default";
248 pinctrl-0 = <&spi3_pins_cfa10049>;
249 status = "okay";
250 gpio-sck = <&gpio0 24 0>;
251 gpio-mosi = <&gpio0 28 0>;
252 cs-gpios = <&gpio0 17 0 &gpio0 26 0 &gpio0 27 0>;
253 num-chipselects = <3>;
254 #address-cells = <1>;
255 #size-cells = <0>;
256
257 gpio5: gpio5@0 {
258 compatible = "fairchild,74hc595";
259 gpio-controller;
260 #gpio-cells = <2>;
261 reg = <0>;
262 registers-number = <2>;
263 spi-max-frequency = <100000>;
264 };
265
266 gpio6: gpio6@1 {
267 compatible = "fairchild,74hc595";
268 gpio-controller;
269 #gpio-cells = <2>;
270 reg = <1>;
271 registers-number = <4>;
272 spi-max-frequency = <100000>;
273 };
274
275 dac0: dh2228@2 {
276 compatible = "rohm,dh2228fv";
277 reg = <2>;
278 spi-max-frequency = <100000>;
279 };
280 };
281
282 gpio_keys {
283 compatible = "gpio-keys";
284 #address-cells = <1>;
285 #size-cells = <0>;
286
287 rotary_button {
288 label = "rotary_button";
289 gpios = <&gpio3 26 1>;
290 debounce-interval = <10>;
291 linux,code = <28>;
292 };
293 };
294
295 rotary {
296 compatible = "rotary-encoder";
297 gpios = <&gpio3 24 1>, <&gpio3 25 1>;
298 linux,axis = <1>; /* REL_Y */
299 rotary-encoder,relative-axis;
300 };
301
302 backlight {
303 compatible = "pwm-backlight";
304 pwms = <&pwm 3 5000000>;
305 brightness-levels = <0 4 8 16 32 64 128 255>;
306 default-brightness-level = <6>;
307 };
156}; 308};
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 3bab6b00c52d..6ce3d17c3a29 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -177,6 +177,7 @@
177 177
178 lradc@80050000 { 178 lradc@80050000 {
179 status = "okay"; 179 status = "okay";
180 fsl,lradc-touchscreen-wires = <4>;
180 }; 181 };
181 182
182 duart: serial@80074000 { 183 duart: serial@80074000 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 13b7053d799e..7ba49662b9bc 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -502,6 +502,16 @@
502 fsl,pull-up = <0>; 502 fsl,pull-up = <0>;
503 }; 503 };
504 504
505 pwm3_pins_b: pwm3@1 {
506 reg = <1>;
507 fsl,pinmux-ids = <
508 0x3141 /* MX28_PAD_SAIF0_MCLK__PWM3 */
509 >;
510 fsl,drive-strength = <0>;
511 fsl,voltage = <1>;
512 fsl,pull-up = <0>;
513 };
514
505 pwm4_pins_a: pwm4@0 { 515 pwm4_pins_a: pwm4@0 {
506 reg = <0>; 516 reg = <0>;
507 fsl,pinmux-ids = < 517 fsl,pinmux-ids = <
diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts
new file mode 100644
index 000000000000..b28fbf3408e3
--- /dev/null
+++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts
@@ -0,0 +1,30 @@
1/*
2 * Device Tree for the ST-Ericsson Nomadik S8815 board
3 * Produced by Calao Systems
4 */
5
6/dts-v1/;
7/include/ "ste-nomadik-stn8815.dtsi"
8
9/ {
10 model = "Calao Systems USB-S8815";
11 compatible = "calaosystems,usb-s8815";
12
13 chosen {
14 bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
15 };
16
17 /* Custom board node with GPIO pins to active etc */
18 usb-s8815 {
19 /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
20 ethernet-gpio {
21 gpios = <&gpio3 19 0x1>;
22 interrupts = <19 0x1>;
23 interrupt-parent = <&gpio3>;
24 };
25 /* This will bias the MMC/SD card detect line */
26 mmcsd-gpio {
27 gpios = <&gpio3 16 0x1>;
28 };
29 };
30};
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
new file mode 100644
index 000000000000..4a4aab395141
--- /dev/null
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -0,0 +1,256 @@
1/*
2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
3 */
4/include/ "skeleton.dtsi"
5
6/ {
7 #address-cells = <1>;
8 #size-cells = <1>;
9
10 memory {
11 reg = <0x00000000 0x04000000>,
12 <0x08000000 0x04000000>;
13 };
14
15 L2: l2-cache {
16 compatible = "arm,l210-cache";
17 reg = <0x10210000 0x1000>;
18 interrupt-parent = <&vica>;
19 interrupts = <30>;
20 cache-unified;
21 cache-level = <2>;
22 };
23
24 mtu0 {
25 /* Nomadik system timer */
26 reg = <0x101e2000 0x1000>;
27 interrupt-parent = <&vica>;
28 interrupts = <4>;
29 };
30
31 mtu1 {
32 /* Secondary timer */
33 reg = <0x101e3000 0x1000>;
34 interrupt-parent = <&vica>;
35 interrupts = <5>;
36 };
37
38 gpio0: gpio@101e4000 {
39 compatible = "st,nomadik-gpio";
40 reg = <0x101e4000 0x80>;
41 interrupt-parent = <&vica>;
42 interrupts = <6>;
43 interrupt-controller;
44 #interrupt-cells = <2>;
45 gpio-controller;
46 #gpio-cells = <2>;
47 gpio-bank = <0>;
48 };
49
50 gpio1: gpio@101e5000 {
51 compatible = "st,nomadik-gpio";
52 reg = <0x101e5000 0x80>;
53 interrupt-parent = <&vica>;
54 interrupts = <7>;
55 interrupt-controller;
56 #interrupt-cells = <2>;
57 gpio-controller;
58 #gpio-cells = <2>;
59 gpio-bank = <1>;
60 };
61
62 gpio2: gpio@101e6000 {
63 compatible = "st,nomadik-gpio";
64 reg = <0x101e6000 0x80>;
65 interrupt-parent = <&vica>;
66 interrupts = <8>;
67 interrupt-controller;
68 #interrupt-cells = <2>;
69 gpio-controller;
70 #gpio-cells = <2>;
71 gpio-bank = <2>;
72 };
73
74 gpio3: gpio@101e7000 {
75 compatible = "st,nomadik-gpio";
76 reg = <0x101e7000 0x80>;
77 interrupt-parent = <&vica>;
78 interrupts = <9>;
79 interrupt-controller;
80 #interrupt-cells = <2>;
81 gpio-controller;
82 #gpio-cells = <2>;
83 gpio-bank = <3>;
84 };
85
86 pinctrl {
87 compatible = "stericsson,nmk-pinctrl-stn8815";
88 };
89
90 /* A NAND flash of 128 MiB */
91 fsmc: flash@40000000 {
92 compatible = "stericsson,fsmc-nand";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 reg = <0x10100000 0x1000>, /* FSMC Register*/
96 <0x40000000 0x2000>, /* NAND Base DATA */
97 <0x41000000 0x2000>, /* NAND Base ADDR */
98 <0x40800000 0x2000>; /* NAND Base CMD */
99 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
100 status = "okay";
101
102 partition@0 {
103 label = "X-Loader(NAND)";
104 reg = <0x0 0x40000>;
105 };
106 partition@40000 {
107 label = "MemInit(NAND)";
108 reg = <0x40000 0x40000>;
109 };
110 partition@80000 {
111 label = "BootLoader(NAND)";
112 reg = <0x80000 0x200000>;
113 };
114 partition@280000 {
115 label = "Kernel zImage(NAND)";
116 reg = <0x280000 0x300000>;
117 };
118 partition@580000 {
119 label = "Root Filesystem(NAND)";
120 reg = <0x580000 0x1600000>;
121 };
122 partition@1b80000 {
123 label = "User Filesystem(NAND)";
124 reg = <0x1b80000 0x6480000>;
125 };
126 };
127
128 external-bus@34000000 {
129 compatible = "simple-bus";
130 reg = <0x34000000 0x1000000>;
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x34000000 0x1000000>;
134 ethernet@300 {
135 compatible = "smsc,lan91c111";
136 reg = <0x300 0x0fd00>;
137 };
138 };
139
140 /* I2C0 connected to the STw4811 power management chip */
141 i2c0 {
142 compatible = "i2c-gpio";
143 gpios = <&gpio1 31 0>, /* sda */
144 <&gpio1 30 0>; /* scl */
145 #address-cells = <1>;
146 #size-cells = <0>;
147
148 stw4811@2d {
149 compatible = "st,stw4811";
150 reg = <0x2d>;
151 };
152 };
153
154 /* I2C1 connected to various sensors */
155 i2c1 {
156 compatible = "i2c-gpio";
157 gpios = <&gpio1 22 0>, /* sda */
158 <&gpio1 21 0>; /* scl */
159 #address-cells = <1>;
160 #size-cells = <0>;
161
162 camera@2d {
163 compatible = "st,camera";
164 reg = <0x10>;
165 };
166 stw5095@1a {
167 compatible = "st,stw5095";
168 reg = <0x1a>;
169 };
170 lis3lv02dl@1d {
171 compatible = "st,lis3lv02dl";
172 reg = <0x1d>;
173 };
174 };
175
176 /* I2C2 connected to the USB portions of the STw4811 only */
177 i2c2 {
178 compatible = "i2c-gpio";
179 gpios = <&gpio2 10 0>, /* sda */
180 <&gpio2 9 0>; /* scl */
181 #address-cells = <1>;
182 #size-cells = <0>;
183 stw4811@2d {
184 compatible = "st,stw4811-usb";
185 reg = <0x2d>;
186 };
187 };
188
189 amba {
190 compatible = "arm,amba-bus";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 ranges;
194
195 vica: intc@0x10140000 {
196 compatible = "arm,versatile-vic";
197 interrupt-controller;
198 #interrupt-cells = <1>;
199 reg = <0x10140000 0x20>;
200 };
201
202 vicb: intc@0x10140020 {
203 compatible = "arm,versatile-vic";
204 interrupt-controller;
205 #interrupt-cells = <1>;
206 reg = <0x10140020 0x20>;
207 };
208
209 uart0: uart@101fd000 {
210 compatible = "arm,pl011", "arm,primecell";
211 reg = <0x101fd000 0x1000>;
212 interrupt-parent = <&vica>;
213 interrupts = <12>;
214 };
215
216 uart1: uart@101fb000 {
217 compatible = "arm,pl011", "arm,primecell";
218 reg = <0x101fb000 0x1000>;
219 interrupt-parent = <&vica>;
220 interrupts = <17>;
221 };
222
223 uart2: uart@101f2000 {
224 compatible = "arm,pl011", "arm,primecell";
225 reg = <0x101f2000 0x1000>;
226 interrupt-parent = <&vica>;
227 interrupts = <28>;
228 status = "disabled";
229 };
230
231 rng: rng@101b0000 {
232 compatible = "arm,primecell";
233 reg = <0x101b0000 0x1000>;
234 };
235
236 rtc: rtc@101e8000 {
237 compatible = "arm,pl031", "arm,primecell";
238 reg = <0x101e8000 0x1000>;
239 interrupt-parent = <&vica>;
240 interrupts = <10>;
241 };
242
243 mmcsd: sdi@101f6000 {
244 compatible = "arm,pl18x", "arm,primecell";
245 reg = <0x101f6000 0x1000>;
246 interrupt-parent = <&vica>;
247 interrupts = <22>;
248 max-frequency = <48000000>;
249 bus-width = <4>;
250 mmc-cap-mmc-highspeed;
251 mmc-cap-sd-highspeed;
252 cd-gpios = <&gpio3 15 0x1>;
253 cd-inverted;
254 };
255 };
256};
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
new file mode 100644
index 000000000000..f84549ad791e
--- /dev/null
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -0,0 +1,30 @@
1/*
2 * Copyright 2012 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/dts-v1/;
15/include/ "sun4i-a10.dtsi"
16
17/ {
18 model = "Miniand Hackberry";
19 compatible = "miniand,hackberry", "allwinner,sun4i-a10";
20
21 chosen {
22 bootargs = "earlyprintk console=ttyS0,115200";
23 };
24
25 soc {
26 uart0: uart@01c28000 {
27 status = "okay";
28 };
29 };
30};
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
new file mode 100644
index 000000000000..444162090042
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -0,0 +1,491 @@
1/include/ "tegra20.dtsi"
2
3/ {
4 model = "Toradex Colibri T20 512MB";
5 compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
6
7 memory {
8 reg = <0x00000000 0x20000000>;
9 };
10
11 host1x {
12 hdmi {
13 vdd-supply = <&hdmi_vdd_reg>;
14 pll-supply = <&hdmi_pll_reg>;
15
16 nvidia,ddc-i2c-bus = <&i2c_ddc>;
17 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
18 };
19 };
20
21 pinmux {
22 pinctrl-names = "default";
23 pinctrl-0 = <&state_default>;
24
25 state_default: pinmux {
26 audio_refclk {
27 nvidia,pins = "cdev1";
28 nvidia,function = "plla_out";
29 nvidia,pull = <0>;
30 nvidia,tristate = <0>;
31 };
32 crt {
33 nvidia,pins = "crtp";
34 nvidia,function = "crt";
35 nvidia,pull = <0>;
36 nvidia,tristate = <1>;
37 };
38 dap3 {
39 nvidia,pins = "dap3";
40 nvidia,function = "dap3";
41 nvidia,pull = <0>;
42 nvidia,tristate = <0>;
43 };
44 displaya {
45 nvidia,pins = "ld0", "ld1", "ld2", "ld3",
46 "ld4", "ld5", "ld6", "ld7", "ld8",
47 "ld9", "ld10", "ld11", "ld12", "ld13",
48 "ld14", "ld15", "ld16", "ld17",
49 "lhs", "lpw0", "lpw2", "lsc0",
50 "lsc1", "lsck", "lsda", "lspi", "lvs";
51 nvidia,function = "displaya";
52 nvidia,tristate = <1>;
53 };
54 gpio_dte {
55 nvidia,pins = "dte";
56 nvidia,function = "rsvd1";
57 nvidia,pull = <0>;
58 nvidia,tristate = <0>;
59 };
60 gpio_gmi {
61 nvidia,pins = "ata", "atc", "atd", "ate",
62 "dap1", "dap2", "dap4", "gpu", "irrx",
63 "irtx", "spia", "spib", "spic";
64 nvidia,function = "gmi";
65 nvidia,pull = <0>;
66 nvidia,tristate = <0>;
67 };
68 gpio_pta {
69 nvidia,pins = "pta";
70 nvidia,function = "rsvd4";
71 nvidia,pull = <0>;
72 nvidia,tristate = <0>;
73 };
74 gpio_uac {
75 nvidia,pins = "uac";
76 nvidia,function = "rsvd2";
77 nvidia,pull = <0>;
78 nvidia,tristate = <0>;
79 };
80 hdint {
81 nvidia,pins = "hdint";
82 nvidia,function = "hdmi";
83 nvidia,tristate = <1>;
84 };
85 i2c1 {
86 nvidia,pins = "rm";
87 nvidia,function = "i2c1";
88 nvidia,pull = <0>;
89 nvidia,tristate = <1>;
90 };
91 i2c3 {
92 nvidia,pins = "dtf";
93 nvidia,function = "i2c3";
94 nvidia,pull = <0>;
95 nvidia,tristate = <1>;
96 };
97 i2cddc {
98 nvidia,pins = "ddc";
99 nvidia,function = "i2c2";
100 nvidia,pull = <2>;
101 nvidia,tristate = <1>;
102 };
103 i2cp {
104 nvidia,pins = "i2cp";
105 nvidia,function = "i2cp";
106 nvidia,pull = <0>;
107 nvidia,tristate = <0>;
108 };
109 irda {
110 nvidia,pins = "uad";
111 nvidia,function = "irda";
112 nvidia,pull = <0>;
113 nvidia,tristate = <1>;
114 };
115 nand {
116 nvidia,pins = "kbca", "kbcc", "kbcd",
117 "kbce", "kbcf";
118 nvidia,function = "nand";
119 nvidia,pull = <0>;
120 nvidia,tristate = <0>;
121 };
122 owc {
123 nvidia,pins = "owc";
124 nvidia,function = "owr";
125 nvidia,pull = <0>;
126 nvidia,tristate = <1>;
127 };
128 pmc {
129 nvidia,pins = "pmc";
130 nvidia,function = "pwr_on";
131 nvidia,tristate = <0>;
132 };
133 pwm {
134 nvidia,pins = "sdb", "sdc", "sdd";
135 nvidia,function = "pwm";
136 nvidia,tristate = <1>;
137 };
138 sdio4 {
139 nvidia,pins = "atb", "gma", "gme";
140 nvidia,function = "sdio4";
141 nvidia,pull = <0>;
142 nvidia,tristate = <1>;
143 };
144 spi1 {
145 nvidia,pins = "spid", "spie", "spif";
146 nvidia,function = "spi1";
147 nvidia,pull = <0>;
148 nvidia,tristate = <1>;
149 };
150 spi4 {
151 nvidia,pins = "slxa", "slxc", "slxd", "slxk";
152 nvidia,function = "spi4";
153 nvidia,pull = <0>;
154 nvidia,tristate = <1>;
155 };
156 uarta {
157 nvidia,pins = "sdio1";
158 nvidia,function = "uarta";
159 nvidia,pull = <0>;
160 nvidia,tristate = <1>;
161 };
162 uartd {
163 nvidia,pins = "gmc";
164 nvidia,function = "uartd";
165 nvidia,pull = <0>;
166 nvidia,tristate = <1>;
167 };
168 ulpi {
169 nvidia,pins = "uaa", "uab", "uda";
170 nvidia,function = "ulpi";
171 nvidia,pull = <0>;
172 nvidia,tristate = <0>;
173 };
174 ulpi_refclk {
175 nvidia,pins = "cdev2";
176 nvidia,function = "pllp_out4";
177 nvidia,pull = <0>;
178 nvidia,tristate = <0>;
179 };
180 usb_gpio {
181 nvidia,pins = "spig", "spih";
182 nvidia,function = "spi2_alt";
183 nvidia,pull = <0>;
184 nvidia,tristate = <0>;
185 };
186 vi {
187 nvidia,pins = "dta", "dtb", "dtc", "dtd";
188 nvidia,function = "vi";
189 nvidia,pull = <0>;
190 nvidia,tristate = <1>;
191 };
192 vi_sc {
193 nvidia,pins = "csus";
194 nvidia,function = "vi_sensor_clk";
195 nvidia,pull = <0>;
196 nvidia,tristate = <1>;
197 };
198 };
199 };
200
201 i2c@7000c000 {
202 clock-frequency = <400000>;
203 };
204
205 i2c_ddc: i2c@7000c400 {
206 clock-frequency = <100000>;
207 };
208
209 i2c@7000c500 {
210 clock-frequency = <400000>;
211 };
212
213 i2c@7000d000 {
214 status = "okay";
215 clock-frequency = <400000>;
216
217 pmic: tps6586x@34 {
218 compatible = "ti,tps6586x";
219 reg = <0x34>;
220 interrupts = <0 86 0x4>;
221
222 ti,system-power-controller;
223
224 #gpio-cells = <2>;
225 gpio-controller;
226
227 sys-supply = <&vdd_5v0_reg>;
228 vin-sm0-supply = <&sys_reg>;
229 vin-sm1-supply = <&sys_reg>;
230 vin-sm2-supply = <&sys_reg>;
231 vinldo01-supply = <&sm2_reg>;
232 vinldo23-supply = <&sm2_reg>;
233 vinldo4-supply = <&sm2_reg>;
234 vinldo678-supply = <&sm2_reg>;
235 vinldo9-supply = <&sm2_reg>;
236
237 regulators {
238 #address-cells = <1>;
239 #size-cells = <0>;
240
241 sys_reg: regulator@0 {
242 reg = <0>;
243 regulator-compatible = "sys";
244 regulator-name = "vdd_sys";
245 regulator-always-on;
246 };
247
248 regulator@1 {
249 reg = <1>;
250 regulator-compatible = "sm0";
251 regulator-name = "vdd_sm0,vdd_core";
252 regulator-min-microvolt = <1275000>;
253 regulator-max-microvolt = <1275000>;
254 regulator-always-on;
255 };
256
257 regulator@2 {
258 reg = <2>;
259 regulator-compatible = "sm1";
260 regulator-name = "vdd_sm1,vdd_cpu";
261 regulator-min-microvolt = <1100000>;
262 regulator-max-microvolt = <1100000>;
263 regulator-always-on;
264 };
265
266 sm2_reg: regulator@3 {
267 reg = <3>;
268 regulator-compatible = "sm2";
269 regulator-name = "vdd_sm2,vin_ldo*";
270 regulator-min-microvolt = <3700000>;
271 regulator-max-microvolt = <3700000>;
272 regulator-always-on;
273 };
274
275 /* LDO0 is not connected to anything */
276
277 regulator@5 {
278 reg = <5>;
279 regulator-compatible = "ldo1";
280 regulator-name = "vdd_ldo1,avdd_pll*";
281 regulator-min-microvolt = <1100000>;
282 regulator-max-microvolt = <1100000>;
283 regulator-always-on;
284 };
285
286 regulator@6 {
287 reg = <6>;
288 regulator-compatible = "ldo2";
289 regulator-name = "vdd_ldo2,vdd_rtc";
290 regulator-min-microvolt = <1200000>;
291 regulator-max-microvolt = <1200000>;
292 };
293
294 /* LDO3 is not connected to anything */
295
296 regulator@8 {
297 reg = <8>;
298 regulator-compatible = "ldo4";
299 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <1800000>;
302 regulator-always-on;
303 };
304
305 ldo5_reg: regulator@9 {
306 reg = <9>;
307 regulator-compatible = "ldo5";
308 regulator-name = "vdd_ldo5,vdd_fuse";
309 regulator-min-microvolt = <3300000>;
310 regulator-max-microvolt = <3300000>;
311 regulator-always-on;
312 };
313
314 regulator@10 {
315 reg = <10>;
316 regulator-compatible = "ldo6";
317 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
318 regulator-min-microvolt = <1800000>;
319 regulator-max-microvolt = <1800000>;
320 };
321
322 hdmi_vdd_reg: regulator@11 {
323 reg = <11>;
324 regulator-compatible = "ldo7";
325 regulator-name = "vdd_ldo7,avdd_hdmi";
326 regulator-min-microvolt = <3300000>;
327 regulator-max-microvolt = <3300000>;
328 };
329
330 hdmi_pll_reg: regulator@12 {
331 reg = <12>;
332 regulator-compatible = "ldo8";
333 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
334 regulator-min-microvolt = <1800000>;
335 regulator-max-microvolt = <1800000>;
336 };
337
338 regulator@13 {
339 reg = <13>;
340 regulator-compatible = "ldo9";
341 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
342 regulator-min-microvolt = <2850000>;
343 regulator-max-microvolt = <2850000>;
344 regulator-always-on;
345 };
346
347 regulator@14 {
348 reg = <14>;
349 regulator-compatible = "ldo_rtc";
350 regulator-name = "vdd_rtc_out,vdd_cell";
351 regulator-min-microvolt = <3300000>;
352 regulator-max-microvolt = <3300000>;
353 regulator-always-on;
354 };
355 };
356 };
357
358 temperature-sensor@4c {
359 compatible = "national,lm95245";
360 reg = <0x4c>;
361 };
362 };
363
364 memory-controller@7000f400 {
365 emc-table@83250 {
366 reg = <83250>;
367 compatible = "nvidia,tegra20-emc-table";
368 clock-frequency = <83250>;
369 nvidia,emc-registers = <0x00000005 0x00000011
370 0x00000004 0x00000002 0x00000004 0x00000004
371 0x00000001 0x0000000a 0x00000002 0x00000002
372 0x00000001 0x00000001 0x00000003 0x00000004
373 0x00000003 0x00000009 0x0000000c 0x0000025f
374 0x00000000 0x00000003 0x00000003 0x00000002
375 0x00000002 0x00000001 0x00000008 0x000000c8
376 0x00000003 0x00000005 0x00000003 0x0000000c
377 0x00000002 0x00000000 0x00000000 0x00000002
378 0x00000000 0x00000000 0x00000083 0x00520006
379 0x00000010 0x00000008 0x00000000 0x00000000
380 0x00000000 0x00000000 0x00000000 0x00000000>;
381 };
382 emc-table@133200 {
383 reg = <133200>;
384 compatible = "nvidia,tegra20-emc-table";
385 clock-frequency = <133200>;
386 nvidia,emc-registers = <0x00000008 0x00000019
387 0x00000006 0x00000002 0x00000004 0x00000004
388 0x00000001 0x0000000a 0x00000002 0x00000002
389 0x00000002 0x00000001 0x00000003 0x00000004
390 0x00000003 0x00000009 0x0000000c 0x0000039f
391 0x00000000 0x00000003 0x00000003 0x00000002
392 0x00000002 0x00000001 0x00000008 0x000000c8
393 0x00000003 0x00000007 0x00000003 0x0000000c
394 0x00000002 0x00000000 0x00000000 0x00000002
395 0x00000000 0x00000000 0x00000083 0x00510006
396 0x00000010 0x00000008 0x00000000 0x00000000
397 0x00000000 0x00000000 0x00000000 0x00000000>;
398 };
399 emc-table@166500 {
400 reg = <166500>;
401 compatible = "nvidia,tegra20-emc-table";
402 clock-frequency = <166500>;
403 nvidia,emc-registers = <0x0000000a 0x00000021
404 0x00000008 0x00000003 0x00000004 0x00000004
405 0x00000002 0x0000000a 0x00000003 0x00000003
406 0x00000002 0x00000001 0x00000003 0x00000004
407 0x00000003 0x00000009 0x0000000c 0x000004df
408 0x00000000 0x00000003 0x00000003 0x00000003
409 0x00000003 0x00000001 0x00000009 0x000000c8
410 0x00000003 0x00000009 0x00000004 0x0000000c
411 0x00000002 0x00000000 0x00000000 0x00000002
412 0x00000000 0x00000000 0x00000083 0x004f0006
413 0x00000010 0x00000008 0x00000000 0x00000000
414 0x00000000 0x00000000 0x00000000 0x00000000>;
415 };
416 emc-table@333000 {
417 reg = <333000>;
418 compatible = "nvidia,tegra20-emc-table";
419 clock-frequency = <333000>;
420 nvidia,emc-registers = <0x00000014 0x00000041
421 0x0000000f 0x00000005 0x00000004 0x00000005
422 0x00000003 0x0000000a 0x00000005 0x00000005
423 0x00000004 0x00000001 0x00000003 0x00000004
424 0x00000003 0x00000009 0x0000000c 0x000009ff
425 0x00000000 0x00000003 0x00000003 0x00000005
426 0x00000005 0x00000001 0x0000000e 0x000000c8
427 0x00000003 0x00000011 0x00000006 0x0000000c
428 0x00000002 0x00000000 0x00000000 0x00000002
429 0x00000000 0x00000000 0x00000083 0x00380006
430 0x00000010 0x00000008 0x00000000 0x00000000
431 0x00000000 0x00000000 0x00000000 0x00000000>;
432 };
433 };
434
435 ac97: ac97 {
436 status = "okay";
437 nvidia,codec-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
438 nvidia,codec-sync-gpio = <&gpio 120 0>; /* gpio PP0 */
439 };
440
441 usb@c5004000 {
442 status = "okay";
443 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
444 };
445
446 sdhci@c8000600 {
447 cd-gpios = <&gpio 23 0>; /* gpio PC7 */
448 };
449
450 sound {
451 compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
452 "nvidia,tegra-audio-wm9712";
453 nvidia,model = "Colibri T20 AC97 Audio";
454
455 nvidia,audio-routing =
456 "Headphone", "HPOUTL",
457 "Headphone", "HPOUTR",
458 "LineIn", "LINEINL",
459 "LineIn", "LINEINR",
460 "Mic", "MIC1";
461
462 nvidia,ac97-controller = <&ac97>;
463 };
464
465 regulators {
466 compatible = "simple-bus";
467 #address-cells = <1>;
468 #size-cells = <0>;
469
470 vdd_5v0_reg: regulator@100 {
471 compatible = "regulator-fixed";
472 reg = <100>;
473 regulator-name = "vdd_5v0";
474 regulator-min-microvolt = <5000000>;
475 regulator-max-microvolt = <5000000>;
476 regulator-always-on;
477 };
478
479 regulator@101 {
480 compatible = "regulator-fixed";
481 reg = <101>;
482 regulator-name = "internal_usb";
483 regulator-min-microvolt = <5000000>;
484 regulator-max-microvolt = <5000000>;
485 enable-active-high;
486 regulator-boot-on;
487 regulator-always-on;
488 gpio = <&gpio 217 0>;
489 };
490 };
491};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 2b4169702c8d..61d027f03617 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -3,7 +3,7 @@
3/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
4 4
5/ { 5/ {
6 model = "NVIDIA Tegra2 Harmony evaluation board"; 6 model = "NVIDIA Tegra20 Harmony evaluation board";
7 compatible = "nvidia,harmony", "nvidia,tegra20"; 7 compatible = "nvidia,harmony", "nvidia,tegra20";
8 8
9 memory { 9 memory {
@@ -252,7 +252,6 @@
252 252
253 serial@70006300 { 253 serial@70006300 {
254 status = "okay"; 254 status = "okay";
255 clock-frequency = <216000000>;
256 }; 255 };
257 256
258 i2c@7000c000 { 257 i2c@7000c000 {
@@ -452,6 +451,123 @@
452 bus-width = <8>; 451 bus-width = <8>;
453 }; 452 };
454 453
454 kbc {
455 status = "okay";
456 nvidia,debounce-delay-ms = <2>;
457 nvidia,repeat-delay-ms = <160>;
458 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
459 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
460 linux,keymap = <0x00020011 /* KEY_W */
461 0x0003001F /* KEY_S */
462 0x0004001E /* KEY_A */
463 0x0005002C /* KEY_Z */
464 0x000701D0 /* KEY_FN */
465 0x0107008B /* KEY_MENU */
466 0x02060038 /* KEY_LEFTALT */
467 0x02070064 /* KEY_RIGHTALT */
468 0x03000006 /* KEY_5 */
469 0x03010005 /* KEY_4 */
470 0x03020013 /* KEY_R */
471 0x03030012 /* KEY_E */
472 0x03040021 /* KEY_F */
473 0x03050020 /* KEY_D */
474 0x0306002D /* KEY_X */
475 0x04000008 /* KEY_7 */
476 0x04010007 /* KEY_6 */
477 0x04020014 /* KEY_T */
478 0x04030023 /* KEY_H */
479 0x04040022 /* KEY_G */
480 0x0405002F /* KEY_V */
481 0x0406002E /* KEY_C */
482 0x04070039 /* KEY_SPACE */
483 0x0500000A /* KEY_9 */
484 0x05010009 /* KEY_8 */
485 0x05020016 /* KEY_U */
486 0x05030015 /* KEY_Y */
487 0x05040024 /* KEY_J */
488 0x05050031 /* KEY_N */
489 0x05060030 /* KEY_B */
490 0x0507002B /* KEY_BACKSLASH */
491 0x0600000C /* KEY_MINUS */
492 0x0601000B /* KEY_0 */
493 0x06020018 /* KEY_O */
494 0x06030017 /* KEY_I */
495 0x06040026 /* KEY_L */
496 0x06050025 /* KEY_K */
497 0x06060033 /* KEY_COMMA */
498 0x06070032 /* KEY_M */
499 0x0701000D /* KEY_EQUAL */
500 0x0702001B /* KEY_RIGHTBRACE */
501 0x0703001C /* KEY_ENTER */
502 0x0707008B /* KEY_MENU */
503 0x0804002A /* KEY_LEFTSHIFT */
504 0x08050036 /* KEY_RIGHTSHIFT */
505 0x0905001D /* KEY_LEFTCTRL */
506 0x09070061 /* KEY_RIGHTCTRL */
507 0x0B00001A /* KEY_LEFTBRACE */
508 0x0B010019 /* KEY_P */
509 0x0B020028 /* KEY_APOSTROPHE */
510 0x0B030027 /* KEY_SEMICOLON */
511 0x0B040035 /* KEY_SLASH */
512 0x0B050034 /* KEY_DOT */
513 0x0C000044 /* KEY_F10 */
514 0x0C010043 /* KEY_F9 */
515 0x0C02000E /* KEY_BACKSPACE */
516 0x0C030004 /* KEY_3 */
517 0x0C040003 /* KEY_2 */
518 0x0C050067 /* KEY_UP */
519 0x0C0600D2 /* KEY_PRINT */
520 0x0C070077 /* KEY_PAUSE */
521 0x0D00006E /* KEY_INSERT */
522 0x0D01006F /* KEY_DELETE */
523 0x0D030068 /* KEY_PAGEUP */
524 0x0D04006D /* KEY_PAGEDOWN */
525 0x0D05006A /* KEY_RIGHT */
526 0x0D06006C /* KEY_DOWN */
527 0x0D070069 /* KEY_LEFT */
528 0x0E000057 /* KEY_F11 */
529 0x0E010058 /* KEY_F12 */
530 0x0E020042 /* KEY_F8 */
531 0x0E030010 /* KEY_Q */
532 0x0E04003E /* KEY_F4 */
533 0x0E05003D /* KEY_F3 */
534 0x0E060002 /* KEY_1 */
535 0x0E070041 /* KEY_F7 */
536 0x0F000001 /* KEY_ESC */
537 0x0F010029 /* KEY_GRAVE */
538 0x0F02003F /* KEY_F5 */
539 0x0F03000F /* KEY_TAB */
540 0x0F04003B /* KEY_F1 */
541 0x0F05003C /* KEY_F2 */
542 0x0F06003A /* KEY_CAPSLOCK */
543 0x0F070040 /* KEY_F6 */
544 0x14000047 /* KEY_KP7 */
545 0x15000049 /* KEY_KP9 */
546 0x15010048 /* KEY_KP8 */
547 0x1502004B /* KEY_KP4 */
548 0x1504004F /* KEY_KP1 */
549 0x1601004E /* KEY_KPSLASH */
550 0x1602004D /* KEY_KP6 */
551 0x1603004C /* KEY_KP5 */
552 0x16040051 /* KEY_KP3 */
553 0x16050050 /* KEY_KP2 */
554 0x16070052 /* KEY_KP0 */
555 0x1B010037 /* KEY_KPASTERISK */
556 0x1B03004A /* KEY_KPMINUS */
557 0x1B04004E /* KEY_KPPLUS */
558 0x1B050053 /* KEY_KPDOT */
559 0x1C050073 /* KEY_VOLUMEUP */
560 0x1D030066 /* KEY_HOME */
561 0x1D04006B /* KEY_END */
562 0x1D0500E1 /* KEY_BRIGHTNESSUP */
563 0x1D060072 /* KEY_VOLUMEDOWN */
564 0x1D0700E0 /* KEY_BRIGHTNESSDOWN */
565 0x1E000045 /* KEY_NUMLOCK */
566 0x1E010046 /* KEY_SCROLLLOCK */
567 0x1E020071 /* KEY_MUTE */
568 0x1F0400D6>; /* KEY_QUESTION */
569 };
570
455 regulators { 571 regulators {
456 compatible = "simple-bus"; 572 compatible = "simple-bus";
457 #address-cells = <1>; 573 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
new file mode 100644
index 000000000000..52f1103907d7
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -0,0 +1,89 @@
1/dts-v1/;
2
3/include/ "tegra20-colibri-512.dtsi"
4
5/ {
6 model = "Toradex Colibri T20 512MB on Iris";
7 compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
8
9 host1x {
10 hdmi {
11 status = "okay";
12 };
13 };
14
15 pinmux {
16 state_default: pinmux {
17 hdint {
18 nvidia,tristate = <0>;
19 };
20
21 i2cddc {
22 nvidia,tristate = <0>;
23 };
24
25 sdio4 {
26 nvidia,tristate = <0>;
27 };
28
29 uarta {
30 nvidia,tristate = <0>;
31 };
32
33 uartd {
34 nvidia,tristate = <0>;
35 };
36 };
37 };
38
39 usb@c5000000 {
40 status = "okay";
41 dr_mode = "otg";
42 };
43
44 usb@c5008000 {
45 status = "okay";
46 };
47
48 serial@70006000 {
49 status = "okay";
50 };
51
52 serial@70006300 {
53 status = "okay";
54 };
55
56 i2c_ddc: i2c@7000c400 {
57 status = "okay";
58 };
59
60 sdhci@c8000600 {
61 status = "okay";
62 bus-width = <4>;
63 vmmc-supply = <&vcc_sd_reg>;
64 vqmmc-supply = <&vcc_sd_reg>;
65 };
66
67 regulators {
68 regulator@0 {
69 compatible = "regulator-fixed";
70 reg = <0>;
71 regulator-name = "usb_host_vbus";
72 regulator-min-microvolt = <5000000>;
73 regulator-max-microvolt = <5000000>;
74 regulator-boot-on;
75 regulator-always-on;
76 gpio = <&gpio 178 0>;
77 };
78
79 vcc_sd_reg: regulator@1 {
80 compatible = "regulator-fixed";
81 reg = <1>;
82 regulator-name = "vcc_sd";
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
85 regulator-boot-on;
86 regulator-always-on;
87 };
88 };
89};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 11b30db63ff2..54d6fce00a59 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -10,6 +10,18 @@
10 reg = <0x00000000 0x20000000>; 10 reg = <0x00000000 0x20000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -232,12 +244,10 @@
232 244
233 serial@70006000 { 245 serial@70006000 {
234 status = "okay"; 246 status = "okay";
235 clock-frequency = <216000000>;
236 }; 247 };
237 248
238 serial@70006200 { 249 serial@70006200 {
239 status = "okay"; 250 status = "okay";
240 clock-frequency = <216000000>;
241 }; 251 };
242 252
243 i2c@7000c000 { 253 i2c@7000c000 {
@@ -252,9 +262,9 @@
252 }; 262 };
253 }; 263 };
254 264
255 i2c@7000c400 { 265 hdmi_ddc: i2c@7000c400 {
256 status = "okay"; 266 status = "okay";
257 clock-frequency = <400000>; 267 clock-frequency = <100000>;
258 }; 268 };
259 269
260 nvec { 270 nvec {
@@ -369,13 +379,13 @@
369 regulator-max-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>;
370 }; 380 };
371 381
372 ldo7 { 382 hdmi_vdd_reg: ldo7 {
373 regulator-name = "+3.3vs_ldo7,avdd_hdmi"; 383 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
374 regulator-min-microvolt = <3300000>; 384 regulator-min-microvolt = <3300000>;
375 regulator-max-microvolt = <3300000>; 385 regulator-max-microvolt = <3300000>;
376 }; 386 };
377 387
378 ldo8 { 388 hdmi_pll_reg: ldo8 {
379 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; 389 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
380 regulator-min-microvolt = <1800000>; 390 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>; 391 regulator-max-microvolt = <1800000>;
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 607bf0c6bf9c..37b3a57ec0f1 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -10,6 +10,18 @@
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -291,7 +303,6 @@
291 303
292 serial@70006300 { 304 serial@70006300 {
293 status = "okay"; 305 status = "okay";
294 clock-frequency = <216000000>;
295 }; 306 };
296 307
297 i2c@7000c000 { 308 i2c@7000c000 {
@@ -345,7 +356,7 @@
345 pinctrl-1 = <&state_i2cmux_pta>; 356 pinctrl-1 = <&state_i2cmux_pta>;
346 pinctrl-2 = <&state_i2cmux_idle>; 357 pinctrl-2 = <&state_i2cmux_idle>;
347 358
348 i2c@0 { 359 hdmi_ddc: i2c@0 {
349 reg = <0>; 360 reg = <0>;
350 #address-cells = <1>; 361 #address-cells = <1>;
351 #size-cells = <0>; 362 #size-cells = <0>;
@@ -463,13 +474,13 @@
463 regulator-max-microvolt = <1800000>; 474 regulator-max-microvolt = <1800000>;
464 }; 475 };
465 476
466 ldo7 { 477 hdmi_vdd_reg: ldo7 {
467 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; 478 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
468 regulator-min-microvolt = <3300000>; 479 regulator-min-microvolt = <3300000>;
469 regulator-max-microvolt = <3300000>; 480 regulator-max-microvolt = <3300000>;
470 }; 481 };
471 482
472 ldo8 { 483 hdmi_pll_reg: ldo8 {
473 regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 484 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
474 regulator-min-microvolt = <1800000>; 485 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <1800000>; 486 regulator-max-microvolt = <1800000>;
@@ -604,6 +615,145 @@
604 }; 615 };
605 }; 616 };
606 617
618 kbc {
619 status = "okay";
620 nvidia,debounce-delay-ms = <32>;
621 nvidia,repeat-delay-ms = <160>;
622 nvidia,ghost-filter;
623 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
624 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
625 linux,keymap = <0x00020011 /* KEY_W */
626 0x0003001F /* KEY_S */
627 0x0004001E /* KEY_A */
628 0x0005002C /* KEY_Z */
629 0x000701d0 /* KEY_FN */
630
631 0x0107007D /* KEY_LEFTMETA */
632 0x02060064 /* KEY_RIGHTALT */
633 0x02070038 /* KEY_LEFTALT */
634
635 0x03000006 /* KEY_5 */
636 0x03010005 /* KEY_4 */
637 0x03020013 /* KEY_R */
638 0x03030012 /* KEY_E */
639 0x03040021 /* KEY_F */
640 0x03050020 /* KEY_D */
641 0x0306002D /* KEY_X */
642
643 0x04000008 /* KEY_7 */
644 0x04010007 /* KEY_6 */
645 0x04020014 /* KEY_T */
646 0x04030023 /* KEY_H */
647 0x04040022 /* KEY_G */
648 0x0405002F /* KEY_V */
649 0x0406002E /* KEY_C */
650 0x04070039 /* KEY_SPACE */
651
652 0x0500000A /* KEY_9 */
653 0x05010009 /* KEY_8 */
654 0x05020016 /* KEY_U */
655 0x05030015 /* KEY_Y */
656 0x05040024 /* KEY_J */
657 0x05050031 /* KEY_N */
658 0x05060030 /* KEY_B */
659 0x0507002B /* KEY_BACKSLASH */
660
661 0x0600000C /* KEY_MINUS */
662 0x0601000B /* KEY_0 */
663 0x06020018 /* KEY_O */
664 0x06030017 /* KEY_I */
665 0x06040026 /* KEY_L */
666 0x06050025 /* KEY_K */
667 0x06060033 /* KEY_COMMA */
668 0x06070032 /* KEY_M */
669
670 0x0701000D /* KEY_EQUAL */
671 0x0702001B /* KEY_RIGHTBRACE */
672 0x0703001C /* KEY_ENTER */
673 0x0707008B /* KEY_MENU */
674
675 0x08040036 /* KEY_RIGHTSHIFT */
676 0x0805002A /* KEY_LEFTSHIFT */
677
678 0x09050061 /* KEY_RIGHTCTRL */
679 0x0907001D /* KEY_LEFTCTRL */
680
681 0x0B00001A /* KEY_LEFTBRACE */
682 0x0B010019 /* KEY_P */
683 0x0B020028 /* KEY_APOSTROPHE */
684 0x0B030027 /* KEY_SEMICOLON */
685 0x0B040035 /* KEY_SLASH */
686 0x0B050034 /* KEY_DOT */
687
688 0x0C000044 /* KEY_F10 */
689 0x0C010043 /* KEY_F9 */
690 0x0C02000E /* KEY_BACKSPACE */
691 0x0C030004 /* KEY_3 */
692 0x0C040003 /* KEY_2 */
693 0x0C050067 /* KEY_UP */
694 0x0C0600D2 /* KEY_PRINT */
695 0x0C070077 /* KEY_PAUSE */
696
697 0x0D00006E /* KEY_INSERT */
698 0x0D01006F /* KEY_DELETE */
699 0x0D030068 /* KEY_PAGEUP */
700 0x0D04006D /* KEY_PAGEDOWN */
701 0x0D05006A /* KEY_RIGHT */
702 0x0D06006C /* KEY_DOWN */
703 0x0D070069 /* KEY_LEFT */
704
705 0x0E000057 /* KEY_F11 */
706 0x0E010058 /* KEY_F12 */
707 0x0E020042 /* KEY_F8 */
708 0x0E030010 /* KEY_Q */
709 0x0E04003E /* KEY_F4 */
710 0x0E05003D /* KEY_F3 */
711 0x0E060002 /* KEY_1 */
712 0x0E070041 /* KEY_F7 */
713
714 0x0F000001 /* KEY_ESC */
715 0x0F010029 /* KEY_GRAVE */
716 0x0F02003F /* KEY_F5 */
717 0x0F03000F /* KEY_TAB */
718 0x0F04003B /* KEY_F1 */
719 0x0F05003C /* KEY_F2 */
720 0x0F06003A /* KEY_CAPSLOCK */
721 0x0F070040 /* KEY_F6 */
722
723 /* Software Handled Function Keys */
724 0x14000047 /* KEY_KP7 */
725
726 0x15000049 /* KEY_KP9 */
727 0x15010048 /* KEY_KP8 */
728 0x1502004B /* KEY_KP4 */
729 0x1504004F /* KEY_KP1 */
730
731 0x1601004E /* KEY_KPSLASH */
732 0x1602004D /* KEY_KP6 */
733 0x1603004C /* KEY_KP5 */
734 0x16040051 /* KEY_KP3 */
735 0x16050050 /* KEY_KP2 */
736 0x16070052 /* KEY_KP0 */
737
738 0x1B010037 /* KEY_KPASTERISK */
739 0x1B03004A /* KEY_KPMINUS */
740 0x1B04004E /* KEY_KPPLUS */
741 0x1B050053 /* KEY_KPDOT */
742
743 0x1C050073 /* KEY_VOLUMEUP */
744
745 0x1D030066 /* KEY_HOME */
746 0x1D04006B /* KEY_END */
747 0x1D0500E0 /* KEY_BRIGHTNESSDOWN */
748 0x1D060072 /* KEY_VOLUMEDOWN */
749 0x1D0700E1 /* KEY_BRIGHTNESSUP */
750
751 0x1E000045 /* KEY_NUMLOCK */
752 0x1E010046 /* KEY_SCROLLLOCK */
753 0x1E020071 /* KEY_MUTE */
754
755 0x1F04008A>; /* KEY_HELP */
756 };
607 regulators { 757 regulators {
608 compatible = "simple-bus"; 758 compatible = "simple-bus";
609 #address-cells = <1>; 759 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index a239ccdfaa52..4766abae7a72 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -276,7 +276,6 @@
276 }; 276 };
277 277
278 serial@70006300 { 278 serial@70006300 {
279 clock-frequency = <216000000>;
280 status = "okay"; 279 status = "okay";
281 }; 280 };
282 281
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index e47cf6a58b6f..5d79e4fc49a6 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -249,6 +249,11 @@
249 "ld23_22"; 249 "ld23_22";
250 nvidia,pull = <1>; 250 nvidia,pull = <1>;
251 }; 251 };
252 conf_spif {
253 nvidia,pins = "spif";
254 nvidia,pull = <1>;
255 nvidia,tristate = <0>;
256 };
252 }; 257 };
253 }; 258 };
254 259
@@ -258,7 +263,6 @@
258 263
259 serial@70006000 { 264 serial@70006000 {
260 status = "okay"; 265 status = "okay";
261 clock-frequency = <216000000>;
262 }; 266 };
263 267
264 dvi_ddc: i2c@7000c000 { 268 dvi_ddc: i2c@7000c000 {
@@ -326,6 +330,11 @@
326 bus-width = <4>; 330 bus-width = <4>;
327 }; 331 };
328 332
333 poweroff {
334 compatible = "gpio-poweroff";
335 gpios = <&gpio 191 1>; /* gpio PX7, active low */
336 };
337
329 regulators { 338 regulators {
330 compatible = "simple-bus"; 339 compatible = "simple-bus";
331 #address-cells = <1>; 340 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index f6c61d10fd27..425c89000c20 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -3,13 +3,25 @@
3/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
4 4
5/ { 5/ {
6 model = "NVIDIA Tegra2 Ventana evaluation board"; 6 model = "NVIDIA Tegra20 Ventana evaluation board";
7 compatible = "nvidia,ventana", "nvidia,tegra20"; 7 compatible = "nvidia,ventana", "nvidia,tegra20";
8 8
9 memory { 9 memory {
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -288,7 +300,6 @@
288 300
289 serial@70006300 { 301 serial@70006300 {
290 status = "okay"; 302 status = "okay";
291 clock-frequency = <216000000>;
292 }; 303 };
293 304
294 i2c@7000c000 { 305 i2c@7000c000 {
@@ -320,7 +331,7 @@
320 331
321 i2c@7000c400 { 332 i2c@7000c400 {
322 status = "okay"; 333 status = "okay";
323 clock-frequency = <400000>; 334 clock-frequency = <100000>;
324 }; 335 };
325 336
326 i2cmux { 337 i2cmux {
@@ -335,7 +346,7 @@
335 pinctrl-1 = <&state_i2cmux_pta>; 346 pinctrl-1 = <&state_i2cmux_pta>;
336 pinctrl-2 = <&state_i2cmux_idle>; 347 pinctrl-2 = <&state_i2cmux_idle>;
337 348
338 i2c@0 { 349 hdmi_ddc: i2c@0 {
339 reg = <0>; 350 reg = <0>;
340 #address-cells = <1>; 351 #address-cells = <1>;
341 #size-cells = <0>; 352 #size-cells = <0>;
@@ -446,13 +457,13 @@
446 regulator-max-microvolt = <1800000>; 457 regulator-max-microvolt = <1800000>;
447 }; 458 };
448 459
449 ldo7 { 460 hdmi_vdd_reg: ldo7 {
450 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; 461 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
451 regulator-min-microvolt = <3300000>; 462 regulator-min-microvolt = <3300000>;
452 regulator-max-microvolt = <3300000>; 463 regulator-max-microvolt = <3300000>;
453 }; 464 };
454 465
455 ldo8 { 466 hdmi_pll_reg: ldo8 {
456 regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 467 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
457 regulator-min-microvolt = <1800000>; 468 regulator-min-microvolt = <1800000>;
458 regulator-max-microvolt = <1800000>; 469 regulator-max-microvolt = <1800000>;
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 20d576ecd555..ea57c0f6dcce 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -3,7 +3,7 @@
3/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
4 4
5/ { 5/ {
6 model = "NVIDIA Tegra2 Whistler evaluation board"; 6 model = "NVIDIA Tegra20 Whistler evaluation board";
7 compatible = "nvidia,whistler", "nvidia,tegra20"; 7 compatible = "nvidia,whistler", "nvidia,tegra20";
8 8
9 memory { 9 memory {
@@ -255,7 +255,6 @@
255 255
256 serial@70006000 { 256 serial@70006000 {
257 status = "okay"; 257 status = "okay";
258 clock-frequency = <216000000>;
259 }; 258 };
260 259
261 hdmi_ddc: i2c@7000c400 { 260 hdmi_ddc: i2c@7000c400 {
@@ -520,6 +519,18 @@
520 bus-width = <8>; 519 bus-width = <8>;
521 }; 520 };
522 521
522 kbc {
523 status = "okay";
524 nvidia,debounce-delay-ms = <20>;
525 nvidia,repeat-delay-ms = <160>;
526 nvidia,kbc-row-pins = <0 1 2>;
527 nvidia,kbc-col-pins = <16 17>;
528 linux,keymap = <0x00000074 /* KEY_POWER */
529 0x01000066 /* KEY_HOME */
530 0x0101009E /* KEY_BACK */
531 0x0201008B>; /* KEY_MENU */
532 };
533
523 regulators { 534 regulators {
524 compatible = "simple-bus"; 535 compatible = "simple-bus";
525 #address-cells = <1>; 536 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 2e7c83c7253b..9a428931d042 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,6 +4,14 @@
4 compatible = "nvidia,tegra20"; 4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 aliases {
8 serial0 = &uarta;
9 serial1 = &uartb;
10 serial2 = &uartc;
11 serial3 = &uartd;
12 serial4 = &uarte;
13 };
14
7 host1x { 15 host1x {
8 compatible = "nvidia,tegra20-host1x", "simple-bus"; 16 compatible = "nvidia,tegra20-host1x", "simple-bus";
9 reg = <0x50000000 0x00024000>; 17 reg = <0x50000000 0x00024000>;
@@ -112,15 +120,6 @@
112 interrupts = <1 13 0x304>; 120 interrupts = <1 13 0x304>;
113 }; 121 };
114 122
115 cache-controller@50043000 {
116 compatible = "arm,pl310-cache";
117 reg = <0x50043000 0x1000>;
118 arm,data-latency = <5 5 2>;
119 arm,tag-latency = <4 4 2>;
120 cache-unified;
121 cache-level = <2>;
122 };
123
124 intc: interrupt-controller { 123 intc: interrupt-controller {
125 compatible = "arm,cortex-a9-gic"; 124 compatible = "arm,cortex-a9-gic";
126 reg = <0x50041000 0x1000 125 reg = <0x50041000 0x1000
@@ -129,6 +128,15 @@
129 #interrupt-cells = <3>; 128 #interrupt-cells = <3>;
130 }; 129 };
131 130
131 cache-controller {
132 compatible = "arm,pl310-cache";
133 reg = <0x50043000 0x1000>;
134 arm,data-latency = <5 5 2>;
135 arm,tag-latency = <4 4 2>;
136 cache-unified;
137 cache-level = <2>;
138 };
139
132 timer@60005000 { 140 timer@60005000 {
133 compatible = "nvidia,tegra20-timer"; 141 compatible = "nvidia,tegra20-timer";
134 reg = <0x60005000 0x60>; 142 reg = <0x60005000 0x60>;
@@ -199,6 +207,15 @@
199 compatible = "nvidia,tegra20-das"; 207 compatible = "nvidia,tegra20-das";
200 reg = <0x70000c00 0x80>; 208 reg = <0x70000c00 0x80>;
201 }; 209 };
210
211 tegra_ac97: ac97 {
212 compatible = "nvidia,tegra20-ac97";
213 reg = <0x70002000 0x200>;
214 interrupts = <0 81 0x04>;
215 nvidia,dma-request-selector = <&apbdma 12>;
216 clocks = <&tegra_car 3>;
217 status = "disabled";
218 };
202 219
203 tegra_i2s1: i2s@70002800 { 220 tegra_i2s1: i2s@70002800 {
204 compatible = "nvidia,tegra20-i2s"; 221 compatible = "nvidia,tegra20-i2s";
@@ -218,47 +235,59 @@
218 status = "disabled"; 235 status = "disabled";
219 }; 236 };
220 237
221 serial@70006000 { 238 /*
239 * There are two serial driver i.e. 8250 based simple serial
240 * driver and APB DMA based serial driver for higher baudrate
241 * and performace. To enable the 8250 based driver, the compatible
242 * is "nvidia,tegra20-uart" and to enable the APB DMA based serial
243 * driver, the comptible is "nvidia,tegra20-hsuart".
244 */
245 uarta: serial@70006000 {
222 compatible = "nvidia,tegra20-uart"; 246 compatible = "nvidia,tegra20-uart";
223 reg = <0x70006000 0x40>; 247 reg = <0x70006000 0x40>;
224 reg-shift = <2>; 248 reg-shift = <2>;
225 interrupts = <0 36 0x04>; 249 interrupts = <0 36 0x04>;
250 nvidia,dma-request-selector = <&apbdma 8>;
226 clocks = <&tegra_car 6>; 251 clocks = <&tegra_car 6>;
227 status = "disabled"; 252 status = "disabled";
228 }; 253 };
229 254
230 serial@70006040 { 255 uartb: serial@70006040 {
231 compatible = "nvidia,tegra20-uart"; 256 compatible = "nvidia,tegra20-uart";
232 reg = <0x70006040 0x40>; 257 reg = <0x70006040 0x40>;
233 reg-shift = <2>; 258 reg-shift = <2>;
234 interrupts = <0 37 0x04>; 259 interrupts = <0 37 0x04>;
260 nvidia,dma-request-selector = <&apbdma 9>;
235 clocks = <&tegra_car 96>; 261 clocks = <&tegra_car 96>;
236 status = "disabled"; 262 status = "disabled";
237 }; 263 };
238 264
239 serial@70006200 { 265 uartc: serial@70006200 {
240 compatible = "nvidia,tegra20-uart"; 266 compatible = "nvidia,tegra20-uart";
241 reg = <0x70006200 0x100>; 267 reg = <0x70006200 0x100>;
242 reg-shift = <2>; 268 reg-shift = <2>;
243 interrupts = <0 46 0x04>; 269 interrupts = <0 46 0x04>;
270 nvidia,dma-request-selector = <&apbdma 10>;
244 clocks = <&tegra_car 55>; 271 clocks = <&tegra_car 55>;
245 status = "disabled"; 272 status = "disabled";
246 }; 273 };
247 274
248 serial@70006300 { 275 uartd: serial@70006300 {
249 compatible = "nvidia,tegra20-uart"; 276 compatible = "nvidia,tegra20-uart";
250 reg = <0x70006300 0x100>; 277 reg = <0x70006300 0x100>;
251 reg-shift = <2>; 278 reg-shift = <2>;
252 interrupts = <0 90 0x04>; 279 interrupts = <0 90 0x04>;
280 nvidia,dma-request-selector = <&apbdma 19>;
253 clocks = <&tegra_car 65>; 281 clocks = <&tegra_car 65>;
254 status = "disabled"; 282 status = "disabled";
255 }; 283 };
256 284
257 serial@70006400 { 285 uarte: serial@70006400 {
258 compatible = "nvidia,tegra20-uart"; 286 compatible = "nvidia,tegra20-uart";
259 reg = <0x70006400 0x100>; 287 reg = <0x70006400 0x100>;
260 reg-shift = <2>; 288 reg-shift = <2>;
261 interrupts = <0 91 0x04>; 289 interrupts = <0 91 0x04>;
290 nvidia,dma-request-selector = <&apbdma 20>;
262 clocks = <&tegra_car 66>; 291 clocks = <&tegra_car 66>;
263 status = "disabled"; 292 status = "disabled";
264 }; 293 };
@@ -375,6 +404,14 @@
375 status = "disabled"; 404 status = "disabled";
376 }; 405 };
377 406
407 kbc {
408 compatible = "nvidia,tegra20-kbc";
409 reg = <0x7000e200 0x100>;
410 interrupts = <0 85 0x04>;
411 clocks = <&tegra_car 36>;
412 status = "disabled";
413 };
414
378 pmc { 415 pmc {
379 compatible = "nvidia,tegra20-pmc"; 416 compatible = "nvidia,tegra20-pmc";
380 reg = <0x7000e400 0x400>; 417 reg = <0x7000e400 0x400>;
@@ -387,7 +424,7 @@
387 interrupts = <0 77 0x04>; 424 interrupts = <0 77 0x04>;
388 }; 425 };
389 426
390 gart { 427 iommu {
391 compatible = "nvidia,tegra20-gart"; 428 compatible = "nvidia,tegra20-gart";
392 reg = <0x7000f024 0x00000018 /* controller registers */ 429 reg = <0x7000f024 0x00000018 /* controller registers */
393 0x58000000 0x02000000>; /* GART aperture */ 430 0x58000000 0x02000000>; /* GART aperture */
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
new file mode 100644
index 000000000000..8ff2ff20e4a3
--- /dev/null
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -0,0 +1,373 @@
1/dts-v1/;
2
3/include/ "tegra30.dtsi"
4
5/ {
6 model = "NVIDIA Tegra30 Beaver evaluation board";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
9 memory {
10 reg = <0x80000000 0x80000000>;
11 };
12
13 pinmux {
14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 sdmmc1_clk_pz0 {
19 nvidia,pins = "sdmmc1_clk_pz0";
20 nvidia,function = "sdmmc1";
21 nvidia,pull = <0>;
22 nvidia,tristate = <0>;
23 };
24 sdmmc1_cmd_pz1 {
25 nvidia,pins = "sdmmc1_cmd_pz1",
26 "sdmmc1_dat0_py7",
27 "sdmmc1_dat1_py6",
28 "sdmmc1_dat2_py5",
29 "sdmmc1_dat3_py4";
30 nvidia,function = "sdmmc1";
31 nvidia,pull = <2>;
32 nvidia,tristate = <0>;
33 };
34 sdmmc3_clk_pa6 {
35 nvidia,pins = "sdmmc3_clk_pa6";
36 nvidia,function = "sdmmc3";
37 nvidia,pull = <0>;
38 nvidia,tristate = <0>;
39 };
40 sdmmc3_cmd_pa7 {
41 nvidia,pins = "sdmmc3_cmd_pa7",
42 "sdmmc3_dat0_pb7",
43 "sdmmc3_dat1_pb6",
44 "sdmmc3_dat2_pb5",
45 "sdmmc3_dat3_pb4";
46 nvidia,function = "sdmmc3";
47 nvidia,pull = <2>;
48 nvidia,tristate = <0>;
49 };
50 sdmmc4_clk_pcc4 {
51 nvidia,pins = "sdmmc4_clk_pcc4",
52 "sdmmc4_rst_n_pcc3";
53 nvidia,function = "sdmmc4";
54 nvidia,pull = <0>;
55 nvidia,tristate = <0>;
56 };
57 sdmmc4_dat0_paa0 {
58 nvidia,pins = "sdmmc4_dat0_paa0",
59 "sdmmc4_dat1_paa1",
60 "sdmmc4_dat2_paa2",
61 "sdmmc4_dat3_paa3",
62 "sdmmc4_dat4_paa4",
63 "sdmmc4_dat5_paa5",
64 "sdmmc4_dat6_paa6",
65 "sdmmc4_dat7_paa7";
66 nvidia,function = "sdmmc4";
67 nvidia,pull = <2>;
68 nvidia,tristate = <0>;
69 };
70 dap2_fs_pa2 {
71 nvidia,pins = "dap2_fs_pa2",
72 "dap2_sclk_pa3",
73 "dap2_din_pa4",
74 "dap2_dout_pa5";
75 nvidia,function = "i2s1";
76 nvidia,pull = <0>;
77 nvidia,tristate = <0>;
78 };
79 sdio3 {
80 nvidia,pins = "drive_sdio3";
81 nvidia,high-speed-mode = <0>;
82 nvidia,schmitt = <0>;
83 nvidia,pull-down-strength = <46>;
84 nvidia,pull-up-strength = <42>;
85 nvidia,slew-rate-rising = <1>;
86 nvidia,slew-rate-falling = <1>;
87 };
88 };
89 };
90
91 serial@70006000 {
92 status = "okay";
93 };
94
95 i2c@7000c000 {
96 status = "okay";
97 clock-frequency = <100000>;
98 };
99
100 i2c@7000c400 {
101 status = "okay";
102 clock-frequency = <100000>;
103 };
104
105 i2c@7000c500 {
106 status = "okay";
107 clock-frequency = <100000>;
108 };
109
110 i2c@7000c700 {
111 status = "okay";
112 clock-frequency = <100000>;
113 };
114
115 i2c@7000d000 {
116 status = "okay";
117 clock-frequency = <100000>;
118
119 tps62361 {
120 compatible = "ti,tps62361";
121 reg = <0x60>;
122
123 regulator-name = "tps62361-vout";
124 regulator-min-microvolt = <500000>;
125 regulator-max-microvolt = <1500000>;
126 regulator-boot-on;
127 regulator-always-on;
128 ti,vsel0-state-high;
129 ti,vsel1-state-high;
130 };
131
132 pmic: tps65911@2d {
133 compatible = "ti,tps65911";
134 reg = <0x2d>;
135
136 interrupts = <0 86 0x4>;
137 #interrupt-cells = <2>;
138 interrupt-controller;
139
140 ti,system-power-controller;
141
142 #gpio-cells = <2>;
143 gpio-controller;
144
145 vcc1-supply = <&vdd_5v_in_reg>;
146 vcc2-supply = <&vdd_5v_in_reg>;
147 vcc3-supply = <&vio_reg>;
148 vcc4-supply = <&vdd_5v_in_reg>;
149 vcc5-supply = <&vdd_5v_in_reg>;
150 vcc6-supply = <&vdd2_reg>;
151 vcc7-supply = <&vdd_5v_in_reg>;
152 vccio-supply = <&vdd_5v_in_reg>;
153
154 regulators {
155 #address-cells = <1>;
156 #size-cells = <0>;
157
158 vdd1_reg: vdd1 {
159 regulator-name = "vddio_ddr_1v2";
160 regulator-min-microvolt = <1200000>;
161 regulator-max-microvolt = <1200000>;
162 regulator-always-on;
163 };
164
165 vdd2_reg: vdd2 {
166 regulator-name = "vdd_1v5_gen";
167 regulator-min-microvolt = <1500000>;
168 regulator-max-microvolt = <1500000>;
169 regulator-always-on;
170 };
171
172 vddctrl_reg: vddctrl {
173 regulator-name = "vdd_cpu,vdd_sys";
174 regulator-min-microvolt = <1000000>;
175 regulator-max-microvolt = <1000000>;
176 regulator-always-on;
177 };
178
179 vio_reg: vio {
180 regulator-name = "vdd_1v8_gen";
181 regulator-min-microvolt = <1800000>;
182 regulator-max-microvolt = <1800000>;
183 regulator-always-on;
184 };
185
186 ldo1_reg: ldo1 {
187 regulator-name = "vdd_pexa,vdd_pexb";
188 regulator-min-microvolt = <1050000>;
189 regulator-max-microvolt = <1050000>;
190 };
191
192 ldo2_reg: ldo2 {
193 regulator-name = "vdd_sata,avdd_plle";
194 regulator-min-microvolt = <1050000>;
195 regulator-max-microvolt = <1050000>;
196 };
197
198 /* LDO3 is not connected to anything */
199
200 ldo4_reg: ldo4 {
201 regulator-name = "vdd_rtc";
202 regulator-min-microvolt = <1200000>;
203 regulator-max-microvolt = <1200000>;
204 regulator-always-on;
205 };
206
207 ldo5_reg: ldo5 {
208 regulator-name = "vddio_sdmmc,avdd_vdac";
209 regulator-min-microvolt = <3300000>;
210 regulator-max-microvolt = <3300000>;
211 regulator-always-on;
212 };
213
214 ldo6_reg: ldo6 {
215 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
216 regulator-min-microvolt = <1200000>;
217 regulator-max-microvolt = <1200000>;
218 };
219
220 ldo7_reg: ldo7 {
221 regulator-name = "vdd_pllm,x,u,a_p_c_s";
222 regulator-min-microvolt = <1200000>;
223 regulator-max-microvolt = <1200000>;
224 regulator-always-on;
225 };
226
227 ldo8_reg: ldo8 {
228 regulator-name = "vdd_ddr_hs";
229 regulator-min-microvolt = <1000000>;
230 regulator-max-microvolt = <1000000>;
231 regulator-always-on;
232 };
233 };
234 };
235 };
236
237 spi@7000da00 {
238 status = "okay";
239 spi-max-frequency = <25000000>;
240 spi-flash@1 {
241 compatible = "winbond,w25q32";
242 reg = <1>;
243 spi-max-frequency = <20000000>;
244 };
245 };
246
247 ahub {
248 i2s@70080400 {
249 status = "okay";
250 };
251 };
252
253 pmc {
254 status = "okay";
255 nvidia,invert-interrupt;
256 };
257
258 sdhci@78000000 {
259 status = "okay";
260 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
261 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
262 power-gpios = <&gpio 31 0>; /* gpio PD7 */
263 bus-width = <4>;
264 };
265
266 sdhci@78000600 {
267 status = "okay";
268 bus-width = <8>;
269 };
270
271 regulators {
272 compatible = "simple-bus";
273 #address-cells = <1>;
274 #size-cells = <0>;
275
276 vdd_5v_in_reg: regulator@0 {
277 compatible = "regulator-fixed";
278 reg = <0>;
279 regulator-name = "vdd_5v_in";
280 regulator-min-microvolt = <5000000>;
281 regulator-max-microvolt = <5000000>;
282 regulator-always-on;
283 };
284
285 chargepump_5v_reg: regulator@1 {
286 compatible = "regulator-fixed";
287 reg = <1>;
288 regulator-name = "chargepump_5v";
289 regulator-min-microvolt = <5000000>;
290 regulator-max-microvolt = <5000000>;
291 regulator-boot-on;
292 regulator-always-on;
293 enable-active-high;
294 gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
295 };
296
297 ddr_reg: regulator@2 {
298 compatible = "regulator-fixed";
299 reg = <2>;
300 regulator-name = "vdd_ddr";
301 regulator-min-microvolt = <1500000>;
302 regulator-max-microvolt = <1500000>;
303 regulator-always-on;
304 regulator-boot-on;
305 enable-active-high;
306 gpio = <&pmic 7 0>; /* PMIC TPS65911 GPIO7 */
307 vin-supply = <&vdd_5v_in_reg>;
308 };
309
310 vdd_5v_sata_reg: regulator@3 {
311 compatible = "regulator-fixed";
312 reg = <3>;
313 regulator-name = "vdd_5v_sata";
314 regulator-min-microvolt = <5000000>;
315 regulator-max-microvolt = <5000000>;
316 regulator-always-on;
317 regulator-boot-on;
318 enable-active-high;
319 gpio = <&gpio 30 0>; /* gpio PD6 */
320 vin-supply = <&vdd_5v_in_reg>;
321 };
322
323 usb1_vbus_reg: regulator@4 {
324 compatible = "regulator-fixed";
325 reg = <4>;
326 regulator-name = "usb1_vbus";
327 regulator-min-microvolt = <5000000>;
328 regulator-max-microvolt = <5000000>;
329 enable-active-high;
330 gpio = <&gpio 68 0>; /* GPIO PI4 */
331 gpio-open-drain;
332 vin-supply = <&vdd_5v_in_reg>;
333 };
334
335 usb3_vbus_reg: regulator@5 {
336 compatible = "regulator-fixed";
337 reg = <5>;
338 regulator-name = "usb3_vbus";
339 regulator-min-microvolt = <5000000>;
340 regulator-max-microvolt = <5000000>;
341 enable-active-high;
342 gpio = <&gpio 63 0>; /* GPIO PH7 */
343 gpio-open-drain;
344 vin-supply = <&vdd_5v_in_reg>;
345 };
346
347 sys_3v3_reg: regulator@6 {
348 compatible = "regulator-fixed";
349 reg = <6>;
350 regulator-name = "sys_3v3,vdd_3v3_alw";
351 regulator-min-microvolt = <3300000>;
352 regulator-max-microvolt = <3300000>;
353 regulator-always-on;
354 regulator-boot-on;
355 enable-active-high;
356 gpio = <&pmic 6 0>; /* PMIC TPS65911 GPIO6 */
357 vin-supply = <&vdd_5v_in_reg>;
358 };
359
360 sys_3v3_pexs_reg: regulator@7 {
361 compatible = "regulator-fixed";
362 reg = <7>;
363 regulator-name = "sys_3v3_pexs";
364 regulator-min-microvolt = <3300000>;
365 regulator-max-microvolt = <3300000>;
366 regulator-always-on;
367 regulator-boot-on;
368 enable-active-high;
369 gpio = <&gpio 95 0>; /* gpio PL7 */
370 vin-supply = <&sys_3v3_reg>;
371 };
372 };
373};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index bdb2a660f376..17499272a4ef 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -106,12 +106,25 @@
106 nvidia,slew-rate-rising = <1>; 106 nvidia,slew-rate-rising = <1>;
107 nvidia,slew-rate-falling = <1>; 107 nvidia,slew-rate-falling = <1>;
108 }; 108 };
109 uart3_txd_pw6 {
110 nvidia,pins = "uart3_txd_pw6",
111 "uart3_cts_n_pa1",
112 "uart3_rts_n_pc0",
113 "uart3_rxd_pw7";
114 nvidia,function = "uartc";
115 nvidia,pull = <0>;
116 nvidia,tristate = <0>;
117 };
109 }; 118 };
110 }; 119 };
111 120
112 serial@70006000 { 121 serial@70006000 {
113 status = "okay"; 122 status = "okay";
114 clock-frequency = <408000000>; 123 };
124
125 serial@70006200 {
126 compatible = "nvidia,tegra30-hsuart";
127 status = "okay";
115 }; 128 };
116 129
117 i2c@7000c000 { 130 i2c@7000c000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 2de8b919d78c..767803e1fd55 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -4,6 +4,14 @@
4 compatible = "nvidia,tegra30"; 4 compatible = "nvidia,tegra30";
5 interrupt-parent = <&intc>; 5 interrupt-parent = <&intc>;
6 6
7 aliases {
8 serial0 = &uarta;
9 serial1 = &uartb;
10 serial2 = &uartc;
11 serial3 = &uartd;
12 serial4 = &uarte;
13 };
14
7 host1x { 15 host1x {
8 compatible = "nvidia,tegra30-host1x", "simple-bus"; 16 compatible = "nvidia,tegra30-host1x", "simple-bus";
9 reg = <0x50000000 0x00024000>; 17 reg = <0x50000000 0x00024000>;
@@ -113,15 +121,6 @@
113 interrupts = <1 13 0xf04>; 121 interrupts = <1 13 0xf04>;
114 }; 122 };
115 123
116 cache-controller@50043000 {
117 compatible = "arm,pl310-cache";
118 reg = <0x50043000 0x1000>;
119 arm,data-latency = <6 6 2>;
120 arm,tag-latency = <5 5 2>;
121 cache-unified;
122 cache-level = <2>;
123 };
124
125 intc: interrupt-controller { 124 intc: interrupt-controller {
126 compatible = "arm,cortex-a9-gic"; 125 compatible = "arm,cortex-a9-gic";
127 reg = <0x50041000 0x1000 126 reg = <0x50041000 0x1000
@@ -130,6 +129,15 @@
130 #interrupt-cells = <3>; 129 #interrupt-cells = <3>;
131 }; 130 };
132 131
132 cache-controller {
133 compatible = "arm,pl310-cache";
134 reg = <0x50043000 0x1000>;
135 arm,data-latency = <6 6 2>;
136 arm,tag-latency = <5 5 2>;
137 cache-unified;
138 cache-level = <2>;
139 };
140
133 timer@60005000 { 141 timer@60005000 {
134 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer"; 142 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
135 reg = <0x60005000 0x400>; 143 reg = <0x60005000 0x400>;
@@ -191,7 +199,7 @@
191 }; 199 };
192 200
193 gpio: gpio { 201 gpio: gpio {
194 compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; 202 compatible = "nvidia,tegra30-gpio";
195 reg = <0x6000d000 0x1000>; 203 reg = <0x6000d000 0x1000>;
196 interrupts = <0 32 0x04 204 interrupts = <0 32 0x04
197 0 33 0x04 205 0 33 0x04
@@ -213,47 +221,60 @@
213 0x70003000 0x3e4>; /* Mux registers */ 221 0x70003000 0x3e4>; /* Mux registers */
214 }; 222 };
215 223
216 serial@70006000 { 224 /*
225 * There are two serial driver i.e. 8250 based simple serial
226 * driver and APB DMA based serial driver for higher baudrate
227 * and performace. To enable the 8250 based driver, the compatible
228 * is "nvidia,tegra30-uart", "nvidia,tegra20-uart" and to enable
229 * the APB DMA based serial driver, the comptible is
230 * "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart".
231 */
232 uarta: serial@70006000 {
217 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; 233 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
218 reg = <0x70006000 0x40>; 234 reg = <0x70006000 0x40>;
219 reg-shift = <2>; 235 reg-shift = <2>;
220 interrupts = <0 36 0x04>; 236 interrupts = <0 36 0x04>;
237 nvidia,dma-request-selector = <&apbdma 8>;
221 clocks = <&tegra_car 6>; 238 clocks = <&tegra_car 6>;
222 status = "disabled"; 239 status = "disabled";
223 }; 240 };
224 241
225 serial@70006040 { 242 uartb: serial@70006040 {
226 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; 243 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
227 reg = <0x70006040 0x40>; 244 reg = <0x70006040 0x40>;
228 reg-shift = <2>; 245 reg-shift = <2>;
229 interrupts = <0 37 0x04>; 246 interrupts = <0 37 0x04>;
247 nvidia,dma-request-selector = <&apbdma 9>;
230 clocks = <&tegra_car 160>; 248 clocks = <&tegra_car 160>;
231 status = "disabled"; 249 status = "disabled";
232 }; 250 };
233 251
234 serial@70006200 { 252 uartc: serial@70006200 {
235 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; 253 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
236 reg = <0x70006200 0x100>; 254 reg = <0x70006200 0x100>;
237 reg-shift = <2>; 255 reg-shift = <2>;
238 interrupts = <0 46 0x04>; 256 interrupts = <0 46 0x04>;
257 nvidia,dma-request-selector = <&apbdma 10>;
239 clocks = <&tegra_car 55>; 258 clocks = <&tegra_car 55>;
240 status = "disabled"; 259 status = "disabled";
241 }; 260 };
242 261
243 serial@70006300 { 262 uartd: serial@70006300 {
244 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; 263 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
245 reg = <0x70006300 0x100>; 264 reg = <0x70006300 0x100>;
246 reg-shift = <2>; 265 reg-shift = <2>;
247 interrupts = <0 90 0x04>; 266 interrupts = <0 90 0x04>;
267 nvidia,dma-request-selector = <&apbdma 19>;
248 clocks = <&tegra_car 65>; 268 clocks = <&tegra_car 65>;
249 status = "disabled"; 269 status = "disabled";
250 }; 270 };
251 271
252 serial@70006400 { 272 uarte: serial@70006400 {
253 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; 273 compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
254 reg = <0x70006400 0x100>; 274 reg = <0x70006400 0x100>;
255 reg-shift = <2>; 275 reg-shift = <2>;
256 interrupts = <0 91 0x04>; 276 interrupts = <0 91 0x04>;
277 nvidia,dma-request-selector = <&apbdma 20>;
257 clocks = <&tegra_car 66>; 278 clocks = <&tegra_car 66>;
258 status = "disabled"; 279 status = "disabled";
259 }; 280 };
@@ -392,6 +413,14 @@
392 status = "disabled"; 413 status = "disabled";
393 }; 414 };
394 415
416 kbc {
417 compatible = "nvidia,tegra30-kbc", "nvidia,tegra20-kbc";
418 reg = <0x7000e200 0x100>;
419 interrupts = <0 85 0x04>;
420 clocks = <&tegra_car 36>;
421 status = "disabled";
422 };
423
395 pmc { 424 pmc {
396 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; 425 compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
397 reg = <0x7000e400 0x400>; 426 reg = <0x7000e400 0x400>;
@@ -406,7 +435,7 @@
406 interrupts = <0 77 0x04>; 435 interrupts = <0 77 0x04>;
407 }; 436 };
408 437
409 smmu { 438 iommu {
410 compatible = "nvidia,tegra30-smmu"; 439 compatible = "nvidia,tegra30-smmu";
411 reg = <0x7000f010 0x02c 440 reg = <0x7000f010 0x02c
412 0x7000f1f0 0x010 441 0x7000f1f0 0x010
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index 6b36a5ae03c2..9aaad36a1728 100644
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -84,6 +84,7 @@ CONFIG_SERIAL_OF_PLATFORM=y
84CONFIG_I2C=y 84CONFIG_I2C=y
85CONFIG_I2C_CHARDEV=y 85CONFIG_I2C_CHARDEV=y
86CONFIG_I2C_DAVINCI=y 86CONFIG_I2C_DAVINCI=y
87CONFIG_PINCTRL_SINGLE=y
87# CONFIG_HWMON is not set 88# CONFIG_HWMON is not set
88CONFIG_WATCHDOG=y 89CONFIG_WATCHDOG=y
89CONFIG_REGULATOR=y 90CONFIG_REGULATOR=y
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 7aeb473ee539..9706c000f294 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -210,6 +210,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
210 CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk), 210 CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
211 CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk), 211 CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
212 CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk), 212 CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
213 CLKDEV_CON_DEV_ID("mci_clk", "fffb4000.mmc", &mmc_clk),
214 CLKDEV_CON_DEV_ID("emac_clk", "fffbc000.ethernet", &ether_clk),
213 CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk), 215 CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
214 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk), 216 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
215 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk), 217 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 0153950f6068..a075b3e0c5c7 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -62,6 +62,7 @@ config MACH_DA8XX_DT
62 bool "Support DA8XX platforms using device tree" 62 bool "Support DA8XX platforms using device tree"
63 default y 63 default y
64 depends on ARCH_DAVINCI_DA8XX 64 depends on ARCH_DAVINCI_DA8XX
65 select PINCTRL
65 help 66 help
66 Say y here to include support for TI DaVinci DA850 based using 67 Say y here to include support for TI DaVinci DA850 based using
67 Flattened Device Tree. More information at Documentation/devicetree 68 Flattened Device Tree. More information at Documentation/devicetree
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index 9a7c76efc8f8..6b7a0a27fbd1 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -37,11 +37,18 @@ static void __init da8xx_init_irq(void)
37 of_irq_init(da8xx_irq_match); 37 of_irq_init(da8xx_irq_match);
38} 38}
39 39
40struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
41 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01c22000, "i2c_davinci.1", NULL),
42 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "watchdog", NULL),
43 {}
44};
45
40#ifdef CONFIG_ARCH_DAVINCI_DA850 46#ifdef CONFIG_ARCH_DAVINCI_DA850
41 47
42static void __init da850_init_machine(void) 48static void __init da850_init_machine(void)
43{ 49{
44 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 50 of_platform_populate(NULL, of_default_bus_match_table,
51 da850_auxdata_lookup, NULL);
45 52
46 da8xx_uart_clk_enable(); 53 da8xx_uart_clk_enable();
47} 54}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index aa402bc160c8..fc50243b1481 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -359,7 +359,7 @@ static struct resource da8xx_watchdog_resources[] = {
359 }, 359 },
360}; 360};
361 361
362struct platform_device da8xx_wdt_device = { 362static struct platform_device da8xx_wdt_device = {
363 .name = "watchdog", 363 .name = "watchdog",
364 .id = -1, 364 .id = -1,
365 .num_resources = ARRAY_SIZE(da8xx_watchdog_resources), 365 .num_resources = ARRAY_SIZE(da8xx_watchdog_resources),
@@ -368,7 +368,15 @@ struct platform_device da8xx_wdt_device = {
368 368
369void da8xx_restart(char mode, const char *cmd) 369void da8xx_restart(char mode, const char *cmd)
370{ 370{
371 davinci_watchdog_reset(&da8xx_wdt_device); 371 struct device *dev;
372
373 dev = bus_find_device_by_name(&platform_bus_type, NULL, "watchdog");
374 if (!dev) {
375 pr_err("%s: failed to find watchdog device\n", __func__);
376 return;
377 }
378
379 davinci_watchdog_reset(to_platform_device(dev));
372} 380}
373 381
374int __init da8xx_register_watchdog(void) 382int __init da8xx_register_watchdog(void)
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 1b14aea40310..de439b7b9af1 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -110,7 +110,6 @@ extern struct emac_platform_data da8xx_emac_pdata;
110extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; 110extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
111extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; 111extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
112 112
113extern struct platform_device da8xx_wdt_device;
114 113
115extern const short da830_emif25_pins[]; 114extern const short da830_emif25_pins[];
116extern const short da830_spi0_pins[]; 115extern const short da830_spi0_pins[];
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 5fad7cefe8aa..052186713347 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -119,6 +119,23 @@ static struct fb_videomode apf28dev_video_modes[] = {
119 }, 119 },
120}; 120};
121 121
122static struct fb_videomode cfa10049_video_modes[] = {
123 {
124 .name = "Himax HX8357-B",
125 .refresh = 60,
126 .xres = 320,
127 .yres = 480,
128 .pixclock = 108506, /* picosecond (9.216 MHz) */
129 .left_margin = 2,
130 .right_margin = 2,
131 .upper_margin = 2,
132 .lower_margin = 2,
133 .hsync_len = 15,
134 .vsync_len = 15,
135 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT
136 },
137};
138
122static struct mxsfb_platform_data mxsfb_pdata __initdata; 139static struct mxsfb_platform_data mxsfb_pdata __initdata;
123 140
124/* 141/*
@@ -387,6 +404,17 @@ static void __init cfa10049_init(void)
387 update_fec_mac_prop(OUI_CRYSTALFONTZ); 404 update_fec_mac_prop(OUI_CRYSTALFONTZ);
388} 405}
389 406
407static void __init cfa10037_init(void)
408{
409 enable_clk_enet_out();
410 update_fec_mac_prop(OUI_CRYSTALFONTZ);
411
412 mxsfb_pdata.mode_list = cfa10049_video_modes;
413 mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
414 mxsfb_pdata.default_bpp = 32;
415 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
416}
417
390static void __init apf28_init(void) 418static void __init apf28_init(void)
391{ 419{
392 enable_clk_enet_out(); 420 enable_clk_enet_out();
@@ -407,6 +435,8 @@ static void __init mxs_machine_init(void)
407 m28evk_init(); 435 m28evk_init();
408 else if (of_machine_is_compatible("bluegiga,apx4devkit")) 436 else if (of_machine_is_compatible("bluegiga,apx4devkit"))
409 apx4devkit_init(); 437 apx4devkit_init();
438 else if (of_machine_is_compatible("crystalfontz,cfa10037"))
439 cfa10037_init();
410 else if (of_machine_is_compatible("crystalfontz,cfa10049")) 440 else if (of_machine_is_compatible("crystalfontz,cfa10049"))
411 cfa10049_init(); 441 cfa10049_init();
412 else if (of_machine_is_compatible("armadeus,imx28-apf28")) 442 else if (of_machine_is_compatible("armadeus,imx28-apf28"))
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index 706dc5727bbe..82226a5d60ef 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -4,19 +4,13 @@ menu "Nomadik boards"
4 4
5config MACH_NOMADIK_8815NHK 5config MACH_NOMADIK_8815NHK
6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)" 6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
7 select CLKSRC_NOMADIK_MTU
8 select NOMADIK_8815 7 select NOMADIK_8815
8 select I2C
9 select I2C_ALGOBIT
9 10
10endmenu 11endmenu
11 12
12config NOMADIK_8815 13config NOMADIK_8815
13 bool 14 bool
14 15
15config I2C_BITBANG_8815NHK
16 tristate "Driver for bit-bang busses found on the 8815 NHK"
17 depends on I2C && MACH_NOMADIK_8815NHK
18 depends on PINCTRL_NOMADIK
19 default y
20 select I2C_ALGOBIT
21
22endif 16endif
diff --git a/arch/arm/mach-nomadik/Makefile b/arch/arm/mach-nomadik/Makefile
index a42c9a33d3bf..1071c3b04d1a 100644
--- a/arch/arm/mach-nomadik/Makefile
+++ b/arch/arm/mach-nomadik/Makefile
@@ -9,9 +9,3 @@
9 9
10# Cpu revision 10# Cpu revision
11obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o 11obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o
12
13# Specific board support
14obj-$(CONFIG_MACH_NOMADIK_8815NHK) += board-nhk8815.o
15
16# Nomadik extra devices
17obj-$(CONFIG_I2C_BITBANG_8815NHK) += i2c-8815nhk.o
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
deleted file mode 100644
index aaed48d94374..000000000000
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ /dev/null
@@ -1,353 +0,0 @@
1/*
2 * linux/arch/arm/mach-nomadik/board-8815nhk.c
3 *
4 * Copyright (C) STMicroelectronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 *
10 * NHK15 board specifc driver definition
11 */
12#include <linux/types.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
16#include <linux/amba/bus.h>
17#include <linux/amba/mmci.h>
18#include <linux/interrupt.h>
19#include <linux/gpio.h>
20#include <linux/mtd/mtd.h>
21#include <linux/mtd/nand.h>
22#include <linux/mtd/fsmc.h>
23#include <linux/mtd/onenand.h>
24#include <linux/mtd/partitions.h>
25#include <linux/i2c.h>
26#include <linux/io.h>
27#include <linux/pinctrl/machine.h>
28#include <linux/platform_data/pinctrl-nomadik.h>
29#include <linux/platform_data/clocksource-nomadik-mtu.h>
30#include <asm/sizes.h>
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33#include <asm/mach/flash.h>
34#include <asm/mach/time.h>
35#include <mach/irqs.h>
36
37#include "cpu-8815.h"
38
39/* Initial value for SRC control register: all timers use MXTAL/8 source */
40#define SRC_CR_INIT_MASK 0x00007fff
41#define SRC_CR_INIT_VAL 0x2aaa8000
42
43#define ALE_OFF 0x1000000
44#define CLE_OFF 0x800000
45
46/* These addresses span 16MB, so use three individual pages */
47static struct resource nhk8815_nand_resources[] = {
48 {
49 .name = "nand_data",
50 .start = 0x40000000,
51 .end = 0x40000000 + SZ_16K - 1,
52 .flags = IORESOURCE_MEM,
53 }, {
54 .name = "nand_addr",
55 .start = 0x40000000 + ALE_OFF,
56 .end = 0x40000000 +ALE_OFF + SZ_16K - 1,
57 .flags = IORESOURCE_MEM,
58 }, {
59 .name = "nand_cmd",
60 .start = 0x40000000 + CLE_OFF,
61 .end = 0x40000000 + CLE_OFF + SZ_16K - 1,
62 .flags = IORESOURCE_MEM,
63 }, {
64 .name = "fsmc_regs",
65 .start = NOMADIK_FSMC_BASE,
66 .end = NOMADIK_FSMC_BASE + SZ_4K - 1,
67 .flags = IORESOURCE_MEM,
68 },
69};
70
71/*
72 * These partitions are the same as those used in the 2.6.20 release
73 * shipped by the vendor; the first two partitions are mandated
74 * by the boot ROM, and the bootloader area is somehow oversized...
75 */
76static struct mtd_partition nhk8815_partitions[] = {
77 {
78 .name = "X-Loader(NAND)",
79 .offset = 0,
80 .size = SZ_256K,
81 }, {
82 .name = "MemInit(NAND)",
83 .offset = MTDPART_OFS_APPEND,
84 .size = SZ_256K,
85 }, {
86 .name = "BootLoader(NAND)",
87 .offset = MTDPART_OFS_APPEND,
88 .size = SZ_2M,
89 }, {
90 .name = "Kernel zImage(NAND)",
91 .offset = MTDPART_OFS_APPEND,
92 .size = 3 * SZ_1M,
93 }, {
94 .name = "Root Filesystem(NAND)",
95 .offset = MTDPART_OFS_APPEND,
96 .size = 22 * SZ_1M,
97 }, {
98 .name = "User Filesystem(NAND)",
99 .offset = MTDPART_OFS_APPEND,
100 .size = MTDPART_SIZ_FULL,
101 }
102};
103
104static struct fsmc_nand_timings nhk8815_nand_timings = {
105 .thiz = 0,
106 .thold = 0x10,
107 .twait = 0x0A,
108 .tset = 0,
109};
110
111static struct fsmc_nand_platform_data nhk8815_nand_platform_data = {
112 .nand_timings = &nhk8815_nand_timings,
113 .partitions = nhk8815_partitions,
114 .nr_partitions = ARRAY_SIZE(nhk8815_partitions),
115 .width = FSMC_NAND_BW8,
116};
117
118static struct platform_device nhk8815_nand_device = {
119 .name = "fsmc-nand",
120 .id = -1,
121 .resource = nhk8815_nand_resources,
122 .num_resources = ARRAY_SIZE(nhk8815_nand_resources),
123 .dev = {
124 .platform_data = &nhk8815_nand_platform_data,
125 },
126};
127
128/* These are the partitions for the OneNand device, different from above */
129static struct mtd_partition nhk8815_onenand_partitions[] = {
130 {
131 .name = "X-Loader(OneNAND)",
132 .offset = 0,
133 .size = SZ_256K,
134 }, {
135 .name = "MemInit(OneNAND)",
136 .offset = MTDPART_OFS_APPEND,
137 .size = SZ_256K,
138 }, {
139 .name = "BootLoader(OneNAND)",
140 .offset = MTDPART_OFS_APPEND,
141 .size = SZ_2M-SZ_256K,
142 }, {
143 .name = "SysImage(OneNAND)",
144 .offset = MTDPART_OFS_APPEND,
145 .size = 4 * SZ_1M,
146 }, {
147 .name = "Root Filesystem(OneNAND)",
148 .offset = MTDPART_OFS_APPEND,
149 .size = 22 * SZ_1M,
150 }, {
151 .name = "User Filesystem(OneNAND)",
152 .offset = MTDPART_OFS_APPEND,
153 .size = MTDPART_SIZ_FULL,
154 }
155};
156
157static struct onenand_platform_data nhk8815_onenand_data = {
158 .parts = nhk8815_onenand_partitions,
159 .nr_parts = ARRAY_SIZE(nhk8815_onenand_partitions),
160};
161
162static struct resource nhk8815_onenand_resource[] = {
163 {
164 .start = 0x30000000,
165 .end = 0x30000000 + SZ_128K - 1,
166 .flags = IORESOURCE_MEM,
167 },
168};
169
170static struct platform_device nhk8815_onenand_device = {
171 .name = "onenand-flash",
172 .id = -1,
173 .dev = {
174 .platform_data = &nhk8815_onenand_data,
175 },
176 .resource = nhk8815_onenand_resource,
177 .num_resources = ARRAY_SIZE(nhk8815_onenand_resource),
178};
179
180/* bus control reg. and bus timing reg. for CS0..CS3 */
181#define FSMC_BCR(x) (NOMADIK_FSMC_VA + (x << 3))
182#define FSMC_BTR(x) (NOMADIK_FSMC_VA + (x << 3) + 0x04)
183
184static void __init nhk8815_onenand_init(void)
185{
186#ifdef CONFIG_MTD_ONENAND
187 /* Set up SMCS0 for OneNand */
188 writel(0x000030db, FSMC_BCR(0));
189 writel(0x02100551, FSMC_BTR(0));
190#endif
191}
192
193static struct mmci_platform_data mmcsd_plat_data = {
194 .ocr_mask = MMC_VDD_29_30,
195 .f_max = 48000000,
196 .gpio_wp = -1,
197 .gpio_cd = 111,
198 .cd_invert = true,
199 .capabilities = MMC_CAP_MMC_HIGHSPEED |
200 MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA,
201};
202
203static int __init nhk8815_mmcsd_init(void)
204{
205 int ret;
206
207 ret = gpio_request(112, "card detect bias");
208 if (ret)
209 return ret;
210 gpio_direction_output(112, 0);
211 amba_apb_device_add(NULL, "mmci", NOMADIK_SDI_BASE, SZ_4K, IRQ_SDMMC, 0, &mmcsd_plat_data, 0x10180180);
212 return 0;
213}
214module_init(nhk8815_mmcsd_init);
215
216static struct resource nhk8815_eth_resources[] = {
217 {
218 .name = "smc91x-regs",
219 .start = 0x34000000 + 0x300,
220 .end = 0x34000000 + SZ_64K - 1,
221 .flags = IORESOURCE_MEM,
222 }, {
223 .start = NOMADIK_GPIO_TO_IRQ(115),
224 .end = NOMADIK_GPIO_TO_IRQ(115),
225 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
226 }
227};
228
229static struct platform_device nhk8815_eth_device = {
230 .name = "smc91x",
231 .resource = nhk8815_eth_resources,
232 .num_resources = ARRAY_SIZE(nhk8815_eth_resources),
233};
234
235static int __init nhk8815_eth_init(void)
236{
237 int gpio_nr = 115; /* hardwired in the board */
238 int err;
239
240 err = gpio_request(gpio_nr, "eth_irq");
241 if (!err) err = nmk_gpio_set_mode(gpio_nr, NMK_GPIO_ALT_GPIO);
242 if (!err) err = gpio_direction_input(gpio_nr);
243 if (err)
244 pr_err("Error %i in %s\n", err, __func__);
245 return err;
246}
247device_initcall(nhk8815_eth_init);
248
249static struct platform_device *nhk8815_platform_devices[] __initdata = {
250 &nhk8815_nand_device,
251 &nhk8815_onenand_device,
252 &nhk8815_eth_device,
253 /* will add more devices */
254};
255
256static void __init nomadik_timer_init(void)
257{
258 u32 src_cr;
259
260 /* Configure timer sources in "system reset controller" ctrl reg */
261 src_cr = readl(io_p2v(NOMADIK_SRC_BASE));
262 src_cr &= SRC_CR_INIT_MASK;
263 src_cr |= SRC_CR_INIT_VAL;
264 writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
265
266 nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0);
267}
268
269static struct i2c_board_info __initdata nhk8815_i2c0_devices[] = {
270 {
271 I2C_BOARD_INFO("stw4811", 0x2d),
272 },
273};
274
275static struct i2c_board_info __initdata nhk8815_i2c1_devices[] = {
276 {
277 I2C_BOARD_INFO("camera", 0x10),
278 },
279 {
280 I2C_BOARD_INFO("stw5095", 0x1a),
281 },
282 {
283 I2C_BOARD_INFO("lis3lv02dl", 0x1d),
284 },
285};
286
287static struct i2c_board_info __initdata nhk8815_i2c2_devices[] = {
288 {
289 I2C_BOARD_INFO("stw4811-usb", 0x2d),
290 },
291};
292
293static unsigned long out_low[] = { PIN_OUTPUT_LOW };
294static unsigned long out_high[] = { PIN_OUTPUT_HIGH };
295static unsigned long in_nopull[] = { PIN_INPUT_NOPULL };
296static unsigned long in_pullup[] = { PIN_INPUT_PULLUP };
297
298static struct pinctrl_map __initdata nhk8815_pinmap[] = {
299 PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-stn8815", "u0_a_1", "u0"),
300 PIN_MAP_MUX_GROUP_DEFAULT("uart1", "pinctrl-stn8815", "u1_a_1", "u1"),
301 /* Hog in MMC/SD card mux */
302 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-stn8815", "mmcsd_a_1", "mmcsd"),
303 /* MCCLK */
304 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO8_B10", out_low),
305 /* MCCMD */
306 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO9_A10", in_pullup),
307 /* MCCMDDIR */
308 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO10_C11", out_high),
309 /* MCDAT3-0 */
310 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO11_B11", in_pullup),
311 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO12_A11", in_pullup),
312 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO13_C12", in_pullup),
313 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO14_B12", in_pullup),
314 /* MCDAT0DIR */
315 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO15_A12", out_high),
316 /* MCDAT31DIR */
317 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO16_C13", out_high),
318 /* MCMSFBCLK */
319 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO24_C15", in_pullup),
320 /* CD input GPIO */
321 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO111_H21", in_nopull),
322 /* CD bias drive */
323 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO112_J21", out_low),
324};
325
326static void __init nhk8815_platform_init(void)
327{
328 pinctrl_register_mappings(nhk8815_pinmap, ARRAY_SIZE(nhk8815_pinmap));
329 cpu8815_platform_init();
330 nhk8815_onenand_init();
331 platform_add_devices(nhk8815_platform_devices,
332 ARRAY_SIZE(nhk8815_platform_devices));
333
334 amba_apb_device_add(NULL, "uart0", NOMADIK_UART0_BASE, SZ_4K, IRQ_UART0, 0, NULL, 0);
335 amba_apb_device_add(NULL, "uart1", NOMADIK_UART1_BASE, SZ_4K, IRQ_UART1, 0, NULL, 0);
336
337 i2c_register_board_info(0, nhk8815_i2c0_devices,
338 ARRAY_SIZE(nhk8815_i2c0_devices));
339 i2c_register_board_info(1, nhk8815_i2c1_devices,
340 ARRAY_SIZE(nhk8815_i2c1_devices));
341 i2c_register_board_info(2, nhk8815_i2c2_devices,
342 ARRAY_SIZE(nhk8815_i2c2_devices));
343}
344
345MACHINE_START(NOMADIK, "NHK8815")
346 /* Maintainer: ST MicroElectronics */
347 .atag_offset = 0x100,
348 .map_io = cpu8815_map_io,
349 .init_irq = cpu8815_init_irq,
350 .init_time = nomadik_timer_init,
351 .init_machine = nhk8815_platform_init,
352 .restart = cpu8815_restart,
353MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 351404673f6c..21c1aa512640 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -25,138 +25,308 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/irqchip/arm-vic.h> 28#include <linux/irqchip.h>
29#include <linux/platform_data/clk-nomadik.h> 29#include <linux/platform_data/clk-nomadik.h>
30#include <linux/platform_data/pinctrl-nomadik.h> 30#include <linux/platform_data/pinctrl-nomadik.h>
31#include <linux/pinctrl/machine.h>
32#include <linux/platform_data/clocksource-nomadik-mtu.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_address.h>
36#include <linux/of_platform.h>
37#include <linux/mtd/fsmc.h>
38#include <linux/gpio.h>
39#include <linux/amba/mmci.h>
31 40
32#include <mach/hardware.h>
33#include <mach/irqs.h> 41#include <mach/irqs.h>
42#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 43#include <asm/mach/map.h>
44#include <asm/mach/time.h>
45#include <asm/mach-types.h>
35 46
36#include <asm/cacheflush.h> 47#include <asm/cacheflush.h>
37#include <asm/hardware/cache-l2x0.h> 48#include <asm/hardware/cache-l2x0.h>
38 49
39#include "cpu-8815.h" 50/*
51 * These are the only hard-coded address offsets we still have to use.
52 */
53#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
54#define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
55#define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
56#define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
57#define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
58#define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
59#define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
60#define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
61#define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
62#define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
63#define NOMADIK_XTI_BASE 0x101A0000 /* XTI */
64#define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */
65#define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */
66#define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */
67#define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */
68#define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */
69#define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */
70#define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */
71#define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */
72#define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */
73#define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */
74#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
75#define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
76#define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */
77#define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */
78#define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */
79#define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */
80#define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
81#define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
82#define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */
83#define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
84#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
85#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
86#define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */
87#define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */
88#define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */
89#define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */
90#define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */
91#define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */
92#define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
93#define NOMADIK_UART1_VBASE 0xF01FB000
40 94
41/* The 8815 has 4 GPIO blocks, let's register them immediately */ 95static unsigned long out_low[] = { PIN_OUTPUT_LOW };
42static resource_size_t __initdata cpu8815_gpio_base[] = { 96static unsigned long out_high[] = { PIN_OUTPUT_HIGH };
43 NOMADIK_GPIO0_BASE, 97static unsigned long in_nopull[] = { PIN_INPUT_NOPULL };
44 NOMADIK_GPIO1_BASE, 98static unsigned long in_pullup[] = { PIN_INPUT_PULLUP };
45 NOMADIK_GPIO2_BASE, 99
46 NOMADIK_GPIO3_BASE, 100static struct pinctrl_map __initdata nhk8815_pinmap[] = {
101 PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-stn8815", "u0_a_1", "u0"),
102 PIN_MAP_MUX_GROUP_DEFAULT("uart1", "pinctrl-stn8815", "u1_a_1", "u1"),
103 /* Hog in MMC/SD card mux */
104 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-stn8815", "mmcsd_a_1", "mmcsd"),
105 /* MCCLK */
106 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO8_B10", out_low),
107 /* MCCMD */
108 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO9_A10", in_pullup),
109 /* MCCMDDIR */
110 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO10_C11", out_high),
111 /* MCDAT3-0 */
112 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO11_B11", in_pullup),
113 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO12_A11", in_pullup),
114 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO13_C12", in_pullup),
115 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO14_B12", in_pullup),
116 /* MCDAT0DIR */
117 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO15_A12", out_high),
118 /* MCDAT31DIR */
119 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO16_C13", out_high),
120 /* MCMSFBCLK */
121 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO24_C15", in_pullup),
122 /* CD input GPIO */
123 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO111_H21", in_nopull),
124 /* CD bias drive */
125 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO112_J21", out_low),
126 /* I2C0 */
127 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO62_D3", in_pullup),
128 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO63_D2", in_pullup),
129 /* I2C1 */
130 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO53_L4", in_pullup),
131 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO54_L3", in_pullup),
132 /* I2C2 */
133 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO73_C21", in_pullup),
134 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO74_C20", in_pullup),
47}; 135};
48 136
49static struct platform_device * 137/* This is needed for LL-debug/earlyprintk/debug-macro.S */
50cpu8815_add_gpio(int id, resource_size_t addr, int irq, 138static struct map_desc cpu8815_io_desc[] __initdata = {
51 struct nmk_gpio_platform_data *pdata) 139 {
140 .virtual = NOMADIK_UART1_VBASE,
141 .pfn = __phys_to_pfn(NOMADIK_UART1_BASE),
142 .length = SZ_4K,
143 .type = MT_DEVICE,
144 },
145};
146
147static void __init cpu8815_map_io(void)
52{ 148{
53 struct resource resources[] = { 149 iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc));
54 {
55 .start = addr,
56 .end = addr + 127,
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .start = irq,
61 .end = irq,
62 .flags = IORESOURCE_IRQ,
63 }
64 };
65
66 return platform_device_register_resndata(NULL, "gpio", id,
67 resources, ARRAY_SIZE(resources),
68 pdata, sizeof(*pdata));
69} 150}
70 151
71void cpu8815_add_gpios(resource_size_t *base, int num, int irq, 152static void cpu8815_restart(char mode, const char *cmd)
72 struct nmk_gpio_platform_data *pdata)
73{ 153{
74 int first = 0; 154 void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K);
75 int i;
76 155
77 for (i = 0; i < num; i++, first += 32, irq++) { 156 /* FIXME: use egpio when implemented */
78 pdata->first_gpio = first;
79 pdata->first_irq = NOMADIK_GPIO_TO_IRQ(first);
80 pdata->num_gpio = 32;
81 157
82 cpu8815_add_gpio(i, base[i], irq, pdata); 158 /* Write anything to Reset status register */
83 } 159 writel(1, srcbase + 0x18);
84} 160}
85 161
86static inline void 162/* Initial value for SRC control register: all timers use MXTAL/8 source */
87cpu8815_add_pinctrl(struct device *parent, const char *name) 163#define SRC_CR_INIT_MASK 0x00007fff
164#define SRC_CR_INIT_VAL 0x2aaa8000
165
166static void __init cpu8815_timer_init_of(void)
88{ 167{
89 struct platform_device_info pdevinfo = { 168 struct device_node *mtu;
90 .parent = parent, 169 void __iomem *base;
91 .name = name, 170 int irq;
92 .id = -1, 171 u32 src_cr;
93 }; 172
173 /* We need this to be up now */
174 nomadik_clk_init();
175
176 mtu = of_find_node_by_path("/mtu0");
177 if (!mtu)
178 return;
179 base = of_iomap(mtu, 0);
180 if (WARN_ON(!base))
181 return;
182 irq = irq_of_parse_and_map(mtu, 0);
94 183
95 platform_device_register_full(&pdevinfo); 184 pr_info("Remapped MTU @ %p, irq: %d\n", base, irq);
185
186 /* Configure timer sources in "system reset controller" ctrl reg */
187 src_cr = readl(base);
188 src_cr &= SRC_CR_INIT_MASK;
189 src_cr |= SRC_CR_INIT_VAL;
190 writel(src_cr, base);
191
192 nmdk_timer_init(base, irq);
96} 193}
97 194
98static int __init cpu8815_init(void) 195static struct fsmc_nand_timings cpu8815_nand_timings = {
196 .thiz = 0,
197 .thold = 0x10,
198 .twait = 0x0A,
199 .tset = 0,
200};
201
202static struct fsmc_nand_platform_data cpu8815_nand_data = {
203 .nand_timings = &cpu8815_nand_timings,
204};
205
206/*
207 * The SMSC911x IRQ is connected to a GPIO pin, but the driver expects
208 * to simply request an IRQ passed as a resource. So the GPIO pin needs
209 * to be requested by this hog and set as input.
210 */
211static int __init cpu8815_eth_init(void)
99{ 212{
100 struct nmk_gpio_platform_data pdata = { 213 struct device_node *eth;
101 /* No custom data yet */ 214 int gpio, irq, err;
102 }; 215
103 216 eth = of_find_node_by_path("/usb-s8815/ethernet-gpio");
104 cpu8815_add_gpios(cpu8815_gpio_base, ARRAY_SIZE(cpu8815_gpio_base), 217 if (!eth) {
105 IRQ_GPIO0, &pdata); 218 pr_info("could not find any ethernet GPIO\n");
106 cpu8815_add_pinctrl(NULL, "pinctrl-stn8815"); 219 return 0;
107 amba_apb_device_add(NULL, "rng", NOMADIK_RNG_BASE, SZ_4K, 0, 0, NULL, 0); 220 }
108 amba_apb_device_add(NULL, "rtc-pl031", NOMADIK_RTC_BASE, SZ_4K, IRQ_RTC_RTT, 0, NULL, 0); 221 gpio = of_get_gpio(eth, 0);
222 err = gpio_request(gpio, "eth_irq");
223 if (err) {
224 pr_info("failed to request ethernet GPIO\n");
225 return -ENODEV;
226 }
227 err = gpio_direction_input(gpio);
228 if (err) {
229 pr_info("failed to set ethernet GPIO as input\n");
230 return -ENODEV;
231 }
232 irq = gpio_to_irq(gpio);
233 pr_info("enabled USB-S8815 ethernet GPIO %d, IRQ %d\n", gpio, irq);
109 return 0; 234 return 0;
110} 235}
111arch_initcall(cpu8815_init); 236device_initcall(cpu8815_eth_init);
112 237
113/* All SoC devices live in the same area (see hardware.h) */ 238/*
114static struct map_desc nomadik_io_desc[] __initdata = { 239 * TODO:
115 { 240 * cannot be set from device tree, convert to a proper DT
116 .virtual = NOMADIK_IO_VIRTUAL, 241 * binding.
117 .pfn = __phys_to_pfn(NOMADIK_IO_PHYSICAL), 242 */
118 .length = NOMADIK_IO_SIZE, 243static struct mmci_platform_data mmcsd_plat_data = {
119 .type = MT_DEVICE, 244 .ocr_mask = MMC_VDD_29_30,
120 }
121 /* static ram and secured ram may be added later */
122}; 245};
123 246
124void __init cpu8815_map_io(void) 247/*
248 * This GPIO pin turns on a line that is used to detect card insertion
249 * on this board.
250 */
251static int __init cpu8815_mmcsd_init(void)
125{ 252{
126 iotable_init(nomadik_io_desc, ARRAY_SIZE(nomadik_io_desc)); 253 struct device_node *cdbias;
127} 254 int gpio, err;
128 255
129void __init cpu8815_init_irq(void) 256 cdbias = of_find_node_by_path("/usb-s8815/mmcsd-gpio");
130{ 257 if (!cdbias) {
131 /* This modified VIC cell has two register blocks, at 0 and 0x20 */ 258 pr_info("could not find MMC/SD card detect bias node\n");
132 vic_init(io_p2v(NOMADIK_IC_BASE + 0x00), IRQ_VIC_START + 0, ~0, 0); 259 return 0;
133 vic_init(io_p2v(NOMADIK_IC_BASE + 0x20), IRQ_VIC_START + 32, ~0, 0); 260 }
134 261 gpio = of_get_gpio(cdbias, 0);
135 /* 262 if (gpio < 0) {
136 * Init clocks here so that they are available for system timer 263 pr_info("could not obtain MMC/SD card detect bias GPIO\n");
137 * initialization. 264 return 0;
138 */ 265 }
139 nomadik_clk_init(); 266 err = gpio_request(gpio, "card detect bias");
267 if (err) {
268 pr_info("failed to request card detect bias GPIO %d\n", gpio);
269 return -ENODEV;
270 }
271 err = gpio_direction_output(gpio, 0);
272 if (err){
273 pr_info("failed to set GPIO %d as output, low\n", gpio);
274 return err;
275 }
276 pr_info("enabled USB-S8815 CD bias GPIO %d, low\n", gpio);
277 return 0;
140} 278}
279device_initcall(cpu8815_mmcsd_init);
141 280
142/* 281
143 * This function is called from the board init ("init_machine"). 282/* These are mostly to get the right device names for the clock lookups */
144 */ 283static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = {
145 void __init cpu8815_platform_init(void) 284 OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO0_BASE,
285 "gpio.0", NULL),
286 OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO1_BASE,
287 "gpio.1", NULL),
288 OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO2_BASE,
289 "gpio.2", NULL),
290 OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO3_BASE,
291 "gpio.3", NULL),
292 OF_DEV_AUXDATA("stericsson,nmk-pinctrl-stn8815", 0,
293 "pinctrl-stn8815", NULL),
294 OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART0_BASE,
295 "uart0", NULL),
296 OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART1_BASE,
297 "uart1", NULL),
298 OF_DEV_AUXDATA("arm,primecell", NOMADIK_RNG_BASE,
299 "rng", NULL),
300 OF_DEV_AUXDATA("arm,primecell", NOMADIK_RTC_BASE,
301 "rtc-pl031", NULL),
302 OF_DEV_AUXDATA("stericsson,fsmc-nand", NOMADIK_FSMC_BASE,
303 "fsmc-nand", &cpu8815_nand_data),
304 OF_DEV_AUXDATA("arm,primecell", NOMADIK_SDI_BASE,
305 "mmci", &mmcsd_plat_data),
306 { /* sentinel */ },
307};
308
309static void __init cpu8815_init_of(void)
146{ 310{
147#ifdef CONFIG_CACHE_L2X0 311#ifdef CONFIG_CACHE_L2X0
148 /* At full speed latency must be >=2, so 0x249 in low bits */ 312 /* At full speed latency must be >=2, so 0x249 in low bits */
149 l2x0_init(io_p2v(NOMADIK_L2CC_BASE), 0x00730249, 0xfe000fff); 313 l2x0_of_init(0x00730249, 0xfe000fff);
150#endif 314#endif
151 return; 315 pinctrl_register_mappings(nhk8815_pinmap, ARRAY_SIZE(nhk8815_pinmap));
316 of_platform_populate(NULL, of_default_bus_match_table,
317 cpu8815_auxdata_lookup, NULL);
152} 318}
153 319
154void cpu8815_restart(char mode, const char *cmd) 320static const char * cpu8815_board_compat[] = {
155{ 321 "calaosystems,usb-s8815",
156 void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18); 322 NULL,
157 323};
158 /* FIXME: use egpio when implemented */
159 324
160 /* Write anything to Reset status register */ 325DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
161 writel(1, src_rstsr); 326 .map_io = cpu8815_map_io,
162} 327 .init_irq = irqchip_init,
328 .init_time = cpu8815_timer_init_of,
329 .init_machine = cpu8815_init_of,
330 .restart = cpu8815_restart,
331 .dt_compat = cpu8815_board_compat,
332MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h
deleted file mode 100644
index 71c21e8a11dc..000000000000
--- a/arch/arm/mach-nomadik/cpu-8815.h
+++ /dev/null
@@ -1,4 +0,0 @@
1extern void cpu8815_map_io(void);
2extern void cpu8815_platform_init(void);
3extern void cpu8815_init_irq(void);
4extern void cpu8815_restart(char, const char *);
diff --git a/arch/arm/mach-nomadik/i2c-8815nhk.c b/arch/arm/mach-nomadik/i2c-8815nhk.c
deleted file mode 100644
index 0c2f6628299a..000000000000
--- a/arch/arm/mach-nomadik/i2c-8815nhk.c
+++ /dev/null
@@ -1,88 +0,0 @@
1#include <linux/module.h>
2#include <linux/init.h>
3#include <linux/i2c.h>
4#include <linux/i2c-algo-bit.h>
5#include <linux/i2c-gpio.h>
6#include <linux/platform_device.h>
7#include <linux/platform_data/pinctrl-nomadik.h>
8
9/*
10 * There are two busses in the 8815NHK.
11 * They could, in theory, be driven by the hardware component, but we
12 * use bit-bang through GPIO by now, to keep things simple
13 */
14
15/* I2C0 connected to the STw4811 power management chip */
16static struct i2c_gpio_platform_data nhk8815_i2c_data0 = {
17 /* keep defaults for timeouts; pins are push-pull bidirectional */
18 .scl_pin = 62,
19 .sda_pin = 63,
20};
21
22/* I2C1 connected to various sensors */
23static struct i2c_gpio_platform_data nhk8815_i2c_data1 = {
24 /* keep defaults for timeouts; pins are push-pull bidirectional */
25 .scl_pin = 53,
26 .sda_pin = 54,
27};
28
29/* I2C2 connected to the USB portions of the STw4811 only */
30static struct i2c_gpio_platform_data nhk8815_i2c_data2 = {
31 /* keep defaults for timeouts; pins are push-pull bidirectional */
32 .scl_pin = 73,
33 .sda_pin = 74,
34};
35
36static struct platform_device nhk8815_i2c_dev0 = {
37 .name = "i2c-gpio",
38 .id = 0,
39 .dev = {
40 .platform_data = &nhk8815_i2c_data0,
41 },
42};
43
44static struct platform_device nhk8815_i2c_dev1 = {
45 .name = "i2c-gpio",
46 .id = 1,
47 .dev = {
48 .platform_data = &nhk8815_i2c_data1,
49 },
50};
51
52static struct platform_device nhk8815_i2c_dev2 = {
53 .name = "i2c-gpio",
54 .id = 2,
55 .dev = {
56 .platform_data = &nhk8815_i2c_data2,
57 },
58};
59
60static pin_cfg_t cpu8815_pins_i2c[] = {
61 PIN_CFG_INPUT(62, GPIO, PULLUP),
62 PIN_CFG_INPUT(63, GPIO, PULLUP),
63 PIN_CFG_INPUT(53, GPIO, PULLUP),
64 PIN_CFG_INPUT(54, GPIO, PULLUP),
65 PIN_CFG_INPUT(73, GPIO, PULLUP),
66 PIN_CFG_INPUT(74, GPIO, PULLUP),
67};
68
69static int __init nhk8815_i2c_init(void)
70{
71 nmk_config_pins(cpu8815_pins_i2c, ARRAY_SIZE(cpu8815_pins_i2c));
72 platform_device_register(&nhk8815_i2c_dev0);
73 platform_device_register(&nhk8815_i2c_dev1);
74 platform_device_register(&nhk8815_i2c_dev2);
75
76 return 0;
77}
78
79static void __exit nhk8815_i2c_exit(void)
80{
81 platform_device_unregister(&nhk8815_i2c_dev0);
82 platform_device_unregister(&nhk8815_i2c_dev1);
83 platform_device_unregister(&nhk8815_i2c_dev2);
84 return;
85}
86
87module_init(nhk8815_i2c_init);
88module_exit(nhk8815_i2c_exit);
diff --git a/arch/arm/mach-nomadik/include/mach/hardware.h b/arch/arm/mach-nomadik/include/mach/hardware.h
deleted file mode 100644
index 02035e459f50..000000000000
--- a/arch/arm/mach-nomadik/include/mach/hardware.h
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * This file contains the hardware definitions of the Nomadik.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * YOU should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18#ifndef __ASM_ARCH_HARDWARE_H
19#define __ASM_ARCH_HARDWARE_H
20
21/* Nomadik registers live from 0x1000.0000 to 0x1023.0000 -- currently */
22#define NOMADIK_IO_VIRTUAL 0xF0000000 /* VA of IO */
23#define NOMADIK_IO_PHYSICAL 0x10000000 /* PA of IO */
24#define NOMADIK_IO_SIZE 0x00300000 /* 3MB for all regs */
25
26/* used in C code, so cast to proper type */
27#define io_p2v(x) ((void __iomem *)(x) \
28 - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL)
29#define io_v2p(x) ((unsigned long)(x) \
30 - NOMADIK_IO_VIRTUAL + NOMADIK_IO_PHYSICAL)
31
32/* used in asm code, so no casts */
33#define IO_ADDRESS(x) IOMEM((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL)
34
35/*
36 * Base address defination for Nomadik Onchip Logic Block
37 */
38#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
39#define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
40#define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
41#define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
42#define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
43#define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
44#define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
45#define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
46#define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
47#define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
48#define NOMADIK_XTI_BASE 0x101A0000 /* XTI */
49#define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */
50#define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */
51#define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */
52#define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */
53#define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */
54#define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */
55#define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */
56#define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */
57#define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */
58#define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */
59#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
60#define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
61#define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */
62#define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */
63#define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */
64#define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */
65#define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
66#define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
67#define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */
68#define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
69#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
70#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
71#define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */
72#define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */
73#define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */
74#define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */
75#define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */
76#define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */
77#define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
78
79/* Other ranges, not for p2v/v2p */
80#define NOMADIK_BACKUP_RAM 0x80010000
81#define NOMADIK_EBROM 0x80000000 /* Embedded boot ROM */
82#define NOMADIK_HAMACV_DMEM_BASE 0xA0100000 /* HAMACV Data Memory Start */
83#define NOMADIK_HAMACV_DMEM_END 0xA01FFFFF /* HAMACV Data Memory End */
84#define NOMADIK_HAMACA_DMEM 0xA0200000 /* HAMACA Data Memory Space */
85
86#define NOMADIK_FSMC_VA IO_ADDRESS(NOMADIK_FSMC_BASE)
87#define NOMADIK_MTU0_VA IO_ADDRESS(NOMADIK_MTU0_BASE)
88#define NOMADIK_MTU1_VA IO_ADDRESS(NOMADIK_MTU1_BASE)
89
90#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h
index 215f8cdb4004..90ac965a92fe 100644
--- a/arch/arm/mach-nomadik/include/mach/irqs.h
+++ b/arch/arm/mach-nomadik/include/mach/irqs.h
@@ -20,8 +20,6 @@
20#ifndef __ASM_ARCH_IRQS_H 20#ifndef __ASM_ARCH_IRQS_H
21#define __ASM_ARCH_IRQS_H 21#define __ASM_ARCH_IRQS_H
22 22
23#include <mach/hardware.h>
24
25#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */ 23#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */
26 24
27/* 25/*
diff --git a/arch/arm/mach-nomadik/include/mach/uncompress.h b/arch/arm/mach-nomadik/include/mach/uncompress.h
index f527af6527c8..106fccca2021 100644
--- a/arch/arm/mach-nomadik/include/mach/uncompress.h
+++ b/arch/arm/mach-nomadik/include/mach/uncompress.h
@@ -21,7 +21,6 @@
21 21
22#include <asm/setup.h> 22#include <asm/setup.h>
23#include <asm/io.h> 23#include <asm/io.h>
24#include <mach/hardware.h>
25 24
26/* we need the constants in amba/serial.h, but it refers to amba_device */ 25/* we need the constants in amba/serial.h, but it refers to amba_device */
27struct amba_device; 26struct amba_device;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 14:19:38 -0500